msm_cvp_platform.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/debugfs.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/init.h>
  8. #include <linux/ioctl.h>
  9. #include <linux/list.h>
  10. #include <linux/module.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/slab.h>
  14. #include <linux/types.h>
  15. #include <linux/version.h>
  16. #include <linux/io.h>
  17. #include <soc/qcom/of_common.h>
  18. #include "msm_cvp_internal.h"
  19. #include "msm_cvp_debug.h"
  20. #include "cvp_hfi_api.h"
  21. #include "cvp_hfi.h"
  22. #define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \
  23. { \
  24. .override_bit_info.max_channel_override = mco, \
  25. .override_bit_info.mal_length_override = mlo, \
  26. .override_bit_info.hb_override = hbo, \
  27. .override_bit_info.bank_swzl_level_override = bslo, \
  28. .override_bit_info.bank_spreading_override = bso, \
  29. .override_bit_info.reserved = rs, \
  30. .max_channels = mc, \
  31. .mal_length = ml, \
  32. .highest_bank_bit = hbb, \
  33. .bank_swzl_level = bsl, \
  34. .bank_spreading = bsp, \
  35. }
  36. static struct msm_cvp_common_data default_common_data[] = {
  37. {
  38. .key = "qcom,auto-pil",
  39. .value = 1,
  40. },
  41. };
  42. static struct msm_cvp_common_data sm8450_common_data[] = {
  43. {
  44. .key = "qcom,pm-qos-latency-us",
  45. .value = 50,
  46. },
  47. {
  48. .key = "qcom,sw-power-collapse",
  49. .value = 1,
  50. },
  51. {
  52. .key = "qcom,domain-attr-non-fatal-faults",
  53. .value = 1,
  54. },
  55. {
  56. .key = "qcom,max-secure-instances",
  57. .value = 2, /*
  58. * As per design driver allows 3rd
  59. * instance as well since the secure
  60. * flags were updated later for the
  61. * current instance. Hence total
  62. * secure sessions would be
  63. * max-secure-instances + 1.
  64. */
  65. },
  66. {
  67. .key = "qcom,max-ssr-allowed",
  68. .value = 1, /*
  69. * Maxinum number of SSR before BUG_ON
  70. */
  71. },
  72. {
  73. .key = "qcom,power-collapse-delay",
  74. .value = 3000,
  75. },
  76. {
  77. .key = "qcom,hw-resp-timeout",
  78. .value = 2000,
  79. },
  80. {
  81. .key = "qcom,dsp-resp-timeout",
  82. .value = 1000,
  83. },
  84. {
  85. .key = "qcom,debug-timeout",
  86. .value = 0,
  87. },
  88. {
  89. .key = "qcom,dsp-enabled",
  90. .value = 1,
  91. }
  92. };
  93. static struct msm_cvp_common_data sm8550_common_data[] = {
  94. {
  95. .key = "qcom,pm-qos-latency-us",
  96. .value = 50,
  97. },
  98. {
  99. .key = "qcom,sw-power-collapse",
  100. .value = 1,
  101. },
  102. {
  103. .key = "qcom,domain-attr-non-fatal-faults",
  104. .value = 0,
  105. },
  106. {
  107. .key = "qcom,max-secure-instances",
  108. .value = 2, /*
  109. * As per design driver allows 3rd
  110. * instance as well since the secure
  111. * flags were updated later for the
  112. * current instance. Hence total
  113. * secure sessions would be
  114. * max-secure-instances + 1.
  115. */
  116. },
  117. {
  118. .key = "qcom,max-ssr-allowed",
  119. .value = 1, /*
  120. * Maxinum number of SSR before BUG_ON
  121. */
  122. },
  123. {
  124. .key = "qcom,power-collapse-delay",
  125. .value = 3000,
  126. },
  127. {
  128. .key = "qcom,hw-resp-timeout",
  129. .value = 2000,
  130. },
  131. {
  132. .key = "qcom,dsp-resp-timeout",
  133. .value = 1000,
  134. },
  135. {
  136. .key = "qcom,debug-timeout",
  137. .value = 0,
  138. },
  139. {
  140. .key = "qcom,dsp-enabled",
  141. .value = 1,
  142. }
  143. };
  144. static struct msm_cvp_common_data sm8550_tvm_common_data[] = {
  145. {
  146. .key = "qcom,pm-qos-latency-us",
  147. .value = 50,
  148. },
  149. {
  150. .key = "qcom,sw-power-collapse",
  151. .value = 0,
  152. },
  153. {
  154. .key = "qcom,domain-attr-non-fatal-faults",
  155. .value = 0,
  156. },
  157. {
  158. .key = "qcom,max-secure-instances",
  159. .value = 2, /*
  160. * As per design driver allows 3rd
  161. * instance as well since the secure
  162. * flags were updated later for the
  163. * current instance. Hence total
  164. * secure sessions would be
  165. * max-secure-instances + 1.
  166. */
  167. },
  168. {
  169. .key = "qcom,max-ssr-allowed",
  170. .value = 1, /*
  171. * Maxinum number of SSR before BUG_ON
  172. */
  173. },
  174. {
  175. .key = "qcom,power-collapse-delay",
  176. .value = 3000,
  177. },
  178. {
  179. .key = "qcom,hw-resp-timeout",
  180. .value = 2000,
  181. },
  182. {
  183. .key = "qcom,dsp-resp-timeout",
  184. .value = 1000,
  185. },
  186. {
  187. .key = "qcom,debug-timeout",
  188. .value = 0,
  189. },
  190. {
  191. .key = "qcom,dsp-enabled",
  192. .value = 0,
  193. }
  194. };
  195. static struct msm_cvp_common_data sm8650_common_data[] = {
  196. {
  197. .key = "qcom,pm-qos-latency-us",
  198. .value = 50,
  199. },
  200. {
  201. .key = "qcom,sw-power-collapse",
  202. .value = 0, /* Disable during initial stage for Rumi 48 bringup */
  203. },
  204. {
  205. .key = "qcom,domain-attr-non-fatal-faults",
  206. .value = 0,
  207. },
  208. {
  209. .key = "qcom,max-secure-instances",
  210. .value = 2, /*
  211. * As per design driver allows 3rd
  212. * instance as well since the secure
  213. * flags were updated later for the
  214. * current instance. Hence total
  215. * secure sessions would be
  216. * max-secure-instances + 1.
  217. */
  218. },
  219. {
  220. .key = "qcom,max-ssr-allowed",
  221. .value = 1, /*
  222. * Maxinum number of SSR before BUG_ON
  223. */
  224. },
  225. {
  226. .key = "qcom,power-collapse-delay",
  227. .value = 3000,
  228. },
  229. {
  230. .key = "qcom,hw-resp-timeout",
  231. .value = 2000,
  232. },
  233. {
  234. .key = "qcom,dsp-resp-timeout",
  235. .value = 1000,
  236. },
  237. {
  238. .key = "qcom,debug-timeout",
  239. .value = 0,
  240. },
  241. {
  242. .key = "qcom,dsp-enabled",
  243. .value = 0, /* Disable during initial stage for Rumi 48 bringup */
  244. }
  245. };
  246. /* Default UBWC config for LPDDR5 */
  247. static struct msm_cvp_ubwc_config_data kona_ubwc_data[] = {
  248. UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0),
  249. };
  250. static struct msm_cvp_qos_setting waipio_noc_qos = {
  251. .axi_qos = 0x99,
  252. .prioritylut_low = 0x22222222,
  253. .prioritylut_high = 0x33333333,
  254. .urgency_low = 0x1022,
  255. .dangerlut_low = 0x0,
  256. .safelut_low = 0xffff,
  257. };
  258. static struct msm_cvp_platform_data default_data = {
  259. .common_data = default_common_data,
  260. .common_data_length = ARRAY_SIZE(default_common_data),
  261. .sku_version = 0,
  262. .vpu_ver = VPU_VERSION_5,
  263. .ubwc_config = 0x0,
  264. .noc_qos = 0x0,
  265. .vm_id = 1,
  266. };
  267. static struct msm_cvp_platform_data sm8450_data = {
  268. .common_data = sm8450_common_data,
  269. .common_data_length = ARRAY_SIZE(sm8450_common_data),
  270. .sku_version = 0,
  271. .vpu_ver = VPU_VERSION_5,
  272. .ubwc_config = kona_ubwc_data,
  273. .noc_qos = &waipio_noc_qos,
  274. .vm_id = 1,
  275. };
  276. static struct msm_cvp_platform_data sm8550_data = {
  277. .common_data = sm8550_common_data,
  278. .common_data_length = ARRAY_SIZE(sm8550_common_data),
  279. .sku_version = 0,
  280. .vpu_ver = VPU_VERSION_5,
  281. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  282. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  283. .vm_id = 1,
  284. };
  285. static struct msm_cvp_platform_data sm8550_tvm_data = {
  286. .common_data = sm8550_tvm_common_data,
  287. .common_data_length = ARRAY_SIZE(sm8550_tvm_common_data),
  288. .sku_version = 0,
  289. .vpu_ver = VPU_VERSION_5,
  290. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  291. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  292. .vm_id = 2,
  293. };
  294. static struct msm_cvp_platform_data sm8650_data = {
  295. .common_data = sm8650_common_data,
  296. .common_data_length = ARRAY_SIZE(sm8650_common_data),
  297. .sku_version = 0,
  298. .vpu_ver = VPU_VERSION_5,
  299. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  300. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  301. .vm_id = 1,
  302. };
  303. static const struct of_device_id msm_cvp_dt_match[] = {
  304. {
  305. .compatible = "qcom,waipio-cvp",
  306. .data = &sm8450_data,
  307. },
  308. {
  309. .compatible = "qcom,kalama-cvp",
  310. .data = &sm8550_data,
  311. },
  312. {
  313. .compatible = "qcom,kalama-cvp-tvm",
  314. .data = &sm8550_tvm_data,
  315. },
  316. {
  317. .compatible = "qcom,pineapple-cvp",
  318. .data = &sm8650_data,
  319. },
  320. {},
  321. };
  322. /*
  323. * WARN: name field CAN NOT hold more than 23 chars
  324. * excluding the ending '\0'
  325. *
  326. * NOTE: the def entry index for the command packet is
  327. * "the packet type - HFI_CMD_SESSION_CVP_START"
  328. */
  329. const struct msm_cvp_hfi_defs cvp_hfi_defs[MAX_PKT_IDX] = {
  330. [HFI_CMD_SESSION_CVP_DFS_CONFIG - HFI_CMD_SESSION_CVP_START] =
  331. {
  332. .size = HFI_DFS_CONFIG_CMD_SIZE,
  333. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  334. .is_config_pkt = true,
  335. .resp = HAL_NO_RESP,
  336. .name = "DFS",
  337. },
  338. [HFI_CMD_SESSION_CVP_DFS_FRAME - HFI_CMD_SESSION_CVP_START] =
  339. {
  340. .size = HFI_DFS_FRAME_CMD_SIZE,
  341. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  342. .is_config_pkt = false,
  343. .resp = HAL_NO_RESP,
  344. .name = "DFS_FRAME",
  345. },
  346. [HFI_CMD_SESSION_CVP_SGM_OF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  347. {
  348. .size = 0xFFFFFFFF,
  349. .type = HFI_CMD_SESSION_CVP_SGM_OF_CONFIG,
  350. .is_config_pkt = true,
  351. .resp = HAL_NO_RESP,
  352. .name = "SGM_OF",
  353. },
  354. [HFI_CMD_SESSION_CVP_SGM_OF_FRAME - HFI_CMD_SESSION_CVP_START] =
  355. {
  356. .size = 0xFFFFFFFF,
  357. .type = HFI_CMD_SESSION_CVP_SGM_OF_FRAME,
  358. .is_config_pkt = false,
  359. .resp = HAL_NO_RESP,
  360. .name = "SGM_OF_FRAME",
  361. },
  362. [HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  363. {
  364. .size = 0xFFFFFFFF,
  365. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  366. .is_config_pkt = true,
  367. .resp = HAL_NO_RESP,
  368. .name = "WARP_NCC",
  369. },
  370. [HFI_CMD_SESSION_CVP_WARP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  371. {
  372. .size = 0xFFFFFFFF,
  373. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  374. .is_config_pkt = false,
  375. .resp = HAL_NO_RESP,
  376. .name = "WARP_NCC_FRAME",
  377. },
  378. [HFI_CMD_SESSION_CVP_WARP_CONFIG - HFI_CMD_SESSION_CVP_START] =
  379. {
  380. .size = 0xFFFFFFFF,
  381. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  382. .is_config_pkt = true,
  383. .resp = HAL_NO_RESP,
  384. .name = "WARP",
  385. },
  386. [HFI_CMD_SESSION_CVP_WARP_DS_PARAMS - HFI_CMD_SESSION_CVP_START] =
  387. {
  388. .size = 0xFFFFFFFF,
  389. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  390. .is_config_pkt = true,
  391. .resp = HAL_NO_RESP,
  392. .name = "WARP_DS_PARAMS",
  393. },
  394. [HFI_CMD_SESSION_CVP_WARP_FRAME - HFI_CMD_SESSION_CVP_START] =
  395. {
  396. .size = 0xFFFFFFFF,
  397. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  398. .is_config_pkt = false,
  399. .resp = HAL_NO_RESP,
  400. .name = "WARP_FRAME",
  401. },
  402. [HFI_CMD_SESSION_CVP_DMM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  403. {
  404. .size = HFI_DMM_CONFIG_CMD_SIZE,
  405. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  406. .is_config_pkt = true,
  407. .resp = HAL_NO_RESP,
  408. .name = "DMM",
  409. },
  410. [HFI_CMD_SESSION_CVP_DMM_PARAMS - HFI_CMD_SESSION_CVP_START] =
  411. {
  412. .size = 0xFFFFFFFF,
  413. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  414. .is_config_pkt = true,
  415. .resp = HAL_NO_RESP,
  416. .name = "DMM_PARAMS",
  417. },
  418. [HFI_CMD_SESSION_CVP_DMM_FRAME - HFI_CMD_SESSION_CVP_START] =
  419. {
  420. .size = HFI_DMM_FRAME_CMD_SIZE,
  421. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  422. .is_config_pkt = false,
  423. .resp = HAL_NO_RESP,
  424. .name = "DMM_FRAME",
  425. },
  426. [HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  427. {
  428. .size = HFI_PERSIST_CMD_SIZE,
  429. .type =HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  430. .is_config_pkt = true,
  431. .resp = HAL_NO_RESP,
  432. .name = "SET_PERSIST",
  433. },
  434. [HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  435. {
  436. .size = 0xffffffff,
  437. .type =HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  438. .is_config_pkt = false,
  439. .resp = HAL_NO_RESP,
  440. .name = "REL_PERSIST",
  441. },
  442. [HFI_CMD_SESSION_CVP_DS - HFI_CMD_SESSION_CVP_START] =
  443. {
  444. .size = HFI_DS_CMD_SIZE,
  445. .type =HFI_CMD_SESSION_CVP_DS,
  446. .is_config_pkt = false,
  447. .resp = HAL_NO_RESP,
  448. .name = "DS",
  449. },
  450. [HFI_CMD_SESSION_CVP_CV_TME_CONFIG - HFI_CMD_SESSION_CVP_START] =
  451. {
  452. .size = HFI_OF_CONFIG_CMD_SIZE,
  453. .type =HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  454. .is_config_pkt = true,
  455. .resp = HAL_NO_RESP,
  456. .name = "TME",
  457. },
  458. [HFI_CMD_SESSION_CVP_CV_TME_FRAME - HFI_CMD_SESSION_CVP_START] =
  459. {
  460. .size = HFI_OF_FRAME_CMD_SIZE,
  461. .type =HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  462. .is_config_pkt = false,
  463. .resp = HAL_NO_RESP,
  464. .name = "TME_FRAME",
  465. },
  466. [HFI_CMD_SESSION_CVP_CV_ODT_CONFIG - HFI_CMD_SESSION_CVP_START] =
  467. {
  468. .size = HFI_ODT_CONFIG_CMD_SIZE,
  469. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  470. .is_config_pkt = true,
  471. .resp = HAL_NO_RESP,
  472. .name = "ODT",
  473. },
  474. [HFI_CMD_SESSION_CVP_CV_ODT_FRAME - HFI_CMD_SESSION_CVP_START] =
  475. {
  476. .size = HFI_ODT_FRAME_CMD_SIZE,
  477. .type =HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  478. .is_config_pkt = false,
  479. .resp = HAL_NO_RESP,
  480. .name = "ODT_FRAME",
  481. },
  482. [HFI_CMD_SESSION_CVP_CV_OD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  483. {
  484. .size = HFI_OD_CONFIG_CMD_SIZE,
  485. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  486. .is_config_pkt = true,
  487. .resp = HAL_NO_RESP,
  488. .name = "OD",
  489. },
  490. [HFI_CMD_SESSION_CVP_CV_OD_FRAME - HFI_CMD_SESSION_CVP_START] =
  491. {
  492. .size = HFI_OD_FRAME_CMD_SIZE,
  493. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  494. .is_config_pkt = false,
  495. .resp = HAL_NO_RESP,
  496. .name = "OD_FRAME",
  497. },
  498. [HFI_CMD_SESSION_CVP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  499. {
  500. .size = HFI_NCC_CONFIG_CMD_SIZE,
  501. .type =HFI_CMD_SESSION_CVP_NCC_CONFIG,
  502. .is_config_pkt = true,
  503. .resp = HAL_NO_RESP,
  504. .name = "NCC",
  505. },
  506. [HFI_CMD_SESSION_CVP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  507. {
  508. .size = HFI_NCC_FRAME_CMD_SIZE,
  509. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  510. .is_config_pkt = false,
  511. .resp = HAL_NO_RESP,
  512. .name = "NCC_FRAME",
  513. },
  514. [HFI_CMD_SESSION_CVP_ICA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  515. {
  516. .size = HFI_ICA_CONFIG_CMD_SIZE,
  517. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  518. .is_config_pkt = true,
  519. .resp = HAL_NO_RESP,
  520. .name = "ICA",
  521. },
  522. [HFI_CMD_SESSION_CVP_ICA_FRAME - HFI_CMD_SESSION_CVP_START] =
  523. {
  524. .size = HFI_ICA_FRAME_CMD_SIZE,
  525. .type =HFI_CMD_SESSION_CVP_ICA_FRAME,
  526. .is_config_pkt = false,
  527. .resp = HAL_NO_RESP,
  528. .name = "ICA_FRAME",
  529. },
  530. [HFI_CMD_SESSION_CVP_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  531. {
  532. .size = HFI_HCD_CONFIG_CMD_SIZE,
  533. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  534. .is_config_pkt = true,
  535. .resp = HAL_NO_RESP,
  536. .name = "HCD",
  537. },
  538. [HFI_CMD_SESSION_CVP_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  539. {
  540. .size = HFI_HCD_FRAME_CMD_SIZE,
  541. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  542. .is_config_pkt = false,
  543. .resp = HAL_NO_RESP,
  544. .name = "HCD_FRAME",
  545. },
  546. [HFI_CMD_SESSION_CVP_DC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  547. {
  548. .size = HFI_DCM_CONFIG_CMD_SIZE,
  549. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  550. .is_config_pkt = true,
  551. .resp = HAL_NO_RESP,
  552. .name = "DC",
  553. },
  554. [HFI_CMD_SESSION_CVP_DC_FRAME - HFI_CMD_SESSION_CVP_START] =
  555. {
  556. .size = HFI_DCM_FRAME_CMD_SIZE,
  557. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  558. .is_config_pkt = false,
  559. .resp = HAL_NO_RESP,
  560. .name = "DC_FRAME",
  561. },
  562. [HFI_CMD_SESSION_CVP_DCM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  563. {
  564. .size = HFI_DCM_CONFIG_CMD_SIZE,
  565. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  566. .is_config_pkt = true,
  567. .resp = HAL_NO_RESP,
  568. .name = "DCM",
  569. },
  570. [HFI_CMD_SESSION_CVP_DCM_FRAME - HFI_CMD_SESSION_CVP_START] =
  571. {
  572. .size = HFI_DCM_FRAME_CMD_SIZE,
  573. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  574. .is_config_pkt = false,
  575. .resp = HAL_NO_RESP,
  576. .name = "DCM_FRAME",
  577. },
  578. [HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  579. {
  580. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  581. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  582. .is_config_pkt = true,
  583. .resp = HAL_NO_RESP,
  584. .name = "PYS_HCD",
  585. },
  586. [HFI_CMD_SESSION_CVP_PYS_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  587. {
  588. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  589. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  590. .is_config_pkt = false,
  591. .resp = HAL_NO_RESP,
  592. .name = "PYS_HCD_FRAME",
  593. },
  594. [HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  595. {
  596. .size = 0xFFFFFFFF,
  597. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  598. .is_config_pkt = true,
  599. .resp = HAL_NO_RESP,
  600. .name = "SET_MODEL",
  601. },
  602. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  603. {
  604. .size = 0xFFFFFFFF,
  605. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS,
  606. .is_config_pkt = false,
  607. .resp = HAL_NO_RESP,
  608. .name = "SET_SNAPSHOT",
  609. },
  610. [HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  611. {
  612. .size = 0xFFFFFFFF,
  613. .type = HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS,
  614. .is_config_pkt = false,
  615. .resp = HAL_NO_RESP,
  616. .name = "REL_SNAPSHOT",
  617. },
  618. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE - HFI_CMD_SESSION_CVP_START] =
  619. {
  620. .size = 0xFFFFFFFF,
  621. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE,
  622. .is_config_pkt = true,
  623. .resp = HAL_NO_RESP,
  624. .name = "SNAPSHOT_MODE",
  625. },
  626. [HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE - HFI_CMD_SESSION_CVP_START] =
  627. {
  628. .size = 0xFFFFFFFF,
  629. .type = HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE,
  630. .is_config_pkt = true,
  631. .resp = HAL_NO_RESP,
  632. .name = "SNAPSHOT_DONE",
  633. },
  634. [HFI_CMD_SESSION_CVP_FD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  635. {
  636. .size = 0xFFFFFFFF,
  637. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  638. .is_config_pkt = true,
  639. .resp = HAL_NO_RESP,
  640. .name = "FD",
  641. },
  642. [HFI_CMD_SESSION_CVP_FD_FRAME - HFI_CMD_SESSION_CVP_START] =
  643. {
  644. .size = 0xFFFFFFFF,
  645. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  646. .is_config_pkt = false,
  647. .resp = HAL_NO_RESP,
  648. .name = "FD_FRAME",
  649. },
  650. [HFI_CMD_SESSION_CVP_XRA_FRAME - HFI_CMD_SESSION_CVP_START] =
  651. {
  652. .size = 0xFFFFFFFF,
  653. .type = HFI_CMD_SESSION_CVP_XRA_FRAME,
  654. .is_config_pkt = false,
  655. .resp = HAL_NO_RESP,
  656. .name = "XRA_FRAME",
  657. },
  658. [HFI_CMD_SESSION_CVP_XRA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  659. {
  660. .size = 0xFFFFFFFF,
  661. .type = HFI_CMD_SESSION_CVP_XRA_CONFIG,
  662. .is_config_pkt = true,
  663. .resp = HAL_NO_RESP,
  664. .name = "XRA_CONFIG",
  665. },
  666. [HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME - HFI_CMD_SESSION_CVP_START] =
  667. {
  668. .size = 0xFFFFFFFF,
  669. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME,
  670. .is_config_pkt = false,
  671. .resp = HAL_NO_RESP,
  672. .name = "XRA_BLOB_FRAME",
  673. },
  674. [HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG - HFI_CMD_SESSION_CVP_START] =
  675. {
  676. .size = 0xFFFFFFFF,
  677. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG,
  678. .is_config_pkt = true,
  679. .resp = HAL_NO_RESP,
  680. .name = "XRA_BLOB_CONFIG",
  681. },
  682. [HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  683. {
  684. .size = 0xFFFFFFFF,
  685. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME,
  686. .is_config_pkt = false,
  687. .resp = HAL_NO_RESP,
  688. .name = "XRA_PATCH_FRAME",
  689. },
  690. [HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  691. {
  692. .size = 0xFFFFFFFF,
  693. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG,
  694. .is_config_pkt = true,
  695. .resp = HAL_NO_RESP,
  696. .name = "XRA_PATCH_CONFIG",
  697. },
  698. [HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  699. {
  700. .size = 0xFFFFFFFF,
  701. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME,
  702. .is_config_pkt = false,
  703. .resp = HAL_NO_RESP,
  704. .name = "XRA_MATCH_FRAME",
  705. },
  706. [HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  707. {
  708. .size = 0xFFFFFFFF,
  709. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG,
  710. .is_config_pkt = true,
  711. .resp = HAL_NO_RESP,
  712. .name = "XRA_MATCH_CONFIG",
  713. },
  714. [HFI_CMD_SESSION_CVP_RGE_FRAME - HFI_CMD_SESSION_CVP_START] =
  715. {
  716. .size = 0xFFFFFFFF,
  717. .type = HFI_CMD_SESSION_CVP_RGE_FRAME,
  718. .is_config_pkt = false,
  719. .resp = HAL_NO_RESP,
  720. .name = "RGE_FRAME",
  721. },
  722. [HFI_CMD_SESSION_CVP_RGE_CONFIG - HFI_CMD_SESSION_CVP_START] =
  723. {
  724. .size = 0xFFFFFFFF,
  725. .type = HFI_CMD_SESSION_CVP_RGE_CONFIG,
  726. .is_config_pkt = true,
  727. .resp = HAL_NO_RESP,
  728. .name = "RGE_CONFIG",
  729. },
  730. [HFI_CMD_SESSION_EVA_ITOF_FRAME - HFI_CMD_SESSION_CVP_START] =
  731. {
  732. .size = 0xFFFFFFFF,
  733. .type = HFI_CMD_SESSION_EVA_ITOF_FRAME,
  734. .is_config_pkt = false,
  735. .resp = HAL_NO_RESP,
  736. .name = "ITOF_FRAME",
  737. },
  738. [HFI_CMD_SESSION_EVA_ITOF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  739. {
  740. .size = 0xFFFFFFFF,
  741. .type = HFI_CMD_SESSION_EVA_ITOF_CONFIG,
  742. .is_config_pkt = true,
  743. .resp = HAL_NO_RESP,
  744. .name = "ITOF_CONFIG",
  745. },
  746. [HFI_CMD_SESSION_EVA_DLFD_FRAME - HFI_CMD_SESSION_CVP_START] =
  747. {
  748. .size = 0xFFFFFFFF,
  749. .type = HFI_CMD_SESSION_EVA_DLFD_FRAME,
  750. .is_config_pkt = false,
  751. .resp = HAL_NO_RESP,
  752. .name = "DLFD_FRAME",
  753. },
  754. [HFI_CMD_SESSION_EVA_DLFD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  755. {
  756. .size = 0xFFFFFFFF,
  757. .type = HFI_CMD_SESSION_EVA_DLFD_CONFIG,
  758. .is_config_pkt = true,
  759. .resp = HAL_NO_RESP,
  760. .name = "DLFD_CONFIG",
  761. },
  762. [HFI_CMD_SESSION_EVA_DLFL_FRAME - HFI_CMD_SESSION_CVP_START] =
  763. {
  764. .size = 0xFFFFFFFF,
  765. .type = HFI_CMD_SESSION_EVA_DLFL_FRAME,
  766. .is_config_pkt = false,
  767. .resp = HAL_NO_RESP,
  768. .name = "DLFL_FRAME",
  769. },
  770. [HFI_CMD_SESSION_EVA_DLFL_CONFIG - HFI_CMD_SESSION_CVP_START] =
  771. {
  772. .size = 0xFFFFFFFF,
  773. .type = HFI_CMD_SESSION_EVA_DLFL_CONFIG,
  774. .is_config_pkt = true,
  775. .resp = HAL_NO_RESP,
  776. .name = "DLFL_CONFIG",
  777. },
  778. [HFI_CMD_SESSION_CVP_SYNX - HFI_CMD_SESSION_CVP_START] =
  779. {
  780. .size = 0xFFFFFFFF,
  781. .type = HFI_CMD_SESSION_CVP_SYNX,
  782. .is_config_pkt = false,
  783. .resp = HAL_NO_RESP,
  784. .name = "SYNX_TEST",
  785. },
  786. };
  787. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  788. {
  789. if (!hdr || (hdr->packet_type < HFI_CMD_SESSION_CVP_START)
  790. || hdr->packet_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  791. return -EINVAL;
  792. if (cvp_hfi_defs[hdr->packet_type - HFI_CMD_SESSION_CVP_START].size)
  793. return (hdr->packet_type - HFI_CMD_SESSION_CVP_START);
  794. return -EINVAL;
  795. }
  796. int get_pkt_index_from_type(u32 pkt_type)
  797. {
  798. if ((pkt_type < HFI_CMD_SESSION_CVP_START) ||
  799. pkt_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  800. return -EINVAL;
  801. if (cvp_hfi_defs[pkt_type - HFI_CMD_SESSION_CVP_START].size)
  802. return (pkt_type - HFI_CMD_SESSION_CVP_START);
  803. return -EINVAL;
  804. }
  805. MODULE_DEVICE_TABLE(of, msm_cvp_dt_match);
  806. int cvp_of_fdt_get_ddrtype(void)
  807. {
  808. #ifdef FIXED_DDR_TYPE
  809. /* of_fdt_get_ddrtype() is usually unavailable during pre-sil */
  810. return DDR_TYPE_LPDDR5;
  811. #else
  812. return of_fdt_get_ddrtype();
  813. #endif
  814. }
  815. void *cvp_get_drv_data(struct device *dev)
  816. {
  817. struct msm_cvp_platform_data *driver_data;
  818. const struct of_device_id *match;
  819. uint32_t ddr_type = DDR_TYPE_LPDDR5;
  820. driver_data = &default_data;
  821. if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
  822. goto exit;
  823. match = of_match_node(msm_cvp_dt_match, dev->of_node);
  824. if (!match)
  825. return NULL;
  826. driver_data = (struct msm_cvp_platform_data *)match->data;
  827. if (!strcmp(match->compatible, "qcom,waipio-cvp")) {
  828. ddr_type = cvp_of_fdt_get_ddrtype();
  829. if (ddr_type == -ENOENT) {
  830. dprintk(CVP_ERR,
  831. "Failed to get ddr type, use LPDDR5\n");
  832. }
  833. if (driver_data->ubwc_config &&
  834. (ddr_type == DDR_TYPE_LPDDR4 ||
  835. ddr_type == DDR_TYPE_LPDDR4X))
  836. driver_data->ubwc_config->highest_bank_bit = 15;
  837. dprintk(CVP_CORE, "DDR Type 0x%x hbb 0x%x\n",
  838. ddr_type, driver_data->ubwc_config ?
  839. driver_data->ubwc_config->highest_bank_bit : -1);
  840. }
  841. exit:
  842. return driver_data;
  843. }