
Add CSID640 support. The following features support are added: - QCFA binning and BAYER binning support - Format measure support - Multi VC DT support - Add core_cfg support in in_port structure CRs-Fixed: 2887030 Change-Id: Idd7d081c985f3ef21e0fee7ce4c1b8db96ddd3c3 Signed-off-by: Wyes Karny <wkarny@codeaurora.org>
489 líneas
19 KiB
C
489 líneas
19 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
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/*
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* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef __UAPI_CAM_TFE_H__
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#define __UAPI_CAM_TFE_H__
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#include <media/cam_defs.h>
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#include <media/cam_isp_tfe.h>
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#include <media/cam_cpas.h>
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/* ISP TFE driver name */
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#define CAM_ISP_TFE_DEV_NAME "cam-isp"
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/* HW type */
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#define CAM_ISP_TFE_HW_BASE 0
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#define CAM_ISP_TFE_HW_CSID 1
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#define CAM_ISP_TFE_HW_TFE 2
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#define CAM_ISP_TFE_HW_MAX 3
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/* Color Pattern */
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#define CAM_ISP_TFE_PATTERN_BAYER_RGRGRG 0
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#define CAM_ISP_TFE_PATTERN_BAYER_GRGRGR 1
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#define CAM_ISP_TFE_PATTERN_BAYER_BGBGBG 2
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#define CAM_ISP_TFE_PATTERN_BAYER_GBGBGB 3
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#define CAM_ISP_TFE_PATTERN_YUV_YCBYCR 4
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#define CAM_ISP_TFE_PATTERN_YUV_YCRYCB 5
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#define CAM_ISP_TFE_PATTERN_YUV_CBYCRY 6
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#define CAM_ISP_TFE_PATTERN_YUV_CRYCBY 7
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#define CAM_ISP_TFE_PATTERN_MAX 8
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/* Usage Type */
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#define CAM_ISP_TFE_IN_RES_USAGE_SINGLE 0
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#define CAM_ISP_TFE_IN_RES_USAGE_DUAL 1
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#define CAM_ISP_TFE_IN_RES_USAGE_MAX 2
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/* Resource ID */
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#define CAM_ISP_TFE_RES_ID_PORT 0
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#define CAM_ISP_TFE_RES_ID_MAX 1
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/* Resource Type - Type of resource for the resource id
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* defined in cam_isp_tfe.h
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*/
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/* Lane Type in input resource for Port */
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#define CAM_ISP_TFE_IN_LANE_TYPE_DPHY 0
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#define CAM_ISP_TFE_IN_LANE_TYPE_CPHY 1
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#define CAM_ISP_TFE_IN_LANE_TYPE_MAX 2
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/* ISP TFE packet opcode */
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#define CAM_ISP_TFE_PACKET_OP_BASE 0
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#define CAM_ISP_TFE_PACKET_INIT_DEV 1
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#define CAM_ISP_TFE_PACKET_CONFIG_DEV 2
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#define CAM_ISP_TFE_PACKET_OP_MAX 3
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/* ISP TFE packet meta_data type for command buffer */
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#define CAM_ISP_TFE_PACKET_META_BASE 0
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#define CAM_ISP_TFE_PACKET_META_LEFT 1
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#define CAM_ISP_TFE_PACKET_META_RIGHT 2
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#define CAM_ISP_TFE_PACKET_META_COMMON 3
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#define CAM_ISP_TFE_PACKET_META_DUAL_CONFIG 4
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#define CAM_ISP_TFE_PACKET_META_GENERIC_BLOB_COMMON 5
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#define CAM_ISP_TFE_PACKET_META_REG_DUMP_PER_REQUEST 6
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#define CAM_ISP_TFE_PACKET_META_REG_DUMP_ON_FLUSH 7
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#define CAM_ISP_TFE_PACKET_META_REG_DUMP_ON_ERROR 8
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/* ISP TFE Generic Cmd Buffer Blob types */
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#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_HFR_CONFIG 0
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#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_CLOCK_CONFIG 1
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#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_BW_CONFIG_V2 2
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#define CAM_ISP_TFE_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG 3
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/* DSP mode */
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#define CAM_ISP_TFE_DSP_MODE_NONE 0
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#define CAM_ISP_TFE_DSP_MODE_ONE_WAY 1
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#define CAM_ISP_TFE_DSP_MODE_ROUND 2
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/* Per Path Usage Data */
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#define CAM_ISP_TFE_USAGE_INVALID 0
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#define CAM_ISP_TFE_USAGE_LEFT_PX 1
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#define CAM_ISP_TFE_USAGE_RIGHT_PX 2
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#define CAM_ISP_TFE_USAGE_RDI 3
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/* Bus write master modes */
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#define CAM_ISP_TFE_WM_FRAME_BASED_MODE 0
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#define CAM_ISP_TFE_WM_LINE_BASED_MODE 1
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#define CAM_ISP_TFE_WM_INDEX_BASED_MODE 2
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#define CAM_ISP_TFE_VC_DT_CFG 2
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/* Feature Flag indicators */
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#define CAM_ISP_TFE_FLAG_QCFA_BIN BIT(0)
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#define CAM_ISP_TFE_FLAG_BAYER_BIN BIT(1)
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/* Query devices */
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/**
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* struct cam_isp_tfe_dev_cap_info - A cap info for particular hw type
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*
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* @hw_type: Hardware type for the cap info
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* @reserved: reserved field for alignment
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* @hw_version: Hardware version
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*
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*/
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struct cam_isp_tfe_dev_cap_info {
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__u32 hw_type;
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__u32 reserved;
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struct cam_hw_version hw_version;
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};
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/**
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* struct cam_isp_tfe_query_cap_cmd - ISP TFE query device
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* capability payload
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*
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* @device_iommu: returned iommu handles for device
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* @cdm_iommu: returned iommu handles for cdm
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* @num_dev: returned number of device capabilities
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* @reserved: reserved field for alignment
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* @dev_caps: returned device capability array
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*
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*/
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struct cam_isp_tfe_query_cap_cmd {
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struct cam_iommu_handle device_iommu;
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struct cam_iommu_handle cdm_iommu;
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__s32 num_dev;
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__u32 reserved;
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struct cam_isp_tfe_dev_cap_info dev_caps[CAM_ISP_TFE_HW_MAX];
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};
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/* Acquire Device */
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/**
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* struct cam_isp_tfe_out_port_info - An output port resource info
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*
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* @res_id: output resource id defined in file
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* cam_isp_tfe.h
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* @format: output format of the resource
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* @width: output width in pixels
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* @height: output height in lines
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* @stride: output stride
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* @comp_grp_id: composite group id for the resource.
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* @secure_mode: flag to tell if output should be run in secure
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* mode or not. See cam_defs.h for definition
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* @wm_mode: wm mode
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* @reserved: reserved field for alignment
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*
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*/
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struct cam_isp_tfe_out_port_info {
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__u32 res_id;
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__u32 format;
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__u32 width;
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__u32 height;
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__u32 stride;
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__u32 comp_grp_id;
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__u32 secure_mode;
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__u32 wm_mode;
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__u32 reserved;
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};
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/**
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* struct cam_isp_tfe_in_port_info - An input port resource info
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*
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* @res_id: input resource id CAM_ISP_TFE_IN_RES_XXX
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* @lane_type: lane type: c-phy or d-phy.
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* @lane_num: active lane number
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* @lane_cfg: lane configurations: 4 bits per lane
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* @vc: input virtual channel number
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* @dt: input data type number
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* @format: input format
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* @pix_pattern: pixel pattern
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* @usage_type: whether dual tfe is required
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* @left_start: left input start offset in pixels
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* @left_end: left input stop offset in pixels
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* @left_width: left input width in pixels
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* @right_start: right input start offset in pixels.
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* Only for Dual TFE
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* @right_end: right input stop offset in
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* pixels. Only for Dual TFE
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* @right_width: right input width in pixels.
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* Only for dual TFE
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* @line_start: top of the line number
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* @line_stop: bottome of the line number
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* @height: input height in lines
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* @batch_size: batch size for HFR mode
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* @dsp_mode: DSP stream mode(Defines as
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* CAM_ISP_TFE_DSP_MODE_*)
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* @sensor_width: sensor width
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* @sensor_height: sensor height
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* @hbi_value: sensor HBI value
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* @vbi_value: sensor VBI value
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* @sensor_fps: sensor fps
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* @init_frame_drop init frame drop value.
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* @num_out_res: number of the output resource associated
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* @data: payload that contains the output resources,
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* array of cam_isp_tfe_out_port_info data
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*
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*/
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struct cam_isp_tfe_in_port_info {
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__u32 res_id;
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__u32 lane_type;
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__u32 lane_num;
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__u32 lane_cfg;
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__u32 vc;
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__u32 dt;
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__u32 format;
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__u32 pix_pattern;
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__u32 usage_type;
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__u32 left_start;
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__u32 left_end;
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__u32 left_width;
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__u32 right_start;
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__u32 right_end;
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__u32 right_width;
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__u32 line_start;
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__u32 line_end;
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__u32 height;
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__u32 batch_size;
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__u32 dsp_mode;
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__u32 sensor_width;
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__u32 sensor_height;
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__u32 sensor_hbi;
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__u32 sensor_vbi;
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__u32 sensor_fps;
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__u32 init_frame_drop;
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__u32 num_out_res;
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struct cam_isp_tfe_out_port_info data[1];
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};
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/**
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* struct cam_isp_tfe_in_port_info_v2 - An input port resource info
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*
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* @res_id: input resource id CAM_ISP_TFE_IN_RES_XXX
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* @lane_type: lane type: c-phy or d-phy.
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* @lane_num: active lane number
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* @lane_cfg: lane configurations: 4 bits per lane
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* @vc: input virtual channel number
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* @dt: input data type number
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* @format: input format
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* @pix_pattern: pixel pattern
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* @usage_type: whether dual tfe is required
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* @left_start: left input start offset in pixels
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* @left_end: left input stop offset in pixels
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* @left_width: left input width in pixels
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* @right_start: right input start offset in pixels.
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* Only for Dual TFE
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* @right_end: right input stop offset in
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* pixels. Only for Dual TFE
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* @right_width: right input width in pixels.
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* Only for dual TFE
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* @line_start: top of the line number
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* @line_stop: bottome of the line number
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* @height: input height in lines
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* @batch_size: batch size for HFR mode
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* @dsp_mode: DSP stream mode(Defines as
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* CAM_ISP_TFE_DSP_MODE_*)
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* @sensor_width: sensor width
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* @sensor_height: sensor height
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* @sensor_hbi: sensor HBI value
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* @sensor_vbi: sensor VBI value
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* @sensor_fps: sensor fps
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* @init_frame_drop init frame drop value.
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* @num_out_res: number of the output resource associated
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* @feature_flag: Feature flags for indicating QCFA, Bayer bin
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* @core_cfg: Core configuration
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* @reserve_field_1: Reserve field 1
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* @reserve_field_2: Reserve field 2
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* @reserve_field_3: Reserve field 3
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* @reserve_field_4: Reserve field 4
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* @reserve_field_5: Reserve field 5
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* @reserve_field_6: Reserve filed 6
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* @data: payload that contains the output resources,
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* array of cam_isp_tfe_out_port_info data
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*
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*/
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struct cam_isp_tfe_in_port_info_v2 {
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__u32 res_id;
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__u32 lane_type;
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__u32 lane_num;
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__u32 lane_cfg;
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__u32 vc[CAM_ISP_TFE_VC_DT_CFG];
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__u32 dt[CAM_ISP_TFE_VC_DT_CFG];
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__u32 num_valid_vc_dt;
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__u32 format;
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__u32 pix_pattern;
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__u32 usage_type;
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__u32 left_start;
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__u32 left_end;
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__u32 left_width;
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__u32 right_start;
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__u32 right_end;
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__u32 right_width;
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__u32 line_start;
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__u32 line_end;
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__u32 height;
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__u32 batch_size;
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__u32 dsp_mode;
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__u32 sensor_width;
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__u32 sensor_height;
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__u32 sensor_hbi;
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__u32 sensor_vbi;
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__u32 sensor_fps;
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__u32 init_frame_drop;
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__u32 num_out_res;
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__u32 feature_flag;
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__u32 core_cfg;
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__u32 reserve_field_1;
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__u32 reserve_field_2;
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__u32 reserve_field_3;
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__u32 reserve_field_4;
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__u32 reserve_field_5;
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__u32 reserve_field_6;
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struct cam_isp_tfe_out_port_info data[1];
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};
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/**
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* struct cam_isp_tfe_resource - A resource bundle
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*
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* @resoruce_id: resource id for the resource bundle
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* @length: length of the while resource blob
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* @handle_type: type of the resource handle
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* @reserved: reserved field for alignment
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* @res_hdl: resource handle that points to the
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* resource array
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*
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*/
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struct cam_isp_tfe_resource {
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__u32 resource_id;
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__u32 length;
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__u32 handle_type;
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__u32 reserved;
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__u64 res_hdl;
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};
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/**
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* struct cam_isp_tfe_port_hfr_config - HFR configuration for
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* this port
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*
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* @resource_type: Resource type
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* @subsample_pattern: Subsample pattern. Used in HFR mode. It
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* should be consistent with batchSize and
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* CAMIF programming.
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* @subsample_period: Subsample period. Used in HFR mode. It
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* should be consistent with batchSize and
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* CAMIF programming.
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* @framedrop_pattern: Framedrop pattern
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* @framedrop_period: Framedrop period
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* @reserved: Reserved for alignment
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*/
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struct cam_isp_tfe_port_hfr_config {
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__u32 resource_type;
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__u32 subsample_pattern;
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__u32 subsample_period;
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__u32 framedrop_pattern;
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__u32 framedrop_period;
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__u32 reserved;
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} __attribute__((packed));
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/**
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* struct cam_isp_tfe_resource_hfr_config - Resource HFR
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* configuration
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*
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* @num_ports: Number of ports
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* @reserved: Reserved for alignment
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* @port_hfr_config: HFR configuration for each IO port
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*/
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struct cam_isp_tfe_resource_hfr_config {
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__u32 num_ports;
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__u32 reserved;
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struct cam_isp_tfe_port_hfr_config port_hfr_config[1];
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} __attribute__((packed));
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/**
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* struct cam_isp_tfe_dual_stripe_config - stripe config per bus
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* client
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*
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* @offset: Start horizontal offset relative to
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* output buffer
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* @width: Width of the stripe in pixels
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* @port_id: Port id of ISP TFE output
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* @reserved: Reserved for alignment
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*
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*/
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struct cam_isp_tfe_dual_stripe_config {
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__u32 offset;
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__u32 width;
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__u32 port_id;
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__u32 reserved;
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};
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/**
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* struct cam_isp_tfe_dual_config - dual isp configuration
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*
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* @num_ports Number of isp output ports
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* @reserved Reserved field for alignment
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* @stripes: Stripe information
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*
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*/
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struct cam_isp_tfe_dual_config {
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__u32 num_ports;
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__u32 reserved;
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struct cam_isp_tfe_dual_stripe_config stripes[1];
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} __attribute__((packed));
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/**
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* struct cam_isp_tfe_clock_config - Clock configuration
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*
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* @usage_type: Usage type (Single/Dual)
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* @num_rdi: Number of RDI votes
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* @left_pix_hz: Pixel Clock for Left ISP
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* @right_pix_hz: Pixel Clock for Right ISP
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* valid only if Dual
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* @rdi_hz: RDI Clock. ISP TFE clock will be
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* max of RDI and PIX clocks. For a
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* particular context which ISP TFE
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* HW the RDI is allocated to is
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* not known to UMD. Hence pass the
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* clock and let KMD decide.
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*/
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struct cam_isp_tfe_clock_config {
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__u32 usage_type;
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__u32 num_rdi;
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__u64 left_pix_hz;
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__u64 right_pix_hz;
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__u64 rdi_hz[1];
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} __attribute__((packed));
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/**
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* struct cam_isp_tfe_csid_clock_config - CSID clock
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* configuration
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*
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* @csid_clock CSID clock
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* @csi_phy_clock Phy clock valid if tpg is selected
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*/
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struct cam_isp_tfe_csid_clock_config {
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__u64 csid_clock;
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__u64 phy_clock;
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} __attribute__((packed));
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/**
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* struct cam_isp_tfe_bw_config_v2 - Bandwidth configuration
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*
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* @usage_type: Usage type (Single/Dual)
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* @num_paths: Number of axi data paths
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* @axi_path Per path vote info
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*/
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struct cam_isp_tfe_bw_config_v2 {
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__u32 usage_type;
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__u32 num_paths;
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struct cam_axi_per_path_bw_vote axi_path[1];
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} __attribute__((packed));
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/**
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* struct cam_isp_acquire_hw_info - ISP TFE acquire HW params
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*
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* @common_info_version : Version of common info struct used
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* @common_info_size : Size of common info struct used
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* @common_info_offset : Offset of common info from start of data
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* @num_inputs : Number of inputs
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* @input_info_version : Version of input info struct used
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* @input_info_size : Size of input info struct used
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* @input_info_offset : Offset of input info from start of data
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* @data : Data pointer to point the cam_isp_tfe_in_port_info
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* structure
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*/
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struct cam_isp_tfe_acquire_hw_info {
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__u16 common_info_version;
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__u16 common_info_size;
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__u32 common_info_offset;
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__u32 num_inputs;
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__u32 input_info_version;
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__u32 input_info_size;
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__u32 input_info_offset;
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__u64 data;
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};
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#define CAM_TFE_ACQUIRE_COMMON_VER0 0x1000
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#define CAM_TFE_ACQUIRE_COMMON_SIZE_VER0 0x0
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#define CAM_TFE_ACQUIRE_INPUT_VER0 0x2000
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#define CAM_TFE_ACQUIRE_INPUT_SIZE_VER0 sizeof(struct cam_isp_tfe_in_port_info)
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#define CAM_TFE_ACQUIRE_OUT_VER0 0x3000
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#define CAM_TFE_ACQUIRE_OUT_SIZE_VER0 sizeof(struct cam_isp_tfe_out_port_info)
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#endif /* __UAPI_CAM_TFE_H__ */
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