dp_main.c 54 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include "../../wlan_cfg/wlan_cfg.h"
  31. #include <cdp_txrx_handle.h>
  32. #define DP_INTR_POLL_TIMER_MS 100
  33. /**
  34. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  35. */
  36. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  37. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  38. {
  39. void *hal_soc = soc->hal_soc;
  40. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  41. /* TODO: See if we should get align size from hal */
  42. uint32_t ring_base_align = 8;
  43. struct hal_srng_params ring_params;
  44. srng->hal_srng = NULL;
  45. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  46. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  47. soc->osdev, soc->osdev->dev, srng->alloc_size,
  48. &(srng->base_paddr_unaligned));
  49. if (!srng->base_vaddr_unaligned) {
  50. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  51. FL("alloc failed - ring_type: %d, ring_num %d"),
  52. ring_type, ring_num);
  53. return QDF_STATUS_E_NOMEM;
  54. }
  55. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  56. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  57. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  58. ((unsigned long)(ring_params.ring_base_vaddr) -
  59. (unsigned long)srng->base_vaddr_unaligned);
  60. ring_params.num_entries = num_entries;
  61. /* TODO: Check MSI support and get MSI settings from HIF layer */
  62. ring_params.msi_data = 0;
  63. ring_params.msi_addr = 0;
  64. /* TODO: Setup interrupt timer and batch counter thresholds for
  65. * interrupt mitigation based on ring type
  66. */
  67. ring_params.intr_timer_thres_us = 8;
  68. ring_params.intr_batch_cntr_thres_entries = 1;
  69. /* TODO: Currently hal layer takes care of endianness related settings.
  70. * See if these settings need to passed from DP layer
  71. */
  72. ring_params.flags = 0;
  73. /* Enable low threshold interrupts for rx buffer rings (regular and
  74. * monitor buffer rings.
  75. * TODO: See if this is required for any other ring
  76. */
  77. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  78. /* TODO: Setting low threshold to 1/8th of ring size
  79. * see if this needs to be configurable
  80. */
  81. ring_params.low_threshold = num_entries >> 3;
  82. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  83. }
  84. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  85. mac_id, &ring_params);
  86. return 0;
  87. }
  88. /**
  89. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  90. * Any buffers allocated and attached to ring entries are expected to be freed
  91. * before calling this function.
  92. */
  93. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  94. int ring_type, int ring_num)
  95. {
  96. if (!srng->hal_srng) {
  97. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  98. FL("Ring type: %d, num:%d not setup"),
  99. ring_type, ring_num);
  100. return;
  101. }
  102. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  103. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  104. srng->alloc_size,
  105. srng->base_vaddr_unaligned,
  106. srng->base_paddr_unaligned, 0);
  107. }
  108. /* TODO: Need this interface from HIF */
  109. void *hif_get_hal_handle(void *hif_handle);
  110. /*
  111. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  112. * @dp_ctx: DP SOC handle
  113. * @budget: Number of frames/descriptors that can be processed in one shot
  114. *
  115. * Return: remaining budget/quota for the soc device
  116. */
  117. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  118. {
  119. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  120. struct dp_soc *soc = int_ctx->soc;
  121. int ring = 0;
  122. uint32_t work_done = 0;
  123. uint32_t budget = dp_budget;
  124. uint8_t tx_mask = int_ctx->tx_ring_mask;
  125. uint8_t rx_mask = int_ctx->rx_ring_mask;
  126. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  127. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  128. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  129. /* Process Tx completion interrupts first to return back buffers */
  130. if (tx_mask) {
  131. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  132. if (tx_mask & (1 << ring)) {
  133. work_done =
  134. dp_tx_comp_handler(soc, ring, budget);
  135. budget -= work_done;
  136. if (work_done)
  137. QDF_TRACE(QDF_MODULE_ID_DP,
  138. QDF_TRACE_LEVEL_INFO,
  139. "tx mask 0x%x ring %d,"
  140. "budget %d",
  141. tx_mask, ring, budget);
  142. if (budget <= 0)
  143. goto budget_done;
  144. }
  145. }
  146. }
  147. /* Process REO Exception ring interrupt */
  148. if (rx_err_mask) {
  149. work_done = dp_rx_err_process(soc,
  150. soc->reo_exception_ring.hal_srng, budget);
  151. budget -= work_done;
  152. if (work_done)
  153. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  154. "REO Exception Ring: work_done %d budget %d",
  155. work_done, budget);
  156. if (budget <= 0) {
  157. goto budget_done;
  158. }
  159. }
  160. /* Process Rx WBM release ring interrupt */
  161. if (rx_wbm_rel_mask) {
  162. work_done = dp_rx_wbm_err_process(soc,
  163. soc->rx_rel_ring.hal_srng, budget);
  164. budget -= work_done;
  165. if (work_done)
  166. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  167. "WBM Release Ring: work_done %d budget %d",
  168. work_done, budget);
  169. if (budget <= 0) {
  170. goto budget_done;
  171. }
  172. }
  173. /* Process Rx interrupts */
  174. if (rx_mask) {
  175. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  176. if (rx_mask & (1 << ring)) {
  177. work_done =
  178. dp_rx_process(soc,
  179. soc->reo_dest_ring[ring].hal_srng,
  180. budget);
  181. budget -= work_done;
  182. if (work_done)
  183. QDF_TRACE(QDF_MODULE_ID_DP,
  184. QDF_TRACE_LEVEL_INFO,
  185. "rx mask 0x%x ring %d,"
  186. "budget %d",
  187. tx_mask, ring, budget);
  188. if (budget <= 0)
  189. goto budget_done;
  190. }
  191. }
  192. }
  193. if (reo_status_mask)
  194. dp_reo_status_ring_handler(soc);
  195. budget_done:
  196. return dp_budget - budget;
  197. }
  198. /* dp_interrupt_timer()- timer poll for interrupts
  199. *
  200. * @arg: SoC Handle
  201. *
  202. * Return:
  203. *
  204. */
  205. #ifdef DP_INTR_POLL_BASED
  206. static void dp_interrupt_timer(void *arg)
  207. {
  208. struct dp_soc *soc = (struct dp_soc *) arg;
  209. int i;
  210. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  211. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  212. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  213. }
  214. /*
  215. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  216. * @txrx_soc: DP SOC handle
  217. *
  218. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  219. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  220. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  221. *
  222. * Return: 0 for success. nonzero for failure.
  223. */
  224. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  225. {
  226. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  227. int i;
  228. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  229. soc->intr_ctx[i].tx_ring_mask = 0xF;
  230. soc->intr_ctx[i].rx_ring_mask = 0xF;
  231. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  232. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  233. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  234. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  235. soc->intr_ctx[i].soc = soc;
  236. }
  237. qdf_timer_init(soc->osdev, &soc->int_timer,
  238. dp_interrupt_timer, (void *)soc,
  239. QDF_TIMER_TYPE_WAKE_APPS);
  240. return QDF_STATUS_SUCCESS;
  241. }
  242. /*
  243. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  244. * @txrx_soc: DP SOC handle
  245. *
  246. * Return: void
  247. */
  248. static void dp_soc_interrupt_detach(void *txrx_soc)
  249. {
  250. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  251. qdf_timer_stop(&soc->int_timer);
  252. qdf_timer_free(&soc->int_timer);
  253. }
  254. #else
  255. /*
  256. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  257. * @txrx_soc: DP SOC handle
  258. *
  259. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  260. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  261. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  262. *
  263. * Return: 0 for success. nonzero for failure.
  264. */
  265. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  266. {
  267. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  268. int i = 0;
  269. int num_irq = 0;
  270. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  271. int j = 0;
  272. int ret = 0;
  273. /* Map of IRQ ids registered with one interrupt context */
  274. int irq_id_map[HIF_MAX_GRP_IRQ];
  275. int tx_mask =
  276. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  277. int rx_mask =
  278. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  279. int rx_mon_mask =
  280. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  281. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  282. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  283. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  284. soc->intr_ctx[i].soc = soc;
  285. num_irq = 0;
  286. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  287. if (tx_mask & (1 << j)) {
  288. irq_id_map[num_irq++] =
  289. (wbm2host_tx_completions_ring1 - j);
  290. }
  291. if (rx_mask & (1 << j)) {
  292. irq_id_map[num_irq++] =
  293. (reo2host_destination_ring1 - j);
  294. }
  295. if (rx_mon_mask & (1 << j)) {
  296. irq_id_map[num_irq++] =
  297. (rxdma2host_monitor_destination_mac1
  298. - j);
  299. }
  300. }
  301. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  302. num_irq, irq_id_map,
  303. dp_service_srngs,
  304. &soc->intr_ctx[i]);
  305. if (ret) {
  306. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  307. FL("failed, ret = %d"), ret);
  308. return QDF_STATUS_E_FAILURE;
  309. }
  310. }
  311. return QDF_STATUS_SUCCESS;
  312. }
  313. /*
  314. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  315. * @txrx_soc: DP SOC handle
  316. *
  317. * Return: void
  318. */
  319. static void dp_soc_interrupt_detach(void *txrx_soc)
  320. {
  321. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  322. int i;
  323. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  324. soc->intr_ctx[i].tx_ring_mask = 0;
  325. soc->intr_ctx[i].rx_ring_mask = 0;
  326. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  327. }
  328. }
  329. #endif
  330. #define AVG_MAX_MPDUS_PER_TID 128
  331. #define AVG_TIDS_PER_CLIENT 2
  332. #define AVG_FLOWS_PER_TID 2
  333. #define AVG_MSDUS_PER_FLOW 128
  334. #define AVG_MSDUS_PER_MPDU 4
  335. /*
  336. * Allocate and setup link descriptor pool that will be used by HW for
  337. * various link and queue descriptors and managed by WBM
  338. */
  339. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  340. {
  341. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  342. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  343. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  344. uint32_t num_mpdus_per_link_desc =
  345. hal_num_mpdus_per_link_desc(soc->hal_soc);
  346. uint32_t num_msdus_per_link_desc =
  347. hal_num_msdus_per_link_desc(soc->hal_soc);
  348. uint32_t num_mpdu_links_per_queue_desc =
  349. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  350. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  351. uint32_t total_link_descs, total_mem_size;
  352. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  353. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  354. uint32_t num_link_desc_banks;
  355. uint32_t last_bank_size = 0;
  356. uint32_t entry_size, num_entries;
  357. int i;
  358. /* Only Tx queue descriptors are allocated from common link descriptor
  359. * pool Rx queue descriptors are not included in this because (REO queue
  360. * extension descriptors) they are expected to be allocated contiguously
  361. * with REO queue descriptors
  362. */
  363. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  364. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  365. num_mpdu_queue_descs = num_mpdu_link_descs /
  366. num_mpdu_links_per_queue_desc;
  367. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  368. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  369. num_msdus_per_link_desc;
  370. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  371. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  372. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  373. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  374. /* Round up to power of 2 */
  375. total_link_descs = 1;
  376. while (total_link_descs < num_entries)
  377. total_link_descs <<= 1;
  378. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  379. FL("total_link_descs: %u, link_desc_size: %d"),
  380. total_link_descs, link_desc_size);
  381. total_mem_size = total_link_descs * link_desc_size;
  382. total_mem_size += link_desc_align;
  383. if (total_mem_size <= max_alloc_size) {
  384. num_link_desc_banks = 0;
  385. last_bank_size = total_mem_size;
  386. } else {
  387. num_link_desc_banks = (total_mem_size) /
  388. (max_alloc_size - link_desc_align);
  389. last_bank_size = total_mem_size %
  390. (max_alloc_size - link_desc_align);
  391. }
  392. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  393. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  394. total_mem_size, num_link_desc_banks);
  395. for (i = 0; i < num_link_desc_banks; i++) {
  396. soc->link_desc_banks[i].base_vaddr_unaligned =
  397. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  398. max_alloc_size,
  399. &(soc->link_desc_banks[i].base_paddr_unaligned));
  400. soc->link_desc_banks[i].size = max_alloc_size;
  401. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  402. soc->link_desc_banks[i].base_vaddr_unaligned) +
  403. ((unsigned long)(
  404. soc->link_desc_banks[i].base_vaddr_unaligned) %
  405. link_desc_align));
  406. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  407. soc->link_desc_banks[i].base_paddr_unaligned) +
  408. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  409. (unsigned long)(
  410. soc->link_desc_banks[i].base_vaddr_unaligned));
  411. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  412. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  413. FL("Link descriptor memory alloc failed"));
  414. goto fail;
  415. }
  416. }
  417. if (last_bank_size) {
  418. /* Allocate last bank in case total memory required is not exact
  419. * multiple of max_alloc_size
  420. */
  421. soc->link_desc_banks[i].base_vaddr_unaligned =
  422. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  423. last_bank_size,
  424. &(soc->link_desc_banks[i].base_paddr_unaligned));
  425. soc->link_desc_banks[i].size = last_bank_size;
  426. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  427. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  428. ((unsigned long)(
  429. soc->link_desc_banks[i].base_vaddr_unaligned) %
  430. link_desc_align));
  431. soc->link_desc_banks[i].base_paddr =
  432. (unsigned long)(
  433. soc->link_desc_banks[i].base_paddr_unaligned) +
  434. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  435. (unsigned long)(
  436. soc->link_desc_banks[i].base_vaddr_unaligned));
  437. }
  438. /* Allocate and setup link descriptor idle list for HW internal use */
  439. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  440. total_mem_size = entry_size * total_link_descs;
  441. if (total_mem_size <= max_alloc_size) {
  442. void *desc;
  443. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  444. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  445. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  446. FL("Link desc idle ring setup failed"));
  447. goto fail;
  448. }
  449. hal_srng_access_start_unlocked(soc->hal_soc,
  450. soc->wbm_idle_link_ring.hal_srng);
  451. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  452. soc->link_desc_banks[i].base_paddr; i++) {
  453. uint32_t num_entries = (soc->link_desc_banks[i].size -
  454. (unsigned long)(
  455. soc->link_desc_banks[i].base_vaddr) -
  456. (unsigned long)(
  457. soc->link_desc_banks[i].base_vaddr_unaligned))
  458. / link_desc_size;
  459. unsigned long paddr = (unsigned long)(
  460. soc->link_desc_banks[i].base_paddr);
  461. while (num_entries && (desc = hal_srng_src_get_next(
  462. soc->hal_soc,
  463. soc->wbm_idle_link_ring.hal_srng))) {
  464. hal_set_link_desc_addr(desc, i, paddr);
  465. num_entries--;
  466. paddr += link_desc_size;
  467. }
  468. }
  469. hal_srng_access_end_unlocked(soc->hal_soc,
  470. soc->wbm_idle_link_ring.hal_srng);
  471. } else {
  472. uint32_t num_scatter_bufs;
  473. uint32_t num_entries_per_buf;
  474. uint32_t rem_entries;
  475. uint8_t *scatter_buf_ptr;
  476. uint16_t scatter_buf_num;
  477. soc->wbm_idle_scatter_buf_size =
  478. hal_idle_list_scatter_buf_size(soc->hal_soc);
  479. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  480. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  481. num_scatter_bufs = (total_mem_size /
  482. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  483. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  484. for (i = 0; i < num_scatter_bufs; i++) {
  485. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  486. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  487. soc->wbm_idle_scatter_buf_size,
  488. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  489. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  490. QDF_TRACE(QDF_MODULE_ID_DP,
  491. QDF_TRACE_LEVEL_ERROR,
  492. FL("Scatter list memory alloc failed"));
  493. goto fail;
  494. }
  495. }
  496. /* Populate idle list scatter buffers with link descriptor
  497. * pointers
  498. */
  499. scatter_buf_num = 0;
  500. scatter_buf_ptr = (uint8_t *)(
  501. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  502. rem_entries = num_entries_per_buf;
  503. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  504. soc->link_desc_banks[i].base_paddr; i++) {
  505. uint32_t num_link_descs =
  506. (soc->link_desc_banks[i].size -
  507. (unsigned long)(
  508. soc->link_desc_banks[i].base_vaddr) -
  509. (unsigned long)(
  510. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  511. link_desc_size;
  512. unsigned long paddr = (unsigned long)(
  513. soc->link_desc_banks[i].base_paddr);
  514. void *desc = NULL;
  515. while (num_link_descs && (desc =
  516. hal_srng_src_get_next(soc->hal_soc,
  517. soc->wbm_idle_link_ring.hal_srng))) {
  518. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  519. i, paddr);
  520. num_link_descs--;
  521. paddr += link_desc_size;
  522. if (rem_entries) {
  523. rem_entries--;
  524. scatter_buf_ptr += link_desc_size;
  525. } else {
  526. rem_entries = num_entries_per_buf;
  527. scatter_buf_num++;
  528. scatter_buf_ptr = (uint8_t *)(
  529. soc->wbm_idle_scatter_buf_base_vaddr[
  530. scatter_buf_num]);
  531. }
  532. }
  533. }
  534. /* Setup link descriptor idle list in HW */
  535. hal_setup_link_idle_list(soc->hal_soc,
  536. soc->wbm_idle_scatter_buf_base_paddr,
  537. soc->wbm_idle_scatter_buf_base_vaddr,
  538. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  539. (uint32_t)(scatter_buf_ptr -
  540. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  541. scatter_buf_num])));
  542. }
  543. return 0;
  544. fail:
  545. if (soc->wbm_idle_link_ring.hal_srng) {
  546. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  547. WBM_IDLE_LINK, 0);
  548. }
  549. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  550. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  551. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  552. soc->wbm_idle_scatter_buf_size,
  553. soc->wbm_idle_scatter_buf_base_vaddr[i],
  554. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  555. }
  556. }
  557. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  558. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  559. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  560. soc->link_desc_banks[i].size,
  561. soc->link_desc_banks[i].base_vaddr_unaligned,
  562. soc->link_desc_banks[i].base_paddr_unaligned,
  563. 0);
  564. }
  565. }
  566. return QDF_STATUS_E_FAILURE;
  567. }
  568. #ifdef notused
  569. /*
  570. * Free link descriptor pool that was setup HW
  571. */
  572. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  573. {
  574. int i;
  575. if (soc->wbm_idle_link_ring.hal_srng) {
  576. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  577. WBM_IDLE_LINK, 0);
  578. }
  579. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  580. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  581. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  582. soc->wbm_idle_scatter_buf_size,
  583. soc->wbm_idle_scatter_buf_base_vaddr[i],
  584. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  585. }
  586. }
  587. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  588. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  589. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  590. soc->link_desc_banks[i].size,
  591. soc->link_desc_banks[i].base_vaddr_unaligned,
  592. soc->link_desc_banks[i].base_paddr_unaligned,
  593. 0);
  594. }
  595. }
  596. }
  597. #endif /* notused */
  598. /* TODO: Following should be configurable */
  599. #define WBM_RELEASE_RING_SIZE 64
  600. #define TCL_DATA_RING_SIZE 512
  601. #define TCL_CMD_RING_SIZE 32
  602. #define TCL_STATUS_RING_SIZE 32
  603. #define REO_DST_RING_SIZE 2048
  604. #define REO_REINJECT_RING_SIZE 32
  605. #define RX_RELEASE_RING_SIZE 256
  606. #define REO_EXCEPTION_RING_SIZE 128
  607. #define REO_CMD_RING_SIZE 32
  608. #define REO_STATUS_RING_SIZE 32
  609. #define RXDMA_BUF_RING_SIZE 1024
  610. #define RXDMA_REFILL_RING_SIZE 2048
  611. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  612. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  613. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  614. /*
  615. * dp_soc_cmn_setup() - Common SoC level initializion
  616. * @soc: Datapath SOC handle
  617. *
  618. * This is an internal function used to setup common SOC data structures,
  619. * to be called from PDEV attach after receiving HW mode capabilities from FW
  620. */
  621. static int dp_soc_cmn_setup(struct dp_soc *soc)
  622. {
  623. int i;
  624. if (soc->cmn_init_done)
  625. return 0;
  626. if (dp_peer_find_attach(soc))
  627. goto fail0;
  628. if (dp_hw_link_desc_pool_setup(soc))
  629. goto fail1;
  630. /* Setup SRNG rings */
  631. /* Common rings */
  632. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  633. WBM_RELEASE_RING_SIZE)) {
  634. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  635. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  636. goto fail1;
  637. }
  638. soc->num_tcl_data_rings = 0;
  639. /* Tx data rings */
  640. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  641. soc->num_tcl_data_rings =
  642. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  643. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  644. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  645. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  646. QDF_TRACE(QDF_MODULE_ID_DP,
  647. QDF_TRACE_LEVEL_ERROR,
  648. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  649. goto fail1;
  650. }
  651. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  652. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  653. QDF_TRACE(QDF_MODULE_ID_DP,
  654. QDF_TRACE_LEVEL_ERROR,
  655. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  656. goto fail1;
  657. }
  658. }
  659. } else {
  660. /* This will be incremented during per pdev ring setup */
  661. soc->num_tcl_data_rings = 0;
  662. }
  663. if (dp_tx_soc_attach(soc)) {
  664. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  665. FL("dp_tx_soc_attach failed"));
  666. goto fail1;
  667. }
  668. /* TCL command and status rings */
  669. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  670. TCL_CMD_RING_SIZE)) {
  671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  672. FL("dp_srng_setup failed for tcl_cmd_ring"));
  673. goto fail1;
  674. }
  675. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  676. TCL_STATUS_RING_SIZE)) {
  677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  678. FL("dp_srng_setup failed for tcl_status_ring"));
  679. goto fail1;
  680. }
  681. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  682. * descriptors
  683. */
  684. /* Rx data rings */
  685. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  686. soc->num_reo_dest_rings =
  687. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  688. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  689. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  690. i, 0, REO_DST_RING_SIZE)) {
  691. QDF_TRACE(QDF_MODULE_ID_DP,
  692. QDF_TRACE_LEVEL_ERROR,
  693. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  694. goto fail1;
  695. }
  696. }
  697. } else {
  698. /* This will be incremented during per pdev ring setup */
  699. soc->num_reo_dest_rings = 0;
  700. }
  701. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  702. /* REO reinjection ring */
  703. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  704. REO_REINJECT_RING_SIZE)) {
  705. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  706. FL("dp_srng_setup failed for reo_reinject_ring"));
  707. goto fail1;
  708. }
  709. /* Rx release ring */
  710. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  711. RX_RELEASE_RING_SIZE)) {
  712. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  713. FL("dp_srng_setup failed for rx_rel_ring"));
  714. goto fail1;
  715. }
  716. /* Rx exception ring */
  717. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  718. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  719. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  720. FL("dp_srng_setup failed for reo_exception_ring"));
  721. goto fail1;
  722. }
  723. /* REO command and status rings */
  724. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  725. REO_CMD_RING_SIZE)) {
  726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  727. FL("dp_srng_setup failed for reo_cmd_ring"));
  728. goto fail1;
  729. }
  730. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  731. TAILQ_INIT(&soc->rx.reo_cmd_list);
  732. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  733. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  734. REO_STATUS_RING_SIZE)) {
  735. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  736. FL("dp_srng_setup failed for reo_status_ring"));
  737. goto fail1;
  738. }
  739. dp_soc_interrupt_attach(soc);
  740. /* Setup HW REO */
  741. hal_reo_setup(soc->hal_soc);
  742. soc->cmn_init_done = 1;
  743. return 0;
  744. fail1:
  745. /*
  746. * Cleanup will be done as part of soc_detach, which will
  747. * be called on pdev attach failure
  748. */
  749. fail0:
  750. return QDF_STATUS_E_FAILURE;
  751. }
  752. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  753. /*
  754. * dp_rxdma_ring_setup() - configure the RX DMA rings
  755. * @soc: data path SoC handle
  756. * @pdev: Physical device handle
  757. *
  758. * Return: 0 - success, > 0 - failure
  759. */
  760. #ifdef QCA_HOST2FW_RXBUF_RING
  761. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  762. struct dp_pdev *pdev)
  763. {
  764. int max_mac_rings =
  765. wlan_cfg_get_num_mac_rings
  766. (pdev->wlan_cfg_ctx);
  767. int i;
  768. for (i = 0; i < max_mac_rings; i++) {
  769. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  770. "%s: pdev_id %d mac_id %d\n",
  771. __func__, pdev->pdev_id, i);
  772. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  773. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  774. QDF_TRACE(QDF_MODULE_ID_DP,
  775. QDF_TRACE_LEVEL_ERROR,
  776. FL("failed rx mac ring setup"));
  777. return QDF_STATUS_E_FAILURE;
  778. }
  779. }
  780. return QDF_STATUS_SUCCESS;
  781. }
  782. #else
  783. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  784. struct dp_pdev *pdev)
  785. {
  786. return QDF_STATUS_SUCCESS;
  787. }
  788. #endif
  789. /*
  790. * dp_pdev_attach_wifi3() - attach txrx pdev
  791. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  792. * @txrx_soc: Datapath SOC handle
  793. * @htc_handle: HTC handle for host-target interface
  794. * @qdf_osdev: QDF OS device
  795. * @pdev_id: PDEV ID
  796. *
  797. * Return: DP PDEV handle on success, NULL on failure
  798. */
  799. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  800. struct cdp_cfg *ctrl_pdev,
  801. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  802. {
  803. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  804. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  805. if (!pdev) {
  806. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  807. FL("DP PDEV memory allocation failed"));
  808. goto fail0;
  809. }
  810. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  811. if (!pdev->wlan_cfg_ctx) {
  812. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  813. FL("pdev cfg_attach failed"));
  814. qdf_mem_free(pdev);
  815. goto fail0;
  816. }
  817. pdev->soc = soc;
  818. pdev->osif_pdev = ctrl_pdev;
  819. pdev->pdev_id = pdev_id;
  820. soc->pdev_list[pdev_id] = pdev;
  821. TAILQ_INIT(&pdev->vdev_list);
  822. pdev->vdev_count = 0;
  823. if (dp_soc_cmn_setup(soc)) {
  824. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  825. FL("dp_soc_cmn_setup failed"));
  826. goto fail1;
  827. }
  828. /* Setup per PDEV TCL rings if configured */
  829. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  830. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  831. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  833. FL("dp_srng_setup failed for tcl_data_ring"));
  834. goto fail1;
  835. }
  836. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  837. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  839. FL("dp_srng_setup failed for tx_comp_ring"));
  840. goto fail1;
  841. }
  842. soc->num_tcl_data_rings++;
  843. }
  844. /* Tx specific init */
  845. if (dp_tx_pdev_attach(pdev)) {
  846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  847. FL("dp_tx_pdev_attach failed"));
  848. goto fail1;
  849. }
  850. /* Setup per PDEV REO rings if configured */
  851. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  852. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  853. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  854. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  855. FL("dp_srng_setup failed for reo_dest_ringn"));
  856. goto fail1;
  857. }
  858. soc->num_reo_dest_rings++;
  859. }
  860. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  861. RXDMA_REFILL_RING_SIZE)) {
  862. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  863. FL("dp_srng_setup failed rx refill ring"));
  864. goto fail1;
  865. }
  866. if (dp_rxdma_ring_setup(soc, pdev)) {
  867. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  868. FL("RXDMA ring config failed"));
  869. goto fail1;
  870. }
  871. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  872. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  874. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  875. goto fail1;
  876. }
  877. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  878. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  879. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  880. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  881. goto fail1;
  882. }
  883. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  884. RXDMA_MONITOR_STATUS, 0, pdev_id,
  885. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  886. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  887. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  888. goto fail1;
  889. }
  890. /* Rx specific init */
  891. if (dp_rx_pdev_attach(pdev)) {
  892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  893. FL("dp_rx_pdev_attach failed "));
  894. goto fail0;
  895. }
  896. #ifndef CONFIG_WIN
  897. /* MCL */
  898. dp_local_peer_id_pool_init(pdev);
  899. #endif
  900. return (struct cdp_pdev *)pdev;
  901. fail1:
  902. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  903. fail0:
  904. return NULL;
  905. }
  906. /*
  907. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  908. * @soc: data path SoC handle
  909. * @pdev: Physical device handle
  910. *
  911. * Return: void
  912. */
  913. #ifdef QCA_HOST2FW_RXBUF_RING
  914. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  915. struct dp_pdev *pdev)
  916. {
  917. int max_mac_rings =
  918. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  919. int i;
  920. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  921. max_mac_rings : MAX_RX_MAC_RINGS;
  922. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  923. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  924. RXDMA_BUF, 1);
  925. }
  926. #else
  927. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  928. struct dp_pdev *pdev)
  929. {
  930. }
  931. #endif
  932. /*
  933. * dp_pdev_detach_wifi3() - detach txrx pdev
  934. * @txrx_pdev: Datapath PDEV handle
  935. * @force: Force detach
  936. *
  937. */
  938. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  939. {
  940. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  941. struct dp_soc *soc = pdev->soc;
  942. dp_tx_pdev_detach(pdev);
  943. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  944. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  945. TCL_DATA, pdev->pdev_id);
  946. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  947. WBM2SW_RELEASE, pdev->pdev_id);
  948. }
  949. dp_rx_pdev_detach(pdev);
  950. /* Setup per PDEV REO rings if configured */
  951. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  952. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  953. REO_DST, pdev->pdev_id);
  954. }
  955. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  956. dp_rxdma_ring_cleanup(soc, pdev);
  957. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  958. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  959. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  960. RXDMA_MONITOR_STATUS, 0);
  961. soc->pdev_list[pdev->pdev_id] = NULL;
  962. qdf_mem_free(pdev);
  963. }
  964. /*
  965. * dp_soc_detach_wifi3() - Detach txrx SOC
  966. * @txrx_soc: DP SOC handle
  967. *
  968. */
  969. static void dp_soc_detach_wifi3(void *txrx_soc)
  970. {
  971. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  972. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  973. int i;
  974. soc->cmn_init_done = 0;
  975. dp_soc_interrupt_detach(soc);
  976. for (i = 0; i < MAX_PDEV_CNT; i++) {
  977. if (soc->pdev_list[i])
  978. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 1);
  979. }
  980. dp_peer_find_detach(soc);
  981. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  982. * SW descriptors
  983. */
  984. /* Free the ring memories */
  985. /* Common rings */
  986. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  987. /* Tx data rings */
  988. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  989. dp_tx_soc_detach(soc);
  990. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  991. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  992. TCL_DATA, i);
  993. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  994. WBM2SW_RELEASE, i);
  995. }
  996. }
  997. /* TCL command and status rings */
  998. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  999. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1000. /* Rx data rings */
  1001. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1002. soc->num_reo_dest_rings =
  1003. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1004. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1005. /* TODO: Get number of rings and ring sizes
  1006. * from wlan_cfg
  1007. */
  1008. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1009. REO_DST, i);
  1010. }
  1011. }
  1012. /* REO reinjection ring */
  1013. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1014. /* Rx release ring */
  1015. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1016. /* Rx exception ring */
  1017. /* TODO: Better to store ring_type and ring_num in
  1018. * dp_srng during setup
  1019. */
  1020. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1021. /* REO command and status rings */
  1022. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1023. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1024. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1025. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1026. htt_soc_detach(soc->htt_handle);
  1027. }
  1028. /*
  1029. * dp_rxdma_ring_config() - configure the RX DMA rings
  1030. *
  1031. * This function is used to configure the MAC rings.
  1032. * On MCL host provides buffers in Host2FW ring
  1033. * FW refills (copies) buffers to the ring and updates
  1034. * ring_idx in register
  1035. *
  1036. * @soc: data path SoC handle
  1037. * @pdev: Physical device handle
  1038. *
  1039. * Return: void
  1040. */
  1041. #ifdef QCA_HOST2FW_RXBUF_RING
  1042. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1043. {
  1044. int i;
  1045. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1046. struct dp_pdev *pdev = soc->pdev_list[i];
  1047. if (pdev) {
  1048. int mac_id = 0;
  1049. int j;
  1050. int max_mac_rings =
  1051. wlan_cfg_get_num_mac_rings
  1052. (pdev->wlan_cfg_ctx);
  1053. htt_srng_setup(soc->htt_handle, 0,
  1054. pdev->rx_refill_buf_ring.hal_srng,
  1055. RXDMA_BUF);
  1056. if (!soc->cdp_soc.ol_ops->
  1057. is_hw_dbs_2x2_capable()) {
  1058. max_mac_rings = 1;
  1059. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1060. QDF_TRACE_LEVEL_ERROR,
  1061. FL("DBS enabled, max_mac_rings %d\n"),
  1062. max_mac_rings);
  1063. } else {
  1064. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1065. QDF_TRACE_LEVEL_ERROR,
  1066. FL("DBS disabled max_mac_rings %d\n"),
  1067. max_mac_rings);
  1068. }
  1069. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1070. FL("pdev_id %d max_mac_rings %d\n"),
  1071. pdev->pdev_id, max_mac_rings);
  1072. for (j = 0; j < max_mac_rings; j++) {
  1073. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1074. QDF_TRACE_LEVEL_ERROR,
  1075. FL("mac_id %d\n"), mac_id);
  1076. htt_srng_setup(soc->htt_handle, mac_id,
  1077. pdev->rx_mac_buf_ring[j]
  1078. .hal_srng,
  1079. RXDMA_BUF);
  1080. mac_id++;
  1081. }
  1082. }
  1083. }
  1084. }
  1085. #else
  1086. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1087. {
  1088. int i;
  1089. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1090. struct dp_pdev *pdev = soc->pdev_list[i];
  1091. if (pdev) {
  1092. htt_srng_setup(soc->htt_handle, i,
  1093. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1094. }
  1095. }
  1096. }
  1097. #endif
  1098. /*
  1099. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1100. * @txrx_soc: Datapath SOC handle
  1101. */
  1102. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1103. {
  1104. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1105. htt_soc_attach_target(soc->htt_handle);
  1106. dp_rxdma_ring_config(soc);
  1107. return 0;
  1108. }
  1109. /*
  1110. * dp_vdev_attach_wifi3() - attach txrx vdev
  1111. * @txrx_pdev: Datapath PDEV handle
  1112. * @vdev_mac_addr: MAC address of the virtual interface
  1113. * @vdev_id: VDEV Id
  1114. * @wlan_op_mode: VDEV operating mode
  1115. *
  1116. * Return: DP VDEV handle on success, NULL on failure
  1117. */
  1118. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1119. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1120. {
  1121. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1122. struct dp_soc *soc = pdev->soc;
  1123. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1124. if (!vdev) {
  1125. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1126. FL("DP VDEV memory allocation failed"));
  1127. goto fail0;
  1128. }
  1129. vdev->pdev = pdev;
  1130. vdev->vdev_id = vdev_id;
  1131. vdev->opmode = op_mode;
  1132. vdev->osdev = soc->osdev;
  1133. vdev->osif_rx = NULL;
  1134. vdev->osif_rsim_rx_decap = NULL;
  1135. vdev->osif_rx_mon = NULL;
  1136. vdev->osif_tx_free_ext = NULL;
  1137. vdev->osif_vdev = NULL;
  1138. vdev->delete.pending = 0;
  1139. vdev->safemode = 0;
  1140. vdev->drop_unenc = 1;
  1141. #ifdef notyet
  1142. vdev->filters_num = 0;
  1143. #endif
  1144. qdf_mem_copy(
  1145. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1146. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1147. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1148. /* TODO: Initialize default HTT meta data that will be used in
  1149. * TCL descriptors for packets transmitted from this VDEV
  1150. */
  1151. TAILQ_INIT(&vdev->peer_list);
  1152. /* add this vdev into the pdev's list */
  1153. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1154. pdev->vdev_count++;
  1155. dp_tx_vdev_attach(vdev);
  1156. #ifdef DP_INTR_POLL_BASED
  1157. if (pdev->vdev_count == 1)
  1158. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1159. #endif
  1160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1161. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1162. return (struct cdp_vdev *)vdev;
  1163. fail0:
  1164. return NULL;
  1165. }
  1166. /**
  1167. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1168. * @vdev: Datapath VDEV handle
  1169. * @osif_vdev: OSIF vdev handle
  1170. * @txrx_ops: Tx and Rx operations
  1171. *
  1172. * Return: DP VDEV handle on success, NULL on failure
  1173. */
  1174. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1175. void *osif_vdev,
  1176. struct ol_txrx_ops *txrx_ops)
  1177. {
  1178. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1179. vdev->osif_vdev = osif_vdev;
  1180. vdev->osif_rx = txrx_ops->rx.rx;
  1181. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1182. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1183. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1184. #ifdef notyet
  1185. #if ATH_SUPPORT_WAPI
  1186. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1187. #endif
  1188. #if UMAC_SUPPORT_PROXY_ARP
  1189. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1190. #endif
  1191. #endif
  1192. /* TODO: Enable the following once Tx code is integrated */
  1193. txrx_ops->tx.tx = dp_tx_send;
  1194. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1195. "DP Vdev Register success");
  1196. }
  1197. /*
  1198. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1199. * @txrx_vdev: Datapath VDEV handle
  1200. * @callback: Callback OL_IF on completion of detach
  1201. * @cb_context: Callback context
  1202. *
  1203. */
  1204. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1205. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1206. {
  1207. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1208. struct dp_pdev *pdev = vdev->pdev;
  1209. struct dp_soc *soc = pdev->soc;
  1210. /* preconditions */
  1211. qdf_assert(vdev);
  1212. /* remove the vdev from its parent pdev's list */
  1213. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1214. /*
  1215. * Use peer_ref_mutex while accessing peer_list, in case
  1216. * a peer is in the process of being removed from the list.
  1217. */
  1218. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1219. /* check that the vdev has no peers allocated */
  1220. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1221. /* debug print - will be removed later */
  1222. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1223. FL("not deleting vdev object %p (%pM)"
  1224. "until deletion finishes for all its peers"),
  1225. vdev, vdev->mac_addr.raw);
  1226. /* indicate that the vdev needs to be deleted */
  1227. vdev->delete.pending = 1;
  1228. vdev->delete.callback = callback;
  1229. vdev->delete.context = cb_context;
  1230. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1231. return;
  1232. }
  1233. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1234. dp_tx_vdev_detach(vdev);
  1235. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1236. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1237. qdf_mem_free(vdev);
  1238. if (callback)
  1239. callback(cb_context);
  1240. }
  1241. /*
  1242. * dp_peer_create_wifi3() - attach txrx peer
  1243. * @txrx_vdev: Datapath VDEV handle
  1244. * @peer_mac_addr: Peer MAC address
  1245. *
  1246. * Return: DP peeer handle on success, NULL on failure
  1247. */
  1248. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1249. uint8_t *peer_mac_addr)
  1250. {
  1251. struct dp_peer *peer;
  1252. int i;
  1253. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1254. struct dp_pdev *pdev;
  1255. struct dp_soc *soc;
  1256. /* preconditions */
  1257. qdf_assert(vdev);
  1258. qdf_assert(peer_mac_addr);
  1259. pdev = vdev->pdev;
  1260. soc = pdev->soc;
  1261. #ifdef notyet
  1262. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1263. soc->mempool_ol_ath_peer);
  1264. #else
  1265. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1266. #endif
  1267. if (!peer)
  1268. return NULL; /* failure */
  1269. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1270. qdf_spinlock_create(&peer->peer_info_lock);
  1271. /* store provided params */
  1272. peer->vdev = vdev;
  1273. qdf_mem_copy(
  1274. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1275. /* TODO: See of rx_opt_proc is really required */
  1276. peer->rx_opt_proc = soc->rx_opt_proc;
  1277. /* initialize the peer_id */
  1278. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1279. peer->peer_ids[i] = HTT_INVALID_PEER;
  1280. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1281. qdf_atomic_init(&peer->ref_cnt);
  1282. /* keep one reference for attach */
  1283. qdf_atomic_inc(&peer->ref_cnt);
  1284. /* add this peer into the vdev's list */
  1285. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1286. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1287. /* TODO: See if hash based search is required */
  1288. dp_peer_find_hash_add(soc, peer);
  1289. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1290. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1291. vdev, peer, peer->mac_addr.raw,
  1292. qdf_atomic_read(&peer->ref_cnt));
  1293. /*
  1294. * For every peer MAp message search and set if bss_peer
  1295. */
  1296. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1297. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1298. "vdev bss_peer!!!!");
  1299. peer->bss_peer = 1;
  1300. vdev->vap_bss_peer = peer;
  1301. }
  1302. #ifndef CONFIG_WIN
  1303. dp_local_peer_id_alloc(pdev, peer);
  1304. #endif
  1305. return (void *)peer;
  1306. }
  1307. /*
  1308. * dp_peer_setup_wifi3() - initialize the peer
  1309. * @vdev_hdl: virtual device object
  1310. * @peer: Peer object
  1311. *
  1312. * Return: void
  1313. */
  1314. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1315. {
  1316. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1317. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1318. struct dp_pdev *pdev;
  1319. struct dp_soc *soc;
  1320. /* preconditions */
  1321. qdf_assert(vdev);
  1322. qdf_assert(peer);
  1323. pdev = vdev->pdev;
  1324. soc = pdev->soc;
  1325. dp_peer_rx_init(pdev, peer);
  1326. peer->last_assoc_rcvd = 0;
  1327. peer->last_disassoc_rcvd = 0;
  1328. peer->last_deauth_rcvd = 0;
  1329. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1330. /* TODO: Check the destination ring number to be passed to FW */
  1331. soc->cdp_soc.ol_ops->peer_set_default_routing(pdev->osif_pdev,
  1332. peer->mac_addr.raw, peer->vdev->vdev_id, 0, 1);
  1333. }
  1334. return;
  1335. }
  1336. /*
  1337. * dp_peer_authorize() - authorize txrx peer
  1338. * @peer_handle: Datapath peer handle
  1339. * @authorize
  1340. *
  1341. */
  1342. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1343. {
  1344. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1345. struct dp_soc *soc;
  1346. if (peer != NULL) {
  1347. soc = peer->vdev->pdev->soc;
  1348. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1349. peer->authorize = authorize ? 1 : 0;
  1350. #ifdef notyet /* ATH_BAND_STEERING */
  1351. peer->peer_bs_inact_flag = 0;
  1352. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1353. #endif
  1354. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1355. }
  1356. }
  1357. /*
  1358. * dp_peer_unref_delete() - unref and delete peer
  1359. * @peer_handle: Datapath peer handle
  1360. *
  1361. */
  1362. void dp_peer_unref_delete(void *peer_handle)
  1363. {
  1364. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1365. struct dp_vdev *vdev = peer->vdev;
  1366. struct dp_soc *soc = vdev->pdev->soc;
  1367. struct dp_peer *tmppeer;
  1368. int found = 0;
  1369. uint16_t peer_id;
  1370. /*
  1371. * Hold the lock all the way from checking if the peer ref count
  1372. * is zero until the peer references are removed from the hash
  1373. * table and vdev list (if the peer ref count is zero).
  1374. * This protects against a new HL tx operation starting to use the
  1375. * peer object just after this function concludes it's done being used.
  1376. * Furthermore, the lock needs to be held while checking whether the
  1377. * vdev's list of peers is empty, to make sure that list is not modified
  1378. * concurrently with the empty check.
  1379. */
  1380. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1381. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1382. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1383. peer, qdf_atomic_read(&peer->ref_cnt));
  1384. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1385. peer_id = peer->peer_ids[0];
  1386. /*
  1387. * Make sure that the reference to the peer in
  1388. * peer object map is removed
  1389. */
  1390. if (peer_id != HTT_INVALID_PEER)
  1391. soc->peer_id_to_obj_map[peer_id] = NULL;
  1392. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1393. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1394. /* remove the reference to the peer from the hash table */
  1395. dp_peer_find_hash_remove(soc, peer);
  1396. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1397. if (tmppeer == peer) {
  1398. found = 1;
  1399. break;
  1400. }
  1401. }
  1402. if (found) {
  1403. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1404. peer_list_elem);
  1405. } else {
  1406. /*Ignoring the remove operation as peer not found*/
  1407. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1408. "peer %p not found in vdev (%p)->peer_list:%p",
  1409. peer, vdev, &peer->vdev->peer_list);
  1410. }
  1411. /* cleanup the peer data */
  1412. dp_peer_cleanup(vdev, peer);
  1413. /* check whether the parent vdev has no peers left */
  1414. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1415. /*
  1416. * Now that there are no references to the peer, we can
  1417. * release the peer reference lock.
  1418. */
  1419. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1420. /*
  1421. * Check if the parent vdev was waiting for its peers
  1422. * to be deleted, in order for it to be deleted too.
  1423. */
  1424. if (vdev->delete.pending) {
  1425. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1426. vdev->delete.callback;
  1427. void *vdev_delete_context =
  1428. vdev->delete.context;
  1429. QDF_TRACE(QDF_MODULE_ID_DP,
  1430. QDF_TRACE_LEVEL_INFO_HIGH,
  1431. FL("deleting vdev object %p (%pM)"
  1432. " - its last peer is done"),
  1433. vdev, vdev->mac_addr.raw);
  1434. /* all peers are gone, go ahead and delete it */
  1435. qdf_mem_free(vdev);
  1436. if (vdev_delete_cb)
  1437. vdev_delete_cb(vdev_delete_context);
  1438. }
  1439. } else {
  1440. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1441. }
  1442. #ifdef notyet
  1443. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1444. #else
  1445. qdf_mem_free(peer);
  1446. #endif
  1447. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1448. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc,
  1449. vdev->vdev_id, peer->mac_addr.raw);
  1450. }
  1451. } else {
  1452. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1453. }
  1454. }
  1455. /*
  1456. * dp_peer_detach_wifi3() – Detach txrx peer
  1457. * @peer_handle: Datapath peer handle
  1458. *
  1459. */
  1460. static void dp_peer_delete_wifi3(void *peer_handle)
  1461. {
  1462. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1463. /* redirect the peer's rx delivery function to point to a
  1464. * discard func
  1465. */
  1466. peer->rx_opt_proc = dp_rx_discard;
  1467. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1468. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1469. #ifndef CONFIG_WIN
  1470. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1471. #endif
  1472. qdf_spinlock_destroy(&peer->peer_info_lock);
  1473. /*
  1474. * Remove the reference added during peer_attach.
  1475. * The peer will still be left allocated until the
  1476. * PEER_UNMAP message arrives to remove the other
  1477. * reference, added by the PEER_MAP message.
  1478. */
  1479. dp_peer_unref_delete(peer_handle);
  1480. }
  1481. /*
  1482. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1483. * @peer_handle: Datapath peer handle
  1484. *
  1485. */
  1486. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1487. {
  1488. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1489. return vdev->mac_addr.raw;
  1490. }
  1491. /*
  1492. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1493. * @peer_handle: Datapath peer handle
  1494. *
  1495. */
  1496. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1497. uint8_t vdev_id)
  1498. {
  1499. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1500. struct dp_vdev *vdev = NULL;
  1501. if (qdf_unlikely(!pdev))
  1502. return NULL;
  1503. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1504. if (vdev->vdev_id == vdev_id)
  1505. break;
  1506. }
  1507. return (struct cdp_vdev *)vdev;
  1508. }
  1509. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1510. {
  1511. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1512. return vdev->opmode;
  1513. }
  1514. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1515. {
  1516. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1517. struct dp_pdev *pdev = vdev->pdev;
  1518. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1519. }
  1520. static struct cdp_cmn_ops dp_ops_cmn = {
  1521. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1522. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1523. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1524. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1525. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1526. .txrx_peer_create = dp_peer_create_wifi3,
  1527. .txrx_peer_setup = dp_peer_setup_wifi3,
  1528. .txrx_peer_teardown = NULL,
  1529. .txrx_peer_delete = dp_peer_delete_wifi3,
  1530. .txrx_vdev_register = dp_vdev_register_wifi3,
  1531. .txrx_soc_detach = dp_soc_detach_wifi3,
  1532. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1533. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1534. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1535. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  1536. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  1537. .delba_process = dp_delba_process_wifi3,
  1538. /* TODO: Add other functions */
  1539. };
  1540. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1541. .txrx_peer_authorize = dp_peer_authorize,
  1542. /* TODO: Add other functions */
  1543. };
  1544. static struct cdp_me_ops dp_ops_me = {
  1545. /* TODO */
  1546. };
  1547. static struct cdp_mon_ops dp_ops_mon = {
  1548. /* TODO */
  1549. };
  1550. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1551. /* TODO */
  1552. };
  1553. static struct cdp_wds_ops dp_ops_wds = {
  1554. /* TODO */
  1555. };
  1556. static struct cdp_raw_ops dp_ops_raw = {
  1557. /* TODO */
  1558. };
  1559. #ifdef CONFIG_WIN
  1560. static struct cdp_pflow_ops dp_ops_pflow = {
  1561. /* TODO */
  1562. };
  1563. #endif /* CONFIG_WIN */
  1564. #ifndef CONFIG_WIN
  1565. static struct cdp_misc_ops dp_ops_misc = {
  1566. .get_opmode = dp_get_opmode,
  1567. };
  1568. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1569. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1570. };
  1571. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1572. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1573. };
  1574. static struct cdp_ipa_ops dp_ops_ipa = {
  1575. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1576. };
  1577. static struct cdp_lro_ops dp_ops_lro = {
  1578. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1579. };
  1580. /**
  1581. * dp_dummy_bus_suspend() - dummy bus suspend op
  1582. *
  1583. * FIXME - This is a placeholder for the actual logic!
  1584. *
  1585. * Return: QDF_STATUS_SUCCESS
  1586. */
  1587. inline QDF_STATUS dp_dummy_bus_suspend(void)
  1588. {
  1589. return QDF_STATUS_SUCCESS;
  1590. }
  1591. /**
  1592. * dp_dummy_bus_resume() - dummy bus resume
  1593. *
  1594. * FIXME - This is a placeholder for the actual logic!
  1595. *
  1596. * Return: QDF_STATUS_SUCCESS
  1597. */
  1598. inline QDF_STATUS dp_dummy_bus_resume(void)
  1599. {
  1600. return QDF_STATUS_SUCCESS;
  1601. }
  1602. static struct cdp_bus_ops dp_ops_bus = {
  1603. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1604. .bus_suspend = dp_dummy_bus_suspend,
  1605. .bus_resume = dp_dummy_bus_resume
  1606. };
  1607. static struct cdp_ocb_ops dp_ops_ocb = {
  1608. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1609. };
  1610. static struct cdp_throttle_ops dp_ops_throttle = {
  1611. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1612. };
  1613. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1614. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1615. };
  1616. static struct cdp_cfg_ops dp_ops_cfg = {
  1617. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1618. };
  1619. static struct cdp_peer_ops dp_ops_peer = {
  1620. .register_peer = dp_register_peer,
  1621. .clear_peer = dp_clear_peer,
  1622. .find_peer_by_addr = dp_find_peer_by_addr,
  1623. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1624. .local_peer_id = dp_local_peer_id,
  1625. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1626. .peer_state_update = dp_peer_state_update,
  1627. .get_vdevid = dp_get_vdevid,
  1628. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1629. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1630. .get_peer_state = dp_get_peer_state,
  1631. .last_assoc_received = dp_get_last_assoc_received,
  1632. .last_disassoc_received = dp_get_last_disassoc_received,
  1633. .last_deauth_received = dp_get_last_deauth_received,
  1634. };
  1635. #endif
  1636. static struct cdp_ops dp_txrx_ops = {
  1637. .cmn_drv_ops = &dp_ops_cmn,
  1638. .ctrl_ops = &dp_ops_ctrl,
  1639. .me_ops = &dp_ops_me,
  1640. .mon_ops = &dp_ops_mon,
  1641. .host_stats_ops = &dp_ops_host_stats,
  1642. .wds_ops = &dp_ops_wds,
  1643. .raw_ops = &dp_ops_raw,
  1644. #ifdef CONFIG_WIN
  1645. .pflow_ops = &dp_ops_pflow,
  1646. #endif /* CONFIG_WIN */
  1647. #ifndef CONFIG_WIN
  1648. .misc_ops = &dp_ops_misc,
  1649. .cfg_ops = &dp_ops_cfg,
  1650. .flowctl_ops = &dp_ops_flowctl,
  1651. .l_flowctl_ops = &dp_ops_l_flowctl,
  1652. .ipa_ops = &dp_ops_ipa,
  1653. .lro_ops = &dp_ops_lro,
  1654. .bus_ops = &dp_ops_bus,
  1655. .ocb_ops = &dp_ops_ocb,
  1656. .peer_ops = &dp_ops_peer,
  1657. .throttle_ops = &dp_ops_throttle,
  1658. .mob_stats_ops = &dp_ops_mob_stats,
  1659. #endif
  1660. };
  1661. /*
  1662. * dp_soc_attach_wifi3() - Attach txrx SOC
  1663. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1664. * @htc_handle: Opaque HTC handle
  1665. * @hif_handle: Opaque HIF handle
  1666. * @qdf_osdev: QDF device
  1667. *
  1668. * Return: DP SOC handle on success, NULL on failure
  1669. */
  1670. /*
  1671. * Local prototype added to temporarily address warning caused by
  1672. * -Wmissing-prototypes. A more correct solution, namely to expose
  1673. * a prototype in an appropriate header file, will come later.
  1674. */
  1675. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1676. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1677. struct ol_if_ops *ol_ops);
  1678. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1679. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1680. struct ol_if_ops *ol_ops)
  1681. {
  1682. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1683. if (!soc) {
  1684. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1685. FL("DP SOC memory allocation failed"));
  1686. goto fail0;
  1687. }
  1688. soc->cdp_soc.ops = &dp_txrx_ops;
  1689. soc->cdp_soc.ol_ops = ol_ops;
  1690. soc->osif_soc = osif_soc;
  1691. soc->osdev = qdf_osdev;
  1692. soc->hif_handle = hif_handle;
  1693. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1694. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1695. soc->hal_soc, qdf_osdev);
  1696. if (!soc->htt_handle) {
  1697. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1698. FL("HTT attach failed"));
  1699. goto fail1;
  1700. }
  1701. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1702. if (!soc->wlan_cfg_ctx) {
  1703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1704. FL("wlan_cfg_soc_attach failed"));
  1705. goto fail2;
  1706. }
  1707. qdf_spinlock_create(&soc->peer_ref_mutex);
  1708. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1709. goto fail2;
  1710. }
  1711. return (void *)soc;
  1712. fail2:
  1713. htt_soc_detach(soc->htt_handle);
  1714. fail1:
  1715. qdf_mem_free(soc);
  1716. fail0:
  1717. return NULL;
  1718. }