main.c 127 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  135. {
  136. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  137. plat_env[plat_priv->plat_idx] = NULL;
  138. plat_env_count--;
  139. }
  140. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  141. {
  142. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  143. "wlan_%d", plat_priv->plat_idx);
  144. return 0;
  145. }
  146. static int cnss_plat_env_available(void)
  147. {
  148. int ret = 0;
  149. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  150. cnss_pr_err("ERROR: No space to store plat_priv\n");
  151. ret = -ENOMEM;
  152. }
  153. return ret;
  154. }
  155. int cnss_get_plat_env_count(void)
  156. {
  157. return plat_env_count;
  158. }
  159. struct cnss_plat_data *cnss_get_plat_env(int index)
  160. {
  161. return plat_env[index];
  162. }
  163. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  164. {
  165. int i;
  166. for (i = 0; i < plat_env_count; i++) {
  167. if (plat_env[i]->rc_num == rc_num)
  168. return plat_env[i];
  169. }
  170. return NULL;
  171. }
  172. static inline int
  173. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  174. {
  175. return of_property_read_u32(plat_priv->dev_node,
  176. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  177. }
  178. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  179. {
  180. int ret = 0;
  181. ret = cnss_get_qrtr_node_id(plat_priv);
  182. if (ret) {
  183. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  184. plat_priv->qrtr_node_id = 0;
  185. plat_priv->wlfw_service_instance_id = 0;
  186. } else {
  187. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  188. QRTR_NODE_FW_ID_BASE;
  189. cnss_pr_dbg("service_instance_id=0x%x\n",
  190. plat_priv->wlfw_service_instance_id);
  191. }
  192. }
  193. static inline int
  194. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  195. {
  196. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  197. "qcom,pld_bus_ops_name",
  198. &plat_priv->pld_bus_ops_name);
  199. }
  200. #else
  201. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  202. struct cnss_plat_data *plat_priv)
  203. {
  204. plat_env = plat_priv;
  205. }
  206. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  207. {
  208. return plat_env;
  209. }
  210. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  211. {
  212. plat_env = NULL;
  213. }
  214. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  215. {
  216. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  217. "wlan");
  218. return 0;
  219. }
  220. static int cnss_plat_env_available(void)
  221. {
  222. return 0;
  223. }
  224. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  225. {
  226. return cnss_bus_dev_to_plat_priv(NULL);
  227. }
  228. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  229. {
  230. }
  231. static int
  232. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  233. {
  234. return 0;
  235. }
  236. #endif
  237. static inline int
  238. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  239. {
  240. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  241. "qcom,wlan-rc-num", &plat_priv->rc_num);
  242. }
  243. bool cnss_is_dual_wlan_enabled(void)
  244. {
  245. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  246. }
  247. /**
  248. * cnss_get_mem_seg_count - Get segment count of memory
  249. * @type: memory type
  250. * @seg: segment count
  251. *
  252. * Return: 0 on success, negative value on failure
  253. */
  254. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  255. {
  256. struct cnss_plat_data *plat_priv;
  257. plat_priv = cnss_get_plat_priv(NULL);
  258. if (!plat_priv)
  259. return -ENODEV;
  260. switch (type) {
  261. case CNSS_REMOTE_MEM_TYPE_FW:
  262. *seg = plat_priv->fw_mem_seg_len;
  263. break;
  264. case CNSS_REMOTE_MEM_TYPE_QDSS:
  265. *seg = plat_priv->qdss_mem_seg_len;
  266. break;
  267. default:
  268. return -EINVAL;
  269. }
  270. return 0;
  271. }
  272. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  273. /**
  274. * cnss_get_wifi_kobject -return wifi kobject
  275. * Return: Null, to maintain driver comnpatibilty
  276. */
  277. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  278. {
  279. struct cnss_plat_data *plat_priv;
  280. plat_priv = cnss_get_plat_priv(NULL);
  281. if (!plat_priv)
  282. return NULL;
  283. return plat_priv->wifi_kobj;
  284. }
  285. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  286. /**
  287. * cnss_get_mem_segment_info - Get memory info of different type
  288. * @type: memory type
  289. * @segment: array to save the segment info
  290. * @seg: segment count
  291. *
  292. * Return: 0 on success, negative value on failure
  293. */
  294. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  295. struct cnss_mem_segment segment[],
  296. u32 segment_count)
  297. {
  298. struct cnss_plat_data *plat_priv;
  299. u32 i;
  300. plat_priv = cnss_get_plat_priv(NULL);
  301. if (!plat_priv)
  302. return -ENODEV;
  303. switch (type) {
  304. case CNSS_REMOTE_MEM_TYPE_FW:
  305. if (segment_count > plat_priv->fw_mem_seg_len)
  306. segment_count = plat_priv->fw_mem_seg_len;
  307. for (i = 0; i < segment_count; i++) {
  308. segment[i].size = plat_priv->fw_mem[i].size;
  309. segment[i].va = plat_priv->fw_mem[i].va;
  310. segment[i].pa = plat_priv->fw_mem[i].pa;
  311. }
  312. break;
  313. case CNSS_REMOTE_MEM_TYPE_QDSS:
  314. if (segment_count > plat_priv->qdss_mem_seg_len)
  315. segment_count = plat_priv->qdss_mem_seg_len;
  316. for (i = 0; i < segment_count; i++) {
  317. segment[i].size = plat_priv->qdss_mem[i].size;
  318. segment[i].va = plat_priv->qdss_mem[i].va;
  319. segment[i].pa = plat_priv->qdss_mem[i].pa;
  320. }
  321. break;
  322. default:
  323. return -EINVAL;
  324. }
  325. return 0;
  326. }
  327. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  328. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  329. {
  330. struct device_node *audio_ion_node;
  331. struct platform_device *audio_ion_pdev;
  332. audio_ion_node = of_find_compatible_node(NULL, NULL,
  333. "qcom,msm-audio-ion");
  334. if (!audio_ion_node) {
  335. cnss_pr_err("Unable to get Audio ion node");
  336. return -EINVAL;
  337. }
  338. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  339. of_node_put(audio_ion_node);
  340. if (!audio_ion_pdev) {
  341. cnss_pr_err("Unable to get Audio ion platform device");
  342. return -EINVAL;
  343. }
  344. plat_priv->audio_iommu_domain =
  345. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  346. put_device(&audio_ion_pdev->dev);
  347. if (!plat_priv->audio_iommu_domain) {
  348. cnss_pr_err("Unable to get Audio ion iommu domain");
  349. return -EINVAL;
  350. }
  351. return 0;
  352. }
  353. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  354. enum cnss_feature_v01 feature)
  355. {
  356. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  357. return -EINVAL;
  358. plat_priv->feature_list |= 1 << feature;
  359. return 0;
  360. }
  361. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  362. enum cnss_feature_v01 feature)
  363. {
  364. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  365. return -EINVAL;
  366. plat_priv->feature_list &= ~(1 << feature);
  367. return 0;
  368. }
  369. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  370. u64 *feature_list)
  371. {
  372. if (unlikely(!plat_priv))
  373. return -EINVAL;
  374. *feature_list = plat_priv->feature_list;
  375. return 0;
  376. }
  377. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  378. {
  379. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  380. return;
  381. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  382. plat_priv->driver_state,
  383. atomic_read(&plat_priv->pm_count));
  384. pm_stay_awake(&plat_priv->plat_dev->dev);
  385. }
  386. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  387. {
  388. int r = atomic_dec_return(&plat_priv->pm_count);
  389. WARN_ON(r < 0);
  390. if (r != 0)
  391. return;
  392. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  393. plat_priv->driver_state,
  394. atomic_read(&plat_priv->pm_count));
  395. pm_relax(&plat_priv->plat_dev->dev);
  396. }
  397. int cnss_get_fw_files_for_target(struct device *dev,
  398. struct cnss_fw_files *pfw_files,
  399. u32 target_type, u32 target_version)
  400. {
  401. if (!pfw_files)
  402. return -ENODEV;
  403. switch (target_version) {
  404. case QCA6174_REV3_VERSION:
  405. case QCA6174_REV3_2_VERSION:
  406. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  407. break;
  408. default:
  409. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  410. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  411. target_type, target_version);
  412. break;
  413. }
  414. return 0;
  415. }
  416. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  417. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  418. {
  419. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  420. if (!plat_priv)
  421. return -ENODEV;
  422. if (!cap)
  423. return -EINVAL;
  424. *cap = plat_priv->cap;
  425. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  426. return 0;
  427. }
  428. EXPORT_SYMBOL(cnss_get_platform_cap);
  429. /**
  430. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  431. * @dev: Device
  432. * @fw_cap: FW Capability which needs to be checked
  433. *
  434. * Return: TRUE if supported, FALSE on failure or if not supported
  435. */
  436. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  437. {
  438. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  439. bool is_supported = false;
  440. if (!plat_priv)
  441. return is_supported;
  442. if (!plat_priv->fw_caps)
  443. return is_supported;
  444. switch (fw_cap) {
  445. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  446. is_supported = !!(plat_priv->fw_caps &
  447. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  448. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  449. is_supported = false;
  450. break;
  451. default:
  452. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  453. }
  454. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  455. is_supported ? "supported" : "not supported");
  456. return is_supported;
  457. }
  458. EXPORT_SYMBOL(cnss_get_fw_cap);
  459. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  460. {
  461. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  462. if (!plat_priv)
  463. return;
  464. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  465. }
  466. EXPORT_SYMBOL(cnss_request_pm_qos);
  467. void cnss_remove_pm_qos(struct device *dev)
  468. {
  469. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  470. if (!plat_priv)
  471. return;
  472. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  473. }
  474. EXPORT_SYMBOL(cnss_remove_pm_qos);
  475. int cnss_wlan_enable(struct device *dev,
  476. struct cnss_wlan_enable_cfg *config,
  477. enum cnss_driver_mode mode,
  478. const char *host_version)
  479. {
  480. int ret = 0;
  481. struct cnss_plat_data *plat_priv;
  482. if (!dev) {
  483. cnss_pr_err("Invalid dev pointer\n");
  484. return -EINVAL;
  485. }
  486. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  487. if (!plat_priv)
  488. return -ENODEV;
  489. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  490. return 0;
  491. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  492. return 0;
  493. if (!config || !host_version) {
  494. cnss_pr_err("Invalid config or host_version pointer\n");
  495. return -EINVAL;
  496. }
  497. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  498. mode, config, host_version);
  499. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  500. goto skip_cfg;
  501. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  502. if (ret)
  503. goto out;
  504. skip_cfg:
  505. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  506. out:
  507. return ret;
  508. }
  509. EXPORT_SYMBOL(cnss_wlan_enable);
  510. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  511. {
  512. int ret = 0;
  513. struct cnss_plat_data *plat_priv;
  514. if (!dev) {
  515. cnss_pr_err("Invalid dev pointer\n");
  516. return -EINVAL;
  517. }
  518. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  519. if (!plat_priv)
  520. return -ENODEV;
  521. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  522. return 0;
  523. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  524. return 0;
  525. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  526. cnss_bus_free_qdss_mem(plat_priv);
  527. return ret;
  528. }
  529. EXPORT_SYMBOL(cnss_wlan_disable);
  530. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  531. dma_addr_t iova, size_t size)
  532. {
  533. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  534. uint32_t page_offset;
  535. if (!plat_priv)
  536. return -ENODEV;
  537. if (!plat_priv->audio_iommu_domain)
  538. return -EINVAL;
  539. page_offset = iova & (PAGE_SIZE - 1);
  540. if (page_offset + size > PAGE_SIZE)
  541. size += PAGE_SIZE;
  542. iova -= page_offset;
  543. paddr -= page_offset;
  544. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  545. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  546. IOMMU_CACHE);
  547. }
  548. EXPORT_SYMBOL(cnss_audio_smmu_map);
  549. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  550. {
  551. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  552. uint32_t page_offset;
  553. if (!plat_priv)
  554. return;
  555. if (!plat_priv->audio_iommu_domain)
  556. return;
  557. page_offset = iova & (PAGE_SIZE - 1);
  558. if (page_offset + size > PAGE_SIZE)
  559. size += PAGE_SIZE;
  560. iova -= page_offset;
  561. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  562. roundup(size, PAGE_SIZE));
  563. }
  564. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  565. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  566. u32 data_len, u8 *output)
  567. {
  568. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  569. int ret = 0;
  570. if (!plat_priv) {
  571. cnss_pr_err("plat_priv is NULL!\n");
  572. return -EINVAL;
  573. }
  574. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  575. return 0;
  576. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  577. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  578. plat_priv->driver_state);
  579. ret = -EINVAL;
  580. goto out;
  581. }
  582. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  583. data_len, output);
  584. out:
  585. return ret;
  586. }
  587. EXPORT_SYMBOL(cnss_athdiag_read);
  588. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  589. u32 data_len, u8 *input)
  590. {
  591. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  592. int ret = 0;
  593. if (!plat_priv) {
  594. cnss_pr_err("plat_priv is NULL!\n");
  595. return -EINVAL;
  596. }
  597. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  598. return 0;
  599. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  600. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  601. plat_priv->driver_state);
  602. ret = -EINVAL;
  603. goto out;
  604. }
  605. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  606. data_len, input);
  607. out:
  608. return ret;
  609. }
  610. EXPORT_SYMBOL(cnss_athdiag_write);
  611. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  612. {
  613. struct cnss_plat_data *plat_priv;
  614. if (!dev) {
  615. cnss_pr_err("Invalid dev pointer\n");
  616. return -EINVAL;
  617. }
  618. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  619. if (!plat_priv)
  620. return -ENODEV;
  621. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  622. return 0;
  623. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  624. }
  625. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  626. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  627. {
  628. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  629. if (!plat_priv)
  630. return -EINVAL;
  631. if (!plat_priv->fw_pcie_gen_switch) {
  632. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  633. return -EOPNOTSUPP;
  634. }
  635. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  636. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  637. return -EINVAL;
  638. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  639. plat_priv->pcie_gen_speed = pcie_gen_speed;
  640. return 0;
  641. }
  642. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  643. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  644. {
  645. int ret = 0;
  646. if (!plat_priv)
  647. return -ENODEV;
  648. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  649. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  650. if (ret)
  651. goto out;
  652. if (plat_priv->hds_enabled)
  653. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  654. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  655. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  656. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  657. plat_priv->ctrl_params.bdf_type);
  658. if (ret)
  659. goto out;
  660. ret = cnss_bus_load_m3(plat_priv);
  661. if (ret)
  662. goto out;
  663. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  664. if (ret)
  665. goto out;
  666. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  667. return 0;
  668. out:
  669. return ret;
  670. }
  671. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  672. {
  673. int ret = 0;
  674. if (!plat_priv->antenna) {
  675. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  676. if (ret)
  677. goto out;
  678. }
  679. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  680. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  681. if (ret)
  682. goto out;
  683. }
  684. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  685. if (ret)
  686. goto out;
  687. return 0;
  688. out:
  689. return ret;
  690. }
  691. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  692. {
  693. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  694. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  695. }
  696. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  697. {
  698. u32 i;
  699. int ret = 0;
  700. struct cnss_plat_ipc_daemon_config *cfg;
  701. ret = cnss_qmi_get_dms_mac(plat_priv);
  702. if (ret == 0 && plat_priv->dms.mac_valid)
  703. goto qmi_send;
  704. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  705. * Thus assert on failure to get MAC from DMS even after retries
  706. */
  707. if (plat_priv->use_nv_mac) {
  708. /* Check if Daemon says platform support DMS MAC provisioning */
  709. cfg = cnss_plat_ipc_qmi_daemon_config();
  710. if (cfg) {
  711. if (!cfg->dms_mac_addr_supported) {
  712. cnss_pr_err("DMS MAC address not supported\n");
  713. CNSS_ASSERT(0);
  714. return -EINVAL;
  715. }
  716. }
  717. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  718. if (plat_priv->dms.mac_valid)
  719. break;
  720. ret = cnss_qmi_get_dms_mac(plat_priv);
  721. if (ret == 0)
  722. break;
  723. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  724. }
  725. if (!plat_priv->dms.mac_valid) {
  726. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  727. CNSS_ASSERT(0);
  728. return -EINVAL;
  729. }
  730. }
  731. qmi_send:
  732. if (plat_priv->dms.mac_valid)
  733. ret =
  734. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  735. ARRAY_SIZE(plat_priv->dms.mac));
  736. return ret;
  737. }
  738. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  739. enum cnss_cal_db_op op, u32 *size)
  740. {
  741. int ret = 0;
  742. u32 timeout = cnss_get_timeout(plat_priv,
  743. CNSS_TIMEOUT_DAEMON_CONNECTION);
  744. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  745. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  746. if (op >= CNSS_CAL_DB_INVALID_OP)
  747. return -EINVAL;
  748. if (!plat_priv->cbc_file_download) {
  749. cnss_pr_info("CAL DB file not required as per BDF\n");
  750. return 0;
  751. }
  752. if (*size == 0) {
  753. cnss_pr_err("Invalid cal file size\n");
  754. return -EINVAL;
  755. }
  756. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  757. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  758. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  759. msecs_to_jiffies(timeout));
  760. if (!ret) {
  761. cnss_pr_err("Daemon not yet connected\n");
  762. CNSS_ASSERT(0);
  763. return ret;
  764. }
  765. }
  766. if (!plat_priv->cal_mem->va) {
  767. cnss_pr_err("CAL DB Memory not setup for FW\n");
  768. return -EINVAL;
  769. }
  770. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  771. if (op == CNSS_CAL_DB_DOWNLOAD) {
  772. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  773. ret = cnss_plat_ipc_qmi_file_download(client_id,
  774. CNSS_CAL_DB_FILE_NAME,
  775. plat_priv->cal_mem->va,
  776. size);
  777. } else {
  778. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  779. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  780. CNSS_CAL_DB_FILE_NAME,
  781. plat_priv->cal_mem->va,
  782. *size);
  783. }
  784. if (ret)
  785. cnss_pr_err("Cal DB file %s %s failure\n",
  786. CNSS_CAL_DB_FILE_NAME,
  787. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  788. else
  789. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  790. CNSS_CAL_DB_FILE_NAME,
  791. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  792. *size);
  793. return ret;
  794. }
  795. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  796. {
  797. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  798. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  799. return -EINVAL;
  800. }
  801. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  802. &plat_priv->cal_file_size);
  803. }
  804. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  805. u32 *cal_file_size)
  806. {
  807. /* To download pass the total size of cal DB mem allocated.
  808. * After cal file is download to mem, its size is updated in
  809. * return pointer
  810. */
  811. *cal_file_size = plat_priv->cal_mem->size;
  812. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  813. cal_file_size);
  814. }
  815. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  816. {
  817. int ret = 0;
  818. u32 cal_file_size = 0;
  819. if (!plat_priv)
  820. return -ENODEV;
  821. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  822. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  823. return -EINVAL;
  824. }
  825. cnss_pr_dbg("Processing FW Init Done..\n");
  826. del_timer(&plat_priv->fw_boot_timer);
  827. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  828. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  829. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  830. cnss_send_subsys_restart_level_msg(plat_priv);
  831. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  832. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  833. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  834. }
  835. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  836. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  837. CNSS_WALTEST);
  838. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  839. cnss_request_antenna_sharing(plat_priv);
  840. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  841. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  842. plat_priv->cal_time = jiffies;
  843. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  844. CNSS_CALIBRATION);
  845. } else {
  846. ret = cnss_setup_dms_mac(plat_priv);
  847. ret = cnss_bus_call_driver_probe(plat_priv);
  848. }
  849. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  850. goto out;
  851. else if (ret)
  852. goto shutdown;
  853. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  854. return 0;
  855. shutdown:
  856. cnss_bus_dev_shutdown(plat_priv);
  857. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  858. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  859. out:
  860. return ret;
  861. }
  862. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  863. {
  864. switch (type) {
  865. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  866. return "SERVER_ARRIVE";
  867. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  868. return "SERVER_EXIT";
  869. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  870. return "REQUEST_MEM";
  871. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  872. return "FW_MEM_READY";
  873. case CNSS_DRIVER_EVENT_FW_READY:
  874. return "FW_READY";
  875. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  876. return "COLD_BOOT_CAL_START";
  877. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  878. return "COLD_BOOT_CAL_DONE";
  879. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  880. return "REGISTER_DRIVER";
  881. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  882. return "UNREGISTER_DRIVER";
  883. case CNSS_DRIVER_EVENT_RECOVERY:
  884. return "RECOVERY";
  885. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  886. return "FORCE_FW_ASSERT";
  887. case CNSS_DRIVER_EVENT_POWER_UP:
  888. return "POWER_UP";
  889. case CNSS_DRIVER_EVENT_POWER_DOWN:
  890. return "POWER_DOWN";
  891. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  892. return "IDLE_RESTART";
  893. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  894. return "IDLE_SHUTDOWN";
  895. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  896. return "IMS_WFC_CALL_IND";
  897. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  898. return "WLFW_TWC_CFG_IND";
  899. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  900. return "QDSS_TRACE_REQ_MEM";
  901. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  902. return "FW_MEM_FILE_SAVE";
  903. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  904. return "QDSS_TRACE_FREE";
  905. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  906. return "QDSS_TRACE_REQ_DATA";
  907. case CNSS_DRIVER_EVENT_MAX:
  908. return "EVENT_MAX";
  909. }
  910. return "UNKNOWN";
  911. };
  912. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  913. enum cnss_driver_event_type type,
  914. u32 flags, void *data)
  915. {
  916. struct cnss_driver_event *event;
  917. unsigned long irq_flags;
  918. int gfp = GFP_KERNEL;
  919. int ret = 0;
  920. if (!plat_priv)
  921. return -ENODEV;
  922. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  923. cnss_driver_event_to_str(type), type,
  924. flags ? "-sync" : "", plat_priv->driver_state, flags);
  925. if (type >= CNSS_DRIVER_EVENT_MAX) {
  926. cnss_pr_err("Invalid Event type: %d, can't post", type);
  927. return -EINVAL;
  928. }
  929. if (in_interrupt() || irqs_disabled())
  930. gfp = GFP_ATOMIC;
  931. event = kzalloc(sizeof(*event), gfp);
  932. if (!event)
  933. return -ENOMEM;
  934. cnss_pm_stay_awake(plat_priv);
  935. event->type = type;
  936. event->data = data;
  937. init_completion(&event->complete);
  938. event->ret = CNSS_EVENT_PENDING;
  939. event->sync = !!(flags & CNSS_EVENT_SYNC);
  940. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  941. list_add_tail(&event->list, &plat_priv->event_list);
  942. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  943. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  944. if (!(flags & CNSS_EVENT_SYNC))
  945. goto out;
  946. if (flags & CNSS_EVENT_UNKILLABLE)
  947. wait_for_completion(&event->complete);
  948. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  949. ret = wait_for_completion_killable(&event->complete);
  950. else
  951. ret = wait_for_completion_interruptible(&event->complete);
  952. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  953. cnss_driver_event_to_str(type), type,
  954. plat_priv->driver_state, ret, event->ret);
  955. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  956. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  957. event->sync = false;
  958. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  959. ret = -EINTR;
  960. goto out;
  961. }
  962. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  963. ret = event->ret;
  964. kfree(event);
  965. out:
  966. cnss_pm_relax(plat_priv);
  967. return ret;
  968. }
  969. /**
  970. * cnss_get_timeout - Get timeout for corresponding type.
  971. * @plat_priv: Pointer to platform driver context.
  972. * @cnss_timeout_type: Timeout type.
  973. *
  974. * Return: Timeout in milliseconds.
  975. */
  976. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  977. enum cnss_timeout_type timeout_type)
  978. {
  979. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  980. switch (timeout_type) {
  981. case CNSS_TIMEOUT_QMI:
  982. return qmi_timeout;
  983. case CNSS_TIMEOUT_POWER_UP:
  984. return (qmi_timeout << 2);
  985. case CNSS_TIMEOUT_IDLE_RESTART:
  986. /* In idle restart power up sequence, we have fw_boot_timer to
  987. * handle FW initialization failure.
  988. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  989. * account for FW dump collection and FW re-initialization on
  990. * retry.
  991. */
  992. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  993. case CNSS_TIMEOUT_CALIBRATION:
  994. /* Similar to mission mode, in CBC if FW init fails
  995. * fw recovery is tried. Thus return 2x the CBC timeout.
  996. */
  997. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  998. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  999. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1000. case CNSS_TIMEOUT_RDDM:
  1001. return CNSS_RDDM_TIMEOUT_MS;
  1002. case CNSS_TIMEOUT_RECOVERY:
  1003. return RECOVERY_TIMEOUT;
  1004. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1005. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1006. default:
  1007. return qmi_timeout;
  1008. }
  1009. }
  1010. unsigned int cnss_get_boot_timeout(struct device *dev)
  1011. {
  1012. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1013. if (!plat_priv) {
  1014. cnss_pr_err("plat_priv is NULL\n");
  1015. return 0;
  1016. }
  1017. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1018. }
  1019. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1020. int cnss_power_up(struct device *dev)
  1021. {
  1022. int ret = 0;
  1023. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1024. unsigned int timeout;
  1025. if (!plat_priv) {
  1026. cnss_pr_err("plat_priv is NULL\n");
  1027. return -ENODEV;
  1028. }
  1029. cnss_pr_dbg("Powering up device\n");
  1030. ret = cnss_driver_event_post(plat_priv,
  1031. CNSS_DRIVER_EVENT_POWER_UP,
  1032. CNSS_EVENT_SYNC, NULL);
  1033. if (ret)
  1034. goto out;
  1035. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1036. goto out;
  1037. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1038. reinit_completion(&plat_priv->power_up_complete);
  1039. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1040. msecs_to_jiffies(timeout));
  1041. if (!ret) {
  1042. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1043. timeout);
  1044. ret = -EAGAIN;
  1045. goto out;
  1046. }
  1047. return 0;
  1048. out:
  1049. return ret;
  1050. }
  1051. EXPORT_SYMBOL(cnss_power_up);
  1052. int cnss_power_down(struct device *dev)
  1053. {
  1054. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1055. if (!plat_priv) {
  1056. cnss_pr_err("plat_priv is NULL\n");
  1057. return -ENODEV;
  1058. }
  1059. cnss_pr_dbg("Powering down device\n");
  1060. return cnss_driver_event_post(plat_priv,
  1061. CNSS_DRIVER_EVENT_POWER_DOWN,
  1062. CNSS_EVENT_SYNC, NULL);
  1063. }
  1064. EXPORT_SYMBOL(cnss_power_down);
  1065. int cnss_idle_restart(struct device *dev)
  1066. {
  1067. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1068. unsigned int timeout;
  1069. int ret = 0;
  1070. if (!plat_priv) {
  1071. cnss_pr_err("plat_priv is NULL\n");
  1072. return -ENODEV;
  1073. }
  1074. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1075. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1076. return -EBUSY;
  1077. }
  1078. cnss_pr_dbg("Doing idle restart\n");
  1079. reinit_completion(&plat_priv->power_up_complete);
  1080. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1081. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1082. ret = -EINVAL;
  1083. goto out;
  1084. }
  1085. ret = cnss_driver_event_post(plat_priv,
  1086. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1087. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1088. if (ret)
  1089. goto out;
  1090. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1091. ret = cnss_bus_call_driver_probe(plat_priv);
  1092. goto out;
  1093. }
  1094. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1095. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1096. msecs_to_jiffies(timeout));
  1097. if (plat_priv->power_up_error) {
  1098. ret = plat_priv->power_up_error;
  1099. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1100. cnss_pr_dbg("Power up error:%d, exiting\n",
  1101. plat_priv->power_up_error);
  1102. goto out;
  1103. }
  1104. if (!ret) {
  1105. /* This exception occurs after attempting retry of FW recovery.
  1106. * Thus we can safely power off the device.
  1107. */
  1108. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1109. timeout);
  1110. ret = -ETIMEDOUT;
  1111. cnss_power_down(dev);
  1112. CNSS_ASSERT(0);
  1113. goto out;
  1114. }
  1115. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1116. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1117. del_timer(&plat_priv->fw_boot_timer);
  1118. ret = -EINVAL;
  1119. goto out;
  1120. }
  1121. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1122. * non-DRV is supported only once after device reboots and before wifi
  1123. * is turned on. We do not allow switching back to DRV.
  1124. * To bring device back into DRV, user needs to reboot device.
  1125. */
  1126. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1127. cnss_pr_dbg("DRV is disabled\n");
  1128. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1129. }
  1130. mutex_unlock(&plat_priv->driver_ops_lock);
  1131. return 0;
  1132. out:
  1133. mutex_unlock(&plat_priv->driver_ops_lock);
  1134. return ret;
  1135. }
  1136. EXPORT_SYMBOL(cnss_idle_restart);
  1137. int cnss_idle_shutdown(struct device *dev)
  1138. {
  1139. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1140. if (!plat_priv) {
  1141. cnss_pr_err("plat_priv is NULL\n");
  1142. return -ENODEV;
  1143. }
  1144. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1145. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1146. return -EAGAIN;
  1147. }
  1148. cnss_pr_dbg("Doing idle shutdown\n");
  1149. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1150. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1151. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1152. return -EBUSY;
  1153. }
  1154. return cnss_driver_event_post(plat_priv,
  1155. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1156. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1157. }
  1158. EXPORT_SYMBOL(cnss_idle_shutdown);
  1159. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1160. {
  1161. int ret = 0;
  1162. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1163. if (ret < 0) {
  1164. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1165. goto out;
  1166. }
  1167. ret = cnss_get_clk(plat_priv);
  1168. if (ret) {
  1169. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1170. goto put_vreg;
  1171. }
  1172. ret = cnss_get_pinctrl(plat_priv);
  1173. if (ret) {
  1174. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1175. goto put_clk;
  1176. }
  1177. return 0;
  1178. put_clk:
  1179. cnss_put_clk(plat_priv);
  1180. put_vreg:
  1181. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1182. out:
  1183. return ret;
  1184. }
  1185. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1186. {
  1187. cnss_put_clk(plat_priv);
  1188. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1189. }
  1190. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1191. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1192. unsigned long code,
  1193. void *ss_handle)
  1194. {
  1195. struct cnss_plat_data *plat_priv =
  1196. container_of(nb, struct cnss_plat_data, modem_nb);
  1197. struct cnss_esoc_info *esoc_info;
  1198. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1199. if (!plat_priv)
  1200. return NOTIFY_DONE;
  1201. esoc_info = &plat_priv->esoc_info;
  1202. if (code == SUBSYS_AFTER_POWERUP)
  1203. esoc_info->modem_current_status = 1;
  1204. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1205. esoc_info->modem_current_status = 0;
  1206. else
  1207. return NOTIFY_DONE;
  1208. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1209. esoc_info->modem_current_status))
  1210. return NOTIFY_DONE;
  1211. return NOTIFY_OK;
  1212. }
  1213. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1214. {
  1215. int ret = 0;
  1216. struct device *dev;
  1217. struct cnss_esoc_info *esoc_info;
  1218. struct esoc_desc *esoc_desc;
  1219. const char *client_desc;
  1220. dev = &plat_priv->plat_dev->dev;
  1221. esoc_info = &plat_priv->esoc_info;
  1222. esoc_info->notify_modem_status =
  1223. of_property_read_bool(dev->of_node,
  1224. "qcom,notify-modem-status");
  1225. if (!esoc_info->notify_modem_status)
  1226. goto out;
  1227. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1228. &client_desc);
  1229. if (ret) {
  1230. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1231. } else {
  1232. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1233. if (IS_ERR_OR_NULL(esoc_desc)) {
  1234. ret = PTR_RET(esoc_desc);
  1235. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1236. ret);
  1237. goto out;
  1238. }
  1239. esoc_info->esoc_desc = esoc_desc;
  1240. }
  1241. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1242. esoc_info->modem_current_status = 0;
  1243. esoc_info->modem_notify_handler =
  1244. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1245. esoc_info->esoc_desc->name :
  1246. "modem", &plat_priv->modem_nb);
  1247. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1248. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1249. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1250. ret);
  1251. goto unreg_esoc;
  1252. }
  1253. return 0;
  1254. unreg_esoc:
  1255. if (esoc_info->esoc_desc)
  1256. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1257. out:
  1258. return ret;
  1259. }
  1260. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1261. {
  1262. struct device *dev;
  1263. struct cnss_esoc_info *esoc_info;
  1264. dev = &plat_priv->plat_dev->dev;
  1265. esoc_info = &plat_priv->esoc_info;
  1266. if (esoc_info->notify_modem_status)
  1267. subsys_notif_unregister_notifier
  1268. (esoc_info->modem_notify_handler,
  1269. &plat_priv->modem_nb);
  1270. if (esoc_info->esoc_desc)
  1271. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1272. }
  1273. #else
  1274. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1275. {
  1276. return 0;
  1277. }
  1278. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1279. #endif
  1280. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1281. {
  1282. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1283. int ret = 0;
  1284. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1285. return 0;
  1286. enable_irq(sol_gpio->dev_sol_irq);
  1287. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1288. if (ret)
  1289. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1290. ret);
  1291. return ret;
  1292. }
  1293. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1294. {
  1295. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1296. int ret = 0;
  1297. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1298. return 0;
  1299. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1300. if (ret)
  1301. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1302. ret);
  1303. disable_irq(sol_gpio->dev_sol_irq);
  1304. return ret;
  1305. }
  1306. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1307. {
  1308. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1309. if (sol_gpio->dev_sol_gpio < 0)
  1310. return -EINVAL;
  1311. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1312. }
  1313. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1314. {
  1315. struct cnss_plat_data *plat_priv = data;
  1316. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1317. sol_gpio->dev_sol_counter++;
  1318. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1319. irq, sol_gpio->dev_sol_counter);
  1320. /* Make sure abort current suspend */
  1321. cnss_pm_stay_awake(plat_priv);
  1322. cnss_pm_relax(plat_priv);
  1323. pm_system_wakeup();
  1324. cnss_bus_handle_dev_sol_irq(plat_priv);
  1325. return IRQ_HANDLED;
  1326. }
  1327. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1328. {
  1329. struct device *dev = &plat_priv->plat_dev->dev;
  1330. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1331. int ret = 0;
  1332. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1333. "wlan-dev-sol-gpio", 0);
  1334. if (sol_gpio->dev_sol_gpio < 0)
  1335. goto out;
  1336. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1337. sol_gpio->dev_sol_gpio);
  1338. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1339. if (ret) {
  1340. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1341. ret);
  1342. goto out;
  1343. }
  1344. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1345. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1346. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1347. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1348. if (ret) {
  1349. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1350. goto free_gpio;
  1351. }
  1352. return 0;
  1353. free_gpio:
  1354. gpio_free(sol_gpio->dev_sol_gpio);
  1355. out:
  1356. return ret;
  1357. }
  1358. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1359. {
  1360. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1361. if (sol_gpio->dev_sol_gpio < 0)
  1362. return;
  1363. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1364. gpio_free(sol_gpio->dev_sol_gpio);
  1365. }
  1366. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1367. {
  1368. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1369. if (sol_gpio->host_sol_gpio < 0)
  1370. return -EINVAL;
  1371. if (value)
  1372. cnss_pr_dbg("Assert host SOL GPIO\n");
  1373. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1374. return 0;
  1375. }
  1376. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1377. {
  1378. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1379. if (sol_gpio->host_sol_gpio < 0)
  1380. return -EINVAL;
  1381. return gpio_get_value(sol_gpio->host_sol_gpio);
  1382. }
  1383. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1384. {
  1385. struct device *dev = &plat_priv->plat_dev->dev;
  1386. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1387. int ret = 0;
  1388. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1389. "wlan-host-sol-gpio", 0);
  1390. if (sol_gpio->host_sol_gpio < 0)
  1391. goto out;
  1392. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1393. sol_gpio->host_sol_gpio);
  1394. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1395. if (ret) {
  1396. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1397. ret);
  1398. goto out;
  1399. }
  1400. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1401. return 0;
  1402. out:
  1403. return ret;
  1404. }
  1405. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1406. {
  1407. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1408. if (sol_gpio->host_sol_gpio < 0)
  1409. return;
  1410. gpio_free(sol_gpio->host_sol_gpio);
  1411. }
  1412. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1413. {
  1414. int ret;
  1415. ret = cnss_init_dev_sol_gpio(plat_priv);
  1416. if (ret)
  1417. goto out;
  1418. ret = cnss_init_host_sol_gpio(plat_priv);
  1419. if (ret)
  1420. goto deinit_dev_sol;
  1421. return 0;
  1422. deinit_dev_sol:
  1423. cnss_deinit_dev_sol_gpio(plat_priv);
  1424. out:
  1425. return ret;
  1426. }
  1427. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1428. {
  1429. cnss_deinit_host_sol_gpio(plat_priv);
  1430. cnss_deinit_dev_sol_gpio(plat_priv);
  1431. }
  1432. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1433. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1434. {
  1435. struct cnss_plat_data *plat_priv;
  1436. int ret = 0;
  1437. if (!subsys_desc->dev) {
  1438. cnss_pr_err("dev from subsys_desc is NULL\n");
  1439. return -ENODEV;
  1440. }
  1441. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1442. if (!plat_priv) {
  1443. cnss_pr_err("plat_priv is NULL\n");
  1444. return -ENODEV;
  1445. }
  1446. if (!plat_priv->driver_state) {
  1447. cnss_pr_dbg("subsys powerup is ignored\n");
  1448. return 0;
  1449. }
  1450. ret = cnss_bus_dev_powerup(plat_priv);
  1451. if (ret)
  1452. __pm_relax(plat_priv->recovery_ws);
  1453. return ret;
  1454. }
  1455. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1456. bool force_stop)
  1457. {
  1458. struct cnss_plat_data *plat_priv;
  1459. if (!subsys_desc->dev) {
  1460. cnss_pr_err("dev from subsys_desc is NULL\n");
  1461. return -ENODEV;
  1462. }
  1463. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1464. if (!plat_priv) {
  1465. cnss_pr_err("plat_priv is NULL\n");
  1466. return -ENODEV;
  1467. }
  1468. if (!plat_priv->driver_state) {
  1469. cnss_pr_dbg("subsys shutdown is ignored\n");
  1470. return 0;
  1471. }
  1472. return cnss_bus_dev_shutdown(plat_priv);
  1473. }
  1474. void cnss_device_crashed(struct device *dev)
  1475. {
  1476. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1477. struct cnss_subsys_info *subsys_info;
  1478. if (!plat_priv)
  1479. return;
  1480. subsys_info = &plat_priv->subsys_info;
  1481. if (subsys_info->subsys_device) {
  1482. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1483. subsys_set_crash_status(subsys_info->subsys_device, true);
  1484. subsystem_restart_dev(subsys_info->subsys_device);
  1485. }
  1486. }
  1487. EXPORT_SYMBOL(cnss_device_crashed);
  1488. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1489. {
  1490. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1491. if (!plat_priv) {
  1492. cnss_pr_err("plat_priv is NULL\n");
  1493. return;
  1494. }
  1495. cnss_bus_dev_crash_shutdown(plat_priv);
  1496. }
  1497. static int cnss_subsys_ramdump(int enable,
  1498. const struct subsys_desc *subsys_desc)
  1499. {
  1500. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1501. if (!plat_priv) {
  1502. cnss_pr_err("plat_priv is NULL\n");
  1503. return -ENODEV;
  1504. }
  1505. if (!enable)
  1506. return 0;
  1507. return cnss_bus_dev_ramdump(plat_priv);
  1508. }
  1509. static void cnss_recovery_work_handler(struct work_struct *work)
  1510. {
  1511. }
  1512. #else
  1513. static void cnss_recovery_work_handler(struct work_struct *work)
  1514. {
  1515. int ret;
  1516. struct cnss_plat_data *plat_priv =
  1517. container_of(work, struct cnss_plat_data, recovery_work);
  1518. if (!plat_priv->recovery_enabled)
  1519. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1520. cnss_bus_dev_shutdown(plat_priv);
  1521. cnss_bus_dev_ramdump(plat_priv);
  1522. msleep(POWER_RESET_MIN_DELAY_MS);
  1523. ret = cnss_bus_dev_powerup(plat_priv);
  1524. if (ret)
  1525. __pm_relax(plat_priv->recovery_ws);
  1526. return;
  1527. }
  1528. void cnss_device_crashed(struct device *dev)
  1529. {
  1530. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1531. if (!plat_priv)
  1532. return;
  1533. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1534. schedule_work(&plat_priv->recovery_work);
  1535. }
  1536. EXPORT_SYMBOL(cnss_device_crashed);
  1537. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1538. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1539. {
  1540. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1541. struct cnss_ramdump_info *ramdump_info;
  1542. if (!plat_priv)
  1543. return NULL;
  1544. ramdump_info = &plat_priv->ramdump_info;
  1545. *size = ramdump_info->ramdump_size;
  1546. return ramdump_info->ramdump_va;
  1547. }
  1548. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1549. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1550. {
  1551. switch (reason) {
  1552. case CNSS_REASON_DEFAULT:
  1553. return "DEFAULT";
  1554. case CNSS_REASON_LINK_DOWN:
  1555. return "LINK_DOWN";
  1556. case CNSS_REASON_RDDM:
  1557. return "RDDM";
  1558. case CNSS_REASON_TIMEOUT:
  1559. return "TIMEOUT";
  1560. }
  1561. return "UNKNOWN";
  1562. };
  1563. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1564. enum cnss_recovery_reason reason)
  1565. {
  1566. plat_priv->recovery_count++;
  1567. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1568. goto self_recovery;
  1569. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1570. cnss_pr_dbg("Skip device recovery\n");
  1571. return 0;
  1572. }
  1573. /* FW recovery sequence has multiple steps and firmware load requires
  1574. * linux PM in awake state. Thus hold the cnss wake source until
  1575. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1576. * time taken in this process.
  1577. */
  1578. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1579. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1580. true);
  1581. switch (reason) {
  1582. case CNSS_REASON_LINK_DOWN:
  1583. if (!cnss_bus_check_link_status(plat_priv)) {
  1584. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1585. return 0;
  1586. }
  1587. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1588. &plat_priv->ctrl_params.quirks))
  1589. goto self_recovery;
  1590. if (!cnss_bus_recover_link_down(plat_priv)) {
  1591. /* clear recovery bit here to avoid skipping
  1592. * the recovery work for RDDM later
  1593. */
  1594. clear_bit(CNSS_DRIVER_RECOVERY,
  1595. &plat_priv->driver_state);
  1596. return 0;
  1597. }
  1598. break;
  1599. case CNSS_REASON_RDDM:
  1600. cnss_bus_collect_dump_info(plat_priv, false);
  1601. break;
  1602. case CNSS_REASON_DEFAULT:
  1603. case CNSS_REASON_TIMEOUT:
  1604. break;
  1605. default:
  1606. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1607. cnss_recovery_reason_to_str(reason), reason);
  1608. break;
  1609. }
  1610. cnss_bus_device_crashed(plat_priv);
  1611. return 0;
  1612. self_recovery:
  1613. cnss_pr_dbg("Going for self recovery\n");
  1614. cnss_bus_dev_shutdown(plat_priv);
  1615. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1616. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1617. &plat_priv->ctrl_params.quirks);
  1618. cnss_bus_dev_powerup(plat_priv);
  1619. return 0;
  1620. }
  1621. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1622. void *data)
  1623. {
  1624. struct cnss_recovery_data *recovery_data = data;
  1625. int ret = 0;
  1626. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1627. cnss_recovery_reason_to_str(recovery_data->reason),
  1628. recovery_data->reason);
  1629. if (!plat_priv->driver_state) {
  1630. cnss_pr_err("Improper driver state, ignore recovery\n");
  1631. ret = -EINVAL;
  1632. goto out;
  1633. }
  1634. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1635. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1636. ret = -EINVAL;
  1637. goto out;
  1638. }
  1639. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1640. cnss_pr_err("Recovery is already in progress\n");
  1641. CNSS_ASSERT(0);
  1642. ret = -EINVAL;
  1643. goto out;
  1644. }
  1645. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1646. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1647. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1648. ret = -EINVAL;
  1649. goto out;
  1650. }
  1651. switch (plat_priv->device_id) {
  1652. case QCA6174_DEVICE_ID:
  1653. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1654. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1655. &plat_priv->driver_state)) {
  1656. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1657. ret = -EINVAL;
  1658. goto out;
  1659. }
  1660. break;
  1661. default:
  1662. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1663. set_bit(CNSS_FW_BOOT_RECOVERY,
  1664. &plat_priv->driver_state);
  1665. }
  1666. break;
  1667. }
  1668. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1669. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1670. out:
  1671. kfree(data);
  1672. return ret;
  1673. }
  1674. int cnss_self_recovery(struct device *dev,
  1675. enum cnss_recovery_reason reason)
  1676. {
  1677. cnss_schedule_recovery(dev, reason);
  1678. return 0;
  1679. }
  1680. EXPORT_SYMBOL(cnss_self_recovery);
  1681. void cnss_schedule_recovery(struct device *dev,
  1682. enum cnss_recovery_reason reason)
  1683. {
  1684. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1685. struct cnss_recovery_data *data;
  1686. int gfp = GFP_KERNEL;
  1687. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1688. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1689. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1690. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1691. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1692. return;
  1693. }
  1694. if (in_interrupt() || irqs_disabled())
  1695. gfp = GFP_ATOMIC;
  1696. data = kzalloc(sizeof(*data), gfp);
  1697. if (!data)
  1698. return;
  1699. data->reason = reason;
  1700. cnss_driver_event_post(plat_priv,
  1701. CNSS_DRIVER_EVENT_RECOVERY,
  1702. 0, data);
  1703. }
  1704. EXPORT_SYMBOL(cnss_schedule_recovery);
  1705. int cnss_force_fw_assert(struct device *dev)
  1706. {
  1707. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1708. if (!plat_priv) {
  1709. cnss_pr_err("plat_priv is NULL\n");
  1710. return -ENODEV;
  1711. }
  1712. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1713. cnss_pr_info("Forced FW assert is not supported\n");
  1714. return -EOPNOTSUPP;
  1715. }
  1716. if (cnss_bus_is_device_down(plat_priv)) {
  1717. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1718. return 0;
  1719. }
  1720. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1721. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1722. return 0;
  1723. }
  1724. if (in_interrupt() || irqs_disabled())
  1725. cnss_driver_event_post(plat_priv,
  1726. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1727. 0, NULL);
  1728. else
  1729. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1730. return 0;
  1731. }
  1732. EXPORT_SYMBOL(cnss_force_fw_assert);
  1733. int cnss_force_collect_rddm(struct device *dev)
  1734. {
  1735. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1736. unsigned int timeout;
  1737. int ret = 0;
  1738. if (!plat_priv) {
  1739. cnss_pr_err("plat_priv is NULL\n");
  1740. return -ENODEV;
  1741. }
  1742. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1743. cnss_pr_info("Force collect rddm is not supported\n");
  1744. return -EOPNOTSUPP;
  1745. }
  1746. if (cnss_bus_is_device_down(plat_priv)) {
  1747. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1748. goto wait_rddm;
  1749. }
  1750. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1751. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1752. goto wait_rddm;
  1753. }
  1754. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1755. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1756. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1757. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1758. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1759. return 0;
  1760. }
  1761. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1762. if (ret)
  1763. return ret;
  1764. wait_rddm:
  1765. reinit_completion(&plat_priv->rddm_complete);
  1766. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1767. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1768. msecs_to_jiffies(timeout));
  1769. if (!ret) {
  1770. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1771. timeout);
  1772. ret = -ETIMEDOUT;
  1773. } else if (ret > 0) {
  1774. ret = 0;
  1775. }
  1776. return ret;
  1777. }
  1778. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1779. int cnss_qmi_send_get(struct device *dev)
  1780. {
  1781. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1782. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1783. return 0;
  1784. return cnss_bus_qmi_send_get(plat_priv);
  1785. }
  1786. EXPORT_SYMBOL(cnss_qmi_send_get);
  1787. int cnss_qmi_send_put(struct device *dev)
  1788. {
  1789. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1790. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1791. return 0;
  1792. return cnss_bus_qmi_send_put(plat_priv);
  1793. }
  1794. EXPORT_SYMBOL(cnss_qmi_send_put);
  1795. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1796. int cmd_len, void *cb_ctx,
  1797. int (*cb)(void *ctx, void *event, int event_len))
  1798. {
  1799. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1800. int ret;
  1801. if (!plat_priv)
  1802. return -ENODEV;
  1803. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1804. return -EINVAL;
  1805. plat_priv->get_info_cb = cb;
  1806. plat_priv->get_info_cb_ctx = cb_ctx;
  1807. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1808. if (ret) {
  1809. plat_priv->get_info_cb = NULL;
  1810. plat_priv->get_info_cb_ctx = NULL;
  1811. }
  1812. return ret;
  1813. }
  1814. EXPORT_SYMBOL(cnss_qmi_send);
  1815. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1816. {
  1817. int ret = 0;
  1818. u32 retry = 0, timeout;
  1819. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1820. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1821. goto out;
  1822. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1823. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1824. goto out;
  1825. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1826. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1827. goto out;
  1828. }
  1829. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1830. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1831. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1832. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1833. CNSS_ASSERT(0);
  1834. return -EINVAL;
  1835. }
  1836. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1837. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1838. break;
  1839. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1840. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1841. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1842. CNSS_ASSERT(0);
  1843. ret = -EINVAL;
  1844. goto mark_cal_fail;
  1845. }
  1846. }
  1847. switch (plat_priv->device_id) {
  1848. case QCA6290_DEVICE_ID:
  1849. case QCA6390_DEVICE_ID:
  1850. case QCA6490_DEVICE_ID:
  1851. case KIWI_DEVICE_ID:
  1852. case MANGO_DEVICE_ID:
  1853. case PEACH_DEVICE_ID:
  1854. break;
  1855. default:
  1856. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1857. plat_priv->device_id);
  1858. ret = -EINVAL;
  1859. goto mark_cal_fail;
  1860. }
  1861. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1862. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1863. timeout = cnss_get_timeout(plat_priv,
  1864. CNSS_TIMEOUT_CALIBRATION);
  1865. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1866. timeout / 1000);
  1867. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1868. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1869. msecs_to_jiffies(timeout));
  1870. }
  1871. reinit_completion(&plat_priv->cal_complete);
  1872. ret = cnss_bus_dev_powerup(plat_priv);
  1873. mark_cal_fail:
  1874. if (ret) {
  1875. complete(&plat_priv->cal_complete);
  1876. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1877. /* Set CBC done in driver state to mark attempt and note error
  1878. * since calibration cannot be retried at boot.
  1879. */
  1880. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1881. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1882. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1883. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1884. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1885. goto out;
  1886. cnss_pr_info("Schedule WLAN driver load\n");
  1887. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1888. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1889. 0);
  1890. }
  1891. }
  1892. out:
  1893. return ret;
  1894. }
  1895. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1896. void *data)
  1897. {
  1898. struct cnss_cal_info *cal_info = data;
  1899. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1900. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1901. goto out;
  1902. switch (cal_info->cal_status) {
  1903. case CNSS_CAL_DONE:
  1904. cnss_pr_dbg("Calibration completed successfully\n");
  1905. plat_priv->cal_done = true;
  1906. break;
  1907. case CNSS_CAL_TIMEOUT:
  1908. case CNSS_CAL_FAILURE:
  1909. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1910. cal_info->cal_status);
  1911. break;
  1912. default:
  1913. cnss_pr_err("Unknown calibration status: %u\n",
  1914. cal_info->cal_status);
  1915. break;
  1916. }
  1917. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1918. cnss_bus_free_qdss_mem(plat_priv);
  1919. cnss_release_antenna_sharing(plat_priv);
  1920. cnss_bus_dev_shutdown(plat_priv);
  1921. msleep(POWER_RESET_MIN_DELAY_MS);
  1922. complete(&plat_priv->cal_complete);
  1923. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1924. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1925. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1926. cnss_cal_mem_upload_to_file(plat_priv);
  1927. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1928. goto out;
  1929. cnss_pr_dbg("Schedule WLAN driver load\n");
  1930. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1931. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1932. 0);
  1933. }
  1934. out:
  1935. kfree(data);
  1936. return 0;
  1937. }
  1938. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1939. {
  1940. int ret;
  1941. ret = cnss_bus_dev_powerup(plat_priv);
  1942. if (ret)
  1943. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1944. return ret;
  1945. }
  1946. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1947. {
  1948. cnss_bus_dev_shutdown(plat_priv);
  1949. return 0;
  1950. }
  1951. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1952. {
  1953. int ret = 0;
  1954. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1955. if (ret < 0)
  1956. return ret;
  1957. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1958. }
  1959. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1960. u32 mem_seg_len, u64 pa, u32 size)
  1961. {
  1962. int i = 0;
  1963. u64 offset = 0;
  1964. void *va = NULL;
  1965. u64 local_pa;
  1966. u32 local_size;
  1967. for (i = 0; i < mem_seg_len; i++) {
  1968. local_pa = (u64)fw_mem[i].pa;
  1969. local_size = (u32)fw_mem[i].size;
  1970. if (pa == local_pa && size <= local_size) {
  1971. va = fw_mem[i].va;
  1972. break;
  1973. }
  1974. if (pa > local_pa &&
  1975. pa < local_pa + local_size &&
  1976. pa + size <= local_pa + local_size) {
  1977. offset = pa - local_pa;
  1978. va = fw_mem[i].va + offset;
  1979. break;
  1980. }
  1981. }
  1982. return va;
  1983. }
  1984. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1985. void *data)
  1986. {
  1987. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1988. struct cnss_fw_mem *fw_mem_seg;
  1989. int ret = 0L;
  1990. void *va = NULL;
  1991. u32 i, fw_mem_seg_len;
  1992. switch (event_data->mem_type) {
  1993. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1994. if (!plat_priv->fw_mem_seg_len)
  1995. goto invalid_mem_save;
  1996. fw_mem_seg = plat_priv->fw_mem;
  1997. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1998. break;
  1999. case QMI_WLFW_MEM_QDSS_V01:
  2000. if (!plat_priv->qdss_mem_seg_len)
  2001. goto invalid_mem_save;
  2002. fw_mem_seg = plat_priv->qdss_mem;
  2003. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2004. break;
  2005. default:
  2006. goto invalid_mem_save;
  2007. }
  2008. for (i = 0; i < event_data->mem_seg_len; i++) {
  2009. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2010. event_data->mem_seg[i].addr,
  2011. event_data->mem_seg[i].size);
  2012. if (!va) {
  2013. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2014. &event_data->mem_seg[i].addr,
  2015. event_data->mem_type);
  2016. ret = -EINVAL;
  2017. break;
  2018. }
  2019. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2020. event_data->file_name,
  2021. event_data->mem_seg[i].size);
  2022. if (ret < 0) {
  2023. cnss_pr_err("Fail to save fw mem data: %d\n",
  2024. ret);
  2025. break;
  2026. }
  2027. }
  2028. kfree(data);
  2029. return ret;
  2030. invalid_mem_save:
  2031. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2032. event_data->mem_type);
  2033. kfree(data);
  2034. return -EINVAL;
  2035. }
  2036. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2037. {
  2038. cnss_bus_free_qdss_mem(plat_priv);
  2039. return 0;
  2040. }
  2041. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2042. void *data)
  2043. {
  2044. int ret = 0;
  2045. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2046. if (!plat_priv)
  2047. return -ENODEV;
  2048. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2049. event_data->total_size);
  2050. kfree(data);
  2051. return ret;
  2052. }
  2053. static void cnss_driver_event_work(struct work_struct *work)
  2054. {
  2055. struct cnss_plat_data *plat_priv =
  2056. container_of(work, struct cnss_plat_data, event_work);
  2057. struct cnss_driver_event *event;
  2058. unsigned long flags;
  2059. int ret = 0;
  2060. if (!plat_priv) {
  2061. cnss_pr_err("plat_priv is NULL!\n");
  2062. return;
  2063. }
  2064. cnss_pm_stay_awake(plat_priv);
  2065. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2066. while (!list_empty(&plat_priv->event_list)) {
  2067. event = list_first_entry(&plat_priv->event_list,
  2068. struct cnss_driver_event, list);
  2069. list_del(&event->list);
  2070. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2071. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2072. cnss_driver_event_to_str(event->type),
  2073. event->sync ? "-sync" : "", event->type,
  2074. plat_priv->driver_state);
  2075. switch (event->type) {
  2076. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2077. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2078. break;
  2079. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2080. ret = cnss_wlfw_server_exit(plat_priv);
  2081. break;
  2082. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2083. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2084. if (ret)
  2085. break;
  2086. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2087. break;
  2088. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2089. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2090. break;
  2091. case CNSS_DRIVER_EVENT_FW_READY:
  2092. ret = cnss_fw_ready_hdlr(plat_priv);
  2093. break;
  2094. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2095. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2096. break;
  2097. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2098. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2099. event->data);
  2100. break;
  2101. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2102. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2103. event->data);
  2104. break;
  2105. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2106. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2107. break;
  2108. case CNSS_DRIVER_EVENT_RECOVERY:
  2109. ret = cnss_driver_recovery_hdlr(plat_priv,
  2110. event->data);
  2111. break;
  2112. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2113. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2114. break;
  2115. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2116. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2117. &plat_priv->driver_state);
  2118. fallthrough;
  2119. case CNSS_DRIVER_EVENT_POWER_UP:
  2120. ret = cnss_power_up_hdlr(plat_priv);
  2121. break;
  2122. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2123. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2124. &plat_priv->driver_state);
  2125. fallthrough;
  2126. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2127. ret = cnss_power_down_hdlr(plat_priv);
  2128. break;
  2129. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2130. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2131. event->data);
  2132. break;
  2133. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2134. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2135. event->data);
  2136. break;
  2137. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2138. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2139. break;
  2140. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2141. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2142. event->data);
  2143. break;
  2144. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2145. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2146. break;
  2147. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2148. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2149. event->data);
  2150. break;
  2151. default:
  2152. cnss_pr_err("Invalid driver event type: %d",
  2153. event->type);
  2154. kfree(event);
  2155. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2156. continue;
  2157. }
  2158. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2159. if (event->sync) {
  2160. event->ret = ret;
  2161. complete(&event->complete);
  2162. continue;
  2163. }
  2164. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2165. kfree(event);
  2166. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2167. }
  2168. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2169. cnss_pm_relax(plat_priv);
  2170. }
  2171. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2172. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2173. {
  2174. int ret = 0;
  2175. struct cnss_subsys_info *subsys_info;
  2176. subsys_info = &plat_priv->subsys_info;
  2177. subsys_info->subsys_desc.name = plat_priv->device_name;
  2178. subsys_info->subsys_desc.owner = THIS_MODULE;
  2179. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2180. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2181. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2182. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2183. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2184. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2185. if (IS_ERR(subsys_info->subsys_device)) {
  2186. ret = PTR_ERR(subsys_info->subsys_device);
  2187. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2188. goto out;
  2189. }
  2190. subsys_info->subsys_handle =
  2191. subsystem_get(subsys_info->subsys_desc.name);
  2192. if (!subsys_info->subsys_handle) {
  2193. cnss_pr_err("Failed to get subsys_handle!\n");
  2194. ret = -EINVAL;
  2195. goto unregister_subsys;
  2196. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2197. ret = PTR_ERR(subsys_info->subsys_handle);
  2198. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2199. goto unregister_subsys;
  2200. }
  2201. return 0;
  2202. unregister_subsys:
  2203. subsys_unregister(subsys_info->subsys_device);
  2204. out:
  2205. return ret;
  2206. }
  2207. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2208. {
  2209. struct cnss_subsys_info *subsys_info;
  2210. subsys_info = &plat_priv->subsys_info;
  2211. subsystem_put(subsys_info->subsys_handle);
  2212. subsys_unregister(subsys_info->subsys_device);
  2213. }
  2214. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2215. {
  2216. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2217. return create_ramdump_device(subsys_info->subsys_desc.name,
  2218. subsys_info->subsys_desc.dev);
  2219. }
  2220. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2221. void *ramdump_dev)
  2222. {
  2223. destroy_ramdump_device(ramdump_dev);
  2224. }
  2225. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2226. {
  2227. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2228. struct ramdump_segment segment;
  2229. memset(&segment, 0, sizeof(segment));
  2230. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2231. segment.size = ramdump_info->ramdump_size;
  2232. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2233. }
  2234. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2235. {
  2236. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2237. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2238. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2239. struct ramdump_segment *ramdump_segs, *s;
  2240. struct cnss_dump_meta_info meta_info = {0};
  2241. int i, ret = 0;
  2242. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2243. sizeof(*ramdump_segs),
  2244. GFP_KERNEL);
  2245. if (!ramdump_segs)
  2246. return -ENOMEM;
  2247. s = ramdump_segs + 1;
  2248. for (i = 0; i < dump_data->nentries; i++) {
  2249. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2250. cnss_pr_err("Unsupported dump type: %d",
  2251. dump_seg->type);
  2252. continue;
  2253. }
  2254. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2255. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2256. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2257. }
  2258. meta_info.entry[dump_seg->type].entry_num++;
  2259. s->address = dump_seg->address;
  2260. s->v_address = (void __iomem *)dump_seg->v_address;
  2261. s->size = dump_seg->size;
  2262. s++;
  2263. dump_seg++;
  2264. }
  2265. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2266. meta_info.version = CNSS_RAMDUMP_VERSION;
  2267. meta_info.chipset = plat_priv->device_id;
  2268. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2269. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2270. ramdump_segs->size = sizeof(meta_info);
  2271. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2272. dump_data->nentries + 1);
  2273. kfree(ramdump_segs);
  2274. return ret;
  2275. }
  2276. #else
  2277. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2278. void *data)
  2279. {
  2280. struct cnss_plat_data *plat_priv =
  2281. container_of(nb, struct cnss_plat_data, panic_nb);
  2282. cnss_bus_dev_crash_shutdown(plat_priv);
  2283. return NOTIFY_DONE;
  2284. }
  2285. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2286. {
  2287. int ret;
  2288. if (!plat_priv)
  2289. return -ENODEV;
  2290. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2291. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2292. &plat_priv->panic_nb);
  2293. if (ret) {
  2294. cnss_pr_err("Failed to register panic handler\n");
  2295. return -EINVAL;
  2296. }
  2297. return 0;
  2298. }
  2299. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2300. {
  2301. int ret;
  2302. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2303. &plat_priv->panic_nb);
  2304. if (ret)
  2305. cnss_pr_err("Failed to unregister panic handler\n");
  2306. }
  2307. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2308. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2309. {
  2310. return &plat_priv->plat_dev->dev;
  2311. }
  2312. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2313. void *ramdump_dev)
  2314. {
  2315. }
  2316. #endif
  2317. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2318. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2319. {
  2320. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2321. struct qcom_dump_segment segment;
  2322. struct list_head head;
  2323. INIT_LIST_HEAD(&head);
  2324. memset(&segment, 0, sizeof(segment));
  2325. segment.va = ramdump_info->ramdump_va;
  2326. segment.size = ramdump_info->ramdump_size;
  2327. list_add(&segment.node, &head);
  2328. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2329. }
  2330. #else
  2331. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2332. {
  2333. return 0;
  2334. }
  2335. /* Using completion event inside dynamically allocated ramdump_desc
  2336. * may result a race between freeing the event after setting it to
  2337. * complete inside dev coredump free callback and the thread that is
  2338. * waiting for completion.
  2339. */
  2340. DECLARE_COMPLETION(dump_done);
  2341. #define TIMEOUT_SAVE_DUMP_MS 30000
  2342. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2343. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2344. { \
  2345. if (class == ELFCLASS32) \
  2346. return sizeof(struct elf32_##__xhdr); \
  2347. else \
  2348. return sizeof(struct elf64_##__xhdr); \
  2349. }
  2350. SIZEOF_ELF_STRUCT(phdr)
  2351. SIZEOF_ELF_STRUCT(hdr)
  2352. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2353. do { \
  2354. if (class == ELFCLASS32) \
  2355. ((struct elf32_##__xhdr *)arg)->member = value; \
  2356. else \
  2357. ((struct elf64_##__xhdr *)arg)->member = value; \
  2358. } while (0)
  2359. #define set_ehdr_property(arg, class, member, value) \
  2360. set_xhdr_property(hdr, arg, class, member, value)
  2361. #define set_phdr_property(arg, class, member, value) \
  2362. set_xhdr_property(phdr, arg, class, member, value)
  2363. /* These replace qcom_ramdump driver APIs called from common API
  2364. * cnss_do_elf_dump() by the ones defined here.
  2365. */
  2366. #define qcom_dump_segment cnss_qcom_dump_segment
  2367. #define qcom_elf_dump cnss_qcom_elf_dump
  2368. #define dump_enabled cnss_dump_enabled
  2369. struct cnss_qcom_dump_segment {
  2370. struct list_head node;
  2371. dma_addr_t da;
  2372. void *va;
  2373. size_t size;
  2374. };
  2375. struct cnss_qcom_ramdump_desc {
  2376. void *data;
  2377. struct completion dump_done;
  2378. };
  2379. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2380. void *data, size_t datalen)
  2381. {
  2382. struct cnss_qcom_ramdump_desc *desc = data;
  2383. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2384. datalen);
  2385. }
  2386. static void cnss_qcom_devcd_freev(void *data)
  2387. {
  2388. struct cnss_qcom_ramdump_desc *desc = data;
  2389. cnss_pr_dbg("Free dump data for dev coredump\n");
  2390. complete(&dump_done);
  2391. vfree(desc->data);
  2392. kfree(desc);
  2393. }
  2394. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2395. gfp_t gfp)
  2396. {
  2397. struct cnss_qcom_ramdump_desc *desc;
  2398. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2399. int ret;
  2400. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2401. if (!desc)
  2402. return -ENOMEM;
  2403. desc->data = data;
  2404. reinit_completion(&dump_done);
  2405. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2406. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2407. ret = wait_for_completion_timeout(&dump_done,
  2408. msecs_to_jiffies(timeout));
  2409. if (!ret)
  2410. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2411. timeout);
  2412. return ret ? 0 : -ETIMEDOUT;
  2413. }
  2414. /* Since the elf32 and elf64 identification is identical apart from
  2415. * the class, use elf32 by default.
  2416. */
  2417. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2418. {
  2419. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2420. ehdr->e_ident[EI_CLASS] = class;
  2421. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2422. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2423. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2424. }
  2425. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2426. unsigned char class)
  2427. {
  2428. struct cnss_qcom_dump_segment *segment;
  2429. void *phdr, *ehdr;
  2430. size_t data_size, offset;
  2431. int phnum = 0;
  2432. void *data;
  2433. void __iomem *ptr;
  2434. if (!segs || list_empty(segs))
  2435. return -EINVAL;
  2436. data_size = sizeof_elf_hdr(class);
  2437. list_for_each_entry(segment, segs, node) {
  2438. data_size += sizeof_elf_phdr(class) + segment->size;
  2439. phnum++;
  2440. }
  2441. data = vmalloc(data_size);
  2442. if (!data)
  2443. return -ENOMEM;
  2444. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2445. ehdr = data;
  2446. memset(ehdr, 0, sizeof_elf_hdr(class));
  2447. init_elf_identification(ehdr, class);
  2448. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2449. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2450. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2451. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2452. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2453. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2454. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2455. phdr = data + sizeof_elf_hdr(class);
  2456. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2457. list_for_each_entry(segment, segs, node) {
  2458. memset(phdr, 0, sizeof_elf_phdr(class));
  2459. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2460. set_phdr_property(phdr, class, p_offset, offset);
  2461. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2462. set_phdr_property(phdr, class, p_paddr, segment->da);
  2463. set_phdr_property(phdr, class, p_filesz, segment->size);
  2464. set_phdr_property(phdr, class, p_memsz, segment->size);
  2465. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2466. set_phdr_property(phdr, class, p_align, 0);
  2467. if (segment->va) {
  2468. memcpy(data + offset, segment->va, segment->size);
  2469. } else {
  2470. ptr = devm_ioremap(dev, segment->da, segment->size);
  2471. if (!ptr) {
  2472. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2473. &segment->da, segment->size);
  2474. memset(data + offset, 0xff, segment->size);
  2475. } else {
  2476. memcpy_fromio(data + offset, ptr,
  2477. segment->size);
  2478. }
  2479. }
  2480. offset += segment->size;
  2481. phdr += sizeof_elf_phdr(class);
  2482. }
  2483. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2484. }
  2485. /* Saving dump to file system is always needed in this case. */
  2486. static bool cnss_dump_enabled(void)
  2487. {
  2488. return true;
  2489. }
  2490. #endif /* CONFIG_QCOM_RAMDUMP */
  2491. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2492. {
  2493. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2494. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2495. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2496. struct qcom_dump_segment *seg;
  2497. struct cnss_dump_meta_info meta_info = {0};
  2498. struct list_head head;
  2499. int i, ret = 0;
  2500. if (!dump_enabled()) {
  2501. cnss_pr_info("Dump collection is not enabled\n");
  2502. return ret;
  2503. }
  2504. INIT_LIST_HEAD(&head);
  2505. for (i = 0; i < dump_data->nentries; i++) {
  2506. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2507. cnss_pr_err("Unsupported dump type: %d",
  2508. dump_seg->type);
  2509. continue;
  2510. }
  2511. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2512. if (!seg)
  2513. continue;
  2514. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2515. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2516. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2517. }
  2518. meta_info.entry[dump_seg->type].entry_num++;
  2519. seg->da = dump_seg->address;
  2520. seg->va = dump_seg->v_address;
  2521. seg->size = dump_seg->size;
  2522. list_add_tail(&seg->node, &head);
  2523. dump_seg++;
  2524. }
  2525. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2526. if (!seg)
  2527. goto do_elf_dump;
  2528. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2529. meta_info.version = CNSS_RAMDUMP_VERSION;
  2530. meta_info.chipset = plat_priv->device_id;
  2531. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2532. seg->va = &meta_info;
  2533. seg->size = sizeof(meta_info);
  2534. list_add(&seg->node, &head);
  2535. do_elf_dump:
  2536. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2537. while (!list_empty(&head)) {
  2538. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2539. list_del(&seg->node);
  2540. kfree(seg);
  2541. }
  2542. return ret;
  2543. }
  2544. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2545. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2546. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2547. size_t num_entries_loaded)
  2548. {
  2549. struct qcom_dump_segment *seg;
  2550. struct cnss_host_dump_meta_info meta_info = {0};
  2551. struct list_head head;
  2552. int dev_ret = 0;
  2553. struct device *new_device;
  2554. static const char * const wlan_str[] = {
  2555. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2556. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2557. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2558. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2559. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2560. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2561. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2562. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2563. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2564. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2565. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2566. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2567. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2568. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2569. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2570. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2571. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2572. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2573. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2574. };
  2575. int i, j;
  2576. int ret = 0;
  2577. if (!dump_enabled()) {
  2578. cnss_pr_info("Dump collection is not enabled\n");
  2579. return ret;
  2580. }
  2581. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2582. if (!new_device) {
  2583. cnss_pr_err("Failed to alloc device mem\n");
  2584. return -ENOMEM;
  2585. }
  2586. device_initialize(new_device);
  2587. dev_set_name(new_device, "wlan_driver");
  2588. dev_ret = device_add(new_device);
  2589. if (dev_ret) {
  2590. cnss_pr_err("Failed to add new device\n");
  2591. goto put_device;
  2592. }
  2593. INIT_LIST_HEAD(&head);
  2594. for (i = 0; i < num_entries_loaded; i++) {
  2595. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2596. if (!seg) {
  2597. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2598. continue;
  2599. }
  2600. seg->va = ssr_entry[i].buffer_pointer;
  2601. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2602. seg->size = ssr_entry[i].buffer_size;
  2603. for (j = 0; j < ARRAY_SIZE(wlan_str); j++) {
  2604. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2605. strlen(wlan_str[j])) == 0) {
  2606. meta_info.entry[i].type = j;
  2607. }
  2608. }
  2609. meta_info.entry[i].entry_start = i + 1;
  2610. meta_info.entry[i].entry_num++;
  2611. list_add_tail(&seg->node, &head);
  2612. }
  2613. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2614. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2615. meta_info.version = CNSS_RAMDUMP_VERSION;
  2616. meta_info.chipset = plat_priv->device_id;
  2617. meta_info.total_entries = num_entries_loaded;
  2618. seg->va = &meta_info;
  2619. seg->da = (dma_addr_t)&meta_info;
  2620. seg->size = sizeof(meta_info);
  2621. list_add(&seg->node, &head);
  2622. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2623. while (!list_empty(&head)) {
  2624. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2625. list_del(&seg->node);
  2626. kfree(seg);
  2627. }
  2628. device_del(new_device);
  2629. put_device:
  2630. put_device(new_device);
  2631. kfree(new_device);
  2632. return ret;
  2633. }
  2634. #endif
  2635. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2636. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2637. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2638. {
  2639. struct cnss_ramdump_info *ramdump_info;
  2640. struct msm_dump_entry dump_entry;
  2641. ramdump_info = &plat_priv->ramdump_info;
  2642. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2643. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2644. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2645. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2646. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2647. sizeof(ramdump_info->dump_data.name));
  2648. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2649. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2650. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2651. &dump_entry);
  2652. }
  2653. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2654. {
  2655. int ret = 0;
  2656. struct device *dev;
  2657. struct cnss_ramdump_info *ramdump_info;
  2658. u32 ramdump_size = 0;
  2659. dev = &plat_priv->plat_dev->dev;
  2660. ramdump_info = &plat_priv->ramdump_info;
  2661. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2662. /* dt type: legacy or converged */
  2663. ret = of_property_read_u32(dev->of_node,
  2664. "qcom,wlan-ramdump-dynamic",
  2665. &ramdump_size);
  2666. } else {
  2667. ret = of_property_read_u32(plat_priv->dev_node,
  2668. "qcom,wlan-ramdump-dynamic",
  2669. &ramdump_size);
  2670. }
  2671. if (ret == 0) {
  2672. ramdump_info->ramdump_va =
  2673. dma_alloc_coherent(dev, ramdump_size,
  2674. &ramdump_info->ramdump_pa,
  2675. GFP_KERNEL);
  2676. if (ramdump_info->ramdump_va)
  2677. ramdump_info->ramdump_size = ramdump_size;
  2678. }
  2679. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2680. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2681. if (ramdump_info->ramdump_size == 0) {
  2682. cnss_pr_info("Ramdump will not be collected");
  2683. goto out;
  2684. }
  2685. ret = cnss_init_dump_entry(plat_priv);
  2686. if (ret) {
  2687. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2688. goto free_ramdump;
  2689. }
  2690. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2691. if (!ramdump_info->ramdump_dev) {
  2692. cnss_pr_err("Failed to create ramdump device!");
  2693. ret = -ENOMEM;
  2694. goto free_ramdump;
  2695. }
  2696. return 0;
  2697. free_ramdump:
  2698. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2699. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2700. out:
  2701. return ret;
  2702. }
  2703. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2704. {
  2705. struct device *dev;
  2706. struct cnss_ramdump_info *ramdump_info;
  2707. dev = &plat_priv->plat_dev->dev;
  2708. ramdump_info = &plat_priv->ramdump_info;
  2709. if (ramdump_info->ramdump_dev)
  2710. cnss_destroy_ramdump_device(plat_priv,
  2711. ramdump_info->ramdump_dev);
  2712. if (ramdump_info->ramdump_va)
  2713. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2714. ramdump_info->ramdump_va,
  2715. ramdump_info->ramdump_pa);
  2716. }
  2717. /**
  2718. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2719. * @ret: Error returned by msm_dump_data_register_nominidump
  2720. *
  2721. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2722. * ignore failure.
  2723. *
  2724. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2725. */
  2726. static int cnss_ignore_dump_data_reg_fail(int ret)
  2727. {
  2728. return ret;
  2729. }
  2730. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2731. {
  2732. int ret = 0;
  2733. struct cnss_ramdump_info_v2 *info_v2;
  2734. struct cnss_dump_data *dump_data;
  2735. struct msm_dump_entry dump_entry;
  2736. struct device *dev = &plat_priv->plat_dev->dev;
  2737. u32 ramdump_size = 0;
  2738. info_v2 = &plat_priv->ramdump_info_v2;
  2739. dump_data = &info_v2->dump_data;
  2740. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2741. /* dt type: legacy or converged */
  2742. ret = of_property_read_u32(dev->of_node,
  2743. "qcom,wlan-ramdump-dynamic",
  2744. &ramdump_size);
  2745. } else {
  2746. ret = of_property_read_u32(plat_priv->dev_node,
  2747. "qcom,wlan-ramdump-dynamic",
  2748. &ramdump_size);
  2749. }
  2750. if (ret == 0)
  2751. info_v2->ramdump_size = ramdump_size;
  2752. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2753. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2754. if (!info_v2->dump_data_vaddr)
  2755. return -ENOMEM;
  2756. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2757. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2758. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2759. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2760. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2761. sizeof(dump_data->name));
  2762. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2763. dump_entry.addr = virt_to_phys(dump_data);
  2764. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2765. &dump_entry);
  2766. if (ret) {
  2767. ret = cnss_ignore_dump_data_reg_fail(ret);
  2768. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2769. ret ? "Error" : "Ignoring", ret);
  2770. goto free_ramdump;
  2771. }
  2772. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2773. if (!info_v2->ramdump_dev) {
  2774. cnss_pr_err("Failed to create ramdump device!\n");
  2775. ret = -ENOMEM;
  2776. goto free_ramdump;
  2777. }
  2778. return 0;
  2779. free_ramdump:
  2780. kfree(info_v2->dump_data_vaddr);
  2781. info_v2->dump_data_vaddr = NULL;
  2782. return ret;
  2783. }
  2784. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2785. {
  2786. struct cnss_ramdump_info_v2 *info_v2;
  2787. info_v2 = &plat_priv->ramdump_info_v2;
  2788. if (info_v2->ramdump_dev)
  2789. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2790. kfree(info_v2->dump_data_vaddr);
  2791. info_v2->dump_data_vaddr = NULL;
  2792. info_v2->dump_data_valid = false;
  2793. }
  2794. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2795. {
  2796. int ret = 0;
  2797. switch (plat_priv->device_id) {
  2798. case QCA6174_DEVICE_ID:
  2799. ret = cnss_register_ramdump_v1(plat_priv);
  2800. break;
  2801. case QCA6290_DEVICE_ID:
  2802. case QCA6390_DEVICE_ID:
  2803. case QCA6490_DEVICE_ID:
  2804. case KIWI_DEVICE_ID:
  2805. case MANGO_DEVICE_ID:
  2806. case PEACH_DEVICE_ID:
  2807. ret = cnss_register_ramdump_v2(plat_priv);
  2808. break;
  2809. default:
  2810. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2811. ret = -ENODEV;
  2812. break;
  2813. }
  2814. return ret;
  2815. }
  2816. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2817. {
  2818. switch (plat_priv->device_id) {
  2819. case QCA6174_DEVICE_ID:
  2820. cnss_unregister_ramdump_v1(plat_priv);
  2821. break;
  2822. case QCA6290_DEVICE_ID:
  2823. case QCA6390_DEVICE_ID:
  2824. case QCA6490_DEVICE_ID:
  2825. case KIWI_DEVICE_ID:
  2826. case MANGO_DEVICE_ID:
  2827. case PEACH_DEVICE_ID:
  2828. cnss_unregister_ramdump_v2(plat_priv);
  2829. break;
  2830. default:
  2831. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2832. break;
  2833. }
  2834. }
  2835. #else
  2836. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2837. {
  2838. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2839. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2840. struct device *dev = &plat_priv->plat_dev->dev;
  2841. u32 ramdump_size = 0;
  2842. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2843. &ramdump_size) == 0)
  2844. info_v2->ramdump_size = ramdump_size;
  2845. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2846. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2847. if (!info_v2->dump_data_vaddr)
  2848. return -ENOMEM;
  2849. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2850. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2851. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2852. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2853. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2854. sizeof(dump_data->name));
  2855. info_v2->ramdump_dev = dev;
  2856. return 0;
  2857. }
  2858. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2859. {
  2860. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2861. info_v2->ramdump_dev = NULL;
  2862. kfree(info_v2->dump_data_vaddr);
  2863. info_v2->dump_data_vaddr = NULL;
  2864. info_v2->dump_data_valid = false;
  2865. }
  2866. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2867. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2868. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2869. phys_addr_t *pa, unsigned long attrs)
  2870. {
  2871. struct sg_table sgt;
  2872. int ret;
  2873. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2874. if (ret) {
  2875. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2876. va, &dma, size, attrs);
  2877. return -EINVAL;
  2878. }
  2879. *pa = page_to_phys(sg_page(sgt.sgl));
  2880. sg_free_table(&sgt);
  2881. return 0;
  2882. }
  2883. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2884. enum cnss_fw_dump_type type, int seg_no,
  2885. void *va, phys_addr_t pa, size_t size)
  2886. {
  2887. struct md_region md_entry;
  2888. int ret;
  2889. switch (type) {
  2890. case CNSS_FW_IMAGE:
  2891. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2892. seg_no);
  2893. break;
  2894. case CNSS_FW_RDDM:
  2895. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2896. seg_no);
  2897. break;
  2898. case CNSS_FW_REMOTE_HEAP:
  2899. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2900. seg_no);
  2901. break;
  2902. default:
  2903. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2904. return -EINVAL;
  2905. }
  2906. md_entry.phys_addr = pa;
  2907. md_entry.virt_addr = (uintptr_t)va;
  2908. md_entry.size = size;
  2909. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2910. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2911. md_entry.name, va, &pa, size);
  2912. ret = msm_minidump_add_region(&md_entry);
  2913. if (ret < 0)
  2914. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2915. return ret;
  2916. }
  2917. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2918. enum cnss_fw_dump_type type, int seg_no,
  2919. void *va, phys_addr_t pa, size_t size)
  2920. {
  2921. struct md_region md_entry;
  2922. int ret;
  2923. switch (type) {
  2924. case CNSS_FW_IMAGE:
  2925. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2926. seg_no);
  2927. break;
  2928. case CNSS_FW_RDDM:
  2929. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2930. seg_no);
  2931. break;
  2932. case CNSS_FW_REMOTE_HEAP:
  2933. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2934. seg_no);
  2935. break;
  2936. default:
  2937. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2938. return -EINVAL;
  2939. }
  2940. md_entry.phys_addr = pa;
  2941. md_entry.virt_addr = (uintptr_t)va;
  2942. md_entry.size = size;
  2943. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2944. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2945. md_entry.name, va, &pa, size);
  2946. ret = msm_minidump_remove_region(&md_entry);
  2947. if (ret)
  2948. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2949. ret);
  2950. return ret;
  2951. }
  2952. #else
  2953. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2954. phys_addr_t *pa, unsigned long attrs)
  2955. {
  2956. return 0;
  2957. }
  2958. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2959. enum cnss_fw_dump_type type, int seg_no,
  2960. void *va, phys_addr_t pa, size_t size)
  2961. {
  2962. return 0;
  2963. }
  2964. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2965. enum cnss_fw_dump_type type, int seg_no,
  2966. void *va, phys_addr_t pa, size_t size)
  2967. {
  2968. return 0;
  2969. }
  2970. #endif /* CONFIG_QCOM_MINIDUMP */
  2971. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2972. const struct firmware **fw_entry,
  2973. const char *filename)
  2974. {
  2975. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2976. return request_firmware_direct(fw_entry, filename,
  2977. &plat_priv->plat_dev->dev);
  2978. else
  2979. return firmware_request_nowarn(fw_entry, filename,
  2980. &plat_priv->plat_dev->dev);
  2981. }
  2982. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2983. /**
  2984. * cnss_register_bus_scale() - Setup interconnect voting data
  2985. * @plat_priv: Platform data structure
  2986. *
  2987. * For different interconnect path configured in device tree setup voting data
  2988. * for list of bandwidth requirements.
  2989. *
  2990. * Result: 0 for success. -EINVAL if not configured
  2991. */
  2992. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2993. {
  2994. int ret = -EINVAL;
  2995. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2996. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2997. struct device *dev = &plat_priv->plat_dev->dev;
  2998. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2999. ret = of_property_read_u32(dev->of_node,
  3000. "qcom,icc-path-count",
  3001. &plat_priv->icc.path_count);
  3002. if (ret) {
  3003. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3004. return 0;
  3005. }
  3006. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3007. "qcom,bus-bw-cfg-count",
  3008. &plat_priv->icc.bus_bw_cfg_count);
  3009. if (ret) {
  3010. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3011. goto cleanup;
  3012. }
  3013. cfg_arr_size = plat_priv->icc.path_count *
  3014. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3015. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3016. if (!cfg_arr) {
  3017. cnss_pr_err("Failed to alloc cfg table mem\n");
  3018. ret = -ENOMEM;
  3019. goto cleanup;
  3020. }
  3021. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3022. "qcom,bus-bw-cfg", cfg_arr,
  3023. cfg_arr_size);
  3024. if (ret) {
  3025. cnss_pr_err("Invalid Bus BW Config Table\n");
  3026. goto cleanup;
  3027. }
  3028. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3029. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3030. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3031. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3032. GFP_KERNEL);
  3033. if (!bus_bw_info) {
  3034. ret = -ENOMEM;
  3035. goto out;
  3036. }
  3037. ret = of_property_read_string_index(dev->of_node,
  3038. "interconnect-names", idx,
  3039. &bus_bw_info->icc_name);
  3040. if (ret)
  3041. goto out;
  3042. bus_bw_info->icc_path =
  3043. of_icc_get(&plat_priv->plat_dev->dev,
  3044. bus_bw_info->icc_name);
  3045. if (IS_ERR(bus_bw_info->icc_path)) {
  3046. ret = PTR_ERR(bus_bw_info->icc_path);
  3047. if (ret != -EPROBE_DEFER) {
  3048. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3049. bus_bw_info->icc_name, ret);
  3050. goto out;
  3051. }
  3052. }
  3053. bus_bw_info->cfg_table =
  3054. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3055. sizeof(*bus_bw_info->cfg_table),
  3056. GFP_KERNEL);
  3057. if (!bus_bw_info->cfg_table) {
  3058. ret = -ENOMEM;
  3059. goto out;
  3060. }
  3061. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3062. bus_bw_info->icc_name);
  3063. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3064. CNSS_ICC_VOTE_MAX);
  3065. i < plat_priv->icc.bus_bw_cfg_count;
  3066. i++, j += 2) {
  3067. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3068. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3069. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3070. i, bus_bw_info->cfg_table[i].avg_bw,
  3071. bus_bw_info->cfg_table[i].peak_bw);
  3072. }
  3073. list_add_tail(&bus_bw_info->list,
  3074. &plat_priv->icc.list_head);
  3075. }
  3076. kfree(cfg_arr);
  3077. return 0;
  3078. out:
  3079. list_for_each_entry_safe(bus_bw_info, tmp,
  3080. &plat_priv->icc.list_head, list) {
  3081. list_del(&bus_bw_info->list);
  3082. }
  3083. cleanup:
  3084. kfree(cfg_arr);
  3085. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3086. return ret;
  3087. }
  3088. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3089. {
  3090. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3091. list_for_each_entry_safe(bus_bw_info, tmp,
  3092. &plat_priv->icc.list_head, list) {
  3093. list_del(&bus_bw_info->list);
  3094. if (bus_bw_info->icc_path)
  3095. icc_put(bus_bw_info->icc_path);
  3096. }
  3097. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3098. }
  3099. #else
  3100. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3101. {
  3102. return 0;
  3103. }
  3104. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3105. #endif /* CONFIG_INTERCONNECT */
  3106. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3107. {
  3108. struct cnss_plat_data *plat_priv = cb_ctx;
  3109. if (!plat_priv) {
  3110. cnss_pr_err("%s: Invalid context\n", __func__);
  3111. return;
  3112. }
  3113. if (status) {
  3114. cnss_pr_info("CNSS Daemon connected\n");
  3115. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3116. complete(&plat_priv->daemon_connected);
  3117. } else {
  3118. cnss_pr_info("CNSS Daemon disconnected\n");
  3119. reinit_completion(&plat_priv->daemon_connected);
  3120. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3121. }
  3122. }
  3123. static ssize_t enable_hds_store(struct device *dev,
  3124. struct device_attribute *attr,
  3125. const char *buf, size_t count)
  3126. {
  3127. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3128. unsigned int enable_hds = 0;
  3129. if (!plat_priv)
  3130. return -ENODEV;
  3131. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3132. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3133. return -EINVAL;
  3134. }
  3135. if (enable_hds)
  3136. plat_priv->hds_enabled = true;
  3137. else
  3138. plat_priv->hds_enabled = false;
  3139. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3140. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3141. return count;
  3142. }
  3143. static ssize_t recovery_show(struct device *dev,
  3144. struct device_attribute *attr,
  3145. char *buf)
  3146. {
  3147. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3148. u32 buf_size = PAGE_SIZE;
  3149. u32 curr_len = 0;
  3150. u32 buf_written = 0;
  3151. if (!plat_priv)
  3152. return -ENODEV;
  3153. buf_written = scnprintf(buf, buf_size,
  3154. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3155. "BIT0 -- wlan fw recovery\n"
  3156. "BIT1 -- wlan pcss recovery\n"
  3157. "---------------------------------\n");
  3158. curr_len += buf_written;
  3159. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3160. "WLAN recovery %s[%d]\n",
  3161. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3162. plat_priv->recovery_enabled);
  3163. curr_len += buf_written;
  3164. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3165. "WLAN PCSS recovery %s[%d]\n",
  3166. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3167. plat_priv->recovery_pcss_enabled);
  3168. curr_len += buf_written;
  3169. /*
  3170. * Now size of curr_len is not over page size for sure,
  3171. * later if new item or none-fixed size item added, need
  3172. * add check to make sure curr_len is not over page size.
  3173. */
  3174. return curr_len;
  3175. }
  3176. static ssize_t time_sync_period_show(struct device *dev,
  3177. struct device_attribute *attr,
  3178. char *buf)
  3179. {
  3180. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3181. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3182. plat_priv->ctrl_params.time_sync_period);
  3183. }
  3184. static ssize_t time_sync_period_store(struct device *dev,
  3185. struct device_attribute *attr,
  3186. const char *buf, size_t count)
  3187. {
  3188. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3189. unsigned int time_sync_period = 0;
  3190. if (!plat_priv)
  3191. return -ENODEV;
  3192. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3193. cnss_pr_err("Invalid time sync sysfs command\n");
  3194. return -EINVAL;
  3195. }
  3196. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3197. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3198. return count;
  3199. }
  3200. static ssize_t recovery_store(struct device *dev,
  3201. struct device_attribute *attr,
  3202. const char *buf, size_t count)
  3203. {
  3204. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3205. unsigned int recovery = 0;
  3206. if (!plat_priv)
  3207. return -ENODEV;
  3208. if (sscanf(buf, "%du", &recovery) != 1) {
  3209. cnss_pr_err("Invalid recovery sysfs command\n");
  3210. return -EINVAL;
  3211. }
  3212. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3213. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3214. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3215. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3216. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3217. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3218. cnss_send_subsys_restart_level_msg(plat_priv);
  3219. return count;
  3220. }
  3221. static ssize_t shutdown_store(struct device *dev,
  3222. struct device_attribute *attr,
  3223. const char *buf, size_t count)
  3224. {
  3225. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3226. if (plat_priv) {
  3227. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3228. del_timer(&plat_priv->fw_boot_timer);
  3229. complete_all(&plat_priv->power_up_complete);
  3230. complete_all(&plat_priv->cal_complete);
  3231. }
  3232. cnss_pr_dbg("Received shutdown notification\n");
  3233. return count;
  3234. }
  3235. static ssize_t fs_ready_store(struct device *dev,
  3236. struct device_attribute *attr,
  3237. const char *buf, size_t count)
  3238. {
  3239. int fs_ready = 0;
  3240. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3241. if (sscanf(buf, "%du", &fs_ready) != 1)
  3242. return -EINVAL;
  3243. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3244. fs_ready, count);
  3245. if (!plat_priv) {
  3246. cnss_pr_err("plat_priv is NULL\n");
  3247. return count;
  3248. }
  3249. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3250. cnss_pr_dbg("QMI is bypassed\n");
  3251. return count;
  3252. }
  3253. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3254. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3255. cnss_driver_event_post(plat_priv,
  3256. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3257. 0, NULL);
  3258. }
  3259. return count;
  3260. }
  3261. static ssize_t qdss_trace_start_store(struct device *dev,
  3262. struct device_attribute *attr,
  3263. const char *buf, size_t count)
  3264. {
  3265. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3266. wlfw_qdss_trace_start(plat_priv);
  3267. cnss_pr_dbg("Received QDSS start command\n");
  3268. return count;
  3269. }
  3270. static ssize_t qdss_trace_stop_store(struct device *dev,
  3271. struct device_attribute *attr,
  3272. const char *buf, size_t count)
  3273. {
  3274. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3275. u32 option = 0;
  3276. if (sscanf(buf, "%du", &option) != 1)
  3277. return -EINVAL;
  3278. wlfw_qdss_trace_stop(plat_priv, option);
  3279. cnss_pr_dbg("Received QDSS stop command\n");
  3280. return count;
  3281. }
  3282. static ssize_t qdss_conf_download_store(struct device *dev,
  3283. struct device_attribute *attr,
  3284. const char *buf, size_t count)
  3285. {
  3286. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3287. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3288. cnss_pr_dbg("Received QDSS download config command\n");
  3289. return count;
  3290. }
  3291. static ssize_t hw_trace_override_store(struct device *dev,
  3292. struct device_attribute *attr,
  3293. const char *buf, size_t count)
  3294. {
  3295. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3296. int tmp = 0;
  3297. if (sscanf(buf, "%du", &tmp) != 1)
  3298. return -EINVAL;
  3299. plat_priv->hw_trc_override = tmp;
  3300. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3301. return count;
  3302. }
  3303. static ssize_t charger_mode_store(struct device *dev,
  3304. struct device_attribute *attr,
  3305. const char *buf, size_t count)
  3306. {
  3307. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3308. int tmp = 0;
  3309. if (sscanf(buf, "%du", &tmp) != 1)
  3310. return -EINVAL;
  3311. plat_priv->charger_mode = tmp;
  3312. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3313. return count;
  3314. }
  3315. static DEVICE_ATTR_WO(fs_ready);
  3316. static DEVICE_ATTR_WO(shutdown);
  3317. static DEVICE_ATTR_RW(recovery);
  3318. static DEVICE_ATTR_WO(enable_hds);
  3319. static DEVICE_ATTR_WO(qdss_trace_start);
  3320. static DEVICE_ATTR_WO(qdss_trace_stop);
  3321. static DEVICE_ATTR_WO(qdss_conf_download);
  3322. static DEVICE_ATTR_WO(hw_trace_override);
  3323. static DEVICE_ATTR_WO(charger_mode);
  3324. static DEVICE_ATTR_RW(time_sync_period);
  3325. static struct attribute *cnss_attrs[] = {
  3326. &dev_attr_fs_ready.attr,
  3327. &dev_attr_shutdown.attr,
  3328. &dev_attr_recovery.attr,
  3329. &dev_attr_enable_hds.attr,
  3330. &dev_attr_qdss_trace_start.attr,
  3331. &dev_attr_qdss_trace_stop.attr,
  3332. &dev_attr_qdss_conf_download.attr,
  3333. &dev_attr_hw_trace_override.attr,
  3334. &dev_attr_charger_mode.attr,
  3335. &dev_attr_time_sync_period.attr,
  3336. NULL,
  3337. };
  3338. static struct attribute_group cnss_attr_group = {
  3339. .attrs = cnss_attrs,
  3340. };
  3341. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3342. {
  3343. struct device *dev = &plat_priv->plat_dev->dev;
  3344. int ret;
  3345. char cnss_name[CNSS_FS_NAME_SIZE];
  3346. char shutdown_name[32];
  3347. if (cnss_is_dual_wlan_enabled()) {
  3348. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3349. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3350. snprintf(shutdown_name, sizeof(shutdown_name),
  3351. "shutdown_wlan_%d", plat_priv->plat_idx);
  3352. } else {
  3353. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3354. snprintf(shutdown_name, sizeof(shutdown_name),
  3355. "shutdown_wlan");
  3356. }
  3357. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3358. if (ret) {
  3359. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3360. ret);
  3361. goto out;
  3362. }
  3363. /* This is only for backward compatibility. */
  3364. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3365. if (ret) {
  3366. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3367. ret);
  3368. goto rm_cnss_link;
  3369. }
  3370. return 0;
  3371. rm_cnss_link:
  3372. sysfs_remove_link(kernel_kobj, cnss_name);
  3373. out:
  3374. return ret;
  3375. }
  3376. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3377. {
  3378. char cnss_name[CNSS_FS_NAME_SIZE];
  3379. char shutdown_name[32];
  3380. if (cnss_is_dual_wlan_enabled()) {
  3381. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3382. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3383. snprintf(shutdown_name, sizeof(shutdown_name),
  3384. "shutdown_wlan_%d", plat_priv->plat_idx);
  3385. } else {
  3386. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3387. snprintf(shutdown_name, sizeof(shutdown_name),
  3388. "shutdown_wlan");
  3389. }
  3390. sysfs_remove_link(kernel_kobj, shutdown_name);
  3391. sysfs_remove_link(kernel_kobj, cnss_name);
  3392. }
  3393. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3394. {
  3395. int ret = 0;
  3396. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3397. &cnss_attr_group);
  3398. if (ret) {
  3399. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3400. ret);
  3401. goto out;
  3402. }
  3403. cnss_create_sysfs_link(plat_priv);
  3404. return 0;
  3405. out:
  3406. return ret;
  3407. }
  3408. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3409. {
  3410. cnss_remove_sysfs_link(plat_priv);
  3411. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3412. }
  3413. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3414. {
  3415. spin_lock_init(&plat_priv->event_lock);
  3416. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3417. WQ_UNBOUND, 1);
  3418. if (!plat_priv->event_wq) {
  3419. cnss_pr_err("Failed to create event workqueue!\n");
  3420. return -EFAULT;
  3421. }
  3422. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3423. INIT_LIST_HEAD(&plat_priv->event_list);
  3424. return 0;
  3425. }
  3426. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3427. {
  3428. destroy_workqueue(plat_priv->event_wq);
  3429. }
  3430. static int cnss_reboot_notifier(struct notifier_block *nb,
  3431. unsigned long action,
  3432. void *data)
  3433. {
  3434. struct cnss_plat_data *plat_priv =
  3435. container_of(nb, struct cnss_plat_data, reboot_nb);
  3436. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3437. del_timer(&plat_priv->fw_boot_timer);
  3438. complete_all(&plat_priv->power_up_complete);
  3439. complete_all(&plat_priv->cal_complete);
  3440. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3441. return NOTIFY_DONE;
  3442. }
  3443. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3444. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3445. {
  3446. struct Object client_env;
  3447. struct Object app_object;
  3448. u32 wifi_uid = HW_WIFI_UID;
  3449. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3450. int ret;
  3451. u8 state = 0;
  3452. /* Once this flag is set, secure peripheral feature
  3453. * will not be supported till next reboot
  3454. */
  3455. if (plat_priv->sec_peri_feature_disable)
  3456. return 0;
  3457. /* get rootObj */
  3458. ret = get_client_env_object(&client_env);
  3459. if (ret) {
  3460. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3461. goto end;
  3462. }
  3463. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3464. if (ret) {
  3465. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3466. if (ret == FEATURE_NOT_SUPPORTED) {
  3467. ret = 0; /* Do not Assert */
  3468. plat_priv->sec_peri_feature_disable = true;
  3469. cnss_pr_dbg("Secure HW feature not supported\n");
  3470. }
  3471. goto exit_release_clientenv;
  3472. }
  3473. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3474. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3475. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3476. ObjectCounts_pack(1, 1, 0, 0));
  3477. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3478. if (ret) {
  3479. if (ret == PERIPHERAL_NOT_FOUND) {
  3480. ret = 0; /* Do not Assert */
  3481. plat_priv->sec_peri_feature_disable = true;
  3482. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3483. }
  3484. goto exit_release_app_obj;
  3485. }
  3486. if (state == 1)
  3487. set_bit(CNSS_WLAN_HW_DISABLED,
  3488. &plat_priv->driver_state);
  3489. else
  3490. clear_bit(CNSS_WLAN_HW_DISABLED,
  3491. &plat_priv->driver_state);
  3492. exit_release_app_obj:
  3493. Object_release(app_object);
  3494. exit_release_clientenv:
  3495. Object_release(client_env);
  3496. end:
  3497. if (ret) {
  3498. cnss_pr_err("Unable to get HW disable status\n");
  3499. CNSS_ASSERT(0);
  3500. }
  3501. return ret;
  3502. }
  3503. #else
  3504. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3505. {
  3506. return 0;
  3507. }
  3508. #endif
  3509. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3510. {
  3511. int ret;
  3512. ret = cnss_init_sol_gpio(plat_priv);
  3513. if (ret)
  3514. return ret;
  3515. timer_setup(&plat_priv->fw_boot_timer,
  3516. cnss_bus_fw_boot_timeout_hdlr, 0);
  3517. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3518. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3519. if (ret)
  3520. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3521. ret);
  3522. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3523. if (ret)
  3524. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3525. ret);
  3526. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3527. init_completion(&plat_priv->power_up_complete);
  3528. init_completion(&plat_priv->cal_complete);
  3529. init_completion(&plat_priv->rddm_complete);
  3530. init_completion(&plat_priv->recovery_complete);
  3531. init_completion(&plat_priv->daemon_connected);
  3532. mutex_init(&plat_priv->dev_lock);
  3533. mutex_init(&plat_priv->driver_ops_lock);
  3534. plat_priv->recovery_ws =
  3535. wakeup_source_register(&plat_priv->plat_dev->dev,
  3536. "CNSS_FW_RECOVERY");
  3537. if (!plat_priv->recovery_ws)
  3538. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3539. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3540. cnss_daemon_connection_update_cb,
  3541. plat_priv);
  3542. if (ret)
  3543. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3544. ret);
  3545. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3546. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3547. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3548. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3549. "qcom,rc-ep-short-channel"))
  3550. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3551. return 0;
  3552. }
  3553. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3554. {
  3555. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3556. plat_priv);
  3557. complete_all(&plat_priv->recovery_complete);
  3558. complete_all(&plat_priv->rddm_complete);
  3559. complete_all(&plat_priv->cal_complete);
  3560. complete_all(&plat_priv->power_up_complete);
  3561. complete_all(&plat_priv->daemon_connected);
  3562. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3563. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3564. del_timer(&plat_priv->fw_boot_timer);
  3565. wakeup_source_unregister(plat_priv->recovery_ws);
  3566. cnss_deinit_sol_gpio(plat_priv);
  3567. kfree(plat_priv->sram_dump);
  3568. kfree(plat_priv->on_chip_pmic_board_ids);
  3569. }
  3570. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3571. {
  3572. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3573. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3574. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3575. "qcom,wlan-cbc-enabled");
  3576. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3577. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3578. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3579. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3580. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3581. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3582. * enabled by default
  3583. */
  3584. plat_priv->adsp_pc_enabled = true;
  3585. }
  3586. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3587. {
  3588. struct device *dev = &plat_priv->plat_dev->dev;
  3589. plat_priv->use_pm_domain =
  3590. of_property_read_bool(dev->of_node, "use-pm-domain");
  3591. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3592. }
  3593. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3594. {
  3595. struct device *dev = &plat_priv->plat_dev->dev;
  3596. plat_priv->set_wlaon_pwr_ctrl =
  3597. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3598. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3599. plat_priv->set_wlaon_pwr_ctrl);
  3600. }
  3601. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3602. {
  3603. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3604. "qcom,converged-dt") ||
  3605. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3606. "qcom,same-dt-multi-dev") ||
  3607. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3608. "qcom,multi-wlan-exchg"));
  3609. }
  3610. static const struct platform_device_id cnss_platform_id_table[] = {
  3611. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3612. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3613. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3614. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3615. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3616. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3617. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3618. { .name = "qcaconv", .driver_data = 0, },
  3619. { },
  3620. };
  3621. static const struct of_device_id cnss_of_match_table[] = {
  3622. {
  3623. .compatible = "qcom,cnss",
  3624. .data = (void *)&cnss_platform_id_table[0]},
  3625. {
  3626. .compatible = "qcom,cnss-qca6290",
  3627. .data = (void *)&cnss_platform_id_table[1]},
  3628. {
  3629. .compatible = "qcom,cnss-qca6390",
  3630. .data = (void *)&cnss_platform_id_table[2]},
  3631. {
  3632. .compatible = "qcom,cnss-qca6490",
  3633. .data = (void *)&cnss_platform_id_table[3]},
  3634. {
  3635. .compatible = "qcom,cnss-kiwi",
  3636. .data = (void *)&cnss_platform_id_table[4]},
  3637. {
  3638. .compatible = "qcom,cnss-mango",
  3639. .data = (void *)&cnss_platform_id_table[5]},
  3640. {
  3641. .compatible = "qcom,cnss-peach",
  3642. .data = (void *)&cnss_platform_id_table[6]},
  3643. {
  3644. .compatible = "qcom,cnss-qca-converged",
  3645. .data = (void *)&cnss_platform_id_table[7]},
  3646. { },
  3647. };
  3648. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3649. static inline bool
  3650. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3651. {
  3652. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3653. "use-nv-mac");
  3654. }
  3655. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3656. {
  3657. struct device_node *child;
  3658. u32 id, i;
  3659. int id_n, device_identifier_gpio, ret;
  3660. u8 gpio_value;
  3661. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3662. return 0;
  3663. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3664. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3665. if (ret) {
  3666. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3667. return ret;
  3668. }
  3669. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3670. gpio_value = gpio_get_value(device_identifier_gpio);
  3671. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3672. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3673. child) {
  3674. if (strcmp(child->name, "chip_cfg"))
  3675. continue;
  3676. id_n = of_property_count_u32_elems(child, "supported-ids");
  3677. if (id_n <= 0) {
  3678. cnss_pr_err("Device id is NOT set\n");
  3679. return -EINVAL;
  3680. }
  3681. for (i = 0; i < id_n; i++) {
  3682. ret = of_property_read_u32_index(child,
  3683. "supported-ids",
  3684. i, &id);
  3685. if (ret) {
  3686. cnss_pr_err("Failed to read supported ids\n");
  3687. return -EINVAL;
  3688. }
  3689. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3690. plat_priv->plat_dev->dev.of_node = child;
  3691. plat_priv->device_id = QCA6490_DEVICE_ID;
  3692. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3693. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3694. child->name, i, id);
  3695. return 0;
  3696. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3697. plat_priv->plat_dev->dev.of_node = child;
  3698. plat_priv->device_id = KIWI_DEVICE_ID;
  3699. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3700. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3701. child->name, i, id);
  3702. return 0;
  3703. }
  3704. }
  3705. }
  3706. return -EINVAL;
  3707. }
  3708. static inline u32
  3709. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3710. {
  3711. bool is_converged_dt = of_property_read_bool(
  3712. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3713. bool is_multi_wlan_xchg;
  3714. if (is_converged_dt)
  3715. return CNSS_DTT_CONVERGED;
  3716. is_multi_wlan_xchg = of_property_read_bool(
  3717. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3718. if (is_multi_wlan_xchg)
  3719. return CNSS_DTT_MULTIEXCHG;
  3720. return CNSS_DTT_LEGACY;
  3721. }
  3722. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3723. {
  3724. int ret = 0;
  3725. int retry = 0;
  3726. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3727. return 0;
  3728. retry:
  3729. ret = cnss_power_on_device(plat_priv, true);
  3730. if (ret)
  3731. goto end;
  3732. ret = cnss_bus_init(plat_priv);
  3733. if (ret) {
  3734. if ((ret != -EPROBE_DEFER) &&
  3735. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3736. cnss_power_off_device(plat_priv);
  3737. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3738. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3739. goto retry;
  3740. }
  3741. goto power_off;
  3742. }
  3743. return 0;
  3744. power_off:
  3745. cnss_power_off_device(plat_priv);
  3746. end:
  3747. return ret;
  3748. }
  3749. int cnss_wlan_hw_enable(void)
  3750. {
  3751. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3752. int ret = 0;
  3753. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3754. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3755. goto register_driver;
  3756. ret = cnss_wlan_device_init(plat_priv);
  3757. if (ret) {
  3758. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3759. CNSS_ASSERT(0);
  3760. return ret;
  3761. }
  3762. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3763. cnss_driver_event_post(plat_priv,
  3764. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3765. 0, NULL);
  3766. register_driver:
  3767. if (plat_priv->driver_ops)
  3768. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3769. return ret;
  3770. }
  3771. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3772. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3773. {
  3774. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3775. int ret = 0;
  3776. if (!plat_priv)
  3777. return -ENODEV;
  3778. /* If IMS server is connected, return success without QMI send */
  3779. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3780. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3781. return ret;
  3782. }
  3783. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3784. return ret;
  3785. }
  3786. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3787. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3788. unsigned long *thermal_state)
  3789. {
  3790. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3791. if (!tcdev || !tcdev->devdata) {
  3792. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3793. return -EINVAL;
  3794. }
  3795. cnss_tcdev = tcdev->devdata;
  3796. *thermal_state = cnss_tcdev->max_thermal_state;
  3797. return 0;
  3798. }
  3799. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3800. unsigned long *thermal_state)
  3801. {
  3802. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3803. if (!tcdev || !tcdev->devdata) {
  3804. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3805. return -EINVAL;
  3806. }
  3807. cnss_tcdev = tcdev->devdata;
  3808. *thermal_state = cnss_tcdev->curr_thermal_state;
  3809. return 0;
  3810. }
  3811. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3812. unsigned long thermal_state)
  3813. {
  3814. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3815. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3816. int ret = 0;
  3817. if (!tcdev || !tcdev->devdata) {
  3818. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3819. return -EINVAL;
  3820. }
  3821. cnss_tcdev = tcdev->devdata;
  3822. if (thermal_state > cnss_tcdev->max_thermal_state)
  3823. return -EINVAL;
  3824. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3825. thermal_state, cnss_tcdev->tcdev_id);
  3826. mutex_lock(&plat_priv->tcdev_lock);
  3827. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3828. thermal_state,
  3829. cnss_tcdev->tcdev_id);
  3830. if (!ret)
  3831. cnss_tcdev->curr_thermal_state = thermal_state;
  3832. mutex_unlock(&plat_priv->tcdev_lock);
  3833. if (ret) {
  3834. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3835. ret, cnss_tcdev->tcdev_id);
  3836. return ret;
  3837. }
  3838. return 0;
  3839. }
  3840. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3841. .get_max_state = cnss_tcdev_get_max_state,
  3842. .get_cur_state = cnss_tcdev_get_cur_state,
  3843. .set_cur_state = cnss_tcdev_set_cur_state,
  3844. };
  3845. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3846. int tcdev_id)
  3847. {
  3848. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3849. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3850. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3851. struct device_node *dev_node;
  3852. int ret = 0;
  3853. if (!priv) {
  3854. cnss_pr_err("Platform driver is not initialized!\n");
  3855. return -ENODEV;
  3856. }
  3857. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  3858. if (!cnss_tcdev) {
  3859. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  3860. return -ENOMEM;
  3861. }
  3862. cnss_tcdev->tcdev_id = tcdev_id;
  3863. cnss_tcdev->max_thermal_state = max_state;
  3864. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  3865. "qcom,cnss_cdev%d", tcdev_id);
  3866. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  3867. if (!dev_node) {
  3868. cnss_pr_err("Failed to get cooling device node\n");
  3869. kfree(cnss_tcdev);
  3870. return -EINVAL;
  3871. }
  3872. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  3873. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  3874. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  3875. cdev_node_name,
  3876. cnss_tcdev,
  3877. &cnss_cooling_ops);
  3878. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  3879. ret = PTR_ERR(cnss_tcdev->tcdev);
  3880. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  3881. ret, cnss_tcdev->tcdev_id);
  3882. kfree(cnss_tcdev);
  3883. } else {
  3884. cnss_pr_dbg("Cooling device registered for cdev id %d",
  3885. cnss_tcdev->tcdev_id);
  3886. mutex_lock(&priv->tcdev_lock);
  3887. list_add(&cnss_tcdev->tcdev_list,
  3888. &priv->cnss_tcdev_list);
  3889. mutex_unlock(&priv->tcdev_lock);
  3890. }
  3891. } else {
  3892. cnss_pr_dbg("Cooling device registration not supported");
  3893. kfree(cnss_tcdev);
  3894. ret = -EOPNOTSUPP;
  3895. }
  3896. return ret;
  3897. }
  3898. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  3899. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  3900. {
  3901. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3902. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3903. if (!priv) {
  3904. cnss_pr_err("Platform driver is not initialized!\n");
  3905. return;
  3906. }
  3907. mutex_lock(&priv->tcdev_lock);
  3908. while (!list_empty(&priv->cnss_tcdev_list)) {
  3909. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  3910. struct cnss_thermal_cdev,
  3911. tcdev_list);
  3912. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  3913. list_del(&cnss_tcdev->tcdev_list);
  3914. kfree(cnss_tcdev);
  3915. }
  3916. mutex_unlock(&priv->tcdev_lock);
  3917. }
  3918. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  3919. int cnss_get_curr_therm_cdev_state(struct device *dev,
  3920. unsigned long *thermal_state,
  3921. int tcdev_id)
  3922. {
  3923. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3924. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3925. if (!priv) {
  3926. cnss_pr_err("Platform driver is not initialized!\n");
  3927. return -ENODEV;
  3928. }
  3929. mutex_lock(&priv->tcdev_lock);
  3930. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  3931. if (cnss_tcdev->tcdev_id != tcdev_id)
  3932. continue;
  3933. *thermal_state = cnss_tcdev->curr_thermal_state;
  3934. mutex_unlock(&priv->tcdev_lock);
  3935. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  3936. cnss_tcdev->curr_thermal_state, tcdev_id);
  3937. return 0;
  3938. }
  3939. mutex_unlock(&priv->tcdev_lock);
  3940. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  3941. return -EINVAL;
  3942. }
  3943. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  3944. static int cnss_probe(struct platform_device *plat_dev)
  3945. {
  3946. int ret = 0;
  3947. struct cnss_plat_data *plat_priv;
  3948. const struct of_device_id *of_id;
  3949. const struct platform_device_id *device_id;
  3950. if (cnss_get_plat_priv(plat_dev)) {
  3951. cnss_pr_err("Driver is already initialized!\n");
  3952. ret = -EEXIST;
  3953. goto out;
  3954. }
  3955. ret = cnss_plat_env_available();
  3956. if (ret)
  3957. goto out;
  3958. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3959. if (!of_id || !of_id->data) {
  3960. cnss_pr_err("Failed to find of match device!\n");
  3961. ret = -ENODEV;
  3962. goto out;
  3963. }
  3964. device_id = of_id->data;
  3965. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3966. GFP_KERNEL);
  3967. if (!plat_priv) {
  3968. ret = -ENOMEM;
  3969. goto out;
  3970. }
  3971. plat_priv->plat_dev = plat_dev;
  3972. plat_priv->dev_node = NULL;
  3973. plat_priv->device_id = device_id->driver_data;
  3974. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3975. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3976. plat_priv->dt_type);
  3977. plat_priv->use_fw_path_with_prefix =
  3978. cnss_use_fw_path_with_prefix(plat_priv);
  3979. ret = cnss_get_dev_cfg_node(plat_priv);
  3980. if (ret) {
  3981. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3982. goto reset_plat_dev;
  3983. }
  3984. ret = cnss_get_pld_bus_ops_name(plat_priv);
  3985. if (ret)
  3986. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  3987. ret);
  3988. ret = cnss_get_rc_num(plat_priv);
  3989. if (ret)
  3990. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  3991. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  3992. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3993. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3994. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3995. cnss_set_plat_priv(plat_dev, plat_priv);
  3996. cnss_set_device_name(plat_priv);
  3997. platform_set_drvdata(plat_dev, plat_priv);
  3998. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3999. INIT_LIST_HEAD(&plat_priv->clk_list);
  4000. cnss_get_pm_domain_info(plat_priv);
  4001. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4002. cnss_power_misc_params_init(plat_priv);
  4003. cnss_get_tcs_info(plat_priv);
  4004. cnss_get_cpr_info(plat_priv);
  4005. cnss_aop_mbox_init(plat_priv);
  4006. cnss_init_control_params(plat_priv);
  4007. ret = cnss_get_resources(plat_priv);
  4008. if (ret)
  4009. goto reset_ctx;
  4010. ret = cnss_register_esoc(plat_priv);
  4011. if (ret)
  4012. goto free_res;
  4013. ret = cnss_register_bus_scale(plat_priv);
  4014. if (ret)
  4015. goto unreg_esoc;
  4016. ret = cnss_create_sysfs(plat_priv);
  4017. if (ret)
  4018. goto unreg_bus_scale;
  4019. ret = cnss_event_work_init(plat_priv);
  4020. if (ret)
  4021. goto remove_sysfs;
  4022. ret = cnss_dms_init(plat_priv);
  4023. if (ret)
  4024. goto deinit_event_work;
  4025. ret = cnss_debugfs_create(plat_priv);
  4026. if (ret)
  4027. goto deinit_dms;
  4028. ret = cnss_misc_init(plat_priv);
  4029. if (ret)
  4030. goto destroy_debugfs;
  4031. ret = cnss_wlan_hw_disable_check(plat_priv);
  4032. if (ret)
  4033. goto deinit_misc;
  4034. /* Make sure all platform related init are done before
  4035. * device power on and bus init.
  4036. */
  4037. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4038. ret = cnss_wlan_device_init(plat_priv);
  4039. if (ret)
  4040. goto deinit_misc;
  4041. } else {
  4042. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4043. }
  4044. cnss_register_coex_service(plat_priv);
  4045. cnss_register_ims_service(plat_priv);
  4046. mutex_init(&plat_priv->tcdev_lock);
  4047. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4048. cnss_pr_info("Platform driver probed successfully.\n");
  4049. return 0;
  4050. deinit_misc:
  4051. cnss_misc_deinit(plat_priv);
  4052. destroy_debugfs:
  4053. cnss_debugfs_destroy(plat_priv);
  4054. deinit_dms:
  4055. cnss_dms_deinit(plat_priv);
  4056. deinit_event_work:
  4057. cnss_event_work_deinit(plat_priv);
  4058. remove_sysfs:
  4059. cnss_remove_sysfs(plat_priv);
  4060. unreg_bus_scale:
  4061. cnss_unregister_bus_scale(plat_priv);
  4062. unreg_esoc:
  4063. cnss_unregister_esoc(plat_priv);
  4064. free_res:
  4065. cnss_put_resources(plat_priv);
  4066. reset_ctx:
  4067. platform_set_drvdata(plat_dev, NULL);
  4068. reset_plat_dev:
  4069. cnss_clear_plat_priv(plat_priv);
  4070. out:
  4071. return ret;
  4072. }
  4073. static int cnss_remove(struct platform_device *plat_dev)
  4074. {
  4075. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4076. plat_priv->audio_iommu_domain = NULL;
  4077. cnss_genl_exit();
  4078. cnss_unregister_ims_service(plat_priv);
  4079. cnss_unregister_coex_service(plat_priv);
  4080. cnss_bus_deinit(plat_priv);
  4081. cnss_misc_deinit(plat_priv);
  4082. cnss_debugfs_destroy(plat_priv);
  4083. cnss_dms_deinit(plat_priv);
  4084. cnss_qmi_deinit(plat_priv);
  4085. cnss_event_work_deinit(plat_priv);
  4086. cnss_cancel_dms_work();
  4087. cnss_remove_sysfs(plat_priv);
  4088. cnss_unregister_bus_scale(plat_priv);
  4089. cnss_unregister_esoc(plat_priv);
  4090. cnss_put_resources(plat_priv);
  4091. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  4092. mbox_free_channel(plat_priv->mbox_chan);
  4093. platform_set_drvdata(plat_dev, NULL);
  4094. cnss_clear_plat_priv(plat_priv);
  4095. return 0;
  4096. }
  4097. static struct platform_driver cnss_platform_driver = {
  4098. .probe = cnss_probe,
  4099. .remove = cnss_remove,
  4100. .driver = {
  4101. .name = "cnss2",
  4102. .of_match_table = cnss_of_match_table,
  4103. #ifdef CONFIG_CNSS_ASYNC
  4104. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4105. #endif
  4106. },
  4107. };
  4108. static bool cnss_check_compatible_node(void)
  4109. {
  4110. struct device_node *dn = NULL;
  4111. for_each_matching_node(dn, cnss_of_match_table) {
  4112. if (of_device_is_available(dn)) {
  4113. cnss_allow_driver_loading = true;
  4114. return true;
  4115. }
  4116. }
  4117. return false;
  4118. }
  4119. /**
  4120. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4121. *
  4122. * Valid device tree node means a node with "compatible" property from the
  4123. * device match table and "status" property is not disabled.
  4124. *
  4125. * Return: true if valid device tree node found, false if not found
  4126. */
  4127. static bool cnss_is_valid_dt_node_found(void)
  4128. {
  4129. struct device_node *dn = NULL;
  4130. for_each_matching_node(dn, cnss_of_match_table) {
  4131. if (of_device_is_available(dn))
  4132. break;
  4133. }
  4134. if (dn)
  4135. return true;
  4136. return false;
  4137. }
  4138. static int __init cnss_initialize(void)
  4139. {
  4140. int ret = 0;
  4141. if (!cnss_is_valid_dt_node_found())
  4142. return -ENODEV;
  4143. if (!cnss_check_compatible_node())
  4144. return ret;
  4145. cnss_debug_init();
  4146. ret = platform_driver_register(&cnss_platform_driver);
  4147. if (ret)
  4148. cnss_debug_deinit();
  4149. ret = cnss_genl_init();
  4150. if (ret < 0)
  4151. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4152. return ret;
  4153. }
  4154. static void __exit cnss_exit(void)
  4155. {
  4156. cnss_genl_exit();
  4157. platform_driver_unregister(&cnss_platform_driver);
  4158. cnss_debug_deinit();
  4159. }
  4160. module_init(cnss_initialize);
  4161. module_exit(cnss_exit);
  4162. MODULE_LICENSE("GPL v2");
  4163. MODULE_DESCRIPTION("CNSS2 Platform Driver");