dp_rx.c 67 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  41. {
  42. return vdev->ap_bridge_enabled;
  43. }
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  46. hal_ring_handle_t hal_ring,
  47. hal_ring_desc_t ring_desc,
  48. struct dp_rx_desc *rx_desc)
  49. {
  50. void *hal_soc = soc->hal_soc;
  51. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  52. dp_rx_desc_dump(rx_desc);
  53. }
  54. #else
  55. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  56. hal_ring_handle_t hal_ring_hdl,
  57. hal_ring_desc_t ring_desc,
  58. struct dp_rx_desc *rx_desc)
  59. {
  60. hal_soc_handle_t hal_soc = soc->hal_soc;
  61. dp_rx_desc_dump(rx_desc);
  62. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  63. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  64. qdf_assert_always(0);
  65. }
  66. #endif
  67. /*
  68. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  69. * called during dp rx initialization
  70. * and at the end of dp_rx_process.
  71. *
  72. * @soc: core txrx main context
  73. * @mac_id: mac_id which is one of 3 mac_ids
  74. * @dp_rxdma_srng: dp rxdma circular ring
  75. * @rx_desc_pool: Pointer to free Rx descriptor pool
  76. * @num_req_buffers: number of buffer to be replenished
  77. * @desc_list: list of descs if called from dp_rx_process
  78. * or NULL during dp rx initialization or out of buffer
  79. * interrupt.
  80. * @tail: tail of descs list
  81. * Return: return success or failure
  82. */
  83. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  84. struct dp_srng *dp_rxdma_srng,
  85. struct rx_desc_pool *rx_desc_pool,
  86. uint32_t num_req_buffers,
  87. union dp_rx_desc_list_elem_t **desc_list,
  88. union dp_rx_desc_list_elem_t **tail)
  89. {
  90. uint32_t num_alloc_desc;
  91. uint16_t num_desc_to_free = 0;
  92. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  93. uint32_t num_entries_avail;
  94. uint32_t count;
  95. int sync_hw_ptr = 1;
  96. qdf_dma_addr_t paddr;
  97. qdf_nbuf_t rx_netbuf;
  98. void *rxdma_ring_entry;
  99. union dp_rx_desc_list_elem_t *next;
  100. QDF_STATUS ret;
  101. void *rxdma_srng;
  102. rxdma_srng = dp_rxdma_srng->hal_srng;
  103. if (!rxdma_srng) {
  104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  105. "rxdma srng not initialized");
  106. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  107. return QDF_STATUS_E_FAILURE;
  108. }
  109. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  110. "requested %d buffers for replenish", num_req_buffers);
  111. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  112. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  113. rxdma_srng,
  114. sync_hw_ptr);
  115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  116. "no of available entries in rxdma ring: %d",
  117. num_entries_avail);
  118. if (!(*desc_list) && (num_entries_avail >
  119. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  120. num_req_buffers = num_entries_avail;
  121. } else if (num_entries_avail < num_req_buffers) {
  122. num_desc_to_free = num_req_buffers - num_entries_avail;
  123. num_req_buffers = num_entries_avail;
  124. }
  125. if (qdf_unlikely(!num_req_buffers)) {
  126. num_desc_to_free = num_req_buffers;
  127. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  128. goto free_descs;
  129. }
  130. /*
  131. * if desc_list is NULL, allocate the descs from freelist
  132. */
  133. if (!(*desc_list)) {
  134. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  135. rx_desc_pool,
  136. num_req_buffers,
  137. desc_list,
  138. tail);
  139. if (!num_alloc_desc) {
  140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  141. "no free rx_descs in freelist");
  142. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  143. num_req_buffers);
  144. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  145. return QDF_STATUS_E_NOMEM;
  146. }
  147. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  148. "%d rx desc allocated", num_alloc_desc);
  149. num_req_buffers = num_alloc_desc;
  150. }
  151. count = 0;
  152. while (count < num_req_buffers) {
  153. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  154. RX_BUFFER_SIZE,
  155. RX_BUFFER_RESERVATION,
  156. RX_BUFFER_ALIGNMENT,
  157. FALSE);
  158. if (qdf_unlikely(!rx_netbuf)) {
  159. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  160. break;
  161. }
  162. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  163. QDF_DMA_FROM_DEVICE);
  164. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  165. qdf_nbuf_free(rx_netbuf);
  166. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  167. continue;
  168. }
  169. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  170. /*
  171. * check if the physical address of nbuf->data is
  172. * less then 0x50000000 then free the nbuf and try
  173. * allocating new nbuf. We can try for 100 times.
  174. * this is a temp WAR till we fix it properly.
  175. */
  176. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  177. if (ret == QDF_STATUS_E_FAILURE) {
  178. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  179. break;
  180. }
  181. count++;
  182. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  183. rxdma_srng);
  184. qdf_assert_always(rxdma_ring_entry);
  185. next = (*desc_list)->next;
  186. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  187. /* rx_desc.in_use should be zero at this time*/
  188. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  189. (*desc_list)->rx_desc.in_use = 1;
  190. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  191. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  192. (unsigned long long)paddr,
  193. (*desc_list)->rx_desc.cookie);
  194. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  195. (*desc_list)->rx_desc.cookie,
  196. rx_desc_pool->owner);
  197. *desc_list = next;
  198. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  199. }
  200. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  201. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  202. count, num_desc_to_free);
  203. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  204. (RX_BUFFER_SIZE * count));
  205. free_descs:
  206. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  207. /*
  208. * add any available free desc back to the free list
  209. */
  210. if (*desc_list)
  211. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  212. mac_id, rx_desc_pool);
  213. return QDF_STATUS_SUCCESS;
  214. }
  215. /*
  216. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  217. * pkts to RAW mode simulation to
  218. * decapsulate the pkt.
  219. *
  220. * @vdev: vdev on which RAW mode is enabled
  221. * @nbuf_list: list of RAW pkts to process
  222. * @peer: peer object from which the pkt is rx
  223. *
  224. * Return: void
  225. */
  226. void
  227. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  228. struct dp_peer *peer)
  229. {
  230. qdf_nbuf_t deliver_list_head = NULL;
  231. qdf_nbuf_t deliver_list_tail = NULL;
  232. qdf_nbuf_t nbuf;
  233. nbuf = nbuf_list;
  234. while (nbuf) {
  235. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  236. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  237. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  238. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  239. /*
  240. * reset the chfrag_start and chfrag_end bits in nbuf cb
  241. * as this is a non-amsdu pkt and RAW mode simulation expects
  242. * these bit s to be 0 for non-amsdu pkt.
  243. */
  244. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  245. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  246. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  247. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  248. }
  249. nbuf = next;
  250. }
  251. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  252. &deliver_list_tail, (struct cdp_peer*) peer);
  253. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  254. }
  255. #ifdef DP_LFR
  256. /*
  257. * In case of LFR, data of a new peer might be sent up
  258. * even before peer is added.
  259. */
  260. static inline struct dp_vdev *
  261. dp_get_vdev_from_peer(struct dp_soc *soc,
  262. uint16_t peer_id,
  263. struct dp_peer *peer,
  264. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  265. {
  266. struct dp_vdev *vdev;
  267. uint8_t vdev_id;
  268. if (unlikely(!peer)) {
  269. if (peer_id != HTT_INVALID_PEER) {
  270. vdev_id = DP_PEER_METADATA_ID_GET(
  271. mpdu_desc_info.peer_meta_data);
  272. QDF_TRACE(QDF_MODULE_ID_DP,
  273. QDF_TRACE_LEVEL_DEBUG,
  274. FL("PeerID %d not found use vdevID %d"),
  275. peer_id, vdev_id);
  276. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  277. vdev_id);
  278. } else {
  279. QDF_TRACE(QDF_MODULE_ID_DP,
  280. QDF_TRACE_LEVEL_DEBUG,
  281. FL("Invalid PeerID %d"),
  282. peer_id);
  283. return NULL;
  284. }
  285. } else {
  286. vdev = peer->vdev;
  287. }
  288. return vdev;
  289. }
  290. #else
  291. static inline struct dp_vdev *
  292. dp_get_vdev_from_peer(struct dp_soc *soc,
  293. uint16_t peer_id,
  294. struct dp_peer *peer,
  295. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  296. {
  297. if (unlikely(!peer)) {
  298. QDF_TRACE(QDF_MODULE_ID_DP,
  299. QDF_TRACE_LEVEL_DEBUG,
  300. FL("Peer not found for peerID %d"),
  301. peer_id);
  302. return NULL;
  303. } else {
  304. return peer->vdev;
  305. }
  306. }
  307. #endif
  308. #ifndef FEATURE_WDS
  309. static void
  310. dp_rx_da_learn(struct dp_soc *soc,
  311. uint8_t *rx_tlv_hdr,
  312. struct dp_peer *ta_peer,
  313. qdf_nbuf_t nbuf)
  314. {
  315. }
  316. #endif
  317. /*
  318. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  319. *
  320. * @soc: core txrx main context
  321. * @ta_peer : source peer entry
  322. * @rx_tlv_hdr : start address of rx tlvs
  323. * @nbuf : nbuf that has to be intrabss forwarded
  324. *
  325. * Return: bool: true if it is forwarded else false
  326. */
  327. static bool
  328. dp_rx_intrabss_fwd(struct dp_soc *soc,
  329. struct dp_peer *ta_peer,
  330. uint8_t *rx_tlv_hdr,
  331. qdf_nbuf_t nbuf)
  332. {
  333. uint16_t da_idx;
  334. uint16_t len;
  335. uint8_t is_frag;
  336. struct dp_peer *da_peer;
  337. struct dp_ast_entry *ast_entry;
  338. qdf_nbuf_t nbuf_copy;
  339. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  340. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  341. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  342. tid_stats.tid_rx_stats[ring_id][tid];
  343. /* check if the destination peer is available in peer table
  344. * and also check if the source peer and destination peer
  345. * belong to the same vap and destination peer is not bss peer.
  346. */
  347. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  348. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  349. ast_entry = soc->ast_table[da_idx];
  350. if (!ast_entry)
  351. return false;
  352. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  353. ast_entry->is_active = TRUE;
  354. return false;
  355. }
  356. da_peer = ast_entry->peer;
  357. if (!da_peer)
  358. return false;
  359. /* TA peer cannot be same as peer(DA) on which AST is present
  360. * this indicates a change in topology and that AST entries
  361. * are yet to be updated.
  362. */
  363. if (da_peer == ta_peer)
  364. return false;
  365. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  366. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  367. is_frag = qdf_nbuf_is_frag(nbuf);
  368. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  369. /* linearize the nbuf just before we send to
  370. * dp_tx_send()
  371. */
  372. if (qdf_unlikely(is_frag)) {
  373. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  374. return false;
  375. nbuf = qdf_nbuf_unshare(nbuf);
  376. if (!nbuf) {
  377. DP_STATS_INC_PKT(ta_peer,
  378. rx.intra_bss.fail,
  379. 1,
  380. len);
  381. /* return true even though the pkt is
  382. * not forwarded. Basically skb_unshare
  383. * failed and we want to continue with
  384. * next nbuf.
  385. */
  386. tid_stats->fail_cnt[INTRABSS_DROP]++;
  387. return true;
  388. }
  389. }
  390. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  391. nbuf)) {
  392. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  393. len);
  394. return true;
  395. } else {
  396. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  397. len);
  398. tid_stats->fail_cnt[INTRABSS_DROP]++;
  399. return false;
  400. }
  401. }
  402. }
  403. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  404. * source, then clone the pkt and send the cloned pkt for
  405. * intra BSS forwarding and original pkt up the network stack
  406. * Note: how do we handle multicast pkts. do we forward
  407. * all multicast pkts as is or let a higher layer module
  408. * like igmpsnoop decide whether to forward or not with
  409. * Mcast enhancement.
  410. */
  411. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  412. !ta_peer->bss_peer))) {
  413. nbuf_copy = qdf_nbuf_copy(nbuf);
  414. if (!nbuf_copy)
  415. return false;
  416. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  417. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  418. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  419. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  420. tid_stats->fail_cnt[INTRABSS_DROP]++;
  421. qdf_nbuf_free(nbuf_copy);
  422. } else {
  423. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  424. tid_stats->intrabss_cnt++;
  425. }
  426. }
  427. /* return false as we have to still send the original pkt
  428. * up the stack
  429. */
  430. return false;
  431. }
  432. #ifdef MESH_MODE_SUPPORT
  433. /**
  434. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  435. *
  436. * @vdev: DP Virtual device handle
  437. * @nbuf: Buffer pointer
  438. * @rx_tlv_hdr: start of rx tlv header
  439. * @peer: pointer to peer
  440. *
  441. * This function allocated memory for mesh receive stats and fill the
  442. * required stats. Stores the memory address in skb cb.
  443. *
  444. * Return: void
  445. */
  446. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  447. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  448. {
  449. struct mesh_recv_hdr_s *rx_info = NULL;
  450. uint32_t pkt_type;
  451. uint32_t nss;
  452. uint32_t rate_mcs;
  453. uint32_t bw;
  454. /* fill recv mesh stats */
  455. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  456. /* upper layers are resposible to free this memory */
  457. if (!rx_info) {
  458. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  459. "Memory allocation failed for mesh rx stats");
  460. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  461. return;
  462. }
  463. rx_info->rs_flags = MESH_RXHDR_VER1;
  464. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  465. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  466. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  467. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  468. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  469. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  470. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  471. if (vdev->osif_get_key)
  472. vdev->osif_get_key(vdev->osif_vdev,
  473. &rx_info->rs_decryptkey[0],
  474. &peer->mac_addr.raw[0],
  475. rx_info->rs_keyix);
  476. }
  477. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  478. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  479. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  480. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  481. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  482. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  483. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  484. (bw << 24);
  485. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  486. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  487. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  488. rx_info->rs_flags,
  489. rx_info->rs_rssi,
  490. rx_info->rs_channel,
  491. rx_info->rs_ratephy1,
  492. rx_info->rs_keyix);
  493. }
  494. /**
  495. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  496. *
  497. * @vdev: DP Virtual device handle
  498. * @nbuf: Buffer pointer
  499. * @rx_tlv_hdr: start of rx tlv header
  500. *
  501. * This checks if the received packet is matching any filter out
  502. * catogery and and drop the packet if it matches.
  503. *
  504. * Return: status(0 indicates drop, 1 indicate to no drop)
  505. */
  506. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  507. uint8_t *rx_tlv_hdr)
  508. {
  509. union dp_align_mac_addr mac_addr;
  510. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  511. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  512. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  513. return QDF_STATUS_SUCCESS;
  514. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  515. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  516. return QDF_STATUS_SUCCESS;
  517. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  518. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  519. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  520. return QDF_STATUS_SUCCESS;
  521. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  522. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  523. &mac_addr.raw[0]))
  524. return QDF_STATUS_E_FAILURE;
  525. if (!qdf_mem_cmp(&mac_addr.raw[0],
  526. &vdev->mac_addr.raw[0],
  527. QDF_MAC_ADDR_SIZE))
  528. return QDF_STATUS_SUCCESS;
  529. }
  530. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  531. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  532. &mac_addr.raw[0]))
  533. return QDF_STATUS_E_FAILURE;
  534. if (!qdf_mem_cmp(&mac_addr.raw[0],
  535. &vdev->mac_addr.raw[0],
  536. QDF_MAC_ADDR_SIZE))
  537. return QDF_STATUS_SUCCESS;
  538. }
  539. }
  540. return QDF_STATUS_E_FAILURE;
  541. }
  542. #else
  543. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  544. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  545. {
  546. }
  547. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  548. uint8_t *rx_tlv_hdr)
  549. {
  550. return QDF_STATUS_E_FAILURE;
  551. }
  552. #endif
  553. #ifdef FEATURE_NAC_RSSI
  554. /**
  555. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  556. * clients
  557. * @pdev: DP pdev handle
  558. * @rx_pkt_hdr: Rx packet Header
  559. *
  560. * return: dp_vdev*
  561. */
  562. static
  563. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  564. uint8_t *rx_pkt_hdr)
  565. {
  566. struct ieee80211_frame *wh;
  567. struct dp_neighbour_peer *peer = NULL;
  568. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  569. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  570. return NULL;
  571. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  572. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  573. neighbour_peer_list_elem) {
  574. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  575. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  576. QDF_TRACE(
  577. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  578. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  579. peer->neighbour_peers_macaddr.raw[0],
  580. peer->neighbour_peers_macaddr.raw[1],
  581. peer->neighbour_peers_macaddr.raw[2],
  582. peer->neighbour_peers_macaddr.raw[3],
  583. peer->neighbour_peers_macaddr.raw[4],
  584. peer->neighbour_peers_macaddr.raw[5]);
  585. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  586. return pdev->monitor_vdev;
  587. }
  588. }
  589. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  590. return NULL;
  591. }
  592. /**
  593. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  594. * @soc: DP SOC handle
  595. * @mpdu: mpdu for which peer is invalid
  596. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  597. * pool_id has same mapping)
  598. *
  599. * return: integer type
  600. */
  601. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  602. uint8_t mac_id)
  603. {
  604. struct dp_invalid_peer_msg msg;
  605. struct dp_vdev *vdev = NULL;
  606. struct dp_pdev *pdev = NULL;
  607. struct ieee80211_frame *wh;
  608. qdf_nbuf_t curr_nbuf, next_nbuf;
  609. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  610. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  611. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  612. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  614. "Drop decapped frames");
  615. goto free;
  616. }
  617. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  618. if (!DP_FRAME_IS_DATA(wh)) {
  619. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  620. "NAWDS valid only for data frames");
  621. goto free;
  622. }
  623. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  624. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  625. "Invalid nbuf length");
  626. goto free;
  627. }
  628. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  629. if (!pdev) {
  630. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  631. "PDEV not found");
  632. goto free;
  633. }
  634. if (pdev->filter_neighbour_peers) {
  635. /* Next Hop scenario not yet handle */
  636. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  637. if (vdev) {
  638. dp_rx_mon_deliver(soc, pdev->pdev_id,
  639. pdev->invalid_peer_head_msdu,
  640. pdev->invalid_peer_tail_msdu);
  641. pdev->invalid_peer_head_msdu = NULL;
  642. pdev->invalid_peer_tail_msdu = NULL;
  643. return 0;
  644. }
  645. }
  646. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  647. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  648. QDF_MAC_ADDR_SIZE) == 0) {
  649. goto out;
  650. }
  651. }
  652. if (!vdev) {
  653. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  654. "VDEV not found");
  655. goto free;
  656. }
  657. out:
  658. msg.wh = wh;
  659. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  660. msg.nbuf = mpdu;
  661. msg.vdev_id = vdev->vdev_id;
  662. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  663. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  664. &msg);
  665. free:
  666. /* Drop and free packet */
  667. curr_nbuf = mpdu;
  668. while (curr_nbuf) {
  669. next_nbuf = qdf_nbuf_next(curr_nbuf);
  670. qdf_nbuf_free(curr_nbuf);
  671. curr_nbuf = next_nbuf;
  672. }
  673. return 0;
  674. }
  675. /**
  676. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  677. * @soc: DP SOC handle
  678. * @mpdu: mpdu for which peer is invalid
  679. * @mpdu_done: if an mpdu is completed
  680. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  681. * pool_id has same mapping)
  682. *
  683. * return: integer type
  684. */
  685. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  686. qdf_nbuf_t mpdu, bool mpdu_done,
  687. uint8_t mac_id)
  688. {
  689. /* Only trigger the process when mpdu is completed */
  690. if (mpdu_done)
  691. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  692. }
  693. #else
  694. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  695. uint8_t mac_id)
  696. {
  697. qdf_nbuf_t curr_nbuf, next_nbuf;
  698. struct dp_pdev *pdev;
  699. struct dp_vdev *vdev = NULL;
  700. struct ieee80211_frame *wh;
  701. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  702. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  703. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  704. if (!DP_FRAME_IS_DATA(wh)) {
  705. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  706. "only for data frames");
  707. goto free;
  708. }
  709. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  710. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  711. "Invalid nbuf length");
  712. goto free;
  713. }
  714. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  715. if (!pdev) {
  716. QDF_TRACE(QDF_MODULE_ID_DP,
  717. QDF_TRACE_LEVEL_ERROR,
  718. "PDEV not found");
  719. goto free;
  720. }
  721. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  722. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  723. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  724. QDF_MAC_ADDR_SIZE) == 0) {
  725. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  726. goto out;
  727. }
  728. }
  729. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  730. if (!vdev) {
  731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  732. "VDEV not found");
  733. goto free;
  734. }
  735. out:
  736. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  737. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  738. free:
  739. /* reset the head and tail pointers */
  740. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  741. if (pdev) {
  742. pdev->invalid_peer_head_msdu = NULL;
  743. pdev->invalid_peer_tail_msdu = NULL;
  744. }
  745. /* Drop and free packet */
  746. curr_nbuf = mpdu;
  747. while (curr_nbuf) {
  748. next_nbuf = qdf_nbuf_next(curr_nbuf);
  749. qdf_nbuf_free(curr_nbuf);
  750. curr_nbuf = next_nbuf;
  751. }
  752. return 0;
  753. }
  754. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  755. qdf_nbuf_t mpdu, bool mpdu_done,
  756. uint8_t mac_id)
  757. {
  758. /* Process the nbuf */
  759. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  760. }
  761. #endif
  762. #ifdef RECEIVE_OFFLOAD
  763. /**
  764. * dp_rx_print_offload_info() - Print offload info from RX TLV
  765. * @rx_tlv: RX TLV for which offload information is to be printed
  766. *
  767. * Return: None
  768. */
  769. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  770. {
  771. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  772. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  773. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  774. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  775. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  776. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  777. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  778. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  779. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  780. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  781. dp_verbose_debug("---------------------------------------------------------");
  782. }
  783. /**
  784. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  785. * @soc: DP SOC handle
  786. * @rx_tlv: RX TLV received for the msdu
  787. * @msdu: msdu for which GRO info needs to be filled
  788. *
  789. * Return: None
  790. */
  791. static
  792. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  793. qdf_nbuf_t msdu)
  794. {
  795. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  796. return;
  797. /* Filling up RX offload info only for TCP packets */
  798. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  799. return;
  800. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  801. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  802. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  803. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  804. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  805. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  806. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  807. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  808. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  809. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  810. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  811. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  812. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  813. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  814. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  815. HAL_RX_TLV_GET_IPV6(rx_tlv);
  816. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  817. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  818. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  819. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  820. dp_rx_print_offload_info(rx_tlv);
  821. }
  822. #else
  823. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  824. qdf_nbuf_t msdu)
  825. {
  826. }
  827. #endif /* RECEIVE_OFFLOAD */
  828. /**
  829. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  830. *
  831. * @nbuf: pointer to msdu.
  832. * @mpdu_len: mpdu length
  833. *
  834. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  835. */
  836. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  837. {
  838. bool last_nbuf;
  839. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  840. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  841. last_nbuf = false;
  842. } else {
  843. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  844. last_nbuf = true;
  845. }
  846. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  847. return last_nbuf;
  848. }
  849. /**
  850. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  851. * multiple nbufs.
  852. * @nbuf: pointer to the first msdu of an amsdu.
  853. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  854. *
  855. *
  856. * This function implements the creation of RX frag_list for cases
  857. * where an MSDU is spread across multiple nbufs.
  858. *
  859. * Return: returns the head nbuf which contains complete frag_list.
  860. */
  861. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  862. {
  863. qdf_nbuf_t parent, next, frag_list;
  864. uint16_t frag_list_len = 0;
  865. uint16_t mpdu_len;
  866. bool last_nbuf;
  867. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  868. /*
  869. * this is a case where the complete msdu fits in one single nbuf.
  870. * in this case HW sets both start and end bit and we only need to
  871. * reset these bits for RAW mode simulator to decap the pkt
  872. */
  873. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  874. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  875. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  876. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  877. return nbuf;
  878. }
  879. /*
  880. * This is a case where we have multiple msdus (A-MSDU) spread across
  881. * multiple nbufs. here we create a fraglist out of these nbufs.
  882. *
  883. * the moment we encounter a nbuf with continuation bit set we
  884. * know for sure we have an MSDU which is spread across multiple
  885. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  886. */
  887. parent = nbuf;
  888. frag_list = nbuf->next;
  889. nbuf = nbuf->next;
  890. /*
  891. * set the start bit in the first nbuf we encounter with continuation
  892. * bit set. This has the proper mpdu length set as it is the first
  893. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  894. * nbufs will form the frag_list of the parent nbuf.
  895. */
  896. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  897. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  898. /*
  899. * this is where we set the length of the fragments which are
  900. * associated to the parent nbuf. We iterate through the frag_list
  901. * till we hit the last_nbuf of the list.
  902. */
  903. do {
  904. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  905. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  906. frag_list_len += qdf_nbuf_len(nbuf);
  907. if (last_nbuf) {
  908. next = nbuf->next;
  909. nbuf->next = NULL;
  910. break;
  911. }
  912. nbuf = nbuf->next;
  913. } while (!last_nbuf);
  914. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  915. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  916. parent->next = next;
  917. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  918. return parent;
  919. }
  920. /**
  921. * dp_rx_compute_delay() - Compute and fill in all timestamps
  922. * to pass in correct fields
  923. *
  924. * @vdev: pdev handle
  925. * @tx_desc: tx descriptor
  926. * @tid: tid value
  927. * Return: none
  928. */
  929. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  930. {
  931. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  932. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  933. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  934. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  935. uint32_t interframe_delay =
  936. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  937. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  938. CDP_DELAY_STATS_REAP_STACK, ring_id);
  939. /*
  940. * Update interframe delay stats calculated at deliver_data_ol point.
  941. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  942. * interframe delay will not be calculate correctly for 1st frame.
  943. * On the other side, this will help in avoiding extra per packet check
  944. * of vdev->prev_rx_deliver_tstamp.
  945. */
  946. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  947. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  948. vdev->prev_rx_deliver_tstamp = current_ts;
  949. }
  950. /**
  951. * dp_rx_drop_nbuf_list() - drop an nbuf list
  952. * @pdev: dp pdev reference
  953. * @buf_list: buffer list to be dropepd
  954. *
  955. * Return: int (number of bufs dropped)
  956. */
  957. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  958. qdf_nbuf_t buf_list)
  959. {
  960. struct cdp_tid_rx_stats *stats = NULL;
  961. uint8_t tid = 0, ring_id = 0;
  962. int num_dropped = 0;
  963. qdf_nbuf_t buf, next_buf;
  964. buf = buf_list;
  965. while (buf) {
  966. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  967. next_buf = qdf_nbuf_queue_next(buf);
  968. tid = qdf_nbuf_get_tid_val(buf);
  969. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  970. stats->fail_cnt[INVALID_PEER_VDEV]++;
  971. stats->delivered_to_stack--;
  972. qdf_nbuf_free(buf);
  973. buf = next_buf;
  974. num_dropped++;
  975. }
  976. return num_dropped;
  977. }
  978. #ifdef PEER_CACHE_RX_PKTS
  979. /**
  980. * dp_rx_flush_rx_cached() - flush cached rx frames
  981. * @peer: peer
  982. * @drop: flag to drop frames or forward to net stack
  983. *
  984. * Return: None
  985. */
  986. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  987. {
  988. struct dp_peer_cached_bufq *bufqi;
  989. struct dp_rx_cached_buf *cache_buf = NULL;
  990. ol_txrx_rx_fp data_rx = NULL;
  991. int num_buff_elem;
  992. QDF_STATUS status;
  993. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  994. qdf_atomic_dec(&peer->flush_in_progress);
  995. return;
  996. }
  997. qdf_spin_lock_bh(&peer->peer_info_lock);
  998. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  999. data_rx = peer->vdev->osif_rx;
  1000. else
  1001. drop = true;
  1002. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1003. bufqi = &peer->bufq_info;
  1004. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1005. qdf_list_remove_front(&bufqi->cached_bufq,
  1006. (qdf_list_node_t **)&cache_buf);
  1007. while (cache_buf) {
  1008. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1009. cache_buf->buf);
  1010. bufqi->entries -= num_buff_elem;
  1011. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1012. if (drop) {
  1013. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1014. cache_buf->buf);
  1015. } else {
  1016. /* Flush the cached frames to OSIF DEV */
  1017. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1018. if (status != QDF_STATUS_SUCCESS)
  1019. bufqi->dropped = dp_rx_drop_nbuf_list(
  1020. peer->vdev->pdev,
  1021. cache_buf->buf);
  1022. }
  1023. qdf_mem_free(cache_buf);
  1024. cache_buf = NULL;
  1025. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1026. qdf_list_remove_front(&bufqi->cached_bufq,
  1027. (qdf_list_node_t **)&cache_buf);
  1028. }
  1029. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1030. qdf_atomic_dec(&peer->flush_in_progress);
  1031. }
  1032. /**
  1033. * dp_rx_enqueue_rx() - cache rx frames
  1034. * @peer: peer
  1035. * @rx_buf_list: cache buffer list
  1036. *
  1037. * Return: None
  1038. */
  1039. static QDF_STATUS
  1040. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1041. {
  1042. struct dp_rx_cached_buf *cache_buf;
  1043. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1044. int num_buff_elem;
  1045. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1046. bufqi->entries, bufqi->dropped);
  1047. if (!peer->valid) {
  1048. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1049. rx_buf_list);
  1050. return QDF_STATUS_E_INVAL;
  1051. }
  1052. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1053. if (bufqi->entries >= bufqi->thresh) {
  1054. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1055. rx_buf_list);
  1056. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1057. return QDF_STATUS_E_RESOURCES;
  1058. }
  1059. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1060. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1061. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1062. if (!cache_buf) {
  1063. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1064. "Failed to allocate buf to cache rx frames");
  1065. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1066. rx_buf_list);
  1067. return QDF_STATUS_E_NOMEM;
  1068. }
  1069. cache_buf->buf = rx_buf_list;
  1070. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1071. qdf_list_insert_back(&bufqi->cached_bufq,
  1072. &cache_buf->node);
  1073. bufqi->entries += num_buff_elem;
  1074. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1075. return QDF_STATUS_SUCCESS;
  1076. }
  1077. static inline
  1078. bool dp_rx_is_peer_cache_bufq_supported(void)
  1079. {
  1080. return true;
  1081. }
  1082. #else
  1083. static inline
  1084. bool dp_rx_is_peer_cache_bufq_supported(void)
  1085. {
  1086. return false;
  1087. }
  1088. static inline QDF_STATUS
  1089. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1090. {
  1091. return QDF_STATUS_SUCCESS;
  1092. }
  1093. #endif
  1094. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1095. struct dp_peer *peer,
  1096. qdf_nbuf_t nbuf_head,
  1097. qdf_nbuf_t nbuf_tail)
  1098. {
  1099. /*
  1100. * highly unlikely to have a vdev without a registered rx
  1101. * callback function. if so let us free the nbuf_list.
  1102. */
  1103. if (qdf_unlikely(!vdev->osif_rx)) {
  1104. if (dp_rx_is_peer_cache_bufq_supported())
  1105. dp_rx_enqueue_rx(peer, nbuf_head);
  1106. else
  1107. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1108. return;
  1109. }
  1110. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1111. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1112. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1113. &nbuf_tail, (struct cdp_peer *) peer);
  1114. }
  1115. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1116. }
  1117. /**
  1118. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1119. * @nbuf: pointer to the first msdu of an amsdu.
  1120. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1121. *
  1122. * The ipsumed field of the skb is set based on whether HW validated the
  1123. * IP/TCP/UDP checksum.
  1124. *
  1125. * Return: void
  1126. */
  1127. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1128. qdf_nbuf_t nbuf,
  1129. uint8_t *rx_tlv_hdr)
  1130. {
  1131. qdf_nbuf_rx_cksum_t cksum = {0};
  1132. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1133. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1134. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1135. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1136. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1137. } else {
  1138. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1139. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1140. }
  1141. }
  1142. /**
  1143. * dp_rx_msdu_stats_update() - update per msdu stats.
  1144. * @soc: core txrx main context
  1145. * @nbuf: pointer to the first msdu of an amsdu.
  1146. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1147. * @peer: pointer to the peer object.
  1148. * @ring_id: reo dest ring number on which pkt is reaped.
  1149. * @tid_stats: per tid rx stats.
  1150. *
  1151. * update all the per msdu stats for that nbuf.
  1152. * Return: void
  1153. */
  1154. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1155. qdf_nbuf_t nbuf,
  1156. uint8_t *rx_tlv_hdr,
  1157. struct dp_peer *peer,
  1158. uint8_t ring_id,
  1159. struct cdp_tid_rx_stats *tid_stats)
  1160. {
  1161. bool is_ampdu, is_not_amsdu;
  1162. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1163. struct dp_vdev *vdev = peer->vdev;
  1164. qdf_ether_header_t *eh;
  1165. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1166. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1167. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1168. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1169. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1170. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1171. tid_stats->msdu_cnt++;
  1172. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1173. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1174. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1175. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1176. tid_stats->mcast_msdu_cnt++;
  1177. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1178. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1179. tid_stats->bcast_msdu_cnt++;
  1180. }
  1181. }
  1182. /*
  1183. * currently we can return from here as we have similar stats
  1184. * updated at per ppdu level instead of msdu level
  1185. */
  1186. if (!soc->process_rx_status)
  1187. return;
  1188. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1189. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1190. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1191. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1192. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1193. tid = qdf_nbuf_get_tid_val(nbuf);
  1194. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1195. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1196. rx_tlv_hdr);
  1197. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1198. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1199. DP_STATS_INC(peer, rx.bw[bw], 1);
  1200. /*
  1201. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1202. * then increase index [nss - 1] in array counter.
  1203. */
  1204. if (nss > 0 && (pkt_type == DOT11_N ||
  1205. pkt_type == DOT11_AC ||
  1206. pkt_type == DOT11_AX))
  1207. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1208. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1209. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1210. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1211. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1212. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1213. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1214. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1215. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1216. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1217. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1218. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1219. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1220. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1221. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1222. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1223. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1224. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1225. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1226. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1227. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1228. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1229. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1230. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1231. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1232. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1233. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1234. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1235. if ((soc->process_rx_status) &&
  1236. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1237. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1238. if (!vdev->pdev)
  1239. return;
  1240. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1241. &peer->stats, peer->peer_ids[0],
  1242. UPDATE_PEER_STATS,
  1243. vdev->pdev->pdev_id);
  1244. #endif
  1245. }
  1246. }
  1247. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1248. uint8_t *rx_tlv_hdr,
  1249. qdf_nbuf_t nbuf)
  1250. {
  1251. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1252. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1253. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1254. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1255. qdf_nbuf_is_da_valid(nbuf) &&
  1256. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1257. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1258. return false;
  1259. return true;
  1260. }
  1261. #ifndef WDS_VENDOR_EXTENSION
  1262. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1263. struct dp_vdev *vdev,
  1264. struct dp_peer *peer)
  1265. {
  1266. return 1;
  1267. }
  1268. #endif
  1269. #ifdef RX_DESC_DEBUG_CHECK
  1270. /**
  1271. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1272. * corruption
  1273. *
  1274. * @ring_desc: REO ring descriptor
  1275. * @rx_desc: Rx descriptor
  1276. *
  1277. * Return: NONE
  1278. */
  1279. static inline
  1280. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1281. struct dp_rx_desc *rx_desc)
  1282. {
  1283. struct hal_buf_info hbi;
  1284. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1285. /* Sanity check for possible buffer paddr corruption */
  1286. qdf_assert_always((&hbi)->paddr ==
  1287. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1288. }
  1289. #else
  1290. static inline
  1291. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1292. struct dp_rx_desc *rx_desc)
  1293. {
  1294. }
  1295. #endif
  1296. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1297. static inline
  1298. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1299. {
  1300. bool limit_hit = false;
  1301. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1302. limit_hit =
  1303. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1304. if (limit_hit)
  1305. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1306. return limit_hit;
  1307. }
  1308. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1309. {
  1310. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1311. }
  1312. #else
  1313. static inline
  1314. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1315. {
  1316. return false;
  1317. }
  1318. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1319. {
  1320. return false;
  1321. }
  1322. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1323. /**
  1324. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1325. *
  1326. * @nbuf: pkt skb pointer
  1327. *
  1328. * Return: true if matched, false if not
  1329. */
  1330. static inline
  1331. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1332. {
  1333. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1334. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1335. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1336. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1337. return true;
  1338. else
  1339. return false;
  1340. }
  1341. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1342. /**
  1343. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1344. * no corresbonding peer found
  1345. * @soc: core txrx main context
  1346. * @nbuf: pkt skb pointer
  1347. *
  1348. * This function will try to deliver some RX special frames to stack
  1349. * even there is no peer matched found. for instance, LFR case, some
  1350. * eapol data will be sent to host before peer_map done.
  1351. *
  1352. * Return: None
  1353. */
  1354. static inline
  1355. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1356. {
  1357. uint32_t peer_mdata;
  1358. uint16_t peer_id;
  1359. uint8_t vdev_id;
  1360. struct dp_vdev *vdev;
  1361. uint32_t l2_hdr_offset = 0;
  1362. uint16_t msdu_len = 0;
  1363. uint32_t pkt_len = 0;
  1364. uint8_t *rx_tlv_hdr;
  1365. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1366. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1367. if (peer_id > soc->max_peers)
  1368. goto deliver_fail;
  1369. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1370. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1371. if (!vdev || !vdev->osif_rx)
  1372. goto deliver_fail;
  1373. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1374. l2_hdr_offset =
  1375. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1376. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1377. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1378. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1379. qdf_nbuf_pull_head(nbuf,
  1380. RX_PKT_TLVS_LEN +
  1381. l2_hdr_offset);
  1382. /* only allow special frames */
  1383. if (!dp_is_special_data(nbuf))
  1384. goto deliver_fail;
  1385. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1386. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1387. return;
  1388. deliver_fail:
  1389. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1390. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1391. qdf_nbuf_free(nbuf);
  1392. }
  1393. #else
  1394. static inline
  1395. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1396. {
  1397. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1398. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1399. qdf_nbuf_free(nbuf);
  1400. }
  1401. #endif
  1402. /**
  1403. * dp_rx_process() - Brain of the Rx processing functionality
  1404. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1405. * @soc: core txrx main context
  1406. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1407. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1408. * @quota: No. of units (packets) that can be serviced in one shot.
  1409. *
  1410. * This function implements the core of Rx functionality. This is
  1411. * expected to handle only non-error frames.
  1412. *
  1413. * Return: uint32_t: No. of elements processed
  1414. */
  1415. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1416. uint8_t reo_ring_num, uint32_t quota)
  1417. {
  1418. hal_ring_desc_t ring_desc;
  1419. hal_soc_handle_t hal_soc;
  1420. struct dp_rx_desc *rx_desc = NULL;
  1421. qdf_nbuf_t nbuf, next;
  1422. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1423. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1424. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1425. uint32_t l2_hdr_offset = 0;
  1426. uint16_t msdu_len = 0;
  1427. uint16_t peer_id;
  1428. struct dp_peer *peer;
  1429. struct dp_vdev *vdev;
  1430. uint32_t pkt_len = 0;
  1431. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1432. struct hal_rx_msdu_desc_info msdu_desc_info;
  1433. enum hal_reo_error_status error;
  1434. uint32_t peer_mdata;
  1435. uint8_t *rx_tlv_hdr;
  1436. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1437. uint8_t mac_id = 0;
  1438. struct dp_pdev *pdev;
  1439. struct dp_pdev *rx_pdev;
  1440. struct dp_srng *dp_rxdma_srng;
  1441. struct rx_desc_pool *rx_desc_pool;
  1442. struct dp_soc *soc = int_ctx->soc;
  1443. uint8_t ring_id = 0;
  1444. uint8_t core_id = 0;
  1445. struct cdp_tid_rx_stats *tid_stats;
  1446. qdf_nbuf_t nbuf_head;
  1447. qdf_nbuf_t nbuf_tail;
  1448. qdf_nbuf_t deliver_list_head;
  1449. qdf_nbuf_t deliver_list_tail;
  1450. uint32_t num_rx_bufs_reaped = 0;
  1451. uint32_t intr_id;
  1452. struct hif_opaque_softc *scn;
  1453. int32_t tid = 0;
  1454. bool is_prev_msdu_last = true;
  1455. uint32_t num_entries_avail = 0;
  1456. DP_HIST_INIT();
  1457. qdf_assert_always(soc && hal_ring_hdl);
  1458. hal_soc = soc->hal_soc;
  1459. qdf_assert_always(hal_soc);
  1460. scn = soc->hif_handle;
  1461. hif_pm_runtime_mark_last_busy(scn);
  1462. intr_id = int_ctx->dp_intr_id;
  1463. more_data:
  1464. /* reset local variables here to be re-used in the function */
  1465. nbuf_head = NULL;
  1466. nbuf_tail = NULL;
  1467. deliver_list_head = NULL;
  1468. deliver_list_tail = NULL;
  1469. peer = NULL;
  1470. vdev = NULL;
  1471. num_rx_bufs_reaped = 0;
  1472. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1473. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1474. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1475. qdf_mem_zero(head, sizeof(head));
  1476. qdf_mem_zero(tail, sizeof(tail));
  1477. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1478. /*
  1479. * Need API to convert from hal_ring pointer to
  1480. * Ring Type / Ring Id combo
  1481. */
  1482. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1483. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1484. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1485. goto done;
  1486. }
  1487. /*
  1488. * start reaping the buffers from reo ring and queue
  1489. * them in per vdev queue.
  1490. * Process the received pkts in a different per vdev loop.
  1491. */
  1492. while (qdf_likely(quota &&
  1493. (ring_desc = hal_srng_dst_peek(hal_soc,
  1494. hal_ring_hdl)))) {
  1495. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1496. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1497. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1498. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1499. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1500. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1501. /* Don't know how to deal with this -- assert */
  1502. qdf_assert(0);
  1503. }
  1504. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1505. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1506. qdf_assert(rx_desc);
  1507. /*
  1508. * this is a unlikely scenario where the host is reaping
  1509. * a descriptor which it already reaped just a while ago
  1510. * but is yet to replenish it back to HW.
  1511. * In this case host will dump the last 128 descriptors
  1512. * including the software descriptor rx_desc and assert.
  1513. */
  1514. if (qdf_unlikely(!rx_desc->in_use)) {
  1515. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1516. dp_info_rl("Reaping rx_desc not in use!");
  1517. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1518. ring_desc, rx_desc);
  1519. /* ignore duplicate RX desc and continue to process */
  1520. /* Pop out the descriptor */
  1521. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1522. continue;
  1523. }
  1524. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1525. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1526. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1527. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1528. ring_desc, rx_desc);
  1529. }
  1530. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1531. /* TODO */
  1532. /*
  1533. * Need a separate API for unmapping based on
  1534. * phyiscal address
  1535. */
  1536. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1537. QDF_DMA_FROM_DEVICE);
  1538. rx_desc->unmapped = 1;
  1539. core_id = smp_processor_id();
  1540. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1541. /* Get MPDU DESC info */
  1542. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1543. /* Get MSDU DESC info */
  1544. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1545. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1546. HAL_MPDU_F_RAW_AMPDU)) {
  1547. /* previous msdu has end bit set, so current one is
  1548. * the new MPDU
  1549. */
  1550. if (is_prev_msdu_last) {
  1551. is_prev_msdu_last = false;
  1552. /* Get number of entries available in HW ring */
  1553. num_entries_avail =
  1554. hal_srng_dst_num_valid(hal_soc,
  1555. hal_ring_hdl, 1);
  1556. /* For new MPDU check if we can read complete
  1557. * MPDU by comparing the number of buffers
  1558. * available and number of buffers needed to
  1559. * reap this MPDU
  1560. */
  1561. if (((msdu_desc_info.msdu_len /
  1562. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1563. num_entries_avail)
  1564. break;
  1565. } else {
  1566. if (msdu_desc_info.msdu_flags &
  1567. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1568. is_prev_msdu_last = true;
  1569. }
  1570. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1571. }
  1572. /* Pop out the descriptor*/
  1573. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1574. rx_bufs_reaped[rx_desc->pool_id]++;
  1575. peer_mdata = mpdu_desc_info.peer_meta_data;
  1576. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1577. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1578. /*
  1579. * save msdu flags first, last and continuation msdu in
  1580. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1581. * length to nbuf->cb. This ensures the info required for
  1582. * per pkt processing is always in the same cache line.
  1583. * This helps in improving throughput for smaller pkt
  1584. * sizes.
  1585. */
  1586. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1587. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1588. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1589. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1590. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1591. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1592. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1593. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1594. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1595. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1596. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1597. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1598. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1599. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1600. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1601. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1602. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1603. /*
  1604. * if continuation bit is set then we have MSDU spread
  1605. * across multiple buffers, let us not decrement quota
  1606. * till we reap all buffers of that MSDU.
  1607. */
  1608. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1609. quota -= 1;
  1610. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1611. &tail[rx_desc->pool_id],
  1612. rx_desc);
  1613. num_rx_bufs_reaped++;
  1614. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1615. break;
  1616. }
  1617. done:
  1618. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1619. if (nbuf_tail)
  1620. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1621. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1622. /*
  1623. * continue with next mac_id if no pkts were reaped
  1624. * from that pool
  1625. */
  1626. if (!rx_bufs_reaped[mac_id])
  1627. continue;
  1628. pdev = soc->pdev_list[mac_id];
  1629. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1630. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1631. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1632. rx_desc_pool, rx_bufs_reaped[mac_id],
  1633. &head[mac_id], &tail[mac_id]);
  1634. }
  1635. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1636. /* Peer can be NULL is case of LFR */
  1637. if (qdf_likely(peer))
  1638. vdev = NULL;
  1639. /*
  1640. * BIG loop where each nbuf is dequeued from global queue,
  1641. * processed and queued back on a per vdev basis. These nbufs
  1642. * are sent to stack as and when we run out of nbufs
  1643. * or a new nbuf dequeued from global queue has a different
  1644. * vdev when compared to previous nbuf.
  1645. */
  1646. nbuf = nbuf_head;
  1647. while (nbuf) {
  1648. next = nbuf->next;
  1649. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1650. /* Get TID from struct cb->tid_val, save to tid */
  1651. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1652. tid = qdf_nbuf_get_tid_val(nbuf);
  1653. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1654. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1655. peer = dp_peer_find_by_id(soc, peer_id);
  1656. if (peer) {
  1657. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1658. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1659. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1660. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1661. QDF_NBUF_RX_PKT_DATA_TRACK;
  1662. }
  1663. rx_bufs_used++;
  1664. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1665. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1666. deliver_list_tail);
  1667. deliver_list_head = NULL;
  1668. deliver_list_tail = NULL;
  1669. }
  1670. if (qdf_likely(peer)) {
  1671. vdev = peer->vdev;
  1672. } else {
  1673. nbuf->next = NULL;
  1674. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1675. nbuf = next;
  1676. continue;
  1677. }
  1678. if (qdf_unlikely(!vdev)) {
  1679. qdf_nbuf_free(nbuf);
  1680. nbuf = next;
  1681. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1682. dp_peer_unref_del_find_by_id(peer);
  1683. continue;
  1684. }
  1685. rx_pdev = vdev->pdev;
  1686. DP_RX_TID_SAVE(nbuf, tid);
  1687. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1688. qdf_nbuf_set_timestamp(nbuf);
  1689. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1690. tid_stats =
  1691. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1692. /*
  1693. * Check if DMA completed -- msdu_done is the last bit
  1694. * to be written
  1695. */
  1696. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1697. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1698. dp_err("MSDU DONE failure");
  1699. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1700. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1701. QDF_TRACE_LEVEL_INFO);
  1702. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1703. qdf_nbuf_free(nbuf);
  1704. qdf_assert(0);
  1705. nbuf = next;
  1706. continue;
  1707. }
  1708. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1709. /*
  1710. * First IF condition:
  1711. * 802.11 Fragmented pkts are reinjected to REO
  1712. * HW block as SG pkts and for these pkts we only
  1713. * need to pull the RX TLVS header length.
  1714. * Second IF condition:
  1715. * The below condition happens when an MSDU is spread
  1716. * across multiple buffers. This can happen in two cases
  1717. * 1. The nbuf size is smaller then the received msdu.
  1718. * ex: we have set the nbuf size to 2048 during
  1719. * nbuf_alloc. but we received an msdu which is
  1720. * 2304 bytes in size then this msdu is spread
  1721. * across 2 nbufs.
  1722. *
  1723. * 2. AMSDUs when RAW mode is enabled.
  1724. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1725. * across 1st nbuf and 2nd nbuf and last MSDU is
  1726. * spread across 2nd nbuf and 3rd nbuf.
  1727. *
  1728. * for these scenarios let us create a skb frag_list and
  1729. * append these buffers till the last MSDU of the AMSDU
  1730. * Third condition:
  1731. * This is the most likely case, we receive 802.3 pkts
  1732. * decapsulated by HW, here we need to set the pkt length.
  1733. */
  1734. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1735. bool is_mcbc, is_sa_vld, is_da_vld;
  1736. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1737. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1738. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1739. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1740. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1741. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1742. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1743. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1744. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1745. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1746. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1747. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1748. next = nbuf->next;
  1749. } else {
  1750. l2_hdr_offset =
  1751. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1752. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1753. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1754. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1755. qdf_nbuf_pull_head(nbuf,
  1756. RX_PKT_TLVS_LEN +
  1757. l2_hdr_offset);
  1758. }
  1759. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1760. QDF_TRACE(QDF_MODULE_ID_DP,
  1761. QDF_TRACE_LEVEL_ERROR,
  1762. FL("Policy Check Drop pkt"));
  1763. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1764. /* Drop & free packet */
  1765. qdf_nbuf_free(nbuf);
  1766. /* Statistics */
  1767. nbuf = next;
  1768. dp_peer_unref_del_find_by_id(peer);
  1769. continue;
  1770. }
  1771. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1772. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1773. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1774. false))) {
  1775. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1776. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1777. qdf_nbuf_free(nbuf);
  1778. nbuf = next;
  1779. dp_peer_unref_del_find_by_id(peer);
  1780. continue;
  1781. }
  1782. if (soc->process_rx_status)
  1783. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1784. /* Update the protocol tag in SKB based on CCE metadata */
  1785. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1786. reo_ring_num, false, true);
  1787. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1788. ring_id, tid_stats);
  1789. if (qdf_unlikely(vdev->mesh_vdev)) {
  1790. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1791. == QDF_STATUS_SUCCESS) {
  1792. QDF_TRACE(QDF_MODULE_ID_DP,
  1793. QDF_TRACE_LEVEL_INFO_MED,
  1794. FL("mesh pkt filtered"));
  1795. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1796. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1797. 1);
  1798. qdf_nbuf_free(nbuf);
  1799. nbuf = next;
  1800. dp_peer_unref_del_find_by_id(peer);
  1801. continue;
  1802. }
  1803. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1804. }
  1805. if (qdf_likely(vdev->rx_decap_type ==
  1806. htt_cmn_pkt_type_ethernet) &&
  1807. qdf_likely(!vdev->mesh_vdev)) {
  1808. /* WDS Destination Address Learning */
  1809. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1810. /* Due to HW issue, sometimes we see that the sa_idx
  1811. * and da_idx are invalid with sa_valid and da_valid
  1812. * bits set
  1813. *
  1814. * in this case we also see that value of
  1815. * sa_sw_peer_id is set as 0
  1816. *
  1817. * Drop the packet if sa_idx and da_idx OOB or
  1818. * sa_sw_peerid is 0
  1819. */
  1820. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1821. qdf_nbuf_free(nbuf);
  1822. nbuf = next;
  1823. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1824. dp_peer_unref_del_find_by_id(peer);
  1825. continue;
  1826. }
  1827. /* WDS Source Port Learning */
  1828. if (qdf_likely(vdev->wds_enabled))
  1829. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1830. peer, nbuf);
  1831. /* Intrabss-fwd */
  1832. if (dp_rx_check_ap_bridge(vdev))
  1833. if (dp_rx_intrabss_fwd(soc,
  1834. peer,
  1835. rx_tlv_hdr,
  1836. nbuf)) {
  1837. nbuf = next;
  1838. dp_peer_unref_del_find_by_id(peer);
  1839. tid_stats->intrabss_cnt++;
  1840. continue; /* Get next desc */
  1841. }
  1842. }
  1843. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1844. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1845. DP_RX_LIST_APPEND(deliver_list_head,
  1846. deliver_list_tail,
  1847. nbuf);
  1848. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1849. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1850. tid_stats->delivered_to_stack++;
  1851. nbuf = next;
  1852. dp_peer_unref_del_find_by_id(peer);
  1853. }
  1854. if (deliver_list_head && peer)
  1855. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1856. deliver_list_tail);
  1857. if (dp_rx_enable_eol_data_check(soc)) {
  1858. if (quota &&
  1859. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  1860. hal_ring_hdl)) {
  1861. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1862. if (!hif_exec_should_yield(scn, intr_id))
  1863. goto more_data;
  1864. }
  1865. }
  1866. /* Update histogram statistics by looping through pdev's */
  1867. DP_RX_HIST_STATS_PER_PDEV();
  1868. return rx_bufs_used; /* Assume no scale factor for now */
  1869. }
  1870. /**
  1871. * dp_rx_detach() - detach dp rx
  1872. * @pdev: core txrx pdev context
  1873. *
  1874. * This function will detach DP RX into main device context
  1875. * will free DP Rx resources.
  1876. *
  1877. * Return: void
  1878. */
  1879. void
  1880. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1881. {
  1882. uint8_t pdev_id = pdev->pdev_id;
  1883. struct dp_soc *soc = pdev->soc;
  1884. struct rx_desc_pool *rx_desc_pool;
  1885. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1886. if (rx_desc_pool->pool_size != 0) {
  1887. if (!dp_is_soc_reinit(soc))
  1888. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1889. rx_desc_pool);
  1890. else
  1891. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1892. }
  1893. return;
  1894. }
  1895. static QDF_STATUS
  1896. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1897. struct dp_pdev *dp_pdev)
  1898. {
  1899. qdf_dma_addr_t paddr;
  1900. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1901. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1902. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1903. FALSE);
  1904. if (!(*nbuf)) {
  1905. dp_err("nbuf alloc failed");
  1906. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1907. return ret;
  1908. }
  1909. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1910. QDF_DMA_FROM_DEVICE);
  1911. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1912. qdf_nbuf_free(*nbuf);
  1913. dp_err("nbuf map failed");
  1914. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1915. return ret;
  1916. }
  1917. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1918. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1919. if (ret == QDF_STATUS_E_FAILURE) {
  1920. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1921. QDF_DMA_FROM_DEVICE);
  1922. qdf_nbuf_free(*nbuf);
  1923. dp_err("nbuf check x86 failed");
  1924. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1925. return ret;
  1926. }
  1927. return QDF_STATUS_SUCCESS;
  1928. }
  1929. QDF_STATUS
  1930. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1931. struct dp_srng *dp_rxdma_srng,
  1932. struct rx_desc_pool *rx_desc_pool,
  1933. uint32_t num_req_buffers)
  1934. {
  1935. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1936. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  1937. union dp_rx_desc_list_elem_t *next;
  1938. void *rxdma_ring_entry;
  1939. qdf_dma_addr_t paddr;
  1940. qdf_nbuf_t *rx_nbuf_arr;
  1941. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1942. uint32_t buffer_index, nbuf_ptrs_per_page;
  1943. qdf_nbuf_t nbuf;
  1944. QDF_STATUS ret;
  1945. int page_idx, total_pages;
  1946. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1947. union dp_rx_desc_list_elem_t *tail = NULL;
  1948. if (qdf_unlikely(!rxdma_srng)) {
  1949. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1950. return QDF_STATUS_E_FAILURE;
  1951. }
  1952. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1953. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1954. num_req_buffers, &desc_list, &tail);
  1955. if (!nr_descs) {
  1956. dp_err("no free rx_descs in freelist");
  1957. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1958. return QDF_STATUS_E_NOMEM;
  1959. }
  1960. dp_debug("got %u RX descs for driver attach", nr_descs);
  1961. /*
  1962. * Try to allocate pointers to the nbuf one page at a time.
  1963. * Take pointers that can fit in one page of memory and
  1964. * iterate through the total descriptors that need to be
  1965. * allocated in order of pages. Reuse the pointers that
  1966. * have been allocated to fit in one page across each
  1967. * iteration to index into the nbuf.
  1968. */
  1969. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1970. /*
  1971. * Add an extra page to store the remainder if any
  1972. */
  1973. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1974. total_pages++;
  1975. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1976. if (!rx_nbuf_arr) {
  1977. dp_err("failed to allocate nbuf array");
  1978. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1979. QDF_BUG(0);
  1980. return QDF_STATUS_E_NOMEM;
  1981. }
  1982. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1983. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1984. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1985. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1986. /*
  1987. * The last page of buffer pointers may not be required
  1988. * completely based on the number of descriptors. Below
  1989. * check will ensure we are allocating only the
  1990. * required number of descriptors.
  1991. */
  1992. if (nr_nbuf_total >= nr_descs)
  1993. break;
  1994. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1995. &rx_nbuf_arr[nr_nbuf],
  1996. dp_pdev);
  1997. if (QDF_IS_STATUS_ERROR(ret))
  1998. break;
  1999. nr_nbuf_total++;
  2000. }
  2001. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2002. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2003. rxdma_ring_entry =
  2004. hal_srng_src_get_next(dp_soc->hal_soc,
  2005. rxdma_srng);
  2006. qdf_assert_always(rxdma_ring_entry);
  2007. next = desc_list->next;
  2008. nbuf = rx_nbuf_arr[buffer_index];
  2009. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2010. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2011. desc_list->rx_desc.in_use = 1;
  2012. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2013. desc_list->rx_desc.cookie,
  2014. rx_desc_pool->owner);
  2015. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2016. desc_list = next;
  2017. }
  2018. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2019. }
  2020. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2021. qdf_mem_free(rx_nbuf_arr);
  2022. if (!nr_nbuf_total) {
  2023. dp_err("No nbuf's allocated");
  2024. QDF_BUG(0);
  2025. return QDF_STATUS_E_RESOURCES;
  2026. }
  2027. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2028. RX_BUFFER_SIZE * nr_nbuf_total);
  2029. return QDF_STATUS_SUCCESS;
  2030. }
  2031. /**
  2032. * dp_rx_attach() - attach DP RX
  2033. * @pdev: core txrx pdev context
  2034. *
  2035. * This function will attach a DP RX instance into the main
  2036. * device (SOC) context. Will allocate dp rx resource and
  2037. * initialize resources.
  2038. *
  2039. * Return: QDF_STATUS_SUCCESS: success
  2040. * QDF_STATUS_E_RESOURCES: Error return
  2041. */
  2042. QDF_STATUS
  2043. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2044. {
  2045. uint8_t pdev_id = pdev->pdev_id;
  2046. struct dp_soc *soc = pdev->soc;
  2047. uint32_t rxdma_entries;
  2048. struct dp_srng *dp_rxdma_srng;
  2049. struct rx_desc_pool *rx_desc_pool;
  2050. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2051. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2052. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2053. return QDF_STATUS_SUCCESS;
  2054. }
  2055. pdev = soc->pdev_list[pdev_id];
  2056. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2057. rxdma_entries = dp_rxdma_srng->num_entries;
  2058. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2059. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2060. dp_rx_desc_pool_alloc(soc, pdev_id,
  2061. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2062. rx_desc_pool);
  2063. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2064. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2065. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2066. rx_desc_pool, rxdma_entries - 1);
  2067. }
  2068. /*
  2069. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2070. * @soc: core txrx main context
  2071. * @pdev: core txrx pdev context
  2072. *
  2073. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2074. * until retry times reaches max threshold or succeeded.
  2075. *
  2076. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2077. */
  2078. qdf_nbuf_t
  2079. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2080. {
  2081. uint8_t *buf;
  2082. int32_t nbuf_retry_count;
  2083. QDF_STATUS ret;
  2084. qdf_nbuf_t nbuf = NULL;
  2085. for (nbuf_retry_count = 0; nbuf_retry_count <
  2086. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2087. nbuf_retry_count++) {
  2088. /* Allocate a new skb */
  2089. nbuf = qdf_nbuf_alloc(soc->osdev,
  2090. RX_BUFFER_SIZE,
  2091. RX_BUFFER_RESERVATION,
  2092. RX_BUFFER_ALIGNMENT,
  2093. FALSE);
  2094. if (!nbuf) {
  2095. DP_STATS_INC(pdev,
  2096. replenish.nbuf_alloc_fail, 1);
  2097. continue;
  2098. }
  2099. buf = qdf_nbuf_data(nbuf);
  2100. memset(buf, 0, RX_BUFFER_SIZE);
  2101. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2102. QDF_DMA_FROM_DEVICE);
  2103. /* nbuf map failed */
  2104. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2105. qdf_nbuf_free(nbuf);
  2106. DP_STATS_INC(pdev, replenish.map_err, 1);
  2107. continue;
  2108. }
  2109. /* qdf_nbuf alloc and map succeeded */
  2110. break;
  2111. }
  2112. /* qdf_nbuf still alloc or map failed */
  2113. if (qdf_unlikely(nbuf_retry_count >=
  2114. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2115. return NULL;
  2116. return nbuf;
  2117. }