hal_8074v1_rx.h 13 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "hal_internal.h"
  20. #include "cdp_txrx_mon_struct.h"
  21. #include "qdf_trace.h"
  22. #include "hal_rx.h"
  23. #include "hal_tx.h"
  24. #include "dp_types.h"
  25. #include "hal_api_mon.h"
  26. #define HAL_RX_MPDU_GET_SEQUENCE_NUMBER(_rx_mpdu_info) \
  27. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  28. RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_OFFSET)), \
  29. RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_MASK, \
  30. RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_LSB))
  31. #define HAL_RX_MSDU_END_DA_IS_MCBC_GET(_rx_msdu_end) \
  32. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  33. RX_MSDU_END_5_DA_IS_MCBC_OFFSET)), \
  34. RX_MSDU_END_5_DA_IS_MCBC_MASK, \
  35. RX_MSDU_END_5_DA_IS_MCBC_LSB))
  36. #define HAL_RX_MSDU_END_SA_IS_VALID_GET(_rx_msdu_end) \
  37. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  38. RX_MSDU_END_5_SA_IS_VALID_OFFSET)), \
  39. RX_MSDU_END_5_SA_IS_VALID_MASK, \
  40. RX_MSDU_END_5_SA_IS_VALID_LSB))
  41. #define HAL_RX_MSDU_END_SA_IDX_GET(_rx_msdu_end) \
  42. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  43. RX_MSDU_END_13_SA_IDX_OFFSET)), \
  44. RX_MSDU_END_13_SA_IDX_MASK, \
  45. RX_MSDU_END_13_SA_IDX_LSB))
  46. #define HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(_rx_msdu_end) \
  47. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  48. RX_MSDU_END_5_L3_HEADER_PADDING_OFFSET)), \
  49. RX_MSDU_END_5_L3_HEADER_PADDING_MASK, \
  50. RX_MSDU_END_5_L3_HEADER_PADDING_LSB))
  51. #define HAL_RX_MPDU_ENCRYPTION_INFO_VALID(_rx_mpdu_info) \
  52. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  53. RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_OFFSET)), \
  54. RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_MASK, \
  55. RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_LSB))
  56. #define HAL_RX_MPDU_PN_31_0_GET(_rx_mpdu_info) \
  57. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  58. RX_MPDU_INFO_4_PN_31_0_OFFSET)), \
  59. RX_MPDU_INFO_4_PN_31_0_MASK, \
  60. RX_MPDU_INFO_4_PN_31_0_LSB))
  61. #define HAL_RX_MPDU_PN_63_32_GET(_rx_mpdu_info) \
  62. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  63. RX_MPDU_INFO_5_PN_63_32_OFFSET)), \
  64. RX_MPDU_INFO_5_PN_63_32_MASK, \
  65. RX_MPDU_INFO_5_PN_63_32_LSB))
  66. #define HAL_RX_MPDU_PN_95_64_GET(_rx_mpdu_info) \
  67. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  68. RX_MPDU_INFO_6_PN_95_64_OFFSET)), \
  69. RX_MPDU_INFO_6_PN_95_64_MASK, \
  70. RX_MPDU_INFO_6_PN_95_64_LSB))
  71. #define HAL_RX_MPDU_PN_127_96_GET(_rx_mpdu_info) \
  72. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  73. RX_MPDU_INFO_7_PN_127_96_OFFSET)), \
  74. RX_MPDU_INFO_7_PN_127_96_MASK, \
  75. RX_MPDU_INFO_7_PN_127_96_LSB))
  76. #define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
  77. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  78. RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
  79. RX_MSDU_END_5_FIRST_MSDU_MASK, \
  80. RX_MSDU_END_5_FIRST_MSDU_LSB))
  81. #define HAL_RX_MSDU_END_DA_IS_VALID_GET(_rx_msdu_end) \
  82. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  83. RX_MSDU_END_5_DA_IS_VALID_OFFSET)), \
  84. RX_MSDU_END_5_DA_IS_VALID_MASK, \
  85. RX_MSDU_END_5_DA_IS_VALID_LSB))
  86. #define HAL_RX_MSDU_END_LAST_MSDU_GET(_rx_msdu_end) \
  87. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  88. RX_MSDU_END_5_LAST_MSDU_OFFSET)), \
  89. RX_MSDU_END_5_LAST_MSDU_MASK, \
  90. RX_MSDU_END_5_LAST_MSDU_LSB))
  91. #define HAL_RX_MPDU_GET_MAC_AD4_VALID(_rx_mpdu_info) \
  92. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  93. RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_OFFSET)), \
  94. RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_MASK, \
  95. RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_LSB))
  96. #define HAL_RX_MPDU_INFO_SW_PEER_ID_GET(_rx_mpdu_info) \
  97. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \
  98. RX_MPDU_INFO_1_SW_PEER_ID_OFFSET)), \
  99. RX_MPDU_INFO_1_SW_PEER_ID_MASK, \
  100. RX_MPDU_INFO_1_SW_PEER_ID_LSB))
  101. /*
  102. * hal_rx_msdu_start_nss_get_8074(): API to get the NSS
  103. * Interval from rx_msdu_start
  104. *
  105. * @buf: pointer to the start of RX PKT TLV header
  106. * Return: uint32_t(nss)
  107. */
  108. static uint32_t
  109. hal_rx_msdu_start_nss_get_8074(uint8_t *buf)
  110. {
  111. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  112. struct rx_msdu_start *msdu_start =
  113. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  114. uint32_t nss;
  115. nss = HAL_RX_MSDU_START_NSS_GET(msdu_start);
  116. return nss;
  117. }
  118. /**
  119. * hal_rx_mon_hw_desc_get_mpdu_status_8074(): Retrieve MPDU status
  120. *
  121. * @ hw_desc_addr: Start address of Rx HW TLVs
  122. * @ rs: Status for monitor mode
  123. *
  124. * Return: void
  125. */
  126. static void hal_rx_mon_hw_desc_get_mpdu_status_8074(void *hw_desc_addr,
  127. struct mon_rx_status *rs)
  128. {
  129. struct rx_msdu_start *rx_msdu_start;
  130. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  131. uint32_t reg_value;
  132. const uint32_t sgi_hw_to_cdp[] = {
  133. CDP_SGI_0_8_US,
  134. CDP_SGI_0_4_US,
  135. CDP_SGI_1_6_US,
  136. CDP_SGI_3_2_US,
  137. };
  138. rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
  139. HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs);
  140. rs->ant_signal_db = HAL_RX_GET(rx_msdu_start,
  141. RX_MSDU_START_5, USER_RSSI);
  142. rs->is_stbc = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, STBC);
  143. reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, SGI);
  144. rs->sgi = sgi_hw_to_cdp[reg_value];
  145. rs->nr_ant = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, NSS);
  146. reg_value = HAL_RX_GET(rx_msdu_start, RX_MSDU_START_5, RECEPTION_TYPE);
  147. rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0;
  148. /* TODO: rs->beamformed should be set for SU beamforming also */
  149. }
  150. #define LINK_DESC_SIZE (NUM_OF_DWORDS_RX_MSDU_LINK << 2)
  151. static uint32_t hal_get_link_desc_size_8074(void)
  152. {
  153. return LINK_DESC_SIZE;
  154. }
  155. /*
  156. * hal_rx_get_tlv_8074(): API to get the tlv
  157. *
  158. * @rx_tlv: TLV data extracted from the rx packet
  159. * Return: uint8_t
  160. */
  161. static uint8_t hal_rx_get_tlv_8074(void *rx_tlv)
  162. {
  163. return HAL_RX_GET(rx_tlv, PHYRX_RSSI_LEGACY_35, RECEIVE_BANDWIDTH);
  164. }
  165. /**
  166. * hal_rx_proc_phyrx_other_receive_info_tlv_8074()
  167. * -process other receive info TLV
  168. * @rx_tlv_hdr: pointer to TLV header
  169. * @ppdu_info: pointer to ppdu_info
  170. *
  171. * Return: None
  172. */
  173. static
  174. void hal_rx_proc_phyrx_other_receive_info_tlv_8074(void *rx_tlv_hdr,
  175. void *ppdu_info)
  176. {
  177. }
  178. /**
  179. * hal_rx_dump_msdu_start_tlv_8074() : dump RX msdu_start TLV in structured
  180. * human readable format.
  181. * @ msdu_start: pointer the msdu_start TLV in pkt.
  182. * @ dbg_level: log level.
  183. *
  184. * Return: void
  185. */
  186. static void hal_rx_dump_msdu_start_tlv_8074(void *msdustart,
  187. uint8_t dbg_level)
  188. {
  189. struct rx_msdu_start *msdu_start = (struct rx_msdu_start *)msdustart;
  190. QDF_TRACE(QDF_MODULE_ID_DP, dbg_level,
  191. "rx_msdu_start tlv - "
  192. "rxpcu_mpdu_filter_in_category: %d "
  193. "sw_frame_group_id: %d "
  194. "phy_ppdu_id: %d "
  195. "msdu_length: %d "
  196. "ipsec_esp: %d "
  197. "l3_offset: %d "
  198. "ipsec_ah: %d "
  199. "l4_offset: %d "
  200. "msdu_number: %d "
  201. "decap_format: %d "
  202. "ipv4_proto: %d "
  203. "ipv6_proto: %d "
  204. "tcp_proto: %d "
  205. "udp_proto: %d "
  206. "ip_frag: %d "
  207. "tcp_only_ack: %d "
  208. "da_is_bcast_mcast: %d "
  209. "ip4_protocol_ip6_next_header: %d "
  210. "toeplitz_hash_2_or_4: %d "
  211. "flow_id_toeplitz: %d "
  212. "user_rssi: %d "
  213. "pkt_type: %d "
  214. "stbc: %d "
  215. "sgi: %d "
  216. "rate_mcs: %d "
  217. "receive_bandwidth: %d "
  218. "reception_type: %d "
  219. "toeplitz_hash: %d "
  220. "nss: %d "
  221. "ppdu_start_timestamp: %d "
  222. "sw_phy_meta_data: %d ",
  223. msdu_start->rxpcu_mpdu_filter_in_category,
  224. msdu_start->sw_frame_group_id,
  225. msdu_start->phy_ppdu_id,
  226. msdu_start->msdu_length,
  227. msdu_start->ipsec_esp,
  228. msdu_start->l3_offset,
  229. msdu_start->ipsec_ah,
  230. msdu_start->l4_offset,
  231. msdu_start->msdu_number,
  232. msdu_start->decap_format,
  233. msdu_start->ipv4_proto,
  234. msdu_start->ipv6_proto,
  235. msdu_start->tcp_proto,
  236. msdu_start->udp_proto,
  237. msdu_start->ip_frag,
  238. msdu_start->tcp_only_ack,
  239. msdu_start->da_is_bcast_mcast,
  240. msdu_start->ip4_protocol_ip6_next_header,
  241. msdu_start->toeplitz_hash_2_or_4,
  242. msdu_start->flow_id_toeplitz,
  243. msdu_start->user_rssi,
  244. msdu_start->pkt_type,
  245. msdu_start->stbc,
  246. msdu_start->sgi,
  247. msdu_start->rate_mcs,
  248. msdu_start->receive_bandwidth,
  249. msdu_start->reception_type,
  250. msdu_start->toeplitz_hash,
  251. msdu_start->nss,
  252. msdu_start->ppdu_start_timestamp,
  253. msdu_start->sw_phy_meta_data);
  254. }
  255. /**
  256. * hal_rx_dump_msdu_end_tlv_8074: dump RX msdu_end TLV in structured
  257. * human readable format.
  258. * @ msdu_end: pointer the msdu_end TLV in pkt.
  259. * @ dbg_level: log level.
  260. *
  261. * Return: void
  262. */
  263. static void hal_rx_dump_msdu_end_tlv_8074(void *msduend,
  264. uint8_t dbg_level)
  265. {
  266. struct rx_msdu_end *msdu_end = (struct rx_msdu_end *)msduend;
  267. QDF_TRACE(QDF_MODULE_ID_DP, dbg_level,
  268. "rx_msdu_end tlv - "
  269. "rxpcu_mpdu_filter_in_category: %d "
  270. "sw_frame_group_id: %d "
  271. "phy_ppdu_id: %d "
  272. "ip_hdr_chksum: %d "
  273. "tcp_udp_chksum: %d "
  274. "key_id_octet: %d "
  275. "cce_super_rule: %d "
  276. "cce_classify_not_done_truncat: %d "
  277. "cce_classify_not_done_cce_dis: %d "
  278. "ext_wapi_pn_63_48: %d "
  279. "ext_wapi_pn_95_64: %d "
  280. "ext_wapi_pn_127_96: %d "
  281. "reported_mpdu_length: %d "
  282. "first_msdu: %d "
  283. "last_msdu: %d "
  284. "sa_idx_timeout: %d "
  285. "da_idx_timeout: %d "
  286. "msdu_limit_error: %d "
  287. "flow_idx_timeout: %d "
  288. "flow_idx_invalid: %d "
  289. "wifi_parser_error: %d "
  290. "amsdu_parser_error: %d "
  291. "sa_is_valid: %d "
  292. "da_is_valid: %d "
  293. "da_is_mcbc: %d "
  294. "l3_header_padding: %d "
  295. "ipv6_options_crc: %d "
  296. "tcp_seq_number: %d "
  297. "tcp_ack_number: %d "
  298. "tcp_flag: %d "
  299. "lro_eligible: %d "
  300. "window_size: %d "
  301. "da_offset: %d "
  302. "sa_offset: %d "
  303. "da_offset_valid: %d "
  304. "sa_offset_valid: %d "
  305. "rule_indication_31_0: %d "
  306. "rule_indication_63_32: %d "
  307. "sa_idx: %d "
  308. "da_idx: %d "
  309. "msdu_drop: %d "
  310. "reo_destination_indication: %d "
  311. "flow_idx: %d "
  312. "fse_metadata: %d "
  313. "cce_metadata: %d "
  314. "sa_sw_peer_id: %d ",
  315. msdu_end->rxpcu_mpdu_filter_in_category,
  316. msdu_end->sw_frame_group_id,
  317. msdu_end->phy_ppdu_id,
  318. msdu_end->ip_hdr_chksum,
  319. msdu_end->tcp_udp_chksum,
  320. msdu_end->key_id_octet,
  321. msdu_end->cce_super_rule,
  322. msdu_end->cce_classify_not_done_truncate,
  323. msdu_end->cce_classify_not_done_cce_dis,
  324. msdu_end->ext_wapi_pn_63_48,
  325. msdu_end->ext_wapi_pn_95_64,
  326. msdu_end->ext_wapi_pn_127_96,
  327. msdu_end->reported_mpdu_length,
  328. msdu_end->first_msdu,
  329. msdu_end->last_msdu,
  330. msdu_end->sa_idx_timeout,
  331. msdu_end->da_idx_timeout,
  332. msdu_end->msdu_limit_error,
  333. msdu_end->flow_idx_timeout,
  334. msdu_end->flow_idx_invalid,
  335. msdu_end->wifi_parser_error,
  336. msdu_end->amsdu_parser_error,
  337. msdu_end->sa_is_valid,
  338. msdu_end->da_is_valid,
  339. msdu_end->da_is_mcbc,
  340. msdu_end->l3_header_padding,
  341. msdu_end->ipv6_options_crc,
  342. msdu_end->tcp_seq_number,
  343. msdu_end->tcp_ack_number,
  344. msdu_end->tcp_flag,
  345. msdu_end->lro_eligible,
  346. msdu_end->window_size,
  347. msdu_end->da_offset,
  348. msdu_end->sa_offset,
  349. msdu_end->da_offset_valid,
  350. msdu_end->sa_offset_valid,
  351. msdu_end->rule_indication_31_0,
  352. msdu_end->rule_indication_63_32,
  353. msdu_end->sa_idx,
  354. msdu_end->da_idx,
  355. msdu_end->msdu_drop,
  356. msdu_end->reo_destination_indication,
  357. msdu_end->flow_idx,
  358. msdu_end->fse_metadata,
  359. msdu_end->cce_metadata,
  360. msdu_end->sa_sw_peer_id);
  361. }
  362. /*
  363. * Get tid from RX_MPDU_START
  364. */
  365. #define HAL_RX_MPDU_INFO_TID_GET(_rx_mpdu_info) \
  366. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \
  367. RX_MPDU_INFO_3_TID_OFFSET)), \
  368. RX_MPDU_INFO_3_TID_MASK, \
  369. RX_MPDU_INFO_3_TID_LSB))
  370. static uint32_t hal_rx_mpdu_start_tid_get_8074(uint8_t *buf)
  371. {
  372. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  373. struct rx_mpdu_start *mpdu_start =
  374. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  375. uint32_t tid;
  376. tid = HAL_RX_MPDU_INFO_TID_GET(&mpdu_start->rx_mpdu_info_details);
  377. return tid;
  378. }
  379. #define HAL_RX_MSDU_START_RECEPTION_TYPE_GET(_rx_msdu_start) \
  380. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start), \
  381. RX_MSDU_START_5_RECEPTION_TYPE_OFFSET)), \
  382. RX_MSDU_START_5_RECEPTION_TYPE_MASK, \
  383. RX_MSDU_START_5_RECEPTION_TYPE_LSB))
  384. /*
  385. * hal_rx_msdu_start_reception_type_get(): API to get the reception type
  386. * Interval from rx_msdu_start
  387. *
  388. * @buf: pointer to the start of RX PKT TLV header
  389. * Return: uint32_t(reception_type)
  390. */
  391. static uint32_t hal_rx_msdu_start_reception_type_get_8074(uint8_t *buf)
  392. {
  393. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  394. struct rx_msdu_start *msdu_start =
  395. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  396. uint32_t reception_type;
  397. reception_type = HAL_RX_MSDU_START_RECEPTION_TYPE_GET(msdu_start);
  398. return reception_type;
  399. }
  400. #define HAL_RX_MSDU_END_DA_IDX_GET(_rx_msdu_end) \
  401. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  402. RX_MSDU_END_13_DA_IDX_OFFSET)), \
  403. RX_MSDU_END_13_DA_IDX_MASK, \
  404. RX_MSDU_END_13_DA_IDX_LSB))
  405. /**
  406. * hal_rx_msdu_end_da_idx_get_8074: API to get da_idx
  407. * from rx_msdu_end TLV
  408. *
  409. * @ buf: pointer to the start of RX PKT TLV headers
  410. * Return: da index
  411. */
  412. static uint16_t hal_rx_msdu_end_da_idx_get_8074(uint8_t *buf)
  413. {
  414. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  415. struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  416. uint16_t da_idx;
  417. da_idx = HAL_RX_MSDU_END_DA_IDX_GET(msdu_end);
  418. return da_idx;
  419. }