sde_power_handle.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__
  6. #include <linux/clk.h>
  7. #include <linux/kernel.h>
  8. #include <linux/of.h>
  9. #include <linux/string.h>
  10. #include <linux/of_address.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/sde_io_util.h>
  15. #include <linux/sde_rsc.h>
  16. #include "sde_power_handle.h"
  17. #include "sde_trace.h"
  18. #include "sde_dbg.h"
  19. #define KBPS2BPS(x) ((x) * 1000ULL)
  20. static const char *data_bus_name[SDE_POWER_HANDLE_DBUS_ID_MAX] = {
  21. [SDE_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,sde-data-bus",
  22. [SDE_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,sde-llcc-bus",
  23. [SDE_POWER_HANDLE_DBUS_ID_EBI] = "qcom,sde-ebi-bus",
  24. };
  25. const char *sde_power_handle_get_dbus_name(u32 bus_id)
  26. {
  27. if (bus_id < SDE_POWER_HANDLE_DBUS_ID_MAX)
  28. return data_bus_name[bus_id];
  29. return NULL;
  30. }
  31. static void sde_power_event_trigger_locked(struct sde_power_handle *phandle,
  32. u32 event_type)
  33. {
  34. struct sde_power_event *event;
  35. phandle->last_event_handled = event_type;
  36. list_for_each_entry(event, &phandle->event_list, list) {
  37. if (event->event_type & event_type) {
  38. event->cb_fnc(event_type, event->usr);
  39. }
  40. }
  41. }
  42. static inline void sde_power_rsc_client_init(struct sde_power_handle *phandle)
  43. {
  44. /* creates the rsc client */
  45. if (!phandle->rsc_client_init) {
  46. phandle->rsc_client = sde_rsc_client_create(SDE_RSC_INDEX,
  47. "sde_power_handle", SDE_RSC_CLK_CLIENT, 0);
  48. if (IS_ERR_OR_NULL(phandle->rsc_client)) {
  49. pr_debug("sde rsc client create failed :%ld\n",
  50. PTR_ERR(phandle->rsc_client));
  51. phandle->rsc_client = NULL;
  52. }
  53. phandle->rsc_client_init = true;
  54. }
  55. }
  56. static int sde_power_rsc_update(struct sde_power_handle *phandle, bool enable)
  57. {
  58. u32 rsc_state;
  59. int ret = 0;
  60. rsc_state = enable ? SDE_RSC_CLK_STATE : SDE_RSC_IDLE_STATE;
  61. if (phandle->rsc_client)
  62. ret = sde_rsc_client_state_update(phandle->rsc_client,
  63. rsc_state, NULL, SDE_RSC_INVALID_CRTC_ID, NULL);
  64. return ret;
  65. }
  66. static int sde_power_parse_dt_supply(struct platform_device *pdev,
  67. struct dss_module_power *mp)
  68. {
  69. int i = 0, rc = 0;
  70. u32 tmp = 0;
  71. struct device_node *of_node = NULL, *supply_root_node = NULL;
  72. struct device_node *supply_node = NULL;
  73. if (!pdev || !mp) {
  74. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  75. return -EINVAL;
  76. }
  77. of_node = pdev->dev.of_node;
  78. mp->num_vreg = 0;
  79. supply_root_node = of_get_child_by_name(of_node,
  80. "qcom,platform-supply-entries");
  81. if (!supply_root_node) {
  82. pr_debug("no supply entry present\n");
  83. return rc;
  84. }
  85. for_each_child_of_node(supply_root_node, supply_node)
  86. mp->num_vreg++;
  87. if (mp->num_vreg == 0) {
  88. pr_debug("no vreg\n");
  89. return rc;
  90. }
  91. pr_debug("vreg found. count=%d\n", mp->num_vreg);
  92. mp->vreg_config = devm_kzalloc(&pdev->dev, sizeof(struct dss_vreg) *
  93. mp->num_vreg, GFP_KERNEL);
  94. if (!mp->vreg_config) {
  95. rc = -ENOMEM;
  96. return rc;
  97. }
  98. for_each_child_of_node(supply_root_node, supply_node) {
  99. const char *st = NULL;
  100. rc = of_property_read_string(supply_node,
  101. "qcom,supply-name", &st);
  102. if (rc) {
  103. pr_err("error reading name. rc=%d\n", rc);
  104. goto error;
  105. }
  106. strlcpy(mp->vreg_config[i].vreg_name, st,
  107. sizeof(mp->vreg_config[i].vreg_name));
  108. rc = of_property_read_u32(supply_node,
  109. "qcom,supply-min-voltage", &tmp);
  110. if (rc) {
  111. pr_err("error reading min volt. rc=%d\n", rc);
  112. goto error;
  113. }
  114. mp->vreg_config[i].min_voltage = tmp;
  115. rc = of_property_read_u32(supply_node,
  116. "qcom,supply-max-voltage", &tmp);
  117. if (rc) {
  118. pr_err("error reading max volt. rc=%d\n", rc);
  119. goto error;
  120. }
  121. mp->vreg_config[i].max_voltage = tmp;
  122. rc = of_property_read_u32(supply_node,
  123. "qcom,supply-enable-load", &tmp);
  124. if (rc) {
  125. pr_err("error reading enable load. rc=%d\n", rc);
  126. goto error;
  127. }
  128. mp->vreg_config[i].enable_load = tmp;
  129. rc = of_property_read_u32(supply_node,
  130. "qcom,supply-disable-load", &tmp);
  131. if (rc) {
  132. pr_err("error reading disable load. rc=%d\n", rc);
  133. goto error;
  134. }
  135. mp->vreg_config[i].disable_load = tmp;
  136. rc = of_property_read_u32(supply_node,
  137. "qcom,supply-pre-on-sleep", &tmp);
  138. if (rc)
  139. pr_debug("error reading supply pre sleep value. rc=%d\n",
  140. rc);
  141. mp->vreg_config[i].pre_on_sleep = (!rc ? tmp : 0);
  142. rc = of_property_read_u32(supply_node,
  143. "qcom,supply-pre-off-sleep", &tmp);
  144. if (rc)
  145. pr_debug("error reading supply pre sleep value. rc=%d\n",
  146. rc);
  147. mp->vreg_config[i].pre_off_sleep = (!rc ? tmp : 0);
  148. rc = of_property_read_u32(supply_node,
  149. "qcom,supply-post-on-sleep", &tmp);
  150. if (rc)
  151. pr_debug("error reading supply post sleep value. rc=%d\n",
  152. rc);
  153. mp->vreg_config[i].post_on_sleep = (!rc ? tmp : 0);
  154. rc = of_property_read_u32(supply_node,
  155. "qcom,supply-post-off-sleep", &tmp);
  156. if (rc)
  157. pr_debug("error reading supply post sleep value. rc=%d\n",
  158. rc);
  159. mp->vreg_config[i].post_off_sleep = (!rc ? tmp : 0);
  160. pr_debug("%s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
  161. mp->vreg_config[i].vreg_name,
  162. mp->vreg_config[i].min_voltage,
  163. mp->vreg_config[i].max_voltage,
  164. mp->vreg_config[i].enable_load,
  165. mp->vreg_config[i].disable_load,
  166. mp->vreg_config[i].pre_on_sleep,
  167. mp->vreg_config[i].post_on_sleep,
  168. mp->vreg_config[i].pre_off_sleep,
  169. mp->vreg_config[i].post_off_sleep);
  170. ++i;
  171. rc = 0;
  172. }
  173. return rc;
  174. error:
  175. if (mp->vreg_config) {
  176. devm_kfree(&pdev->dev, mp->vreg_config);
  177. mp->vreg_config = NULL;
  178. mp->num_vreg = 0;
  179. }
  180. return rc;
  181. }
  182. static int sde_power_parse_dt_clock(struct platform_device *pdev,
  183. struct dss_module_power *mp)
  184. {
  185. u32 i = 0, rc = 0;
  186. const char *clock_name;
  187. u32 clock_rate = 0;
  188. u32 clock_max_rate = 0;
  189. int num_clk = 0;
  190. if (!pdev || !mp) {
  191. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  192. return -EINVAL;
  193. }
  194. mp->num_clk = 0;
  195. num_clk = of_property_count_strings(pdev->dev.of_node,
  196. "clock-names");
  197. if (num_clk <= 0) {
  198. pr_debug("clocks are not defined\n");
  199. goto clk_err;
  200. }
  201. mp->num_clk = num_clk;
  202. mp->clk_config = devm_kzalloc(&pdev->dev,
  203. sizeof(struct dss_clk) * num_clk, GFP_KERNEL);
  204. if (!mp->clk_config) {
  205. rc = -ENOMEM;
  206. mp->num_clk = 0;
  207. goto clk_err;
  208. }
  209. for (i = 0; i < num_clk; i++) {
  210. of_property_read_string_index(pdev->dev.of_node, "clock-names",
  211. i, &clock_name);
  212. strlcpy(mp->clk_config[i].clk_name, clock_name,
  213. sizeof(mp->clk_config[i].clk_name));
  214. of_property_read_u32_index(pdev->dev.of_node, "clock-rate",
  215. i, &clock_rate);
  216. mp->clk_config[i].rate = clock_rate;
  217. if (!clock_rate)
  218. mp->clk_config[i].type = DSS_CLK_AHB;
  219. else
  220. mp->clk_config[i].type = DSS_CLK_PCLK;
  221. clock_max_rate = 0;
  222. of_property_read_u32_index(pdev->dev.of_node, "clock-max-rate",
  223. i, &clock_max_rate);
  224. mp->clk_config[i].max_rate = clock_max_rate;
  225. }
  226. clk_err:
  227. return rc;
  228. }
  229. #define MAX_AXI_PORT_COUNT 3
  230. static int _sde_power_data_bus_set_quota(
  231. struct sde_power_data_bus_handle *pdbus,
  232. u64 in_ab_quota, u64 in_ib_quota)
  233. {
  234. int rc = 0, i = 0;
  235. u32 paths = pdbus->data_paths_cnt;
  236. if (!paths || paths > DATA_BUS_PATH_MAX) {
  237. pr_err("invalid data bus handle, paths %d\n", paths);
  238. return -EINVAL;
  239. }
  240. in_ab_quota = div_u64(in_ab_quota, paths);
  241. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  242. for (i = 0; i < paths; i++) {
  243. if (pdbus->data_bus_hdl[i]) {
  244. rc = icc_set_bw(pdbus->data_bus_hdl[i],
  245. Bps_to_icc(in_ab_quota),
  246. Bps_to_icc(in_ib_quota));
  247. if (rc)
  248. goto err;
  249. }
  250. }
  251. pdbus->curr_val.ab = in_ab_quota;
  252. pdbus->curr_val.ib = in_ib_quota;
  253. SDE_ATRACE_END("msm_bus_scale_req");
  254. return rc;
  255. err:
  256. for (; i >= 0; --i)
  257. if (pdbus->data_bus_hdl[i])
  258. icc_set_bw(pdbus->data_bus_hdl[i],
  259. Bps_to_icc(pdbus->curr_val.ab),
  260. Bps_to_icc(pdbus->curr_val.ib));
  261. SDE_ATRACE_END("msm_bus_scale_req");
  262. pr_err("failed to set data bus vote ab=%llu ib=%llu rc=%d\n",
  263. rc, in_ab_quota, in_ib_quota);
  264. return rc;
  265. }
  266. int sde_power_data_bus_set_quota(struct sde_power_handle *phandle,
  267. u32 bus_id, u64 ab_quota, u64 ib_quota)
  268. {
  269. int rc = 0;
  270. u32 paths;
  271. if (!phandle || bus_id >= SDE_POWER_HANDLE_DBUS_ID_MAX) {
  272. pr_err("invalid parameters\n");
  273. return -EINVAL;
  274. }
  275. paths = phandle->data_bus_handle[bus_id].data_paths_cnt;
  276. if (!paths)
  277. goto skip_vote;
  278. trace_sde_perf_update_bus(bus_id, ab_quota, ib_quota, paths);
  279. mutex_lock(&phandle->phandle_lock);
  280. rc = _sde_power_data_bus_set_quota(&phandle->data_bus_handle[bus_id],
  281. ab_quota, ib_quota);
  282. mutex_unlock(&phandle->phandle_lock);
  283. skip_vote:
  284. pr_debug("bus=%d, ab=%llu, ib=%llu, paths=%d\n", bus_id, ab_quota,
  285. ib_quota, paths);
  286. return rc;
  287. }
  288. /**
  289. * sde_power_icc_get - get the interconnect path for the given bus_name
  290. * @pdev - platform device
  291. * @bus_name - bus name for the corresponding interconnect
  292. * @path - the icc_path object we want to obtain for this @bus_name (output)
  293. * @count - if given, incremented only if the path was successfully retrieved
  294. **/
  295. static int sde_power_icc_get(struct platform_device *pdev,
  296. const char *bus_name, struct icc_path **path, u32 *count)
  297. {
  298. int rc = of_property_match_string(pdev->dev.of_node,
  299. "interconnect-names", bus_name);
  300. /* bus_names are optional for any given device node, skip if missing */
  301. if (rc < 0)
  302. goto end;
  303. *path = of_icc_get(&pdev->dev, bus_name);
  304. if (IS_ERR_OR_NULL(*path)) {
  305. rc = PTR_ERR(*path);
  306. pr_err("bus %s parsing failed, rc:%d\n", bus_name, rc);
  307. *path = NULL;
  308. return rc;
  309. }
  310. if (count)
  311. (*count)++;
  312. end:
  313. pr_debug("bus %s dt node %s(%d), icc_path is %s, count:%d\n",
  314. bus_name, rc < 0 ? "missing" : "found", rc,
  315. *path ? "valid" : "NULL", count ? *count : -1);
  316. return 0;
  317. }
  318. static int sde_power_reg_bus_parse(struct platform_device *pdev,
  319. struct sde_power_reg_bus_handle *reg_bus)
  320. {
  321. const char *bus_name = "qcom,sde-reg-bus";
  322. const u32 *vec_arr = NULL;
  323. int rc, len, i, vec_idx = 0;
  324. u32 paths = 0;
  325. rc = sde_power_icc_get(pdev, bus_name, &reg_bus->reg_bus_hdl, &paths);
  326. if (rc)
  327. return rc;
  328. if (!paths) {
  329. pr_debug("%s not defined for pdev %s\n", bus_name, pdev->name ?
  330. pdev->name : "<unknown>");
  331. return 0;
  332. }
  333. vec_arr = of_get_property(pdev->dev.of_node,
  334. "qcom,sde-reg-bus,vectors-KBps", &len);
  335. if (!vec_arr) {
  336. pr_err("%s scale table property not found\n", bus_name);
  337. return -EINVAL;
  338. }
  339. if (len / sizeof(*vec_arr) != VOTE_INDEX_MAX * 2) {
  340. pr_err("wrong size for %s vector table\n", bus_name);
  341. return -EINVAL;
  342. }
  343. for (i = 0; i < VOTE_INDEX_MAX; ++i) {
  344. reg_bus->scale_table[i].ab = (u64)KBPS2BPS(be32_to_cpu(
  345. vec_arr[vec_idx++]));
  346. reg_bus->scale_table[i].ib = (u64)KBPS2BPS(be32_to_cpu(
  347. vec_arr[vec_idx++]));
  348. }
  349. return rc;
  350. }
  351. static int sde_power_mnoc_bus_parse(struct platform_device *pdev,
  352. struct sde_power_data_bus_handle *pdbus, const char *name)
  353. {
  354. int i, rc = 0;
  355. char bus_name[32];
  356. for (i = 0; i < DATA_BUS_PATH_MAX; ++i) {
  357. snprintf(bus_name, sizeof(bus_name), "%s%d", name, i);
  358. rc = sde_power_icc_get(pdev, bus_name, &pdbus->data_bus_hdl[i],
  359. &pdbus->data_paths_cnt);
  360. if (rc)
  361. break;
  362. }
  363. /* at least one databus path is required */
  364. if (!pdbus->data_paths_cnt) {
  365. pr_err("missing required interconnect:%s, rc:%d\n", name, rc);
  366. return -EINVAL;
  367. } else if (rc) {
  368. pr_info("ignoring error %d for non-primary data path\n", rc);
  369. rc = 0;
  370. }
  371. return rc;
  372. }
  373. static int sde_power_bus_parse(struct platform_device *pdev,
  374. struct sde_power_handle *phandle)
  375. {
  376. int i, j, rc = 0;
  377. bool active_only = false;
  378. struct sde_power_data_bus_handle *pdbus = phandle->data_bus_handle;
  379. /* reg bus */
  380. rc = sde_power_reg_bus_parse(pdev, &phandle->reg_bus_handle);
  381. if (rc)
  382. return rc;
  383. /* data buses */
  384. if (of_find_property(pdev->dev.of_node,
  385. "qcom,msm-bus,active-only", NULL))
  386. active_only = true;
  387. for (i = SDE_POWER_HANDLE_DBUS_ID_MNOC;
  388. i < SDE_POWER_HANDLE_DBUS_ID_MAX; ++i) {
  389. if (i == SDE_POWER_HANDLE_DBUS_ID_MNOC)
  390. rc = sde_power_mnoc_bus_parse(pdev, &pdbus[i],
  391. data_bus_name[i]);
  392. else
  393. rc = sde_power_icc_get(pdev, data_bus_name[i],
  394. &pdbus[i].data_bus_hdl[0],
  395. &pdbus[i].data_paths_cnt);
  396. if (rc)
  397. break;
  398. if (active_only) {
  399. pdbus[i].bus_active_only = true;
  400. for (j = 0; j < pdbus[i].data_paths_cnt; ++j)
  401. icc_set_tag(pdbus[i].data_bus_hdl[j],
  402. QCOM_ICC_TAG_ACTIVE_ONLY);
  403. }
  404. pr_debug("found %d paths for %s\n", pdbus[i].data_paths_cnt,
  405. data_bus_name[i]);
  406. }
  407. return rc;
  408. }
  409. static void sde_power_bus_unregister(struct sde_power_handle *phandle)
  410. {
  411. int i, j;
  412. struct sde_power_reg_bus_handle *reg_bus = &phandle->reg_bus_handle;
  413. struct sde_power_data_bus_handle *pdbus = phandle->data_bus_handle;
  414. icc_put(reg_bus->reg_bus_hdl);
  415. reg_bus->reg_bus_hdl = NULL;
  416. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1;
  417. i >= SDE_POWER_HANDLE_DBUS_ID_MNOC; i--) {
  418. for (j = 0; j < pdbus[i].data_paths_cnt; j++) {
  419. if (pdbus[i].data_bus_hdl[j]) {
  420. icc_put(pdbus[i].data_bus_hdl[j]);
  421. pdbus[i].data_bus_hdl[j] = NULL;
  422. }
  423. }
  424. }
  425. }
  426. static int sde_power_reg_bus_update(struct sde_power_reg_bus_handle *reg_bus,
  427. u32 usecase_ndx)
  428. {
  429. int rc = 0;
  430. u64 ab_quota, ib_quota;
  431. ab_quota = reg_bus->scale_table[usecase_ndx].ab;
  432. ib_quota = reg_bus->scale_table[usecase_ndx].ib;
  433. if (reg_bus->reg_bus_hdl) {
  434. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  435. rc = icc_set_bw(reg_bus->reg_bus_hdl, Bps_to_icc(ab_quota),
  436. Bps_to_icc(ib_quota));
  437. SDE_ATRACE_END("msm_bus_scale_req");
  438. }
  439. if (rc)
  440. pr_err("failed to set reg bus vote to index %d, rc=%d\n",
  441. usecase_ndx, rc);
  442. else {
  443. reg_bus->curr_idx = usecase_ndx;
  444. pr_debug("reg-bus vote set to index=%d, ab=%llu, ib=%llu\n",
  445. usecase_ndx, ab_quota, ib_quota);
  446. }
  447. return rc;
  448. }
  449. int sde_power_resource_init(struct platform_device *pdev,
  450. struct sde_power_handle *phandle)
  451. {
  452. int rc = 0;
  453. struct dss_module_power *mp;
  454. if (!phandle || !pdev) {
  455. pr_err("invalid input param\n");
  456. rc = -EINVAL;
  457. goto end;
  458. }
  459. mp = &phandle->mp;
  460. phandle->dev = &pdev->dev;
  461. rc = sde_power_parse_dt_clock(pdev, mp);
  462. if (rc) {
  463. pr_err("device clock parsing failed\n");
  464. goto end;
  465. }
  466. rc = sde_power_parse_dt_supply(pdev, mp);
  467. if (rc) {
  468. pr_err("device vreg supply parsing failed\n");
  469. goto parse_vreg_err;
  470. }
  471. rc = msm_dss_get_vreg(&pdev->dev,
  472. mp->vreg_config, mp->num_vreg, 1);
  473. if (rc) {
  474. pr_err("get config failed rc=%d\n", rc);
  475. goto vreg_err;
  476. }
  477. rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk);
  478. if (rc) {
  479. pr_err("clock get failed rc=%d\n", rc);
  480. goto clkget_err;
  481. }
  482. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  483. if (rc) {
  484. pr_err("clock set rate failed rc=%d\n", rc);
  485. goto clkset_err;
  486. }
  487. rc = sde_power_bus_parse(pdev, phandle);
  488. if (rc) {
  489. pr_err("bus parse failed rc=%d\n", rc);
  490. goto bus_err;
  491. }
  492. INIT_LIST_HEAD(&phandle->event_list);
  493. phandle->rsc_client = NULL;
  494. phandle->rsc_client_init = false;
  495. mutex_init(&phandle->phandle_lock);
  496. return rc;
  497. bus_err:
  498. sde_power_bus_unregister(phandle);
  499. clkset_err:
  500. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  501. clkget_err:
  502. msm_dss_get_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  503. vreg_err:
  504. if (mp->vreg_config)
  505. devm_kfree(&pdev->dev, mp->vreg_config);
  506. mp->num_vreg = 0;
  507. parse_vreg_err:
  508. if (mp->clk_config)
  509. devm_kfree(&pdev->dev, mp->clk_config);
  510. mp->num_clk = 0;
  511. end:
  512. return rc;
  513. }
  514. void sde_power_resource_deinit(struct platform_device *pdev,
  515. struct sde_power_handle *phandle)
  516. {
  517. struct dss_module_power *mp;
  518. struct sde_power_event *curr_event, *next_event;
  519. if (!phandle || !pdev) {
  520. pr_err("invalid input param\n");
  521. return;
  522. }
  523. mp = &phandle->mp;
  524. mutex_lock(&phandle->phandle_lock);
  525. list_for_each_entry_safe(curr_event, next_event,
  526. &phandle->event_list, list) {
  527. pr_err("event:%d, client:%s still registered\n",
  528. curr_event->event_type,
  529. curr_event->client_name);
  530. curr_event->active = false;
  531. list_del(&curr_event->list);
  532. }
  533. mutex_unlock(&phandle->phandle_lock);
  534. sde_power_bus_unregister(phandle);
  535. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  536. msm_dss_get_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  537. if (mp->clk_config)
  538. devm_kfree(&pdev->dev, mp->clk_config);
  539. if (mp->vreg_config)
  540. devm_kfree(&pdev->dev, mp->vreg_config);
  541. mp->num_vreg = 0;
  542. mp->num_clk = 0;
  543. if (phandle->rsc_client)
  544. sde_rsc_client_destroy(phandle->rsc_client);
  545. }
  546. int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
  547. u32 usecase_ndx, bool skip_lock)
  548. {
  549. int rc = 0;
  550. if (!phandle->reg_bus_handle.reg_bus_hdl)
  551. return 0;
  552. if (!skip_lock)
  553. mutex_lock(&phandle->phandle_lock);
  554. pr_debug("%pS: requested:%d\n",
  555. __builtin_return_address(0), usecase_ndx);
  556. rc = sde_power_reg_bus_update(&phandle->reg_bus_handle,
  557. usecase_ndx);
  558. if (!skip_lock)
  559. mutex_unlock(&phandle->phandle_lock);
  560. return rc;
  561. }
  562. int sde_power_resource_enable(struct sde_power_handle *phandle, bool enable)
  563. {
  564. int rc = 0, i = 0;
  565. struct dss_module_power *mp;
  566. if (!phandle) {
  567. pr_err("invalid input argument\n");
  568. return -EINVAL;
  569. }
  570. mp = &phandle->mp;
  571. mutex_lock(&phandle->phandle_lock);
  572. pr_debug("enable:%d\n", enable);
  573. SDE_ATRACE_BEGIN("sde_power_resource_enable");
  574. /* RSC client init */
  575. sde_power_rsc_client_init(phandle);
  576. if (enable) {
  577. sde_power_event_trigger_locked(phandle,
  578. SDE_POWER_EVENT_PRE_ENABLE);
  579. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX &&
  580. phandle->data_bus_handle[i].data_paths_cnt > 0; i++) {
  581. rc = _sde_power_data_bus_set_quota(
  582. &phandle->data_bus_handle[i],
  583. SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,
  584. SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);
  585. if (rc) {
  586. pr_err("failed to set data bus vote id=%d rc=%d\n",
  587. i, rc);
  588. goto vreg_err;
  589. }
  590. }
  591. rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg,
  592. enable);
  593. if (rc) {
  594. pr_err("failed to enable vregs rc=%d\n", rc);
  595. goto vreg_err;
  596. }
  597. rc = sde_power_scale_reg_bus(phandle, VOTE_INDEX_LOW, true);
  598. if (rc) {
  599. pr_err("failed to set reg bus vote rc=%d\n", rc);
  600. goto reg_bus_hdl_err;
  601. }
  602. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE1);
  603. rc = sde_power_rsc_update(phandle, true);
  604. if (rc) {
  605. pr_err("failed to update rsc\n");
  606. goto rsc_err;
  607. }
  608. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  609. if (rc) {
  610. pr_err("clock enable failed rc:%d\n", rc);
  611. goto clk_err;
  612. }
  613. sde_power_event_trigger_locked(phandle,
  614. SDE_POWER_EVENT_POST_ENABLE);
  615. } else {
  616. sde_power_event_trigger_locked(phandle,
  617. SDE_POWER_EVENT_PRE_DISABLE);
  618. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE2);
  619. sde_power_rsc_update(phandle, false);
  620. msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  621. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  622. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable);
  623. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1; i >= 0; i--)
  624. if (phandle->data_bus_handle[i].data_paths_cnt > 0)
  625. _sde_power_data_bus_set_quota(
  626. &phandle->data_bus_handle[i],
  627. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  628. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  629. sde_power_event_trigger_locked(phandle,
  630. SDE_POWER_EVENT_POST_DISABLE);
  631. }
  632. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT);
  633. SDE_ATRACE_END("sde_power_resource_enable");
  634. mutex_unlock(&phandle->phandle_lock);
  635. return rc;
  636. clk_err:
  637. sde_power_rsc_update(phandle, false);
  638. rsc_err:
  639. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  640. reg_bus_hdl_err:
  641. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0);
  642. vreg_err:
  643. for (i-- ; i >= 0 && phandle->data_bus_handle[i].data_paths_cnt > 0; i--)
  644. _sde_power_data_bus_set_quota(
  645. &phandle->data_bus_handle[i],
  646. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  647. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  648. SDE_ATRACE_END("sde_power_resource_enable");
  649. mutex_unlock(&phandle->phandle_lock);
  650. return rc;
  651. }
  652. int sde_power_clk_set_rate(struct sde_power_handle *phandle, char *clock_name,
  653. u64 rate)
  654. {
  655. int i, rc = -EINVAL;
  656. struct dss_module_power *mp;
  657. if (!phandle) {
  658. pr_err("invalid input power handle\n");
  659. return -EINVAL;
  660. }
  661. mutex_lock(&phandle->phandle_lock);
  662. if (phandle->last_event_handled & SDE_POWER_EVENT_POST_DISABLE) {
  663. pr_debug("invalid power state %u\n",
  664. phandle->last_event_handled);
  665. SDE_EVT32(phandle->last_event_handled, SDE_EVTLOG_ERROR);
  666. mutex_unlock(&phandle->phandle_lock);
  667. return -EINVAL;
  668. }
  669. mp = &phandle->mp;
  670. for (i = 0; i < mp->num_clk; i++) {
  671. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  672. if (mp->clk_config[i].max_rate &&
  673. (rate > mp->clk_config[i].max_rate))
  674. rate = mp->clk_config[i].max_rate;
  675. mp->clk_config[i].rate = rate;
  676. rc = msm_dss_single_clk_set_rate(&mp->clk_config[i]);
  677. break;
  678. }
  679. }
  680. mutex_unlock(&phandle->phandle_lock);
  681. return rc;
  682. }
  683. u64 sde_power_clk_get_rate(struct sde_power_handle *phandle, char *clock_name)
  684. {
  685. int i;
  686. struct dss_module_power *mp;
  687. u64 rate = -EINVAL;
  688. if (!phandle) {
  689. pr_err("invalid input power handle\n");
  690. return -EINVAL;
  691. }
  692. mp = &phandle->mp;
  693. for (i = 0; i < mp->num_clk; i++) {
  694. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  695. rate = clk_get_rate(mp->clk_config[i].clk);
  696. break;
  697. }
  698. }
  699. return rate;
  700. }
  701. u64 sde_power_clk_get_max_rate(struct sde_power_handle *phandle,
  702. char *clock_name)
  703. {
  704. int i;
  705. struct dss_module_power *mp;
  706. u64 rate = 0;
  707. if (!phandle) {
  708. pr_err("invalid input power handle\n");
  709. return 0;
  710. }
  711. mp = &phandle->mp;
  712. for (i = 0; i < mp->num_clk; i++) {
  713. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  714. rate = mp->clk_config[i].max_rate;
  715. break;
  716. }
  717. }
  718. return rate;
  719. }
  720. struct clk *sde_power_clk_get_clk(struct sde_power_handle *phandle,
  721. char *clock_name)
  722. {
  723. int i;
  724. struct dss_module_power *mp;
  725. struct clk *clk = NULL;
  726. if (!phandle) {
  727. pr_err("invalid input power handle\n");
  728. return 0;
  729. }
  730. mp = &phandle->mp;
  731. for (i = 0; i < mp->num_clk; i++) {
  732. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  733. clk = mp->clk_config[i].clk;
  734. break;
  735. }
  736. }
  737. return clk;
  738. }
  739. struct sde_power_event *sde_power_handle_register_event(
  740. struct sde_power_handle *phandle,
  741. u32 event_type, void (*cb_fnc)(u32 event_type, void *usr),
  742. void *usr, char *client_name)
  743. {
  744. struct sde_power_event *event;
  745. if (!phandle) {
  746. pr_err("invalid power handle\n");
  747. return ERR_PTR(-EINVAL);
  748. } else if (!cb_fnc || !event_type) {
  749. pr_err("no callback fnc or event type\n");
  750. return ERR_PTR(-EINVAL);
  751. }
  752. event = kzalloc(sizeof(struct sde_power_event), GFP_KERNEL);
  753. if (!event)
  754. return ERR_PTR(-ENOMEM);
  755. event->event_type = event_type;
  756. event->cb_fnc = cb_fnc;
  757. event->usr = usr;
  758. strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN);
  759. event->active = true;
  760. mutex_lock(&phandle->phandle_lock);
  761. list_add(&event->list, &phandle->event_list);
  762. mutex_unlock(&phandle->phandle_lock);
  763. return event;
  764. }
  765. void sde_power_handle_unregister_event(
  766. struct sde_power_handle *phandle,
  767. struct sde_power_event *event)
  768. {
  769. if (!phandle || !event) {
  770. pr_err("invalid phandle or event\n");
  771. } else if (!event->active) {
  772. pr_err("power handle deinit already done\n");
  773. kfree(event);
  774. } else {
  775. mutex_lock(&phandle->phandle_lock);
  776. list_del_init(&event->list);
  777. mutex_unlock(&phandle->phandle_lock);
  778. kfree(event);
  779. }
  780. }