sde_io_util.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2015, 2017-2020 The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/err.h>
  7. #include <linux/io.h>
  8. #include <linux/regulator/consumer.h>
  9. #include <linux/delay.h>
  10. #include <linux/sde_io_util.h>
  11. #define MAX_I2C_CMDS 16
  12. void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug)
  13. {
  14. u32 in_val;
  15. if (!io || !io->base) {
  16. DEV_ERR("%pS->%s: invalid input\n",
  17. __builtin_return_address(0), __func__);
  18. return;
  19. }
  20. if (offset > io->len) {
  21. DEV_ERR("%pS->%s: offset out of range\n",
  22. __builtin_return_address(0), __func__);
  23. return;
  24. }
  25. writel_relaxed(value, io->base + offset);
  26. if (debug) {
  27. in_val = readl_relaxed(io->base + offset);
  28. DEV_DBG("[%08x] => %08x [%08x]\n",
  29. (u32)(unsigned long)(io->base + offset),
  30. value, in_val);
  31. }
  32. } /* dss_reg_w */
  33. EXPORT_SYMBOL(dss_reg_w);
  34. u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug)
  35. {
  36. u32 value;
  37. if (!io || !io->base) {
  38. DEV_ERR("%pS->%s: invalid input\n",
  39. __builtin_return_address(0), __func__);
  40. return -EINVAL;
  41. }
  42. if (offset > io->len) {
  43. DEV_ERR("%pS->%s: offset out of range\n",
  44. __builtin_return_address(0), __func__);
  45. return -EINVAL;
  46. }
  47. value = readl_relaxed(io->base + offset);
  48. if (debug)
  49. DEV_DBG("[%08x] <= %08x\n",
  50. (u32)(unsigned long)(io->base + offset), value);
  51. return value;
  52. } /* dss_reg_r */
  53. EXPORT_SYMBOL(dss_reg_r);
  54. void dss_reg_dump(void __iomem *base, u32 length, const char *prefix,
  55. u32 debug)
  56. {
  57. if (debug)
  58. print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4,
  59. (void *)base, length, false);
  60. } /* dss_reg_dump */
  61. EXPORT_SYMBOL(dss_reg_dump);
  62. static struct resource *msm_dss_get_res_byname(struct platform_device *pdev,
  63. unsigned int type, const char *name)
  64. {
  65. struct resource *res = NULL;
  66. res = platform_get_resource_byname(pdev, type, name);
  67. if (!res)
  68. DEV_ERR("%s: '%s' resource not found\n", __func__, name);
  69. return res;
  70. } /* msm_dss_get_res_byname */
  71. int msm_dss_ioremap_byname(struct platform_device *pdev,
  72. struct dss_io_data *io_data, const char *name)
  73. {
  74. struct resource *res = NULL;
  75. if (!pdev || !io_data) {
  76. DEV_ERR("%pS->%s: invalid input\n",
  77. __builtin_return_address(0), __func__);
  78. return -EINVAL;
  79. }
  80. res = msm_dss_get_res_byname(pdev, IORESOURCE_MEM, name);
  81. if (!res) {
  82. DEV_ERR("%pS->%s: '%s' msm_dss_get_res_byname failed\n",
  83. __builtin_return_address(0), __func__, name);
  84. return -ENODEV;
  85. }
  86. io_data->len = (u32)resource_size(res);
  87. io_data->base = ioremap(res->start, io_data->len);
  88. if (!io_data->base) {
  89. DEV_ERR("%pS->%s: '%s' ioremap failed\n",
  90. __builtin_return_address(0), __func__, name);
  91. return -EIO;
  92. }
  93. return 0;
  94. } /* msm_dss_ioremap_byname */
  95. EXPORT_SYMBOL(msm_dss_ioremap_byname);
  96. void msm_dss_iounmap(struct dss_io_data *io_data)
  97. {
  98. if (!io_data) {
  99. DEV_ERR("%pS->%s: invalid input\n",
  100. __builtin_return_address(0), __func__);
  101. return;
  102. }
  103. if (io_data->base) {
  104. iounmap(io_data->base);
  105. io_data->base = NULL;
  106. }
  107. io_data->len = 0;
  108. } /* msm_dss_iounmap */
  109. EXPORT_SYMBOL(msm_dss_iounmap);
  110. int msm_dss_get_vreg(struct device *dev, struct dss_vreg *in_vreg,
  111. int num_vreg, int enable)
  112. {
  113. int i = 0, rc = 0;
  114. struct dss_vreg *curr_vreg = NULL;
  115. if (!in_vreg || !num_vreg)
  116. return rc;
  117. if (enable) {
  118. for (i = 0; i < num_vreg; i++) {
  119. curr_vreg = &in_vreg[i];
  120. curr_vreg->vreg = regulator_get(dev,
  121. curr_vreg->vreg_name);
  122. rc = PTR_RET(curr_vreg->vreg);
  123. if (rc) {
  124. DEV_ERR("%pS->%s: %s get failed. rc=%d\n",
  125. __builtin_return_address(0), __func__,
  126. curr_vreg->vreg_name, rc);
  127. curr_vreg->vreg = NULL;
  128. goto vreg_get_fail;
  129. }
  130. }
  131. } else {
  132. for (i = num_vreg-1; i >= 0; i--) {
  133. curr_vreg = &in_vreg[i];
  134. if (curr_vreg->vreg) {
  135. regulator_put(curr_vreg->vreg);
  136. curr_vreg->vreg = NULL;
  137. }
  138. }
  139. }
  140. return 0;
  141. vreg_get_fail:
  142. for (i--; i >= 0; i--) {
  143. curr_vreg = &in_vreg[i];
  144. regulator_set_load(curr_vreg->vreg, 0);
  145. regulator_put(curr_vreg->vreg);
  146. curr_vreg->vreg = NULL;
  147. }
  148. return rc;
  149. } /* msm_dss_get_vreg */
  150. EXPORT_SYMBOL(msm_dss_get_vreg);
  151. static bool msm_dss_is_hw_controlled(struct dss_vreg in_vreg)
  152. {
  153. u32 mode = 0;
  154. char const *regulator_gdsc = "gdsc";
  155. /*
  156. * For gdsc-regulator devices only, REGULATOR_MODE_FAST specifies that
  157. * the GDSC is in HW controlled mode.
  158. */
  159. mode = regulator_get_mode(in_vreg.vreg);
  160. if (!strcmp(regulator_gdsc, in_vreg.vreg_name) &&
  161. mode == REGULATOR_MODE_FAST) {
  162. DEV_DBG("%pS->%s: %s is HW controlled\n",
  163. __builtin_return_address(0), __func__,
  164. in_vreg.vreg_name);
  165. return true;
  166. }
  167. return false;
  168. }
  169. int msm_dss_enable_vreg(struct dss_vreg *in_vreg, int num_vreg, int enable)
  170. {
  171. int i = 0, rc = 0;
  172. bool need_sleep;
  173. if (enable) {
  174. for (i = 0; i < num_vreg; i++) {
  175. rc = PTR_RET(in_vreg[i].vreg);
  176. if (rc) {
  177. DEV_ERR("%pS->%s: %s regulator error. rc=%d\n",
  178. __builtin_return_address(0), __func__,
  179. in_vreg[i].vreg_name, rc);
  180. goto vreg_set_opt_mode_fail;
  181. }
  182. if (msm_dss_is_hw_controlled(in_vreg[i]))
  183. continue;
  184. need_sleep = !regulator_is_enabled(in_vreg[i].vreg);
  185. if (in_vreg[i].pre_on_sleep && need_sleep)
  186. usleep_range(in_vreg[i].pre_on_sleep * 1000,
  187. (in_vreg[i].pre_on_sleep * 1000) + 10);
  188. rc = regulator_set_load(in_vreg[i].vreg,
  189. in_vreg[i].enable_load);
  190. if (rc < 0) {
  191. DEV_ERR("%pS->%s: %s set opt m fail\n",
  192. __builtin_return_address(0), __func__,
  193. in_vreg[i].vreg_name);
  194. goto vreg_set_opt_mode_fail;
  195. }
  196. if (regulator_count_voltages(in_vreg[i].vreg) > 0)
  197. regulator_set_voltage(in_vreg[i].vreg,
  198. in_vreg[i].min_voltage,
  199. in_vreg[i].max_voltage);
  200. rc = regulator_enable(in_vreg[i].vreg);
  201. if (in_vreg[i].post_on_sleep && need_sleep)
  202. usleep_range(in_vreg[i].post_on_sleep * 1000,
  203. (in_vreg[i].post_on_sleep * 1000) + 10);
  204. if (rc < 0) {
  205. DEV_ERR("%pS->%s: %s enable failed\n",
  206. __builtin_return_address(0), __func__,
  207. in_vreg[i].vreg_name);
  208. goto disable_vreg;
  209. }
  210. }
  211. } else {
  212. for (i = num_vreg-1; i >= 0; i--) {
  213. if (msm_dss_is_hw_controlled(in_vreg[i]))
  214. continue;
  215. if (in_vreg[i].pre_off_sleep)
  216. usleep_range(in_vreg[i].pre_off_sleep * 1000,
  217. (in_vreg[i].pre_off_sleep * 1000) + 10);
  218. regulator_set_load(in_vreg[i].vreg,
  219. in_vreg[i].disable_load);
  220. regulator_disable(in_vreg[i].vreg);
  221. if (regulator_count_voltages(in_vreg[i].vreg) > 0)
  222. regulator_set_voltage(in_vreg[i].vreg, 0,
  223. in_vreg[i].max_voltage);
  224. if (in_vreg[i].post_off_sleep)
  225. usleep_range(in_vreg[i].post_off_sleep * 1000,
  226. (in_vreg[i].post_off_sleep * 1000) + 10);
  227. }
  228. }
  229. return rc;
  230. disable_vreg:
  231. regulator_set_load(in_vreg[i].vreg, in_vreg[i].disable_load);
  232. vreg_set_opt_mode_fail:
  233. for (i--; i >= 0; i--) {
  234. if (in_vreg[i].pre_off_sleep)
  235. usleep_range(in_vreg[i].pre_off_sleep * 1000,
  236. (in_vreg[i].pre_off_sleep * 1000) + 10);
  237. regulator_set_load(in_vreg[i].vreg,
  238. in_vreg[i].disable_load);
  239. regulator_disable(in_vreg[i].vreg);
  240. if (in_vreg[i].post_off_sleep)
  241. usleep_range(in_vreg[i].post_off_sleep * 1000,
  242. (in_vreg[i].post_off_sleep * 1000) + 10);
  243. }
  244. return rc;
  245. } /* msm_dss_enable_vreg */
  246. EXPORT_SYMBOL(msm_dss_enable_vreg);
  247. int msm_dss_enable_gpio(struct dss_gpio *in_gpio, int num_gpio, int enable)
  248. {
  249. int i = 0, rc = 0;
  250. if (enable) {
  251. for (i = 0; i < num_gpio; i++) {
  252. DEV_DBG("%pS->%s: %s enable\n",
  253. __builtin_return_address(0), __func__,
  254. in_gpio[i].gpio_name);
  255. rc = gpio_request(in_gpio[i].gpio,
  256. in_gpio[i].gpio_name);
  257. if (rc < 0) {
  258. DEV_ERR("%pS->%s: %s enable failed\n",
  259. __builtin_return_address(0), __func__,
  260. in_gpio[i].gpio_name);
  261. goto disable_gpio;
  262. }
  263. gpio_set_value(in_gpio[i].gpio, in_gpio[i].value);
  264. }
  265. } else {
  266. for (i = num_gpio-1; i >= 0; i--) {
  267. DEV_DBG("%pS->%s: %s disable\n",
  268. __builtin_return_address(0), __func__,
  269. in_gpio[i].gpio_name);
  270. if (in_gpio[i].gpio)
  271. gpio_free(in_gpio[i].gpio);
  272. }
  273. }
  274. return rc;
  275. disable_gpio:
  276. for (i--; i >= 0; i--)
  277. if (in_gpio[i].gpio)
  278. gpio_free(in_gpio[i].gpio);
  279. return rc;
  280. } /* msm_dss_enable_gpio */
  281. EXPORT_SYMBOL(msm_dss_enable_gpio);
  282. void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)
  283. {
  284. int i;
  285. for (i = num_clk - 1; i >= 0; i--) {
  286. if (clk_arry[i].clk)
  287. clk_put(clk_arry[i].clk);
  288. clk_arry[i].clk = NULL;
  289. }
  290. } /* msm_dss_put_clk */
  291. EXPORT_SYMBOL(msm_dss_put_clk);
  292. int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk)
  293. {
  294. int i, rc = 0;
  295. for (i = 0; i < num_clk; i++) {
  296. clk_arry[i].clk = clk_get(dev, clk_arry[i].clk_name);
  297. rc = PTR_RET(clk_arry[i].clk);
  298. if (rc) {
  299. DEV_ERR("%pS->%s: '%s' get failed. rc=%d\n",
  300. __builtin_return_address(0), __func__,
  301. clk_arry[i].clk_name, rc);
  302. goto error;
  303. }
  304. }
  305. return rc;
  306. error:
  307. for (i--; i >= 0; i--) {
  308. if (clk_arry[i].clk)
  309. clk_put(clk_arry[i].clk);
  310. clk_arry[i].clk = NULL;
  311. }
  312. return rc;
  313. } /* msm_dss_get_clk */
  314. EXPORT_SYMBOL(msm_dss_get_clk);
  315. int msm_dss_single_clk_set_rate(struct dss_clk *clk)
  316. {
  317. int rc = 0;
  318. if (!clk) {
  319. DEV_ERR("invalid clk struct\n");
  320. return -EINVAL;
  321. }
  322. DEV_DBG("%pS->%s: set_rate '%s'\n",
  323. __builtin_return_address(0), __func__,
  324. clk->clk_name);
  325. if (clk->type != DSS_CLK_AHB) {
  326. rc = clk_set_rate(clk->clk, clk->rate);
  327. if (rc)
  328. DEV_ERR("%pS->%s: %s failed. rc=%d\n",
  329. __builtin_return_address(0),
  330. __func__,
  331. clk->clk_name, rc);
  332. }
  333. return rc;
  334. } /* msm_dss_single_clk_set_rate */
  335. EXPORT_SYMBOL(msm_dss_single_clk_set_rate);
  336. int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk)
  337. {
  338. int i, rc = 0;
  339. for (i = 0; i < num_clk; i++) {
  340. if (clk_arry[i].clk) {
  341. rc = msm_dss_single_clk_set_rate(&clk_arry[i]);
  342. if (rc)
  343. break;
  344. } else {
  345. DEV_ERR("%pS->%s: '%s' is not available\n",
  346. __builtin_return_address(0), __func__,
  347. clk_arry[i].clk_name);
  348. rc = -EPERM;
  349. break;
  350. }
  351. }
  352. return rc;
  353. } /* msm_dss_clk_set_rate */
  354. EXPORT_SYMBOL(msm_dss_clk_set_rate);
  355. int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable)
  356. {
  357. int i, rc = 0;
  358. if (enable) {
  359. for (i = 0; i < num_clk; i++) {
  360. DEV_DBG("%pS->%s: enable '%s'\n",
  361. __builtin_return_address(0), __func__,
  362. clk_arry[i].clk_name);
  363. if (clk_arry[i].clk) {
  364. rc = clk_prepare_enable(clk_arry[i].clk);
  365. if (rc)
  366. DEV_ERR("%pS->%s: %s en fail. rc=%d\n",
  367. __builtin_return_address(0),
  368. __func__,
  369. clk_arry[i].clk_name, rc);
  370. } else {
  371. DEV_ERR("%pS->%s: '%s' is not available\n",
  372. __builtin_return_address(0), __func__,
  373. clk_arry[i].clk_name);
  374. rc = -EPERM;
  375. }
  376. if (rc) {
  377. msm_dss_enable_clk(clk_arry, i, false);
  378. break;
  379. }
  380. }
  381. } else {
  382. for (i = num_clk - 1; i >= 0; i--) {
  383. DEV_DBG("%pS->%s: disable '%s'\n",
  384. __builtin_return_address(0), __func__,
  385. clk_arry[i].clk_name);
  386. if (clk_arry[i].clk)
  387. clk_disable_unprepare(clk_arry[i].clk);
  388. else
  389. DEV_ERR("%pS->%s: '%s' is not available\n",
  390. __builtin_return_address(0), __func__,
  391. clk_arry[i].clk_name);
  392. }
  393. }
  394. return rc;
  395. } /* msm_dss_enable_clk */
  396. EXPORT_SYMBOL(msm_dss_enable_clk);
  397. int sde_i2c_byte_read(struct i2c_client *client, uint8_t slave_addr,
  398. uint8_t reg_offset, uint8_t *read_buf)
  399. {
  400. struct i2c_msg msgs[2];
  401. int ret = -1;
  402. pr_debug("%s: reading from slave_addr=[%x] and offset=[%x]\n",
  403. __func__, slave_addr, reg_offset);
  404. msgs[0].addr = slave_addr >> 1;
  405. msgs[0].flags = 0;
  406. msgs[0].buf = &reg_offset;
  407. msgs[0].len = 1;
  408. msgs[1].addr = slave_addr >> 1;
  409. msgs[1].flags = I2C_M_RD;
  410. msgs[1].buf = read_buf;
  411. msgs[1].len = 1;
  412. ret = i2c_transfer(client->adapter, msgs, 2);
  413. if (ret < 1) {
  414. pr_err("%s: I2C READ FAILED=[%d]\n", __func__, ret);
  415. return -EACCES;
  416. }
  417. pr_debug("%s: i2c buf is [%x]\n", __func__, *read_buf);
  418. return 0;
  419. }
  420. EXPORT_SYMBOL(sde_i2c_byte_read);
  421. int sde_i2c_byte_write(struct i2c_client *client, uint8_t slave_addr,
  422. uint8_t reg_offset, uint8_t *value)
  423. {
  424. struct i2c_msg msgs[1];
  425. uint8_t data[2];
  426. int status = -EACCES;
  427. pr_debug("%s: writing from slave_addr=[%x] and offset=[%x]\n",
  428. __func__, slave_addr, reg_offset);
  429. data[0] = reg_offset;
  430. data[1] = *value;
  431. msgs[0].addr = slave_addr >> 1;
  432. msgs[0].flags = 0;
  433. msgs[0].len = 2;
  434. msgs[0].buf = data;
  435. status = i2c_transfer(client->adapter, msgs, 1);
  436. if (status < 1) {
  437. pr_err("I2C WRITE FAILED=[%d]\n", status);
  438. return -EACCES;
  439. }
  440. pr_debug("%s: I2C write status=%x\n", __func__, status);
  441. return status;
  442. }
  443. EXPORT_SYMBOL(sde_i2c_byte_write);