dsi_panel.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  167. {
  168. if (!gpio_is_valid(reset_gpio)) {
  169. DSI_INFO("failed to pull down the reset gpio\n");
  170. return -EINVAL;
  171. }
  172. gpio_set_value(reset_gpio, 0);
  173. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  174. DSI_INFO("GPIO pulled low to simulate ESD\n");
  175. return 0;
  176. }
  177. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  178. {
  179. struct dsi_parser_utils *utils = &panel->utils;
  180. int reset_gpio;
  181. int rc = 0;
  182. reset_gpio = utils->get_named_gpio(utils->data,
  183. "qcom,platform-reset-gpio", 0);
  184. if (!gpio_is_valid(reset_gpio)) {
  185. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  186. return -EINVAL;
  187. }
  188. rc = gpio_request(reset_gpio, "reset_gpio");
  189. if (rc) {
  190. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  191. return rc;
  192. }
  193. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  194. gpio_free(reset_gpio);
  195. return rc;
  196. }
  197. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  198. {
  199. struct dsi_panel_reset_config *r_config;
  200. if (!panel) {
  201. DSI_ERR("Invalid panel param\n");
  202. return -EINVAL;
  203. }
  204. r_config = &panel->reset_config;
  205. if (!r_config) {
  206. DSI_ERR("Invalid panel reset configuration\n");
  207. return -EINVAL;
  208. }
  209. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  210. }
  211. static int dsi_panel_reset(struct dsi_panel *panel)
  212. {
  213. int rc = 0;
  214. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  215. int i;
  216. if (!gpio_is_valid(r_config->reset_gpio))
  217. goto skip_reset_gpio;
  218. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  219. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  220. if (rc) {
  221. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  222. goto exit;
  223. }
  224. }
  225. if (r_config->count) {
  226. rc = gpio_direction_output(r_config->reset_gpio,
  227. r_config->sequence[0].level);
  228. if (rc) {
  229. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  230. goto exit;
  231. }
  232. }
  233. for (i = 0; i < r_config->count; i++) {
  234. gpio_set_value(r_config->reset_gpio,
  235. r_config->sequence[i].level);
  236. if (r_config->sequence[i].sleep_ms)
  237. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  238. (r_config->sequence[i].sleep_ms * 1000) + 100);
  239. }
  240. skip_reset_gpio:
  241. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  242. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  243. if (rc)
  244. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  245. }
  246. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  247. bool out = true;
  248. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  249. || (panel->reset_config.mode_sel_state
  250. == MODE_GPIO_LOW))
  251. out = false;
  252. else if ((panel->reset_config.mode_sel_state
  253. == MODE_SEL_SINGLE_PORT) ||
  254. (panel->reset_config.mode_sel_state
  255. == MODE_GPIO_HIGH))
  256. out = true;
  257. rc = gpio_direction_output(
  258. panel->reset_config.lcd_mode_sel_gpio, out);
  259. if (rc)
  260. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  261. }
  262. if (gpio_is_valid(panel->panel_test_gpio)) {
  263. rc = gpio_direction_input(panel->panel_test_gpio);
  264. if (rc)
  265. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  266. rc);
  267. }
  268. exit:
  269. return rc;
  270. }
  271. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  272. {
  273. int rc = 0;
  274. struct pinctrl_state *state;
  275. if (panel->host_config.ext_bridge_mode)
  276. return 0;
  277. if (!panel->pinctrl.pinctrl)
  278. return 0;
  279. if (enable)
  280. state = panel->pinctrl.active;
  281. else
  282. state = panel->pinctrl.suspend;
  283. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  284. if (rc)
  285. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  286. panel->name, rc);
  287. return rc;
  288. }
  289. static int dsi_panel_power_on(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  293. if (rc) {
  294. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  295. panel->name, rc);
  296. goto exit;
  297. }
  298. rc = dsi_panel_set_pinctrl_state(panel, true);
  299. if (rc) {
  300. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  301. goto error_disable_vregs;
  302. }
  303. rc = dsi_panel_reset(panel);
  304. if (rc) {
  305. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  306. goto error_disable_gpio;
  307. }
  308. goto exit;
  309. error_disable_gpio:
  310. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  311. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  312. if (gpio_is_valid(panel->bl_config.en_gpio))
  313. gpio_set_value(panel->bl_config.en_gpio, 0);
  314. (void)dsi_panel_set_pinctrl_state(panel, false);
  315. error_disable_vregs:
  316. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  317. exit:
  318. return rc;
  319. }
  320. static int dsi_panel_power_off(struct dsi_panel *panel)
  321. {
  322. int rc = 0;
  323. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  324. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  325. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  326. !panel->reset_gpio_always_on)
  327. gpio_set_value(panel->reset_config.reset_gpio, 0);
  328. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  329. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  330. if (gpio_is_valid(panel->panel_test_gpio)) {
  331. rc = gpio_direction_input(panel->panel_test_gpio);
  332. if (rc)
  333. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  334. rc);
  335. }
  336. rc = dsi_panel_set_pinctrl_state(panel, false);
  337. if (rc) {
  338. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  339. rc);
  340. }
  341. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  342. if (rc)
  343. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  344. panel->name, rc);
  345. return rc;
  346. }
  347. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  348. enum dsi_cmd_set_type type)
  349. {
  350. int rc = 0, i = 0;
  351. ssize_t len;
  352. struct dsi_cmd_desc *cmds;
  353. u32 count;
  354. enum dsi_cmd_set_state state;
  355. struct dsi_display_mode *mode;
  356. if (!panel || !panel->cur_mode)
  357. return -EINVAL;
  358. mode = panel->cur_mode;
  359. cmds = mode->priv_info->cmd_sets[type].cmds;
  360. count = mode->priv_info->cmd_sets[type].count;
  361. state = mode->priv_info->cmd_sets[type].state;
  362. SDE_EVT32(type, state, count);
  363. if (count == 0) {
  364. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  365. panel->name, type);
  366. goto error;
  367. }
  368. cmds->ctrl_flags = 0;
  369. for (i = 0; i < count; i++) {
  370. if (state == DSI_CMD_SET_STATE_LP)
  371. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  372. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  373. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  374. len = dsi_host_transfer_sub(panel->host, cmds);
  375. if (len < 0) {
  376. rc = len;
  377. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  378. goto error;
  379. }
  380. if (cmds->post_wait_ms)
  381. usleep_range(cmds->post_wait_ms*1000,
  382. ((cmds->post_wait_ms*1000)+10));
  383. cmds++;
  384. }
  385. error:
  386. return rc;
  387. }
  388. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  389. {
  390. int rc = 0;
  391. if (panel->host_config.ext_bridge_mode)
  392. return 0;
  393. devm_pinctrl_put(panel->pinctrl.pinctrl);
  394. return rc;
  395. }
  396. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (panel->host_config.ext_bridge_mode)
  400. return 0;
  401. /* TODO: pinctrl is defined in dsi dt node */
  402. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  403. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  404. rc = PTR_ERR(panel->pinctrl.pinctrl);
  405. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  406. goto error;
  407. }
  408. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  409. "panel_active");
  410. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  411. rc = PTR_ERR(panel->pinctrl.active);
  412. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  413. goto error;
  414. }
  415. panel->pinctrl.suspend =
  416. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  417. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  418. rc = PTR_ERR(panel->pinctrl.suspend);
  419. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  420. goto error;
  421. }
  422. panel->pinctrl.pwm_pin =
  423. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  424. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  425. panel->pinctrl.pwm_pin = NULL;
  426. DSI_DEBUG("failed to get pinctrl pwm_pin");
  427. }
  428. error:
  429. return rc;
  430. }
  431. static int dsi_panel_wled_register(struct dsi_panel *panel,
  432. struct dsi_backlight_config *bl)
  433. {
  434. struct backlight_device *bd;
  435. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  436. if (!bd) {
  437. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  438. panel->name, -EPROBE_DEFER);
  439. return -EPROBE_DEFER;
  440. }
  441. bl->raw_bd = bd;
  442. return 0;
  443. }
  444. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  445. u32 bl_lvl)
  446. {
  447. int rc = 0;
  448. unsigned long mode_flags = 0;
  449. struct mipi_dsi_device *dsi = NULL;
  450. if (!panel || (bl_lvl > 0xffff)) {
  451. DSI_ERR("invalid params\n");
  452. return -EINVAL;
  453. }
  454. dsi = &panel->mipi_device;
  455. if (unlikely(panel->bl_config.lp_mode)) {
  456. mode_flags = dsi->mode_flags;
  457. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  458. }
  459. if (panel->bl_config.bl_inverted_dbv)
  460. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  461. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  462. if (rc < 0)
  463. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  464. if (unlikely(panel->bl_config.lp_mode))
  465. dsi->mode_flags = mode_flags;
  466. return rc;
  467. }
  468. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  469. u32 bl_lvl)
  470. {
  471. int rc = 0;
  472. u32 duty = 0;
  473. u32 period_ns = 0;
  474. struct dsi_backlight_config *bl;
  475. if (!panel) {
  476. DSI_ERR("Invalid Params\n");
  477. return -EINVAL;
  478. }
  479. bl = &panel->bl_config;
  480. if (!bl->pwm_bl) {
  481. DSI_ERR("pwm device not found\n");
  482. return -EINVAL;
  483. }
  484. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  485. duty = bl_lvl * period_ns;
  486. duty /= bl->bl_max_level;
  487. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  488. if (rc) {
  489. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  490. rc);
  491. goto error;
  492. }
  493. if (bl_lvl == 0 && bl->pwm_enabled) {
  494. pwm_disable(bl->pwm_bl);
  495. bl->pwm_enabled = false;
  496. return 0;
  497. }
  498. if (bl_lvl != 0 && !bl->pwm_enabled) {
  499. rc = pwm_enable(bl->pwm_bl);
  500. if (rc) {
  501. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  502. rc);
  503. goto error;
  504. }
  505. bl->pwm_enabled = true;
  506. }
  507. error:
  508. return rc;
  509. }
  510. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  511. {
  512. int rc = 0;
  513. struct dsi_backlight_config *bl = &panel->bl_config;
  514. if (panel->host_config.ext_bridge_mode)
  515. return 0;
  516. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  517. switch (bl->type) {
  518. case DSI_BACKLIGHT_WLED:
  519. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  520. break;
  521. case DSI_BACKLIGHT_DCS:
  522. rc = dsi_panel_update_backlight(panel, bl_lvl);
  523. break;
  524. case DSI_BACKLIGHT_EXTERNAL:
  525. break;
  526. case DSI_BACKLIGHT_PWM:
  527. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  528. break;
  529. default:
  530. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  531. rc = -ENOTSUPP;
  532. }
  533. return rc;
  534. }
  535. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  536. {
  537. u32 cur_bl_level;
  538. struct backlight_device *bd = bl->raw_bd;
  539. /* default the brightness level to 50% */
  540. cur_bl_level = bl->bl_max_level >> 1;
  541. switch (bl->type) {
  542. case DSI_BACKLIGHT_WLED:
  543. /* Try to query the backlight level from the backlight device */
  544. if (bd->ops && bd->ops->get_brightness)
  545. cur_bl_level = bd->ops->get_brightness(bd);
  546. break;
  547. case DSI_BACKLIGHT_DCS:
  548. case DSI_BACKLIGHT_EXTERNAL:
  549. case DSI_BACKLIGHT_PWM:
  550. default:
  551. /*
  552. * Ideally, we should read the backlight level from the
  553. * panel. For now, just set it default value.
  554. */
  555. break;
  556. }
  557. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  558. return cur_bl_level;
  559. }
  560. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  561. {
  562. struct dsi_backlight_config *bl = &panel->bl_config;
  563. bl->bl_level = dsi_panel_get_brightness(bl);
  564. }
  565. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  566. {
  567. int rc = 0;
  568. struct dsi_backlight_config *bl = &panel->bl_config;
  569. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  570. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  571. rc = PTR_ERR(bl->pwm_bl);
  572. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  573. rc);
  574. return rc;
  575. }
  576. if (panel->pinctrl.pwm_pin) {
  577. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  578. panel->pinctrl.pwm_pin);
  579. if (rc)
  580. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  581. panel->name, rc);
  582. }
  583. return 0;
  584. }
  585. static int dsi_panel_bl_register(struct dsi_panel *panel)
  586. {
  587. int rc = 0;
  588. struct dsi_backlight_config *bl = &panel->bl_config;
  589. if (panel->host_config.ext_bridge_mode)
  590. return 0;
  591. switch (bl->type) {
  592. case DSI_BACKLIGHT_WLED:
  593. rc = dsi_panel_wled_register(panel, bl);
  594. break;
  595. case DSI_BACKLIGHT_DCS:
  596. break;
  597. case DSI_BACKLIGHT_EXTERNAL:
  598. break;
  599. case DSI_BACKLIGHT_PWM:
  600. rc = dsi_panel_pwm_register(panel);
  601. break;
  602. default:
  603. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  604. rc = -ENOTSUPP;
  605. goto error;
  606. }
  607. error:
  608. return rc;
  609. }
  610. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  611. {
  612. struct dsi_backlight_config *bl = &panel->bl_config;
  613. devm_pwm_put(panel->parent, bl->pwm_bl);
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. dsi_panel_pwm_unregister(panel);
  630. break;
  631. default:
  632. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  633. rc = -ENOTSUPP;
  634. goto error;
  635. }
  636. error:
  637. return rc;
  638. }
  639. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  640. struct dsi_parser_utils *utils)
  641. {
  642. int rc = 0;
  643. u64 tmp64 = 0;
  644. struct dsi_display_mode *display_mode;
  645. struct dsi_display_mode_priv_info *priv_info;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (!rc)
  663. display_mode->priv_info->mdp_transfer_time_us =
  664. mode->mdp_transfer_time_us;
  665. else
  666. display_mode->priv_info->mdp_transfer_time_us = 0;
  667. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  668. rc = utils->read_u32(utils->data,
  669. "qcom,mdss-dsi-panel-framerate",
  670. &mode->refresh_rate);
  671. if (rc) {
  672. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  673. rc);
  674. goto error;
  675. }
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  677. &mode->h_active);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data,
  684. "qcom,mdss-dsi-h-front-porch",
  685. &mode->h_front_porch);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. rc = utils->read_u32(utils->data,
  692. "qcom,mdss-dsi-h-back-porch",
  693. &mode->h_back_porch);
  694. if (rc) {
  695. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  696. rc);
  697. goto error;
  698. }
  699. rc = utils->read_u32(utils->data,
  700. "qcom,mdss-dsi-h-pulse-width",
  701. &mode->h_sync_width);
  702. if (rc) {
  703. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  704. rc);
  705. goto error;
  706. }
  707. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  708. &mode->h_skew);
  709. if (rc)
  710. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  711. rc);
  712. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  713. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  714. mode->h_sync_width);
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  716. &mode->v_active);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  723. &mode->v_back_porch);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  730. &mode->v_front_porch);
  731. if (rc) {
  732. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  733. rc);
  734. goto error;
  735. }
  736. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  737. &mode->v_sync_width);
  738. if (rc) {
  739. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  740. rc);
  741. goto error;
  742. }
  743. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  744. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  745. mode->v_sync_width);
  746. error:
  747. return rc;
  748. }
  749. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  750. struct dsi_parser_utils *utils,
  751. const char *name)
  752. {
  753. int rc = 0;
  754. u32 bpp = 0;
  755. enum dsi_pixel_format fmt;
  756. const char *packing;
  757. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  758. if (rc) {
  759. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  760. name, rc);
  761. return rc;
  762. }
  763. host->bpp = bpp;
  764. switch (bpp) {
  765. case 3:
  766. fmt = DSI_PIXEL_FORMAT_RGB111;
  767. break;
  768. case 8:
  769. fmt = DSI_PIXEL_FORMAT_RGB332;
  770. break;
  771. case 12:
  772. fmt = DSI_PIXEL_FORMAT_RGB444;
  773. break;
  774. case 16:
  775. fmt = DSI_PIXEL_FORMAT_RGB565;
  776. break;
  777. case 18:
  778. fmt = DSI_PIXEL_FORMAT_RGB666;
  779. break;
  780. case 24:
  781. default:
  782. fmt = DSI_PIXEL_FORMAT_RGB888;
  783. break;
  784. }
  785. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  786. packing = utils->get_property(utils->data,
  787. "qcom,mdss-dsi-pixel-packing",
  788. NULL);
  789. if (packing && !strcmp(packing, "loose"))
  790. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  791. }
  792. host->dst_format = fmt;
  793. return rc;
  794. }
  795. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  796. struct dsi_parser_utils *utils,
  797. const char *name)
  798. {
  799. int rc = 0;
  800. bool lane_enabled;
  801. u32 num_of_lanes = 0;
  802. lane_enabled = utils->read_bool(utils->data,
  803. "qcom,mdss-dsi-lane-0-state");
  804. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  805. lane_enabled = utils->read_bool(utils->data,
  806. "qcom,mdss-dsi-lane-1-state");
  807. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  808. lane_enabled = utils->read_bool(utils->data,
  809. "qcom,mdss-dsi-lane-2-state");
  810. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  811. lane_enabled = utils->read_bool(utils->data,
  812. "qcom,mdss-dsi-lane-3-state");
  813. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  814. if (host->data_lanes & DSI_DATA_LANE_0)
  815. num_of_lanes++;
  816. if (host->data_lanes & DSI_DATA_LANE_1)
  817. num_of_lanes++;
  818. if (host->data_lanes & DSI_DATA_LANE_2)
  819. num_of_lanes++;
  820. if (host->data_lanes & DSI_DATA_LANE_3)
  821. num_of_lanes++;
  822. host->num_data_lanes = num_of_lanes;
  823. if (host->data_lanes == 0) {
  824. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  825. rc = -EINVAL;
  826. }
  827. return rc;
  828. }
  829. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  830. struct dsi_parser_utils *utils,
  831. const char *name)
  832. {
  833. int rc = 0;
  834. const char *swap_mode;
  835. swap_mode = utils->get_property(utils->data,
  836. "qcom,mdss-dsi-color-order", NULL);
  837. if (swap_mode) {
  838. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  839. host->swap_mode = DSI_COLOR_SWAP_RGB;
  840. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  841. host->swap_mode = DSI_COLOR_SWAP_RBG;
  842. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  843. host->swap_mode = DSI_COLOR_SWAP_BRG;
  844. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  845. host->swap_mode = DSI_COLOR_SWAP_GRB;
  846. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  847. host->swap_mode = DSI_COLOR_SWAP_GBR;
  848. } else {
  849. DSI_ERR("[%s] Unrecognized color order-%s\n",
  850. name, swap_mode);
  851. rc = -EINVAL;
  852. }
  853. } else {
  854. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  855. host->swap_mode = DSI_COLOR_SWAP_RGB;
  856. }
  857. /* bit swap on color channel is not defined in dt */
  858. host->bit_swap_red = false;
  859. host->bit_swap_green = false;
  860. host->bit_swap_blue = false;
  861. return rc;
  862. }
  863. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  864. struct dsi_parser_utils *utils,
  865. const char *name)
  866. {
  867. const char *trig;
  868. int rc = 0;
  869. trig = utils->get_property(utils->data,
  870. "qcom,mdss-dsi-mdp-trigger", NULL);
  871. if (trig) {
  872. if (!strcmp(trig, "none")) {
  873. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  874. } else if (!strcmp(trig, "trigger_te")) {
  875. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  876. } else if (!strcmp(trig, "trigger_sw")) {
  877. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  878. } else if (!strcmp(trig, "trigger_sw_te")) {
  879. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  880. } else {
  881. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  882. name, trig);
  883. rc = -EINVAL;
  884. }
  885. } else {
  886. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  887. name);
  888. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  889. }
  890. trig = utils->get_property(utils->data,
  891. "qcom,mdss-dsi-dma-trigger", NULL);
  892. if (trig) {
  893. if (!strcmp(trig, "none")) {
  894. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  895. } else if (!strcmp(trig, "trigger_te")) {
  896. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  897. } else if (!strcmp(trig, "trigger_sw")) {
  898. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  899. } else if (!strcmp(trig, "trigger_sw_seof")) {
  900. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  901. } else if (!strcmp(trig, "trigger_sw_te")) {
  902. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  903. } else {
  904. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  905. name, trig);
  906. rc = -EINVAL;
  907. }
  908. } else {
  909. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  910. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  911. }
  912. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  913. &host->te_mode);
  914. if (rc) {
  915. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  916. host->te_mode = 1;
  917. rc = 0;
  918. }
  919. return rc;
  920. }
  921. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  922. struct dsi_parser_utils *utils,
  923. const char *name)
  924. {
  925. u32 val = 0, line_no = 0, window = 0;
  926. int rc = 0;
  927. bool panel_cphy_mode = false;
  928. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  929. if (!rc) {
  930. host->t_clk_post = val;
  931. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  932. }
  933. val = 0;
  934. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  935. if (!rc) {
  936. host->t_clk_pre = val;
  937. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  938. }
  939. host->ignore_rx_eot = utils->read_bool(utils->data,
  940. "qcom,mdss-dsi-rx-eot-ignore");
  941. host->append_tx_eot = utils->read_bool(utils->data,
  942. "qcom,mdss-dsi-tx-eot-append");
  943. host->ext_bridge_mode = utils->read_bool(utils->data,
  944. "qcom,mdss-dsi-ext-bridge-mode");
  945. host->force_hs_clk_lane = utils->read_bool(utils->data,
  946. "qcom,mdss-dsi-force-clock-lane-hs");
  947. panel_cphy_mode = utils->read_bool(utils->data,
  948. "qcom,panel-cphy-mode");
  949. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  950. : DSI_PHY_TYPE_DPHY;
  951. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  952. &line_no);
  953. if (rc)
  954. host->dma_sched_line = 0;
  955. else
  956. host->dma_sched_line = line_no;
  957. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  958. &window);
  959. if (rc)
  960. host->dma_sched_window = 0;
  961. else
  962. host->dma_sched_window = window;
  963. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  964. host->dma_sched_line, host->dma_sched_window);
  965. return 0;
  966. }
  967. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  968. struct dsi_parser_utils *utils,
  969. const char *name)
  970. {
  971. int rc = 0;
  972. u32 val = 0;
  973. bool supported = false;
  974. struct dsi_split_link_config *split_link = &host->split_link;
  975. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  976. if (!supported) {
  977. DSI_DEBUG("[%s] Split link is not supported\n", name);
  978. split_link->enabled = false;
  979. return;
  980. }
  981. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  982. if (rc || val < 1) {
  983. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  984. split_link->num_sublinks = 2;
  985. } else {
  986. split_link->num_sublinks = val;
  987. }
  988. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  989. if (rc || val < 1) {
  990. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  991. split_link->lanes_per_sublink = 2;
  992. } else {
  993. split_link->lanes_per_sublink = val;
  994. }
  995. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  996. if (!supported)
  997. split_link->sublink_swap = false;
  998. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  999. split_link->num_sublinks, split_link->lanes_per_sublink);
  1000. split_link->enabled = true;
  1001. }
  1002. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1003. {
  1004. int rc = 0;
  1005. struct dsi_parser_utils *utils = &panel->utils;
  1006. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1007. panel->name);
  1008. if (rc) {
  1009. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1010. panel->name, rc);
  1011. goto error;
  1012. }
  1013. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1014. panel->name);
  1015. if (rc) {
  1016. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1017. panel->name, rc);
  1018. goto error;
  1019. }
  1020. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1021. panel->name);
  1022. if (rc) {
  1023. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1024. panel->name, rc);
  1025. goto error;
  1026. }
  1027. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1028. panel->name);
  1029. if (rc) {
  1030. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1031. panel->name, rc);
  1032. goto error;
  1033. }
  1034. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1035. panel->name);
  1036. if (rc) {
  1037. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1038. panel->name, rc);
  1039. goto error;
  1040. }
  1041. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1042. panel->name);
  1043. error:
  1044. return rc;
  1045. }
  1046. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1047. struct device_node *of_node)
  1048. {
  1049. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1050. struct dsi_parser_utils *utils = &panel->utils;
  1051. int val, rc = 0;
  1052. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1053. if (val <= 0) {
  1054. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1055. return rc;
  1056. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1057. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1058. val, panel->dfps_caps.dfps_list_len);
  1059. return -EINVAL;
  1060. }
  1061. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1062. if (!avr_caps->avr_step_fps_list)
  1063. return -ENOMEM;
  1064. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1065. avr_caps->avr_step_fps_list, val);
  1066. if (rc) {
  1067. kfree(avr_caps->avr_step_fps_list);
  1068. return rc;
  1069. }
  1070. avr_caps->avr_step_fps_list_len = val;
  1071. return rc;
  1072. }
  1073. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1074. struct device_node *of_node)
  1075. {
  1076. int rc = 0;
  1077. u32 val = 0, i;
  1078. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1079. struct dsi_parser_utils *utils = &panel->utils;
  1080. const char *name = panel->name;
  1081. /**
  1082. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1083. * video mode when there is only one qsync min fps present.
  1084. */
  1085. rc = of_property_read_u32(of_node,
  1086. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1087. &val);
  1088. if (rc)
  1089. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1090. panel->name, rc);
  1091. qsync_caps->qsync_min_fps = val;
  1092. /**
  1093. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1094. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1095. * is defined.
  1096. */
  1097. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1098. "qcom,dsi-supported-qsync-min-fps-list");
  1099. if (qsync_caps->qsync_min_fps_list_len < 1)
  1100. goto qsync_support;
  1101. /**
  1102. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1103. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1104. */
  1105. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1106. qsync_caps->qsync_min_fps) {
  1107. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1108. name);
  1109. rc = -EINVAL;
  1110. goto error;
  1111. }
  1112. if (panel->dfps_caps.dfps_list_len !=
  1113. qsync_caps->qsync_min_fps_list_len) {
  1114. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1115. rc = -EINVAL;
  1116. goto error;
  1117. }
  1118. qsync_caps->qsync_min_fps_list =
  1119. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1120. GFP_KERNEL);
  1121. if (!qsync_caps->qsync_min_fps_list) {
  1122. rc = -ENOMEM;
  1123. goto error;
  1124. }
  1125. rc = utils->read_u32_array(utils->data,
  1126. "qcom,dsi-supported-qsync-min-fps-list",
  1127. qsync_caps->qsync_min_fps_list,
  1128. qsync_caps->qsync_min_fps_list_len);
  1129. if (rc) {
  1130. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1131. rc = -EINVAL;
  1132. goto error;
  1133. }
  1134. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1135. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1136. if (qsync_caps->qsync_min_fps_list[i] <
  1137. qsync_caps->qsync_min_fps)
  1138. qsync_caps->qsync_min_fps =
  1139. qsync_caps->qsync_min_fps_list[i];
  1140. }
  1141. qsync_support:
  1142. /* allow qsync support only if DFPS is with VFP approach */
  1143. if ((panel->dfps_caps.dfps_support) &&
  1144. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1145. panel->qsync_caps.qsync_min_fps = 0;
  1146. error:
  1147. if (rc < 0) {
  1148. qsync_caps->qsync_min_fps = 0;
  1149. qsync_caps->qsync_min_fps_list_len = 0;
  1150. }
  1151. return rc;
  1152. }
  1153. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1154. struct dsi_parser_utils *utils)
  1155. {
  1156. int i, rc = 0;
  1157. struct dyn_clk_list *bit_clk_list;
  1158. if (!mode || !mode->priv_info) {
  1159. DSI_ERR("invalid arguments\n");
  1160. return -EINVAL;
  1161. }
  1162. bit_clk_list = &mode->priv_info->bit_clk_list;
  1163. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1164. if (bit_clk_list->count < 1)
  1165. return 0;
  1166. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1167. if (!bit_clk_list->rates) {
  1168. DSI_ERR("failed to allocate space for bit clock list\n");
  1169. return -ENOMEM;
  1170. }
  1171. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1172. bit_clk_list->rates, bit_clk_list->count);
  1173. if (rc) {
  1174. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1175. return -EINVAL;
  1176. }
  1177. for (i = 0; i < bit_clk_list->count; i++)
  1178. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1179. return 0;
  1180. }
  1181. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1182. {
  1183. int rc = 0;
  1184. bool supported = false;
  1185. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1186. struct dsi_parser_utils *utils = &panel->utils;
  1187. const char *type;
  1188. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1189. if (!supported) {
  1190. dyn_clk_caps->dyn_clk_support = false;
  1191. return rc;
  1192. }
  1193. dyn_clk_caps->dyn_clk_support = true;
  1194. type = utils->get_property(utils->data,
  1195. "qcom,dsi-dyn-clk-type", NULL);
  1196. if (!type) {
  1197. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1198. dyn_clk_caps->maintain_const_fps = false;
  1199. return 0;
  1200. }
  1201. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1202. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1203. dyn_clk_caps->maintain_const_fps = true;
  1204. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1205. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1206. dyn_clk_caps->maintain_const_fps = true;
  1207. } else {
  1208. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1209. dyn_clk_caps->maintain_const_fps = false;
  1210. }
  1211. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1212. return 0;
  1213. }
  1214. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1215. {
  1216. int rc = 0;
  1217. bool supported = false;
  1218. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1219. struct dsi_parser_utils *utils = &panel->utils;
  1220. const char *name = panel->name;
  1221. const char *type;
  1222. u32 i;
  1223. supported = utils->read_bool(utils->data,
  1224. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1225. if (!supported) {
  1226. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1227. dfps_caps->dfps_support = false;
  1228. return rc;
  1229. }
  1230. type = utils->get_property(utils->data,
  1231. "qcom,mdss-dsi-pan-fps-update", NULL);
  1232. if (!type) {
  1233. DSI_ERR("[%s] dfps type not defined\n", name);
  1234. rc = -EINVAL;
  1235. goto error;
  1236. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1237. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1238. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1239. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1240. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1241. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1242. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1243. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1244. } else {
  1245. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1246. rc = -EINVAL;
  1247. goto error;
  1248. }
  1249. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1250. "qcom,dsi-supported-dfps-list");
  1251. if (dfps_caps->dfps_list_len < 1) {
  1252. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1253. rc = -EINVAL;
  1254. goto error;
  1255. }
  1256. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1257. GFP_KERNEL);
  1258. if (!dfps_caps->dfps_list) {
  1259. rc = -ENOMEM;
  1260. goto error;
  1261. }
  1262. rc = utils->read_u32_array(utils->data,
  1263. "qcom,dsi-supported-dfps-list",
  1264. dfps_caps->dfps_list,
  1265. dfps_caps->dfps_list_len);
  1266. if (rc) {
  1267. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1268. rc = -EINVAL;
  1269. goto error;
  1270. }
  1271. dfps_caps->dfps_support = true;
  1272. /* calculate max and min fps */
  1273. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1274. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1275. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1276. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1277. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1278. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1279. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1280. }
  1281. error:
  1282. return rc;
  1283. }
  1284. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1285. struct dsi_parser_utils *utils,
  1286. const char *name)
  1287. {
  1288. int rc = 0;
  1289. const char *traffic_mode;
  1290. u32 vc_id = 0;
  1291. u32 val = 0;
  1292. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1293. if (rc) {
  1294. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1295. cfg->pulse_mode_hsa_he = false;
  1296. } else if (val == 1) {
  1297. cfg->pulse_mode_hsa_he = true;
  1298. } else if (val == 0) {
  1299. cfg->pulse_mode_hsa_he = false;
  1300. } else {
  1301. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1302. name);
  1303. rc = -EINVAL;
  1304. goto error;
  1305. }
  1306. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1307. "qcom,mdss-dsi-hfp-power-mode");
  1308. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1309. "qcom,mdss-dsi-hbp-power-mode");
  1310. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1311. "qcom,mdss-dsi-hsa-power-mode");
  1312. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1313. "qcom,mdss-dsi-last-line-interleave");
  1314. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1315. "qcom,mdss-dsi-bllp-eof-power-mode");
  1316. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1317. "qcom,mdss-dsi-bllp-power-mode");
  1318. traffic_mode = utils->get_property(utils->data,
  1319. "qcom,mdss-dsi-traffic-mode",
  1320. NULL);
  1321. if (!traffic_mode) {
  1322. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1323. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1324. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1325. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1326. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1327. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1328. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1329. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1330. } else {
  1331. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1332. traffic_mode);
  1333. rc = -EINVAL;
  1334. goto error;
  1335. }
  1336. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1337. &vc_id);
  1338. if (rc) {
  1339. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1340. cfg->vc_id = 0;
  1341. } else {
  1342. cfg->vc_id = vc_id;
  1343. }
  1344. error:
  1345. return rc;
  1346. }
  1347. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1348. struct dsi_parser_utils *utils,
  1349. const char *name)
  1350. {
  1351. u32 val = 0;
  1352. int rc = 0;
  1353. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1354. if (rc) {
  1355. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1356. cfg->wr_mem_start = 0x2C;
  1357. } else {
  1358. cfg->wr_mem_start = val;
  1359. }
  1360. val = 0;
  1361. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1362. &val);
  1363. if (rc) {
  1364. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1365. cfg->wr_mem_continue = 0x3C;
  1366. } else {
  1367. cfg->wr_mem_continue = val;
  1368. }
  1369. /* TODO: fix following */
  1370. cfg->max_cmd_packets_interleave = 0;
  1371. val = 0;
  1372. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1373. &val);
  1374. if (rc) {
  1375. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1376. cfg->insert_dcs_command = true;
  1377. } else if (val == 1) {
  1378. cfg->insert_dcs_command = true;
  1379. } else if (val == 0) {
  1380. cfg->insert_dcs_command = false;
  1381. } else {
  1382. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1383. name);
  1384. rc = -EINVAL;
  1385. goto error;
  1386. }
  1387. error:
  1388. return rc;
  1389. }
  1390. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1391. {
  1392. int rc = 0;
  1393. struct dsi_parser_utils *utils = &panel->utils;
  1394. bool panel_mode_switch_enabled;
  1395. enum dsi_op_mode panel_mode;
  1396. const char *mode;
  1397. mode = utils->get_property(utils->data,
  1398. "qcom,mdss-dsi-panel-type", NULL);
  1399. if (!mode) {
  1400. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1401. panel_mode = DSI_OP_VIDEO_MODE;
  1402. } else if (!strcmp(mode, "dsi_video_mode")) {
  1403. panel_mode = DSI_OP_VIDEO_MODE;
  1404. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1405. panel_mode = DSI_OP_CMD_MODE;
  1406. } else {
  1407. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1408. rc = -EINVAL;
  1409. goto error;
  1410. }
  1411. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1412. "qcom,mdss-dsi-panel-mode-switch");
  1413. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1414. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1415. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1416. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1417. utils,
  1418. panel->name);
  1419. if (rc) {
  1420. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1421. panel->name, rc);
  1422. goto error;
  1423. }
  1424. }
  1425. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1426. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1427. utils,
  1428. panel->name);
  1429. if (rc) {
  1430. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1431. panel->name, rc);
  1432. goto error;
  1433. }
  1434. }
  1435. panel->poms_align_vsync = utils->read_bool(utils->data,
  1436. "qcom,poms-align-panel-vsync");
  1437. panel->panel_mode = panel_mode;
  1438. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1439. error:
  1440. return rc;
  1441. }
  1442. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1443. {
  1444. int rc = 0;
  1445. u32 val = 0;
  1446. const char *str;
  1447. struct dsi_panel_phy_props *props = &panel->phy_props;
  1448. struct dsi_parser_utils *utils = &panel->utils;
  1449. const char *name = panel->name;
  1450. rc = utils->read_u32(utils->data,
  1451. "qcom,mdss-pan-physical-width-dimension", &val);
  1452. if (rc) {
  1453. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1454. props->panel_width_mm = 0;
  1455. rc = 0;
  1456. } else {
  1457. props->panel_width_mm = val;
  1458. }
  1459. rc = utils->read_u32(utils->data,
  1460. "qcom,mdss-pan-physical-height-dimension",
  1461. &val);
  1462. if (rc) {
  1463. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1464. props->panel_height_mm = 0;
  1465. rc = 0;
  1466. } else {
  1467. props->panel_height_mm = val;
  1468. }
  1469. str = utils->get_property(utils->data,
  1470. "qcom,mdss-dsi-panel-orientation", NULL);
  1471. if (!str) {
  1472. props->rotation = DSI_PANEL_ROTATE_NONE;
  1473. } else if (!strcmp(str, "180")) {
  1474. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1475. } else if (!strcmp(str, "hflip")) {
  1476. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1477. } else if (!strcmp(str, "vflip")) {
  1478. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1479. } else {
  1480. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1481. rc = -EINVAL;
  1482. goto error;
  1483. }
  1484. error:
  1485. return rc;
  1486. }
  1487. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1488. "qcom,mdss-dsi-pre-on-command",
  1489. "qcom,mdss-dsi-on-command",
  1490. "qcom,vid-on-commands",
  1491. "qcom,cmd-on-commands",
  1492. "qcom,mdss-dsi-post-panel-on-command",
  1493. "qcom,mdss-dsi-pre-off-command",
  1494. "qcom,mdss-dsi-off-command",
  1495. "qcom,mdss-dsi-post-off-command",
  1496. "qcom,mdss-dsi-pre-res-switch",
  1497. "qcom,mdss-dsi-res-switch",
  1498. "qcom,mdss-dsi-post-res-switch",
  1499. "qcom,video-mode-switch-in-commands",
  1500. "qcom,video-mode-switch-out-commands",
  1501. "qcom,cmd-mode-switch-in-commands",
  1502. "qcom,cmd-mode-switch-out-commands",
  1503. "qcom,mdss-dsi-panel-status-command",
  1504. "qcom,mdss-dsi-lp1-command",
  1505. "qcom,mdss-dsi-lp2-command",
  1506. "qcom,mdss-dsi-nolp-command",
  1507. "PPS not parsed from DTSI, generated dynamically",
  1508. "ROI not parsed from DTSI, generated dynamically",
  1509. "qcom,mdss-dsi-timing-switch-command",
  1510. "qcom,mdss-dsi-post-mode-switch-on-command",
  1511. "qcom,mdss-dsi-qsync-on-commands",
  1512. "qcom,mdss-dsi-qsync-off-commands",
  1513. };
  1514. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1515. "qcom,mdss-dsi-pre-on-command-state",
  1516. "qcom,mdss-dsi-on-command-state",
  1517. "qcom,vid-on-commands-state",
  1518. "qcom,cmd-on-commands-state",
  1519. "qcom,mdss-dsi-post-on-command-state",
  1520. "qcom,mdss-dsi-pre-off-command-state",
  1521. "qcom,mdss-dsi-off-command-state",
  1522. "qcom,mdss-dsi-post-off-command-state",
  1523. "qcom,mdss-dsi-pre-res-switch-state",
  1524. "qcom,mdss-dsi-res-switch-state",
  1525. "qcom,mdss-dsi-post-res-switch-state",
  1526. "qcom,video-mode-switch-in-commands-state",
  1527. "qcom,video-mode-switch-out-commands-state",
  1528. "qcom,cmd-mode-switch-in-commands-state",
  1529. "qcom,cmd-mode-switch-out-commands-state",
  1530. "qcom,mdss-dsi-panel-status-command-state",
  1531. "qcom,mdss-dsi-lp1-command-state",
  1532. "qcom,mdss-dsi-lp2-command-state",
  1533. "qcom,mdss-dsi-nolp-command-state",
  1534. "PPS not parsed from DTSI, generated dynamically",
  1535. "ROI not parsed from DTSI, generated dynamically",
  1536. "qcom,mdss-dsi-timing-switch-command-state",
  1537. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1538. "qcom,mdss-dsi-qsync-on-commands-state",
  1539. "qcom,mdss-dsi-qsync-off-commands-state",
  1540. };
  1541. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1542. {
  1543. const u32 cmd_set_min_size = 7;
  1544. u32 count = 0;
  1545. u32 packet_length;
  1546. u32 tmp;
  1547. while (length >= cmd_set_min_size) {
  1548. packet_length = cmd_set_min_size;
  1549. tmp = ((data[5] << 8) | (data[6]));
  1550. packet_length += tmp;
  1551. if (packet_length > length) {
  1552. DSI_ERR("format error\n");
  1553. return -EINVAL;
  1554. }
  1555. length -= packet_length;
  1556. data += packet_length;
  1557. count++;
  1558. }
  1559. *cnt = count;
  1560. return 0;
  1561. }
  1562. int dsi_panel_create_cmd_packets(const char *data,
  1563. u32 length,
  1564. u32 count,
  1565. struct dsi_cmd_desc *cmd)
  1566. {
  1567. int rc = 0;
  1568. int i, j;
  1569. u8 *payload;
  1570. for (i = 0; i < count; i++) {
  1571. u32 size;
  1572. cmd[i].msg.type = data[0];
  1573. cmd[i].msg.channel = data[2];
  1574. cmd[i].msg.flags |= data[3];
  1575. cmd[i].ctrl = 0;
  1576. cmd[i].post_wait_ms = data[4];
  1577. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1578. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1579. cmd[i].last_command = false;
  1580. else
  1581. cmd[i].last_command = true;
  1582. size = cmd[i].msg.tx_len * sizeof(u8);
  1583. payload = kzalloc(size, GFP_KERNEL);
  1584. if (!payload) {
  1585. rc = -ENOMEM;
  1586. goto error_free_payloads;
  1587. }
  1588. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1589. payload[j] = data[7 + j];
  1590. cmd[i].msg.tx_buf = payload;
  1591. data += (7 + cmd[i].msg.tx_len);
  1592. }
  1593. return rc;
  1594. error_free_payloads:
  1595. for (i = i - 1; i >= 0; i--) {
  1596. cmd--;
  1597. kfree(cmd->msg.tx_buf);
  1598. }
  1599. return rc;
  1600. }
  1601. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1602. {
  1603. u32 i = 0;
  1604. struct dsi_cmd_desc *cmd;
  1605. for (i = 0; i < set->count; i++) {
  1606. cmd = &set->cmds[i];
  1607. kfree(cmd->msg.tx_buf);
  1608. }
  1609. }
  1610. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1611. {
  1612. kfree(set->cmds);
  1613. }
  1614. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1615. u32 packet_count)
  1616. {
  1617. u32 size;
  1618. size = packet_count * sizeof(*cmd->cmds);
  1619. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1620. if (!cmd->cmds)
  1621. return -ENOMEM;
  1622. cmd->count = packet_count;
  1623. return 0;
  1624. }
  1625. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1626. enum dsi_cmd_set_type type,
  1627. struct dsi_parser_utils *utils)
  1628. {
  1629. int rc = 0;
  1630. u32 length = 0;
  1631. const char *data;
  1632. const char *state;
  1633. u32 packet_count = 0;
  1634. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1635. &length);
  1636. if (!data) {
  1637. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1638. rc = -ENOTSUPP;
  1639. goto error;
  1640. }
  1641. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1642. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1643. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1644. if (rc) {
  1645. DSI_ERR("commands failed, rc=%d\n", rc);
  1646. goto error;
  1647. }
  1648. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1649. packet_count, length);
  1650. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1651. if (rc) {
  1652. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1653. goto error;
  1654. }
  1655. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1656. cmd->cmds);
  1657. if (rc) {
  1658. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1659. goto error_free_mem;
  1660. }
  1661. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1662. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1663. cmd->state = DSI_CMD_SET_STATE_LP;
  1664. } else if (!strcmp(state, "dsi_hs_mode")) {
  1665. cmd->state = DSI_CMD_SET_STATE_HS;
  1666. } else {
  1667. DSI_ERR("[%s] command state unrecognized-%s\n",
  1668. cmd_set_state_map[type], state);
  1669. goto error_free_mem;
  1670. }
  1671. return rc;
  1672. error_free_mem:
  1673. kfree(cmd->cmds);
  1674. cmd->cmds = NULL;
  1675. error:
  1676. return rc;
  1677. }
  1678. static int dsi_panel_parse_cmd_sets(
  1679. struct dsi_display_mode_priv_info *priv_info,
  1680. struct dsi_parser_utils *utils)
  1681. {
  1682. int rc = 0;
  1683. struct dsi_panel_cmd_set *set;
  1684. u32 i;
  1685. if (!priv_info) {
  1686. DSI_ERR("invalid mode priv info\n");
  1687. return -EINVAL;
  1688. }
  1689. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1690. set = &priv_info->cmd_sets[i];
  1691. set->type = i;
  1692. set->count = 0;
  1693. if (i == DSI_CMD_SET_PPS) {
  1694. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1695. if (rc)
  1696. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1697. i, rc);
  1698. set->state = DSI_CMD_SET_STATE_LP;
  1699. } else {
  1700. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1701. if (rc)
  1702. DSI_DEBUG("failed to parse set %d\n", i);
  1703. }
  1704. }
  1705. rc = 0;
  1706. return rc;
  1707. }
  1708. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1709. {
  1710. int rc = 0;
  1711. int i;
  1712. u32 length = 0;
  1713. u32 count = 0;
  1714. u32 size = 0;
  1715. u32 *arr_32 = NULL;
  1716. const u32 *arr;
  1717. struct dsi_parser_utils *utils = &panel->utils;
  1718. struct dsi_reset_seq *seq;
  1719. if (panel->host_config.ext_bridge_mode)
  1720. return 0;
  1721. arr = utils->get_property(utils->data,
  1722. "qcom,mdss-dsi-reset-sequence", &length);
  1723. if (!arr) {
  1724. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1725. rc = -EINVAL;
  1726. goto error;
  1727. }
  1728. if (length & 0x1) {
  1729. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1730. panel->name);
  1731. rc = -EINVAL;
  1732. goto error;
  1733. }
  1734. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1735. length = length / sizeof(u32);
  1736. size = length * sizeof(u32);
  1737. arr_32 = kzalloc(size, GFP_KERNEL);
  1738. if (!arr_32) {
  1739. rc = -ENOMEM;
  1740. goto error;
  1741. }
  1742. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1743. arr_32, length);
  1744. if (rc) {
  1745. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1746. goto error_free_arr_32;
  1747. }
  1748. count = length / 2;
  1749. size = count * sizeof(*seq);
  1750. seq = kzalloc(size, GFP_KERNEL);
  1751. if (!seq) {
  1752. rc = -ENOMEM;
  1753. goto error_free_arr_32;
  1754. }
  1755. panel->reset_config.sequence = seq;
  1756. panel->reset_config.count = count;
  1757. for (i = 0; i < length; i += 2) {
  1758. seq->level = arr_32[i];
  1759. seq->sleep_ms = arr_32[i + 1];
  1760. seq++;
  1761. }
  1762. error_free_arr_32:
  1763. kfree(arr_32);
  1764. error:
  1765. return rc;
  1766. }
  1767. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1768. {
  1769. struct dsi_parser_utils *utils = &panel->utils;
  1770. const char *string;
  1771. int i, rc = 0;
  1772. panel->ulps_feature_enabled =
  1773. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1774. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1775. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1776. panel->ulps_suspend_enabled =
  1777. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1778. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1779. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1780. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1781. "qcom,mdss-dsi-te-using-wd");
  1782. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1783. "qcom,cmd-sync-wait-broadcast");
  1784. panel->lp11_init = utils->read_bool(utils->data,
  1785. "qcom,mdss-dsi-lp11-init");
  1786. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1787. "qcom,platform-reset-gpio-always-on");
  1788. panel->spr_info.enable = false;
  1789. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1790. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1791. if (!rc) {
  1792. // find match for pack-type string
  1793. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1794. if (msm_spr_pack_type_str[i] &&
  1795. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1796. panel->spr_info.enable = true;
  1797. panel->spr_info.pack_type = i;
  1798. break;
  1799. }
  1800. }
  1801. }
  1802. pr_debug("%s source side spr packing, pack-type %s\n",
  1803. panel->spr_info.enable ? "enable" : "disable",
  1804. panel->spr_info.enable ?
  1805. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1806. return 0;
  1807. }
  1808. static int dsi_panel_parse_jitter_config(
  1809. struct dsi_display_mode *mode,
  1810. struct dsi_parser_utils *utils)
  1811. {
  1812. int rc;
  1813. struct dsi_display_mode_priv_info *priv_info;
  1814. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1815. u64 jitter_val = 0;
  1816. priv_info = mode->priv_info;
  1817. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1818. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1819. if (rc) {
  1820. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1821. } else {
  1822. jitter_val = jitter[0];
  1823. jitter_val = div_u64(jitter_val, jitter[1]);
  1824. }
  1825. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1826. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1827. priv_info->panel_jitter_denom =
  1828. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1829. } else {
  1830. priv_info->panel_jitter_numer = jitter[0];
  1831. priv_info->panel_jitter_denom = jitter[1];
  1832. }
  1833. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1834. &priv_info->panel_prefill_lines);
  1835. if (rc) {
  1836. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1837. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1838. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1839. } else if (priv_info->panel_prefill_lines >=
  1840. DSI_V_TOTAL(&mode->timing)) {
  1841. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1842. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1843. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1844. }
  1845. return 0;
  1846. }
  1847. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1848. {
  1849. int rc = 0;
  1850. char *supply_name;
  1851. if (panel->host_config.ext_bridge_mode)
  1852. return 0;
  1853. if (!strcmp(panel->type, "primary"))
  1854. supply_name = "qcom,panel-supply-entries";
  1855. else
  1856. supply_name = "qcom,panel-sec-supply-entries";
  1857. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1858. &panel->power_info, supply_name);
  1859. if (rc) {
  1860. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1861. goto error;
  1862. }
  1863. error:
  1864. return rc;
  1865. }
  1866. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1867. struct msm_io_res *io_res)
  1868. {
  1869. struct dsi_parser_utils *utils = &panel->utils;
  1870. struct list_head *mem_list = &io_res->mem;
  1871. int reset_gpio;
  1872. int rc = 0;
  1873. reset_gpio = utils->get_named_gpio(utils->data,
  1874. "qcom,platform-reset-gpio", 0);
  1875. if (gpio_is_valid(reset_gpio)) {
  1876. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1877. if (rc) {
  1878. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1879. goto end;
  1880. }
  1881. }
  1882. end:
  1883. return rc;
  1884. }
  1885. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1886. {
  1887. int rc = 0;
  1888. const char *data;
  1889. struct dsi_parser_utils *utils = &panel->utils;
  1890. char *reset_gpio_name, *mode_set_gpio_name;
  1891. if (!strcmp(panel->type, "primary")) {
  1892. reset_gpio_name = "qcom,platform-reset-gpio";
  1893. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1894. } else {
  1895. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1896. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1897. }
  1898. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1899. reset_gpio_name, 0);
  1900. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1901. !panel->host_config.ext_bridge_mode) {
  1902. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1903. panel->reset_config.reset_gpio);
  1904. }
  1905. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1906. "qcom,5v-boost-gpio",
  1907. 0);
  1908. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1909. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1910. panel->name, rc);
  1911. panel->reset_config.disp_en_gpio =
  1912. utils->get_named_gpio(utils->data,
  1913. "qcom,platform-en-gpio", 0);
  1914. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1915. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1916. panel->name, rc);
  1917. }
  1918. }
  1919. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1920. utils->data, mode_set_gpio_name, 0);
  1921. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1922. DSI_DEBUG("mode gpio not specified\n");
  1923. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1924. data = utils->get_property(utils->data,
  1925. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1926. if (data) {
  1927. if (!strcmp(data, "single_port"))
  1928. panel->reset_config.mode_sel_state =
  1929. MODE_SEL_SINGLE_PORT;
  1930. else if (!strcmp(data, "dual_port"))
  1931. panel->reset_config.mode_sel_state =
  1932. MODE_SEL_DUAL_PORT;
  1933. else if (!strcmp(data, "high"))
  1934. panel->reset_config.mode_sel_state =
  1935. MODE_GPIO_HIGH;
  1936. else if (!strcmp(data, "low"))
  1937. panel->reset_config.mode_sel_state =
  1938. MODE_GPIO_LOW;
  1939. } else {
  1940. /* Set default mode as SPLIT mode */
  1941. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1942. }
  1943. /* TODO: release memory */
  1944. rc = dsi_panel_parse_reset_sequence(panel);
  1945. if (rc) {
  1946. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1947. panel->name, rc);
  1948. goto error;
  1949. }
  1950. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1951. "qcom,mdss-dsi-panel-test-pin",
  1952. 0);
  1953. if (!gpio_is_valid(panel->panel_test_gpio))
  1954. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1955. __LINE__);
  1956. error:
  1957. return rc;
  1958. }
  1959. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1960. {
  1961. int rc = 0;
  1962. u32 val;
  1963. struct dsi_backlight_config *config = &panel->bl_config;
  1964. struct dsi_parser_utils *utils = &panel->utils;
  1965. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1966. &val);
  1967. if (rc) {
  1968. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1969. goto error;
  1970. }
  1971. config->pwm_period_usecs = val;
  1972. error:
  1973. return rc;
  1974. }
  1975. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1976. {
  1977. int rc = 0;
  1978. u32 val = 0;
  1979. const char *bl_type = NULL;
  1980. const char *data = NULL;
  1981. const char *state = NULL;
  1982. struct dsi_parser_utils *utils = &panel->utils;
  1983. char *bl_name = NULL;
  1984. if (!strcmp(panel->type, "primary"))
  1985. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1986. else
  1987. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1988. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1989. if (!bl_type) {
  1990. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1991. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1992. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1993. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1994. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1995. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1996. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1997. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1998. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1999. } else {
  2000. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2001. panel->name, bl_type);
  2002. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2003. }
  2004. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2005. if (!data) {
  2006. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2007. } else if (!strcmp(data, "delay_until_first_frame")) {
  2008. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2009. } else {
  2010. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2011. panel->name, data);
  2012. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2013. }
  2014. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2015. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2016. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2017. if (rc) {
  2018. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2019. panel->name);
  2020. panel->bl_config.bl_min_level = 0;
  2021. } else {
  2022. panel->bl_config.bl_min_level = val;
  2023. }
  2024. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2025. if (rc) {
  2026. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2027. panel->name);
  2028. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2029. } else {
  2030. panel->bl_config.bl_max_level = val;
  2031. }
  2032. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2033. &val);
  2034. if (rc) {
  2035. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2036. panel->name);
  2037. panel->bl_config.brightness_max_level = 255;
  2038. rc = 0;
  2039. } else {
  2040. panel->bl_config.brightness_max_level = val;
  2041. }
  2042. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2043. "qcom,mdss-dsi-bl-inverted-dbv");
  2044. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2045. if (!state || !strcmp(state, "dsi_hs_mode"))
  2046. panel->bl_config.lp_mode = false;
  2047. else if (!strcmp(state, "dsi_lp_mode"))
  2048. panel->bl_config.lp_mode = true;
  2049. else
  2050. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2051. state);
  2052. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2053. rc = dsi_panel_parse_bl_pwm_config(panel);
  2054. if (rc) {
  2055. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2056. panel->name, rc);
  2057. goto error;
  2058. }
  2059. }
  2060. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2061. "qcom,platform-bklight-en-gpio",
  2062. 0);
  2063. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2064. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2065. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2066. panel->name, rc);
  2067. rc = -EPROBE_DEFER;
  2068. goto error;
  2069. } else {
  2070. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2071. panel->name, rc);
  2072. rc = 0;
  2073. goto error;
  2074. }
  2075. }
  2076. error:
  2077. return rc;
  2078. }
  2079. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2080. struct dsi_parser_utils *utils)
  2081. {
  2082. const char *data;
  2083. u32 len, i;
  2084. int rc = 0;
  2085. struct dsi_display_mode_priv_info *priv_info;
  2086. u64 pixel_clk_khz;
  2087. if (!mode || !mode->priv_info)
  2088. return -EINVAL;
  2089. priv_info = mode->priv_info;
  2090. data = utils->get_property(utils->data,
  2091. "qcom,mdss-dsi-panel-phy-timings", &len);
  2092. if (!data) {
  2093. DSI_DEBUG("Unable to read Phy timing settings\n");
  2094. } else {
  2095. priv_info->phy_timing_val =
  2096. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2097. if (!priv_info->phy_timing_val)
  2098. return -EINVAL;
  2099. for (i = 0; i < len; i++)
  2100. priv_info->phy_timing_val[i] = data[i];
  2101. priv_info->phy_timing_len = len;
  2102. }
  2103. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2104. /*
  2105. * For command mode we update the pclk as part of
  2106. * function dsi_panel_calc_dsi_transfer_time( )
  2107. * as we set it based on dsi clock or mdp transfer time.
  2108. */
  2109. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2110. DSI_V_TOTAL(&mode->timing) *
  2111. mode->timing.refresh_rate);
  2112. do_div(pixel_clk_khz, 1000);
  2113. mode->pixel_clk_khz = pixel_clk_khz;
  2114. }
  2115. return rc;
  2116. }
  2117. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2118. struct dsi_parser_utils *utils)
  2119. {
  2120. u32 data;
  2121. int rc = -EINVAL;
  2122. int intf_width;
  2123. const char *compression;
  2124. struct dsi_display_mode_priv_info *priv_info;
  2125. if (!mode || !mode->priv_info)
  2126. return -EINVAL;
  2127. priv_info = mode->priv_info;
  2128. priv_info->dsc_enabled = false;
  2129. compression = utils->get_property(utils->data,
  2130. "qcom,compression-mode", NULL);
  2131. if (compression && !strcmp(compression, "dsc"))
  2132. priv_info->dsc_enabled = true;
  2133. if (!priv_info->dsc_enabled) {
  2134. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2135. return 0;
  2136. }
  2137. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2138. if (rc) {
  2139. priv_info->dsc.config.dsc_version_major = 0x1;
  2140. priv_info->dsc.config.dsc_version_minor = 0x1;
  2141. rc = 0;
  2142. } else {
  2143. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2144. * major version information
  2145. */
  2146. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2147. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2148. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2149. ((priv_info->dsc.config.dsc_version_minor
  2150. != 0x1) &&
  2151. (priv_info->dsc.config.dsc_version_minor
  2152. != 0x2))) {
  2153. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2154. __func__,
  2155. priv_info->dsc.config.dsc_version_major,
  2156. priv_info->dsc.config.dsc_version_minor
  2157. );
  2158. rc = -EINVAL;
  2159. goto error;
  2160. }
  2161. }
  2162. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2163. if (rc) {
  2164. priv_info->dsc.scr_rev = 0x0;
  2165. rc = 0;
  2166. } else {
  2167. priv_info->dsc.scr_rev = data & 0xff;
  2168. /* only one scr rev supported */
  2169. if (priv_info->dsc.scr_rev > 0x1) {
  2170. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2171. __func__, priv_info->dsc.scr_rev);
  2172. rc = -EINVAL;
  2173. goto error;
  2174. }
  2175. }
  2176. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2177. if (rc) {
  2178. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2179. goto error;
  2180. }
  2181. priv_info->dsc.config.slice_height = data;
  2182. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2183. if (rc) {
  2184. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2185. goto error;
  2186. }
  2187. priv_info->dsc.config.slice_width = data;
  2188. intf_width = mode->timing.h_active;
  2189. if (intf_width % priv_info->dsc.config.slice_width) {
  2190. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2191. intf_width, priv_info->dsc.config.slice_width);
  2192. rc = -EINVAL;
  2193. goto error;
  2194. }
  2195. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2196. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2197. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2198. if (rc) {
  2199. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2200. goto error;
  2201. } else if (!data || (data > 2)) {
  2202. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2203. goto error;
  2204. }
  2205. priv_info->dsc.slice_per_pkt = data;
  2206. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2207. &data);
  2208. if (rc) {
  2209. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2210. goto error;
  2211. }
  2212. priv_info->dsc.config.bits_per_component = data;
  2213. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2214. if (rc) {
  2215. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2216. data = 0;
  2217. }
  2218. priv_info->dsc.pps_delay_ms = data;
  2219. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2220. &data);
  2221. if (rc) {
  2222. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2223. goto error;
  2224. }
  2225. priv_info->dsc.config.bits_per_pixel = data << 4;
  2226. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2227. &data);
  2228. if (rc) {
  2229. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2230. rc = 0;
  2231. data = MSM_CHROMA_444;
  2232. }
  2233. priv_info->dsc.chroma_format = data;
  2234. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2235. &data);
  2236. if (rc) {
  2237. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2238. rc = 0;
  2239. data = MSM_RGB;
  2240. }
  2241. priv_info->dsc.source_color_space = data;
  2242. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2243. "qcom,mdss-dsc-block-prediction-enable");
  2244. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2245. priv_info->dsc.config.slice_width);
  2246. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2247. priv_info->dsc.scr_rev);
  2248. if (rc) {
  2249. DSI_DEBUG("failed populating dsc params\n");
  2250. rc = -EINVAL;
  2251. goto error;
  2252. }
  2253. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2254. if (rc) {
  2255. DSI_DEBUG("failed populating other dsc params\n");
  2256. rc = -EINVAL;
  2257. goto error;
  2258. }
  2259. priv_info->pclk_scale.numer =
  2260. priv_info->dsc.config.bits_per_pixel >> 4;
  2261. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2262. priv_info->dsc.chroma_format,
  2263. priv_info->dsc.config.bits_per_component);
  2264. mode->timing.dsc_enabled = true;
  2265. mode->timing.dsc = &priv_info->dsc;
  2266. mode->timing.pclk_scale = priv_info->pclk_scale;
  2267. error:
  2268. return rc;
  2269. }
  2270. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2271. struct dsi_parser_utils *utils, int traffic_mode)
  2272. {
  2273. u32 data;
  2274. int rc = -EINVAL;
  2275. const char *compression;
  2276. struct dsi_display_mode_priv_info *priv_info;
  2277. int intf_width;
  2278. if (!mode || !mode->priv_info)
  2279. return -EINVAL;
  2280. priv_info = mode->priv_info;
  2281. priv_info->vdc_enabled = false;
  2282. compression = utils->get_property(utils->data,
  2283. "qcom,compression-mode", NULL);
  2284. if (compression && !strcmp(compression, "vdc"))
  2285. priv_info->vdc_enabled = true;
  2286. if (!priv_info->vdc_enabled) {
  2287. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2288. return 0;
  2289. }
  2290. priv_info->vdc.traffic_mode = traffic_mode;
  2291. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2292. if (rc) {
  2293. priv_info->vdc.version_major = 0x1;
  2294. priv_info->vdc.version_minor = 0x2;
  2295. priv_info->vdc.version_release = 0x0;
  2296. rc = 0;
  2297. } else {
  2298. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2299. * major version information
  2300. */
  2301. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2302. priv_info->vdc.version_minor = data & 0x0F;
  2303. if ((priv_info->vdc.version_major != 0x1) &&
  2304. ((priv_info->vdc.version_minor
  2305. != 0x2))) {
  2306. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2307. __func__,
  2308. priv_info->vdc.version_major,
  2309. priv_info->vdc.version_minor
  2310. );
  2311. rc = -EINVAL;
  2312. goto error;
  2313. }
  2314. }
  2315. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2316. if (rc) {
  2317. priv_info->vdc.version_release = 0x0;
  2318. rc = 0;
  2319. } else {
  2320. priv_info->vdc.version_release = data & 0xff;
  2321. /* only one release version is supported */
  2322. if (priv_info->vdc.version_release != 0x0) {
  2323. DSI_ERR("unsupported vdc release version %d\n",
  2324. priv_info->vdc.version_release);
  2325. rc = -EINVAL;
  2326. goto error;
  2327. }
  2328. }
  2329. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2330. priv_info->vdc.version_major,
  2331. priv_info->vdc.version_minor,
  2332. priv_info->vdc.version_release);
  2333. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2334. if (rc) {
  2335. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2336. goto error;
  2337. }
  2338. priv_info->vdc.slice_height = data;
  2339. /* slice height should be atleast 16 lines */
  2340. if (priv_info->vdc.slice_height < 16) {
  2341. DSI_ERR("invalid slice height %d\n",
  2342. priv_info->vdc.slice_height);
  2343. rc = -EINVAL;
  2344. goto error;
  2345. }
  2346. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2347. if (rc) {
  2348. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2349. goto error;
  2350. }
  2351. priv_info->vdc.slice_width = data;
  2352. /*
  2353. * slide-width should be multiple of 8
  2354. * slice-width should be atlease 64 pixels
  2355. */
  2356. if ((priv_info->vdc.slice_width & 7) ||
  2357. (priv_info->vdc.slice_width < 64)) {
  2358. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2359. rc = -EINVAL;
  2360. goto error;
  2361. }
  2362. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2363. if (rc) {
  2364. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2365. goto error;
  2366. } else if (!data || (data > 2)) {
  2367. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2368. rc = -EINVAL;
  2369. goto error;
  2370. }
  2371. intf_width = mode->timing.h_active;
  2372. priv_info->vdc.slice_per_pkt = data;
  2373. priv_info->vdc.frame_width = mode->timing.h_active;
  2374. priv_info->vdc.frame_height = mode->timing.v_active;
  2375. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2376. &data);
  2377. if (rc) {
  2378. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2379. goto error;
  2380. }
  2381. priv_info->vdc.bits_per_component = data;
  2382. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2383. if (rc) {
  2384. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2385. data = 0;
  2386. }
  2387. priv_info->vdc.pps_delay_ms = data;
  2388. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2389. &data);
  2390. if (rc) {
  2391. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2392. goto error;
  2393. }
  2394. priv_info->vdc.bits_per_pixel = data << 4;
  2395. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2396. &data);
  2397. if (rc) {
  2398. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2399. rc = 0;
  2400. data = MSM_CHROMA_444;
  2401. }
  2402. priv_info->vdc.chroma_format = data;
  2403. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2404. &data);
  2405. if (rc) {
  2406. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2407. rc = 0;
  2408. data = MSM_RGB;
  2409. }
  2410. priv_info->vdc.source_color_space = data;
  2411. rc = sde_vdc_populate_config(&priv_info->vdc,
  2412. intf_width, traffic_mode);
  2413. if (rc) {
  2414. DSI_DEBUG("failed populating vdc config\n");
  2415. rc = -EINVAL;
  2416. goto error;
  2417. }
  2418. priv_info->pclk_scale.numer =
  2419. priv_info->vdc.bits_per_pixel >> 4;
  2420. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2421. priv_info->vdc.chroma_format,
  2422. priv_info->vdc.bits_per_component);
  2423. mode->timing.vdc_enabled = true;
  2424. mode->timing.vdc = &priv_info->vdc;
  2425. mode->timing.pclk_scale = priv_info->pclk_scale;
  2426. error:
  2427. return rc;
  2428. }
  2429. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2430. {
  2431. int rc = 0;
  2432. struct drm_panel_hdr_properties *hdr_prop;
  2433. struct dsi_parser_utils *utils = &panel->utils;
  2434. hdr_prop = &panel->hdr_props;
  2435. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2436. "qcom,mdss-dsi-panel-hdr-enabled");
  2437. if (hdr_prop->hdr_enabled) {
  2438. rc = utils->read_u32_array(utils->data,
  2439. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2440. hdr_prop->display_primaries,
  2441. DISPLAY_PRIMARIES_MAX);
  2442. if (rc) {
  2443. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2444. __func__, __LINE__, rc);
  2445. hdr_prop->hdr_enabled = false;
  2446. return rc;
  2447. }
  2448. rc = utils->read_u32(utils->data,
  2449. "qcom,mdss-dsi-panel-peak-brightness",
  2450. &(hdr_prop->peak_brightness));
  2451. if (rc) {
  2452. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2453. __func__, __LINE__, rc);
  2454. hdr_prop->hdr_enabled = false;
  2455. return rc;
  2456. }
  2457. rc = utils->read_u32(utils->data,
  2458. "qcom,mdss-dsi-panel-blackness-level",
  2459. &(hdr_prop->blackness_level));
  2460. if (rc) {
  2461. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2462. __func__, __LINE__, rc);
  2463. hdr_prop->hdr_enabled = false;
  2464. return rc;
  2465. }
  2466. }
  2467. return 0;
  2468. }
  2469. static int dsi_panel_parse_topology(
  2470. struct dsi_display_mode_priv_info *priv_info,
  2471. struct dsi_parser_utils *utils,
  2472. int topology_override)
  2473. {
  2474. struct msm_display_topology *topology;
  2475. u32 top_count, top_sel, *array = NULL;
  2476. int i, len = 0;
  2477. int rc = -EINVAL;
  2478. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2479. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2480. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2481. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2482. return rc;
  2483. }
  2484. top_count = len / TOPOLOGY_SET_LEN;
  2485. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2486. if (!array)
  2487. return -ENOMEM;
  2488. rc = utils->read_u32_array(utils->data,
  2489. "qcom,display-topology", array, len);
  2490. if (rc) {
  2491. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2492. goto read_fail;
  2493. }
  2494. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2495. if (!topology) {
  2496. rc = -ENOMEM;
  2497. goto read_fail;
  2498. }
  2499. for (i = 0; i < top_count; i++) {
  2500. struct msm_display_topology *top = &topology[i];
  2501. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2502. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2503. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2504. }
  2505. if (topology_override >= 0 && topology_override < top_count) {
  2506. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2507. topology_override,
  2508. topology[topology_override].num_lm,
  2509. topology[topology_override].num_enc,
  2510. topology[topology_override].num_intf);
  2511. top_sel = topology_override;
  2512. goto parse_done;
  2513. }
  2514. rc = utils->read_u32(utils->data,
  2515. "qcom,default-topology-index", &top_sel);
  2516. if (rc) {
  2517. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2518. goto parse_fail;
  2519. }
  2520. if (top_sel >= top_count) {
  2521. rc = -EINVAL;
  2522. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2523. rc);
  2524. goto parse_fail;
  2525. }
  2526. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2527. !topology[top_sel].num_enc) {
  2528. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2529. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2530. topology[top_sel].num_enc);
  2531. goto parse_fail;
  2532. }
  2533. if (priv_info->dsc_enabled)
  2534. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2535. else if (priv_info->vdc_enabled)
  2536. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2537. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2538. topology[top_sel].num_lm,
  2539. topology[top_sel].num_enc,
  2540. topology[top_sel].num_intf);
  2541. parse_done:
  2542. memcpy(&priv_info->topology, &topology[top_sel],
  2543. sizeof(struct msm_display_topology));
  2544. parse_fail:
  2545. kfree(topology);
  2546. read_fail:
  2547. kfree(array);
  2548. return rc;
  2549. }
  2550. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2551. struct msm_roi_alignment *align)
  2552. {
  2553. int len = 0, rc = 0;
  2554. u32 value[6];
  2555. struct property *data;
  2556. if (!align)
  2557. return -EINVAL;
  2558. memset(align, 0, sizeof(*align));
  2559. data = utils->find_property(utils->data,
  2560. "qcom,panel-roi-alignment", &len);
  2561. len /= sizeof(u32);
  2562. if (!data) {
  2563. DSI_ERR("panel roi alignment not found\n");
  2564. rc = -EINVAL;
  2565. } else if (len != 6) {
  2566. DSI_ERR("incorrect roi alignment len %d\n", len);
  2567. rc = -EINVAL;
  2568. } else {
  2569. rc = utils->read_u32_array(utils->data,
  2570. "qcom,panel-roi-alignment", value, len);
  2571. if (rc)
  2572. DSI_DEBUG("error reading panel roi alignment values\n");
  2573. else {
  2574. align->xstart_pix_align = value[0];
  2575. align->ystart_pix_align = value[1];
  2576. align->width_pix_align = value[2];
  2577. align->height_pix_align = value[3];
  2578. align->min_width = value[4];
  2579. align->min_height = value[5];
  2580. }
  2581. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2582. align->xstart_pix_align,
  2583. align->width_pix_align,
  2584. align->ystart_pix_align,
  2585. align->height_pix_align,
  2586. align->min_width,
  2587. align->min_height);
  2588. }
  2589. return rc;
  2590. }
  2591. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2592. struct dsi_parser_utils *utils)
  2593. {
  2594. struct msm_roi_caps *roi_caps = NULL;
  2595. const char *data;
  2596. int rc = 0;
  2597. if (!mode || !mode->priv_info) {
  2598. DSI_ERR("invalid arguments\n");
  2599. return -EINVAL;
  2600. }
  2601. roi_caps = &mode->priv_info->roi_caps;
  2602. memset(roi_caps, 0, sizeof(*roi_caps));
  2603. data = utils->get_property(utils->data,
  2604. "qcom,partial-update-enabled", NULL);
  2605. if (data) {
  2606. if (!strcmp(data, "dual_roi"))
  2607. roi_caps->num_roi = 2;
  2608. else if (!strcmp(data, "single_roi"))
  2609. roi_caps->num_roi = 1;
  2610. else {
  2611. DSI_INFO(
  2612. "invalid value for qcom,partial-update-enabled: %s\n",
  2613. data);
  2614. return 0;
  2615. }
  2616. } else {
  2617. DSI_DEBUG("partial update disabled as the property is not set\n");
  2618. return 0;
  2619. }
  2620. roi_caps->merge_rois = utils->read_bool(utils->data,
  2621. "qcom,partial-update-roi-merge");
  2622. roi_caps->enabled = roi_caps->num_roi > 0;
  2623. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2624. roi_caps->enabled);
  2625. if (roi_caps->enabled)
  2626. rc = dsi_panel_parse_roi_alignment(utils,
  2627. &roi_caps->align);
  2628. if (rc)
  2629. memset(roi_caps, 0, sizeof(*roi_caps));
  2630. return rc;
  2631. }
  2632. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2633. struct dsi_parser_utils *utils)
  2634. {
  2635. if (!mode || !mode->priv_info) {
  2636. DSI_ERR("invalid arguments\n");
  2637. return false;
  2638. }
  2639. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2640. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2641. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2642. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2643. if (!mode->panel_mode_caps)
  2644. return false;
  2645. return true;
  2646. };
  2647. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2648. {
  2649. int dms_enabled;
  2650. const char *data;
  2651. struct dsi_parser_utils *utils = &panel->utils;
  2652. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2653. dms_enabled = utils->read_bool(utils->data,
  2654. "qcom,dynamic-mode-switch-enabled");
  2655. if (!dms_enabled)
  2656. return 0;
  2657. data = utils->get_property(utils->data,
  2658. "qcom,dynamic-mode-switch-type", NULL);
  2659. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2660. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2661. } else {
  2662. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2663. panel->name, data);
  2664. return -EINVAL;
  2665. }
  2666. return 0;
  2667. };
  2668. /*
  2669. * The length of all the valid values to be checked should not be greater
  2670. * than the length of returned data from read command.
  2671. */
  2672. static bool
  2673. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2674. {
  2675. int i;
  2676. struct drm_panel_esd_config *config = &panel->esd_config;
  2677. for (i = 0; i < count; ++i) {
  2678. if (config->status_valid_params[i] >
  2679. config->status_cmds_rlen[i]) {
  2680. DSI_DEBUG("ignore valid params\n");
  2681. return false;
  2682. }
  2683. }
  2684. return true;
  2685. }
  2686. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2687. char *prop_key, u32 **target, u32 cmd_cnt)
  2688. {
  2689. int tmp;
  2690. if (!utils->find_property(utils->data, prop_key, &tmp))
  2691. return false;
  2692. tmp /= sizeof(u32);
  2693. if (tmp != cmd_cnt) {
  2694. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2695. tmp, cmd_cnt);
  2696. return false;
  2697. }
  2698. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2699. if (IS_ERR_OR_NULL(*target)) {
  2700. DSI_ERR("Error allocating memory for property\n");
  2701. return false;
  2702. }
  2703. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2704. DSI_ERR("cannot get values from dts\n");
  2705. kfree(*target);
  2706. *target = NULL;
  2707. return false;
  2708. }
  2709. return true;
  2710. }
  2711. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2712. {
  2713. kfree(esd_config->status_buf);
  2714. kfree(esd_config->return_buf);
  2715. kfree(esd_config->status_value);
  2716. kfree(esd_config->status_valid_params);
  2717. kfree(esd_config->status_cmds_rlen);
  2718. kfree(esd_config->status_cmd.cmds);
  2719. }
  2720. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2721. {
  2722. struct drm_panel_esd_config *esd_config;
  2723. int rc = 0;
  2724. u32 tmp;
  2725. u32 i, status_len, *lenp;
  2726. struct property *data;
  2727. struct dsi_parser_utils *utils = &panel->utils;
  2728. if (!panel) {
  2729. DSI_ERR("Invalid Params\n");
  2730. return -EINVAL;
  2731. }
  2732. esd_config = &panel->esd_config;
  2733. if (!esd_config)
  2734. return -EINVAL;
  2735. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2736. DSI_CMD_SET_PANEL_STATUS, utils);
  2737. if (!esd_config->status_cmd.count) {
  2738. DSI_ERR("panel status command parsing failed\n");
  2739. rc = -EINVAL;
  2740. goto error;
  2741. }
  2742. if (!dsi_panel_parse_esd_status_len(utils,
  2743. "qcom,mdss-dsi-panel-status-read-length",
  2744. &panel->esd_config.status_cmds_rlen,
  2745. esd_config->status_cmd.count)) {
  2746. DSI_ERR("Invalid status read length\n");
  2747. rc = -EINVAL;
  2748. goto error1;
  2749. }
  2750. if (dsi_panel_parse_esd_status_len(utils,
  2751. "qcom,mdss-dsi-panel-status-valid-params",
  2752. &panel->esd_config.status_valid_params,
  2753. esd_config->status_cmd.count)) {
  2754. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2755. esd_config->status_cmd.count)) {
  2756. rc = -EINVAL;
  2757. goto error2;
  2758. }
  2759. }
  2760. status_len = 0;
  2761. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2762. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2763. status_len += lenp[i];
  2764. if (!status_len) {
  2765. rc = -EINVAL;
  2766. goto error2;
  2767. }
  2768. /*
  2769. * Some panel may need multiple read commands to properly
  2770. * check panel status. Do a sanity check for proper status
  2771. * value which will be compared with the value read by dsi
  2772. * controller during ESD check. Also check if multiple read
  2773. * commands are there then, there should be corresponding
  2774. * status check values for each read command.
  2775. */
  2776. data = utils->find_property(utils->data,
  2777. "qcom,mdss-dsi-panel-status-value", &tmp);
  2778. tmp /= sizeof(u32);
  2779. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2780. esd_config->groups = tmp / status_len;
  2781. } else {
  2782. DSI_ERR("error parse panel-status-value\n");
  2783. rc = -EINVAL;
  2784. goto error2;
  2785. }
  2786. esd_config->status_value =
  2787. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2788. GFP_KERNEL);
  2789. if (!esd_config->status_value) {
  2790. rc = -ENOMEM;
  2791. goto error2;
  2792. }
  2793. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2794. sizeof(unsigned char), GFP_KERNEL);
  2795. if (!esd_config->return_buf) {
  2796. rc = -ENOMEM;
  2797. goto error3;
  2798. }
  2799. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2800. if (!esd_config->status_buf) {
  2801. rc = -ENOMEM;
  2802. goto error4;
  2803. }
  2804. rc = utils->read_u32_array(utils->data,
  2805. "qcom,mdss-dsi-panel-status-value",
  2806. esd_config->status_value, esd_config->groups * status_len);
  2807. if (rc) {
  2808. DSI_DEBUG("error reading panel status values\n");
  2809. memset(esd_config->status_value, 0,
  2810. esd_config->groups * status_len);
  2811. }
  2812. return 0;
  2813. error4:
  2814. kfree(esd_config->return_buf);
  2815. error3:
  2816. kfree(esd_config->status_value);
  2817. error2:
  2818. kfree(esd_config->status_valid_params);
  2819. kfree(esd_config->status_cmds_rlen);
  2820. error1:
  2821. kfree(esd_config->status_cmd.cmds);
  2822. error:
  2823. return rc;
  2824. }
  2825. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2826. {
  2827. int rc = 0;
  2828. const char *string;
  2829. struct drm_panel_esd_config *esd_config;
  2830. struct dsi_parser_utils *utils = &panel->utils;
  2831. u8 *esd_mode = NULL;
  2832. esd_config = &panel->esd_config;
  2833. esd_config->status_mode = ESD_MODE_MAX;
  2834. esd_config->esd_enabled = utils->read_bool(utils->data,
  2835. "qcom,esd-check-enabled");
  2836. if (!esd_config->esd_enabled)
  2837. return 0;
  2838. rc = utils->read_string(utils->data,
  2839. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2840. if (!rc) {
  2841. if (!strcmp(string, "bta_check")) {
  2842. esd_config->status_mode = ESD_MODE_SW_BTA;
  2843. } else if (!strcmp(string, "reg_read")) {
  2844. esd_config->status_mode = ESD_MODE_REG_READ;
  2845. } else if (!strcmp(string, "te_signal_check")) {
  2846. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2847. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2848. } else {
  2849. DSI_ERR("TE-ESD not valid for video mode\n");
  2850. rc = -EINVAL;
  2851. goto error;
  2852. }
  2853. } else {
  2854. DSI_ERR("No valid panel-status-check-mode string\n");
  2855. rc = -EINVAL;
  2856. goto error;
  2857. }
  2858. } else {
  2859. DSI_DEBUG("status check method not defined!\n");
  2860. rc = -EINVAL;
  2861. goto error;
  2862. }
  2863. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2864. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2865. if (rc) {
  2866. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2867. rc);
  2868. goto error;
  2869. }
  2870. esd_mode = "register_read";
  2871. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2872. esd_mode = "bta_trigger";
  2873. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2874. esd_mode = "te_check";
  2875. }
  2876. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2877. return 0;
  2878. error:
  2879. panel->esd_config.esd_enabled = false;
  2880. return rc;
  2881. }
  2882. static void dsi_panel_update_util(struct dsi_panel *panel,
  2883. struct device_node *parser_node)
  2884. {
  2885. struct dsi_parser_utils *utils = &panel->utils;
  2886. if (parser_node) {
  2887. *utils = *dsi_parser_get_parser_utils();
  2888. utils->data = parser_node;
  2889. DSI_DEBUG("switching to parser APIs\n");
  2890. goto end;
  2891. }
  2892. *utils = *dsi_parser_get_of_utils();
  2893. utils->data = panel->panel_of_node;
  2894. end:
  2895. utils->node = panel->panel_of_node;
  2896. }
  2897. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2898. {
  2899. return 0;
  2900. }
  2901. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2902. {
  2903. if (trusted_vm_env) {
  2904. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2905. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2906. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2907. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2908. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2909. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2910. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2911. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2912. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2913. } else {
  2914. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2915. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2916. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2917. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2918. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2919. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2920. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2921. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2922. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2923. }
  2924. }
  2925. struct dsi_panel *dsi_panel_get(struct device *parent,
  2926. struct device_node *of_node,
  2927. struct device_node *parser_node,
  2928. const char *type,
  2929. int topology_override,
  2930. bool trusted_vm_env)
  2931. {
  2932. struct dsi_panel *panel;
  2933. struct dsi_parser_utils *utils;
  2934. const char *panel_physical_type;
  2935. int rc = 0;
  2936. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2937. if (!panel)
  2938. return ERR_PTR(-ENOMEM);
  2939. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2940. panel->panel_of_node = of_node;
  2941. panel->parent = parent;
  2942. panel->type = type;
  2943. dsi_panel_update_util(panel, parser_node);
  2944. utils = &panel->utils;
  2945. panel->name = utils->get_property(utils->data,
  2946. "qcom,mdss-dsi-panel-name", NULL);
  2947. if (!panel->name)
  2948. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2949. /*
  2950. * Set panel type to LCD as default.
  2951. */
  2952. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2953. panel_physical_type = utils->get_property(utils->data,
  2954. "qcom,mdss-dsi-panel-physical-type", NULL);
  2955. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2956. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2957. rc = dsi_panel_parse_host_config(panel);
  2958. if (rc) {
  2959. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2960. rc);
  2961. goto error;
  2962. }
  2963. rc = dsi_panel_parse_panel_mode(panel);
  2964. if (rc) {
  2965. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2966. rc);
  2967. goto error;
  2968. }
  2969. rc = dsi_panel_parse_dfps_caps(panel);
  2970. if (rc)
  2971. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2972. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2973. if (rc)
  2974. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2975. rc = dsi_panel_parse_avr_caps(panel, of_node);
  2976. if (rc)
  2977. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  2978. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2979. if (rc)
  2980. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2981. rc = dsi_panel_parse_phy_props(panel);
  2982. if (rc) {
  2983. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2984. rc);
  2985. goto error;
  2986. }
  2987. rc = panel->panel_ops.parse_gpios(panel);
  2988. if (rc) {
  2989. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2990. goto error;
  2991. }
  2992. rc = panel->panel_ops.parse_power_cfg(panel);
  2993. if (rc)
  2994. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2995. rc = dsi_panel_parse_bl_config(panel);
  2996. if (rc) {
  2997. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2998. if (rc == -EPROBE_DEFER)
  2999. goto error;
  3000. }
  3001. rc = dsi_panel_parse_misc_features(panel);
  3002. if (rc)
  3003. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3004. rc = dsi_panel_parse_hdr_config(panel);
  3005. if (rc)
  3006. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3007. rc = dsi_panel_get_mode_count(panel);
  3008. if (rc) {
  3009. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3010. goto error;
  3011. }
  3012. rc = dsi_panel_parse_dms_info(panel);
  3013. if (rc)
  3014. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3015. rc = dsi_panel_parse_esd_config(panel);
  3016. if (rc)
  3017. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3018. rc = dsi_panel_vreg_get(panel);
  3019. if (rc) {
  3020. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3021. panel->name, rc);
  3022. goto error;
  3023. }
  3024. panel->power_mode = SDE_MODE_DPMS_OFF;
  3025. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3026. NULL, DRM_MODE_CONNECTOR_DSI);
  3027. panel->mipi_device.dev.of_node = of_node;
  3028. drm_panel_add(&panel->drm_panel);
  3029. mutex_init(&panel->panel_lock);
  3030. return panel;
  3031. error:
  3032. kfree(panel);
  3033. return ERR_PTR(rc);
  3034. }
  3035. void dsi_panel_put(struct dsi_panel *panel)
  3036. {
  3037. drm_panel_remove(&panel->drm_panel);
  3038. /* free resources allocated for ESD check */
  3039. dsi_panel_esd_config_deinit(&panel->esd_config);
  3040. kfree(panel->avr_caps.avr_step_fps_list);
  3041. kfree(panel);
  3042. }
  3043. int dsi_panel_drv_init(struct dsi_panel *panel,
  3044. struct mipi_dsi_host *host)
  3045. {
  3046. int rc = 0;
  3047. struct mipi_dsi_device *dev;
  3048. if (!panel || !host) {
  3049. DSI_ERR("invalid params\n");
  3050. return -EINVAL;
  3051. }
  3052. mutex_lock(&panel->panel_lock);
  3053. dev = &panel->mipi_device;
  3054. dev->host = host;
  3055. /*
  3056. * We dont have device structure since panel is not a device node.
  3057. * When using drm panel framework, the device is probed when the host is
  3058. * create.
  3059. */
  3060. dev->channel = 0;
  3061. dev->lanes = 4;
  3062. panel->host = host;
  3063. rc = panel->panel_ops.pinctrl_init(panel);
  3064. if (rc) {
  3065. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3066. panel->name, rc);
  3067. goto exit;
  3068. }
  3069. rc = panel->panel_ops.gpio_request(panel);
  3070. if (rc) {
  3071. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3072. rc);
  3073. goto error_pinctrl_deinit;
  3074. }
  3075. rc = panel->panel_ops.bl_register(panel);
  3076. if (rc) {
  3077. if (rc != -EPROBE_DEFER)
  3078. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3079. panel->name, rc);
  3080. goto error_gpio_release;
  3081. }
  3082. goto exit;
  3083. error_gpio_release:
  3084. (void)dsi_panel_gpio_release(panel);
  3085. error_pinctrl_deinit:
  3086. (void)dsi_panel_pinctrl_deinit(panel);
  3087. exit:
  3088. mutex_unlock(&panel->panel_lock);
  3089. return rc;
  3090. }
  3091. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3092. {
  3093. int rc = 0;
  3094. if (!panel) {
  3095. DSI_ERR("invalid params\n");
  3096. return -EINVAL;
  3097. }
  3098. mutex_lock(&panel->panel_lock);
  3099. rc = panel->panel_ops.bl_unregister(panel);
  3100. if (rc)
  3101. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3102. panel->name, rc);
  3103. rc = panel->panel_ops.gpio_release(panel);
  3104. if (rc)
  3105. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3106. rc);
  3107. rc = panel->panel_ops.pinctrl_deinit(panel);
  3108. if (rc)
  3109. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3110. rc);
  3111. rc = dsi_panel_vreg_put(panel);
  3112. if (rc)
  3113. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3114. panel->host = NULL;
  3115. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3116. mutex_unlock(&panel->panel_lock);
  3117. return rc;
  3118. }
  3119. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3120. struct dsi_display_mode *mode)
  3121. {
  3122. return 0;
  3123. }
  3124. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3125. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3126. {
  3127. const char *compression;
  3128. u32 *array = NULL, top_count, len, i;
  3129. int rc = -EINVAL;
  3130. bool dsc_enable = false;
  3131. *dsc_count = 0;
  3132. *lm_count = 0;
  3133. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3134. if (compression && !strcmp(compression, "dsc"))
  3135. dsc_enable = true;
  3136. len = utils->count_u32_elems(node, "qcom,display-topology");
  3137. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3138. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3139. return rc;
  3140. top_count = len / TOPOLOGY_SET_LEN;
  3141. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3142. if (!array)
  3143. return -ENOMEM;
  3144. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3145. if (rc) {
  3146. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3147. goto read_fail;
  3148. }
  3149. for (i = 0; i < top_count; i++) {
  3150. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3151. if (dsc_enable)
  3152. *dsc_count = max(*dsc_count,
  3153. array[i * TOPOLOGY_SET_LEN + 1]);
  3154. }
  3155. read_fail:
  3156. kfree(array);
  3157. return 0;
  3158. }
  3159. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3160. {
  3161. const u32 SINGLE_MODE_SUPPORT = 1;
  3162. struct dsi_parser_utils *utils;
  3163. struct device_node *timings_np, *child_np;
  3164. int num_dfps_rates;
  3165. int num_video_modes = 0, num_cmd_modes = 0;
  3166. int count, rc = 0;
  3167. u32 dsc_count = 0, lm_count = 0;
  3168. if (!panel) {
  3169. DSI_ERR("invalid params\n");
  3170. return -EINVAL;
  3171. }
  3172. utils = &panel->utils;
  3173. panel->num_timing_nodes = 0;
  3174. timings_np = utils->get_child_by_name(utils->data,
  3175. "qcom,mdss-dsi-display-timings");
  3176. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3177. DSI_ERR("no display timing nodes defined\n");
  3178. rc = -EINVAL;
  3179. goto error;
  3180. }
  3181. count = utils->get_child_count(timings_np);
  3182. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3183. count > DSI_MODE_MAX) {
  3184. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3185. rc = -EINVAL;
  3186. goto error;
  3187. }
  3188. /* No multiresolution support is available for video mode panels.
  3189. * Multi-mode is supported for video mode during POMS is enabled.
  3190. */
  3191. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3192. !panel->host_config.ext_bridge_mode &&
  3193. !panel->panel_mode_switch_enabled)
  3194. count = SINGLE_MODE_SUPPORT;
  3195. panel->num_timing_nodes = count;
  3196. dsi_for_each_child_node(timings_np, child_np) {
  3197. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3198. num_video_modes++;
  3199. else if (utils->read_bool(child_np,
  3200. "qcom,mdss-dsi-cmd-mode"))
  3201. num_cmd_modes++;
  3202. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3203. num_video_modes++;
  3204. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3205. num_cmd_modes++;
  3206. dsi_panel_get_max_res_count(utils, child_np,
  3207. &dsc_count, &lm_count);
  3208. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3209. panel->lm_count = max(lm_count, panel->lm_count);
  3210. }
  3211. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3212. panel->dfps_caps.dfps_list_len;
  3213. /*
  3214. * Inflate num_of_modes by fps in dfps.
  3215. * Single command mode for video mode panels supporting
  3216. * panel operating mode switch.
  3217. */
  3218. num_video_modes = num_video_modes * num_dfps_rates;
  3219. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3220. (panel->panel_mode_switch_enabled))
  3221. num_cmd_modes = 1;
  3222. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3223. error:
  3224. return rc;
  3225. }
  3226. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3227. struct dsi_panel_phy_props *phy_props)
  3228. {
  3229. int rc = 0;
  3230. if (!panel || !phy_props) {
  3231. DSI_ERR("invalid params\n");
  3232. return -EINVAL;
  3233. }
  3234. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3235. return rc;
  3236. }
  3237. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3238. struct dsi_dfps_capabilities *dfps_caps)
  3239. {
  3240. int rc = 0;
  3241. if (!panel || !dfps_caps) {
  3242. DSI_ERR("invalid params\n");
  3243. return -EINVAL;
  3244. }
  3245. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3246. return rc;
  3247. }
  3248. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3249. {
  3250. int i;
  3251. if (!mode->priv_info)
  3252. return;
  3253. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3254. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3255. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3256. }
  3257. kfree(mode->priv_info);
  3258. }
  3259. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3260. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3261. {
  3262. u32 frame_time_us, nslices;
  3263. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3264. dsi_transfer_time_us, pixel_clk_khz;
  3265. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3266. struct dsi_mode_info *timing = &mode->timing;
  3267. struct dsi_display_mode *display_mode;
  3268. u32 jitter_numer, jitter_denom, prefill_lines;
  3269. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3270. u16 bpp;
  3271. /* Packet overhead in bits,
  3272. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3273. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3274. * 1 byte dcs data command.
  3275. */
  3276. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3277. packet_overhead = 120;
  3278. else
  3279. packet_overhead = 56;
  3280. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3281. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3282. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3283. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3284. if (timing->refresh_rate >= 120)
  3285. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3286. if (timing->dsc_enabled) {
  3287. nslices = (timing->h_active)/(dsc->config.slice_width);
  3288. /* (slice width x bit-per-pixel + packet overhead) x
  3289. * number of slices x height x fps / lane
  3290. */
  3291. bpp = DSC_BPP(dsc->config);
  3292. bits_per_line = ((dsc->config.slice_width * bpp) +
  3293. packet_overhead) * nslices;
  3294. bits_per_line = bits_per_line / (config->num_data_lanes);
  3295. min_bitclk_hz = (bits_per_line * timing->v_active *
  3296. timing->refresh_rate);
  3297. } else {
  3298. total_active_pixels = ((dsi_h_active_dce(timing)
  3299. * timing->v_active));
  3300. /* calculate the actual bitclk needed to transfer the frame */
  3301. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3302. (config->bpp));
  3303. do_div(min_bitclk_hz, config->num_data_lanes);
  3304. }
  3305. timing->min_dsi_clk_hz = min_bitclk_hz;
  3306. /*
  3307. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3308. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3309. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3310. * threshold time are configured to 40us.
  3311. */
  3312. if (mode->priv_info->disable_rsc_solver) {
  3313. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3314. } else {
  3315. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3316. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3317. }
  3318. /*
  3319. * Increase the prefill_lines proportionately as recommended
  3320. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3321. */
  3322. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3323. timing->refresh_rate, 60);
  3324. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3325. (timing->v_active));
  3326. min_threshold_us = min_threshold_us + prefill_time_us;
  3327. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3328. if (timing->clk_rate_hz) {
  3329. /* adjust the transfer time proportionately for bit clk*/
  3330. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3331. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3332. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3333. } else if (mode->priv_info->mdp_transfer_time_us) {
  3334. max_transfer_us = frame_time_us - min_threshold_us;
  3335. mode->priv_info->mdp_transfer_time_us = min(
  3336. mode->priv_info->mdp_transfer_time_us,
  3337. max_transfer_us);
  3338. timing->dsi_transfer_time_us =
  3339. mode->priv_info->mdp_transfer_time_us;
  3340. } else {
  3341. if ((min_threshold_us > frame_threshold_us) ||
  3342. (mode->priv_info->disable_rsc_solver))
  3343. frame_threshold_us = min_threshold_us;
  3344. timing->dsi_transfer_time_us = frame_time_us -
  3345. frame_threshold_us;
  3346. }
  3347. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3348. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3349. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3350. timing->mdp_transfer_time_us =
  3351. mode->priv_info->mdp_transfer_time_us;
  3352. }
  3353. /* Calculate pclk_khz to update modeinfo */
  3354. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3355. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3356. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3357. do_div(pixel_clk_khz, config->bpp);
  3358. display_mode->pixel_clk_khz = pixel_clk_khz;
  3359. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3360. }
  3361. int dsi_panel_get_mode(struct dsi_panel *panel,
  3362. u32 index, struct dsi_display_mode *mode,
  3363. int topology_override)
  3364. {
  3365. struct device_node *timings_np, *child_np;
  3366. struct dsi_parser_utils *utils;
  3367. struct dsi_display_mode_priv_info *prv_info;
  3368. u32 child_idx = 0;
  3369. int rc = 0, num_timings;
  3370. int traffic_mode;
  3371. void *utils_data = NULL;
  3372. if (!panel || !mode) {
  3373. DSI_ERR("invalid params\n");
  3374. return -EINVAL;
  3375. }
  3376. mutex_lock(&panel->panel_lock);
  3377. utils = &panel->utils;
  3378. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3379. if (!mode->priv_info) {
  3380. rc = -ENOMEM;
  3381. goto done;
  3382. }
  3383. prv_info = mode->priv_info;
  3384. timings_np = utils->get_child_by_name(utils->data,
  3385. "qcom,mdss-dsi-display-timings");
  3386. if (!timings_np) {
  3387. DSI_ERR("no display timing nodes defined\n");
  3388. rc = -EINVAL;
  3389. goto parse_fail;
  3390. }
  3391. num_timings = utils->get_child_count(timings_np);
  3392. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3393. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3394. rc = -EINVAL;
  3395. goto parse_fail;
  3396. }
  3397. utils_data = utils->data;
  3398. traffic_mode = panel->video_config.traffic_mode;
  3399. dsi_for_each_child_node(timings_np, child_np) {
  3400. if (index != child_idx++)
  3401. continue;
  3402. utils->data = child_np;
  3403. if (panel->panel_mode_switch_enabled) {
  3404. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3405. mode->panel_mode_caps = panel->panel_mode;
  3406. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3407. child_idx);
  3408. }
  3409. } else {
  3410. mode->panel_mode_caps = panel->panel_mode;
  3411. }
  3412. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3413. if (rc)
  3414. mode->mode_idx = index;
  3415. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3416. if (rc) {
  3417. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3418. goto parse_fail;
  3419. }
  3420. if (panel->dyn_clk_caps.dyn_clk_support) {
  3421. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3422. if (rc)
  3423. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3424. }
  3425. rc = dsi_panel_parse_dsc_params(mode, utils);
  3426. if (rc) {
  3427. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3428. goto parse_fail;
  3429. }
  3430. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3431. if (rc) {
  3432. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3433. goto parse_fail;
  3434. }
  3435. rc = dsi_panel_parse_topology(prv_info, utils,
  3436. topology_override);
  3437. if (rc) {
  3438. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3439. goto parse_fail;
  3440. }
  3441. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3442. if (rc) {
  3443. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3444. goto parse_fail;
  3445. }
  3446. rc = dsi_panel_parse_jitter_config(mode, utils);
  3447. if (rc)
  3448. DSI_ERR(
  3449. "failed to parse panel jitter config, rc=%d\n", rc);
  3450. rc = dsi_panel_parse_phy_timing(mode, utils);
  3451. if (rc) {
  3452. DSI_ERR(
  3453. "failed to parse panel phy timings, rc=%d\n", rc);
  3454. goto parse_fail;
  3455. }
  3456. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3457. if (rc)
  3458. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3459. }
  3460. goto done;
  3461. parse_fail:
  3462. kfree(mode->priv_info);
  3463. mode->priv_info = NULL;
  3464. done:
  3465. utils->data = utils_data;
  3466. mutex_unlock(&panel->panel_lock);
  3467. return rc;
  3468. }
  3469. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3470. struct dsi_display_mode *mode,
  3471. struct dsi_host_config *config)
  3472. {
  3473. int rc = 0;
  3474. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3475. if (!panel || !mode || !config) {
  3476. DSI_ERR("invalid params\n");
  3477. return -EINVAL;
  3478. }
  3479. mutex_lock(&panel->panel_lock);
  3480. config->panel_mode = panel->panel_mode;
  3481. memcpy(&config->common_config, &panel->host_config,
  3482. sizeof(config->common_config));
  3483. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3484. memcpy(&config->u.video_engine, &panel->video_config,
  3485. sizeof(config->u.video_engine));
  3486. } else {
  3487. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3488. sizeof(config->u.cmd_engine));
  3489. }
  3490. memcpy(&config->video_timing, &mode->timing,
  3491. sizeof(config->video_timing));
  3492. config->video_timing.mdp_transfer_time_us =
  3493. mode->priv_info->mdp_transfer_time_us;
  3494. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3495. config->video_timing.dsc = &mode->priv_info->dsc;
  3496. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3497. config->video_timing.vdc = &mode->priv_info->vdc;
  3498. if (dyn_clk_caps->dyn_clk_support)
  3499. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3500. else
  3501. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3502. config->esc_clk_rate_hz = 19200000;
  3503. mutex_unlock(&panel->panel_lock);
  3504. return rc;
  3505. }
  3506. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3507. {
  3508. int rc = 0;
  3509. if (!panel) {
  3510. DSI_ERR("invalid params\n");
  3511. return -EINVAL;
  3512. }
  3513. mutex_lock(&panel->panel_lock);
  3514. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3515. if (panel->lp11_init)
  3516. goto error;
  3517. rc = dsi_panel_power_on(panel);
  3518. if (rc) {
  3519. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3520. goto error;
  3521. }
  3522. error:
  3523. mutex_unlock(&panel->panel_lock);
  3524. return rc;
  3525. }
  3526. int dsi_panel_update_pps(struct dsi_panel *panel)
  3527. {
  3528. int rc = 0;
  3529. struct dsi_panel_cmd_set *set = NULL;
  3530. struct dsi_display_mode_priv_info *priv_info = NULL;
  3531. if (!panel || !panel->cur_mode) {
  3532. DSI_ERR("invalid params\n");
  3533. return -EINVAL;
  3534. }
  3535. mutex_lock(&panel->panel_lock);
  3536. priv_info = panel->cur_mode->priv_info;
  3537. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3538. if (priv_info->dsc_enabled)
  3539. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3540. panel->dce_pps_cmd, 0,
  3541. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3542. else if (priv_info->vdc_enabled)
  3543. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3544. panel->dce_pps_cmd, 0,
  3545. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3546. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3547. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3548. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3549. if (rc) {
  3550. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3551. goto error;
  3552. }
  3553. }
  3554. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3555. if (rc) {
  3556. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3557. panel->name, rc);
  3558. }
  3559. dsi_panel_destroy_cmd_packets(set);
  3560. error:
  3561. mutex_unlock(&panel->panel_lock);
  3562. return rc;
  3563. }
  3564. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3565. {
  3566. int rc = 0;
  3567. if (!panel) {
  3568. DSI_ERR("invalid params\n");
  3569. return -EINVAL;
  3570. }
  3571. mutex_lock(&panel->panel_lock);
  3572. if (!panel->panel_initialized)
  3573. goto exit;
  3574. /*
  3575. * Consider LP1->LP2->LP1.
  3576. * If the panel is already in LP mode, do not need to
  3577. * set the regulator.
  3578. * IBB and AB power mode would be set at the same time
  3579. * in PMIC driver, so we only call ibb setting that is enough.
  3580. */
  3581. if (dsi_panel_is_type_oled(panel) &&
  3582. panel->power_mode != SDE_MODE_DPMS_LP2)
  3583. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3584. "ibb", REGULATOR_MODE_IDLE);
  3585. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3586. if (rc)
  3587. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3588. panel->name, rc);
  3589. exit:
  3590. mutex_unlock(&panel->panel_lock);
  3591. return rc;
  3592. }
  3593. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3594. {
  3595. int rc = 0;
  3596. if (!panel) {
  3597. DSI_ERR("invalid params\n");
  3598. return -EINVAL;
  3599. }
  3600. mutex_lock(&panel->panel_lock);
  3601. if (!panel->panel_initialized)
  3602. goto exit;
  3603. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3604. if (rc)
  3605. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3606. panel->name, rc);
  3607. exit:
  3608. mutex_unlock(&panel->panel_lock);
  3609. return rc;
  3610. }
  3611. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3612. {
  3613. int rc = 0;
  3614. if (!panel) {
  3615. DSI_ERR("invalid params\n");
  3616. return -EINVAL;
  3617. }
  3618. mutex_lock(&panel->panel_lock);
  3619. if (!panel->panel_initialized)
  3620. goto exit;
  3621. /*
  3622. * Consider about LP1->LP2->NOLP.
  3623. */
  3624. if (dsi_panel_is_type_oled(panel) &&
  3625. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3626. panel->power_mode == SDE_MODE_DPMS_LP2))
  3627. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3628. "ibb", REGULATOR_MODE_NORMAL);
  3629. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3630. if (rc)
  3631. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3632. panel->name, rc);
  3633. exit:
  3634. mutex_unlock(&panel->panel_lock);
  3635. return rc;
  3636. }
  3637. int dsi_panel_prepare(struct dsi_panel *panel)
  3638. {
  3639. int rc = 0;
  3640. if (!panel) {
  3641. DSI_ERR("invalid params\n");
  3642. return -EINVAL;
  3643. }
  3644. mutex_lock(&panel->panel_lock);
  3645. if (panel->lp11_init) {
  3646. rc = dsi_panel_power_on(panel);
  3647. if (rc) {
  3648. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3649. panel->name, rc);
  3650. goto error;
  3651. }
  3652. }
  3653. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3654. if (rc) {
  3655. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3656. panel->name, rc);
  3657. goto error;
  3658. }
  3659. error:
  3660. mutex_unlock(&panel->panel_lock);
  3661. return rc;
  3662. }
  3663. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3664. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3665. {
  3666. static const int ROI_CMD_LEN = 5;
  3667. int rc = 0;
  3668. /* DTYPE_DCS_LWRITE */
  3669. char *caset, *paset;
  3670. set->cmds = NULL;
  3671. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3672. if (!caset) {
  3673. rc = -ENOMEM;
  3674. goto exit;
  3675. }
  3676. caset[0] = 0x2a;
  3677. caset[1] = (roi->x & 0xFF00) >> 8;
  3678. caset[2] = roi->x & 0xFF;
  3679. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3680. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3681. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3682. if (!paset) {
  3683. rc = -ENOMEM;
  3684. goto error_free_mem;
  3685. }
  3686. paset[0] = 0x2b;
  3687. paset[1] = (roi->y & 0xFF00) >> 8;
  3688. paset[2] = roi->y & 0xFF;
  3689. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3690. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3691. set->type = DSI_CMD_SET_ROI;
  3692. set->state = DSI_CMD_SET_STATE_LP;
  3693. set->count = 2; /* send caset + paset together */
  3694. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3695. if (!set->cmds) {
  3696. rc = -ENOMEM;
  3697. goto error_free_mem;
  3698. }
  3699. set->cmds[0].msg.channel = 0;
  3700. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3701. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3702. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3703. set->cmds[0].msg.tx_buf = caset;
  3704. set->cmds[0].msg.rx_len = 0;
  3705. set->cmds[0].msg.rx_buf = 0;
  3706. set->cmds[0].last_command = 0;
  3707. set->cmds[0].post_wait_ms = 0;
  3708. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3709. set->cmds[1].msg.channel = 0;
  3710. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3711. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3712. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3713. set->cmds[1].msg.tx_buf = paset;
  3714. set->cmds[1].msg.rx_len = 0;
  3715. set->cmds[1].msg.rx_buf = 0;
  3716. set->cmds[1].last_command = 1;
  3717. set->cmds[1].post_wait_ms = 0;
  3718. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3719. goto exit;
  3720. error_free_mem:
  3721. kfree(caset);
  3722. kfree(paset);
  3723. kfree(set->cmds);
  3724. exit:
  3725. return rc;
  3726. }
  3727. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3728. int ctrl_idx)
  3729. {
  3730. int rc = 0;
  3731. if (!panel) {
  3732. DSI_ERR("invalid params\n");
  3733. return -EINVAL;
  3734. }
  3735. mutex_lock(&panel->panel_lock);
  3736. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3737. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3738. if (rc)
  3739. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3740. panel->name, rc);
  3741. mutex_unlock(&panel->panel_lock);
  3742. return rc;
  3743. }
  3744. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3745. int ctrl_idx)
  3746. {
  3747. int rc = 0;
  3748. if (!panel) {
  3749. DSI_ERR("invalid params\n");
  3750. return -EINVAL;
  3751. }
  3752. mutex_lock(&panel->panel_lock);
  3753. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3754. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3755. if (rc)
  3756. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3757. panel->name, rc);
  3758. mutex_unlock(&panel->panel_lock);
  3759. return rc;
  3760. }
  3761. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3762. struct dsi_rect *roi)
  3763. {
  3764. int rc = 0;
  3765. struct dsi_panel_cmd_set *set;
  3766. struct dsi_display_mode_priv_info *priv_info;
  3767. if (!panel || !panel->cur_mode) {
  3768. DSI_ERR("Invalid params\n");
  3769. return -EINVAL;
  3770. }
  3771. priv_info = panel->cur_mode->priv_info;
  3772. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3773. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3774. if (rc) {
  3775. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3776. panel->name, rc);
  3777. return rc;
  3778. }
  3779. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3780. roi->x, roi->y, roi->w, roi->h);
  3781. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3782. mutex_lock(&panel->panel_lock);
  3783. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3784. if (rc)
  3785. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3786. panel->name, rc);
  3787. mutex_unlock(&panel->panel_lock);
  3788. dsi_panel_destroy_cmd_packets(set);
  3789. dsi_panel_dealloc_cmd_packets(set);
  3790. return rc;
  3791. }
  3792. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3793. {
  3794. int rc = 0;
  3795. if (!panel) {
  3796. DSI_ERR("Invalid params\n");
  3797. return -EINVAL;
  3798. }
  3799. mutex_lock(&panel->panel_lock);
  3800. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3801. if (rc)
  3802. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3803. panel->name, rc);
  3804. mutex_unlock(&panel->panel_lock);
  3805. return rc;
  3806. }
  3807. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3808. {
  3809. int rc = 0;
  3810. if (!panel) {
  3811. DSI_ERR("Invalid params\n");
  3812. return -EINVAL;
  3813. }
  3814. mutex_lock(&panel->panel_lock);
  3815. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3816. if (rc)
  3817. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3818. panel->name, rc);
  3819. mutex_unlock(&panel->panel_lock);
  3820. return rc;
  3821. }
  3822. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3823. {
  3824. int rc = 0;
  3825. if (!panel) {
  3826. DSI_ERR("Invalid params\n");
  3827. return -EINVAL;
  3828. }
  3829. mutex_lock(&panel->panel_lock);
  3830. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3831. if (rc)
  3832. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3833. panel->name, rc);
  3834. mutex_unlock(&panel->panel_lock);
  3835. return rc;
  3836. }
  3837. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3838. {
  3839. int rc = 0;
  3840. if (!panel) {
  3841. DSI_ERR("Invalid params\n");
  3842. return -EINVAL;
  3843. }
  3844. mutex_lock(&panel->panel_lock);
  3845. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3846. if (rc)
  3847. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3848. panel->name, rc);
  3849. mutex_unlock(&panel->panel_lock);
  3850. return rc;
  3851. }
  3852. int dsi_panel_switch(struct dsi_panel *panel)
  3853. {
  3854. int rc = 0;
  3855. if (!panel) {
  3856. DSI_ERR("Invalid params\n");
  3857. return -EINVAL;
  3858. }
  3859. mutex_lock(&panel->panel_lock);
  3860. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3861. if (rc)
  3862. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3863. panel->name, rc);
  3864. mutex_unlock(&panel->panel_lock);
  3865. return rc;
  3866. }
  3867. int dsi_panel_post_switch(struct dsi_panel *panel)
  3868. {
  3869. int rc = 0;
  3870. if (!panel) {
  3871. DSI_ERR("Invalid params\n");
  3872. return -EINVAL;
  3873. }
  3874. mutex_lock(&panel->panel_lock);
  3875. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3876. if (rc)
  3877. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3878. panel->name, rc);
  3879. mutex_unlock(&panel->panel_lock);
  3880. return rc;
  3881. }
  3882. int dsi_panel_enable(struct dsi_panel *panel)
  3883. {
  3884. int rc = 0;
  3885. if (!panel) {
  3886. DSI_ERR("Invalid params\n");
  3887. return -EINVAL;
  3888. }
  3889. mutex_lock(&panel->panel_lock);
  3890. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3891. if (rc) {
  3892. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3893. panel->name, rc);
  3894. goto error;
  3895. }
  3896. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3897. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3898. if (rc) {
  3899. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3900. panel->name, rc);
  3901. goto error;
  3902. }
  3903. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3904. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3905. if (rc) {
  3906. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3907. panel->name, rc);
  3908. goto error;
  3909. }
  3910. }
  3911. panel->panel_initialized = true;
  3912. error:
  3913. mutex_unlock(&panel->panel_lock);
  3914. return rc;
  3915. }
  3916. int dsi_panel_post_enable(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3925. if (rc) {
  3926. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3927. panel->name, rc);
  3928. goto error;
  3929. }
  3930. error:
  3931. mutex_unlock(&panel->panel_lock);
  3932. return rc;
  3933. }
  3934. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3935. {
  3936. int rc = 0;
  3937. if (!panel) {
  3938. DSI_ERR("invalid params\n");
  3939. return -EINVAL;
  3940. }
  3941. mutex_lock(&panel->panel_lock);
  3942. if (gpio_is_valid(panel->bl_config.en_gpio))
  3943. gpio_set_value(panel->bl_config.en_gpio, 0);
  3944. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3945. if (rc) {
  3946. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3947. panel->name, rc);
  3948. goto error;
  3949. }
  3950. error:
  3951. mutex_unlock(&panel->panel_lock);
  3952. return rc;
  3953. }
  3954. int dsi_panel_disable(struct dsi_panel *panel)
  3955. {
  3956. int rc = 0;
  3957. if (!panel) {
  3958. DSI_ERR("invalid params\n");
  3959. return -EINVAL;
  3960. }
  3961. mutex_lock(&panel->panel_lock);
  3962. /* Avoid sending panel off commands when ESD recovery is underway */
  3963. if (!atomic_read(&panel->esd_recovery_pending)) {
  3964. /*
  3965. * Need to set IBB/AB regulator mode to STANDBY,
  3966. * if panel is going off from AOD mode.
  3967. */
  3968. if (dsi_panel_is_type_oled(panel) &&
  3969. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3970. panel->power_mode == SDE_MODE_DPMS_LP2))
  3971. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3972. "ibb", REGULATOR_MODE_STANDBY);
  3973. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3974. if (rc) {
  3975. /*
  3976. * Sending panel off commands may fail when DSI
  3977. * controller is in a bad state. These failures can be
  3978. * ignored since controller will go for full reset on
  3979. * subsequent display enable anyway.
  3980. */
  3981. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3982. panel->name, rc);
  3983. rc = 0;
  3984. }
  3985. }
  3986. panel->panel_initialized = false;
  3987. panel->power_mode = SDE_MODE_DPMS_OFF;
  3988. mutex_unlock(&panel->panel_lock);
  3989. return rc;
  3990. }
  3991. int dsi_panel_unprepare(struct dsi_panel *panel)
  3992. {
  3993. int rc = 0;
  3994. if (!panel) {
  3995. DSI_ERR("invalid params\n");
  3996. return -EINVAL;
  3997. }
  3998. mutex_lock(&panel->panel_lock);
  3999. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4000. if (rc) {
  4001. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4002. panel->name, rc);
  4003. goto error;
  4004. }
  4005. error:
  4006. mutex_unlock(&panel->panel_lock);
  4007. return rc;
  4008. }
  4009. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4010. {
  4011. int rc = 0;
  4012. if (!panel) {
  4013. DSI_ERR("invalid params\n");
  4014. return -EINVAL;
  4015. }
  4016. mutex_lock(&panel->panel_lock);
  4017. rc = dsi_panel_power_off(panel);
  4018. if (rc) {
  4019. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4020. panel->name, rc);
  4021. goto error;
  4022. }
  4023. error:
  4024. mutex_unlock(&panel->panel_lock);
  4025. return rc;
  4026. }