wcd937x.c 54 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #define WCD9370_VARIANT 0
  32. #define WCD9375_VARIANT 5
  33. #define NUM_SWRS_DT_PARAMS 5
  34. enum {
  35. CODEC_TX = 0,
  36. CODEC_RX,
  37. };
  38. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  39. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  40. static int wcd937x_handle_pre_irq(void *data);
  41. static int wcd937x_handle_post_irq(void *data);
  42. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  43. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  44. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  45. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  46. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  63. };
  64. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  65. .name = "wcd937x",
  66. .irqs = wcd937x_irqs,
  67. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  68. .num_regs = 3,
  69. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  70. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  71. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  72. .runtime_pm = true,
  73. .handle_post_irq = wcd937x_handle_post_irq,
  74. .handle_pre_irq = wcd937x_handle_pre_irq,
  75. };
  76. static int wcd937x_handle_pre_irq(void *data)
  77. {
  78. struct wcd937x_priv *wcd937x = data;
  79. int num_irq_regs = wcd937x->num_irq_regs;
  80. int ret = 0;
  81. u8 sts[num_irq_regs];
  82. struct wcd937x_pdata *pdata;
  83. pdata = dev_get_platdata(wcd937x->dev);
  84. memset(sts, 0, sizeof(sts));
  85. ret = regmap_bulk_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0,
  86. sts, num_irq_regs);
  87. if (ret < 0) {
  88. dev_err(wcd937x->dev, "%s: Failed to read intr status: %d\n",
  89. __func__, ret);
  90. } else if (ret == 0) {
  91. dev_dbg(wcd937x->dev,
  92. "%s: clear interrupts except OCP and SCD\n", __func__);
  93. /* Do not affect OCP and SCD interrupts */
  94. sts[0] = sts[0] & 0x5F;
  95. sts[1] = sts[1] & 0xEB;
  96. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0,
  97. sts[0]);
  98. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1,
  99. sts[1]);
  100. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2,
  101. sts[2]);
  102. }
  103. return IRQ_HANDLED;
  104. }
  105. static int wcd937x_handle_post_irq(void *data)
  106. {
  107. struct wcd937x_priv *wcd937x = data;
  108. int val = 0;
  109. struct wcd937x_pdata *pdata = NULL;
  110. pdata = dev_get_platdata(wcd937x->dev);
  111. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  112. if ((val & 0xA0) != 0) {
  113. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  114. regmap_update_bits(wcd937x->regmap,
  115. WCD937X_DIGITAL_INTR_CLEAR_0, 0xA0, 0x00);
  116. }
  117. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  118. if ((val & 0x14) != 0) {
  119. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  120. regmap_update_bits(wcd937x->regmap,
  121. WCD937X_DIGITAL_INTR_CLEAR_1, 0x14, 0x00);
  122. }
  123. return IRQ_HANDLED;
  124. }
  125. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  126. {
  127. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  128. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  129. usleep_range(1000, 1010);
  130. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  131. usleep_range(1000, 1010);
  132. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  133. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  134. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  135. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  136. usleep_range(10000, 10010);
  137. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  138. return 0;
  139. }
  140. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  141. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  142. u8 *port_type, u8 path)
  143. {
  144. int i, j;
  145. u8 num_ports;
  146. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  147. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  148. switch (path) {
  149. case CODEC_RX:
  150. map = &wcd937x->rx_port_mapping;
  151. num_ports = wcd937x->num_rx_ports;
  152. break;
  153. case CODEC_TX:
  154. map = &wcd937x->tx_port_mapping;
  155. num_ports = wcd937x->num_tx_ports;
  156. break;
  157. }
  158. for (i = 0; i <= num_ports; i++) {
  159. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  160. if ((*map)[i][j].slave_port_type == slv_prt_type)
  161. goto found;
  162. }
  163. }
  164. found:
  165. if (i > num_ports || j == MAX_CH_PER_PORT) {
  166. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  167. __func__, slv_prt_type);
  168. return -EINVAL;
  169. }
  170. *port_id = i;
  171. *num_ch = (*map)[i][j].num_ch;
  172. *ch_mask = (*map)[i][j].ch_mask;
  173. *ch_rate = (*map)[i][j].ch_rate;
  174. *port_type = (*map)[i][j].master_port_type;
  175. return 0;
  176. }
  177. static int wcd937x_parse_port_mapping(struct device *dev,
  178. char *prop, u8 path)
  179. {
  180. u32 *dt_array, map_size, map_length;
  181. u32 port_num, ch_mask, ch_rate, old_port_num = 0;
  182. u32 slave_port_type, master_port_type;
  183. u32 i, ch_iter = 0;
  184. int ret = 0;
  185. u8 *num_ports;
  186. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT];
  187. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  188. switch (path) {
  189. case CODEC_RX:
  190. map = &wcd937x->rx_port_mapping;
  191. num_ports = &wcd937x->num_rx_ports;
  192. break;
  193. case CODEC_TX:
  194. map = &wcd937x->tx_port_mapping;
  195. num_ports = &wcd937x->num_tx_ports;
  196. break;
  197. }
  198. if (!of_find_property(dev->of_node, prop,
  199. &map_size)) {
  200. dev_err(dev, "missing port mapping prop %s\n", prop);
  201. goto err_pdata_fail;
  202. }
  203. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  204. dt_array = kzalloc(map_size, GFP_KERNEL);
  205. if (!dt_array) {
  206. ret = -ENOMEM;
  207. goto err_pdata_fail;
  208. }
  209. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  210. NUM_SWRS_DT_PARAMS * map_length);
  211. if (ret) {
  212. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  213. __func__, prop);
  214. goto err_pdata_fail;
  215. }
  216. for (i = 0; i < map_length; i++) {
  217. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  218. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  219. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  220. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  221. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  222. if (port_num != old_port_num)
  223. ch_iter = 0;
  224. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  225. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  226. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  227. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  228. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  229. old_port_num = port_num;
  230. }
  231. *num_ports = port_num;
  232. kfree(dt_array);
  233. return 0;
  234. err_pdata_fail:
  235. kfree(dt_array);
  236. return -EINVAL;
  237. }
  238. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  239. u8 slv_port_type, u8 enable)
  240. {
  241. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  242. u8 port_id;
  243. u8 num_ch;
  244. u8 ch_mask;
  245. u32 ch_rate;
  246. u8 port_type;
  247. u8 num_port = 1;
  248. int ret = 0;
  249. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  250. &num_ch, &ch_mask, &ch_rate,
  251. &port_type, CODEC_TX);
  252. if (ret)
  253. return ret;
  254. if (enable)
  255. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  256. num_port, &ch_mask, &ch_rate,
  257. &num_ch, &port_type);
  258. else
  259. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  260. num_port, &ch_mask, &port_type);
  261. return ret;
  262. }
  263. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  264. u8 slv_port_type, u8 enable)
  265. {
  266. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  267. u8 port_id;
  268. u8 num_ch;
  269. u8 ch_mask;
  270. u32 ch_rate;
  271. u8 port_type;
  272. u8 num_port = 1;
  273. int ret = 0;
  274. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  275. &num_ch, &ch_mask, &ch_rate,
  276. &port_type, CODEC_RX);
  277. if (ret)
  278. return ret;
  279. if (enable)
  280. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  281. num_port, &ch_mask, &ch_rate,
  282. &num_ch, &port_type);
  283. else
  284. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  285. num_port, &ch_mask, &port_type);
  286. return ret;
  287. }
  288. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  289. {
  290. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  291. if (wcd937x->rx_clk_cnt == 0) {
  292. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  293. 0x08, 0x08);
  294. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  295. 0x01, 0x01);
  296. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  297. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  298. 0x40, 0x00);
  299. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  300. 0x02, 0x02);
  301. }
  302. wcd937x->rx_clk_cnt++;
  303. return 0;
  304. }
  305. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  306. {
  307. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  308. wcd937x->rx_clk_cnt--;
  309. if (wcd937x->rx_clk_cnt == 0) {
  310. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  311. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  312. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  313. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  314. 0x02, 0x00);
  315. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  316. 0x01, 0x00);
  317. }
  318. return 0;
  319. }
  320. /*
  321. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  322. * @codec: handle to snd_soc_codec *
  323. *
  324. * return wcd937x_mbhc handle or error code in case of failure
  325. */
  326. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  327. {
  328. struct wcd937x_priv *wcd937x;
  329. if (!codec) {
  330. pr_err("%s: Invalid params, NULL codec\n", __func__);
  331. return NULL;
  332. }
  333. wcd937x = snd_soc_codec_get_drvdata(codec);
  334. if (!wcd937x) {
  335. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  336. return NULL;
  337. }
  338. return wcd937x->mbhc;
  339. }
  340. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  341. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  342. struct snd_kcontrol *kcontrol,
  343. int event)
  344. {
  345. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  346. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  347. int ret = 0;
  348. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  349. w->name, event);
  350. switch (event) {
  351. case SND_SOC_DAPM_PRE_PMU:
  352. wcd937x_rx_clk_enable(codec);
  353. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  354. 0x01, 0x01);
  355. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  356. 0x04, 0x04);
  357. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  358. 0x80, 0x00);
  359. break;
  360. case SND_SOC_DAPM_POST_PMU:
  361. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  362. 0x0F, 0x02);
  363. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  364. 0x02, 0x02);
  365. usleep_range(5000, 5010);
  366. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  367. 0x02, 0x00);
  368. break;
  369. case SND_SOC_DAPM_POST_PMD:
  370. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  371. wcd937x->rx_swr_dev->dev_num,
  372. false);
  373. break;
  374. }
  375. return ret;
  376. }
  377. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  378. struct snd_kcontrol *kcontrol,
  379. int event)
  380. {
  381. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  382. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  383. int ret = 0;
  384. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  385. w->name, event);
  386. switch (event) {
  387. case SND_SOC_DAPM_PRE_PMU:
  388. wcd937x_rx_clk_enable(codec);
  389. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  390. 0x02, 0x02);
  391. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  392. 0x08, 0x08);
  393. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  394. 0x80, 0x00);
  395. break;
  396. case SND_SOC_DAPM_POST_PMU:
  397. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  398. 0x0F, 0x02);
  399. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  400. 0x01, 0x01);
  401. usleep_range(5000, 5010);
  402. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  403. 0x02, 0x00);
  404. break;
  405. case SND_SOC_DAPM_POST_PMD:
  406. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  407. wcd937x->rx_swr_dev->dev_num,
  408. false);
  409. break;
  410. }
  411. return ret;
  412. }
  413. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  414. struct snd_kcontrol *kcontrol,
  415. int event)
  416. {
  417. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  418. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  419. int ret = 0;
  420. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  421. w->name, event);
  422. switch (event) {
  423. case SND_SOC_DAPM_PRE_PMU:
  424. wcd937x_rx_clk_enable(codec);
  425. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  426. 0x04, 0x04);
  427. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  428. 0x01, 0x01);
  429. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  430. 0x02, 0x02);
  431. usleep_range(5000, 5010);
  432. break;
  433. case SND_SOC_DAPM_POST_PMD:
  434. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  435. wcd937x->rx_swr_dev->dev_num,
  436. false);
  437. break;
  438. };
  439. return ret;
  440. }
  441. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  442. struct snd_kcontrol *kcontrol,
  443. int event)
  444. {
  445. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  446. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  447. int ret = 0;
  448. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  449. w->name, event);
  450. switch (event) {
  451. case SND_SOC_DAPM_PRE_PMU:
  452. wcd937x_rx_clk_enable(codec);
  453. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  454. 0x04, 0x04);
  455. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  456. 0x04, 0x04);
  457. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  458. 0x01, 0x01);
  459. break;
  460. case SND_SOC_DAPM_POST_PMD:
  461. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  462. wcd937x->rx_swr_dev->dev_num,
  463. false);
  464. wcd937x_rx_clk_disable(codec);
  465. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  466. 0x04, 0x00);
  467. break;
  468. };
  469. return ret;
  470. }
  471. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  472. struct snd_kcontrol *kcontrol,
  473. int event)
  474. {
  475. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  476. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  477. int ret = 0;
  478. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  479. w->name, event);
  480. switch (event) {
  481. case SND_SOC_DAPM_PRE_PMU:
  482. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  483. usleep_range(100, 110);
  484. break;
  485. case SND_SOC_DAPM_POST_PMU:
  486. usleep_range(7000, 7010);
  487. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  488. 0x02, 0x02);
  489. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  490. 0x02, 0x02);
  491. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  492. wcd937x->rx_swr_dev->dev_num,
  493. true);
  494. break;
  495. case SND_SOC_DAPM_POST_PMD:
  496. usleep_range(7000, 7010);
  497. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  498. break;
  499. };
  500. return ret;
  501. }
  502. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  503. struct snd_kcontrol *kcontrol,
  504. int event)
  505. {
  506. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  507. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  508. int ret = 0;
  509. switch (event) {
  510. case SND_SOC_DAPM_PRE_PMU:
  511. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x0C, 0x08);
  512. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  513. usleep_range(100, 110);
  514. break;
  515. case SND_SOC_DAPM_POST_PMU:
  516. usleep_range(7000, 7010);
  517. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  518. 0x02, 0x02);
  519. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  520. 0x02, 0x02);
  521. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  522. wcd937x->rx_swr_dev->dev_num,
  523. true);
  524. break;
  525. case SND_SOC_DAPM_POST_PMD:
  526. usleep_range(7000, 7010);
  527. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  528. break;
  529. };
  530. return ret;
  531. }
  532. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  533. struct snd_kcontrol *kcontrol,
  534. int event)
  535. {
  536. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  537. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  538. int ret = 0;
  539. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  540. w->name, event);
  541. switch (event) {
  542. case SND_SOC_DAPM_PRE_PMU:
  543. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  544. 0x80, 0x80);
  545. usleep_range(500, 510);
  546. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  547. usleep_range(500, 510);
  548. break;
  549. case SND_SOC_DAPM_POST_PMU:
  550. usleep_range(1000, 1010);
  551. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  552. 0x20, 0x20);
  553. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  554. wcd937x->rx_swr_dev->dev_num,
  555. true);
  556. break;
  557. case SND_SOC_DAPM_POST_PMD:
  558. usleep_range(1000, 1010);
  559. usleep_range(1000, 1010);
  560. break;
  561. };
  562. return ret;
  563. }
  564. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  565. struct snd_kcontrol *kcontrol,
  566. int event)
  567. {
  568. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  569. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  570. int ret = 0;
  571. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  572. w->name, event);
  573. switch (event) {
  574. case SND_SOC_DAPM_PRE_PMU:
  575. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  576. 0x08, 0x08);
  577. usleep_range(500, 510);
  578. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  579. usleep_range(500, 510);
  580. break;
  581. case SND_SOC_DAPM_POST_PMU:
  582. usleep_range(6000, 6010);
  583. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  584. 0x02, 0x02);
  585. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  586. wcd937x->rx_swr_dev->dev_num,
  587. true);
  588. break;
  589. case SND_SOC_DAPM_POST_PMD:
  590. usleep_range(7000, 7010);
  591. break;
  592. };
  593. return ret;
  594. }
  595. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  596. struct snd_kcontrol *kcontrol,
  597. int event)
  598. {
  599. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  600. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  601. w->name, event);
  602. switch (event) {
  603. case SND_SOC_DAPM_PRE_PMU:
  604. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  605. 0xF0, 0x80);
  606. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  607. 0xE0, 0xA0);
  608. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  609. 0x02, 0x02);
  610. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  611. 0xFF, 0x1C);
  612. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  613. 0x40, 0x40);
  614. usleep_range(100, 110);
  615. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  616. 0xE0, 0xE0);
  617. usleep_range(100, 110);
  618. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  619. 0x80, 0x80);
  620. usleep_range(500, 510);
  621. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  622. usleep_range(500, 510);
  623. wcd937x_rx_connect_port(codec, HPH_L, true);
  624. wcd937x_rx_connect_port(codec, COMP_L, true);
  625. break;
  626. case SND_SOC_DAPM_POST_PMD:
  627. wcd937x_rx_connect_port(codec, HPH_L, false);
  628. wcd937x_rx_connect_port(codec, COMP_L, false);
  629. wcd937x_rx_clk_disable(codec);
  630. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  631. 0x01, 0x00);
  632. break;
  633. };
  634. return 0;
  635. }
  636. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  637. struct snd_kcontrol *kcontrol, int event)
  638. {
  639. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  640. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  641. w->name, event);
  642. switch (event) {
  643. case SND_SOC_DAPM_PRE_PMU:
  644. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  645. 0xF0, 0x80);
  646. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  647. 0xE0, 0xA0);
  648. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  649. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  650. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  651. 0x40, 0x40);
  652. usleep_range(100, 110);
  653. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  654. 0xE0, 0xE0);
  655. usleep_range(100, 110);
  656. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  657. 0x80, 0x80);
  658. usleep_range(500, 510);
  659. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  660. usleep_range(500, 510);
  661. wcd937x_rx_connect_port(codec, HPH_R, true);
  662. wcd937x_rx_connect_port(codec, COMP_R, true);
  663. break;
  664. case SND_SOC_DAPM_POST_PMD:
  665. wcd937x_rx_connect_port(codec, HPH_R, false);
  666. wcd937x_rx_connect_port(codec, COMP_R, false);
  667. wcd937x_rx_clk_disable(codec);
  668. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  669. 0x02, 0x00);
  670. break;
  671. };
  672. return 0;
  673. }
  674. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  675. struct snd_kcontrol *kcontrol,
  676. int event)
  677. {
  678. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  679. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  680. w->name, event);
  681. switch (event) {
  682. case SND_SOC_DAPM_PRE_PMU:
  683. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  684. 0xE0, 0xA0);
  685. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  686. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  687. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  688. 0x40, 0x40);
  689. usleep_range(100, 110);
  690. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  691. 0xE0, 0xE0);
  692. usleep_range(100, 110);
  693. wcd937x_rx_connect_port(codec, LO, true);
  694. break;
  695. case SND_SOC_DAPM_POST_PMD:
  696. wcd937x_rx_connect_port(codec, LO, false);
  697. usleep_range(6000, 6010);
  698. wcd937x_rx_clk_disable(codec);
  699. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  700. 0x04, 0x00);
  701. break;
  702. }
  703. return 0;
  704. }
  705. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  706. struct snd_kcontrol *kcontrol,
  707. int event)
  708. {
  709. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  710. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  711. u16 dmic_clk_reg;
  712. s32 *dmic_clk_cnt;
  713. unsigned int dmic;
  714. char *wname;
  715. int ret = 0;
  716. wname = strpbrk(w->name, "012345");
  717. if (!wname) {
  718. dev_err(codec->dev, "%s: widget not found\n", __func__);
  719. return -EINVAL;
  720. }
  721. ret = kstrtouint(wname, 10, &dmic);
  722. if (ret < 0) {
  723. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  724. __func__);
  725. return -EINVAL;
  726. }
  727. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  728. w->name, event);
  729. switch (dmic) {
  730. case 0:
  731. case 1:
  732. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  733. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  734. break;
  735. case 2:
  736. case 3:
  737. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  738. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  739. break;
  740. case 4:
  741. case 5:
  742. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  743. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  744. break;
  745. default:
  746. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  747. __func__);
  748. return -EINVAL;
  749. };
  750. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  751. __func__, event, dmic, *dmic_clk_cnt);
  752. switch (event) {
  753. case SND_SOC_DAPM_PRE_PMU:
  754. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  755. 0x80, 0x80);
  756. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  757. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  758. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  759. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  760. break;
  761. case SND_SOC_DAPM_POST_PMD:
  762. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  763. break;
  764. };
  765. return 0;
  766. }
  767. /*
  768. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  769. * @micb_mv: micbias in mv
  770. *
  771. * return register value converted
  772. */
  773. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  774. {
  775. /* min micbias voltage is 1V and maximum is 2.85V */
  776. if (micb_mv < 1000 || micb_mv > 2850) {
  777. pr_err("%s: unsupported micbias voltage\n", __func__);
  778. return -EINVAL;
  779. }
  780. return (micb_mv - 1000) / 50;
  781. }
  782. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  783. /*
  784. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  785. * @codec: handle to snd_soc_codec *
  786. * @req_volt: micbias voltage to be set
  787. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  788. *
  789. * return 0 if adjustment is success or error code in case of failure
  790. */
  791. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  792. int req_volt, int micb_num)
  793. {
  794. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  795. int cur_vout_ctl, req_vout_ctl;
  796. int micb_reg, micb_val, micb_en;
  797. int ret = 0;
  798. switch (micb_num) {
  799. case MIC_BIAS_1:
  800. micb_reg = WCD937X_ANA_MICB1;
  801. break;
  802. case MIC_BIAS_2:
  803. micb_reg = WCD937X_ANA_MICB2;
  804. break;
  805. case MIC_BIAS_3:
  806. micb_reg = WCD937X_ANA_MICB3;
  807. break;
  808. default:
  809. return -EINVAL;
  810. }
  811. mutex_lock(&wcd937x->micb_lock);
  812. /*
  813. * If requested micbias voltage is same as current micbias
  814. * voltage, then just return. Otherwise, adjust voltage as
  815. * per requested value. If micbias is already enabled, then
  816. * to avoid slow micbias ramp-up or down enable pull-up
  817. * momentarily, change the micbias value and then re-enable
  818. * micbias.
  819. */
  820. micb_val = snd_soc_read(codec, micb_reg);
  821. micb_en = (micb_val & 0xC0) >> 6;
  822. cur_vout_ctl = micb_val & 0x3F;
  823. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  824. if (req_vout_ctl < 0) {
  825. ret = -EINVAL;
  826. goto exit;
  827. }
  828. if (cur_vout_ctl == req_vout_ctl) {
  829. ret = 0;
  830. goto exit;
  831. }
  832. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  833. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  834. req_volt, micb_en);
  835. if (micb_en == 0x1)
  836. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  837. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  838. if (micb_en == 0x1) {
  839. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  840. /*
  841. * Add 2ms delay as per HW requirement after enabling
  842. * micbias
  843. */
  844. usleep_range(2000, 2100);
  845. }
  846. exit:
  847. mutex_unlock(&wcd937x->micb_lock);
  848. return ret;
  849. }
  850. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  851. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  852. struct snd_kcontrol *kcontrol,
  853. int event)
  854. {
  855. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  856. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  857. int ret = 0;
  858. switch (event) {
  859. case SND_SOC_DAPM_PRE_PMU:
  860. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  861. wcd937x->tx_swr_dev->dev_num,
  862. true);
  863. break;
  864. case SND_SOC_DAPM_POST_PMD:
  865. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  866. wcd937x->tx_swr_dev->dev_num,
  867. false);
  868. break;
  869. };
  870. return ret;
  871. }
  872. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  873. struct snd_kcontrol *kcontrol,
  874. int event){
  875. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  876. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  877. w->name, event);
  878. switch (event) {
  879. case SND_SOC_DAPM_PRE_PMU:
  880. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  881. 0x80, 0x80);
  882. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  883. 0x08, 0x08);
  884. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  885. 0x10, 0x10);
  886. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  887. break;
  888. case SND_SOC_DAPM_POST_PMD:
  889. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  890. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  891. 0x08, 0x00);
  892. break;
  893. };
  894. return 0;
  895. }
  896. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  897. struct snd_kcontrol *kcontrol, int event)
  898. {
  899. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  900. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  901. w->name, event);
  902. switch (event) {
  903. case SND_SOC_DAPM_PRE_PMU:
  904. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  905. 0x02, 0x02);
  906. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  907. 0x00);
  908. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  909. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  910. 0x10, 0x10);
  911. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  912. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  913. break;
  914. case SND_SOC_DAPM_POST_PMD:
  915. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  916. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  917. 0x10, 0x00);
  918. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  919. 0x10, 0x00);
  920. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  921. 0x80, 0x00);
  922. break;
  923. };
  924. return 0;
  925. }
  926. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  927. int micb_num, int req, bool is_dapm)
  928. {
  929. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  930. int micb_index = micb_num - 1;
  931. u16 micb_reg;
  932. int pre_off_event = 0, post_off_event = 0;
  933. int post_on_event = 0, post_dapm_off = 0;
  934. int post_dapm_on = 0;
  935. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  936. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  937. __func__, micb_index);
  938. return -EINVAL;
  939. }
  940. switch (micb_num) {
  941. case MIC_BIAS_1:
  942. micb_reg = WCD937X_ANA_MICB1;
  943. break;
  944. case MIC_BIAS_2:
  945. micb_reg = WCD937X_ANA_MICB2;
  946. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  947. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  948. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  949. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  950. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  951. break;
  952. case MIC_BIAS_3:
  953. micb_reg = WCD937X_ANA_MICB3;
  954. break;
  955. default:
  956. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  957. __func__, micb_num);
  958. return -EINVAL;
  959. };
  960. mutex_lock(&wcd937x->micb_lock);
  961. switch (req) {
  962. case MICB_PULLUP_ENABLE:
  963. wcd937x->pullup_ref[micb_index]++;
  964. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  965. (wcd937x->micb_ref[micb_index] == 0))
  966. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  967. break;
  968. case MICB_PULLUP_DISABLE:
  969. if (wcd937x->pullup_ref[micb_index] > 0)
  970. wcd937x->pullup_ref[micb_index]--;
  971. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  972. (wcd937x->micb_ref[micb_index] == 0))
  973. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  974. break;
  975. case MICB_ENABLE:
  976. wcd937x->micb_ref[micb_index]++;
  977. if (wcd937x->micb_ref[micb_index] == 1) {
  978. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  979. if (post_on_event)
  980. blocking_notifier_call_chain(&wcd937x->notifier,
  981. post_on_event,
  982. &wcd937x->mbhc);
  983. }
  984. if (is_dapm && post_dapm_on)
  985. blocking_notifier_call_chain(&wcd937x->notifier,
  986. post_dapm_on,
  987. &wcd937x->mbhc);
  988. break;
  989. case MICB_DISABLE:
  990. if (wcd937x->micb_ref[micb_index] > 0)
  991. wcd937x->micb_ref[micb_index]--;
  992. if ((wcd937x->micb_ref[micb_index] == 0) &&
  993. (wcd937x->pullup_ref[micb_index] > 0))
  994. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  995. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  996. (wcd937x->pullup_ref[micb_index] == 0)) {
  997. if (pre_off_event)
  998. blocking_notifier_call_chain(&wcd937x->notifier,
  999. pre_off_event,
  1000. &wcd937x->mbhc);
  1001. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1002. if (post_off_event)
  1003. blocking_notifier_call_chain(&wcd937x->notifier,
  1004. post_off_event,
  1005. &wcd937x->mbhc);
  1006. }
  1007. if (is_dapm && post_dapm_off)
  1008. blocking_notifier_call_chain(&wcd937x->notifier,
  1009. post_dapm_off,
  1010. &wcd937x->mbhc);
  1011. break;
  1012. };
  1013. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1014. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1015. wcd937x->pullup_ref[micb_index]);
  1016. mutex_unlock(&wcd937x->micb_lock);
  1017. return 0;
  1018. }
  1019. EXPORT_SYMBOL(wcd937x_micbias_control);
  1020. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1021. int event)
  1022. {
  1023. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1024. int micb_num;
  1025. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1026. __func__, w->name, event);
  1027. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1028. micb_num = MIC_BIAS_1;
  1029. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1030. micb_num = MIC_BIAS_2;
  1031. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1032. micb_num = MIC_BIAS_3;
  1033. else
  1034. return -EINVAL;
  1035. switch (event) {
  1036. case SND_SOC_DAPM_PRE_PMU:
  1037. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1038. break;
  1039. case SND_SOC_DAPM_POST_PMU:
  1040. usleep_range(1000, 1100);
  1041. break;
  1042. case SND_SOC_DAPM_POST_PMD:
  1043. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1044. break;
  1045. };
  1046. return 0;
  1047. }
  1048. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1049. struct snd_kcontrol *kcontrol,
  1050. int event)
  1051. {
  1052. return __wcd937x_codec_enable_micbias(w, event);
  1053. }
  1054. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1055. struct snd_ctl_elem_value *ucontrol)
  1056. {
  1057. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1058. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1059. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1060. return 0;
  1061. }
  1062. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1063. struct snd_ctl_elem_value *ucontrol)
  1064. {
  1065. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1066. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1067. u32 mode_val;
  1068. mode_val = ucontrol->value.enumerated.item[0];
  1069. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1070. if (mode_val == 0) {
  1071. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1072. __func__);
  1073. mode_val = 3; /* enum will be updated later */
  1074. }
  1075. wcd937x->hph_mode = mode_val;
  1076. return 0;
  1077. }
  1078. static const char * const rx_hph_mode_mux_text[] = {
  1079. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1080. "CLS_H_ULP", "CLS_AB_HIFI",
  1081. };
  1082. static const struct soc_enum rx_hph_mode_mux_enum =
  1083. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1084. rx_hph_mode_mux_text);
  1085. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1086. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1087. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1088. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1089. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1090. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1091. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1092. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1093. };
  1094. static const struct snd_kcontrol_new adc1_switch[] = {
  1095. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1096. };
  1097. static const struct snd_kcontrol_new adc2_switch[] = {
  1098. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1099. };
  1100. static const struct snd_kcontrol_new adc3_switch[] = {
  1101. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1102. };
  1103. static const struct snd_kcontrol_new dmic1_switch[] = {
  1104. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1105. };
  1106. static const struct snd_kcontrol_new dmic2_switch[] = {
  1107. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1108. };
  1109. static const struct snd_kcontrol_new dmic3_switch[] = {
  1110. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1111. };
  1112. static const struct snd_kcontrol_new dmic4_switch[] = {
  1113. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1114. };
  1115. static const struct snd_kcontrol_new dmic5_switch[] = {
  1116. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1117. };
  1118. static const struct snd_kcontrol_new dmic6_switch[] = {
  1119. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1120. };
  1121. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1122. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1123. };
  1124. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1125. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1126. };
  1127. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1128. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1129. };
  1130. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1131. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1132. };
  1133. static const char * const adc2_mux_text[] = {
  1134. "INP2", "INP3"
  1135. };
  1136. static const char * const rdac3_mux_text[] = {
  1137. "RX1", "RX3"
  1138. };
  1139. static const struct soc_enum adc2_enum =
  1140. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1141. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1142. static const struct soc_enum rdac3_enum =
  1143. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1144. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1145. static const struct snd_kcontrol_new tx_adc2_mux =
  1146. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1147. static const struct snd_kcontrol_new rx_rdac3_mux =
  1148. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1149. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1150. /*input widgets*/
  1151. SND_SOC_DAPM_INPUT("AMIC1"),
  1152. SND_SOC_DAPM_INPUT("AMIC2"),
  1153. SND_SOC_DAPM_INPUT("AMIC3"),
  1154. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1155. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1156. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1157. /*tx widgets*/
  1158. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1159. wcd937x_codec_enable_adc,
  1160. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1161. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 0, 1,
  1162. wcd937x_codec_enable_adc,
  1163. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1164. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1165. NULL, 0, wcd937x_enable_req,
  1166. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1167. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1168. NULL, 0, wcd937x_enable_req,
  1169. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1170. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1171. &tx_adc2_mux),
  1172. /*tx mixers*/
  1173. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1174. adc1_switch, ARRAY_SIZE(adc1_switch),
  1175. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1176. SND_SOC_DAPM_POST_PMD),
  1177. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1178. adc2_switch, ARRAY_SIZE(adc2_switch),
  1179. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1180. SND_SOC_DAPM_POST_PMD),
  1181. /* micbias widgets*/
  1182. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1183. wcd937x_codec_enable_micbias,
  1184. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1185. SND_SOC_DAPM_POST_PMD),
  1186. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1187. wcd937x_codec_enable_micbias,
  1188. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1189. SND_SOC_DAPM_POST_PMD),
  1190. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1191. wcd937x_codec_enable_micbias,
  1192. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1193. SND_SOC_DAPM_POST_PMD),
  1194. /*rx widgets*/
  1195. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1196. wcd937x_codec_enable_ear_pa,
  1197. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1198. SND_SOC_DAPM_POST_PMD),
  1199. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1200. wcd937x_codec_enable_aux_pa,
  1201. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1202. SND_SOC_DAPM_POST_PMD),
  1203. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1204. wcd937x_codec_enable_hphl_pa,
  1205. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1206. SND_SOC_DAPM_POST_PMD),
  1207. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1208. wcd937x_codec_enable_hphr_pa,
  1209. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1210. SND_SOC_DAPM_POST_PMD),
  1211. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1212. wcd937x_codec_hphl_dac_event,
  1213. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1214. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1215. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1216. wcd937x_codec_hphr_dac_event,
  1217. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1218. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1219. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1220. wcd937x_codec_ear_dac_event,
  1221. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1222. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1223. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1224. wcd937x_codec_aux_dac_event,
  1225. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1226. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1227. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1228. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1229. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1230. SND_SOC_DAPM_POST_PMD),
  1231. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1232. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1233. SND_SOC_DAPM_POST_PMD),
  1234. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1235. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1236. SND_SOC_DAPM_POST_PMD),
  1237. /* rx mixer widgets*/
  1238. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1239. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1240. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1241. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1242. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1243. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1244. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1245. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1246. /*output widgets tx*/
  1247. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1248. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1249. /*output widgets rx*/
  1250. SND_SOC_DAPM_OUTPUT("EAR"),
  1251. SND_SOC_DAPM_OUTPUT("AUX"),
  1252. SND_SOC_DAPM_OUTPUT("HPHL"),
  1253. SND_SOC_DAPM_OUTPUT("HPHR"),
  1254. };
  1255. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1256. /*input widgets*/
  1257. SND_SOC_DAPM_INPUT("AMIC4"),
  1258. /*tx widgets*/
  1259. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 0, 2,
  1260. wcd937x_codec_enable_adc,
  1261. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1262. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1263. NULL, 0, wcd937x_enable_req,
  1264. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1265. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1266. wcd937x_codec_enable_dmic,
  1267. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1268. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 1,
  1269. wcd937x_codec_enable_dmic,
  1270. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1271. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 2,
  1272. wcd937x_codec_enable_dmic,
  1273. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1274. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 3,
  1275. wcd937x_codec_enable_dmic,
  1276. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1277. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 4,
  1278. wcd937x_codec_enable_dmic,
  1279. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1280. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 5,
  1281. wcd937x_codec_enable_dmic,
  1282. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1283. /*tx mixer widgets*/
  1284. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1285. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1286. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1287. SND_SOC_DAPM_POST_PMD),
  1288. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1289. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1290. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1291. SND_SOC_DAPM_POST_PMD),
  1292. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1293. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1294. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1295. SND_SOC_DAPM_POST_PMD),
  1296. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1297. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1298. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1299. SND_SOC_DAPM_POST_PMD),
  1300. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1301. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1302. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1303. SND_SOC_DAPM_POST_PMD),
  1304. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1305. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1306. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1307. SND_SOC_DAPM_POST_PMD),
  1308. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1309. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1310. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1311. /*output widgets*/
  1312. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1313. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1314. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1315. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1316. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1317. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1318. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1319. };
  1320. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1321. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1322. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1323. {"ADC2 REQ", "NULL", "ADC2"},
  1324. {"ADC2", "NULL", "ADC2 MUX"},
  1325. {"ADC2 MUX", "INP3", "AMIC3"},
  1326. {"ADC2 MUX", "INP2", "AMIC2"},
  1327. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1328. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1329. {"ADC1 REQ", NULL, "ADC1"},
  1330. {"ADC1", NULL, "AMIC1"},
  1331. {"RX1", NULL, "IN1_HPHL"},
  1332. {"RDAC1", NULL, "RX1"},
  1333. {"HPHL_RDAC", "Switch", "RDAC1"},
  1334. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1335. {"HPHL", NULL, "HPHL PGA"},
  1336. {"RX2", NULL, "IN2_HPHR"},
  1337. {"RDAC2", NULL, "RX2"},
  1338. {"HPHR_RDAC", "Switch", "RDAC2"},
  1339. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1340. {"HPHR", NULL, "HPHR PGA"},
  1341. {"RX3", NULL, "IN3_AUX"},
  1342. {"RDAC4", NULL, "RX3"},
  1343. {"AUX_RDAC", "Switch", "RDAC4"},
  1344. {"AUX PGA", NULL, "AUX_RDAC"},
  1345. {"AUX", NULL, "AUX PGA"},
  1346. {"RDAC3_MUX", "RX3", "RX3"},
  1347. {"RDAC3_MUX", "RX1", "RX1"},
  1348. {"RDAC3", NULL, "RDAC3_MUX"},
  1349. {"EAR_RDAC", "Switch", "RDAC3"},
  1350. {"EAR PGA", NULL, "EAR_RDAC"},
  1351. {"EAR", NULL, "EAR PGA"},
  1352. };
  1353. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1354. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1355. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1356. {"ADC3 REQ", NULL, "ADC3"},
  1357. {"ADC3", NULL, "AMIC4"},
  1358. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1359. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1360. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1361. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1362. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1363. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1364. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1365. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1366. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1367. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1368. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1369. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1370. };
  1371. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1372. {
  1373. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1374. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1375. int variant;
  1376. int ret = -EINVAL;
  1377. dev_info(codec->dev, "%s()\n", __func__);
  1378. wcd937x = snd_soc_codec_get_drvdata(codec);
  1379. if (!wcd937x)
  1380. return -EINVAL;
  1381. wcd937x->codec = codec;
  1382. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1383. wcd937x->variant = variant;
  1384. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1385. sizeof(*(wcd937x->fw_data)),
  1386. GFP_KERNEL);
  1387. if (!wcd937x->fw_data) {
  1388. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1389. ret = -ENOMEM;
  1390. goto err;
  1391. }
  1392. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1393. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1394. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1395. if (ret < 0) {
  1396. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1397. goto err_hwdep;
  1398. }
  1399. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1400. if (ret) {
  1401. pr_err("%s: mbhc initialization failed\n", __func__);
  1402. goto err_hwdep;
  1403. }
  1404. wcd937x_init_reg(codec);
  1405. if (wcd937x->variant == WCD9375_VARIANT) {
  1406. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1407. ARRAY_SIZE(wcd9375_dapm_widgets));
  1408. if (ret < 0) {
  1409. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1410. __func__);
  1411. goto err_hwdep;
  1412. }
  1413. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1414. ARRAY_SIZE(wcd9375_audio_map));
  1415. if (ret < 0) {
  1416. dev_err(codec->dev, "%s: Failed to add routes\n",
  1417. __func__);
  1418. goto err_hwdep;
  1419. }
  1420. ret = snd_soc_dapm_new_widgets(dapm->card);
  1421. if (ret < 0) {
  1422. dev_err(codec->dev, "%s: Failed to add widgets\n",
  1423. __func__);
  1424. goto err_hwdep;
  1425. }
  1426. }
  1427. return ret;
  1428. err_hwdep:
  1429. wcd937x->fw_data = NULL;
  1430. err:
  1431. return ret;
  1432. }
  1433. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1434. {
  1435. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1436. if (!wcd937x)
  1437. return -EINVAL;
  1438. return 0;
  1439. }
  1440. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1441. {
  1442. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1443. return wcd937x->regmap;
  1444. }
  1445. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1446. .probe = wcd937x_soc_codec_probe,
  1447. .remove = wcd937x_soc_codec_remove,
  1448. .get_regmap = wcd937x_get_regmap,
  1449. .component_driver = {
  1450. .controls = wcd937x_snd_controls,
  1451. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1452. .dapm_widgets = wcd937x_dapm_widgets,
  1453. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1454. .dapm_routes = wcd937x_audio_map,
  1455. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1456. },
  1457. };
  1458. int wcd937x_reset(struct device *dev)
  1459. {
  1460. struct wcd937x_priv *wcd937x = NULL;
  1461. int rc = 0;
  1462. int value = 0;
  1463. if (!dev)
  1464. return -ENODEV;
  1465. wcd937x = dev_get_drvdata(dev);
  1466. if (!wcd937x)
  1467. return -EINVAL;
  1468. if (!wcd937x->rst_np) {
  1469. dev_err(dev, "%s: reset gpio device node not specified\n",
  1470. __func__);
  1471. return -EINVAL;
  1472. }
  1473. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1474. if (value > 0)
  1475. return 0;
  1476. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1477. if (rc) {
  1478. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1479. __func__);
  1480. return rc;
  1481. }
  1482. /* 20ms sleep required after pulling the reset gpio to LOW */
  1483. usleep_range(20, 30);
  1484. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1485. if (rc) {
  1486. dev_err(dev, "%s: wcd active state request fail!\n",
  1487. __func__);
  1488. return rc;
  1489. }
  1490. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1491. usleep_range(20, 30);
  1492. return rc;
  1493. }
  1494. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1495. {
  1496. struct wcd937x_pdata *pdata = NULL;
  1497. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1498. GFP_KERNEL);
  1499. if (!pdata)
  1500. return NULL;
  1501. pdata->rst_np = of_parse_phandle(dev->of_node,
  1502. "qcom,wcd937x-reset-node", 0);
  1503. if (!pdata->rst_np) {
  1504. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1505. __func__, "qcom,wcd937x-reset-node",
  1506. dev->of_node->full_name);
  1507. return NULL;
  1508. }
  1509. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1510. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1511. return pdata;
  1512. }
  1513. static int wcd937x_bind(struct device *dev)
  1514. {
  1515. int ret = 0, i = 0;
  1516. struct wcd937x_priv *wcd937x = NULL;
  1517. struct wcd937x_pdata *pdata = NULL;
  1518. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1519. if (!wcd937x)
  1520. return -ENOMEM;
  1521. dev_set_drvdata(dev, wcd937x);
  1522. pdata = wcd937x_populate_dt_data(dev);
  1523. if (!pdata) {
  1524. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1525. return -EINVAL;
  1526. }
  1527. wcd937x->rst_np = pdata->rst_np;
  1528. wcd937x_reset(dev);
  1529. /*
  1530. * Add 5msec delay to provide sufficient time for
  1531. * soundwire auto enumeration of slave devices as
  1532. * as per HW requirement.
  1533. */
  1534. usleep_range(5000, 5010);
  1535. ret = component_bind_all(dev, wcd937x);
  1536. if (ret) {
  1537. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1538. __func__, ret);
  1539. return ret;
  1540. }
  1541. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1542. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1543. if (ret) {
  1544. dev_err(dev, "Failed to read port mapping\n");
  1545. goto err;
  1546. }
  1547. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1548. if (!wcd937x->rx_swr_dev) {
  1549. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1550. __func__);
  1551. ret = -ENODEV;
  1552. goto err;
  1553. }
  1554. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1555. if (!wcd937x->tx_swr_dev) {
  1556. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1557. __func__);
  1558. ret = -ENODEV;
  1559. goto err;
  1560. }
  1561. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1562. &wcd937x_regmap_config);
  1563. if (!wcd937x->regmap) {
  1564. dev_err(dev, "%s: Regmap init failed\n",
  1565. __func__);
  1566. goto err;
  1567. }
  1568. /* Set all interupts as edge triggered */
  1569. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1570. regmap_write(wcd937x->regmap,
  1571. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1572. wcd937x->irq_info->wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1573. wcd937x->irq_info->codec_name = "WCD937X";
  1574. wcd937x->irq_info->regmap = wcd937x->regmap;
  1575. wcd937x->irq_info->dev = dev;
  1576. ret = wcd_irq_init(wcd937x->irq_info, &wcd937x->virq);
  1577. if (ret) {
  1578. dev_err(wcd937x->dev, "%s: IRQ init failed: %d\n",
  1579. __func__, ret);
  1580. goto err;
  1581. }
  1582. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1583. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1584. NULL, 0);
  1585. if (ret) {
  1586. dev_err(dev, "%s: Codec registration failed\n",
  1587. __func__);
  1588. goto err_irq;
  1589. }
  1590. return ret;
  1591. err_irq:
  1592. wcd_irq_exit(wcd937x->irq_info, wcd937x->virq);
  1593. err:
  1594. component_unbind_all(dev, wcd937x);
  1595. return ret;
  1596. }
  1597. static void wcd937x_unbind(struct device *dev)
  1598. {
  1599. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1600. wcd_irq_exit(wcd937x->irq_info, wcd937x->virq);
  1601. snd_soc_unregister_codec(dev);
  1602. component_unbind_all(dev, wcd937x);
  1603. }
  1604. static const struct of_device_id wcd937x_dt_match[] = {
  1605. { .compatible = "qcom,wcd937x-codec" },
  1606. {}
  1607. };
  1608. static const struct component_master_ops wcd937x_comp_ops = {
  1609. .bind = wcd937x_bind,
  1610. .unbind = wcd937x_unbind,
  1611. };
  1612. static int wcd937x_compare_of(struct device *dev, void *data)
  1613. {
  1614. return dev->of_node == data;
  1615. }
  1616. static void wcd937x_release_of(struct device *dev, void *data)
  1617. {
  1618. of_node_put(data);
  1619. }
  1620. static int wcd937x_add_slave_components(struct device *dev,
  1621. struct component_match **matchptr)
  1622. {
  1623. struct device_node *np, *rx_node, *tx_node;
  1624. np = dev->of_node;
  1625. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  1626. if (!rx_node) {
  1627. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  1628. return -ENODEV;
  1629. }
  1630. of_node_get(rx_node);
  1631. component_match_add_release(dev, matchptr,
  1632. wcd937x_release_of,
  1633. wcd937x_compare_of,
  1634. rx_node);
  1635. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  1636. if (!tx_node) {
  1637. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  1638. return -ENODEV;
  1639. }
  1640. of_node_get(tx_node);
  1641. component_match_add_release(dev, matchptr,
  1642. wcd937x_release_of,
  1643. wcd937x_compare_of,
  1644. tx_node);
  1645. return 0;
  1646. }
  1647. static int wcd937x_probe(struct platform_device *pdev)
  1648. {
  1649. struct component_match *match = NULL;
  1650. int ret;
  1651. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  1652. if (ret)
  1653. return ret;
  1654. return component_master_add_with_match(&pdev->dev,
  1655. &wcd937x_comp_ops, match);
  1656. }
  1657. static int wcd937x_remove(struct platform_device *pdev)
  1658. {
  1659. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  1660. return 0;
  1661. }
  1662. static struct platform_driver wcd937x_codec_driver = {
  1663. .probe = wcd937x_probe,
  1664. .remove = wcd937x_remove,
  1665. .driver = {
  1666. .name = "wcd937x_codec",
  1667. .owner = THIS_MODULE,
  1668. .of_match_table = of_match_ptr(wcd937x_dt_match),
  1669. },
  1670. };
  1671. module_platform_driver(wcd937x_codec_driver);
  1672. MODULE_DESCRIPTION("WCD937X Codec driver");
  1673. MODULE_LICENSE("GPL v2");