htt_stats.h 135 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * @file htt_stats.h
  20. *
  21. * @details the public header file of HTT STATS
  22. */
  23. #ifndef __HTT_STATS_H__
  24. #define __HTT_STATS_H__
  25. #include <htt.h>
  26. /*
  27. * htt_dbg_ext_stats_type -
  28. * The base structure for each of the stats_type is only for reference
  29. * Host should use this information to know the type of TLVs to expect
  30. * for a particular stats type.
  31. *
  32. * Max supported stats :- 256.
  33. */
  34. enum htt_dbg_ext_stats_type {
  35. /* HTT_DBG_EXT_STATS_RESET
  36. * PARAM:
  37. * - config_param0 : start_offset (stats type)
  38. * - config_param1 : stats bmask from start offset
  39. * - config_param2 : stats bmask from start offset + 32
  40. * - config_param3 : stats bmask from start offset + 64
  41. * RESP MSG:
  42. * - No response sent.
  43. */
  44. HTT_DBG_EXT_STATS_RESET = 0,
  45. /* HTT_DBG_EXT_STATS_PDEV_TX
  46. * PARAMS:
  47. * - No Params
  48. * RESP MSG:
  49. * - htt_tx_pdev_stats_t
  50. */
  51. HTT_DBG_EXT_STATS_PDEV_TX = 1,
  52. /* HTT_DBG_EXT_STATS_PDEV_RX
  53. * PARAMS:
  54. * - No Params
  55. * RESP MSG:
  56. * - htt_rx_pdev_stats_t
  57. */
  58. HTT_DBG_EXT_STATS_PDEV_RX = 2,
  59. /* HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  60. * PARAMS:
  61. * - config_param0: [Bit31: Bit0] HWQ mask
  62. * RESP MSG:
  63. * - htt_tx_hwq_stats_t
  64. */
  65. HTT_DBG_EXT_STATS_PDEV_TX_HWQ = 3,
  66. /* HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  67. * PARAMS:
  68. * - config_param0: [Bit31: Bit0] TXQ mask
  69. * RESP MSG:
  70. * - htt_stats_tx_sched_t
  71. */
  72. HTT_DBG_EXT_STATS_PDEV_TX_SCHED = 4,
  73. /* HTT_DBG_EXT_STATS_PDEV_ERROR
  74. * PARAMS:
  75. * - No Params
  76. * RESP MSG:
  77. * - htt_hw_err_stats_t
  78. */
  79. HTT_DBG_EXT_STATS_PDEV_ERROR = 5,
  80. /* HTT_DBG_EXT_STATS_PDEV_TQM
  81. * PARAMS:
  82. * - No Params
  83. * RESP MSG:
  84. * - htt_tx_tqm_pdev_stats_t
  85. */
  86. HTT_DBG_EXT_STATS_PDEV_TQM = 6,
  87. /* HTT_DBG_EXT_STATS_TQM_CMDQ
  88. * PARAMS:
  89. * - config_param0:
  90. * [Bit15: Bit0 ] cmdq id :if 0xFFFF print all cmdq's
  91. * [Bit31: Bit16] reserved
  92. * RESP MSG:
  93. * - htt_tx_tqm_cmdq_stats_t
  94. */
  95. HTT_DBG_EXT_STATS_TQM_CMDQ = 7,
  96. /* HTT_DBG_EXT_STATS_TX_DE_INFO
  97. * PARAMS:
  98. * - No Params
  99. * RESP MSG:
  100. * - htt_tx_de_stats_t
  101. */
  102. HTT_DBG_EXT_STATS_TX_DE_INFO = 8,
  103. /* HTT_DBG_EXT_STATS_PDEV_TX_RATE
  104. * PARAMS:
  105. * - No Params
  106. * RESP MSG:
  107. * - htt_tx_pdev_rate_stats_t
  108. */
  109. HTT_DBG_EXT_STATS_PDEV_TX_RATE = 9,
  110. /* HTT_DBG_EXT_STATS_PDEV_RX_RATE
  111. * PARAMS:
  112. * - No Params
  113. * RESP MSG:
  114. * - htt_rx_pdev_rate_stats_t
  115. */
  116. HTT_DBG_EXT_STATS_PDEV_RX_RATE = 10,
  117. /* HTT_DBG_EXT_STATS_PEER_INFO
  118. * PARAMS:
  119. * - config_param0:
  120. * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request
  121. * [Bit15 : Bit 1] htt_peer_stats_req_mode_t
  122. * [Bit31 : Bit16] sw_peer_id
  123. * config_param1:
  124. * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum)
  125. * 0 bit htt_peer_stats_cmn_tlv
  126. * 1 bit htt_peer_details_tlv
  127. * 2 bit htt_tx_peer_rate_stats_tlv
  128. * 3 bit htt_rx_peer_rate_stats_tlv
  129. * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv
  130. * 5 bit htt_rx_tid_stats_tlv
  131. * 6 bit htt_msdu_flow_stats_tlv
  132. * - config_param2: [Bit31 : Bit0] mac_addr31to0
  133. * - config_param3: [Bit15 : Bit0] mac_addr47to32
  134. * [Bit31 : Bit16] reserved
  135. * RESP MSG:
  136. * - htt_peer_stats_t
  137. */
  138. HTT_DBG_EXT_STATS_PEER_INFO = 11,
  139. /* HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  140. * PARAMS:
  141. * - No Params
  142. * RESP MSG:
  143. * - htt_tx_pdev_selfgen_stats_t
  144. */
  145. HTT_DBG_EXT_STATS_TX_SELFGEN_INFO = 12,
  146. /* HTT_DBG_EXT_STATS_TX_MU_HWQ
  147. * PARAMS:
  148. * - config_param0: [Bit31: Bit0] HWQ mask
  149. * RESP MSG:
  150. * - htt_tx_hwq_mu_mimo_stats_t
  151. */
  152. HTT_DBG_EXT_STATS_TX_MU_HWQ = 13,
  153. /* HTT_DBG_EXT_STATS_RING_IF_INFO
  154. * PARAMS:
  155. * - config_param0:
  156. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  157. * [Bit31: Bit16] reserved
  158. * RESP MSG:
  159. * - htt_ring_if_stats_t
  160. */
  161. HTT_DBG_EXT_STATS_RING_IF_INFO = 14,
  162. /* HTT_DBG_EXT_STATS_SRNG_INFO
  163. * PARAMS:
  164. * - config_param0:
  165. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  166. * [Bit31: Bit16] reserved
  167. * - No Params
  168. * RESP MSG:
  169. * - htt_sring_stats_t
  170. */
  171. HTT_DBG_EXT_STATS_SRNG_INFO = 15,
  172. /* HTT_DBG_EXT_STATS_SFM_INFO
  173. * PARAMS:
  174. * - No Params
  175. * RESP MSG:
  176. * - htt_sfm_stats_t
  177. */
  178. HTT_DBG_EXT_STATS_SFM_INFO = 16,
  179. /* HTT_DBG_EXT_STATS_PDEV_TX_MU
  180. * PARAMS:
  181. * - No Params
  182. * RESP MSG:
  183. * - htt_tx_pdev_mu_mimo_stats_t
  184. */
  185. HTT_DBG_EXT_STATS_PDEV_TX_MU = 17,
  186. /* HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  187. * PARAMS:
  188. * - config_param0:
  189. * [Bit7 : Bit0] vdev_id:8
  190. * note:0xFF to get all active peers based on pdev_mask.
  191. * [Bit31 : Bit8] rsvd:24
  192. * RESP MSG:
  193. * - htt_active_peer_details_list_t
  194. */
  195. HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST = 18,
  196. /* HTT_DBG_EXT_STATS_PDEV_CCA_STATS
  197. * PARAMS:
  198. * - config_param0:
  199. * [Bit0] - 1 sec interval histogram
  200. * [Bit1] - 100ms interval histogram
  201. * [Bit3] - Cumulative CCA stats
  202. * RESP MSG:
  203. * - htt_pdev_cca_stats_t
  204. */
  205. HTT_DBG_EXT_STATS_PDEV_CCA_STATS = 19,
  206. /* HTT_DBG_EXT_STATS_TWT_SESSIONS
  207. * PARAMS:
  208. * - config_param0:
  209. * No params
  210. * RESP MSG:
  211. * - htt_pdev_twt_sessions_stats_t
  212. */
  213. HTT_DBG_EXT_STATS_TWT_SESSIONS = 20,
  214. /* HTT_DBG_EXT_STATS_REO_CNTS
  215. * PARAMS:
  216. * - config_param0:
  217. * No params
  218. * RESP MSG:
  219. * - htt_soc_reo_resource_stats_t
  220. */
  221. HTT_DBG_EXT_STATS_REO_RESOURCE_STATS = 21,
  222. /* HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  223. * PARAMS:
  224. * - config_param0:
  225. * [Bit0] vdev_id_set:1
  226. * set to 1 if vdev_id is set and vdev stats are requested
  227. * [Bit8 : Bit1] vdev_id:8
  228. * note:0xFF to get all active vdevs based on pdev_mask.
  229. * [Bit31 : Bit9] rsvd:22
  230. *
  231. * RESP MSG:
  232. * - htt_tx_sounding_stats_t
  233. */
  234. HTT_DBG_EXT_STATS_TX_SOUNDING_INFO = 22,
  235. /* HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS
  236. * PARAMS:
  237. * - config_param0:
  238. * No params
  239. * RESP MSG:
  240. * - htt_pdev_obss_pd_stats_t
  241. */
  242. HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
  243. /* keep this last */
  244. HTT_DBG_NUM_EXT_STATS = 256,
  245. };
  246. typedef enum {
  247. HTT_STATS_TX_PDEV_CMN_TAG = 0, /* htt_tx_pdev_stats_cmn_tlv */
  248. HTT_STATS_TX_PDEV_UNDERRUN_TAG = 1, /* htt_tx_pdev_stats_urrn_tlv_v */
  249. HTT_STATS_TX_PDEV_SIFS_TAG = 2, /* htt_tx_pdev_stats_sifs_tlv_v */
  250. HTT_STATS_TX_PDEV_FLUSH_TAG = 3, /* htt_tx_pdev_stats_flush_tlv_v */
  251. HTT_STATS_TX_PDEV_PHY_ERR_TAG = 4, /* htt_tx_pdev_stats_phy_err_tlv_v */
  252. HTT_STATS_STRING_TAG = 5, /* htt_stats_string_tlv */
  253. HTT_STATS_TX_HWQ_CMN_TAG = 6, /* htt_tx_hwq_stats_cmn_tlv */
  254. HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG = 7, /* htt_tx_hwq_difs_latency_stats_tlv_v */
  255. HTT_STATS_TX_HWQ_CMD_RESULT_TAG = 8, /* htt_tx_hwq_cmd_result_stats_tlv_v */
  256. HTT_STATS_TX_HWQ_CMD_STALL_TAG = 9, /* htt_tx_hwq_cmd_stall_stats_tlv_v */
  257. HTT_STATS_TX_HWQ_FES_STATUS_TAG = 10, /* htt_tx_hwq_fes_result_stats_tlv_v */
  258. HTT_STATS_TX_TQM_GEN_MPDU_TAG = 11, /* htt_tx_tqm_gen_mpdu_stats_tlv_v */
  259. HTT_STATS_TX_TQM_LIST_MPDU_TAG = 12, /* htt_tx_tqm_list_mpdu_stats_tlv_v */
  260. HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG = 13, /* htt_tx_tqm_list_mpdu_cnt_tlv_v */
  261. HTT_STATS_TX_TQM_CMN_TAG = 14, /* htt_tx_tqm_cmn_stats_tlv */
  262. HTT_STATS_TX_TQM_PDEV_TAG = 15, /* htt_tx_tqm_pdev_stats_tlv_v */
  263. HTT_STATS_TX_TQM_CMDQ_STATUS_TAG = 16, /* htt_tx_tqm_cmdq_status_tlv */
  264. HTT_STATS_TX_DE_EAPOL_PACKETS_TAG = 17, /* htt_tx_de_eapol_packets_stats_tlv */
  265. HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG = 18, /* htt_tx_de_classify_failed_stats_tlv */
  266. HTT_STATS_TX_DE_CLASSIFY_STATS_TAG = 19, /* htt_tx_de_classify_stats_tlv */
  267. HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG = 20, /* htt_tx_de_classify_status_stats_tlv */
  268. HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG = 21, /* htt_tx_de_enqueue_packets_stats_tlv */
  269. HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG = 22, /* htt_tx_de_enqueue_discard_stats_tlv */
  270. HTT_STATS_TX_DE_CMN_TAG = 23, /* htt_tx_de_cmn_stats_tlv */
  271. HTT_STATS_RING_IF_TAG = 24, /* htt_ring_if_stats_tlv */
  272. HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG = 25, /* htt_tx_pdev_mu_mimo_sch_stats_tlv */
  273. HTT_STATS_SFM_CMN_TAG = 26, /* htt_sfm_cmn_tlv */
  274. HTT_STATS_SRING_STATS_TAG = 27, /* htt_sring_stats_tlv */
  275. HTT_STATS_RX_PDEV_FW_STATS_TAG = 28, /* htt_rx_pdev_fw_stats_tlv */
  276. HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG = 29, /* htt_rx_pdev_fw_ring_mpdu_err_tlv_v */
  277. HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG = 30, /* htt_rx_pdev_fw_mpdu_drop_tlv_v */
  278. HTT_STATS_RX_SOC_FW_STATS_TAG = 31, /* htt_rx_soc_fw_stats_tlv */
  279. HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG = 32, /* htt_rx_soc_fw_refill_ring_empty_tlv_v */
  280. HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG = 33, /* htt_rx_soc_fw_refill_ring_num_refill_tlv_v */
  281. HTT_STATS_TX_PDEV_RATE_STATS_TAG = 34, /* htt_tx_pdev_rate_stats_tlv */
  282. HTT_STATS_RX_PDEV_RATE_STATS_TAG = 35, /* htt_rx_pdev_rate_stats_tlv */
  283. HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG = 36, /* htt_tx_pdev_stats_sched_per_txq_tlv */
  284. HTT_STATS_TX_SCHED_CMN_TAG = 37, /* htt_stats_tx_sched_cmn_tlv */
  285. HTT_STATS_TX_PDEV_MUMIMO_MPDU_STATS_TAG = 38, /* htt_tx_pdev_mu_mimo_mpdu_stats_tlv */
  286. HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG = 39, /* htt_sched_txq_cmd_posted_tlv_v */
  287. HTT_STATS_RING_IF_CMN_TAG = 40, /* htt_ring_if_cmn_tlv */
  288. HTT_STATS_SFM_CLIENT_USER_TAG = 41, /* htt_sfm_client_user_tlv_v */
  289. HTT_STATS_SFM_CLIENT_TAG = 42, /* htt_sfm_client_tlv */
  290. HTT_STATS_TX_TQM_ERROR_STATS_TAG = 43, /* htt_tx_tqm_error_stats_tlv */
  291. HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG = 44, /* htt_sched_txq_cmd_reaped_tlv_v */
  292. HTT_STATS_SRING_CMN_TAG = 45, /* htt_sring_cmn_tlv */
  293. HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG = 46, /* htt_tx_selfgen_ac_err_stats_tlv */
  294. HTT_STATS_TX_SELFGEN_CMN_STATS_TAG = 47, /* htt_tx_selfgen_cmn_stats_tlv */
  295. HTT_STATS_TX_SELFGEN_AC_STATS_TAG = 48, /* htt_tx_selfgen_ac_stats_tlv */
  296. HTT_STATS_TX_SELFGEN_AX_STATS_TAG = 49, /* htt_tx_selfgen_ax_stats_tlv */
  297. HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG = 50, /* htt_tx_selfgen_ax_err_stats_tlv */
  298. HTT_STATS_TX_HWQ_MUMIMO_SCH_STATS_TAG = 51, /* htt_tx_hwq_mu_mimo_sch_stats_tlv */
  299. HTT_STATS_TX_HWQ_MUMIMO_MPDU_STATS_TAG = 52, /* htt_tx_hwq_mu_mimo_mpdu_stats_tlv */
  300. HTT_STATS_TX_HWQ_MUMIMO_CMN_STATS_TAG = 53, /* htt_tx_hwq_mu_mimo_cmn_stats_tlv */
  301. HTT_STATS_HW_INTR_MISC_TAG = 54, /* htt_hw_stats_intr_misc_tlv */
  302. HTT_STATS_HW_WD_TIMEOUT_TAG = 55, /* htt_hw_stats_wd_timeout_tlv */
  303. HTT_STATS_HW_PDEV_ERRS_TAG = 56, /* htt_hw_stats_pdev_errs_tlv */
  304. HTT_STATS_COUNTER_NAME_TAG = 57, /* htt_counter_tlv */
  305. HTT_STATS_TX_TID_DETAILS_TAG = 58, /* htt_tx_tid_stats_tlv */
  306. HTT_STATS_RX_TID_DETAILS_TAG = 59, /* htt_rx_tid_stats_tlv */
  307. HTT_STATS_PEER_STATS_CMN_TAG = 60, /* htt_peer_stats_cmn_tlv */
  308. HTT_STATS_PEER_DETAILS_TAG = 61, /* htt_peer_details_tlv */
  309. HTT_STATS_PEER_TX_RATE_STATS_TAG = 62, /* htt_tx_peer_rate_stats_tlv */
  310. HTT_STATS_PEER_RX_RATE_STATS_TAG = 63, /* htt_rx_peer_rate_stats_tlv */
  311. HTT_STATS_PEER_MSDU_FLOWQ_TAG = 64, /* htt_msdu_flow_stats_tlv */
  312. HTT_STATS_TX_DE_COMPL_STATS_TAG = 65, /* htt_tx_de_compl_stats_tlv */
  313. HTT_STATS_WHAL_TX_TAG = 66, /* htt_hw_stats_whal_tx_tlv */
  314. HTT_STATS_TX_PDEV_SIFS_HIST_TAG = 67, /* htt_tx_pdev_stats_sifs_hist_tlv_v */
  315. HTT_STATS_RX_PDEV_FW_STATS_PHY_ERR_TAG = 68, /* htt_rx_pdev_fw_stats_phy_err_tlv */
  316. HTT_STATS_TX_TID_DETAILS_V1_TAG = 69, /* htt_tx_tid_stats_v1_tlv */
  317. HTT_STATS_PDEV_CCA_1SEC_HIST_TAG = 70, /* htt_pdev_cca_stats_hist_tlv (for 1 sec interval stats) */
  318. HTT_STATS_PDEV_CCA_100MSEC_HIST_TAG = 71, /* htt_pdev_cca_stats_hist_tlv (for 100 msec interval stats) */
  319. HTT_STATS_PDEV_CCA_STAT_CUMULATIVE_TAG = 72, /* htt_pdev_stats_cca_stats_tlv */
  320. HTT_STATS_PDEV_CCA_COUNTERS_TAG = 73, /* htt_pdev_stats_cca_counters_tlv */
  321. HTT_STATS_TX_PDEV_MPDU_STATS_TAG = 74, /* htt_tx_pdev_mpdu_stats_tlv */
  322. HTT_STATS_PDEV_TWT_SESSIONS_TAG = 75, /* htt_pdev_stats_twt_sessions_tlv */
  323. HTT_STATS_PDEV_TWT_SESSION_TAG = 76, /* htt_pdev_stats_twt_session_tlv */
  324. HTT_STATS_RX_REFILL_RXDMA_ERR_TAG = 77, /* htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v */
  325. HTT_STATS_RX_REFILL_REO_ERR_TAG = 78, /* htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v */
  326. HTT_STATS_RX_REO_RESOURCE_STATS_TAG = 79, /* htt_rx_reo_debug_stats_tlv_v */
  327. HTT_STATS_TX_SOUNDING_STATS_TAG = 80, /* htt_tx_sounding_stats_tlv */
  328. HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG = 81, /* htt_tx_pdev_stats_tx_ppdu_stats_tlv_v */
  329. HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG = 82, /* htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v */
  330. HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG = 83, /* htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v */
  331. HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG = 84, /* htt_tx_hwq_txop_used_cnt_hist_tlv_v */
  332. HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG = 85, /* htt_tx_de_fw2wbm_ring_full_hist_tlv */
  333. HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG = 86, /* htt_sched_txq_sched_order_su_tlv */
  334. HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG = 87, /* htt_sched_txq_sched_eligibility_tlv */
  335. HTT_STATS_PDEV_OBSS_PD_TAG = 88, /* htt_pdev_obss_pd_stats_tlv */
  336. HTT_STATS_MAX_TAG,
  337. } htt_tlv_tag_t;
  338. #define HTT_STATS_TLV_TAG_M 0x00000fff
  339. #define HTT_STATS_TLV_TAG_S 0
  340. #define HTT_STATS_TLV_LENGTH_M 0x00fff000
  341. #define HTT_STATS_TLV_LENGTH_S 12
  342. #define HTT_STATS_TLV_TAG_GET(_var) \
  343. (((_var) & HTT_STATS_TLV_TAG_M) >> \
  344. HTT_STATS_TLV_TAG_S)
  345. #define HTT_STATS_TLV_TAG_SET(_var, _val) \
  346. do { \
  347. HTT_CHECK_SET_VAL(HTT_STATS_TLV_TAG, _val); \
  348. ((_var) |= ((_val) << HTT_STATS_TLV_TAG_S)); \
  349. } while (0)
  350. #define HTT_STATS_TLV_LENGTH_GET(_var) \
  351. (((_var) & HTT_STATS_TLV_LENGTH_M) >> \
  352. HTT_STATS_TLV_LENGTH_S)
  353. #define HTT_STATS_TLV_LENGTH_SET(_var, _val) \
  354. do { \
  355. HTT_CHECK_SET_VAL(HTT_STATS_TLV_LENGTH, _val); \
  356. ((_var) |= ((_val) << HTT_STATS_TLV_LENGTH_S)); \
  357. } while (0)
  358. typedef struct {
  359. union {
  360. /* BIT [11 : 0] :- tag
  361. * BIT [23 : 12] :- length
  362. * BIT [31 : 24] :- reserved
  363. */
  364. A_UINT32 tag__length;
  365. /*
  366. * The following struct is not endian-portable.
  367. * It is suitable for use within the target, which is known to be
  368. * little-endian.
  369. * The host should use the above endian-portable macros to access
  370. * the tag and length bitfields in an endian-neutral manner.
  371. */
  372. struct {
  373. A_UINT32 tag: 12, /* BIT [11 : 0] */
  374. length: 12, /* BIT [23 : 12] */
  375. reserved: 8; /* BIT [31 : 24] */
  376. };
  377. };
  378. } htt_tlv_hdr_t;
  379. #define HTT_STATS_MAX_STRING_SZ32 4
  380. #define HTT_STATS_MACID_INVALID 0xff
  381. #define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
  382. #define HTT_TX_HWQ_MAX_CMD_RESULT_STATS 13
  383. #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5
  384. #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10
  385. typedef enum {
  386. HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
  387. HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
  388. HTT_STATS_TX_PDEV_DATA_UNDERRUN_WITHIN_MPDU = 2,
  389. HTT_TX_PDEV_MAX_URRN_STATS = 3,
  390. } htt_tx_pdev_underrun_enum;
  391. #define HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 71
  392. #define HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
  393. #define HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
  394. #define HTT_TX_PDEV_MAX_PHY_ERR_STATS 18
  395. #define HTT_TX_PDEV_SCHED_TX_MODE_MAX 4
  396. #define HTT_TX_PDEV_NUM_SCHED_ORDER_LOG 20
  397. #define HTT_RX_STATS_REFILL_MAX_RING 4
  398. #define HTT_RX_STATS_RXDMA_MAX_ERR 16
  399. #define HTT_RX_STATS_FW_DROP_REASON_MAX 16
  400. /* Bytes stored in little endian order */
  401. /* Length should be multiple of DWORD */
  402. typedef struct {
  403. htt_tlv_hdr_t tlv_hdr;
  404. A_UINT32 data[1]; /* Can be variable length */
  405. } htt_stats_string_tlv;
  406. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff
  407. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0
  408. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_GET(_var) \
  409. (((_var) & HTT_TX_PDEV_STATS_CMN_MAC_ID_M) >> \
  410. HTT_TX_PDEV_STATS_CMN_MAC_ID_S)
  411. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_SET(_var, _val) \
  412. do { \
  413. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_CMN_MAC_ID, _val); \
  414. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \
  415. } while (0)
  416. /* == TX PDEV STATS == */
  417. typedef struct {
  418. htt_tlv_hdr_t tlv_hdr;
  419. /* BIT [ 7 : 0] :- mac_id
  420. * BIT [31 : 8] :- reserved
  421. */
  422. A_UINT32 mac_id__word;
  423. /* Num queued to HW */
  424. A_UINT32 hw_queued;
  425. /* Num PPDU reaped from HW */
  426. A_UINT32 hw_reaped;
  427. /* Num underruns */
  428. A_UINT32 underrun;
  429. /* Num HW Paused counter. */
  430. A_UINT32 hw_paused;
  431. /* Num HW flush counter. */
  432. A_UINT32 hw_flush;
  433. /* Num HW filtered counter. */
  434. A_UINT32 hw_filt;
  435. /* Num PPDUs cleaned up in TX abort */
  436. A_UINT32 tx_abort;
  437. /* Num MPDUs requed by SW */
  438. A_UINT32 mpdu_requed;
  439. /* excessive retries */
  440. A_UINT32 tx_xretry;
  441. /* Last used data hw rate code */
  442. A_UINT32 data_rc;
  443. /* frames dropped due to excessive sw retries */
  444. A_UINT32 mpdu_dropped_xretry;
  445. /* illegal rate phy errors */
  446. A_UINT32 illgl_rate_phy_err;
  447. /* wal pdev continous xretry */
  448. A_UINT32 cont_xretry;
  449. /* wal pdev tx timeout */
  450. A_UINT32 tx_timeout;
  451. /* wal pdev resets */
  452. A_UINT32 pdev_resets;
  453. /* PhY/BB underrun */
  454. A_UINT32 phy_underrun;
  455. /* MPDU is more than txop limit */
  456. A_UINT32 txop_ovf;
  457. /* Number of Sequences posted */
  458. A_UINT32 seq_posted;
  459. /* Number of Sequences failed queueing */
  460. A_UINT32 seq_failed_queueing;
  461. /* Number of Sequences completed */
  462. A_UINT32 seq_completed;
  463. /* Number of Sequences restarted */
  464. A_UINT32 seq_restarted;
  465. /* Number of MU Sequences posted */
  466. A_UINT32 mu_seq_posted;
  467. /* Number of time HW ring is paused between seq switch within ISR */
  468. A_UINT32 seq_switch_hw_paused;
  469. /* Number of times seq continuation in DSR */
  470. A_UINT32 next_seq_posted_dsr;
  471. /* Number of times seq continuation in ISR */
  472. A_UINT32 seq_posted_isr;
  473. /* Number of seq_ctrl cached. */
  474. A_UINT32 seq_ctrl_cached;
  475. /* Number of MPDUs successfully transmitted */
  476. A_UINT32 mpdu_count_tqm;
  477. /* Number of MSDUs successfully transmitted */
  478. A_UINT32 msdu_count_tqm;
  479. /* Number of MPDUs dropped */
  480. A_UINT32 mpdu_removed_tqm;
  481. /* Number of MSDUs dropped */
  482. A_UINT32 msdu_removed_tqm;
  483. /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
  484. A_UINT32 mpdus_sw_flush;
  485. /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
  486. A_UINT32 mpdus_hw_filter;
  487. /* Num MPDUs truncated by PDG (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) */
  488. A_UINT32 mpdus_truncated;
  489. /* Num MPDUs that was tried but didn't receive ACK or BA */
  490. A_UINT32 mpdus_ack_failed;
  491. /* Num MPDUs that was dropped due to expiry (MSDU TTL). */
  492. A_UINT32 mpdus_expired;
  493. /* Num MPDUs that was retried within seq_ctrl (MGMT/LEGACY) */
  494. A_UINT32 mpdus_seq_hw_retry;
  495. /* Num of TQM acked cmds processed */
  496. A_UINT32 ack_tlv_proc;
  497. /* coex_abort_mpdu_cnt valid. */
  498. A_UINT32 coex_abort_mpdu_cnt_valid;
  499. /* coex_abort_mpdu_cnt from TX FES stats. */
  500. A_UINT32 coex_abort_mpdu_cnt;
  501. /* Number of total PPDUs(DATA, MGMT, excludes selfgen) tried over the air (OTA) */
  502. A_UINT32 num_total_ppdus_tried_ota;
  503. /* Number of data PPDUs tried over the air (OTA) */
  504. A_UINT32 num_data_ppdus_tried_ota;
  505. /* Num Local control/mgmt frames (MSDUs) queued */
  506. A_UINT32 local_ctrl_mgmt_enqued;
  507. /* local_ctrl_mgmt_freed:
  508. * Num Local control/mgmt frames (MSDUs) done
  509. * It includes all local ctrl/mgmt completions
  510. * (acked, no ack, flush, TTL, etc)
  511. */
  512. A_UINT32 local_ctrl_mgmt_freed;
  513. /* Num Local data frames (MSDUs) queued */
  514. A_UINT32 local_data_enqued;
  515. /* local_data_freed:
  516. * Num Local data frames (MSDUs) done
  517. * It includes all local data completions
  518. * (acked, no ack, flush, TTL, etc)
  519. */
  520. A_UINT32 local_data_freed;
  521. /* Num MPDUs tried by SW */
  522. A_UINT32 mpdu_tried;
  523. /* Num of waiting seq posted in isr completion handler */
  524. A_UINT32 isr_wait_seq_posted;
  525. A_UINT32 tx_active_dur_us_low;
  526. A_UINT32 tx_active_dur_us_high;
  527. } htt_tx_pdev_stats_cmn_tlv;
  528. #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  529. /* NOTE: Variable length TLV, use length spec to infer array size */
  530. typedef struct {
  531. htt_tlv_hdr_t tlv_hdr;
  532. A_UINT32 urrn_stats[1]; /* HTT_TX_PDEV_MAX_URRN_STATS */
  533. } htt_tx_pdev_stats_urrn_tlv_v;
  534. #define HTT_TX_PDEV_STATS_FLUSH_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  535. /* NOTE: Variable length TLV, use length spec to infer array size */
  536. typedef struct {
  537. htt_tlv_hdr_t tlv_hdr;
  538. A_UINT32 flush_errs[1]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
  539. } htt_tx_pdev_stats_flush_tlv_v;
  540. #define HTT_TX_PDEV_STATS_SIFS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  541. /* NOTE: Variable length TLV, use length spec to infer array size */
  542. typedef struct {
  543. htt_tlv_hdr_t tlv_hdr;
  544. A_UINT32 sifs_status[1]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
  545. } htt_tx_pdev_stats_sifs_tlv_v;
  546. #define HTT_TX_PDEV_STATS_PHY_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  547. /* NOTE: Variable length TLV, use length spec to infer array size */
  548. typedef struct {
  549. htt_tlv_hdr_t tlv_hdr;
  550. A_UINT32 phy_errs[1]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
  551. } htt_tx_pdev_stats_phy_err_tlv_v;
  552. #define HTT_TX_PDEV_STATS_SIFS_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  553. /* NOTE: Variable length TLV, use length spec to infer array size */
  554. typedef struct {
  555. htt_tlv_hdr_t tlv_hdr;
  556. A_UINT32 sifs_hist_status[1]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
  557. } htt_tx_pdev_stats_sifs_hist_tlv_v;
  558. typedef struct {
  559. htt_tlv_hdr_t tlv_hdr;
  560. A_UINT32 num_data_ppdus_legacy_su;
  561. A_UINT32 num_data_ppdus_ac_su;
  562. A_UINT32 num_data_ppdus_ax_su;
  563. A_UINT32 num_data_ppdus_ac_su_txbf;
  564. A_UINT32 num_data_ppdus_ax_su_txbf;
  565. } htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;
  566. #define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  567. /* NOTE: Variable length TLV, use length spec to infer array size .
  568. *
  569. * Tried_mpdu_cnt_hist is the histogram of MPDUs tries per HWQ.
  570. * The tries here is the count of the MPDUS within a PPDU that the
  571. * HW had attempted to transmit on air, for the HWSCH Schedule
  572. * command submitted by FW.It is not the retry attempts.
  573. * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
  574. * 10 bins in this histogram. They are defined in FW using the
  575. * following macros
  576. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  577. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  578. *
  579. */
  580. typedef struct {
  581. htt_tlv_hdr_t tlv_hdr;
  582. A_UINT32 hist_bin_size;
  583. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_PDEV_TRIED_MPDU_CNT_HIST */
  584. } htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v;
  585. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_TX
  586. * TLV_TAGS:
  587. * - HTT_STATS_TX_PDEV_CMN_TAG
  588. * - HTT_STATS_TX_PDEV_URRN_TAG
  589. * - HTT_STATS_TX_PDEV_SIFS_TAG
  590. * - HTT_STATS_TX_PDEV_FLUSH_TAG
  591. * - HTT_STATS_TX_PDEV_PHY_ERR_TAG
  592. * - HTT_STATS_TX_PDEV_SIFS_HIST_TAG
  593. * - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
  594. * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
  595. */
  596. /* NOTE:
  597. * This structure is for documentation, and cannot be safely used directly.
  598. * Instead, use the constituent TLV structures to fill/parse.
  599. */
  600. typedef struct _htt_tx_pdev_stats {
  601. htt_tx_pdev_stats_cmn_tlv cmn_tlv;
  602. htt_tx_pdev_stats_urrn_tlv_v underrun_tlv;
  603. htt_tx_pdev_stats_sifs_tlv_v sifs_tlv;
  604. htt_tx_pdev_stats_flush_tlv_v flush_tlv;
  605. htt_tx_pdev_stats_phy_err_tlv_v phy_err_tlv;
  606. htt_tx_pdev_stats_sifs_hist_tlv_v sifs_hist_tlv;
  607. htt_tx_pdev_stats_tx_ppdu_stats_tlv_v tx_su_tlv;
  608. htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v tried_mpdu_cnt_hist_tlv;
  609. } htt_tx_pdev_stats_t;
  610. /* == SOC ERROR STATS == */
  611. /* =============== PDEV ERROR STATS ============== */
  612. #define HTT_STATS_MAX_HW_INTR_NAME_LEN 8
  613. typedef struct {
  614. htt_tlv_hdr_t tlv_hdr;
  615. /* Stored as little endian */
  616. A_UINT8 hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN];
  617. A_UINT32 mask;
  618. A_UINT32 count;
  619. } htt_hw_stats_intr_misc_tlv;
  620. #define HTT_STATS_MAX_HW_MODULE_NAME_LEN 8
  621. typedef struct {
  622. htt_tlv_hdr_t tlv_hdr;
  623. /* Stored as little endian */
  624. A_UINT8 hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN];
  625. A_UINT32 count;
  626. } htt_hw_stats_wd_timeout_tlv;
  627. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff
  628. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0
  629. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_GET(_var) \
  630. (((_var) & HTT_HW_STATS_PDEV_ERRS_MAC_ID_M) >> \
  631. HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)
  632. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_SET(_var, _val) \
  633. do { \
  634. HTT_CHECK_SET_VAL(HTT_HW_STATS_PDEV_ERRS_MAC_ID, _val); \
  635. ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \
  636. } while (0)
  637. typedef struct {
  638. htt_tlv_hdr_t tlv_hdr;
  639. /* BIT [ 7 : 0] :- mac_id
  640. * BIT [31 : 8] :- reserved
  641. */
  642. A_UINT32 mac_id__word;
  643. A_UINT32 tx_abort;
  644. A_UINT32 tx_abort_fail_count;
  645. A_UINT32 rx_abort;
  646. A_UINT32 rx_abort_fail_count;
  647. A_UINT32 warm_reset;
  648. A_UINT32 cold_reset;
  649. A_UINT32 tx_flush;
  650. A_UINT32 tx_glb_reset;
  651. A_UINT32 tx_txq_reset;
  652. A_UINT32 rx_timeout_reset;
  653. } htt_hw_stats_pdev_errs_tlv;
  654. typedef struct {
  655. htt_tlv_hdr_t tlv_hdr;
  656. /* BIT [ 7 : 0] :- mac_id
  657. * BIT [31 : 8] :- reserved
  658. */
  659. A_UINT32 mac_id__word;
  660. A_UINT32 last_unpause_ppdu_id;
  661. A_UINT32 hwsch_unpause_wait_tqm_write;
  662. A_UINT32 hwsch_dummy_tlv_skipped;
  663. A_UINT32 hwsch_misaligned_offset_received;
  664. A_UINT32 hwsch_reset_count;
  665. A_UINT32 hwsch_dev_reset_war;
  666. A_UINT32 hwsch_delayed_pause;
  667. A_UINT32 hwsch_long_delayed_pause;
  668. A_UINT32 sch_rx_ppdu_no_response;
  669. A_UINT32 sch_selfgen_response;
  670. A_UINT32 sch_rx_sifs_resp_trigger;
  671. } htt_hw_stats_whal_tx_tlv;
  672. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  673. * TLV_TAGS:
  674. * - HTT_STATS_HW_PDEV_ERRS_TAG
  675. * - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  676. * - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  677. * - HTT_STATS_WHAL_TX_TAG
  678. */
  679. /* NOTE:
  680. * This structure is for documentation, and cannot be safely used directly.
  681. * Instead, use the constituent TLV structures to fill/parse.
  682. */
  683. typedef struct _htt_pdev_err_stats {
  684. htt_hw_stats_pdev_errs_tlv pdev_errs;
  685. htt_hw_stats_intr_misc_tlv misc_stats[1];
  686. htt_hw_stats_wd_timeout_tlv wd_timeout[1];
  687. htt_hw_stats_whal_tx_tlv whal_tx_stats;
  688. } htt_hw_err_stats_t;
  689. /* ============ PEER STATS ============ */
  690. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M 0x0000ffff
  691. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S 0
  692. #define HTT_MSDU_FLOW_STATS_TID_NUM_M 0x000f0000
  693. #define HTT_MSDU_FLOW_STATS_TID_NUM_S 16
  694. #define HTT_MSDU_FLOW_STATS_DROP_M 0x00100000
  695. #define HTT_MSDU_FLOW_STATS_DROP_S 20
  696. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_GET(_var) \
  697. (((_var) & HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M) >> \
  698. HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)
  699. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_SET(_var, _val) \
  700. do { \
  701. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TX_FLOW_NUM, _val); \
  702. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)); \
  703. } while (0)
  704. #define HTT_MSDU_FLOW_STATS_TID_NUM_GET(_var) \
  705. (((_var) & HTT_MSDU_FLOW_STATS_TID_NUM_M) >> \
  706. HTT_MSDU_FLOW_STATS_TID_NUM_S)
  707. #define HTT_MSDU_FLOW_STATS_TID_NUM_SET(_var, _val) \
  708. do { \
  709. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TID_NUM, _val); \
  710. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TID_NUM_S)); \
  711. } while (0)
  712. #define HTT_MSDU_FLOW_STATS_DROP_GET(_var) \
  713. (((_var) & HTT_MSDU_FLOW_STATS_DROP_M) >> \
  714. HTT_MSDU_FLOW_STATS_DROP_S)
  715. #define HTT_MSDU_FLOW_STATS_DROP_SET(_var, _val) \
  716. do { \
  717. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_DROP, _val); \
  718. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_DROP_S)); \
  719. } while (0)
  720. typedef struct _htt_msdu_flow_stats_tlv {
  721. htt_tlv_hdr_t tlv_hdr;
  722. A_UINT32 last_update_timestamp;
  723. A_UINT32 last_add_timestamp;
  724. A_UINT32 last_remove_timestamp;
  725. A_UINT32 total_processed_msdu_count;
  726. A_UINT32 cur_msdu_count_in_flowq;
  727. A_UINT32 sw_peer_id; /* This will help to find which peer_id is stuck state */
  728. /* BIT [15 : 0] :- tx_flow_number
  729. * BIT [19 : 16] :- tid_num
  730. * BIT [20 : 20] :- drop_rule
  731. * BIT [31 : 21] :- reserved
  732. */
  733. A_UINT32 tx_flow_no__tid_num__drop_rule;
  734. A_UINT32 last_cycle_enqueue_count;
  735. A_UINT32 last_cycle_dequeue_count;
  736. A_UINT32 last_cycle_drop_count;
  737. /* BIT [15 : 0] :- current_drop_th
  738. * BIT [31 : 16] :- reserved
  739. */
  740. A_UINT32 current_drop_th;
  741. } htt_msdu_flow_stats_tlv;
  742. #define MAX_HTT_TID_NAME 8
  743. /* DWORD sw_peer_id__tid_num */
  744. #define HTT_TX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  745. #define HTT_TX_TID_STATS_SW_PEER_ID_S 0
  746. #define HTT_TX_TID_STATS_TID_NUM_M 0xffff0000
  747. #define HTT_TX_TID_STATS_TID_NUM_S 16
  748. #define HTT_TX_TID_STATS_SW_PEER_ID_GET(_var) \
  749. (((_var) & HTT_TX_TID_STATS_SW_PEER_ID_M) >> \
  750. HTT_TX_TID_STATS_SW_PEER_ID_S)
  751. #define HTT_TX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  752. do { \
  753. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_SW_PEER_ID, _val); \
  754. ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \
  755. } while (0)
  756. #define HTT_TX_TID_STATS_TID_NUM_GET(_var) \
  757. (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \
  758. HTT_TX_TID_STATS_TID_NUM_S)
  759. #define HTT_TX_TID_STATS_TID_NUM_SET(_var, _val) \
  760. do { \
  761. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_TID_NUM, _val); \
  762. ((_var) |= ((_val) << HTT_TX_TID_STATS_TID_NUM_S)); \
  763. } while (0)
  764. /* DWORD num_sched_pending__num_ppdu_in_hwq */
  765. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_M 0x000000ff
  766. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_S 0
  767. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M 0x0000ff00
  768. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S 8
  769. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_GET(_var) \
  770. (((_var) & HTT_TX_TID_STATS_NUM_SCHED_PENDING_M) >> \
  771. HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)
  772. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_SET(_var, _val) \
  773. do { \
  774. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_SCHED_PENDING, _val); \
  775. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \
  776. } while (0)
  777. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \
  778. (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \
  779. HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)
  780. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_SET(_var, _val) \
  781. do { \
  782. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ, _val); \
  783. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \
  784. } while (0)
  785. /* Tidq stats */
  786. typedef struct _htt_tx_tid_stats_tlv {
  787. htt_tlv_hdr_t tlv_hdr;
  788. /* Stored as little endian */
  789. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  790. /* BIT [15 : 0] :- sw_peer_id
  791. * BIT [31 : 16] :- tid_num
  792. */
  793. A_UINT32 sw_peer_id__tid_num;
  794. /* BIT [ 7 : 0] :- num_sched_pending
  795. * BIT [15 : 8] :- num_ppdu_in_hwq
  796. * BIT [31 : 16] :- reserved
  797. */
  798. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  799. A_UINT32 tid_flags;
  800. /* per tid # of hw_queued ppdu.*/
  801. A_UINT32 hw_queued;
  802. /* number of per tid successful PPDU. */
  803. A_UINT32 hw_reaped;
  804. /* per tid Num MPDUs filtered by HW */
  805. A_UINT32 mpdus_hw_filter;
  806. A_UINT32 qdepth_bytes;
  807. A_UINT32 qdepth_num_msdu;
  808. A_UINT32 qdepth_num_mpdu;
  809. A_UINT32 last_scheduled_tsmp;
  810. A_UINT32 pause_module_id;
  811. A_UINT32 block_module_id;
  812. /* tid tx airtime in sec */
  813. A_UINT32 tid_tx_airtime;
  814. } htt_tx_tid_stats_tlv;
  815. /* Tidq stats */
  816. typedef struct _htt_tx_tid_stats_v1_tlv {
  817. htt_tlv_hdr_t tlv_hdr;
  818. /* Stored as little endian */
  819. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  820. /* BIT [15 : 0] :- sw_peer_id
  821. * BIT [31 : 16] :- tid_num
  822. */
  823. A_UINT32 sw_peer_id__tid_num;
  824. /* BIT [ 7 : 0] :- num_sched_pending
  825. * BIT [15 : 8] :- num_ppdu_in_hwq
  826. * BIT [31 : 16] :- reserved
  827. */
  828. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  829. A_UINT32 tid_flags;
  830. /* Max qdepth in bytes reached by this tid*/
  831. A_UINT32 max_qdepth_bytes;
  832. /* number of msdus qdepth reached max */
  833. A_UINT32 max_qdepth_n_msdus;
  834. /* Made reserved this field */
  835. A_UINT32 rsvd;
  836. A_UINT32 qdepth_bytes;
  837. A_UINT32 qdepth_num_msdu;
  838. A_UINT32 qdepth_num_mpdu;
  839. A_UINT32 last_scheduled_tsmp;
  840. A_UINT32 pause_module_id;
  841. A_UINT32 block_module_id;
  842. /* tid tx airtime in sec */
  843. A_UINT32 tid_tx_airtime;
  844. A_UINT32 allow_n_flags;
  845. /* BIT [15 : 0] :- sendn_frms_allowed
  846. * BIT [31 : 16] :- reserved
  847. */
  848. A_UINT32 sendn_frms_allowed;
  849. } htt_tx_tid_stats_v1_tlv;
  850. #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  851. #define HTT_RX_TID_STATS_SW_PEER_ID_S 0
  852. #define HTT_RX_TID_STATS_TID_NUM_M 0xffff0000
  853. #define HTT_RX_TID_STATS_TID_NUM_S 16
  854. #define HTT_RX_TID_STATS_SW_PEER_ID_GET(_var) \
  855. (((_var) & HTT_RX_TID_STATS_SW_PEER_ID_M) >> \
  856. HTT_RX_TID_STATS_SW_PEER_ID_S)
  857. #define HTT_RX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  858. do { \
  859. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_SW_PEER_ID, _val); \
  860. ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \
  861. } while (0)
  862. #define HTT_RX_TID_STATS_TID_NUM_GET(_var) \
  863. (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \
  864. HTT_RX_TID_STATS_TID_NUM_S)
  865. #define HTT_RX_TID_STATS_TID_NUM_SET(_var, _val) \
  866. do { \
  867. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_TID_NUM, _val); \
  868. ((_var) |= ((_val) << HTT_RX_TID_STATS_TID_NUM_S)); \
  869. } while (0)
  870. typedef struct _htt_rx_tid_stats_tlv {
  871. htt_tlv_hdr_t tlv_hdr;
  872. /* BIT [15 : 0] : sw_peer_id
  873. * BIT [31 : 16] : tid_num
  874. */
  875. A_UINT32 sw_peer_id__tid_num;
  876. /* Stored as little endian */
  877. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  878. /* dup_in_reorder not collected per tid for now,
  879. as there is no wal_peer back ptr in data rx peer. */
  880. A_UINT32 dup_in_reorder;
  881. A_UINT32 dup_past_outside_window;
  882. A_UINT32 dup_past_within_window;
  883. /* Number of per tid MSDUs with flag of decrypt_err */
  884. A_UINT32 rxdesc_err_decrypt;
  885. /* tid rx airtime in sec */
  886. A_UINT32 tid_rx_airtime;
  887. } htt_rx_tid_stats_tlv;
  888. #define HTT_MAX_COUNTER_NAME 8
  889. typedef struct {
  890. htt_tlv_hdr_t tlv_hdr;
  891. /* Stored as little endian */
  892. A_UINT8 counter_name[HTT_MAX_COUNTER_NAME];
  893. A_UINT32 count;
  894. } htt_counter_tlv;
  895. typedef struct {
  896. htt_tlv_hdr_t tlv_hdr;
  897. /* Number of rx ppdu. */
  898. A_UINT32 ppdu_cnt;
  899. /* Number of rx mpdu. */
  900. A_UINT32 mpdu_cnt;
  901. /* Number of rx msdu */
  902. A_UINT32 msdu_cnt;
  903. /* Pause bitmap */
  904. A_UINT32 pause_bitmap;
  905. /* Block bitmap */
  906. A_UINT32 block_bitmap;
  907. /* Current timestamp */
  908. A_UINT32 current_timestamp;
  909. /* Peer cumulative tx airtime in sec */
  910. A_UINT32 peer_tx_airtime;
  911. /* Peer cumulative rx airtime in sec */
  912. A_UINT32 peer_rx_airtime;
  913. /* Peer current rssi in dBm */
  914. A_INT32 rssi;
  915. /* Total enqueued, dequeued and dropped msdu's for peer */
  916. A_UINT32 peer_enqueued_count_low;
  917. A_UINT32 peer_enqueued_count_high;
  918. A_UINT32 peer_dequeued_count_low;
  919. A_UINT32 peer_dequeued_count_high;
  920. A_UINT32 peer_dropped_count_low;
  921. A_UINT32 peer_dropped_count_high;
  922. /* Total ppdu transmitted bytes for peer: includes MAC header overhead */
  923. A_UINT32 ppdu_transmitted_bytes_low;
  924. A_UINT32 ppdu_transmitted_bytes_high;
  925. A_UINT32 peer_ttl_removed_count;
  926. /* inactive_time
  927. * Running duration of the time since last tx/rx activity by this peer,
  928. * units = seconds.
  929. * If the peer is currently active, this inactive_time will be 0x0.
  930. */
  931. A_UINT32 inactive_time;
  932. } htt_peer_stats_cmn_tlv;
  933. typedef struct {
  934. htt_tlv_hdr_t tlv_hdr;
  935. /* This enum type of HTT_PEER_TYPE */
  936. A_UINT32 peer_type;
  937. A_UINT32 sw_peer_id;
  938. /* BIT [7 : 0] :- vdev_id
  939. * BIT [15 : 8] :- pdev_id
  940. * BIT [31 : 16] :- ast_indx
  941. */
  942. A_UINT32 vdev_pdev_ast_idx;
  943. htt_mac_addr mac_addr;
  944. A_UINT32 peer_flags;
  945. A_UINT32 qpeer_flags;
  946. } htt_peer_details_tlv;
  947. typedef enum {
  948. HTT_STATS_PREAM_OFDM,
  949. HTT_STATS_PREAM_CCK,
  950. HTT_STATS_PREAM_HT,
  951. HTT_STATS_PREAM_VHT,
  952. HTT_STATS_PREAM_HE,
  953. HTT_STATS_PREAM_RSVD,
  954. HTT_STATS_PREAM_RSVD1,
  955. HTT_STATS_PREAM_COUNT,
  956. } HTT_STATS_PREAM_TYPE;
  957. #define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12
  958. #define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
  959. #define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
  960. #define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
  961. #define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  962. #define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  963. typedef struct _htt_tx_peer_rate_stats_tlv {
  964. htt_tlv_hdr_t tlv_hdr;
  965. /* Number of tx ldpc packets */
  966. A_UINT32 tx_ldpc;
  967. /* Number of tx rts packets */
  968. A_UINT32 rts_cnt;
  969. /* RSSI value of last ack packet (units = dB above noise floor) */
  970. A_UINT32 ack_rssi;
  971. A_UINT32 tx_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  972. A_UINT32 tx_su_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  973. A_UINT32 tx_mu_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  974. A_UINT32 tx_nss[HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  975. A_UINT32 tx_bw[HTT_TX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  976. A_UINT32 tx_stbc[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  977. A_UINT32 tx_pream[HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES];
  978. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  979. A_UINT32 tx_gi[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  980. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  981. A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];
  982. } htt_tx_peer_rate_stats_tlv;
  983. #define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12
  984. #define HTT_RX_PEER_STATS_NUM_GI_COUNTERS 4
  985. #define HTT_RX_PEER_STATS_NUM_DCM_COUNTERS 5
  986. #define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
  987. #define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  988. #define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  989. typedef struct _htt_rx_peer_rate_stats_tlv {
  990. htt_tlv_hdr_t tlv_hdr;
  991. A_UINT32 nsts;
  992. /* Number of rx ldpc packets */
  993. A_UINT32 rx_ldpc;
  994. /* Number of rx rts packets */
  995. A_UINT32 rts_cnt;
  996. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  997. A_UINT32 rssi_data; /* units = dB above noise floor */
  998. A_UINT32 rssi_comb; /* units = dB above noise floor */
  999. A_UINT32 rx_mcs[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1000. A_UINT32 rx_nss[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  1001. A_UINT32 rx_dcm[HTT_RX_PEER_STATS_NUM_DCM_COUNTERS];
  1002. A_UINT32 rx_stbc[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1003. A_UINT32 rx_bw[HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  1004. A_UINT32 rx_pream[HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1005. A_UINT8 rssi_chain[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  1006. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  1007. A_UINT32 rx_gi[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1008. A_UINT32 rx_ulofdma_non_data_ppdu; /* ppdu level */
  1009. A_UINT32 rx_ulofdma_data_ppdu; /* ppdu level */
  1010. A_UINT32 rx_ulofdma_mpdu_ok; /* mpdu level */
  1011. A_UINT32 rx_ulofdma_mpdu_fail; /* mpdu level */
  1012. A_INT8 rx_ul_fd_rssi[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS];/* dBm unit */
  1013. } htt_rx_peer_rate_stats_tlv;
  1014. typedef enum {
  1015. HTT_PEER_STATS_REQ_MODE_NO_QUERY,
  1016. HTT_PEER_STATS_REQ_MODE_QUERY_TQM,
  1017. HTT_PEER_STATS_REQ_MODE_FLUSH_TQM,
  1018. } htt_peer_stats_req_mode_t;
  1019. typedef enum {
  1020. HTT_PEER_STATS_CMN_TLV = 0,
  1021. HTT_PEER_DETAILS_TLV = 1,
  1022. HTT_TX_PEER_RATE_STATS_TLV = 2,
  1023. HTT_RX_PEER_RATE_STATS_TLV = 3,
  1024. HTT_TX_TID_STATS_TLV = 4,
  1025. HTT_RX_TID_STATS_TLV = 5,
  1026. HTT_MSDU_FLOW_STATS_TLV = 6,
  1027. HTT_PEER_STATS_MAX_TLV = 31,
  1028. } htt_peer_stats_tlv_enum;
  1029. /* config_param0 */
  1030. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M 0x00000001
  1031. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S 0
  1032. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_M 0x0000FFFE
  1033. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_S 1
  1034. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M 0xFFFF0000
  1035. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S 16
  1036. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET( _var, _val)\
  1037. do { \
  1038. HTT_CHECK_SET_VAL(HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR, _val); \
  1039. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)); \
  1040. } while (0)
  1041. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_GET(_var) \
  1042. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \
  1043. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)
  1044. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \
  1045. (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \
  1046. HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)
  1047. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_SET(_var, _val) \
  1048. do { \
  1049. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)); \
  1050. } while (0)
  1051. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_GET(_var) \
  1052. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M) >> \
  1053. HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)
  1054. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_SET(_var, _val) \
  1055. do { \
  1056. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)); \
  1057. } while (0)
  1058. /* STATS_TYPE : HTT_DBG_EXT_STATS_PEER_INFO
  1059. * TLV_TAGS:
  1060. * - HTT_STATS_PEER_STATS_CMN_TAG
  1061. * - HTT_STATS_PEER_DETAILS_TAG
  1062. * - HTT_STATS_PEER_TX_RATE_STATS_TAG
  1063. * - HTT_STATS_PEER_RX_RATE_STATS_TAG
  1064. * - HTT_STATS_TX_TID_DETAILS_TAG (multiple) (deprecated, so 0 elements in updated systems)
  1065. * - HTT_STATS_RX_TID_DETAILS_TAG (multiple)
  1066. * - HTT_STATS_PEER_MSDU_FLOWQ_TAG (multiple)
  1067. * - HTT_STATS_TX_TID_DETAILS_V1_TAG (multiple)
  1068. */
  1069. /* NOTE:
  1070. * This structure is for documentation, and cannot be safely used directly.
  1071. * Instead, use the constituent TLV structures to fill/parse.
  1072. */
  1073. typedef struct _htt_peer_stats {
  1074. htt_peer_stats_cmn_tlv cmn_tlv;
  1075. htt_peer_details_tlv peer_details;
  1076. /* from g_rate_info_stats */
  1077. htt_tx_peer_rate_stats_tlv tx_rate;
  1078. htt_rx_peer_rate_stats_tlv rx_rate;
  1079. htt_tx_tid_stats_tlv tx_tid_stats[1];
  1080. htt_rx_tid_stats_tlv rx_tid_stats[1];
  1081. htt_msdu_flow_stats_tlv msdu_flowq[1];
  1082. htt_tx_tid_stats_v1_tlv tx_tid_stats_v1[1];
  1083. } htt_peer_stats_t;
  1084. /* =========== ACTIVE PEER LIST ========== */
  1085. /* STATS_TYPE: HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  1086. * TLV_TAGS:
  1087. * - HTT_STATS_PEER_DETAILS_TAG
  1088. */
  1089. /* NOTE:
  1090. * This structure is for documentation, and cannot be safely used directly.
  1091. * Instead, use the constituent TLV structures to fill/parse.
  1092. */
  1093. typedef struct {
  1094. htt_peer_details_tlv peer_details[1];
  1095. } htt_active_peer_details_list_t;
  1096. /* =========== MUMIMO HWQ stats =========== */
  1097. /* MU MIMO stats per hwQ */
  1098. typedef struct {
  1099. htt_tlv_hdr_t tlv_hdr;
  1100. A_UINT32 mu_mimo_sch_posted;
  1101. A_UINT32 mu_mimo_sch_failed;
  1102. A_UINT32 mu_mimo_ppdu_posted;
  1103. } htt_tx_hwq_mu_mimo_sch_stats_tlv;
  1104. typedef struct {
  1105. htt_tlv_hdr_t tlv_hdr;
  1106. A_UINT32 mu_mimo_mpdus_queued_usr; /* Number of mpdus queued per user */
  1107. A_UINT32 mu_mimo_mpdus_tried_usr; /* Number of mpdus actually transmitted by TxPCU per user */
  1108. A_UINT32 mu_mimo_mpdus_failed_usr; /* Number of mpdus failed per user */
  1109. A_UINT32 mu_mimo_mpdus_requeued_usr; /* Number of mpdus requeued per user */
  1110. A_UINT32 mu_mimo_err_no_ba_usr; /* Number of times BA is not received for a user in MU PPDU */
  1111. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1112. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1113. } htt_tx_hwq_mu_mimo_mpdu_stats_tlv;
  1114. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M 0x000000ff
  1115. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S 0
  1116. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M 0x0000ff00
  1117. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S 8
  1118. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_GET(_var) \
  1119. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M) >> \
  1120. HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)
  1121. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_SET(_var, _val) \
  1122. do { \
  1123. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID, _val); \
  1124. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)); \
  1125. } while (0)
  1126. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_GET(_var) \
  1127. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M) >> \
  1128. HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)
  1129. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_SET(_var, _val) \
  1130. do { \
  1131. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID, _val); \
  1132. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)); \
  1133. } while (0)
  1134. typedef struct {
  1135. htt_tlv_hdr_t tlv_hdr;
  1136. /* BIT [ 7 : 0] :- mac_id
  1137. * BIT [15 : 8] :- hwq_id
  1138. * BIT [31 : 16] :- reserved
  1139. */
  1140. A_UINT32 mac_id__hwq_id__word;
  1141. } htt_tx_hwq_mu_mimo_cmn_stats_tlv;
  1142. /* NOTE:
  1143. * This structure is for documentation, and cannot be safely used directly.
  1144. * Instead, use the constituent TLV structures to fill/parse.
  1145. */
  1146. typedef struct {
  1147. struct _hwq_mu_mimo_stats {
  1148. htt_tx_hwq_mu_mimo_cmn_stats_tlv cmn_tlv;
  1149. htt_tx_hwq_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1150. htt_tx_hwq_mu_mimo_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_TX_MAX_NUM_USERS */
  1151. } hwq[1];
  1152. } htt_tx_hwq_mu_mimo_stats_t;
  1153. /* == TX HWQ STATS == */
  1154. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_M 0x000000ff
  1155. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_S 0
  1156. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_M 0x0000ff00
  1157. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_S 8
  1158. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_GET(_var) \
  1159. (((_var) & HTT_TX_HWQ_STATS_CMN_MAC_ID_M) >> \
  1160. HTT_TX_HWQ_STATS_CMN_MAC_ID_S)
  1161. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_SET(_var, _val) \
  1162. do { \
  1163. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_MAC_ID, _val); \
  1164. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_MAC_ID_S)); \
  1165. } while (0)
  1166. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_GET(_var) \
  1167. (((_var) & HTT_TX_HWQ_STATS_CMN_HWQ_ID_M) >> \
  1168. HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)
  1169. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_SET(_var, _val) \
  1170. do { \
  1171. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_HWQ_ID, _val); \
  1172. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)); \
  1173. } while (0)
  1174. typedef struct {
  1175. htt_tlv_hdr_t tlv_hdr;
  1176. /* BIT [ 7 : 0] :- mac_id
  1177. * BIT [15 : 8] :- hwq_id
  1178. * BIT [31 : 16] :- reserved
  1179. */
  1180. A_UINT32 mac_id__hwq_id__word;
  1181. /* PPDU level stats */
  1182. A_UINT32 xretry; /* Number of times ack is failed for the PPDU scheduled on this txQ */
  1183. A_UINT32 underrun_cnt; /* Number of times sched cmd status reported mpdu underrun */
  1184. A_UINT32 flush_cnt; /* Number of times sched cmd is flushed */
  1185. A_UINT32 filt_cnt; /* Number of times sched cmd is filtered */
  1186. A_UINT32 null_mpdu_bmap; /* Number of times HWSCH uploaded null mpdu bitmap */
  1187. A_UINT32 user_ack_failure; /* Number of time user ack or ba tlv is not seen on FES ring where it is expected to be */
  1188. A_UINT32 ack_tlv_proc; /* Number of times TQM processed ack tlv received from HWSCH */
  1189. A_UINT32 sched_id_proc; /* Cache latest processed scheduler ID received from ack ba tlv */
  1190. A_UINT32 null_mpdu_tx_count; /* Number of times TxPCU reported mpdus transmitted for a user is zero */
  1191. A_UINT32 mpdu_bmap_not_recvd; /* Number of times SW did not see any mpdu info bitmap tlv on FES status ring */
  1192. /* Selfgen stats per hwQ */
  1193. A_UINT32 num_bar; /* Number of SU/MU BAR frames posted to hwQ */
  1194. A_UINT32 rts; /* Number of RTS frames posted to hwQ */
  1195. A_UINT32 cts2self; /* Number of cts2self frames posted to hwQ */
  1196. A_UINT32 qos_null; /* Number of qos null frames posted to hwQ */
  1197. /* MPDU level stats */
  1198. A_UINT32 mpdu_tried_cnt; /* mpdus tried Tx by HWSCH/TQM */
  1199. A_UINT32 mpdu_queued_cnt; /* mpdus queued to HWSCH */
  1200. A_UINT32 mpdu_ack_fail_cnt; /* mpdus tried but ack was not received */
  1201. A_UINT32 mpdu_filt_cnt; /* This will include sched cmd flush and time based discard */
  1202. A_UINT32 false_mpdu_ack_count; /* Number of MPDUs for which ACK was sucessful but no Tx happened */
  1203. A_UINT32 txq_timeout; /* Number of times txq timeout happened */
  1204. } htt_tx_hwq_stats_cmn_tlv;
  1205. #define HTT_TX_HWQ_DIFS_LATENCY_STATS_TLV_SZ(_num_elems) ( sizeof(A_UINT32) + /* hist_intvl */ \
  1206. (sizeof(A_UINT32) * (_num_elems)))
  1207. /* NOTE: Variable length TLV, use length spec to infer array size */
  1208. typedef struct {
  1209. htt_tlv_hdr_t tlv_hdr;
  1210. A_UINT32 hist_intvl;
  1211. /* histogram of ppdu post to hwsch - > cmd status received */
  1212. A_UINT32 difs_latency_hist[1]; /* HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS */
  1213. } htt_tx_hwq_difs_latency_stats_tlv_v;
  1214. #define HTT_TX_HWQ_CMD_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1215. /* NOTE: Variable length TLV, use length spec to infer array size */
  1216. typedef struct {
  1217. htt_tlv_hdr_t tlv_hdr;
  1218. /* Histogram of sched cmd result */
  1219. A_UINT32 cmd_result[1]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
  1220. } htt_tx_hwq_cmd_result_stats_tlv_v;
  1221. #define HTT_TX_HWQ_CMD_STALL_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1222. /* NOTE: Variable length TLV, use length spec to infer array size */
  1223. typedef struct {
  1224. htt_tlv_hdr_t tlv_hdr;
  1225. /* Histogram of various pause conitions */
  1226. A_UINT32 cmd_stall_status[1]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
  1227. } htt_tx_hwq_cmd_stall_stats_tlv_v;
  1228. #define HTT_TX_HWQ_FES_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1229. /* NOTE: Variable length TLV, use length spec to infer array size */
  1230. typedef struct {
  1231. htt_tlv_hdr_t tlv_hdr;
  1232. /* Histogram of number of user fes result */
  1233. A_UINT32 fes_result[1]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
  1234. } htt_tx_hwq_fes_result_stats_tlv_v;
  1235. #define HTT_TX_HWQ_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1236. /* NOTE: Variable length TLV, use length spec to infer array size
  1237. *
  1238. * The hwq_tried_mpdu_cnt_hist is a histogram of MPDUs tries per HWQ.
  1239. * The tries here is the count of the MPDUS within a PPDU that the HW
  1240. * had attempted to transmit on air, for the HWSCH Schedule command
  1241. * submitted by FW in this HWQ .It is not the retry attempts. The
  1242. * histogram bins are 0-29, 30-59, 60-89 and so on. The are 10 bins
  1243. * in this histogram.
  1244. * they are defined in FW using the following macros
  1245. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  1246. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  1247. *
  1248. * */
  1249. typedef struct {
  1250. htt_tlv_hdr_t tlv_hdr;
  1251. A_UINT32 hist_bin_size;
  1252. /* Histogram of number of mpdus on tried mpdu */
  1253. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_HWQ_TRIED_MPDU_CNT_HIST */
  1254. } htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v;
  1255. #define HTT_TX_HWQ_TXOP_USED_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1256. /* NOTE: Variable length TLV, use length spec to infer array size
  1257. *
  1258. * The txop_used_cnt_hist is the histogram of txop per burst. After
  1259. * completing the burst, we identify the txop used in the burst and
  1260. * incr the corresponding bin.
  1261. * Each bin represents 1ms & we have 10 bins in this histogram.
  1262. * they are deined in FW using the following macros
  1263. * #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
  1264. * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
  1265. *
  1266. * */
  1267. typedef struct {
  1268. htt_tlv_hdr_t tlv_hdr;
  1269. /* Histogram of txop used cnt */
  1270. A_UINT32 txop_used_cnt_hist[1]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
  1271. } htt_tx_hwq_txop_used_cnt_hist_tlv_v;
  1272. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  1273. * TLV_TAGS:
  1274. * - HTT_STATS_STRING_TAG
  1275. * - HTT_STATS_TX_HWQ_CMN_TAG
  1276. * - HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG
  1277. * - HTT_STATS_TX_HWQ_CMD_RESULT_TAG
  1278. * - HTT_STATS_TX_HWQ_CMD_STALL_TAG
  1279. * - HTT_STATS_TX_HWQ_FES_STATUS_TAG
  1280. * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG
  1281. * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG
  1282. */
  1283. /* NOTE:
  1284. * This structure is for documentation, and cannot be safely used directly.
  1285. * Instead, use the constituent TLV structures to fill/parse.
  1286. * General HWQ stats Mechanism:
  1287. * Once the host request for the stats, FW fill all the HWQ TAGS in a buffer
  1288. * for all the HWQ requested. & the FW send the buffer to host. In the
  1289. * buffer the HWQ ID is filled in mac_id__hwq_id, thus identifying each
  1290. * HWQ distinctly.
  1291. */
  1292. typedef struct _htt_tx_hwq_stats {
  1293. htt_stats_string_tlv hwq_str_tlv;
  1294. htt_tx_hwq_stats_cmn_tlv cmn_tlv;
  1295. htt_tx_hwq_difs_latency_stats_tlv_v difs_tlv;
  1296. htt_tx_hwq_cmd_result_stats_tlv_v cmd_result_tlv;
  1297. htt_tx_hwq_cmd_stall_stats_tlv_v cmd_stall_tlv;
  1298. htt_tx_hwq_fes_result_stats_tlv_v fes_stats_tlv;
  1299. htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v tried_mpdu_tlv;
  1300. htt_tx_hwq_txop_used_cnt_hist_tlv_v txop_used_tlv;
  1301. } htt_tx_hwq_stats_t;
  1302. /* == TX SELFGEN STATS == */
  1303. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M 0x000000ff
  1304. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S 0
  1305. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_GET(_var) \
  1306. (((_var) & HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M) >> \
  1307. HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)
  1308. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_SET(_var, _val) \
  1309. do { \
  1310. HTT_CHECK_SET_VAL(HTT_TX_SELFGEN_CMN_STATS_MAC_ID, _val); \
  1311. ((_var) |= ((_val) << HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)); \
  1312. } while (0)
  1313. typedef struct {
  1314. htt_tlv_hdr_t tlv_hdr;
  1315. /* BIT [ 7 : 0] :- mac_id
  1316. * BIT [31 : 8] :- reserved
  1317. */
  1318. A_UINT32 mac_id__word;
  1319. A_UINT32 su_bar;
  1320. A_UINT32 rts;
  1321. A_UINT32 cts2self;
  1322. A_UINT32 qos_null;
  1323. A_UINT32 delayed_bar_1; /* MU user 1 */
  1324. A_UINT32 delayed_bar_2; /* MU user 2 */
  1325. A_UINT32 delayed_bar_3; /* MU user 3 */
  1326. A_UINT32 delayed_bar_4; /* MU user 4 */
  1327. A_UINT32 delayed_bar_5; /* MU user 5 */
  1328. A_UINT32 delayed_bar_6; /* MU user 6 */
  1329. A_UINT32 delayed_bar_7; /* MU user 7 */
  1330. } htt_tx_selfgen_cmn_stats_tlv;
  1331. typedef struct {
  1332. htt_tlv_hdr_t tlv_hdr;
  1333. /* 11AC */
  1334. A_UINT32 ac_su_ndpa;
  1335. A_UINT32 ac_su_ndp;
  1336. A_UINT32 ac_mu_mimo_ndpa;
  1337. A_UINT32 ac_mu_mimo_ndp;
  1338. A_UINT32 ac_mu_mimo_brpoll_1; /* MU user 1 */
  1339. A_UINT32 ac_mu_mimo_brpoll_2; /* MU user 2 */
  1340. A_UINT32 ac_mu_mimo_brpoll_3; /* MU user 3 */
  1341. } htt_tx_selfgen_ac_stats_tlv;
  1342. typedef struct {
  1343. htt_tlv_hdr_t tlv_hdr;
  1344. /* 11AX */
  1345. A_UINT32 ax_su_ndpa;
  1346. A_UINT32 ax_su_ndp;
  1347. A_UINT32 ax_mu_mimo_ndpa;
  1348. A_UINT32 ax_mu_mimo_ndp;
  1349. A_UINT32 ax_mu_mimo_brpoll_1; /* MU user 1 */
  1350. A_UINT32 ax_mu_mimo_brpoll_2; /* MU user 2 */
  1351. A_UINT32 ax_mu_mimo_brpoll_3; /* MU user 3 */
  1352. A_UINT32 ax_mu_mimo_brpoll_4; /* MU user 4 */
  1353. A_UINT32 ax_mu_mimo_brpoll_5; /* MU user 5 */
  1354. A_UINT32 ax_mu_mimo_brpoll_6; /* MU user 6 */
  1355. A_UINT32 ax_mu_mimo_brpoll_7; /* MU user 7 */
  1356. A_UINT32 ax_basic_trigger;
  1357. A_UINT32 ax_bsr_trigger;
  1358. A_UINT32 ax_mu_bar_trigger;
  1359. A_UINT32 ax_mu_rts_trigger;
  1360. } htt_tx_selfgen_ax_stats_tlv;
  1361. typedef struct {
  1362. htt_tlv_hdr_t tlv_hdr;
  1363. /* 11AC error stats */
  1364. A_UINT32 ac_su_ndp_err;
  1365. A_UINT32 ac_su_ndpa_err;
  1366. A_UINT32 ac_mu_mimo_ndpa_err;
  1367. A_UINT32 ac_mu_mimo_ndp_err;
  1368. A_UINT32 ac_mu_mimo_brp1_err;
  1369. A_UINT32 ac_mu_mimo_brp2_err;
  1370. A_UINT32 ac_mu_mimo_brp3_err;
  1371. } htt_tx_selfgen_ac_err_stats_tlv;
  1372. typedef struct {
  1373. htt_tlv_hdr_t tlv_hdr;
  1374. /* 11AX error stats */
  1375. A_UINT32 ax_su_ndp_err;
  1376. A_UINT32 ax_su_ndpa_err;
  1377. A_UINT32 ax_mu_mimo_ndpa_err;
  1378. A_UINT32 ax_mu_mimo_ndp_err;
  1379. A_UINT32 ax_mu_mimo_brp1_err;
  1380. A_UINT32 ax_mu_mimo_brp2_err;
  1381. A_UINT32 ax_mu_mimo_brp3_err;
  1382. A_UINT32 ax_mu_mimo_brp4_err;
  1383. A_UINT32 ax_mu_mimo_brp5_err;
  1384. A_UINT32 ax_mu_mimo_brp6_err;
  1385. A_UINT32 ax_mu_mimo_brp7_err;
  1386. A_UINT32 ax_basic_trigger_err;
  1387. A_UINT32 ax_bsr_trigger_err;
  1388. A_UINT32 ax_mu_bar_trigger_err;
  1389. A_UINT32 ax_mu_rts_trigger_err;
  1390. } htt_tx_selfgen_ax_err_stats_tlv;
  1391. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  1392. * TLV_TAGS:
  1393. * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG
  1394. * - HTT_STATS_TX_SELFGEN_AC_STATS_TAG
  1395. * - HTT_STATS_TX_SELFGEN_AX_STATS_TAG
  1396. * - HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG
  1397. * - HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG
  1398. */
  1399. /* NOTE:
  1400. * This structure is for documentation, and cannot be safely used directly.
  1401. * Instead, use the constituent TLV structures to fill/parse.
  1402. */
  1403. typedef struct {
  1404. htt_tx_selfgen_cmn_stats_tlv cmn_tlv;
  1405. /* 11AC */
  1406. htt_tx_selfgen_ac_stats_tlv ac_tlv;
  1407. /* 11AX */
  1408. htt_tx_selfgen_ax_stats_tlv ax_tlv;
  1409. /* 11AC error stats */
  1410. htt_tx_selfgen_ac_err_stats_tlv ac_err_tlv;
  1411. /* 11AX error stats */
  1412. htt_tx_selfgen_ax_err_stats_tlv ax_err_tlv;
  1413. } htt_tx_pdev_selfgen_stats_t;
  1414. /* == TX MU STATS == */
  1415. #define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
  1416. #define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
  1417. #define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
  1418. typedef struct {
  1419. htt_tlv_hdr_t tlv_hdr;
  1420. /* mu-mimo sw sched cmd stats */
  1421. A_UINT32 mu_mimo_sch_posted;
  1422. A_UINT32 mu_mimo_sch_failed;
  1423. /* MU PPDU stats per hwQ */
  1424. A_UINT32 mu_mimo_ppdu_posted;
  1425. /*
  1426. * Counts the number of users in each transmission of
  1427. * the given TX mode.
  1428. *
  1429. * Index is the number of users - 1.
  1430. */
  1431. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  1432. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  1433. A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1434. } htt_tx_pdev_mu_mimo_sch_stats_tlv;
  1435. typedef struct {
  1436. htt_tlv_hdr_t tlv_hdr;
  1437. /* mu-mimo mpdu level stats */
  1438. /*
  1439. * This first block of stats is limited to 11ac
  1440. * MU-MIMO transmission.
  1441. */
  1442. A_UINT32 mu_mimo_mpdus_queued_usr;
  1443. A_UINT32 mu_mimo_mpdus_tried_usr;
  1444. A_UINT32 mu_mimo_mpdus_failed_usr;
  1445. A_UINT32 mu_mimo_mpdus_requeued_usr;
  1446. A_UINT32 mu_mimo_err_no_ba_usr;
  1447. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1448. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1449. A_UINT32 ax_mu_mimo_mpdus_queued_usr;
  1450. A_UINT32 ax_mu_mimo_mpdus_tried_usr;
  1451. A_UINT32 ax_mu_mimo_mpdus_failed_usr;
  1452. A_UINT32 ax_mu_mimo_mpdus_requeued_usr;
  1453. A_UINT32 ax_mu_mimo_err_no_ba_usr;
  1454. A_UINT32 ax_mu_mimo_mpdu_underrun_usr;
  1455. A_UINT32 ax_mu_mimo_ampdu_underrun_usr;
  1456. A_UINT32 ax_ofdma_mpdus_queued_usr;
  1457. A_UINT32 ax_ofdma_mpdus_tried_usr;
  1458. A_UINT32 ax_ofdma_mpdus_failed_usr;
  1459. A_UINT32 ax_ofdma_mpdus_requeued_usr;
  1460. A_UINT32 ax_ofdma_err_no_ba_usr;
  1461. A_UINT32 ax_ofdma_mpdu_underrun_usr;
  1462. A_UINT32 ax_ofdma_ampdu_underrun_usr;
  1463. } htt_tx_pdev_mu_mimo_mpdu_stats_tlv;
  1464. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC 1 /* SCHED_TX_MODE_MU_MIMO_AC */
  1465. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX 2 /* SCHED_TX_MODE_MU_MIMO_AX */
  1466. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX 3 /* SCHED_TX_MODE_MU_OFDMA_AX */
  1467. typedef struct {
  1468. htt_tlv_hdr_t tlv_hdr;
  1469. /* mpdu level stats */
  1470. A_UINT32 mpdus_queued_usr;
  1471. A_UINT32 mpdus_tried_usr;
  1472. A_UINT32 mpdus_failed_usr;
  1473. A_UINT32 mpdus_requeued_usr;
  1474. A_UINT32 err_no_ba_usr;
  1475. A_UINT32 mpdu_underrun_usr;
  1476. A_UINT32 ampdu_underrun_usr;
  1477. A_UINT32 user_index;
  1478. A_UINT32 tx_sched_mode; /* HTT_STATS_TX_SCHED_MODE_xxx */
  1479. } htt_tx_pdev_mpdu_stats_tlv;
  1480. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_MU
  1481. * TLV_TAGS:
  1482. * - HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG (multiple)
  1483. * - HTT_STATS_TX_PDEV_MPDU_STATS_TAG (multiple)
  1484. */
  1485. /* NOTE:
  1486. * This structure is for documentation, and cannot be safely used directly.
  1487. * Instead, use the constituent TLV structures to fill/parse.
  1488. */
  1489. typedef struct {
  1490. htt_tx_pdev_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1491. /*
  1492. * Note that though mu_mimo_mpdu_stats_tlv is named MU-MIMO,
  1493. * it can also hold MU-OFDMA stats.
  1494. */
  1495. htt_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
  1496. } htt_tx_pdev_mu_mimo_stats_t;
  1497. /* == TX SCHED STATS == */
  1498. #define HTT_SCHED_TXQ_CMD_POSTED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1499. /* NOTE: Variable length TLV, use length spec to infer array size */
  1500. typedef struct {
  1501. htt_tlv_hdr_t tlv_hdr;
  1502. /* Scheduler command posted per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1503. A_UINT32 sched_cmd_posted[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1504. } htt_sched_txq_cmd_posted_tlv_v;
  1505. #define HTT_SCHED_TXQ_CMD_REAPED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1506. /* NOTE: Variable length TLV, use length spec to infer array size */
  1507. typedef struct {
  1508. htt_tlv_hdr_t tlv_hdr;
  1509. /* Scheduler command reaped per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1510. A_UINT32 sched_cmd_reaped[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1511. } htt_sched_txq_cmd_reaped_tlv_v;
  1512. #define HTT_SCHED_TXQ_SCHED_ORDER_SU_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1513. /* NOTE: Variable length TLV, use length spec to infer array size */
  1514. typedef struct {
  1515. htt_tlv_hdr_t tlv_hdr;
  1516. /*
  1517. * sched_order_su contains the peer IDs of peers chosen in the last
  1518. * NUM_SCHED_ORDER_LOG scheduler instances.
  1519. * The array is circular; it's unspecified which array element corresponds
  1520. * to the most recent scheduler invocation, and which corresponds to
  1521. * the (NUM_SCHED_ORDER_LOG-1) most recent scheduler invocation.
  1522. */
  1523. A_UINT32 sched_order_su[1]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
  1524. } htt_sched_txq_sched_order_su_tlv_v;
  1525. typedef enum {
  1526. HTT_SCHED_TID_SKIP_SCHED_MASK_DISABLED = 0, /* Skip the tid when WAL_TID_DISABLE_TX_SCHED_MASK is true */
  1527. HTT_SCHED_TID_SKIP_NOTIFY_MPDU, /* Skip the tid's 2nd sched_cmd when 1st cmd is ongoing */
  1528. HTT_SCHED_TID_SKIP_MPDU_STATE_INVALID, /* Skip the tid when MPDU state is invalid */
  1529. HTT_SCHED_TID_SKIP_SCHED_DISABLED, /* Skip the tid when scheduling is disabled for that tid */
  1530. HTT_SCHED_TID_SKIP_TQM_BYPASS_CMD_PENDING, /* Skip the TQM bypass tid when it has pending sched_cmd */
  1531. HTT_SCHED_TID_SKIP_SECOND_SU_SCHEDULE, /* Skip tid from 2nd SU schedule when any of the following flag is set
  1532. WAL_TX_TID(SEND_BAR | TQM_MPDU_STATE_VALID | SEND_QOS_NULL | TQM_NOTIFY_MPDU | SENDN_PENDING) */
  1533. HTT_SCHED_TID_SKIP_CMD_SLOT_NOT_AVAIL, /* Skip the tid when command slot is not available */
  1534. HTT_SCHED_TID_SKIP_NO_ENQ, /* Skip the tid when num_frames is zero with g_disable_remove_tid as true */
  1535. HTT_SCHED_TID_SKIP_LOW_ENQ, /* Skip the tid when enqueue is low */
  1536. HTT_SCHED_TID_SKIP_PAUSED, /* Skipping the paused tid(sendn-frames) */
  1537. HTT_SCHED_TID_SKIP_UL, /* UL tid skip */
  1538. HTT_SCHED_TID_REMOVE_PAUSED, /* Removing the paused tid when number of sendn frames is zero */
  1539. HTT_SCHED_TID_REMOVE_NO_ENQ, /* Remove tid with zero queue depth */
  1540. HTT_SCHED_TID_REMOVE_UL, /* UL tid remove */
  1541. HTT_SCHED_TID_QUERY, /* Moving to next user and adding tid in prepend list when qstats update is pending */
  1542. HTT_SCHED_TID_SU_ONLY, /* Tid is eligible and TX_SCHED_SU_ONLY is true */
  1543. HTT_SCHED_TID_ELIGIBLE, /* Tid is eligible for scheduling */
  1544. HTT_SCHED_INELIGIBILITY_MAX,
  1545. } htt_sched_txq_sched_ineligibility_tlv_enum;
  1546. #define HTT_SCHED_TXQ_SCHED_INELIGIBILITY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1547. /* NOTE: Variable length TLV, use length spec to infer array size */
  1548. typedef struct {
  1549. htt_tlv_hdr_t tlv_hdr;
  1550. /* sched_ineligibility counts the number of occurrences of different reasons for tid ineligibility during eligibility checks per txq in scheduling */
  1551. A_UINT32 sched_ineligibility[1]; /* indexed by htt_sched_txq_sched_ineligibility_tlv_enum */
  1552. } htt_sched_txq_sched_ineligibility_tlv_v;
  1553. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff
  1554. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0
  1555. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M 0x0000ff00
  1556. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S 8
  1557. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_GET(_var) \
  1558. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M) >> \
  1559. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)
  1560. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_SET(_var, _val) \
  1561. do { \
  1562. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID, _val); \
  1563. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)); \
  1564. } while (0)
  1565. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_GET(_var) \
  1566. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M) >> \
  1567. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)
  1568. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_SET(_var, _val) \
  1569. do { \
  1570. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID, _val); \
  1571. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)); \
  1572. } while (0)
  1573. typedef struct {
  1574. htt_tlv_hdr_t tlv_hdr;
  1575. /* BIT [ 7 : 0] :- mac_id
  1576. * BIT [15 : 8] :- txq_id
  1577. * BIT [31 : 16] :- reserved
  1578. */
  1579. A_UINT32 mac_id__txq_id__word;
  1580. /* Scheduler policy ised for this TxQ */
  1581. A_UINT32 sched_policy;
  1582. /* Timestamp of last scheduler command posted */
  1583. A_UINT32 last_sched_cmd_posted_timestamp;
  1584. /* Timestamp of last scheduler command completed */
  1585. A_UINT32 last_sched_cmd_compl_timestamp;
  1586. /* Num of Sched2TAC ring hit Low Water Mark condition */
  1587. A_UINT32 sched_2_tac_lwm_count;
  1588. /* Num of Sched2TAC ring full condition */
  1589. A_UINT32 sched_2_tac_ring_full;
  1590. /* Num of scheduler command post failures that includes su/mu mimo/mu ofdma sequence type */
  1591. A_UINT32 sched_cmd_post_failure;
  1592. /* Num of active tids for this TxQ at current instance */
  1593. A_UINT32 num_active_tids;
  1594. /* Num of powersave schedules */
  1595. A_UINT32 num_ps_schedules;
  1596. /* Num of scheduler commands pending for this TxQ */
  1597. A_UINT32 sched_cmds_pending;
  1598. /* Num of tidq registration for this TxQ */
  1599. A_UINT32 num_tid_register;
  1600. /* Num of tidq de-registration for this TxQ */
  1601. A_UINT32 num_tid_unregister;
  1602. /* Num of iterations msduq stats was updated */
  1603. A_UINT32 num_qstats_queried;
  1604. /* qstats query update status */
  1605. A_UINT32 qstats_update_pending;
  1606. /* Timestamp of Last query stats made */
  1607. A_UINT32 last_qstats_query_timestamp;
  1608. /* Num of sched2tqm command queue full condition */
  1609. A_UINT32 num_tqm_cmdq_full;
  1610. /* Num of scheduler trigger from DE Module */
  1611. A_UINT32 num_de_sched_algo_trigger;
  1612. /* Num of scheduler trigger from RT Module */
  1613. A_UINT32 num_rt_sched_algo_trigger;
  1614. /* Num of scheduler trigger from TQM Module */
  1615. A_UINT32 num_tqm_sched_algo_trigger;
  1616. /* Num of schedules for notify frame */
  1617. A_UINT32 notify_sched;
  1618. /* Duration based sendn termination */
  1619. A_UINT32 dur_based_sendn_term;
  1620. } htt_tx_pdev_stats_sched_per_txq_tlv;
  1621. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
  1622. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_S 0
  1623. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_GET(_var) \
  1624. (((_var) & HTT_STATS_TX_SCHED_CMN_MAC_ID_M) >> \
  1625. HTT_STATS_TX_SCHED_CMN_MAC_ID_S)
  1626. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_SET(_var, _val) \
  1627. do { \
  1628. HTT_CHECK_SET_VAL(HTT_STATS_TX_SCHED_CMN_MAC_ID, _val); \
  1629. ((_var) |= ((_val) << HTT_STATS_TX_SCHED_CMN_MAC_ID_S)); \
  1630. } while (0)
  1631. typedef struct {
  1632. htt_tlv_hdr_t tlv_hdr;
  1633. /* BIT [ 7 : 0] :- mac_id
  1634. * BIT [31 : 8] :- reserved
  1635. */
  1636. A_UINT32 mac_id__word;
  1637. /* Current timestamp */
  1638. A_UINT32 current_timestamp;
  1639. } htt_stats_tx_sched_cmn_tlv;
  1640. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  1641. * TLV_TAGS:
  1642. * - HTT_STATS_TX_SCHED_CMN_TAG
  1643. * - HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG
  1644. * - HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG
  1645. * - HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG
  1646. * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG
  1647. * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG
  1648. */
  1649. /* NOTE:
  1650. * This structure is for documentation, and cannot be safely used directly.
  1651. * Instead, use the constituent TLV structures to fill/parse.
  1652. */
  1653. typedef struct {
  1654. htt_stats_tx_sched_cmn_tlv cmn_tlv;
  1655. struct _txq_tx_sched_stats {
  1656. htt_tx_pdev_stats_sched_per_txq_tlv txq_tlv;
  1657. htt_sched_txq_cmd_posted_tlv_v cmd_posted_tlv;
  1658. htt_sched_txq_cmd_reaped_tlv_v cmd_reaped_tlv;
  1659. htt_sched_txq_sched_order_su_tlv_v sched_order_su_tlv;
  1660. htt_sched_txq_sched_ineligibility_tlv_v sched_ineligibility_tlv;
  1661. } txq[1];
  1662. } htt_stats_tx_sched_t;
  1663. /* == TQM STATS == */
  1664. #define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 16
  1665. #define HTT_TX_TQM_MAX_LIST_MPDU_END_REASON 16
  1666. #define HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS 16
  1667. #define HTT_TX_TQM_GEN_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1668. /* NOTE: Variable length TLV, use length spec to infer array size */
  1669. typedef struct {
  1670. htt_tlv_hdr_t tlv_hdr;
  1671. A_UINT32 gen_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
  1672. } htt_tx_tqm_gen_mpdu_stats_tlv_v;
  1673. #define HTT_TX_TQM_LIST_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1674. /* NOTE: Variable length TLV, use length spec to infer array size */
  1675. typedef struct {
  1676. htt_tlv_hdr_t tlv_hdr;
  1677. A_UINT32 list_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
  1678. } htt_tx_tqm_list_mpdu_stats_tlv_v;
  1679. #define HTT_TX_TQM_LIST_MPDU_CNT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1680. /* NOTE: Variable length TLV, use length spec to infer array size */
  1681. typedef struct {
  1682. htt_tlv_hdr_t tlv_hdr;
  1683. A_UINT32 list_mpdu_cnt_hist[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
  1684. } htt_tx_tqm_list_mpdu_cnt_tlv_v;
  1685. typedef struct {
  1686. htt_tlv_hdr_t tlv_hdr;
  1687. A_UINT32 msdu_count;
  1688. A_UINT32 mpdu_count;
  1689. A_UINT32 remove_msdu;
  1690. A_UINT32 remove_mpdu;
  1691. A_UINT32 remove_msdu_ttl;
  1692. A_UINT32 send_bar;
  1693. A_UINT32 bar_sync;
  1694. A_UINT32 notify_mpdu;
  1695. A_UINT32 sync_cmd;
  1696. A_UINT32 write_cmd;
  1697. A_UINT32 hwsch_trigger;
  1698. A_UINT32 ack_tlv_proc;
  1699. A_UINT32 gen_mpdu_cmd;
  1700. A_UINT32 gen_list_cmd;
  1701. A_UINT32 remove_mpdu_cmd;
  1702. A_UINT32 remove_mpdu_tried_cmd;
  1703. A_UINT32 mpdu_queue_stats_cmd;
  1704. A_UINT32 mpdu_head_info_cmd;
  1705. A_UINT32 msdu_flow_stats_cmd;
  1706. A_UINT32 remove_msdu_cmd;
  1707. A_UINT32 remove_msdu_ttl_cmd;
  1708. A_UINT32 flush_cache_cmd;
  1709. A_UINT32 update_mpduq_cmd;
  1710. A_UINT32 enqueue;
  1711. A_UINT32 enqueue_notify;
  1712. A_UINT32 notify_mpdu_at_head;
  1713. A_UINT32 notify_mpdu_state_valid;
  1714. /*
  1715. * On receiving TQM_FLOW_NOT_EMPTY_STATUS from TQM, (on MSDUs being enqueued
  1716. * the flow is non empty), if the number of MSDUs is greater than the threshold,
  1717. * notify is incremented. UDP_THRESH counters are for UDP MSDUs, and NONUDP are
  1718. * for non-UDP MSDUs.
  1719. * MSDUQ_SWNOTIFY_UDP_THRESH1 threshold - sched_udp_notify1 is incremented
  1720. * MSDUQ_SWNOTIFY_UDP_THRESH2 threshold - sched_udp_notify2 is incremented
  1721. * MSDUQ_SWNOTIFY_NONUDP_THRESH1 threshold - sched_nonudp_notify1 is incremented
  1722. * MSDUQ_SWNOTIFY_NONUDP_THRESH2 threshold - sched_nonudp_notify2 is incremented
  1723. *
  1724. * Notify signifies that we trigger the scheduler.
  1725. */
  1726. A_UINT32 sched_udp_notify1;
  1727. A_UINT32 sched_udp_notify2;
  1728. A_UINT32 sched_nonudp_notify1;
  1729. A_UINT32 sched_nonudp_notify2;
  1730. } htt_tx_tqm_pdev_stats_tlv_v;
  1731. #define HTT_TX_TQM_CMN_STATS_MAC_ID_M 0x000000ff
  1732. #define HTT_TX_TQM_CMN_STATS_MAC_ID_S 0
  1733. #define HTT_TX_TQM_CMN_STATS_MAC_ID_GET(_var) \
  1734. (((_var) & HTT_TX_TQM_CMN_STATS_MAC_ID_M) >> \
  1735. HTT_TX_TQM_CMN_STATS_MAC_ID_S)
  1736. #define HTT_TX_TQM_CMN_STATS_MAC_ID_SET(_var, _val) \
  1737. do { \
  1738. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMN_STATS_MAC_ID, _val); \
  1739. ((_var) |= ((_val) << HTT_TX_TQM_CMN_STATS_MAC_ID_S)); \
  1740. } while (0)
  1741. typedef struct {
  1742. htt_tlv_hdr_t tlv_hdr;
  1743. /* BIT [ 7 : 0] :- mac_id
  1744. * BIT [31 : 8] :- reserved
  1745. */
  1746. A_UINT32 mac_id__word;
  1747. A_UINT32 max_cmdq_id;
  1748. A_UINT32 list_mpdu_cnt_hist_intvl;
  1749. /* Global stats */
  1750. A_UINT32 add_msdu;
  1751. A_UINT32 q_empty;
  1752. A_UINT32 q_not_empty;
  1753. A_UINT32 drop_notification;
  1754. A_UINT32 desc_threshold;
  1755. } htt_tx_tqm_cmn_stats_tlv;
  1756. typedef struct {
  1757. htt_tlv_hdr_t tlv_hdr;
  1758. /* Error stats */
  1759. A_UINT32 q_empty_failure;
  1760. A_UINT32 q_not_empty_failure;
  1761. A_UINT32 add_msdu_failure;
  1762. } htt_tx_tqm_error_stats_tlv;
  1763. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TQM
  1764. * TLV_TAGS:
  1765. * - HTT_STATS_TX_TQM_CMN_TAG
  1766. * - HTT_STATS_TX_TQM_ERROR_STATS_TAG
  1767. * - HTT_STATS_TX_TQM_GEN_MPDU_TAG
  1768. * - HTT_STATS_TX_TQM_LIST_MPDU_TAG
  1769. * - HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG
  1770. * - HTT_STATS_TX_TQM_PDEV_TAG
  1771. */
  1772. /* NOTE:
  1773. * This structure is for documentation, and cannot be safely used directly.
  1774. * Instead, use the constituent TLV structures to fill/parse.
  1775. */
  1776. typedef struct {
  1777. htt_tx_tqm_cmn_stats_tlv cmn_tlv;
  1778. htt_tx_tqm_error_stats_tlv err_tlv;
  1779. htt_tx_tqm_gen_mpdu_stats_tlv_v gen_mpdu_stats_tlv;
  1780. htt_tx_tqm_list_mpdu_stats_tlv_v list_mpdu_stats_tlv;
  1781. htt_tx_tqm_list_mpdu_cnt_tlv_v list_mpdu_cnt_tlv;
  1782. htt_tx_tqm_pdev_stats_tlv_v tqm_pdev_stats_tlv;
  1783. } htt_tx_tqm_pdev_stats_t;
  1784. /* == TQM CMDQ stats == */
  1785. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M 0x000000ff
  1786. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S 0
  1787. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M 0x0000ff00
  1788. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S 8
  1789. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_GET(_var) \
  1790. (((_var) & HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M) >> \
  1791. HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)
  1792. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_SET(_var, _val) \
  1793. do { \
  1794. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_MAC_ID, _val); \
  1795. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)); \
  1796. } while (0)
  1797. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_GET(_var) \
  1798. (((_var) & HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M) >> \
  1799. HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)
  1800. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_SET(_var, _val) \
  1801. do { \
  1802. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID, _val); \
  1803. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)); \
  1804. } while (0)
  1805. typedef struct {
  1806. htt_tlv_hdr_t tlv_hdr;
  1807. /* BIT [ 7 : 0] :- mac_id
  1808. * BIT [15 : 8] :- cmdq_id
  1809. * BIT [31 : 16] :- reserved
  1810. */
  1811. A_UINT32 mac_id__cmdq_id__word;
  1812. A_UINT32 sync_cmd;
  1813. A_UINT32 write_cmd;
  1814. A_UINT32 gen_mpdu_cmd;
  1815. A_UINT32 mpdu_queue_stats_cmd;
  1816. A_UINT32 mpdu_head_info_cmd;
  1817. A_UINT32 msdu_flow_stats_cmd;
  1818. A_UINT32 remove_mpdu_cmd;
  1819. A_UINT32 remove_msdu_cmd;
  1820. A_UINT32 flush_cache_cmd;
  1821. A_UINT32 update_mpduq_cmd;
  1822. A_UINT32 update_msduq_cmd;
  1823. } htt_tx_tqm_cmdq_status_tlv;
  1824. /* STATS_TYPE : HTT_DBG_EXT_STATS_TQM_CMDQ
  1825. * TLV_TAGS:
  1826. * - HTT_STATS_STRING_TAG
  1827. * - HTT_STATS_TX_TQM_CMDQ_STATUS_TAG
  1828. */
  1829. /* NOTE:
  1830. * This structure is for documentation, and cannot be safely used directly.
  1831. * Instead, use the constituent TLV structures to fill/parse.
  1832. */
  1833. typedef struct {
  1834. struct _cmdq_stats {
  1835. htt_stats_string_tlv cmdq_str_tlv;
  1836. htt_tx_tqm_cmdq_status_tlv status_tlv;
  1837. } q[1];
  1838. } htt_tx_tqm_cmdq_stats_t;
  1839. /* == TX-DE STATS == */
  1840. /* Structures for tx de stats */
  1841. typedef struct {
  1842. htt_tlv_hdr_t tlv_hdr;
  1843. A_UINT32 m1_packets;
  1844. A_UINT32 m2_packets;
  1845. A_UINT32 m3_packets;
  1846. A_UINT32 m4_packets;
  1847. A_UINT32 g1_packets;
  1848. A_UINT32 g2_packets;
  1849. } htt_tx_de_eapol_packets_stats_tlv;
  1850. typedef struct {
  1851. htt_tlv_hdr_t tlv_hdr;
  1852. A_UINT32 ap_bss_peer_not_found;
  1853. A_UINT32 ap_bcast_mcast_no_peer;
  1854. A_UINT32 sta_delete_in_progress;
  1855. A_UINT32 ibss_no_bss_peer;
  1856. A_UINT32 invaild_vdev_type;
  1857. A_UINT32 invalid_ast_peer_entry;
  1858. A_UINT32 peer_entry_invalid;
  1859. A_UINT32 ethertype_not_ip;
  1860. A_UINT32 eapol_lookup_failed;
  1861. A_UINT32 qpeer_not_allow_data;
  1862. A_UINT32 fse_tid_override;
  1863. A_UINT32 ipv6_jumbogram_zero_length;
  1864. A_UINT32 qos_to_non_qos_in_prog;
  1865. } htt_tx_de_classify_failed_stats_tlv;
  1866. typedef struct {
  1867. htt_tlv_hdr_t tlv_hdr;
  1868. A_UINT32 arp_packets;
  1869. A_UINT32 igmp_packets;
  1870. A_UINT32 dhcp_packets;
  1871. A_UINT32 host_inspected;
  1872. A_UINT32 htt_included;
  1873. A_UINT32 htt_valid_mcs;
  1874. A_UINT32 htt_valid_nss;
  1875. A_UINT32 htt_valid_preamble_type;
  1876. A_UINT32 htt_valid_chainmask;
  1877. A_UINT32 htt_valid_guard_interval;
  1878. A_UINT32 htt_valid_retries;
  1879. A_UINT32 htt_valid_bw_info;
  1880. A_UINT32 htt_valid_power;
  1881. A_UINT32 htt_valid_key_flags;
  1882. A_UINT32 htt_valid_no_encryption;
  1883. A_UINT32 fse_entry_count;
  1884. A_UINT32 fse_priority_be;
  1885. A_UINT32 fse_priority_high;
  1886. A_UINT32 fse_priority_low;
  1887. A_UINT32 fse_traffic_ptrn_be;
  1888. A_UINT32 fse_traffic_ptrn_over_sub;
  1889. A_UINT32 fse_traffic_ptrn_bursty;
  1890. A_UINT32 fse_traffic_ptrn_interactive;
  1891. A_UINT32 fse_traffic_ptrn_periodic;
  1892. A_UINT32 fse_hwqueue_alloc;
  1893. A_UINT32 fse_hwqueue_created;
  1894. A_UINT32 fse_hwqueue_send_to_host;
  1895. A_UINT32 mcast_entry;
  1896. A_UINT32 bcast_entry;
  1897. A_UINT32 htt_update_peer_cache;
  1898. A_UINT32 htt_learning_frame;
  1899. A_UINT32 fse_invalid_peer;
  1900. /*
  1901. * mec_notify is HTT TX WBM multicast echo check notification
  1902. * from firmware to host. FW sends SA addresses to host for all
  1903. * multicast/broadcast packets received on STA side.
  1904. */
  1905. A_UINT32 mec_notify;
  1906. } htt_tx_de_classify_stats_tlv;
  1907. typedef struct {
  1908. htt_tlv_hdr_t tlv_hdr;
  1909. A_UINT32 eok;
  1910. A_UINT32 classify_done;
  1911. A_UINT32 lookup_failed;
  1912. A_UINT32 send_host_dhcp;
  1913. A_UINT32 send_host_mcast;
  1914. A_UINT32 send_host_unknown_dest;
  1915. A_UINT32 send_host;
  1916. A_UINT32 status_invalid;
  1917. } htt_tx_de_classify_status_stats_tlv;
  1918. typedef struct {
  1919. htt_tlv_hdr_t tlv_hdr;
  1920. A_UINT32 enqueued_pkts;
  1921. A_UINT32 to_tqm;
  1922. A_UINT32 to_tqm_bypass;
  1923. } htt_tx_de_enqueue_packets_stats_tlv;
  1924. typedef struct {
  1925. htt_tlv_hdr_t tlv_hdr;
  1926. A_UINT32 discarded_pkts;
  1927. A_UINT32 local_frames;
  1928. A_UINT32 is_ext_msdu;
  1929. } htt_tx_de_enqueue_discard_stats_tlv;
  1930. typedef struct {
  1931. htt_tlv_hdr_t tlv_hdr;
  1932. A_UINT32 tcl_dummy_frame;
  1933. A_UINT32 tqm_dummy_frame;
  1934. A_UINT32 tqm_notify_frame;
  1935. A_UINT32 fw2wbm_enq;
  1936. A_UINT32 tqm_bypass_frame;
  1937. } htt_tx_de_compl_stats_tlv;
  1938. #define HTT_TX_DE_CMN_STATS_MAC_ID_M 0x000000ff
  1939. #define HTT_TX_DE_CMN_STATS_MAC_ID_S 0
  1940. #define HTT_TX_DE_CMN_STATS_MAC_ID_GET(_var) \
  1941. (((_var) & HTT_TX_DE_CMN_STATS_MAC_ID_M) >> \
  1942. HTT_TX_DE_CMN_STATS_MAC_ID_S)
  1943. #define HTT_TX_DE_CMN_STATS_MAC_ID_SET(_var, _val) \
  1944. do { \
  1945. HTT_CHECK_SET_VAL(HTT_TX_DE_CMN_STATS_MAC_ID, _val); \
  1946. ((_var) |= ((_val) << HTT_TX_DE_CMN_STATS_MAC_ID_S)); \
  1947. } while (0)
  1948. /*
  1949. * The htt_tx_de_fw2wbm_ring_full_hist_tlv is a histogram of time we waited
  1950. * for the fw2wbm ring buffer. we are requesting a buffer in FW2WBM release
  1951. * ring,which may fail, due to non availability of buffer. Hence we sleep for
  1952. * 200us & again request for it. This is a histogram of time we wait, with
  1953. * bin of 200ms & there are 10 bin (2 seconds max)
  1954. * They are defined by the following macros in FW
  1955. * #define ENTRIES_PER_BIN_COUNT 1000 // per bin 1000 * 200us = 200ms
  1956. * #define RING_FULL_BIN_ENTRIES (WAL_TX_DE_FW2WBM_ALLOC_TIMEOUT_COUNT /
  1957. * ENTRIES_PER_BIN_COUNT)
  1958. */
  1959. typedef struct {
  1960. htt_tlv_hdr_t tlv_hdr;
  1961. A_UINT32 fw2wbm_ring_full_hist[1];
  1962. } htt_tx_de_fw2wbm_ring_full_hist_tlv;
  1963. typedef struct {
  1964. htt_tlv_hdr_t tlv_hdr;
  1965. /* BIT [ 7 : 0] :- mac_id
  1966. * BIT [31 : 8] :- reserved
  1967. */
  1968. A_UINT32 mac_id__word;
  1969. /* Global Stats */
  1970. A_UINT32 tcl2fw_entry_count;
  1971. A_UINT32 not_to_fw;
  1972. A_UINT32 invalid_pdev_vdev_peer;
  1973. A_UINT32 tcl_res_invalid_addrx;
  1974. A_UINT32 wbm2fw_entry_count;
  1975. A_UINT32 invalid_pdev;
  1976. } htt_tx_de_cmn_stats_tlv;
  1977. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
  1978. * TLV_TAGS:
  1979. * - HTT_STATS_TX_DE_CMN_TAG
  1980. * - HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG
  1981. * - HTT_STATS_TX_DE_EAPOL_PACKETS_TAG
  1982. * - HTT_STATS_TX_DE_CLASSIFY_STATS_TAG
  1983. * - HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG
  1984. * - HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG
  1985. * - HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG
  1986. * - HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG
  1987. * - HTT_STATS_TX_DE_COMPL_STATS_TAG
  1988. */
  1989. /* NOTE:
  1990. * This structure is for documentation, and cannot be safely used directly.
  1991. * Instead, use the constituent TLV structures to fill/parse.
  1992. */
  1993. typedef struct {
  1994. htt_tx_de_cmn_stats_tlv cmn_tlv;
  1995. htt_tx_de_fw2wbm_ring_full_hist_tlv fw2wbm_hist_tlv;
  1996. htt_tx_de_eapol_packets_stats_tlv eapol_stats_tlv;
  1997. htt_tx_de_classify_stats_tlv classify_stats_tlv;
  1998. htt_tx_de_classify_failed_stats_tlv classify_failed_tlv;
  1999. htt_tx_de_classify_status_stats_tlv classify_status_rlv;
  2000. htt_tx_de_enqueue_packets_stats_tlv enqueue_packets_tlv;
  2001. htt_tx_de_enqueue_discard_stats_tlv enqueue_discard_tlv;
  2002. htt_tx_de_compl_stats_tlv comp_status_tlv;
  2003. } htt_tx_de_stats_t;
  2004. /* == RING-IF STATS == */
  2005. /* DWORD num_elems__prefetch_tail_idx */
  2006. #define HTT_RING_IF_STATS_NUM_ELEMS_M 0x0000ffff
  2007. #define HTT_RING_IF_STATS_NUM_ELEMS_S 0
  2008. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M 0xffff0000
  2009. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S 16
  2010. #define HTT_RING_IF_STATS_NUM_ELEMS_GET(_var) \
  2011. (((_var) & HTT_RING_IF_STATS_NUM_ELEMS_M) >> \
  2012. HTT_RING_IF_STATS_NUM_ELEMS_S)
  2013. #define HTT_RING_IF_STATS_NUM_ELEMS_SET(_var, _val) \
  2014. do { \
  2015. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_NUM_ELEMS, _val); \
  2016. ((_var) |= ((_val) << HTT_RING_IF_STATS_NUM_ELEMS_S)); \
  2017. } while (0)
  2018. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_GET(_var) \
  2019. (((_var) & HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M) >> \
  2020. HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)
  2021. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_SET(_var, _val) \
  2022. do { \
  2023. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_PREFETCH_TAIL_IDX, _val); \
  2024. ((_var) |= ((_val) << HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)); \
  2025. } while (0)
  2026. /* DWORD head_idx__tail_idx */
  2027. #define HTT_RING_IF_STATS_HEAD_IDX_M 0x0000ffff
  2028. #define HTT_RING_IF_STATS_HEAD_IDX_S 0
  2029. #define HTT_RING_IF_STATS_TAIL_IDX_M 0xffff0000
  2030. #define HTT_RING_IF_STATS_TAIL_IDX_S 16
  2031. #define HTT_RING_IF_STATS_HEAD_IDX_GET(_var) \
  2032. (((_var) & HTT_RING_IF_STATS_HEAD_IDX_M) >> \
  2033. HTT_RING_IF_STATS_HEAD_IDX_S)
  2034. #define HTT_RING_IF_STATS_HEAD_IDX_SET(_var, _val) \
  2035. do { \
  2036. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HEAD_IDX, _val); \
  2037. ((_var) |= ((_val) << HTT_RING_IF_STATS_HEAD_IDX_S)); \
  2038. } while (0)
  2039. #define HTT_RING_IF_STATS_TAIL_IDX_GET(_var) \
  2040. (((_var) & HTT_RING_IF_STATS_TAIL_IDX_M) >> \
  2041. HTT_RING_IF_STATS_TAIL_IDX_S)
  2042. #define HTT_RING_IF_STATS_TAIL_IDX_SET(_var, _val) \
  2043. do { \
  2044. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_TAIL_IDX, _val); \
  2045. ((_var) |= ((_val) << HTT_RING_IF_STATS_TAIL_IDX_S)); \
  2046. } while (0)
  2047. /* DWORD shadow_head_idx__shadow_tail_idx */
  2048. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M 0x0000ffff
  2049. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S 0
  2050. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M 0xffff0000
  2051. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S 16
  2052. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_GET(_var) \
  2053. (((_var) & HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M) >> \
  2054. HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)
  2055. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_SET(_var, _val) \
  2056. do { \
  2057. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_HEAD_IDX, _val); \
  2058. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)); \
  2059. } while (0)
  2060. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_GET(_var) \
  2061. (((_var) & HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M) >> \
  2062. HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)
  2063. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_SET(_var, _val) \
  2064. do { \
  2065. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_TAIL_IDX, _val); \
  2066. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)); \
  2067. } while (0)
  2068. /* DWORD lwm_thresh__hwm_thresh */
  2069. #define HTT_RING_IF_STATS_LWM_THRESHOLD_M 0x0000ffff
  2070. #define HTT_RING_IF_STATS_LWM_THRESHOLD_S 0
  2071. #define HTT_RING_IF_STATS_HWM_THRESHOLD_M 0xffff0000
  2072. #define HTT_RING_IF_STATS_HWM_THRESHOLD_S 16
  2073. #define HTT_RING_IF_STATS_LWM_THRESHOLD_GET(_var) \
  2074. (((_var) & HTT_RING_IF_STATS_LWM_THRESHOLD_M) >> \
  2075. HTT_RING_IF_STATS_LWM_THRESHOLD_S)
  2076. #define HTT_RING_IF_STATS_LWM_THRESHOLD_SET(_var, _val) \
  2077. do { \
  2078. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_LWM_THRESHOLD, _val); \
  2079. ((_var) |= ((_val) << HTT_RING_IF_STATS_LWM_THRESHOLD_S)); \
  2080. } while (0)
  2081. #define HTT_RING_IF_STATS_HWM_THRESHOLD_GET(_var) \
  2082. (((_var) & HTT_RING_IF_STATS_HWM_THRESHOLD_M) >> \
  2083. HTT_RING_IF_STATS_HWM_THRESHOLD_S)
  2084. #define HTT_RING_IF_STATS_HWM_THRESHOLD_SET(_var, _val) \
  2085. do { \
  2086. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HWM_THRESHOLD, _val); \
  2087. ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \
  2088. } while (0)
  2089. #define HTT_STATS_LOW_WM_BINS 5
  2090. #define HTT_STATS_HIGH_WM_BINS 5
  2091. typedef struct {
  2092. A_UINT32 base_addr; /* DWORD aligned base memory address of the ring */
  2093. A_UINT32 elem_size; /* size of each ring element */
  2094. /* BIT [15 : 0] :- num_elems
  2095. * BIT [31 : 16] :- prefetch_tail_idx
  2096. */
  2097. A_UINT32 num_elems__prefetch_tail_idx;
  2098. /* BIT [15 : 0] :- head_idx
  2099. * BIT [31 : 16] :- tail_idx
  2100. */
  2101. A_UINT32 head_idx__tail_idx;
  2102. /* BIT [15 : 0] :- shadow_head_idx
  2103. * BIT [31 : 16] :- shadow_tail_idx
  2104. */
  2105. A_UINT32 shadow_head_idx__shadow_tail_idx;
  2106. A_UINT32 num_tail_incr;
  2107. /* BIT [15 : 0] :- lwm_thresh
  2108. * BIT [31 : 16] :- hwm_thresh
  2109. */
  2110. A_UINT32 lwm_thresh__hwm_thresh;
  2111. A_UINT32 overrun_hit_count;
  2112. A_UINT32 underrun_hit_count;
  2113. A_UINT32 prod_blockwait_count;
  2114. A_UINT32 cons_blockwait_count;
  2115. A_UINT32 low_wm_hit_count[HTT_STATS_LOW_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2116. A_UINT32 high_wm_hit_count[HTT_STATS_HIGH_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2117. } htt_ring_if_stats_tlv;
  2118. #define HTT_RING_IF_CMN_MAC_ID_M 0x000000ff
  2119. #define HTT_RING_IF_CMN_MAC_ID_S 0
  2120. #define HTT_RING_IF_CMN_MAC_ID_GET(_var) \
  2121. (((_var) & HTT_RING_IF_CMN_MAC_ID_M) >> \
  2122. HTT_RING_IF_CMN_MAC_ID_S)
  2123. #define HTT_RING_IF_CMN_MAC_ID_SET(_var, _val) \
  2124. do { \
  2125. HTT_CHECK_SET_VAL(HTT_RING_IF_CMN_MAC_ID, _val); \
  2126. ((_var) |= ((_val) << HTT_RING_IF_CMN_MAC_ID_S)); \
  2127. } while (0)
  2128. typedef struct {
  2129. htt_tlv_hdr_t tlv_hdr;
  2130. /* BIT [ 7 : 0] :- mac_id
  2131. * BIT [31 : 8] :- reserved
  2132. */
  2133. A_UINT32 mac_id__word;
  2134. A_UINT32 num_records;
  2135. } htt_ring_if_cmn_tlv;
  2136. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2137. * TLV_TAGS:
  2138. * - HTT_STATS_RING_IF_CMN_TAG
  2139. * - HTT_STATS_STRING_TAG
  2140. * - HTT_STATS_RING_IF_TAG
  2141. */
  2142. /* NOTE:
  2143. * This structure is for documentation, and cannot be safely used directly.
  2144. * Instead, use the constituent TLV structures to fill/parse.
  2145. */
  2146. typedef struct {
  2147. htt_ring_if_cmn_tlv cmn_tlv;
  2148. /* Variable based on the Number of records. */
  2149. struct _ring_if {
  2150. htt_stats_string_tlv ring_str_tlv;
  2151. htt_ring_if_stats_tlv ring_tlv;
  2152. } r[1];
  2153. } htt_ring_if_stats_t;
  2154. /* == SFM STATS == */
  2155. #define HTT_SFM_CLIENT_USER_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2156. /* NOTE: Variable length TLV, use length spec to infer array size */
  2157. typedef struct {
  2158. htt_tlv_hdr_t tlv_hdr;
  2159. /* Number of DWORDS used per user and per client */
  2160. A_UINT32 dwords_used_by_user_n[1];
  2161. } htt_sfm_client_user_tlv_v;
  2162. typedef struct {
  2163. htt_tlv_hdr_t tlv_hdr;
  2164. /* Client ID */
  2165. A_UINT32 client_id;
  2166. /* Minimum number of buffers */
  2167. A_UINT32 buf_min;
  2168. /* Maximum number of buffers */
  2169. A_UINT32 buf_max;
  2170. /* Number of Busy buffers */
  2171. A_UINT32 buf_busy;
  2172. /* Number of Allocated buffers */
  2173. A_UINT32 buf_alloc;
  2174. /* Number of Available/Usable buffers */
  2175. A_UINT32 buf_avail;
  2176. /* Number of users */
  2177. A_UINT32 num_users;
  2178. } htt_sfm_client_tlv;
  2179. #define HTT_SFM_CMN_MAC_ID_M 0x000000ff
  2180. #define HTT_SFM_CMN_MAC_ID_S 0
  2181. #define HTT_SFM_CMN_MAC_ID_GET(_var) \
  2182. (((_var) & HTT_SFM_CMN_MAC_ID_M) >> \
  2183. HTT_SFM_CMN_MAC_ID_S)
  2184. #define HTT_SFM_CMN_MAC_ID_SET(_var, _val) \
  2185. do { \
  2186. HTT_CHECK_SET_VAL(HTT_SFM_CMN_MAC_ID, _val); \
  2187. ((_var) |= ((_val) << HTT_SFM_CMN_MAC_ID_S)); \
  2188. } while (0)
  2189. typedef struct {
  2190. htt_tlv_hdr_t tlv_hdr;
  2191. /* BIT [ 7 : 0] :- mac_id
  2192. * BIT [31 : 8] :- reserved
  2193. */
  2194. A_UINT32 mac_id__word;
  2195. /* Indicates the total number of 128 byte buffers in the CMEM that are available for buffer sharing */
  2196. A_UINT32 buf_total;
  2197. /* Indicates for certain client or all the clients there is no dowrd saved in SFM, refer to SFM_R1_MEM_EMPTY */
  2198. A_UINT32 mem_empty;
  2199. /* DEALLOCATE_BUFFERS, refer to register SFM_R0_DEALLOCATE_BUFFERS */
  2200. A_UINT32 deallocate_bufs;
  2201. /* Number of Records */
  2202. A_UINT32 num_records;
  2203. } htt_sfm_cmn_tlv;
  2204. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2205. * TLV_TAGS:
  2206. * - HTT_STATS_SFM_CMN_TAG
  2207. * - HTT_STATS_STRING_TAG
  2208. * - HTT_STATS_SFM_CLIENT_TAG
  2209. * - HTT_STATS_SFM_CLIENT_USER_TAG
  2210. */
  2211. /* NOTE:
  2212. * This structure is for documentation, and cannot be safely used directly.
  2213. * Instead, use the constituent TLV structures to fill/parse.
  2214. */
  2215. typedef struct {
  2216. htt_sfm_cmn_tlv cmn_tlv;
  2217. /* Variable based on the Number of records. */
  2218. struct _sfm_client {
  2219. htt_stats_string_tlv client_str_tlv;
  2220. htt_sfm_client_tlv client_tlv;
  2221. htt_sfm_client_user_tlv_v user_tlv;
  2222. } r[1];
  2223. } htt_sfm_stats_t;
  2224. /* == SRNG STATS == */
  2225. /* DWORD mac_id__ring_id__arena__ep */
  2226. #define HTT_SRING_STATS_MAC_ID_M 0x000000ff
  2227. #define HTT_SRING_STATS_MAC_ID_S 0
  2228. #define HTT_SRING_STATS_RING_ID_M 0x0000ff00
  2229. #define HTT_SRING_STATS_RING_ID_S 8
  2230. #define HTT_SRING_STATS_ARENA_M 0x00ff0000
  2231. #define HTT_SRING_STATS_ARENA_S 16
  2232. #define HTT_SRING_STATS_EP_TYPE_M 0x01000000
  2233. #define HTT_SRING_STATS_EP_TYPE_S 24
  2234. #define HTT_SRING_STATS_MAC_ID_GET(_var) \
  2235. (((_var) & HTT_SRING_STATS_MAC_ID_M) >> \
  2236. HTT_SRING_STATS_MAC_ID_S)
  2237. #define HTT_SRING_STATS_MAC_ID_SET(_var, _val) \
  2238. do { \
  2239. HTT_CHECK_SET_VAL(HTT_SRING_STATS_MAC_ID, _val); \
  2240. ((_var) |= ((_val) << HTT_SRING_STATS_MAC_ID_S)); \
  2241. } while (0)
  2242. #define HTT_SRING_STATS_RING_ID_GET(_var) \
  2243. (((_var) & HTT_SRING_STATS_RING_ID_M) >> \
  2244. HTT_SRING_STATS_RING_ID_S)
  2245. #define HTT_SRING_STATS_RING_ID_SET(_var, _val) \
  2246. do { \
  2247. HTT_CHECK_SET_VAL(HTT_SRING_STATS_RING_ID, _val); \
  2248. ((_var) |= ((_val) << HTT_SRING_STATS_RING_ID_S)); \
  2249. } while (0)
  2250. #define HTT_SRING_STATS_ARENA_GET(_var) \
  2251. (((_var) & HTT_SRING_STATS_ARENA_M) >> \
  2252. HTT_SRING_STATS_ARENA_S)
  2253. #define HTT_SRING_STATS_ARENA_SET(_var, _val) \
  2254. do { \
  2255. HTT_CHECK_SET_VAL(HTT_SRING_STATS_ARENA, _val); \
  2256. ((_var) |= ((_val) << HTT_SRING_STATS_ARENA_S)); \
  2257. } while (0)
  2258. #define HTT_SRING_STATS_EP_TYPE_GET(_var) \
  2259. (((_var) & HTT_SRING_STATS_EP_TYPE_M) >> \
  2260. HTT_SRING_STATS_EP_TYPE_S)
  2261. #define HTT_SRING_STATS_EP_TYPE_SET(_var, _val) \
  2262. do { \
  2263. HTT_CHECK_SET_VAL(HTT_SRING_STATS_EP_TYPE, _val); \
  2264. ((_var) |= ((_val) << HTT_SRING_STATS_EP_TYPE_S)); \
  2265. } while (0)
  2266. /* DWORD num_avail_words__num_valid_words */
  2267. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_M 0x0000ffff
  2268. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_S 0
  2269. #define HTT_SRING_STATS_NUM_VALID_WORDS_M 0xffff0000
  2270. #define HTT_SRING_STATS_NUM_VALID_WORDS_S 16
  2271. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_GET(_var) \
  2272. (((_var) & HTT_SRING_STATS_NUM_AVAIL_WORDS_M) >> \
  2273. HTT_SRING_STATS_NUM_AVAIL_WORDS_S)
  2274. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_SET(_var, _val) \
  2275. do { \
  2276. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_AVAIL_WORDS, _val); \
  2277. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_AVAIL_WORDS_S)); \
  2278. } while (0)
  2279. #define HTT_SRING_STATS_NUM_VALID_WORDS_GET(_var) \
  2280. (((_var) & HTT_SRING_STATS_NUM_VALID_WORDS_M) >> \
  2281. HTT_SRING_STATS_NUM_VALID_WORDS_S)
  2282. #define HTT_SRING_STATS_NUM_VALID_WORDS_SET(_var, _val) \
  2283. do { \
  2284. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_VALID_WORDS, _val); \
  2285. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_VALID_WORDS_S)); \
  2286. } while (0)
  2287. /* DWORD head_ptr__tail_ptr */
  2288. #define HTT_SRING_STATS_HEAD_PTR_M 0x0000ffff
  2289. #define HTT_SRING_STATS_HEAD_PTR_S 0
  2290. #define HTT_SRING_STATS_TAIL_PTR_M 0xffff0000
  2291. #define HTT_SRING_STATS_TAIL_PTR_S 16
  2292. #define HTT_SRING_STATS_HEAD_PTR_GET(_var) \
  2293. (((_var) & HTT_SRING_STATS_HEAD_PTR_M) >> \
  2294. HTT_SRING_STATS_HEAD_PTR_S)
  2295. #define HTT_SRING_STATS_HEAD_PTR_SET(_var, _val) \
  2296. do { \
  2297. HTT_CHECK_SET_VAL(HTT_SRING_STATS_HEAD_PTR, _val); \
  2298. ((_var) |= ((_val) << HTT_SRING_STATS_HEAD_PTR_S)); \
  2299. } while (0)
  2300. #define HTT_SRING_STATS_TAIL_PTR_GET(_var) \
  2301. (((_var) & HTT_SRING_STATS_TAIL_PTR_M) >> \
  2302. HTT_SRING_STATS_TAIL_PTR_S)
  2303. #define HTT_SRING_STATS_TAIL_PTR_SET(_var, _val) \
  2304. do { \
  2305. HTT_CHECK_SET_VAL(HTT_SRING_STATS_TAIL_PTR, _val); \
  2306. ((_var) |= ((_val) << HTT_SRING_STATS_TAIL_PTR_S)); \
  2307. } while (0)
  2308. /* DWORD consumer_empty__producer_full */
  2309. #define HTT_SRING_STATS_CONSUMER_EMPTY_M 0x0000ffff
  2310. #define HTT_SRING_STATS_CONSUMER_EMPTY_S 0
  2311. #define HTT_SRING_STATS_PRODUCER_FULL_M 0xffff0000
  2312. #define HTT_SRING_STATS_PRODUCER_FULL_S 16
  2313. #define HTT_SRING_STATS_CONSUMER_EMPTY_GET(_var) \
  2314. (((_var) & HTT_SRING_STATS_CONSUMER_EMPTY_M) >> \
  2315. HTT_SRING_STATS_CONSUMER_EMPTY_S)
  2316. #define HTT_SRING_STATS_CONSUMER_EMPTY_SET(_var, _val) \
  2317. do { \
  2318. HTT_CHECK_SET_VAL(HTT_SRING_STATS_CONSUMER_EMPTY, _val); \
  2319. ((_var) |= ((_val) << HTT_SRING_STATS_CONSUMER_EMPTY_S)); \
  2320. } while (0)
  2321. #define HTT_SRING_STATS_PRODUCER_FULL_GET(_var) \
  2322. (((_var) & HTT_SRING_STATS_PRODUCER_FULL_M) >> \
  2323. HTT_SRING_STATS_PRODUCER_FULL_S)
  2324. #define HTT_SRING_STATS_PRODUCER_FULL_SET(_var, _val) \
  2325. do { \
  2326. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PRODUCER_FULL, _val); \
  2327. ((_var) |= ((_val) << HTT_SRING_STATS_PRODUCER_FULL_S)); \
  2328. } while (0)
  2329. /* DWORD prefetch_count__internal_tail_ptr */
  2330. #define HTT_SRING_STATS_PREFETCH_COUNT_M 0x0000ffff
  2331. #define HTT_SRING_STATS_PREFETCH_COUNT_S 0
  2332. #define HTT_SRING_STATS_INTERNAL_TP_M 0xffff0000
  2333. #define HTT_SRING_STATS_INTERNAL_TP_S 16
  2334. #define HTT_SRING_STATS_PREFETCH_COUNT_GET(_var) \
  2335. (((_var) & HTT_SRING_STATS_PREFETCH_COUNT_M) >> \
  2336. HTT_SRING_STATS_PREFETCH_COUNT_S)
  2337. #define HTT_SRING_STATS_PREFETCH_COUNT_SET(_var, _val) \
  2338. do { \
  2339. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PREFETCH_COUNT, _val); \
  2340. ((_var) |= ((_val) << HTT_SRING_STATS_PREFETCH_COUNT_S)); \
  2341. } while (0)
  2342. #define HTT_SRING_STATS_INTERNAL_TP_GET(_var) \
  2343. (((_var) & HTT_SRING_STATS_INTERNAL_TP_M) >> \
  2344. HTT_SRING_STATS_INTERNAL_TP_S)
  2345. #define HTT_SRING_STATS_INTERNAL_TP_SET(_var, _val) \
  2346. do { \
  2347. HTT_CHECK_SET_VAL(HTT_SRING_STATS_INTERNAL_TP, _val); \
  2348. ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \
  2349. } while (0)
  2350. typedef struct {
  2351. htt_tlv_hdr_t tlv_hdr;
  2352. /* BIT [ 7 : 0] :- mac_id
  2353. * BIT [15 : 8] :- ring_id
  2354. * BIT [23 : 16] :- arena 0 -SRING_HRAM, 1 - SRING_HCRAM, 2 - SRING_HW2HW.
  2355. * BIT [24 : 24] :- EP 0 -consumer, 1 - producer
  2356. * BIT [31 : 25] :- reserved
  2357. */
  2358. A_UINT32 mac_id__ring_id__arena__ep;
  2359. A_UINT32 base_addr_lsb; /* DWORD aligned base memory address of the ring */
  2360. A_UINT32 base_addr_msb;
  2361. A_UINT32 ring_size; /* size of ring */
  2362. A_UINT32 elem_size; /* size of each ring element */
  2363. /* Ring status */
  2364. /* BIT [15 : 0] :- num_avail_words
  2365. * BIT [31 : 16] :- num_valid_words
  2366. */
  2367. A_UINT32 num_avail_words__num_valid_words;
  2368. /* Index of head and tail */
  2369. /* BIT [15 : 0] :- head_ptr
  2370. * BIT [31 : 16] :- tail_ptr
  2371. */
  2372. A_UINT32 head_ptr__tail_ptr;
  2373. /* Empty or full counter of rings */
  2374. /* BIT [15 : 0] :- consumer_empty
  2375. * BIT [31 : 16] :- producer_full
  2376. */
  2377. A_UINT32 consumer_empty__producer_full;
  2378. /* Prefetch status of consumer ring */
  2379. /* BIT [15 : 0] :- prefetch_count
  2380. * BIT [31 : 16] :- internal_tail_ptr
  2381. */
  2382. A_UINT32 prefetch_count__internal_tail_ptr;
  2383. } htt_sring_stats_tlv;
  2384. typedef struct {
  2385. htt_tlv_hdr_t tlv_hdr;
  2386. A_UINT32 num_records;
  2387. } htt_sring_cmn_tlv;
  2388. /* STATS_TYPE : HTT_DBG_EXT_STATS_SRNG_INFO
  2389. * TLV_TAGS:
  2390. * - HTT_STATS_SRING_CMN_TAG
  2391. * - HTT_STATS_STRING_TAG
  2392. * - HTT_STATS_SRING_STATS_TAG
  2393. */
  2394. /* NOTE:
  2395. * This structure is for documentation, and cannot be safely used directly.
  2396. * Instead, use the constituent TLV structures to fill/parse.
  2397. */
  2398. typedef struct {
  2399. htt_sring_cmn_tlv cmn_tlv;
  2400. /* Variable based on the Number of records. */
  2401. struct _sring_stats {
  2402. htt_stats_string_tlv sring_str_tlv;
  2403. htt_sring_stats_tlv sring_stats_tlv;
  2404. } r[1];
  2405. } htt_sring_stats_t;
  2406. /* == PDEV TX RATE CTRL STATS == */
  2407. #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2408. #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
  2409. #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2410. #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
  2411. #define HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2412. #define HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2413. #define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2414. #define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2415. #define HTT_TX_PDEV_STATS_NUM_LTF 4
  2416. #define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \
  2417. (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \
  2418. HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)
  2419. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2420. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_S 0
  2421. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2422. (((_var) & HTT_TX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2423. HTT_TX_PDEV_RATE_STATS_MAC_ID_S)
  2424. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2425. do { \
  2426. HTT_CHECK_SET_VAL(HTT_TX_PDEV_RATE_STATS_MAC_ID, _val); \
  2427. ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
  2428. } while (0)
  2429. typedef struct {
  2430. htt_tlv_hdr_t tlv_hdr;
  2431. /* BIT [ 7 : 0] :- mac_id
  2432. * BIT [31 : 8] :- reserved
  2433. */
  2434. A_UINT32 mac_id__word;
  2435. /* Number of tx ldpc packets */
  2436. A_UINT32 tx_ldpc;
  2437. /* Number of tx rts packets */
  2438. A_UINT32 rts_cnt;
  2439. /* RSSI value of last ack packet (units = dB above noise floor) */
  2440. A_UINT32 ack_rssi;
  2441. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2442. /* tx_xx_mcs: currently unused */
  2443. A_UINT32 tx_su_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2444. A_UINT32 tx_mu_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2445. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2446. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2447. A_UINT32 tx_stbc[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2448. A_UINT32 tx_pream[HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2449. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  2450. A_UINT32 tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2451. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  2452. A_UINT32 tx_dcm[HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS];
  2453. /* Number of CTS-acknowledged RTS packets */
  2454. A_UINT32 rts_success;
  2455. /*
  2456. * Counters for legacy 11a and 11b transmissions.
  2457. *
  2458. * The index corresponds to:
  2459. *
  2460. * CCK: 0: 1 Mbps, 1: 2 Mbps, 2: 5.5 Mbps, 3: 11 Mbps
  2461. *
  2462. * OFDM: 0: 6 Mbps, 1: 9 Mbps, 2: 12 Mbps, 3: 18 Mbps,
  2463. * 4: 24 Mbps, 5: 36 Mbps, 6: 48 Mbps, 7: 54 Mbps
  2464. */
  2465. A_UINT32 tx_legacy_cck_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2466. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2467. A_UINT32 ac_mu_mimo_tx_ldpc;
  2468. A_UINT32 ax_mu_mimo_tx_ldpc;
  2469. A_UINT32 ofdma_tx_ldpc;
  2470. /*
  2471. * Counters for 11ax HE LTF selection during TX.
  2472. *
  2473. * The index corresponds to:
  2474. *
  2475. * 0: unused, 1: 1x LTF, 2: 2x LTF, 3: 4x LTF
  2476. */
  2477. A_UINT32 tx_he_ltf[HTT_TX_PDEV_STATS_NUM_LTF];
  2478. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2479. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2480. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2481. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2482. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2483. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2484. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2485. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2486. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2487. A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2488. A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2489. A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2490. } htt_tx_pdev_rate_stats_tlv;
  2491. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
  2492. * TLV_TAGS:
  2493. * - HTT_STATS_TX_PDEV_RATE_STATS_TAG
  2494. */
  2495. /* NOTE:
  2496. * This structure is for documentation, and cannot be safely used directly.
  2497. * Instead, use the constituent TLV structures to fill/parse.
  2498. */
  2499. typedef struct {
  2500. htt_tx_pdev_rate_stats_tlv rate_tlv;
  2501. } htt_tx_pdev_rate_stats_t;
  2502. /* == PDEV RX RATE CTRL STATS == */
  2503. #define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2504. #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2505. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2506. #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
  2507. #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2508. #define HTT_RX_PDEV_STATS_NUM_BW_COUNTERS 4
  2509. #define HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2510. #define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2511. #define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8
  2512. #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16
  2513. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2514. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0
  2515. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2516. (((_var) & HTT_RX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2517. HTT_RX_PDEV_RATE_STATS_MAC_ID_S)
  2518. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2519. do { \
  2520. HTT_CHECK_SET_VAL(HTT_RX_PDEV_RATE_STATS_MAC_ID, _val); \
  2521. ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
  2522. } while (0)
  2523. typedef struct {
  2524. htt_tlv_hdr_t tlv_hdr;
  2525. /* BIT [ 7 : 0] :- mac_id
  2526. * BIT [31 : 8] :- reserved
  2527. */
  2528. A_UINT32 mac_id__word;
  2529. A_UINT32 nsts;
  2530. /* Number of rx ldpc packets */
  2531. A_UINT32 rx_ldpc;
  2532. /* Number of rx rts packets */
  2533. A_UINT32 rts_cnt;
  2534. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  2535. A_UINT32 rssi_data; /* units = dB above noise floor */
  2536. A_UINT32 rssi_comb; /* units = dB above noise floor */
  2537. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2538. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2539. A_UINT32 rx_dcm[HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS];
  2540. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2541. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2542. A_UINT32 rx_pream[HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2543. A_UINT8 rssi_chain[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  2544. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  2545. A_UINT32 rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2546. A_INT32 rssi_in_dbm; /* rx Signal Strength value in dBm unit */
  2547. A_UINT32 rx_11ax_su_ext;
  2548. A_UINT32 rx_11ac_mumimo;
  2549. A_UINT32 rx_11ax_mumimo;
  2550. A_UINT32 rx_11ax_ofdma;
  2551. A_UINT32 txbf;
  2552. A_UINT32 rx_legacy_cck_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2553. A_UINT32 rx_legacy_ofdm_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2554. A_UINT32 rx_active_dur_us_low;
  2555. A_UINT32 rx_active_dur_us_high;
  2556. A_UINT32 rx_11ax_ul_ofdma;
  2557. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2558. A_UINT32 ul_ofdma_rx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2559. A_UINT32 ul_ofdma_rx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2560. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2561. A_UINT32 ul_ofdma_rx_stbc;
  2562. A_UINT32 ul_ofdma_rx_ldpc;
  2563. /* record the stats for each user index */
  2564. A_UINT32 rx_ulofdma_non_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2565. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2566. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2567. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2568. A_UINT32 nss_count;
  2569. A_UINT32 pilot_count;
  2570. /* RxEVM stats in dB */
  2571. A_INT32 rx_pilot_evm_dB[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS];
  2572. /* rx_pilot_evm_dB_mean:
  2573. * EVM mean across pilots, computed as
  2574. * mean(10*log10(rx_pilot_evm_linear)) = mean(rx_pilot_evm_dB)
  2575. */
  2576. A_INT32 rx_pilot_evm_dB_mean[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2577. A_INT8 rx_ul_fd_rssi[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* dBm units */
  2578. } htt_rx_pdev_rate_stats_tlv;
  2579. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
  2580. * TLV_TAGS:
  2581. * - HTT_STATS_RX_PDEV_RATE_STATS_TAG
  2582. */
  2583. /* NOTE:
  2584. * This structure is for documentation, and cannot be safely used directly.
  2585. * Instead, use the constituent TLV structures to fill/parse.
  2586. */
  2587. typedef struct {
  2588. htt_rx_pdev_rate_stats_tlv rate_tlv;
  2589. } htt_rx_pdev_rate_stats_t;
  2590. /* == RX PDEV/SOC STATS == */
  2591. typedef struct {
  2592. htt_tlv_hdr_t tlv_hdr;
  2593. /* Num Packets received on REO FW ring */
  2594. A_UINT32 fw_reo_ring_data_msdu;
  2595. /* Num bc/mc packets indicated from fw to host */
  2596. A_UINT32 fw_to_host_data_msdu_bcmc;
  2597. /* Num unicast packets indicated from fw to host */
  2598. A_UINT32 fw_to_host_data_msdu_uc;
  2599. /* Num remote buf recycle from offload */
  2600. A_UINT32 ofld_remote_data_buf_recycle_cnt;
  2601. /* Num remote free buf given to offload */
  2602. A_UINT32 ofld_remote_free_buf_indication_cnt;
  2603. /* Num unicast packets from local path indicated to host */
  2604. A_UINT32 ofld_buf_to_host_data_msdu_uc;
  2605. /* Num unicast packets from REO indicated to host */
  2606. A_UINT32 reo_fw_ring_to_host_data_msdu_uc;
  2607. /* Num Packets received from WBM SW1 ring */
  2608. A_UINT32 wbm_sw_ring_reap;
  2609. /* Num packets from WBM forwarded from fw to host via WBM */
  2610. A_UINT32 wbm_forward_to_host_cnt;
  2611. /* Num packets from WBM recycled to target refill ring */
  2612. A_UINT32 wbm_target_recycle_cnt;
  2613. /* Total Num of recycled to refill ring, including packets from WBM and REO */
  2614. A_UINT32 target_refill_ring_recycle_cnt;
  2615. } htt_rx_soc_fw_stats_tlv;
  2616. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2617. /* NOTE: Variable length TLV, use length spec to infer array size */
  2618. typedef struct {
  2619. htt_tlv_hdr_t tlv_hdr;
  2620. /* Num ring empty encountered */
  2621. A_UINT32 refill_ring_empty_cnt[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2622. } htt_rx_soc_fw_refill_ring_empty_tlv_v;
  2623. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2624. /* NOTE: Variable length TLV, use length spec to infer array size */
  2625. typedef struct {
  2626. htt_tlv_hdr_t tlv_hdr;
  2627. /* Num total buf refilled from refill ring */
  2628. A_UINT32 refill_ring_num_refill[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2629. } htt_rx_soc_fw_refill_ring_num_refill_tlv_v;
  2630. /* RXDMA error code from WBM released packets */
  2631. typedef enum {
  2632. HTT_RX_RXDMA_OVERFLOW_ERR = 0,
  2633. HTT_RX_RXDMA_MPDU_LENGTH_ERR = 1,
  2634. HTT_RX_RXDMA_FCS_ERR = 2,
  2635. HTT_RX_RXDMA_DECRYPT_ERR = 3,
  2636. HTT_RX_RXDMA_TKIP_MIC_ERR = 4,
  2637. HTT_RX_RXDMA_UNECRYPTED_ERR = 5,
  2638. HTT_RX_RXDMA_MSDU_LEN_ERR = 6,
  2639. HTT_RX_RXDMA_MSDU_LIMIT_ERR = 7,
  2640. HTT_RX_RXDMA_WIFI_PARSE_ERR = 8,
  2641. HTT_RX_RXDMA_AMSDU_PARSE_ERR = 9,
  2642. HTT_RX_RXDMA_SA_TIMEOUT_ERR = 10,
  2643. HTT_RX_RXDMA_DA_TIMEOUT_ERR = 11,
  2644. HTT_RX_RXDMA_FLOW_TIMEOUT_ERR = 12,
  2645. HTT_RX_RXDMA_FLUSH_REQUEST = 13,
  2646. HTT_RX_RXDMA_ERR_CODE_RVSD0 = 14,
  2647. HTT_RX_RXDMA_ERR_CODE_RVSD1 = 15,
  2648. /*
  2649. * This MAX_ERR_CODE should not be used in any host/target messages,
  2650. * so that even though it is defined within a host/target interface
  2651. * definition header file, it isn't actually part of the host/target
  2652. * interface, and thus can be modified.
  2653. */
  2654. HTT_RX_RXDMA_MAX_ERR_CODE
  2655. } htt_rx_rxdma_error_code_enum;
  2656. /* NOTE: Variable length TLV, use length spec to infer array size */
  2657. typedef struct {
  2658. htt_tlv_hdr_t tlv_hdr;
  2659. /* NOTE:
  2660. * The mapping of RXDMA error types to rxdma_err array elements is HW dependent.
  2661. * It is expected but not required that the target will provide a rxdma_err element
  2662. * for each of the htt_rx_rxdma_error_code_enum values, up to but not including
  2663. * MAX_ERR_CODE. The host should ignore any array elements whose
  2664. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2665. */
  2666. A_UINT32 rxdma_err[1]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
  2667. } htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v;
  2668. /* REO error code from WBM released packets */
  2669. typedef enum {
  2670. HTT_RX_REO_QUEUE_DESC_ADDR_ZERO = 0,
  2671. HTT_RX_REO_QUEUE_DESC_NOT_VALID = 1,
  2672. HTT_RX_AMPDU_IN_NON_BA = 2,
  2673. HTT_RX_NON_BA_DUPLICATE = 3,
  2674. HTT_RX_BA_DUPLICATE = 4,
  2675. HTT_RX_REGULAR_FRAME_2K_JUMP = 5,
  2676. HTT_RX_BAR_FRAME_2K_JUMP = 6,
  2677. HTT_RX_REGULAR_FRAME_OOR = 7,
  2678. HTT_RX_BAR_FRAME_OOR = 8,
  2679. HTT_RX_BAR_FRAME_NO_BA_SESSION = 9,
  2680. HTT_RX_BAR_FRAME_SN_EQUALS_SSN = 10,
  2681. HTT_RX_PN_CHECK_FAILED = 11,
  2682. HTT_RX_2K_ERROR_HANDLING_FLAG_SET = 12,
  2683. HTT_RX_PN_ERROR_HANDLING_FLAG_SET = 13,
  2684. HTT_RX_QUEUE_DESCRIPTOR_BLOCKED_SET = 14,
  2685. HTT_RX_REO_ERR_CODE_RVSD = 15,
  2686. /*
  2687. * This MAX_ERR_CODE should not be used in any host/target messages,
  2688. * so that even though it is defined within a host/target interface
  2689. * definition header file, it isn't actually part of the host/target
  2690. * interface, and thus can be modified.
  2691. */
  2692. HTT_RX_REO_MAX_ERR_CODE
  2693. } htt_rx_reo_error_code_enum;
  2694. /* NOTE: Variable length TLV, use length spec to infer array size */
  2695. typedef struct {
  2696. htt_tlv_hdr_t tlv_hdr;
  2697. /* NOTE:
  2698. * The mapping of REO error types to reo_err array elements is HW dependent.
  2699. * It is expected but not required that the target will provide a rxdma_err element
  2700. * for each of the htt_rx_reo_error_code_enum values, up to but not including
  2701. * MAX_ERR_CODE. The host should ignore any array elements whose
  2702. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2703. */
  2704. A_UINT32 reo_err[1]; /* HTT_RX_REO_MAX_ERR_CODE */
  2705. } htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v;
  2706. /* NOTE:
  2707. * This structure is for documentation, and cannot be safely used directly.
  2708. * Instead, use the constituent TLV structures to fill/parse.
  2709. */
  2710. typedef struct {
  2711. htt_rx_soc_fw_stats_tlv fw_tlv;
  2712. htt_rx_soc_fw_refill_ring_empty_tlv_v fw_refill_ring_empty_tlv;
  2713. htt_rx_soc_fw_refill_ring_num_refill_tlv_v fw_refill_ring_num_refill_tlv;
  2714. htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v fw_refill_ring_num_rxdma_err_tlv;
  2715. htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v fw_refill_ring_num_reo_err_tlv;
  2716. } htt_rx_soc_stats_t;
  2717. /* == RX PDEV STATS == */
  2718. #define HTT_RX_PDEV_FW_STATS_MAC_ID_M 0x000000ff
  2719. #define HTT_RX_PDEV_FW_STATS_MAC_ID_S 0
  2720. #define HTT_RX_PDEV_FW_STATS_MAC_ID_GET(_var) \
  2721. (((_var) & HTT_RX_PDEV_FW_STATS_MAC_ID_M) >> \
  2722. HTT_RX_PDEV_FW_STATS_MAC_ID_S)
  2723. #define HTT_RX_PDEV_FW_STATS_MAC_ID_SET(_var, _val) \
  2724. do { \
  2725. HTT_CHECK_SET_VAL(HTT_RX_PDEV_FW_STATS_MAC_ID, _val); \
  2726. ((_var) |= ((_val) << HTT_RX_PDEV_FW_STATS_MAC_ID_S)); \
  2727. } while (0)
  2728. #define HTT_STATS_SUBTYPE_MAX 16
  2729. typedef struct {
  2730. htt_tlv_hdr_t tlv_hdr;
  2731. /* BIT [ 7 : 0] :- mac_id
  2732. * BIT [31 : 8] :- reserved
  2733. */
  2734. A_UINT32 mac_id__word;
  2735. /* Num PPDU status processed from HW */
  2736. A_UINT32 ppdu_recvd;
  2737. /* Num MPDU across PPDUs with FCS ok */
  2738. A_UINT32 mpdu_cnt_fcs_ok;
  2739. /* Num MPDU across PPDUs with FCS err */
  2740. A_UINT32 mpdu_cnt_fcs_err;
  2741. /* Num MSDU across PPDUs */
  2742. A_UINT32 tcp_msdu_cnt;
  2743. /* Num MSDU across PPDUs */
  2744. A_UINT32 tcp_ack_msdu_cnt;
  2745. /* Num MSDU across PPDUs */
  2746. A_UINT32 udp_msdu_cnt;
  2747. /* Num MSDU across PPDUs */
  2748. A_UINT32 other_msdu_cnt;
  2749. /* Num MPDU on FW ring indicated */
  2750. A_UINT32 fw_ring_mpdu_ind;
  2751. /* Num MGMT MPDU given to protocol */
  2752. A_UINT32 fw_ring_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  2753. /* Num ctrl MPDU given to protocol */
  2754. A_UINT32 fw_ring_ctrl_subtype[HTT_STATS_SUBTYPE_MAX];
  2755. /* Num mcast data packet received */
  2756. A_UINT32 fw_ring_mcast_data_msdu;
  2757. /* Num broadcast data packet received */
  2758. A_UINT32 fw_ring_bcast_data_msdu;
  2759. /* Num unicat data packet received */
  2760. A_UINT32 fw_ring_ucast_data_msdu;
  2761. /* Num null data packet received */
  2762. A_UINT32 fw_ring_null_data_msdu;
  2763. /* Num MPDU on FW ring dropped */
  2764. A_UINT32 fw_ring_mpdu_drop;
  2765. /* Num buf indication to offload */
  2766. A_UINT32 ofld_local_data_ind_cnt;
  2767. /* Num buf recycle from offload */
  2768. A_UINT32 ofld_local_data_buf_recycle_cnt;
  2769. /* Num buf indication to data_rx */
  2770. A_UINT32 drx_local_data_ind_cnt;
  2771. /* Num buf recycle from data_rx */
  2772. A_UINT32 drx_local_data_buf_recycle_cnt;
  2773. /* Num buf indication to protocol */
  2774. A_UINT32 local_nondata_ind_cnt;
  2775. /* Num buf recycle from protocol */
  2776. A_UINT32 local_nondata_buf_recycle_cnt;
  2777. /* Num buf fed */
  2778. A_UINT32 fw_status_buf_ring_refill_cnt;
  2779. /* Num ring empty encountered */
  2780. A_UINT32 fw_status_buf_ring_empty_cnt;
  2781. /* Num buf fed */
  2782. A_UINT32 fw_pkt_buf_ring_refill_cnt;
  2783. /* Num ring empty encountered */
  2784. A_UINT32 fw_pkt_buf_ring_empty_cnt;
  2785. /* Num buf fed */
  2786. A_UINT32 fw_link_buf_ring_refill_cnt;
  2787. /* Num ring empty encountered */
  2788. A_UINT32 fw_link_buf_ring_empty_cnt;
  2789. /* Num buf fed */
  2790. A_UINT32 host_pkt_buf_ring_refill_cnt;
  2791. /* Num ring empty encountered */
  2792. A_UINT32 host_pkt_buf_ring_empty_cnt;
  2793. /* Num buf fed */
  2794. A_UINT32 mon_pkt_buf_ring_refill_cnt;
  2795. /* Num ring empty encountered */
  2796. A_UINT32 mon_pkt_buf_ring_empty_cnt;
  2797. /* Num buf fed */
  2798. A_UINT32 mon_status_buf_ring_refill_cnt;
  2799. /* Num ring empty encountered */
  2800. A_UINT32 mon_status_buf_ring_empty_cnt;
  2801. /* Num buf fed */
  2802. A_UINT32 mon_desc_buf_ring_refill_cnt;
  2803. /* Num ring empty encountered */
  2804. A_UINT32 mon_desc_buf_ring_empty_cnt;
  2805. /* Num buf fed */
  2806. A_UINT32 mon_dest_ring_update_cnt;
  2807. /* Num ring full encountered */
  2808. A_UINT32 mon_dest_ring_full_cnt;
  2809. /* Num rx suspend is attempted */
  2810. A_UINT32 rx_suspend_cnt;
  2811. /* Num rx suspend failed */
  2812. A_UINT32 rx_suspend_fail_cnt;
  2813. /* Num rx resume attempted */
  2814. A_UINT32 rx_resume_cnt;
  2815. /* Num rx resume failed */
  2816. A_UINT32 rx_resume_fail_cnt;
  2817. /* Num rx ring switch */
  2818. A_UINT32 rx_ring_switch_cnt;
  2819. /* Num rx ring restore */
  2820. A_UINT32 rx_ring_restore_cnt;
  2821. /* Num rx flush issued */
  2822. A_UINT32 rx_flush_cnt;
  2823. /* Num rx recovery */
  2824. A_UINT32 rx_recovery_reset_cnt;
  2825. } htt_rx_pdev_fw_stats_tlv;
  2826. #define HTT_STATS_PHY_ERR_MAX 43
  2827. typedef struct {
  2828. htt_tlv_hdr_t tlv_hdr;
  2829. /* BIT [ 7 : 0] :- mac_id
  2830. * BIT [31 : 8] :- reserved
  2831. */
  2832. A_UINT32 mac_id__word;
  2833. /* Num of phy err */
  2834. A_UINT32 total_phy_err_cnt;
  2835. /* Counts of different types of phy errs
  2836. * The mapping of PHY error types to phy_err array elements is HW dependent.
  2837. * The only currently-supported mapping is shown below:
  2838. *
  2839. * 0 phyrx_err_phy_off Reception aborted due to receiving a PHY_OFF TLV
  2840. * 1 phyrx_err_synth_off
  2841. * 2 phyrx_err_ofdma_timing
  2842. * 3 phyrx_err_ofdma_signal_parity
  2843. * 4 phyrx_err_ofdma_rate_illegal
  2844. * 5 phyrx_err_ofdma_length_illegal
  2845. * 6 phyrx_err_ofdma_restart
  2846. * 7 phyrx_err_ofdma_service
  2847. * 8 phyrx_err_ppdu_ofdma_power_drop
  2848. * 9 phyrx_err_cck_blokker
  2849. * 10 phyrx_err_cck_timing
  2850. * 11 phyrx_err_cck_header_crc
  2851. * 12 phyrx_err_cck_rate_illegal
  2852. * 13 phyrx_err_cck_length_illegal
  2853. * 14 phyrx_err_cck_restart
  2854. * 15 phyrx_err_cck_service
  2855. * 16 phyrx_err_cck_power_drop
  2856. * 17 phyrx_err_ht_crc_err
  2857. * 18 phyrx_err_ht_length_illegal
  2858. * 19 phyrx_err_ht_rate_illegal
  2859. * 20 phyrx_err_ht_zlf
  2860. * 21 phyrx_err_false_radar_ext
  2861. * 22 phyrx_err_green_field
  2862. * 23 phyrx_err_bw_gt_dyn_bw
  2863. * 24 phyrx_err_leg_ht_mismatch
  2864. * 25 phyrx_err_vht_crc_error
  2865. * 26 phyrx_err_vht_siga_unsupported
  2866. * 27 phyrx_err_vht_lsig_len_invalid
  2867. * 28 phyrx_err_vht_ndp_or_zlf
  2868. * 29 phyrx_err_vht_nsym_lt_zero
  2869. * 30 phyrx_err_vht_rx_extra_symbol_mismatch
  2870. * 31 phyrx_err_vht_rx_skip_group_id0
  2871. * 32 phyrx_err_vht_rx_skip_group_id1to62
  2872. * 33 phyrx_err_vht_rx_skip_group_id63
  2873. * 34 phyrx_err_ofdm_ldpc_decoder_disabled
  2874. * 35 phyrx_err_defer_nap
  2875. * 36 phyrx_err_fdomain_timeout
  2876. * 37 phyrx_err_lsig_rel_check
  2877. * 38 phyrx_err_bt_collision
  2878. * 39 phyrx_err_unsupported_mu_feedback
  2879. * 40 phyrx_err_ppdu_tx_interrupt_rx
  2880. * 41 phyrx_err_unsupported_cbf
  2881. * 42 phyrx_err_other
  2882. */
  2883. A_UINT32 phy_err[HTT_STATS_PHY_ERR_MAX];
  2884. } htt_rx_pdev_fw_stats_phy_err_tlv;
  2885. #define HTT_RX_PDEV_FW_RING_MPDU_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2886. /* NOTE: Variable length TLV, use length spec to infer array size */
  2887. typedef struct {
  2888. htt_tlv_hdr_t tlv_hdr;
  2889. /* Num error MPDU for each RxDMA error type */
  2890. A_UINT32 fw_ring_mpdu_err[1]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
  2891. } htt_rx_pdev_fw_ring_mpdu_err_tlv_v;
  2892. #define HTT_RX_PDEV_FW_MPDU_DROP_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2893. /* NOTE: Variable length TLV, use length spec to infer array size */
  2894. typedef struct {
  2895. htt_tlv_hdr_t tlv_hdr;
  2896. /* Num MPDU dropped */
  2897. A_UINT32 fw_mpdu_drop[1]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
  2898. } htt_rx_pdev_fw_mpdu_drop_tlv_v;
  2899. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX
  2900. * TLV_TAGS:
  2901. * - HTT_STATS_RX_SOC_FW_STATS_TAG (head TLV in soc_stats)
  2902. * - HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG (inside soc_stats)
  2903. * - HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG (inside soc_stats)
  2904. * - HTT_STATS_RX_PDEV_FW_STATS_TAG
  2905. * - HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG
  2906. * - HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG
  2907. */
  2908. /* NOTE:
  2909. * This structure is for documentation, and cannot be safely used directly.
  2910. * Instead, use the constituent TLV structures to fill/parse.
  2911. */
  2912. typedef struct {
  2913. htt_rx_soc_stats_t soc_stats;
  2914. htt_rx_pdev_fw_stats_tlv fw_stats_tlv;
  2915. htt_rx_pdev_fw_ring_mpdu_err_tlv_v fw_ring_mpdu_err_tlv;
  2916. htt_rx_pdev_fw_mpdu_drop_tlv_v fw_ring_mpdu_drop;
  2917. htt_rx_pdev_fw_stats_phy_err_tlv fw_stats_phy_err_tlv;
  2918. } htt_rx_pdev_stats_t;
  2919. #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT (0x1)
  2920. #define HTT_PDEV_CCA_STATS_RX_FRAME_INFO_PRESENT (0x2)
  2921. #define HTT_PDEV_CCA_STATS_RX_CLEAR_INFO_PRESENT (0x4)
  2922. #define HTT_PDEV_CCA_STATS_MY_RX_FRAME_INFO_PRESENT (0x8)
  2923. #define HTT_PDEV_CCA_STATS_USEC_CNT_INFO_PRESENT (0x10)
  2924. #define HTT_PDEV_CCA_STATS_MED_RX_IDLE_INFO_PRESENT (0x20)
  2925. #define HTT_PDEV_CCA_STATS_MED_TX_IDLE_GLOBAL_INFO_PRESENT (0x40)
  2926. #define HTT_PDEV_CCA_STATS_CCA_OBBS_USEC_INFO_PRESENT (0x80)
  2927. typedef struct {
  2928. htt_tlv_hdr_t tlv_hdr;
  2929. /* Below values are obtained from the HW Cycles counter registers */
  2930. A_UINT32 tx_frame_usec;
  2931. A_UINT32 rx_frame_usec;
  2932. A_UINT32 rx_clear_usec;
  2933. A_UINT32 my_rx_frame_usec;
  2934. A_UINT32 usec_cnt;
  2935. A_UINT32 med_rx_idle_usec;
  2936. A_UINT32 med_tx_idle_global_usec;
  2937. A_UINT32 cca_obss_usec;
  2938. } htt_pdev_stats_cca_counters_tlv;
  2939. /* NOTE: THIS htt_pdev_cca_stats_hist_tlv STRUCTURE IS DEPRECATED,
  2940. * due to lack of support in some host stats infrastructures for
  2941. * TLVs nested within TLVs.
  2942. */
  2943. typedef struct {
  2944. htt_tlv_hdr_t tlv_hdr;
  2945. /* The channel number on which these stats were collected */
  2946. A_UINT32 chan_num;
  2947. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  2948. A_UINT32 num_records;
  2949. /*
  2950. * Bit map of valid CCA counters
  2951. * Bit0 - tx_frame_usec
  2952. * Bit1 - rx_frame_usec
  2953. * Bit2 - rx_clear_usec
  2954. * Bit3 - my_rx_frame_usec
  2955. * bit4 - usec_cnt
  2956. * Bit5 - med_rx_idle_usec
  2957. * Bit6 - med_tx_idle_global_usec
  2958. * Bit7 - cca_obss_usec
  2959. *
  2960. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  2961. */
  2962. A_UINT32 valid_cca_counters_bitmap;
  2963. /* Indicates the stats collection interval
  2964. * Valid Values:
  2965. * 100 - For the 100ms interval CCA stats histogram
  2966. * 1000 - For 1sec interval CCA histogram
  2967. * 0xFFFFFFFF - For Cumulative CCA Stats
  2968. */
  2969. A_UINT32 collection_interval;
  2970. /**
  2971. * This will be followed by an array which contains the CCA stats
  2972. * collected in the last N intervals,
  2973. * if the indication is for last N intervals CCA stats.
  2974. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  2975. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  2976. */
  2977. htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  2978. } htt_pdev_cca_stats_hist_tlv;
  2979. typedef struct {
  2980. htt_tlv_hdr_t tlv_hdr;
  2981. /* The channel number on which these stats were collected */
  2982. A_UINT32 chan_num;
  2983. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  2984. A_UINT32 num_records;
  2985. /*
  2986. * Bit map of valid CCA counters
  2987. * Bit0 - tx_frame_usec
  2988. * Bit1 - rx_frame_usec
  2989. * Bit2 - rx_clear_usec
  2990. * Bit3 - my_rx_frame_usec
  2991. * bit4 - usec_cnt
  2992. * Bit5 - med_rx_idle_usec
  2993. * Bit6 - med_tx_idle_global_usec
  2994. * Bit7 - cca_obss_usec
  2995. *
  2996. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  2997. */
  2998. A_UINT32 valid_cca_counters_bitmap;
  2999. /* Indicates the stats collection interval
  3000. * Valid Values:
  3001. * 100 - For the 100ms interval CCA stats histogram
  3002. * 1000 - For 1sec interval CCA histogram
  3003. * 0xFFFFFFFF - For Cumulative CCA Stats
  3004. */
  3005. A_UINT32 collection_interval;
  3006. /**
  3007. * This will be followed by an array which contains the CCA stats
  3008. * collected in the last N intervals,
  3009. * if the indication is for last N intervals CCA stats.
  3010. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  3011. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  3012. * htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  3013. */
  3014. } htt_pdev_cca_stats_hist_v1_tlv;
  3015. #define HTT_TWT_SESSION_FLAG_FLOW_ID_M 0x0000ffff
  3016. #define HTT_TWT_SESSION_FLAG_FLOW_ID_S 0
  3017. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_M 0x00010000
  3018. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_S 16
  3019. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M 0x00020000
  3020. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S 17
  3021. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M 0x00040000
  3022. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S 18
  3023. #define HTT_TWT_SESSION_FLAG_FLOW_ID_GET(_var) \
  3024. (((_var) & HTT_TWT_SESSION_FLAG_FLOW_ID_M) >> \
  3025. HTT_TWT_SESSION_FLAG_FLOW_ID_S)
  3026. #define HTT_TWT_SESSION_FLAG_FLOW_ID_SET(_var, _val) \
  3027. do { \
  3028. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_FLOW_ID, _val); \
  3029. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_FLOW_ID_S)); \
  3030. } while (0)
  3031. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_GET(_var) \
  3032. (((_var) & HTT_TWT_SESSION_FLAG_BCAST_TWT_M) >> \
  3033. HTT_TWT_SESSION_FLAG_BCAST_TWT_S)
  3034. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_SET(_var, _val) \
  3035. do { \
  3036. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BCAST_TWT, _val); \
  3037. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BCAST_TWT_S)); \
  3038. } while (0)
  3039. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_GET(_var) \
  3040. (((_var) & HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M) >> \
  3041. HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)
  3042. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_SET(_var, _val) \
  3043. do { \
  3044. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_TRIGGER_TWT, _val); \
  3045. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)); \
  3046. } while (0)
  3047. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_GET(_var) \
  3048. (((_var) & HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M) >> \
  3049. HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)
  3050. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_SET(_var, _val) \
  3051. do { \
  3052. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_ANNOUN_TWT, _val); \
  3053. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)); \
  3054. } while (0)
  3055. #define TWT_DIALOG_ID_UNAVAILABLE 0xFFFFFFFF
  3056. typedef struct {
  3057. htt_tlv_hdr_t tlv_hdr;
  3058. A_UINT32 vdev_id;
  3059. htt_mac_addr peer_mac;
  3060. A_UINT32 flow_id_flags;
  3061. A_UINT32 dialog_id; /* TWT_DIALOG_ID_UNAVAILABLE is used when TWT session is not initiated by host */
  3062. A_UINT32 wake_dura_us;
  3063. A_UINT32 wake_intvl_us;
  3064. A_UINT32 sp_offset_us;
  3065. } htt_pdev_stats_twt_session_tlv;
  3066. typedef struct {
  3067. htt_tlv_hdr_t tlv_hdr;
  3068. A_UINT32 pdev_id;
  3069. A_UINT32 num_sessions;
  3070. htt_pdev_stats_twt_session_tlv twt_session[1];
  3071. } htt_pdev_stats_twt_sessions_tlv;
  3072. /* STATS_TYPE: HTT_DBG_EXT_STATS_TWT_SESSIONS
  3073. * TLV_TAGS:
  3074. * - HTT_STATS_PDEV_TWT_SESSIONS_TAG
  3075. * - HTT_STATS_PDEV_TWT_SESSION_TAG
  3076. */
  3077. /* NOTE:
  3078. * This structure is for documentation, and cannot be safely used directly.
  3079. * Instead, use the constituent TLV structures to fill/parse.
  3080. */
  3081. typedef struct {
  3082. htt_pdev_stats_twt_sessions_tlv twt_sessions[1];
  3083. } htt_pdev_twt_sessions_stats_t;
  3084. typedef enum {
  3085. /* Global link descriptor queued in REO */
  3086. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_0 = 0,
  3087. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_1 = 1,
  3088. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_2 = 2,
  3089. /*Number of queue descriptors of this aging group */
  3090. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC0 = 3,
  3091. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC1 = 4,
  3092. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC2 = 5,
  3093. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC3 = 6,
  3094. /* Total number of MSDUs buffered in AC */
  3095. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC0 = 7,
  3096. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC1 = 8,
  3097. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC2 = 9,
  3098. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC3 = 10,
  3099. HTT_RX_REO_RESOURCE_STATS_MAX = 16
  3100. } htt_rx_reo_resource_sample_id_enum;
  3101. typedef struct {
  3102. htt_tlv_hdr_t tlv_hdr;
  3103. /* Variable based on the Number of records. HTT_RX_REO_RESOURCE_STATS_MAX */
  3104. /* htt_rx_reo_debug_sample_id_enum */
  3105. A_UINT32 sample_id;
  3106. /* Max value of all samples */
  3107. A_UINT32 total_max;
  3108. /* Average value of total samples */
  3109. A_UINT32 total_avg;
  3110. /* Num of samples including both zeros and non zeros ones*/
  3111. A_UINT32 total_sample;
  3112. /* Average value of all non zeros samples */
  3113. A_UINT32 non_zeros_avg;
  3114. /* Num of non zeros samples */
  3115. A_UINT32 non_zeros_sample;
  3116. /* Max value of last N non zero samples (N = last_non_zeros_sample) */
  3117. A_UINT32 last_non_zeros_max;
  3118. /* Min value of last N non zero samples (N = last_non_zeros_sample) */
  3119. A_UINT32 last_non_zeros_min;
  3120. /* Average value of last N non zero samples (N = last_non_zeros_sample) */
  3121. A_UINT32 last_non_zeros_avg;
  3122. /* Num of last non zero samples */
  3123. A_UINT32 last_non_zeros_sample;
  3124. } htt_rx_reo_resource_stats_tlv_v;
  3125. /* STATS_TYPE: HTT_DBG_EXT_STATS_REO_RESOURCE_STATS
  3126. * TLV_TAGS:
  3127. * - HTT_STATS_RX_REO_RESOURCE_STATS_TAG
  3128. */
  3129. /* NOTE:
  3130. * This structure is for documentation, and cannot be safely used directly.
  3131. * Instead, use the constituent TLV structures to fill/parse.
  3132. */
  3133. typedef struct {
  3134. htt_rx_reo_resource_stats_tlv_v reo_resource_stats;
  3135. } htt_soc_reo_resource_stats_t;
  3136. /* == TX SOUNDING STATS == */
  3137. /* config_param0 */
  3138. #define HTT_DBG_EXT_STATS_SET_VDEV_MASK(_var) ((_var << 1) | 0x1)
  3139. #define HTT_DBG_EXT_STATS_GET_VDEV_ID_FROM_VDEV_MASK(_var) ((_var >> 1) & 0xFF)
  3140. #define HTT_DBG_EXT_STATS_IS_VDEV_ID_SET(_var) ((_var) & 0x1)
  3141. typedef enum {
  3142. /* Implicit beamforming stats */
  3143. HTT_IMPLICIT_TXBF_STEER_STATS = 0,
  3144. /* Single user short inter frame sequence steer stats */
  3145. HTT_EXPLICIT_TXBF_SU_SIFS_STEER_STATS = 1,
  3146. /* Single user random back off steer stats */
  3147. HTT_EXPLICIT_TXBF_SU_RBO_STEER_STATS = 2,
  3148. /* Multi user short inter frame sequence steer stats */
  3149. HTT_EXPLICIT_TXBF_MU_SIFS_STEER_STATS = 3,
  3150. /* Multi user random back off steer stats */
  3151. HTT_EXPLICIT_TXBF_MU_RBO_STEER_STATS = 4,
  3152. /* For backward compatability new modes cannot be added */
  3153. HTT_TXBF_MAX_NUM_OF_MODES = 5
  3154. } htt_txbf_sound_steer_modes;
  3155. typedef enum {
  3156. HTT_TX_AC_SOUNDING_MODE = 0,
  3157. HTT_TX_AX_SOUNDING_MODE = 1,
  3158. } htt_stats_sounding_tx_mode;
  3159. typedef struct {
  3160. htt_tlv_hdr_t tlv_hdr;
  3161. A_UINT32 tx_sounding_mode; /* HTT_TX_XX_SOUNDING_MODE */
  3162. /* Counts number of soundings for all steering modes in each bw */
  3163. A_UINT32 cbf_20[HTT_TXBF_MAX_NUM_OF_MODES];
  3164. A_UINT32 cbf_40[HTT_TXBF_MAX_NUM_OF_MODES];
  3165. A_UINT32 cbf_80[HTT_TXBF_MAX_NUM_OF_MODES];
  3166. A_UINT32 cbf_160[HTT_TXBF_MAX_NUM_OF_MODES];
  3167. /*
  3168. * The sounding array is a 2-D array stored as an 1-D array of
  3169. * A_UINT32. The stats for a particular user/bw combination is
  3170. * referenced with the following:
  3171. *
  3172. * sounding[(user* max_bw) + bw]
  3173. *
  3174. * ... where max_bw == 4 for 160mhz
  3175. */
  3176. A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];
  3177. } htt_tx_sounding_stats_tlv;
  3178. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  3179. * TLV_TAGS:
  3180. * - HTT_STATS_TX_SOUNDING_STATS_TAG
  3181. */
  3182. /* NOTE:
  3183. * This structure is for documentation, and cannot be safely used directly.
  3184. * Instead, use the constituent TLV structures to fill/parse.
  3185. */
  3186. typedef struct {
  3187. htt_tx_sounding_stats_tlv sounding_tlv;
  3188. } htt_tx_sounding_stats_t;
  3189. typedef struct {
  3190. htt_tlv_hdr_t tlv_hdr;
  3191. A_UINT32 num_obss_tx_ppdu_success;
  3192. A_UINT32 num_obss_tx_ppdu_failure;
  3193. } htt_pdev_obss_pd_stats_tlv;
  3194. /* NOTE:
  3195. * This structure is for documentation, and cannot be safely used directly.
  3196. * Instead, use the constituent TLV structures to fill/parse.
  3197. */
  3198. typedef struct {
  3199. htt_pdev_obss_pd_stats_tlv obss_pd_stat;
  3200. } htt_pdev_obss_pd_stats_t;
  3201. #endif /* __HTT_STATS_H__ */