94ff74fcf9
The delayed register write enqueue fills a queue element with the required data which can be dequeued in a workqueue running on a different CPU. Since these operations are not lock protected, there can be stale value access when memory write has not been flushed to the actual address. Using write memory barrier before setting the valid flag for a queue element will make sure that the dequeuing worker thread will always see the updated values if the element valid flag is set and thereby avoid any race condition. Change-Id: I81b0735f0fb39599095ad309157020c691e25a0b CRs-Fixed: 2665576
This is CNSS WLAN Host Driver for products starting from iHelium