dp_rx.h 68 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include <qdf_tracepoint.h>
  25. #include "dp_ipa.h"
  26. #ifdef RXDMA_OPTIMIZATION
  27. #ifndef RX_DATA_BUFFER_ALIGNMENT
  28. #define RX_DATA_BUFFER_ALIGNMENT 128
  29. #endif
  30. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  31. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  32. #endif
  33. #else /* RXDMA_OPTIMIZATION */
  34. #define RX_DATA_BUFFER_ALIGNMENT 4
  35. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  36. #endif /* RXDMA_OPTIMIZATION */
  37. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  38. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  39. /* RBM value used for re-injecting defragmented packets into REO */
  40. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  41. #endif
  42. #define RX_BUFFER_RESERVATION 0
  43. #ifdef BE_PKTLOG_SUPPORT
  44. #define BUFFER_RESIDUE 1
  45. #define RX_MON_MIN_HEAD_ROOM 64
  46. #endif
  47. #define DP_DEFAULT_NOISEFLOOR (-96)
  48. #define DP_RX_DESC_MAGIC 0xdec0de
  49. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  50. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  51. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  52. #define dp_rx_info(params...) \
  53. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  54. #define dp_rx_info_rl(params...) \
  55. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  56. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  57. /**
  58. * enum dp_rx_desc_state
  59. *
  60. * @RX_DESC_REPLENISH: rx desc replenished
  61. * @RX_DESC_FREELIST: rx desc in freelist
  62. */
  63. enum dp_rx_desc_state {
  64. RX_DESC_REPLENISHED,
  65. RX_DESC_IN_FREELIST,
  66. };
  67. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  68. /**
  69. * struct dp_rx_desc_dbg_info
  70. *
  71. * @freelist_caller: name of the function that put the
  72. * the rx desc in freelist
  73. * @freelist_ts: timestamp when the rx desc is put in
  74. * a freelist
  75. * @replenish_caller: name of the function that last
  76. * replenished the rx desc
  77. * @replenish_ts: last replenish timestamp
  78. * @prev_nbuf: previous nbuf info
  79. * @prev_nbuf_data_addr: previous nbuf data address
  80. */
  81. struct dp_rx_desc_dbg_info {
  82. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  83. uint64_t freelist_ts;
  84. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  85. uint64_t replenish_ts;
  86. qdf_nbuf_t prev_nbuf;
  87. uint8_t *prev_nbuf_data_addr;
  88. };
  89. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  90. /**
  91. * struct dp_rx_desc
  92. *
  93. * @nbuf : VA of the "skb" posted
  94. * @rx_buf_start : VA of the original Rx buffer, before
  95. * movement of any skb->data pointer
  96. * @paddr_buf_start : PA of the original Rx buffer, before
  97. * movement of any frag pointer
  98. * @cookie : index into the sw array which holds
  99. * the sw Rx descriptors
  100. * Cookie space is 21 bits:
  101. * lower 18 bits -- index
  102. * upper 3 bits -- pool_id
  103. * @pool_id : pool Id for which this allocated.
  104. * Can only be used if there is no flow
  105. * steering
  106. * @in_use rx_desc is in use
  107. * @unmapped used to mark rx_desc an unmapped if the corresponding
  108. * nbuf is already unmapped
  109. * @in_err_state : Nbuf sanity failed for this descriptor.
  110. * @nbuf_data_addr : VA of nbuf data posted
  111. */
  112. struct dp_rx_desc {
  113. qdf_nbuf_t nbuf;
  114. uint8_t *rx_buf_start;
  115. qdf_dma_addr_t paddr_buf_start;
  116. uint32_t cookie;
  117. uint8_t pool_id;
  118. #ifdef RX_DESC_DEBUG_CHECK
  119. uint32_t magic;
  120. uint8_t *nbuf_data_addr;
  121. struct dp_rx_desc_dbg_info *dbg_info;
  122. #endif
  123. uint8_t in_use:1,
  124. unmapped:1,
  125. in_err_state:1;
  126. };
  127. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  128. #ifdef ATH_RX_PRI_SAVE
  129. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  130. (qdf_nbuf_set_priority(_nbuf, _tid))
  131. #else
  132. #define DP_RX_TID_SAVE(_nbuf, _tid)
  133. #endif
  134. /* RX Descriptor Multi Page memory alloc related */
  135. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  136. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  137. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  138. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  139. #define DP_RX_DESC_POOL_ID_SHIFT \
  140. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  141. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  142. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  143. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  144. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  145. DP_RX_DESC_PAGE_ID_SHIFT)
  146. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  147. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  148. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  149. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  150. DP_RX_DESC_POOL_ID_SHIFT)
  151. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  152. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  153. DP_RX_DESC_PAGE_ID_SHIFT)
  154. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  155. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  156. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  157. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  158. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  159. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  160. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  161. #define DP_RX_DESC_COOKIE_MAX \
  162. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  163. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  164. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  165. RX_DESC_COOKIE_POOL_ID_SHIFT)
  166. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  167. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  168. RX_DESC_COOKIE_INDEX_SHIFT)
  169. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  170. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  171. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  172. num_buffers, desc_list, tail) \
  173. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  174. num_buffers, desc_list, tail, __func__)
  175. #ifdef WLAN_SUPPORT_RX_FISA
  176. /**
  177. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  178. * @nbuf: pkt skb pointer
  179. * @l3_padding: l3 padding
  180. *
  181. * Return: None
  182. */
  183. static inline
  184. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  185. {
  186. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  187. }
  188. #else
  189. static inline
  190. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  191. {
  192. }
  193. #endif
  194. #ifdef DP_RX_SPECIAL_FRAME_NEED
  195. /**
  196. * dp_rx_is_special_frame() - check is RX frame special needed
  197. *
  198. * @nbuf: RX skb pointer
  199. * @frame_mask: the mask for speical frame needed
  200. *
  201. * Check is RX frame wanted matched with mask
  202. *
  203. * Return: true - special frame needed, false - no
  204. */
  205. static inline
  206. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  207. {
  208. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  209. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  210. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  211. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  212. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  213. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  214. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  215. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  216. return true;
  217. return false;
  218. }
  219. /**
  220. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  221. * if matches mask
  222. *
  223. * @soc: Datapath soc handler
  224. * @peer: pointer to DP peer
  225. * @nbuf: pointer to the skb of RX frame
  226. * @frame_mask: the mask for speical frame needed
  227. * @rx_tlv_hdr: start of rx tlv header
  228. *
  229. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  230. * single nbuf is expected.
  231. *
  232. * return: true - nbuf has been delivered to stack, false - not.
  233. */
  234. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  235. qdf_nbuf_t nbuf, uint32_t frame_mask,
  236. uint8_t *rx_tlv_hdr);
  237. #else
  238. static inline
  239. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  240. {
  241. return false;
  242. }
  243. static inline
  244. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_txrx_peer *peer,
  245. qdf_nbuf_t nbuf, uint32_t frame_mask,
  246. uint8_t *rx_tlv_hdr)
  247. {
  248. return false;
  249. }
  250. #endif
  251. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  252. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  253. static inline
  254. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  255. qdf_nbuf_t nbuf)
  256. {
  257. if (ta_txrx_peer->vdev->opmode == wlan_op_mode_ndi &&
  258. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  259. DP_PEER_PER_PKT_STATS_INC(ta_txrx_peer,
  260. rx.intra_bss.mdns_no_fwd, 1);
  261. return false;
  262. }
  263. return true;
  264. }
  265. #else
  266. static inline
  267. bool dp_rx_check_ndi_mdns_fwding(struct dp_txrx_peer *ta_txrx_peer,
  268. qdf_nbuf_t nbuf)
  269. {
  270. return true;
  271. }
  272. #endif
  273. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  274. /* DOC: Offset to obtain LLC hdr
  275. *
  276. * In the case of Wifi parse error
  277. * to reach LLC header from beginning
  278. * of VLAN tag we need to skip 8 bytes.
  279. * Vlan_tag(4)+length(2)+length added
  280. * by HW(2) = 8 bytes.
  281. */
  282. #define DP_SKIP_VLAN 8
  283. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  284. /**
  285. * struct dp_rx_cached_buf - rx cached buffer
  286. * @list: linked list node
  287. * @buf: skb buffer
  288. */
  289. struct dp_rx_cached_buf {
  290. qdf_list_node_t node;
  291. qdf_nbuf_t buf;
  292. };
  293. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  294. /*
  295. *dp_rx_xor_block() - xor block of data
  296. *@b: destination data block
  297. *@a: source data block
  298. *@len: length of the data to process
  299. *
  300. *Returns: None
  301. */
  302. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  303. {
  304. qdf_size_t i;
  305. for (i = 0; i < len; i++)
  306. b[i] ^= a[i];
  307. }
  308. /*
  309. *dp_rx_rotl() - rotate the bits left
  310. *@val: unsigned integer input value
  311. *@bits: number of bits
  312. *
  313. *Returns: Integer with left rotated by number of 'bits'
  314. */
  315. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  316. {
  317. return (val << bits) | (val >> (32 - bits));
  318. }
  319. /*
  320. *dp_rx_rotr() - rotate the bits right
  321. *@val: unsigned integer input value
  322. *@bits: number of bits
  323. *
  324. *Returns: Integer with right rotated by number of 'bits'
  325. */
  326. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  327. {
  328. return (val >> bits) | (val << (32 - bits));
  329. }
  330. /*
  331. * dp_set_rx_queue() - set queue_mapping in skb
  332. * @nbuf: skb
  333. * @queue_id: rx queue_id
  334. *
  335. * Return: void
  336. */
  337. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  338. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  339. {
  340. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  341. return;
  342. }
  343. #else
  344. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  345. {
  346. }
  347. #endif
  348. /*
  349. *dp_rx_xswap() - swap the bits left
  350. *@val: unsigned integer input value
  351. *
  352. *Returns: Integer with bits swapped
  353. */
  354. static inline uint32_t dp_rx_xswap(uint32_t val)
  355. {
  356. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  357. }
  358. /*
  359. *dp_rx_get_le32_split() - get little endian 32 bits split
  360. *@b0: byte 0
  361. *@b1: byte 1
  362. *@b2: byte 2
  363. *@b3: byte 3
  364. *
  365. *Returns: Integer with split little endian 32 bits
  366. */
  367. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  368. uint8_t b3)
  369. {
  370. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  371. }
  372. /*
  373. *dp_rx_get_le32() - get little endian 32 bits
  374. *@b0: byte 0
  375. *@b1: byte 1
  376. *@b2: byte 2
  377. *@b3: byte 3
  378. *
  379. *Returns: Integer with little endian 32 bits
  380. */
  381. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  382. {
  383. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  384. }
  385. /*
  386. * dp_rx_put_le32() - put little endian 32 bits
  387. * @p: destination char array
  388. * @v: source 32-bit integer
  389. *
  390. * Returns: None
  391. */
  392. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  393. {
  394. p[0] = (v) & 0xff;
  395. p[1] = (v >> 8) & 0xff;
  396. p[2] = (v >> 16) & 0xff;
  397. p[3] = (v >> 24) & 0xff;
  398. }
  399. /* Extract michal mic block of data */
  400. #define dp_rx_michael_block(l, r) \
  401. do { \
  402. r ^= dp_rx_rotl(l, 17); \
  403. l += r; \
  404. r ^= dp_rx_xswap(l); \
  405. l += r; \
  406. r ^= dp_rx_rotl(l, 3); \
  407. l += r; \
  408. r ^= dp_rx_rotr(l, 2); \
  409. l += r; \
  410. } while (0)
  411. /**
  412. * struct dp_rx_desc_list_elem_t
  413. *
  414. * @next : Next pointer to form free list
  415. * @rx_desc : DP Rx descriptor
  416. */
  417. union dp_rx_desc_list_elem_t {
  418. union dp_rx_desc_list_elem_t *next;
  419. struct dp_rx_desc rx_desc;
  420. };
  421. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  422. /**
  423. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  424. * @page_id: Page ID
  425. * @offset: Offset of the descriptor element
  426. *
  427. * Return: RX descriptor element
  428. */
  429. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  430. struct rx_desc_pool *rx_pool);
  431. static inline
  432. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  433. struct rx_desc_pool *pool,
  434. uint32_t cookie)
  435. {
  436. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  437. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  438. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  439. struct rx_desc_pool *rx_desc_pool;
  440. union dp_rx_desc_list_elem_t *rx_desc_elem;
  441. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  442. return NULL;
  443. rx_desc_pool = &pool[pool_id];
  444. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  445. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  446. rx_desc_pool->elem_size * offset);
  447. return &rx_desc_elem->rx_desc;
  448. }
  449. /**
  450. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  451. * the Rx descriptor on Rx DMA source ring buffer
  452. * @soc: core txrx main context
  453. * @cookie: cookie used to lookup virtual address
  454. *
  455. * Return: Pointer to the Rx descriptor
  456. */
  457. static inline
  458. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  459. uint32_t cookie)
  460. {
  461. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  462. }
  463. /**
  464. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  465. * the Rx descriptor on monitor ring buffer
  466. * @soc: core txrx main context
  467. * @cookie: cookie used to lookup virtual address
  468. *
  469. * Return: Pointer to the Rx descriptor
  470. */
  471. static inline
  472. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  473. uint32_t cookie)
  474. {
  475. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  476. }
  477. /**
  478. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  479. * the Rx descriptor on monitor status ring buffer
  480. * @soc: core txrx main context
  481. * @cookie: cookie used to lookup virtual address
  482. *
  483. * Return: Pointer to the Rx descriptor
  484. */
  485. static inline
  486. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  487. uint32_t cookie)
  488. {
  489. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  490. }
  491. #else
  492. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  493. uint32_t pool_size,
  494. struct rx_desc_pool *rx_desc_pool);
  495. /**
  496. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  497. * the Rx descriptor on Rx DMA source ring buffer
  498. * @soc: core txrx main context
  499. * @cookie: cookie used to lookup virtual address
  500. *
  501. * Return: void *: Virtual Address of the Rx descriptor
  502. */
  503. static inline
  504. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  505. {
  506. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  507. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  508. struct rx_desc_pool *rx_desc_pool;
  509. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  510. return NULL;
  511. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  512. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  513. return NULL;
  514. return &rx_desc_pool->array[index].rx_desc;
  515. }
  516. /**
  517. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  518. * the Rx descriptor on monitor ring buffer
  519. * @soc: core txrx main context
  520. * @cookie: cookie used to lookup virtual address
  521. *
  522. * Return: void *: Virtual Address of the Rx descriptor
  523. */
  524. static inline
  525. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  526. {
  527. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  528. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  529. /* TODO */
  530. /* Add sanity for pool_id & index */
  531. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  532. }
  533. /**
  534. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  535. * the Rx descriptor on monitor status ring buffer
  536. * @soc: core txrx main context
  537. * @cookie: cookie used to lookup virtual address
  538. *
  539. * Return: void *: Virtual Address of the Rx descriptor
  540. */
  541. static inline
  542. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  543. {
  544. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  545. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  546. /* TODO */
  547. /* Add sanity for pool_id & index */
  548. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  549. }
  550. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  551. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  552. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  553. {
  554. return vdev->ap_bridge_enabled;
  555. }
  556. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  557. static inline QDF_STATUS
  558. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  559. {
  560. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  561. return QDF_STATUS_E_FAILURE;
  562. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  563. return QDF_STATUS_SUCCESS;
  564. }
  565. /**
  566. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  567. * field in ring descriptor
  568. * @ring_desc: ring descriptor
  569. *
  570. * Return: None
  571. */
  572. static inline void
  573. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  574. {
  575. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  576. }
  577. #else
  578. static inline QDF_STATUS
  579. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  580. {
  581. return QDF_STATUS_SUCCESS;
  582. }
  583. static inline void
  584. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  585. {
  586. }
  587. #endif
  588. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  589. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  590. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  591. uint32_t pool_size,
  592. struct rx_desc_pool *rx_desc_pool);
  593. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  594. uint32_t pool_size,
  595. struct rx_desc_pool *rx_desc_pool);
  596. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  597. union dp_rx_desc_list_elem_t **local_desc_list,
  598. union dp_rx_desc_list_elem_t **tail,
  599. uint16_t pool_id,
  600. struct rx_desc_pool *rx_desc_pool);
  601. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  602. struct rx_desc_pool *rx_desc_pool,
  603. uint16_t num_descs,
  604. union dp_rx_desc_list_elem_t **desc_list,
  605. union dp_rx_desc_list_elem_t **tail);
  606. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  607. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  608. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  609. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  610. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  611. struct rx_desc_pool *rx_desc_pool,
  612. uint32_t pool_id);
  613. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  614. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  615. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  616. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  617. void dp_print_napi_stats(struct dp_soc *soc);
  618. /**
  619. * dp_rx_vdev_detach() - detach vdev from dp rx
  620. * @vdev: virtual device instance
  621. *
  622. * Return: QDF_STATUS_SUCCESS: success
  623. * QDF_STATUS_E_RESOURCES: Error return
  624. */
  625. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  626. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  627. uint32_t
  628. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  629. uint8_t reo_ring_num,
  630. uint32_t quota);
  631. /**
  632. * dp_rx_err_process() - Processes error frames routed to REO error ring
  633. * @int_ctx: pointer to DP interrupt context
  634. * @soc: core txrx main context
  635. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  636. * @quota: No. of units (packets) that can be serviced in one shot.
  637. *
  638. * This function implements error processing and top level demultiplexer
  639. * for all the frames routed to REO error ring.
  640. *
  641. * Return: uint32_t: No. of elements processed
  642. */
  643. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  644. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  645. /**
  646. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  647. * @int_ctx: pointer to DP interrupt context
  648. * @soc: core txrx main context
  649. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  650. * @quota: No. of units (packets) that can be serviced in one shot.
  651. *
  652. * This function implements error processing and top level demultiplexer
  653. * for all the frames routed to WBM2HOST sw release ring.
  654. *
  655. * Return: uint32_t: No. of elements processed
  656. */
  657. uint32_t
  658. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  659. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  660. /**
  661. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  662. * multiple nbufs.
  663. * @soc: core txrx main context
  664. * @nbuf: pointer to the first msdu of an amsdu.
  665. *
  666. * This function implements the creation of RX frag_list for cases
  667. * where an MSDU is spread across multiple nbufs.
  668. *
  669. * Return: returns the head nbuf which contains complete frag_list.
  670. */
  671. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  672. /*
  673. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  674. * de-initialization of wifi module.
  675. *
  676. * @soc: core txrx main context
  677. * @pool_id: pool_id which is one of 3 mac_ids
  678. * @rx_desc_pool: rx descriptor pool pointer
  679. *
  680. * Return: None
  681. */
  682. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  683. struct rx_desc_pool *rx_desc_pool);
  684. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  685. /*
  686. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  687. * de-initialization of wifi module.
  688. *
  689. * @soc: core txrx main context
  690. * @pool_id: pool_id which is one of 3 mac_ids
  691. * @rx_desc_pool: rx descriptor pool pointer
  692. *
  693. * Return: None
  694. */
  695. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  696. struct rx_desc_pool *rx_desc_pool);
  697. #ifdef DP_RX_MON_MEM_FRAG
  698. /*
  699. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  700. * de-initialization of wifi module.
  701. *
  702. * @soc: core txrx main context
  703. * @rx_desc_pool: rx descriptor pool pointer
  704. *
  705. * Return: None
  706. */
  707. void dp_rx_desc_frag_free(struct dp_soc *soc,
  708. struct rx_desc_pool *rx_desc_pool);
  709. #else
  710. static inline
  711. void dp_rx_desc_frag_free(struct dp_soc *soc,
  712. struct rx_desc_pool *rx_desc_pool)
  713. {
  714. }
  715. #endif
  716. /*
  717. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  718. * de-initialization of wifi module.
  719. *
  720. * @soc: core txrx main context
  721. * @rx_desc_pool: rx descriptor pool pointer
  722. *
  723. * Return: None
  724. */
  725. void dp_rx_desc_pool_free(struct dp_soc *soc,
  726. struct rx_desc_pool *rx_desc_pool);
  727. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  728. struct dp_txrx_peer *peer);
  729. #ifdef RX_DESC_LOGGING
  730. /*
  731. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  732. * structure
  733. * @rx_desc: rx descriptor pointer
  734. *
  735. * Return: None
  736. */
  737. static inline
  738. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  739. {
  740. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  741. }
  742. /*
  743. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  744. * structure memory
  745. * @rx_desc: rx descriptor pointer
  746. *
  747. * Return: None
  748. */
  749. static inline
  750. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  751. {
  752. qdf_mem_free(rx_desc->dbg_info);
  753. }
  754. /*
  755. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  756. * structure memory
  757. * @rx_desc: rx descriptor pointer
  758. *
  759. * Return: None
  760. */
  761. static
  762. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  763. const char *func_name, uint8_t flag)
  764. {
  765. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  766. if (!info)
  767. return;
  768. if (flag == RX_DESC_REPLENISHED) {
  769. qdf_str_lcopy(info->replenish_caller, func_name,
  770. QDF_MEM_FUNC_NAME_SIZE);
  771. info->replenish_ts = qdf_get_log_timestamp();
  772. } else {
  773. qdf_str_lcopy(info->freelist_caller, func_name,
  774. QDF_MEM_FUNC_NAME_SIZE);
  775. info->freelist_ts = qdf_get_log_timestamp();
  776. info->prev_nbuf = rx_desc->nbuf;
  777. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  778. rx_desc->nbuf_data_addr = NULL;
  779. }
  780. }
  781. #else
  782. static inline
  783. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  784. {
  785. }
  786. static inline
  787. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  788. {
  789. }
  790. static inline
  791. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  792. const char *func_name, uint8_t flag)
  793. {
  794. }
  795. #endif /* RX_DESC_LOGGING */
  796. /**
  797. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  798. *
  799. * @head: pointer to the head of local free list
  800. * @tail: pointer to the tail of local free list
  801. * @new: new descriptor that is added to the free list
  802. * @func_name: caller func name
  803. *
  804. * Return: void:
  805. */
  806. static inline
  807. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  808. union dp_rx_desc_list_elem_t **tail,
  809. struct dp_rx_desc *new, const char *func_name)
  810. {
  811. qdf_assert(head && new);
  812. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  813. new->nbuf = NULL;
  814. new->in_use = 0;
  815. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  816. *head = (union dp_rx_desc_list_elem_t *)new;
  817. /* reset tail if head->next is NULL */
  818. if (!*tail || !(*head)->next)
  819. *tail = *head;
  820. }
  821. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  822. uint8_t mac_id);
  823. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  824. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  825. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  826. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  827. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  828. uint16_t peer_id, uint8_t tid);
  829. #define DP_RX_HEAD_APPEND(head, elem) \
  830. do { \
  831. qdf_nbuf_set_next((elem), (head)); \
  832. (head) = (elem); \
  833. } while (0)
  834. #define DP_RX_LIST_APPEND(head, tail, elem) \
  835. do { \
  836. if (!(head)) { \
  837. (head) = (elem); \
  838. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  839. } else { \
  840. qdf_nbuf_set_next((tail), (elem)); \
  841. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  842. } \
  843. (tail) = (elem); \
  844. qdf_nbuf_set_next((tail), NULL); \
  845. } while (0)
  846. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  847. do { \
  848. if (!(phead)) { \
  849. (phead) = (chead); \
  850. } else { \
  851. qdf_nbuf_set_next((ptail), (chead)); \
  852. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  853. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  854. } \
  855. (ptail) = (ctail); \
  856. qdf_nbuf_set_next((ptail), NULL); \
  857. } while (0)
  858. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  859. /*
  860. * on some third-party platform, the memory below 0x2000
  861. * is reserved for target use, so any memory allocated in this
  862. * region should not be used by host
  863. */
  864. #define MAX_RETRY 50
  865. #define DP_PHY_ADDR_RESERVED 0x2000
  866. #elif defined(BUILD_X86)
  867. /*
  868. * in M2M emulation platforms (x86) the memory below 0x50000000
  869. * is reserved for target use, so any memory allocated in this
  870. * region should not be used by host
  871. */
  872. #define MAX_RETRY 100
  873. #define DP_PHY_ADDR_RESERVED 0x50000000
  874. #endif
  875. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  876. /**
  877. * dp_check_paddr() - check if current phy address is valid or not
  878. * @dp_soc: core txrx main context
  879. * @rx_netbuf: skb buffer
  880. * @paddr: physical address
  881. * @rx_desc_pool: struct of rx descriptor pool
  882. * check if the physical address of the nbuf->data is less
  883. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  884. * allocating new nbuf. We can try for 100 times.
  885. *
  886. * This is a temp WAR till we fix it properly.
  887. *
  888. * Return: success or failure.
  889. */
  890. static inline
  891. int dp_check_paddr(struct dp_soc *dp_soc,
  892. qdf_nbuf_t *rx_netbuf,
  893. qdf_dma_addr_t *paddr,
  894. struct rx_desc_pool *rx_desc_pool)
  895. {
  896. uint32_t nbuf_retry = 0;
  897. int32_t ret;
  898. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  899. return QDF_STATUS_SUCCESS;
  900. do {
  901. dp_debug("invalid phy addr 0x%llx, trying again",
  902. (uint64_t)(*paddr));
  903. nbuf_retry++;
  904. if ((*rx_netbuf)) {
  905. /* Not freeing buffer intentionally.
  906. * Observed that same buffer is getting
  907. * re-allocated resulting in longer load time
  908. * WMI init timeout.
  909. * This buffer is anyway not useful so skip it.
  910. *.Add such buffer to invalid list and free
  911. *.them when driver unload.
  912. **/
  913. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  914. *rx_netbuf,
  915. QDF_DMA_FROM_DEVICE,
  916. rx_desc_pool->buf_size);
  917. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  918. *rx_netbuf);
  919. }
  920. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  921. rx_desc_pool->buf_size,
  922. RX_BUFFER_RESERVATION,
  923. rx_desc_pool->buf_alignment,
  924. FALSE);
  925. if (qdf_unlikely(!(*rx_netbuf)))
  926. return QDF_STATUS_E_FAILURE;
  927. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  928. *rx_netbuf,
  929. QDF_DMA_FROM_DEVICE,
  930. rx_desc_pool->buf_size);
  931. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  932. qdf_nbuf_free(*rx_netbuf);
  933. *rx_netbuf = NULL;
  934. continue;
  935. }
  936. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  937. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  938. return QDF_STATUS_SUCCESS;
  939. } while (nbuf_retry < MAX_RETRY);
  940. if ((*rx_netbuf)) {
  941. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  942. *rx_netbuf,
  943. QDF_DMA_FROM_DEVICE,
  944. rx_desc_pool->buf_size);
  945. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  946. *rx_netbuf);
  947. }
  948. return QDF_STATUS_E_FAILURE;
  949. }
  950. #else
  951. static inline
  952. int dp_check_paddr(struct dp_soc *dp_soc,
  953. qdf_nbuf_t *rx_netbuf,
  954. qdf_dma_addr_t *paddr,
  955. struct rx_desc_pool *rx_desc_pool)
  956. {
  957. return QDF_STATUS_SUCCESS;
  958. }
  959. #endif
  960. /**
  961. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  962. * the MSDU Link Descriptor
  963. * @soc: core txrx main context
  964. * @buf_info: buf_info includes cookie that is used to lookup
  965. * virtual address of link descriptor after deriving the page id
  966. * and the offset or index of the desc on the associatde page.
  967. *
  968. * This is the VA of the link descriptor, that HAL layer later uses to
  969. * retrieve the list of MSDU's for a given MPDU.
  970. *
  971. * Return: void *: Virtual Address of the Rx descriptor
  972. */
  973. static inline
  974. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  975. struct hal_buf_info *buf_info)
  976. {
  977. void *link_desc_va;
  978. struct qdf_mem_multi_page_t *pages;
  979. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  980. pages = &soc->link_desc_pages;
  981. if (!pages)
  982. return NULL;
  983. if (qdf_unlikely(page_id >= pages->num_pages))
  984. return NULL;
  985. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  986. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  987. return link_desc_va;
  988. }
  989. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  990. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  991. #ifdef WLAN_FEATURE_11BE_MLO
  992. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  993. qdf_nbuf_t nbuf)
  994. {
  995. struct qdf_mac_addr *self_mld_mac_addr =
  996. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  997. return qdf_is_macaddr_equal(self_mld_mac_addr,
  998. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  999. QDF_NBUF_DEST_MAC_OFFSET);
  1000. }
  1001. #else
  1002. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  1003. qdf_nbuf_t nbuf)
  1004. {
  1005. return false;
  1006. }
  1007. #endif
  1008. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  1009. qdf_nbuf_t nbuf)
  1010. {
  1011. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  1012. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  1013. QDF_NBUF_DEST_MAC_OFFSET);
  1014. }
  1015. /*
  1016. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  1017. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1018. * @soc: core txrx main context
  1019. * @ta_txrx_peer: source peer entry
  1020. * @rx_tlv_hdr: start address of rx tlvs
  1021. * @nbuf: nbuf that has to be intrabss forwarded
  1022. *
  1023. * Return: true if it is forwarded else false
  1024. */
  1025. static inline
  1026. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1027. struct dp_txrx_peer *ta_txrx_peer,
  1028. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1029. {
  1030. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1031. !(dp_nbuf_dst_addr_is_self_addr(ta_txrx_peer->vdev,
  1032. nbuf) ||
  1033. dp_nbuf_dst_addr_is_mld_addr(ta_txrx_peer->vdev,
  1034. nbuf)))) {
  1035. qdf_nbuf_free(nbuf);
  1036. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1037. return true;
  1038. }
  1039. return false;
  1040. }
  1041. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1042. static inline
  1043. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1044. struct dp_txrx_peer *ta_txrx_peer,
  1045. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1046. {
  1047. return false;
  1048. }
  1049. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1050. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc,
  1051. struct dp_txrx_peer *ta_txrx_peer,
  1052. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1053. struct cdp_tid_rx_stats *tid_stats);
  1054. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc,
  1055. struct dp_txrx_peer *ta_txrx_peer,
  1056. uint8_t tx_vdev_id,
  1057. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1058. struct cdp_tid_rx_stats *tid_stats);
  1059. /**
  1060. * dp_rx_defrag_concat() - Concatenate the fragments
  1061. *
  1062. * @dst: destination pointer to the buffer
  1063. * @src: source pointer from where the fragment payload is to be copied
  1064. *
  1065. * Return: QDF_STATUS
  1066. */
  1067. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1068. {
  1069. /*
  1070. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1071. * to provide space for src, the headroom portion is copied from
  1072. * the original dst buffer to the larger new dst buffer.
  1073. * (This is needed, because the headroom of the dst buffer
  1074. * contains the rx desc.)
  1075. */
  1076. if (!qdf_nbuf_cat(dst, src)) {
  1077. /*
  1078. * qdf_nbuf_cat does not free the src memory.
  1079. * Free src nbuf before returning
  1080. * For failure case the caller takes of freeing the nbuf
  1081. */
  1082. qdf_nbuf_free(src);
  1083. return QDF_STATUS_SUCCESS;
  1084. }
  1085. return QDF_STATUS_E_DEFRAG_ERROR;
  1086. }
  1087. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1088. #ifndef FEATURE_WDS
  1089. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1090. struct dp_txrx_peer *ta_txrx_peer, qdf_nbuf_t nbuf);
  1091. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1092. {
  1093. return QDF_STATUS_SUCCESS;
  1094. }
  1095. static inline void
  1096. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1097. uint8_t *rx_tlv_hdr,
  1098. struct dp_txrx_peer *txrx_peer,
  1099. qdf_nbuf_t nbuf,
  1100. struct hal_rx_msdu_metadata msdu_metadata)
  1101. {
  1102. }
  1103. #endif
  1104. /*
  1105. * dp_rx_desc_dump() - dump the sw rx descriptor
  1106. *
  1107. * @rx_desc: sw rx descriptor
  1108. */
  1109. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1110. {
  1111. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1112. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1113. rx_desc->in_use, rx_desc->unmapped);
  1114. }
  1115. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1116. /*
  1117. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1118. * In qwrap mode, packets originated from
  1119. * any vdev should not loopback and
  1120. * should be dropped.
  1121. * @vdev: vdev on which rx packet is received
  1122. * @nbuf: rx pkt
  1123. *
  1124. */
  1125. #if ATH_SUPPORT_WRAP
  1126. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1127. qdf_nbuf_t nbuf)
  1128. {
  1129. struct dp_vdev *psta_vdev;
  1130. struct dp_pdev *pdev = vdev->pdev;
  1131. uint8_t *data = qdf_nbuf_data(nbuf);
  1132. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1133. /* In qwrap isolation mode, allow loopback packets as all
  1134. * packets go to RootAP and Loopback on the mpsta.
  1135. */
  1136. if (vdev->isolation_vdev)
  1137. return false;
  1138. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1139. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1140. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1141. &data[QDF_MAC_ADDR_SIZE],
  1142. QDF_MAC_ADDR_SIZE))) {
  1143. /* Drop packet if source address is equal to
  1144. * any of the vdev addresses.
  1145. */
  1146. return true;
  1147. }
  1148. }
  1149. }
  1150. return false;
  1151. }
  1152. #else
  1153. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1154. qdf_nbuf_t nbuf)
  1155. {
  1156. return false;
  1157. }
  1158. #endif
  1159. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1160. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1161. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1162. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1163. #include "dp_rx_tag.h"
  1164. #endif
  1165. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1166. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1167. /**
  1168. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1169. * and set the corresponding tag in QDF packet
  1170. * @soc: core txrx main context
  1171. * @vdev: vdev on which the packet is received
  1172. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1173. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1174. * @ring_index: REO ring number, not used for error & monitor ring
  1175. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1176. * @is_update_stats: flag to indicate whether to update stats or not
  1177. * Return: void
  1178. */
  1179. static inline void
  1180. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1181. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1182. uint16_t ring_index,
  1183. bool is_reo_exception, bool is_update_stats)
  1184. {
  1185. }
  1186. #endif
  1187. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1188. /**
  1189. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1190. * and returns whether cce metadata matches
  1191. * @soc: core txrx main context
  1192. * @vdev: vdev on which the packet is received
  1193. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1194. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1195. * Return: bool
  1196. */
  1197. static inline bool
  1198. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1199. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1200. {
  1201. return false;
  1202. }
  1203. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1204. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1205. /**
  1206. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1207. * and set the corresponding tag in QDF packet
  1208. * @soc: core txrx main context
  1209. * @vdev: vdev on which the packet is received
  1210. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1211. * @rx_tlv_hdr: base address where the RX TLVs starts
  1212. * @is_update_stats: flag to indicate whether to update stats or not
  1213. *
  1214. * Return: void
  1215. */
  1216. static inline void
  1217. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1218. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1219. {
  1220. }
  1221. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1222. /*
  1223. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1224. * called during dp rx initialization
  1225. * and at the end of dp_rx_process.
  1226. *
  1227. * @soc: core txrx main context
  1228. * @mac_id: mac_id which is one of 3 mac_ids
  1229. * @dp_rxdma_srng: dp rxdma circular ring
  1230. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1231. * @num_req_buffers: number of buffer to be replenished
  1232. * @desc_list: list of descs if called from dp_rx_process
  1233. * or NULL during dp rx initialization or out of buffer
  1234. * interrupt.
  1235. * @tail: tail of descs list
  1236. * @func_name: name of the caller function
  1237. * Return: return success or failure
  1238. */
  1239. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1240. struct dp_srng *dp_rxdma_srng,
  1241. struct rx_desc_pool *rx_desc_pool,
  1242. uint32_t num_req_buffers,
  1243. union dp_rx_desc_list_elem_t **desc_list,
  1244. union dp_rx_desc_list_elem_t **tail,
  1245. const char *func_name);
  1246. /*
  1247. * __dp_rx_buffers_no_map_replenish() - replenish rxdma ring with rx nbufs
  1248. * use direct APIs to get invalidate
  1249. * and get the physical address of the
  1250. * nbuf instead of map api,called during
  1251. * dp rx initialization and at the end
  1252. * of dp_rx_process.
  1253. *
  1254. * @soc: core txrx main context
  1255. * @mac_id: mac_id which is one of 3 mac_ids
  1256. * @dp_rxdma_srng: dp rxdma circular ring
  1257. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1258. * @num_req_buffers: number of buffer to be replenished
  1259. * @desc_list: list of descs if called from dp_rx_process
  1260. * or NULL during dp rx initialization or out of buffer
  1261. * interrupt.
  1262. * @tail: tail of descs list
  1263. * Return: return success or failure
  1264. */
  1265. QDF_STATUS
  1266. __dp_rx_buffers_no_map_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1267. struct dp_srng *dp_rxdma_srng,
  1268. struct rx_desc_pool *rx_desc_pool,
  1269. uint32_t num_req_buffers,
  1270. union dp_rx_desc_list_elem_t **desc_list,
  1271. union dp_rx_desc_list_elem_t **tail);
  1272. /*
  1273. * __dp_rx_buffers_no_map__lt_replenish() - replenish rxdma ring with rx nbufs
  1274. * use direct APIs to get invalidate
  1275. * and get the physical address of the
  1276. * nbuf instead of map api,called when
  1277. * low threshold interrupt is triggered
  1278. *
  1279. * @soc: core txrx main context
  1280. * @mac_id: mac_id which is one of 3 mac_ids
  1281. * @dp_rxdma_srng: dp rxdma circular ring
  1282. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1283. * Return: return success or failure
  1284. */
  1285. QDF_STATUS
  1286. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1287. struct dp_srng *dp_rxdma_srng,
  1288. struct rx_desc_pool *rx_desc_pool);
  1289. /*
  1290. * __dp_pdev_rx_buffers_no_map_attach() - replenish rxdma ring with rx nbufs
  1291. * use direct APIs to get invalidate
  1292. * and get the physical address of the
  1293. * nbuf instead of map api,called during
  1294. * dp rx initialization.
  1295. *
  1296. * @soc: core txrx main context
  1297. * @mac_id: mac_id which is one of 3 mac_ids
  1298. * @dp_rxdma_srng: dp rxdma circular ring
  1299. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1300. * @num_req_buffers: number of buffer to be replenished
  1301. * Return: return success or failure
  1302. */
  1303. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *dp_soc,
  1304. uint32_t mac_id,
  1305. struct dp_srng *dp_rxdma_srng,
  1306. struct rx_desc_pool *rx_desc_pool,
  1307. uint32_t num_req_buffers);
  1308. /*
  1309. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1310. * called during dp rx initialization
  1311. *
  1312. * @soc: core txrx main context
  1313. * @mac_id: mac_id which is one of 3 mac_ids
  1314. * @dp_rxdma_srng: dp rxdma circular ring
  1315. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1316. * @num_req_buffers: number of buffer to be replenished
  1317. *
  1318. * Return: return success or failure
  1319. */
  1320. QDF_STATUS
  1321. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1322. struct dp_srng *dp_rxdma_srng,
  1323. struct rx_desc_pool *rx_desc_pool,
  1324. uint32_t num_req_buffers);
  1325. /**
  1326. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1327. * (WBM), following error handling
  1328. *
  1329. * @soc: core DP main context
  1330. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1331. * @buf_addr_info: void pointer to the buffer_addr_info
  1332. * @bm_action: put to idle_list or release to msdu_list
  1333. *
  1334. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1335. */
  1336. QDF_STATUS
  1337. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1338. uint8_t bm_action);
  1339. /**
  1340. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1341. * (WBM) by address
  1342. *
  1343. * @soc: core DP main context
  1344. * @link_desc_addr: link descriptor addr
  1345. *
  1346. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1347. */
  1348. QDF_STATUS
  1349. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1350. hal_buff_addrinfo_t link_desc_addr,
  1351. uint8_t bm_action);
  1352. /**
  1353. * dp_rxdma_err_process() - RxDMA error processing functionality
  1354. * @soc: core txrx main contex
  1355. * @mac_id: mac id which is one of 3 mac_ids
  1356. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1357. * @quota: No. of units (packets) that can be serviced in one shot.
  1358. *
  1359. * Return: num of buffers processed
  1360. */
  1361. uint32_t
  1362. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1363. uint32_t mac_id, uint32_t quota);
  1364. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1365. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer);
  1366. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1367. uint8_t *rx_tlv_hdr);
  1368. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1369. struct dp_txrx_peer *peer);
  1370. /*
  1371. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1372. *
  1373. * @soc: core txrx main context
  1374. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1375. * @ring_desc: opaque pointer to the RX ring descriptor
  1376. * @rx_desc: host rx descriptor
  1377. *
  1378. * Return: void
  1379. */
  1380. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1381. hal_ring_handle_t hal_ring_hdl,
  1382. hal_ring_desc_t ring_desc,
  1383. struct dp_rx_desc *rx_desc);
  1384. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1385. #ifdef QCA_PEER_EXT_STATS
  1386. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1387. qdf_nbuf_t nbuf);
  1388. #endif /* QCA_PEER_EXT_STATS */
  1389. #ifdef RX_DESC_DEBUG_CHECK
  1390. /**
  1391. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1392. * @rx_desc: rx descriptor pointer
  1393. *
  1394. * Return: true, if magic is correct, else false.
  1395. */
  1396. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1397. {
  1398. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1399. return false;
  1400. rx_desc->magic = 0;
  1401. return true;
  1402. }
  1403. /**
  1404. * dp_rx_desc_prep() - prepare rx desc
  1405. * @rx_desc: rx descriptor pointer to be prepared
  1406. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1407. *
  1408. * Note: assumption is that we are associating a nbuf which is mapped
  1409. *
  1410. * Return: none
  1411. */
  1412. static inline
  1413. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1414. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1415. {
  1416. rx_desc->magic = DP_RX_DESC_MAGIC;
  1417. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1418. rx_desc->unmapped = 0;
  1419. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1420. }
  1421. /**
  1422. * dp_rx_desc_frag_prep() - prepare rx desc
  1423. * @rx_desc: rx descriptor pointer to be prepared
  1424. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1425. *
  1426. * Note: assumption is that we frag address is mapped
  1427. *
  1428. * Return: none
  1429. */
  1430. #ifdef DP_RX_MON_MEM_FRAG
  1431. static inline
  1432. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1433. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1434. {
  1435. rx_desc->magic = DP_RX_DESC_MAGIC;
  1436. rx_desc->rx_buf_start =
  1437. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1438. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1439. rx_desc->unmapped = 0;
  1440. }
  1441. #else
  1442. static inline
  1443. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1444. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1445. {
  1446. }
  1447. #endif /* DP_RX_MON_MEM_FRAG */
  1448. /**
  1449. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1450. * @rx_desc: rx descriptor
  1451. * @ring_paddr: paddr obatined from the ring
  1452. *
  1453. * Returns: QDF_STATUS
  1454. */
  1455. static inline
  1456. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1457. uint64_t ring_paddr)
  1458. {
  1459. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1460. }
  1461. #else
  1462. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1463. {
  1464. return true;
  1465. }
  1466. static inline
  1467. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1468. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1469. {
  1470. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1471. rx_desc->unmapped = 0;
  1472. }
  1473. #ifdef DP_RX_MON_MEM_FRAG
  1474. static inline
  1475. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1476. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1477. {
  1478. rx_desc->rx_buf_start =
  1479. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1480. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1481. rx_desc->unmapped = 0;
  1482. }
  1483. #else
  1484. static inline
  1485. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1486. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1487. {
  1488. }
  1489. #endif /* DP_RX_MON_MEM_FRAG */
  1490. static inline
  1491. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1492. uint64_t ring_paddr)
  1493. {
  1494. return true;
  1495. }
  1496. #endif /* RX_DESC_DEBUG_CHECK */
  1497. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1498. bool is_mon_dest_desc);
  1499. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1500. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1501. uint8_t err_code, uint8_t mac_id);
  1502. #ifndef QCA_MULTIPASS_SUPPORT
  1503. static inline
  1504. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1505. uint8_t tid)
  1506. {
  1507. return false;
  1508. }
  1509. #else
  1510. bool dp_rx_multipass_process(struct dp_txrx_peer *peer, qdf_nbuf_t nbuf,
  1511. uint8_t tid);
  1512. #endif
  1513. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1514. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1515. static inline
  1516. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1517. struct dp_peer *peer_handle,
  1518. bool value, uint8_t *mac_addr)
  1519. {
  1520. return QDF_STATUS_SUCCESS;
  1521. }
  1522. #endif
  1523. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1524. /**
  1525. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1526. * Caller to hold peer refcount and check for valid peer
  1527. * @soc: soc
  1528. * @vdev: vdev
  1529. * @txrx_peer: txrx peer
  1530. * @nbuf_head: skb list head
  1531. * @nbuf_tail: skb list tail
  1532. *
  1533. * Return: QDF_STATUS
  1534. */
  1535. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1536. struct dp_vdev *vdev,
  1537. struct dp_txrx_peer *peer,
  1538. qdf_nbuf_t nbuf_head,
  1539. qdf_nbuf_t nbuf_tail);
  1540. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1541. /**
  1542. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1543. * caller to hold peer refcount and check for valid peer
  1544. * @soc: soc
  1545. * @vdev: vdev
  1546. * @peer: peer
  1547. * @nbuf_head: skb list head
  1548. * @nbuf_tail: skb list tail
  1549. *
  1550. * return: QDF_STATUS
  1551. */
  1552. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1553. struct dp_vdev *vdev,
  1554. struct dp_txrx_peer *peer,
  1555. qdf_nbuf_t nbuf_head,
  1556. qdf_nbuf_t nbuf_tail);
  1557. #endif
  1558. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1559. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1560. /*
  1561. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1562. * @int_ctx: pointer to DP interrupt context
  1563. * @dp_soc - DP soc structure pointer
  1564. * @hal_ring_hdl - HAL ring handle
  1565. *
  1566. * Return: 0 on success; error on failure
  1567. */
  1568. static inline int
  1569. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1570. hal_ring_handle_t hal_ring_hdl)
  1571. {
  1572. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1573. }
  1574. /*
  1575. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1576. * @int_ctx: pointer to DP interrupt context
  1577. * @dp_soc - DP soc structure pointer
  1578. * @hal_ring_hdl - HAL ring handle
  1579. *
  1580. * Return - None
  1581. */
  1582. static inline void
  1583. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1584. hal_ring_handle_t hal_ring_hdl)
  1585. {
  1586. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1587. }
  1588. #else
  1589. static inline int
  1590. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1591. hal_ring_handle_t hal_ring_hdl)
  1592. {
  1593. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1594. }
  1595. static inline void
  1596. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1597. hal_ring_handle_t hal_ring_hdl)
  1598. {
  1599. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1600. }
  1601. #endif
  1602. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1603. /*
  1604. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1605. *
  1606. * This api should be called at soc init and afterevery sg processing.
  1607. *@soc: DP SOC handle
  1608. */
  1609. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1610. {
  1611. if (soc) {
  1612. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1613. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1614. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1615. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1616. }
  1617. }
  1618. /*
  1619. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1620. *
  1621. * This api should be called in down path, to avoid any leak.
  1622. *@soc: DP SOC handle
  1623. */
  1624. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1625. {
  1626. if (soc) {
  1627. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1628. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1629. dp_rx_wbm_sg_list_reset(soc);
  1630. }
  1631. }
  1632. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1633. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1634. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1635. do { \
  1636. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1637. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1638. break; \
  1639. } \
  1640. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1641. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1642. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1643. rx_desc->pool_id)) \
  1644. DP_RX_MERGE_TWO_LIST(head, tail, \
  1645. ebuf_head, ebuf_tail);\
  1646. ebuf_head = NULL; \
  1647. ebuf_tail = NULL; \
  1648. } \
  1649. } while (0)
  1650. #else
  1651. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1652. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1653. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1654. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1655. /*
  1656. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1657. to refill
  1658. * @soc: DP SOC handle
  1659. * @buf_info: the last link desc buf info
  1660. * @ring_buf_info: current buf address pointor including link desc
  1661. *
  1662. * return: none.
  1663. */
  1664. void dp_rx_link_desc_refill_duplicate_check(
  1665. struct dp_soc *soc,
  1666. struct hal_buf_info *buf_info,
  1667. hal_buff_addrinfo_t ring_buf_info);
  1668. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1669. /**
  1670. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1671. * @soc : dp_soc handle
  1672. * @pdev: dp_pdev handle
  1673. * @peer_id: peer_id of the peer for which completion came
  1674. * @ppdu_id: ppdu_id
  1675. * @netbuf: Buffer pointer
  1676. *
  1677. * This function is used to deliver rx packet to packet capture
  1678. */
  1679. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1680. uint16_t peer_id, uint32_t is_offload,
  1681. qdf_nbuf_t netbuf);
  1682. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1683. uint32_t is_offload);
  1684. #else
  1685. static inline void
  1686. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1687. uint16_t peer_id, uint32_t is_offload,
  1688. qdf_nbuf_t netbuf)
  1689. {
  1690. }
  1691. static inline void
  1692. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1693. uint32_t is_offload)
  1694. {
  1695. }
  1696. #endif
  1697. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1698. #ifdef FEATURE_MEC
  1699. /**
  1700. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1701. * back on same vap or a different vap.
  1702. * @soc: core DP main context
  1703. * @peer: dp peer handler
  1704. * @rx_tlv_hdr: start of the rx TLV header
  1705. * @nbuf: pkt buffer
  1706. *
  1707. * Return: bool (true if it is a looped back pkt else false)
  1708. *
  1709. */
  1710. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1711. struct dp_txrx_peer *peer,
  1712. uint8_t *rx_tlv_hdr,
  1713. qdf_nbuf_t nbuf);
  1714. #else
  1715. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1716. struct dp_txrx_peer *peer,
  1717. uint8_t *rx_tlv_hdr,
  1718. qdf_nbuf_t nbuf)
  1719. {
  1720. return false;
  1721. }
  1722. #endif /* FEATURE_MEC */
  1723. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1724. #ifdef RECEIVE_OFFLOAD
  1725. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1726. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1727. #else
  1728. static inline
  1729. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1730. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1731. {
  1732. }
  1733. #endif
  1734. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1735. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer,
  1736. uint8_t ring_id,
  1737. struct cdp_tid_rx_stats *tid_stats);
  1738. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1739. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1740. hal_ring_handle_t hal_ring_hdl,
  1741. uint32_t num_entries,
  1742. bool *near_full);
  1743. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1744. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1745. hal_ring_desc_t ring_desc);
  1746. #else
  1747. static inline void
  1748. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1749. hal_ring_desc_t ring_desc)
  1750. {
  1751. }
  1752. #endif
  1753. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1754. #ifdef RX_DESC_SANITY_WAR
  1755. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1756. hal_ring_handle_t hal_ring_hdl,
  1757. hal_ring_desc_t ring_desc,
  1758. struct dp_rx_desc *rx_desc);
  1759. #else
  1760. static inline
  1761. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1762. hal_ring_handle_t hal_ring_hdl,
  1763. hal_ring_desc_t ring_desc,
  1764. struct dp_rx_desc *rx_desc)
  1765. {
  1766. return QDF_STATUS_SUCCESS;
  1767. }
  1768. #endif
  1769. #ifdef DP_RX_DROP_RAW_FRM
  1770. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1771. #else
  1772. static inline
  1773. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1774. {
  1775. return false;
  1776. }
  1777. #endif
  1778. #ifdef RX_DESC_DEBUG_CHECK
  1779. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1780. hal_ring_desc_t ring_desc,
  1781. struct dp_rx_desc *rx_desc);
  1782. #else
  1783. static inline
  1784. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1785. hal_ring_desc_t ring_desc,
  1786. struct dp_rx_desc *rx_desc)
  1787. {
  1788. return QDF_STATUS_SUCCESS;
  1789. }
  1790. #endif
  1791. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1792. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1793. #else
  1794. static inline
  1795. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1796. {
  1797. }
  1798. #endif
  1799. /**
  1800. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1801. * @nbuf: pointer to the first msdu of an amsdu.
  1802. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1803. *
  1804. * The ipsumed field of the skb is set based on whether HW validated the
  1805. * IP/TCP/UDP checksum.
  1806. *
  1807. * Return: void
  1808. */
  1809. static inline
  1810. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1811. qdf_nbuf_t nbuf,
  1812. uint8_t *rx_tlv_hdr)
  1813. {
  1814. qdf_nbuf_rx_cksum_t cksum = {0};
  1815. //TODO - Move this to ring desc api
  1816. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1817. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1818. uint32_t ip_csum_err, tcp_udp_csum_er;
  1819. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1820. &tcp_udp_csum_er);
  1821. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1822. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1823. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1824. } else {
  1825. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1826. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1827. }
  1828. }
  1829. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1830. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1831. static inline
  1832. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1833. int max_reap_limit)
  1834. {
  1835. bool limit_hit = false;
  1836. limit_hit =
  1837. (num_reaped >= max_reap_limit) ? true : false;
  1838. if (limit_hit)
  1839. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1840. return limit_hit;
  1841. }
  1842. static inline
  1843. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1844. {
  1845. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1846. }
  1847. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1848. {
  1849. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1850. return cfg->rx_reap_loop_pkt_limit;
  1851. }
  1852. #else
  1853. static inline
  1854. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1855. int max_reap_limit)
  1856. {
  1857. return false;
  1858. }
  1859. static inline
  1860. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1861. {
  1862. return false;
  1863. }
  1864. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1865. {
  1866. return 0;
  1867. }
  1868. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1869. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1870. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1871. /**
  1872. * dp_rx_is_list_ready() - Make different lists for 4-address
  1873. and 3-address frames
  1874. * @nbuf_head: skb list head
  1875. * @vdev: vdev
  1876. * @txrx_peer : txrx_peer
  1877. * @peer_id: peer id of new received frame
  1878. * @vdev_id: vdev_id of new received frame
  1879. *
  1880. * Return: true if peer_ids are different.
  1881. */
  1882. static inline bool
  1883. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1884. struct dp_vdev *vdev,
  1885. struct dp_txrx_peer *txrx_peer,
  1886. uint16_t peer_id,
  1887. uint8_t vdev_id)
  1888. {
  1889. if (nbuf_head && txrx_peer && txrx_peer->peer_id != peer_id)
  1890. return true;
  1891. return false;
  1892. }
  1893. #else
  1894. static inline bool
  1895. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1896. struct dp_vdev *vdev,
  1897. struct dp_txrx_peer *txrx_peer,
  1898. uint16_t peer_id,
  1899. uint8_t vdev_id)
  1900. {
  1901. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1902. return true;
  1903. return false;
  1904. }
  1905. #endif
  1906. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  1907. /**
  1908. * dp_rx_mark_first_packet_after_wow_wakeup - get first packet after wow wakeup
  1909. * @pdev: pointer to dp_pdev structure
  1910. * @rx_tlv: pointer to rx_pkt_tlvs structure
  1911. * @nbuf: pointer to skb buffer
  1912. *
  1913. * Return: None
  1914. */
  1915. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  1916. uint8_t *rx_tlv,
  1917. qdf_nbuf_t nbuf);
  1918. #else
  1919. static inline void
  1920. dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  1921. uint8_t *rx_tlv,
  1922. qdf_nbuf_t nbuf)
  1923. {
  1924. }
  1925. #endif
  1926. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  1927. static inline uint8_t
  1928. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1929. {
  1930. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  1931. }
  1932. static inline uint8_t
  1933. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1934. {
  1935. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  1936. }
  1937. #else
  1938. static inline uint8_t
  1939. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1940. {
  1941. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  1942. uint8_t wbm2_sw_rx_rel_ring_id;
  1943. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  1944. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  1945. wbm2_sw_rx_rel_ring_id);
  1946. }
  1947. static inline uint8_t
  1948. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1949. {
  1950. return dp_rx_get_rx_bm_id(soc);
  1951. }
  1952. #endif
  1953. static inline uint16_t
  1954. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  1955. {
  1956. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  1957. peer_metadata);
  1958. }
  1959. /**
  1960. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  1961. * @soc: SOC handle
  1962. * @rx_desc_pool: pointer to RX descriptor pool
  1963. * @pool_id: pool ID
  1964. *
  1965. * Return: None
  1966. */
  1967. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  1968. struct rx_desc_pool *rx_desc_pool,
  1969. uint32_t pool_id);
  1970. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  1971. struct rx_desc_pool *rx_desc_pool,
  1972. uint32_t pool_id);
  1973. /**
  1974. * dp_rx_pkt_tracepoints_enabled() - Get the state of rx pkt tracepoint
  1975. *
  1976. * Return: True if any rx pkt tracepoint is enabled else false
  1977. */
  1978. static inline
  1979. bool dp_rx_pkt_tracepoints_enabled(void)
  1980. {
  1981. return (qdf_trace_dp_rx_tcp_pkt_enabled() ||
  1982. qdf_trace_dp_rx_udp_pkt_enabled() ||
  1983. qdf_trace_dp_rx_pkt_enabled());
  1984. }
  1985. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1986. static inline
  1987. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  1988. struct dp_srng *rxdma_srng,
  1989. struct rx_desc_pool *rx_desc_pool,
  1990. uint32_t num_req_buffers)
  1991. {
  1992. return __dp_pdev_rx_buffers_no_map_attach(soc, mac_id,
  1993. rxdma_srng,
  1994. rx_desc_pool,
  1995. num_req_buffers);
  1996. }
  1997. static inline
  1998. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  1999. struct dp_srng *rxdma_srng,
  2000. struct rx_desc_pool *rx_desc_pool,
  2001. uint32_t num_req_buffers,
  2002. union dp_rx_desc_list_elem_t **desc_list,
  2003. union dp_rx_desc_list_elem_t **tail)
  2004. {
  2005. __dp_rx_buffers_no_map_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2006. num_req_buffers, desc_list, tail);
  2007. }
  2008. static inline
  2009. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2010. struct dp_srng *rxdma_srng,
  2011. struct rx_desc_pool *rx_desc_pool,
  2012. uint32_t num_req_buffers,
  2013. union dp_rx_desc_list_elem_t **desc_list,
  2014. union dp_rx_desc_list_elem_t **tail)
  2015. {
  2016. __dp_rx_buffers_no_map_lt_replenish(soc, mac_id, rxdma_srng,
  2017. rx_desc_pool);
  2018. }
  2019. static inline
  2020. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2021. qdf_nbuf_t nbuf,
  2022. uint32_t buf_size)
  2023. {
  2024. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2025. (void *)(nbuf->data + buf_size));
  2026. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2027. }
  2028. static inline
  2029. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2030. qdf_nbuf_t nbuf,
  2031. uint32_t buf_size)
  2032. {
  2033. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2034. (void *)(nbuf->data + buf_size));
  2035. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  2036. }
  2037. #if !defined(SPECULATIVE_READ_DISABLED)
  2038. static inline
  2039. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2040. struct dp_rx_desc *rx_desc,
  2041. uint8_t reo_ring_num)
  2042. {
  2043. struct rx_desc_pool *rx_desc_pool;
  2044. qdf_nbuf_t nbuf;
  2045. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2046. nbuf = rx_desc->nbuf;
  2047. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2048. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2049. }
  2050. static inline
  2051. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2052. struct rx_desc_pool *rx_desc_pool,
  2053. qdf_nbuf_t nbuf)
  2054. {
  2055. qdf_nbuf_dma_inv_range((void *)nbuf->data,
  2056. (void *)(nbuf->data + rx_desc_pool->buf_size));
  2057. }
  2058. #else
  2059. static inline
  2060. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2061. struct dp_rx_desc *rx_desc,
  2062. uint8_t reo_ring_num)
  2063. {
  2064. }
  2065. static inline
  2066. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2067. struct rx_desc_pool *rx_desc_pool,
  2068. qdf_nbuf_t nbuf)
  2069. {
  2070. }
  2071. #endif
  2072. static inline
  2073. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2074. uint32_t bufs_reaped)
  2075. {
  2076. }
  2077. static inline
  2078. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2079. struct rx_desc_pool *rx_desc_pool)
  2080. {
  2081. return qdf_nbuf_alloc_simple(soc->osdev, rx_desc_pool->buf_size);
  2082. }
  2083. static inline
  2084. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2085. {
  2086. qdf_nbuf_free_simple(nbuf);
  2087. }
  2088. #else
  2089. static inline
  2090. QDF_STATUS dp_pdev_rx_buffers_attach_simple(struct dp_soc *soc, uint32_t mac_id,
  2091. struct dp_srng *rxdma_srng,
  2092. struct rx_desc_pool *rx_desc_pool,
  2093. uint32_t num_req_buffers)
  2094. {
  2095. return dp_pdev_rx_buffers_attach(soc, mac_id,
  2096. rxdma_srng,
  2097. rx_desc_pool,
  2098. num_req_buffers);
  2099. }
  2100. static inline
  2101. void dp_rx_buffers_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2102. struct dp_srng *rxdma_srng,
  2103. struct rx_desc_pool *rx_desc_pool,
  2104. uint32_t num_req_buffers,
  2105. union dp_rx_desc_list_elem_t **desc_list,
  2106. union dp_rx_desc_list_elem_t **tail)
  2107. {
  2108. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2109. num_req_buffers, desc_list, tail);
  2110. }
  2111. static inline
  2112. void dp_rx_buffers_lt_replenish_simple(struct dp_soc *soc, uint32_t mac_id,
  2113. struct dp_srng *rxdma_srng,
  2114. struct rx_desc_pool *rx_desc_pool,
  2115. uint32_t num_req_buffers,
  2116. union dp_rx_desc_list_elem_t **desc_list,
  2117. union dp_rx_desc_list_elem_t **tail)
  2118. {
  2119. dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  2120. num_req_buffers, desc_list, tail);
  2121. }
  2122. static inline
  2123. qdf_dma_addr_t dp_rx_nbuf_sync_no_dsb(struct dp_soc *dp_soc,
  2124. qdf_nbuf_t nbuf,
  2125. uint32_t buf_size)
  2126. {
  2127. return (qdf_dma_addr_t)NULL;
  2128. }
  2129. static inline
  2130. qdf_dma_addr_t dp_rx_nbuf_sync(struct dp_soc *dp_soc,
  2131. qdf_nbuf_t nbuf,
  2132. uint32_t buf_size)
  2133. {
  2134. return (qdf_dma_addr_t)NULL;
  2135. }
  2136. static inline
  2137. void dp_rx_nbuf_unmap(struct dp_soc *soc,
  2138. struct dp_rx_desc *rx_desc,
  2139. uint8_t reo_ring_num)
  2140. {
  2141. struct rx_desc_pool *rx_desc_pool;
  2142. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2143. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  2144. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2145. rx_desc_pool->buf_size,
  2146. false);
  2147. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2148. QDF_DMA_FROM_DEVICE,
  2149. rx_desc_pool->buf_size);
  2150. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  2151. }
  2152. static inline
  2153. void dp_rx_nbuf_unmap_pool(struct dp_soc *soc,
  2154. struct rx_desc_pool *rx_desc_pool,
  2155. qdf_nbuf_t nbuf)
  2156. {
  2157. dp_ipa_handle_rx_buf_smmu_mapping(soc, nbuf, rx_desc_pool->buf_size,
  2158. false);
  2159. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_FROM_DEVICE,
  2160. rx_desc_pool->buf_size);
  2161. }
  2162. static inline
  2163. void dp_rx_per_core_stats_update(struct dp_soc *soc, uint8_t ring_id,
  2164. uint32_t bufs_reaped)
  2165. {
  2166. DP_STATS_INC(soc,
  2167. rx.ring_packets[smp_processor_id()][ring_id], bufs_reaped);
  2168. }
  2169. static inline
  2170. qdf_nbuf_t dp_rx_nbuf_alloc(struct dp_soc *soc,
  2171. struct rx_desc_pool *rx_desc_pool)
  2172. {
  2173. return qdf_nbuf_alloc(soc->osdev, rx_desc_pool->buf_size,
  2174. RX_BUFFER_RESERVATION,
  2175. rx_desc_pool->buf_alignment, FALSE);
  2176. }
  2177. static inline
  2178. void dp_rx_nbuf_free(qdf_nbuf_t nbuf)
  2179. {
  2180. qdf_nbuf_free(nbuf);
  2181. }
  2182. #endif
  2183. /**
  2184. * dp_rx_get_txrx_peer_and_vdev() - Get txrx peer and vdev from peer id
  2185. * @nbuf : pointer to the first msdu of an amsdu.
  2186. * @peer_id : Peer id of the peer
  2187. * @txrx_ref_handle : Buffer to save the handle for txrx peer's reference
  2188. * @pkt_capture_offload : Flag indicating if pkt capture offload is needed
  2189. * @vdev : Buffer to hold pointer to vdev
  2190. * @rx_pdev : Buffer to hold pointer to rx pdev
  2191. * @dsf : delay stats flag
  2192. * @old_tid : Old tid
  2193. *
  2194. * Get txrx peer and vdev from peer id
  2195. *
  2196. * Return: Pointer to txrx peer
  2197. */
  2198. static inline struct dp_txrx_peer *
  2199. dp_rx_get_txrx_peer_and_vdev(struct dp_soc *soc,
  2200. qdf_nbuf_t nbuf,
  2201. uint16_t peer_id,
  2202. dp_txrx_ref_handle *txrx_ref_handle,
  2203. bool pkt_capture_offload,
  2204. struct dp_vdev **vdev,
  2205. struct dp_pdev **rx_pdev,
  2206. uint32_t *dsf,
  2207. uint32_t *old_tid)
  2208. {
  2209. struct dp_txrx_peer *txrx_peer = NULL;
  2210. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id, txrx_ref_handle,
  2211. DP_MOD_ID_RX);
  2212. if (qdf_likely(txrx_peer)) {
  2213. *vdev = txrx_peer->vdev;
  2214. } else {
  2215. nbuf->next = NULL;
  2216. dp_rx_deliver_to_pkt_capture_no_peer(soc, nbuf,
  2217. pkt_capture_offload);
  2218. if (!pkt_capture_offload)
  2219. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2220. goto end;
  2221. }
  2222. if (qdf_unlikely(!(*vdev))) {
  2223. qdf_nbuf_free(nbuf);
  2224. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2225. goto end;
  2226. }
  2227. *rx_pdev = (*vdev)->pdev;
  2228. *dsf = (*rx_pdev)->delay_stats_flag;
  2229. *old_tid = 0xff;
  2230. end:
  2231. return txrx_peer;
  2232. }
  2233. static inline QDF_STATUS
  2234. dp_peer_rx_reorder_queue_setup(struct dp_soc *soc, struct dp_peer *peer,
  2235. int tid, uint32_t ba_window_size)
  2236. {
  2237. return soc->arch_ops.dp_peer_rx_reorder_queue_setup(soc,
  2238. peer, tid,
  2239. ba_window_size);
  2240. }
  2241. #endif /* _DP_RX_H */