lpass-cdc.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  3. */
  4. #include <linux/of_platform.h>
  5. #include <linux/module.h>
  6. #include <linux/io.h>
  7. #include <linux/init.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/printk.h>
  10. #include <linux/delay.h>
  11. #include <linux/kernel.h>
  12. #include <linux/clk.h>
  13. #include <soc/snd_event.h>
  14. #include <linux/pm_runtime.h>
  15. #include <soc/swr-common.h>
  16. #include <dsp/digital-cdc-rsc-mgr.h>
  17. #include "lpass-cdc.h"
  18. #include "internal.h"
  19. #include "lpass-cdc-clk-rsc.h"
  20. #include <linux/qti-regmap-debugfs.h>
  21. #define DRV_NAME "lpass-cdc"
  22. #define LPASS_CDC_VERSION_ENTRY_SIZE 32
  23. #define LPASS_CDC_STRING_LEN 80
  24. static const struct snd_soc_component_driver lpass_cdc;
  25. /* pm runtime auto suspend timer in msecs */
  26. #define LPASS_CDC_AUTO_SUSPEND_DELAY 100 /* delay in msec */
  27. /* MCLK_MUX table for all macros */
  28. static u16 lpass_cdc_mclk_mux_tbl[MAX_MACRO][MCLK_MUX_MAX] = {
  29. {TX_MACRO, VA_MACRO},
  30. {TX_MACRO, RX_MACRO},
  31. {TX_MACRO, WSA_MACRO},
  32. {TX_MACRO, VA_MACRO},
  33. };
  34. static bool lpass_cdc_is_valid_codec_dev(struct device *dev);
  35. int lpass_cdc_set_port_map(struct snd_soc_component *component,
  36. u32 size, void *data)
  37. {
  38. struct lpass_cdc_priv *priv = NULL;
  39. struct swr_mstr_port_map *map = NULL;
  40. u16 idx;
  41. if (!component || (size == 0) || !data)
  42. return -EINVAL;
  43. priv = snd_soc_component_get_drvdata(component);
  44. if (!priv)
  45. return -EINVAL;
  46. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  47. dev_err(priv->dev, "%s: invalid codec\n", __func__);
  48. return -EINVAL;
  49. }
  50. map = (struct swr_mstr_port_map *)data;
  51. for (idx = 0; idx < size; idx++) {
  52. if (priv->macro_params[map->id].set_port_map)
  53. priv->macro_params[map->id].set_port_map(component,
  54. map->uc,
  55. SWR_MSTR_PORT_LEN,
  56. map->swr_port_params);
  57. map += 1;
  58. }
  59. return 0;
  60. }
  61. EXPORT_SYMBOL(lpass_cdc_set_port_map);
  62. static void lpass_cdc_ahb_write_device(char __iomem *io_base,
  63. u16 reg, u8 value)
  64. {
  65. u32 temp = (u32)(value) & 0x000000FF;
  66. iowrite32(temp, io_base + reg);
  67. }
  68. static void lpass_cdc_ahb_read_device(char __iomem *io_base,
  69. u16 reg, u8 *value)
  70. {
  71. u32 temp;
  72. temp = ioread32(io_base + reg);
  73. *value = (u8)temp;
  74. }
  75. static int __lpass_cdc_reg_read(struct lpass_cdc_priv *priv,
  76. u16 macro_id, u16 reg, u8 *val)
  77. {
  78. int ret = 0;
  79. mutex_lock(&priv->clk_lock);
  80. if (!priv->dev_up) {
  81. dev_dbg_ratelimited(priv->dev,
  82. "%s: SSR in progress, exit\n", __func__);
  83. ret = -EINVAL;
  84. goto ssr_err;
  85. }
  86. if (priv->macro_params[VA_MACRO].dev) {
  87. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  88. if (!lpass_cdc_check_core_votes(priv->macro_params[VA_MACRO].dev))
  89. goto ssr_err;
  90. }
  91. lpass_cdc_ahb_read_device(
  92. priv->macro_params[macro_id].io_base, reg, val);
  93. if (priv->macro_params[VA_MACRO].dev) {
  94. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  95. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  96. }
  97. ssr_err:
  98. mutex_unlock(&priv->clk_lock);
  99. return ret;
  100. }
  101. static int __lpass_cdc_reg_write(struct lpass_cdc_priv *priv,
  102. u16 macro_id, u16 reg, u8 val)
  103. {
  104. int ret = 0;
  105. mutex_lock(&priv->clk_lock);
  106. if (!priv->dev_up) {
  107. dev_dbg_ratelimited(priv->dev,
  108. "%s: SSR in progress, exit\n", __func__);
  109. ret = -EINVAL;
  110. goto ssr_err;
  111. }
  112. if (priv->macro_params[VA_MACRO].dev) {
  113. pm_runtime_get_sync(priv->macro_params[VA_MACRO].dev);
  114. if (!lpass_cdc_check_core_votes(priv->macro_params[VA_MACRO].dev))
  115. goto ssr_err;
  116. }
  117. lpass_cdc_ahb_write_device(
  118. priv->macro_params[macro_id].io_base, reg, val);
  119. if (priv->macro_params[VA_MACRO].dev) {
  120. pm_runtime_mark_last_busy(priv->macro_params[VA_MACRO].dev);
  121. pm_runtime_put_autosuspend(priv->macro_params[VA_MACRO].dev);
  122. }
  123. ssr_err:
  124. mutex_unlock(&priv->clk_lock);
  125. return ret;
  126. }
  127. static int lpass_cdc_update_wcd_event(void *handle, u16 event, u32 data)
  128. {
  129. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  130. if (!priv) {
  131. pr_err("%s:Invalid lpass_cdc priv handle\n", __func__);
  132. return -EINVAL;
  133. }
  134. switch (event) {
  135. case WCD_LPASS_CDC_EVT_RX_MUTE:
  136. if (priv->macro_params[RX_MACRO].event_handler)
  137. priv->macro_params[RX_MACRO].event_handler(
  138. priv->component,
  139. LPASS_CDC_MACRO_EVT_RX_MUTE, data);
  140. break;
  141. case WCD_LPASS_CDC_EVT_IMPED_TRUE:
  142. if (priv->macro_params[RX_MACRO].event_handler)
  143. priv->macro_params[RX_MACRO].event_handler(
  144. priv->component,
  145. LPASS_CDC_MACRO_EVT_IMPED_TRUE, data);
  146. break;
  147. case WCD_LPASS_CDC_EVT_IMPED_FALSE:
  148. if (priv->macro_params[RX_MACRO].event_handler)
  149. priv->macro_params[RX_MACRO].event_handler(
  150. priv->component,
  151. LPASS_CDC_MACRO_EVT_IMPED_FALSE, data);
  152. break;
  153. case WCD_LPASS_CDC_EVT_RX_COMPANDER_SOFT_RST:
  154. if (priv->macro_params[RX_MACRO].event_handler)
  155. priv->macro_params[RX_MACRO].event_handler(
  156. priv->component,
  157. LPASS_CDC_MACRO_EVT_RX_COMPANDER_SOFT_RST, data);
  158. break;
  159. case WCD_LPASS_CDC_EVT_BCS_CLK_OFF:
  160. if (priv->macro_params[TX_MACRO].event_handler)
  161. priv->macro_params[TX_MACRO].event_handler(
  162. priv->component,
  163. LPASS_CDC_MACRO_EVT_BCS_CLK_OFF, data);
  164. break;
  165. case WCD_LPASS_CDC_EVT_RX_PA_GAIN_UPDATE:
  166. if (priv->macro_params[RX_MACRO].event_handler)
  167. priv->macro_params[RX_MACRO].event_handler(
  168. priv->component,
  169. LPASS_CDC_MACRO_EVT_RX_PA_GAIN_UPDATE,
  170. data);
  171. break;
  172. case WCD_LPASS_CDC_EVT_HPHL_HD2_ENABLE:
  173. if (priv->macro_params[RX_MACRO].event_handler)
  174. priv->macro_params[RX_MACRO].event_handler(
  175. priv->component,
  176. LPASS_CDC_MACRO_EVT_HPHL_HD2_ENABLE, data);
  177. break;
  178. case WCD_LPASS_CDC_EVT_HPHR_HD2_ENABLE:
  179. if (priv->macro_params[RX_MACRO].event_handler)
  180. priv->macro_params[RX_MACRO].event_handler(
  181. priv->component,
  182. LPASS_CDC_MACRO_EVT_HPHR_HD2_ENABLE, data);
  183. break;
  184. default:
  185. dev_err(priv->dev, "%s: Invalid event %d trigger from wcd\n",
  186. __func__, event);
  187. return -EINVAL;
  188. }
  189. return 0;
  190. }
  191. static int lpass_cdc_register_notifier(void *handle,
  192. struct notifier_block *nblock,
  193. bool enable)
  194. {
  195. struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
  196. if (!priv) {
  197. pr_err("%s: lpass_cdc priv is null\n", __func__);
  198. return -EINVAL;
  199. }
  200. if (enable)
  201. return blocking_notifier_chain_register(&priv->notifier,
  202. nblock);
  203. return blocking_notifier_chain_unregister(&priv->notifier,
  204. nblock);
  205. }
  206. static void lpass_cdc_notifier_call(struct lpass_cdc_priv *priv,
  207. u32 data)
  208. {
  209. dev_dbg(priv->dev, "%s: notifier call, data:%d\n", __func__, data);
  210. blocking_notifier_call_chain(&priv->notifier,
  211. data, (void *)priv->wcd_dev);
  212. }
  213. static bool lpass_cdc_is_valid_child_dev(struct device *dev)
  214. {
  215. if (of_device_is_compatible(dev->parent->of_node, "qcom,lpass-cdc"))
  216. return true;
  217. return false;
  218. }
  219. static bool lpass_cdc_is_valid_codec_dev(struct device *dev)
  220. {
  221. if (of_device_is_compatible(dev->of_node, "qcom,lpass-cdc"))
  222. return true;
  223. return false;
  224. }
  225. /**
  226. * lpass_cdc_clear_amic_tx_hold - clears AMIC register on analog codec
  227. *
  228. * @dev: lpass_cdc device ptr.
  229. *
  230. */
  231. void lpass_cdc_clear_amic_tx_hold(struct device *dev, u16 adc_n)
  232. {
  233. struct lpass_cdc_priv *priv;
  234. u16 event;
  235. u16 amic = 0;
  236. if (!dev) {
  237. pr_err("%s: dev is null\n", __func__);
  238. return;
  239. }
  240. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  241. pr_err("%s: invalid codec\n", __func__);
  242. return;
  243. }
  244. priv = dev_get_drvdata(dev);
  245. if (!priv) {
  246. dev_err(dev, "%s: priv is null\n", __func__);
  247. return;
  248. }
  249. event = LPASS_CDC_WCD_EVT_TX_CH_HOLD_CLEAR;
  250. if (adc_n == LPASS_CDC_ADC0)
  251. amic = 0x1;
  252. else if (adc_n == LPASS_CDC_ADC1)
  253. amic = 0x2;
  254. else if (adc_n == LPASS_CDC_ADC2)
  255. amic = 0x2;
  256. else if (adc_n == LPASS_CDC_ADC3)
  257. amic = 0x3;
  258. else
  259. return;
  260. lpass_cdc_notifier_call(priv, (amic << 0x10 | event));
  261. }
  262. EXPORT_SYMBOL(lpass_cdc_clear_amic_tx_hold);
  263. /**
  264. * lpass_cdc_get_device_ptr - Get child or macro device ptr
  265. *
  266. * @dev: lpass_cdc device ptr.
  267. * @macro_id: ID of macro calling this API.
  268. *
  269. * Returns dev ptr on success or NULL on error.
  270. */
  271. struct device *lpass_cdc_get_device_ptr(struct device *dev, u16 macro_id)
  272. {
  273. struct lpass_cdc_priv *priv;
  274. if (!dev) {
  275. pr_err("%s: dev is null\n", __func__);
  276. return NULL;
  277. }
  278. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  279. pr_err("%s: invalid codec\n", __func__);
  280. return NULL;
  281. }
  282. priv = dev_get_drvdata(dev);
  283. if (!priv || (macro_id >= MAX_MACRO)) {
  284. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  285. return NULL;
  286. }
  287. return priv->macro_params[macro_id].dev;
  288. }
  289. EXPORT_SYMBOL(lpass_cdc_get_device_ptr);
  290. /**
  291. * lpass_cdc_get_rsc_clk_device_ptr - Get rsc clk device ptr
  292. *
  293. * @dev: lpass_cdc device ptr.
  294. *
  295. * Returns dev ptr on success or NULL on error.
  296. */
  297. struct device *lpass_cdc_get_rsc_clk_device_ptr(struct device *dev)
  298. {
  299. struct lpass_cdc_priv *priv;
  300. if (!dev) {
  301. pr_err("%s: dev is null\n", __func__);
  302. return NULL;
  303. }
  304. if (!lpass_cdc_is_valid_codec_dev(dev)) {
  305. pr_err("%s: invalid codec\n", __func__);
  306. return NULL;
  307. }
  308. priv = dev_get_drvdata(dev);
  309. if (!priv) {
  310. dev_err(dev, "%s: priv is null\n", __func__);
  311. return NULL;
  312. }
  313. return priv->clk_dev;
  314. }
  315. EXPORT_SYMBOL(lpass_cdc_get_rsc_clk_device_ptr);
  316. static int lpass_cdc_copy_dais_from_macro(struct lpass_cdc_priv *priv)
  317. {
  318. struct snd_soc_dai_driver *dai_ptr;
  319. u16 macro_idx;
  320. /* memcpy into lpass_cdc_dais all macro dais */
  321. if (!priv->lpass_cdc_dais)
  322. priv->lpass_cdc_dais = devm_kzalloc(priv->dev,
  323. priv->num_dais *
  324. sizeof(
  325. struct snd_soc_dai_driver),
  326. GFP_KERNEL);
  327. if (!priv->lpass_cdc_dais)
  328. return -ENOMEM;
  329. dai_ptr = priv->lpass_cdc_dais;
  330. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  331. if (priv->macro_params[macro_idx].dai_ptr) {
  332. memcpy(dai_ptr,
  333. priv->macro_params[macro_idx].dai_ptr,
  334. priv->macro_params[macro_idx].num_dais *
  335. sizeof(struct snd_soc_dai_driver));
  336. dai_ptr += priv->macro_params[macro_idx].num_dais;
  337. }
  338. }
  339. return 0;
  340. }
  341. /**
  342. * lpass_cdc_register_res_clk - Registers rsc clk driver to lpass_cdc
  343. *
  344. * @dev: rsc clk device ptr.
  345. * @rsc_clk_cb: event handler callback for notifications like SSR
  346. *
  347. * Returns 0 on success or -EINVAL on error.
  348. */
  349. int lpass_cdc_register_res_clk(struct device *dev, rsc_clk_cb_t rsc_clk_cb)
  350. {
  351. struct lpass_cdc_priv *priv;
  352. if (!dev || !rsc_clk_cb) {
  353. pr_err("%s: dev or rsc_clk_cb is null\n", __func__);
  354. return -EINVAL;
  355. }
  356. if (!lpass_cdc_is_valid_child_dev(dev)) {
  357. dev_err(dev, "%s: child device :%pK not added yet\n",
  358. __func__, dev);
  359. return -EINVAL;
  360. }
  361. priv = dev_get_drvdata(dev->parent);
  362. if (!priv) {
  363. dev_err(dev, "%s: priv is null\n", __func__);
  364. return -EINVAL;
  365. }
  366. priv->clk_dev = dev;
  367. priv->rsc_clk_cb = rsc_clk_cb;
  368. return 0;
  369. }
  370. EXPORT_SYMBOL(lpass_cdc_register_res_clk);
  371. /**
  372. * lpass_cdc_unregister_res_clk - Unregisters rsc clk driver from lpass_cdc
  373. *
  374. * @dev: resource clk device ptr.
  375. */
  376. void lpass_cdc_unregister_res_clk(struct device *dev)
  377. {
  378. struct lpass_cdc_priv *priv;
  379. if (!dev) {
  380. pr_err("%s: dev is NULL\n", __func__);
  381. return;
  382. }
  383. if (!lpass_cdc_is_valid_child_dev(dev)) {
  384. dev_err(dev, "%s: child device :%pK not added\n",
  385. __func__, dev);
  386. return;
  387. }
  388. priv = dev_get_drvdata(dev->parent);
  389. if (!priv) {
  390. dev_err(dev, "%s: priv is null\n", __func__);
  391. return;
  392. }
  393. priv->clk_dev = NULL;
  394. priv->rsc_clk_cb = NULL;
  395. }
  396. EXPORT_SYMBOL(lpass_cdc_unregister_res_clk);
  397. static u8 lpass_cdc_dmic_clk_div_get(struct snd_soc_component *component,
  398. int mode)
  399. {
  400. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  401. int macro = (mode ? VA_MACRO : TX_MACRO);
  402. int ret = 0;
  403. if (priv->macro_params[macro].clk_div_get) {
  404. ret = priv->macro_params[macro].clk_div_get(component);
  405. if (ret > 0)
  406. return ret;
  407. }
  408. return 1;
  409. }
  410. int lpass_cdc_dmic_clk_enable(struct snd_soc_component *component,
  411. u32 dmic, u32 tx_mode, bool enable)
  412. {
  413. struct lpass_cdc_priv* priv = snd_soc_component_get_drvdata(component);
  414. u8 dmic_clk_en = 0x01;
  415. u16 dmic_clk_reg = 0;
  416. s32 *dmic_clk_cnt = NULL;
  417. u8 *dmic_clk_div = NULL;
  418. u8 freq_change_mask = 0;
  419. u8 clk_div = 0;
  420. dev_dbg(component->dev, "%s: enable: %d, tx_mode:%d, dmic: %d\n",
  421. __func__, enable, tx_mode, dmic);
  422. switch (dmic) {
  423. case 0:
  424. case 1:
  425. dmic_clk_cnt = &(priv->dmic_0_1_clk_cnt);
  426. dmic_clk_div = &(priv->dmic_0_1_clk_div);
  427. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC0_CTL;
  428. freq_change_mask = 0x01;
  429. break;
  430. case 2:
  431. case 3:
  432. dmic_clk_cnt = &(priv->dmic_2_3_clk_cnt);
  433. dmic_clk_div = &(priv->dmic_2_3_clk_div);
  434. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC1_CTL;
  435. freq_change_mask = 0x02;
  436. break;
  437. case 4:
  438. case 5:
  439. dmic_clk_cnt = &(priv->dmic_4_5_clk_cnt);
  440. dmic_clk_div = &(priv->dmic_4_5_clk_div);
  441. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC2_CTL;
  442. freq_change_mask = 0x04;
  443. break;
  444. case 6:
  445. case 7:
  446. dmic_clk_cnt = &(priv->dmic_6_7_clk_cnt);
  447. dmic_clk_div = &(priv->dmic_6_7_clk_div);
  448. dmic_clk_reg = LPASS_CDC_VA_TOP_CSR_DMIC3_CTL;
  449. freq_change_mask = 0x08;
  450. break;
  451. default:
  452. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  453. __func__);
  454. return -EINVAL;
  455. }
  456. dev_dbg(component->dev, "%s: DMIC%d dmic_clk_cnt %d\n",
  457. __func__, dmic, *dmic_clk_cnt);
  458. if (enable) {
  459. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  460. (*dmic_clk_cnt)++;
  461. if (*dmic_clk_cnt == 1) {
  462. snd_soc_component_update_bits(component,
  463. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  464. 0x80, 0x00);
  465. snd_soc_component_update_bits(component, dmic_clk_reg,
  466. 0x0E, clk_div << 0x1);
  467. snd_soc_component_update_bits(component, dmic_clk_reg,
  468. dmic_clk_en, dmic_clk_en);
  469. } else {
  470. if (*dmic_clk_div > clk_div) {
  471. snd_soc_component_update_bits(component,
  472. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  473. freq_change_mask, freq_change_mask);
  474. snd_soc_component_update_bits(component, dmic_clk_reg,
  475. 0x0E, clk_div << 0x1);
  476. snd_soc_component_update_bits(component,
  477. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  478. freq_change_mask, 0x00);
  479. } else {
  480. clk_div = *dmic_clk_div;
  481. }
  482. }
  483. *dmic_clk_div = clk_div;
  484. } else {
  485. (*dmic_clk_cnt)--;
  486. if (*dmic_clk_cnt == 0) {
  487. snd_soc_component_update_bits(component, dmic_clk_reg,
  488. dmic_clk_en, 0);
  489. clk_div = 0;
  490. snd_soc_component_update_bits(component, dmic_clk_reg,
  491. 0x0E, clk_div << 0x1);
  492. } else {
  493. clk_div = lpass_cdc_dmic_clk_div_get(component, tx_mode);
  494. if (*dmic_clk_div > clk_div) {
  495. clk_div = lpass_cdc_dmic_clk_div_get(component, !tx_mode);
  496. snd_soc_component_update_bits(component,
  497. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  498. freq_change_mask, freq_change_mask);
  499. snd_soc_component_update_bits(component, dmic_clk_reg,
  500. 0x0E, clk_div << 0x1);
  501. snd_soc_component_update_bits(component,
  502. LPASS_CDC_VA_TOP_CSR_DMIC_CFG,
  503. freq_change_mask, 0x00);
  504. } else {
  505. clk_div = *dmic_clk_div;
  506. }
  507. }
  508. *dmic_clk_div = clk_div;
  509. }
  510. return 0;
  511. }
  512. EXPORT_SYMBOL(lpass_cdc_dmic_clk_enable);
  513. bool lpass_cdc_is_va_macro_registered(struct device *dev)
  514. {
  515. struct lpass_cdc_priv *priv;
  516. if (!dev) {
  517. pr_err("%s: dev is null\n", __func__);
  518. return false;
  519. }
  520. if (!lpass_cdc_is_valid_child_dev(dev)) {
  521. dev_err(dev, "%s: child device calling is not added yet\n",
  522. __func__);
  523. return false;
  524. }
  525. priv = dev_get_drvdata(dev->parent);
  526. if (!priv) {
  527. dev_err(dev, "%s: priv is null\n", __func__);
  528. return false;
  529. }
  530. return priv->macros_supported[VA_MACRO];
  531. }
  532. EXPORT_SYMBOL(lpass_cdc_is_va_macro_registered);
  533. /**
  534. * lpass_cdc_register_macro - Registers macro to lpass_cdc
  535. *
  536. * @dev: macro device ptr.
  537. * @macro_id: ID of macro calling this API.
  538. * @ops: macro params to register.
  539. *
  540. * Returns 0 on success or -EINVAL on error.
  541. */
  542. int lpass_cdc_register_macro(struct device *dev, u16 macro_id,
  543. struct macro_ops *ops)
  544. {
  545. struct lpass_cdc_priv *priv;
  546. int ret = -EINVAL;
  547. if (!dev || !ops) {
  548. pr_err("%s: dev or ops is null\n", __func__);
  549. return -EINVAL;
  550. }
  551. if (!lpass_cdc_is_valid_child_dev(dev)) {
  552. dev_err(dev, "%s: child device for macro:%d not added yet\n",
  553. __func__, macro_id);
  554. return -EINVAL;
  555. }
  556. priv = dev_get_drvdata(dev->parent);
  557. if (!priv || (macro_id >= MAX_MACRO)) {
  558. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  559. return -EINVAL;
  560. }
  561. priv->macro_params[macro_id].clk_id_req = ops->clk_id_req;
  562. priv->macro_params[macro_id].default_clk_id = ops->default_clk_id;
  563. priv->macro_params[macro_id].init = ops->init;
  564. priv->macro_params[macro_id].exit = ops->exit;
  565. priv->macro_params[macro_id].io_base = ops->io_base;
  566. priv->macro_params[macro_id].num_dais = ops->num_dais;
  567. priv->macro_params[macro_id].dai_ptr = ops->dai_ptr;
  568. priv->macro_params[macro_id].event_handler = ops->event_handler;
  569. priv->macro_params[macro_id].set_port_map = ops->set_port_map;
  570. priv->macro_params[macro_id].dev = dev;
  571. priv->current_mclk_mux_macro[macro_id] =
  572. lpass_cdc_mclk_mux_tbl[macro_id][MCLK_MUX0];
  573. if (macro_id == TX_MACRO) {
  574. priv->macro_params[macro_id].reg_wake_irq = ops->reg_wake_irq;
  575. priv->macro_params[macro_id].reg_evt_listener =
  576. ops->reg_evt_listener;
  577. priv->macro_params[macro_id].clk_enable = ops->clk_enable;
  578. }
  579. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  580. priv->macro_params[macro_id].clk_div_get = ops->clk_div_get;
  581. if (macro_id == VA_MACRO)
  582. priv->macro_params[macro_id].reg_wake_irq =
  583. ops->reg_wake_irq;
  584. priv->num_dais += ops->num_dais;
  585. priv->num_macros_registered++;
  586. priv->macros_supported[macro_id] = true;
  587. dev_info(dev, "%s: register macro successful:%d\n", __func__, macro_id);
  588. if (priv->num_macros_registered == priv->num_macros) {
  589. ret = lpass_cdc_copy_dais_from_macro(priv);
  590. if (ret < 0) {
  591. dev_err(dev, "%s: copy_dais failed\n", __func__);
  592. return ret;
  593. }
  594. if (priv->macros_supported[TX_MACRO] == false) {
  595. lpass_cdc_mclk_mux_tbl[WSA_MACRO][MCLK_MUX0] = WSA_MACRO;
  596. priv->current_mclk_mux_macro[WSA_MACRO] = WSA_MACRO;
  597. lpass_cdc_mclk_mux_tbl[VA_MACRO][MCLK_MUX0] = VA_MACRO;
  598. priv->current_mclk_mux_macro[VA_MACRO] = VA_MACRO;
  599. }
  600. ret = snd_soc_register_component(dev->parent, &lpass_cdc,
  601. priv->lpass_cdc_dais, priv->num_dais);
  602. if (ret < 0) {
  603. dev_err(dev, "%s: register codec failed\n", __func__);
  604. return ret;
  605. }
  606. }
  607. return 0;
  608. }
  609. EXPORT_SYMBOL(lpass_cdc_register_macro);
  610. /**
  611. * lpass_cdc_unregister_macro - De-Register macro from lpass_cdc
  612. *
  613. * @dev: macro device ptr.
  614. * @macro_id: ID of macro calling this API.
  615. *
  616. */
  617. void lpass_cdc_unregister_macro(struct device *dev, u16 macro_id)
  618. {
  619. struct lpass_cdc_priv *priv;
  620. if (!dev) {
  621. pr_err("%s: dev is null\n", __func__);
  622. return;
  623. }
  624. if (!lpass_cdc_is_valid_child_dev(dev)) {
  625. dev_err(dev, "%s: macro:%d not in valid registered macro-list\n",
  626. __func__, macro_id);
  627. return;
  628. }
  629. priv = dev_get_drvdata(dev->parent);
  630. if (!priv || (macro_id >= MAX_MACRO)) {
  631. dev_err(dev, "%s: priv is null or invalid macro\n", __func__);
  632. return;
  633. }
  634. priv->macro_params[macro_id].init = NULL;
  635. priv->macro_params[macro_id].num_dais = 0;
  636. priv->macro_params[macro_id].dai_ptr = NULL;
  637. priv->macro_params[macro_id].event_handler = NULL;
  638. priv->macro_params[macro_id].dev = NULL;
  639. if (macro_id == TX_MACRO) {
  640. priv->macro_params[macro_id].reg_wake_irq = NULL;
  641. priv->macro_params[macro_id].reg_evt_listener = NULL;
  642. priv->macro_params[macro_id].clk_enable = NULL;
  643. }
  644. if (macro_id == TX_MACRO || macro_id == VA_MACRO)
  645. priv->macro_params[macro_id].clk_div_get = NULL;
  646. priv->num_dais -= priv->macro_params[macro_id].num_dais;
  647. priv->num_macros_registered--;
  648. /* UNREGISTER CODEC HERE */
  649. if (priv->num_macros - 1 == priv->num_macros_registered)
  650. snd_soc_unregister_component(dev->parent);
  651. }
  652. EXPORT_SYMBOL(lpass_cdc_unregister_macro);
  653. void lpass_cdc_wsa_pa_on(struct device *dev, bool adie_lb)
  654. {
  655. struct lpass_cdc_priv *priv;
  656. if (!dev) {
  657. pr_err("%s: dev is null\n", __func__);
  658. return;
  659. }
  660. if (!lpass_cdc_is_valid_child_dev(dev)) {
  661. dev_err(dev, "%s: not a valid child dev\n",
  662. __func__);
  663. return;
  664. }
  665. priv = dev_get_drvdata(dev->parent);
  666. if (!priv) {
  667. dev_err(dev, "%s: priv is null\n", __func__);
  668. return;
  669. }
  670. if (adie_lb)
  671. lpass_cdc_notifier_call(priv,
  672. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK_ADIE_LB);
  673. else
  674. lpass_cdc_notifier_call(priv,
  675. LPASS_CDC_WCD_EVT_PA_ON_POST_FSCLK);
  676. }
  677. EXPORT_SYMBOL(lpass_cdc_wsa_pa_on);
  678. int lpass_cdc_get_version(struct device *dev)
  679. {
  680. struct lpass_cdc_priv *priv;
  681. if (!dev) {
  682. pr_err("%s: dev is null\n", __func__);
  683. return -EINVAL;
  684. }
  685. if (!lpass_cdc_is_valid_child_dev(dev)) {
  686. dev_err(dev, "%s: child device for macro not added yet\n",
  687. __func__);
  688. return -EINVAL;
  689. }
  690. priv = dev_get_drvdata(dev->parent);
  691. if (!priv) {
  692. dev_err(dev, "%s: priv is null\n", __func__);
  693. return -EINVAL;
  694. }
  695. return priv->version;
  696. }
  697. EXPORT_SYMBOL(lpass_cdc_get_version);
  698. static ssize_t lpass_cdc_version_read(struct snd_info_entry *entry,
  699. void *file_private_data,
  700. struct file *file,
  701. char __user *buf, size_t count,
  702. loff_t pos)
  703. {
  704. struct lpass_cdc_priv *priv;
  705. char buffer[LPASS_CDC_VERSION_ENTRY_SIZE];
  706. int len = 0;
  707. priv = (struct lpass_cdc_priv *) entry->private_data;
  708. if (!priv) {
  709. pr_err("%s: lpass_cdc priv is null\n", __func__);
  710. return -EINVAL;
  711. }
  712. switch (priv->version) {
  713. case LPASS_CDC_VERSION_1_0:
  714. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_0\n");
  715. break;
  716. case LPASS_CDC_VERSION_1_1:
  717. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_1\n");
  718. break;
  719. case LPASS_CDC_VERSION_1_2:
  720. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_1_2\n");
  721. break;
  722. case LPASS_CDC_VERSION_2_1:
  723. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_1\n");
  724. break;
  725. case LPASS_CDC_VERSION_2_5:
  726. len = snprintf(buffer, sizeof(buffer), "LPASS-CDC_2_5\n");
  727. break;
  728. default:
  729. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  730. }
  731. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  732. }
  733. static int lpass_cdc_ssr_enable(struct device *dev, void *data)
  734. {
  735. struct lpass_cdc_priv *priv = data;
  736. int macro_idx;
  737. if (priv->initial_boot) {
  738. priv->initial_boot = false;
  739. return 0;
  740. }
  741. if (priv->rsc_clk_cb)
  742. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_UP);
  743. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  744. if (priv->macro_params[macro_idx].event_handler)
  745. priv->macro_params[macro_idx].event_handler(
  746. priv->component,
  747. LPASS_CDC_MACRO_EVT_CLK_RESET, 0x0);
  748. }
  749. trace_printk("%s: clk count reset\n", __func__);
  750. if (priv->rsc_clk_cb)
  751. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_GFMUX_UP);
  752. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  753. if (!priv->macro_params[macro_idx].event_handler)
  754. continue;
  755. priv->macro_params[macro_idx].event_handler(
  756. priv->component,
  757. LPASS_CDC_MACRO_EVT_PRE_SSR_UP, 0x0);
  758. }
  759. regcache_cache_only(priv->regmap, false);
  760. mutex_lock(&priv->clk_lock);
  761. priv->dev_up = true;
  762. mutex_unlock(&priv->clk_lock);
  763. regcache_mark_dirty(priv->regmap);
  764. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, true);
  765. regcache_sync(priv->regmap);
  766. /* Add a 100usec sleep to ensure last register write is done */
  767. usleep_range(100,110);
  768. lpass_cdc_clk_rsc_enable_all_clocks(priv->clk_dev, false);
  769. trace_printk("%s: regcache_sync done\n", __func__);
  770. /* call ssr event for supported macros */
  771. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  772. if (!priv->macro_params[macro_idx].event_handler)
  773. continue;
  774. priv->macro_params[macro_idx].event_handler(
  775. priv->component,
  776. LPASS_CDC_MACRO_EVT_SSR_UP, 0x0);
  777. }
  778. trace_printk("%s: SSR up events processed by all macros\n", __func__);
  779. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_UP);
  780. return 0;
  781. }
  782. static void lpass_cdc_ssr_disable(struct device *dev, void *data)
  783. {
  784. struct lpass_cdc_priv *priv = data;
  785. int macro_idx;
  786. if (!priv->dev_up) {
  787. dev_err_ratelimited(priv->dev,
  788. "%s: already disabled\n", __func__);
  789. return;
  790. }
  791. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_PA_OFF_PRE_SSR);
  792. regcache_cache_only(priv->regmap, true);
  793. mutex_lock(&priv->clk_lock);
  794. priv->dev_up = false;
  795. mutex_unlock(&priv->clk_lock);
  796. if (priv->rsc_clk_cb)
  797. priv->rsc_clk_cb(priv->clk_dev, LPASS_CDC_MACRO_EVT_SSR_DOWN);
  798. /* call ssr event for supported macros */
  799. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  800. if (!priv->macro_params[macro_idx].event_handler)
  801. continue;
  802. priv->macro_params[macro_idx].event_handler(
  803. priv->component,
  804. LPASS_CDC_MACRO_EVT_SSR_DOWN, 0x0);
  805. }
  806. lpass_cdc_notifier_call(priv, LPASS_CDC_WCD_EVT_SSR_DOWN);
  807. }
  808. static struct snd_info_entry_ops lpass_cdc_info_ops = {
  809. .read = lpass_cdc_version_read,
  810. };
  811. static const struct snd_event_ops lpass_cdc_ssr_ops = {
  812. .enable = lpass_cdc_ssr_enable,
  813. .disable = lpass_cdc_ssr_disable,
  814. };
  815. /*
  816. * lpass_cdc_info_create_codec_entry - creates lpass_cdc module
  817. * @codec_root: The parent directory
  818. * @component: Codec component instance
  819. *
  820. * Creates lpass_cdc module and version entry under the given
  821. * parent directory.
  822. *
  823. * Return: 0 on success or negative error code on failure.
  824. */
  825. int lpass_cdc_info_create_codec_entry(struct snd_info_entry *codec_root,
  826. struct snd_soc_component *component)
  827. {
  828. struct snd_info_entry *version_entry;
  829. struct lpass_cdc_priv *priv;
  830. struct snd_soc_card *card;
  831. if (!codec_root || !component)
  832. return -EINVAL;
  833. priv = snd_soc_component_get_drvdata(component);
  834. if (priv->entry) {
  835. dev_dbg(priv->dev,
  836. "%s:lpass_cdc module already created\n", __func__);
  837. return 0;
  838. }
  839. card = component->card;
  840. priv->entry = snd_info_create_module_entry(codec_root->module,
  841. "lpass-cdc", codec_root);
  842. if (!priv->entry) {
  843. dev_dbg(component->dev, "%s: failed to create lpass_cdc entry\n",
  844. __func__);
  845. return -ENOMEM;
  846. }
  847. priv->entry->mode = S_IFDIR | 0555;
  848. if (snd_info_register(priv->entry) < 0) {
  849. snd_info_free_entry(priv->entry);
  850. return -ENOMEM;
  851. }
  852. version_entry = snd_info_create_card_entry(card->snd_card,
  853. "version",
  854. priv->entry);
  855. if (!version_entry) {
  856. dev_err(component->dev, "%s: failed to create lpass_cdc version entry\n",
  857. __func__);
  858. snd_info_free_entry(priv->entry);
  859. return -ENOMEM;
  860. }
  861. version_entry->private_data = priv;
  862. version_entry->size = LPASS_CDC_VERSION_ENTRY_SIZE;
  863. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  864. version_entry->c.ops = &lpass_cdc_info_ops;
  865. if (snd_info_register(version_entry) < 0) {
  866. snd_info_free_entry(version_entry);
  867. snd_info_free_entry(priv->entry);
  868. return -ENOMEM;
  869. }
  870. priv->version_entry = version_entry;
  871. return 0;
  872. }
  873. EXPORT_SYMBOL(lpass_cdc_info_create_codec_entry);
  874. /**
  875. * lpass_cdc_register_wake_irq - Register wake irq of Tx macro
  876. *
  877. * @component: codec component ptr.
  878. * @ipc_wakeup: bool to identify ipc_wakeup to be used or HW interrupt line.
  879. *
  880. * Return: 0 on success or negative error code on failure.
  881. */
  882. int lpass_cdc_register_wake_irq(struct snd_soc_component *component,
  883. u32 ipc_wakeup)
  884. {
  885. struct lpass_cdc_priv *priv = NULL;
  886. if (!component)
  887. return -EINVAL;
  888. priv = snd_soc_component_get_drvdata(component);
  889. if (!priv)
  890. return -EINVAL;
  891. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  892. dev_err(component->dev, "%s: invalid codec\n", __func__);
  893. return -EINVAL;
  894. }
  895. if (priv->macro_params[VA_MACRO].reg_wake_irq)
  896. priv->macro_params[VA_MACRO].reg_wake_irq(
  897. component, ipc_wakeup);
  898. return 0;
  899. }
  900. EXPORT_SYMBOL(lpass_cdc_register_wake_irq);
  901. /**
  902. * lpass_cdc_tx_mclk_enable - Enable/Disable TX Macro mclk
  903. *
  904. * @component: pointer to codec component instance.
  905. * @enable: set true to enable, otherwise false.
  906. *
  907. * Returns 0 on success or -EINVAL on error.
  908. */
  909. int lpass_cdc_tx_mclk_enable(struct snd_soc_component *component,
  910. bool enable)
  911. {
  912. struct lpass_cdc_priv *priv = NULL;
  913. int ret = 0;
  914. if (!component)
  915. return -EINVAL;
  916. priv = snd_soc_component_get_drvdata(component);
  917. if (!priv)
  918. return -EINVAL;
  919. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  920. dev_err(component->dev, "%s: invalid codec\n", __func__);
  921. return -EINVAL;
  922. }
  923. if (priv->macro_params[TX_MACRO].clk_enable)
  924. ret = priv->macro_params[TX_MACRO].clk_enable(component,
  925. enable);
  926. return ret;
  927. }
  928. EXPORT_SYMBOL(lpass_cdc_tx_mclk_enable);
  929. /**
  930. * lpass_cdc_register_event_listener - Register/Deregister to event listener
  931. *
  932. * @component: pointer to codec component instance.
  933. * @enable: when set to 1 registers to event listener otherwise, derigisters
  934. * from the event listener
  935. *
  936. * Returns 0 on success or -EINVAL on error.
  937. */
  938. int lpass_cdc_register_event_listener(struct snd_soc_component *component,
  939. bool enable)
  940. {
  941. struct lpass_cdc_priv *priv = NULL;
  942. int ret = 0;
  943. if (!component)
  944. return -EINVAL;
  945. priv = snd_soc_component_get_drvdata(component);
  946. if (!priv)
  947. return -EINVAL;
  948. if (!lpass_cdc_is_valid_codec_dev(priv->dev)) {
  949. dev_err(component->dev, "%s: invalid codec\n", __func__);
  950. return -EINVAL;
  951. }
  952. if (priv->macro_params[TX_MACRO].reg_evt_listener)
  953. ret = priv->macro_params[TX_MACRO].reg_evt_listener(component,
  954. enable);
  955. return ret;
  956. }
  957. EXPORT_SYMBOL(lpass_cdc_register_event_listener);
  958. static int lpass_cdc_soc_codec_probe(struct snd_soc_component *component)
  959. {
  960. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  961. int macro_idx, ret = 0;
  962. u8 core_id_0 = 0, core_id_1 = 0;
  963. snd_soc_component_init_regmap(component, priv->regmap);
  964. if (!priv->version) {
  965. /*
  966. * In order for the ADIE RTC to differentiate between targets
  967. * version info is used.
  968. * Assign 1.0 for target with only one macro
  969. * Assign 1.1 for target with two macros
  970. * Assign 1.2 for target with more than two macros
  971. */
  972. if (priv->num_macros_registered == 1)
  973. priv->version = LPASS_CDC_VERSION_1_0;
  974. else if (priv->num_macros_registered == 2)
  975. priv->version = LPASS_CDC_VERSION_1_1;
  976. else if (priv->num_macros_registered > 2)
  977. priv->version = LPASS_CDC_VERSION_1_2;
  978. }
  979. /* Assign lpass_cdc version */
  980. core_id_0 = snd_soc_component_read(component,
  981. LPASS_CDC_VA_TOP_CSR_CORE_ID_0);
  982. core_id_1 = snd_soc_component_read(component,
  983. LPASS_CDC_VA_TOP_CSR_CORE_ID_1);
  984. if ((core_id_0 == 0x01) && (core_id_1 == 0x0F))
  985. priv->version = LPASS_CDC_VERSION_2_0;
  986. if ((core_id_0 == 0x02) && (core_id_1 == 0x0E))
  987. priv->version = LPASS_CDC_VERSION_2_1;
  988. if ((core_id_0 == 0x02) && (core_id_1 == 0x0F))
  989. priv->version = LPASS_CDC_VERSION_2_5;
  990. /* call init for supported macros */
  991. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++) {
  992. if (priv->macro_params[macro_idx].init) {
  993. ret = priv->macro_params[macro_idx].init(component);
  994. if (ret < 0) {
  995. dev_err(component->dev,
  996. "%s: init for macro %d failed\n",
  997. __func__, macro_idx);
  998. goto err;
  999. }
  1000. }
  1001. }
  1002. priv->component = component;
  1003. ret = snd_event_client_register(priv->dev, &lpass_cdc_ssr_ops, priv);
  1004. if (!ret) {
  1005. snd_event_notify(priv->dev, SND_EVENT_UP);
  1006. } else {
  1007. dev_err(component->dev,
  1008. "%s: Registration with SND event FWK failed ret = %d\n",
  1009. __func__, ret);
  1010. goto err;
  1011. }
  1012. dev_dbg(component->dev, "%s: lpass_cdc soc codec probe success\n",
  1013. __func__);
  1014. err:
  1015. return ret;
  1016. }
  1017. static void lpass_cdc_soc_codec_remove(struct snd_soc_component *component)
  1018. {
  1019. struct lpass_cdc_priv *priv = dev_get_drvdata(component->dev);
  1020. int macro_idx;
  1021. snd_event_client_deregister(priv->dev);
  1022. /* call exit for supported macros */
  1023. for (macro_idx = START_MACRO; macro_idx < MAX_MACRO; macro_idx++)
  1024. if (priv->macro_params[macro_idx].exit)
  1025. priv->macro_params[macro_idx].exit(component);
  1026. return;
  1027. }
  1028. static const struct snd_soc_component_driver lpass_cdc = {
  1029. .name = DRV_NAME,
  1030. .probe = lpass_cdc_soc_codec_probe,
  1031. .remove = lpass_cdc_soc_codec_remove,
  1032. };
  1033. static void lpass_cdc_add_child_devices(struct work_struct *work)
  1034. {
  1035. struct lpass_cdc_priv *priv;
  1036. bool split_codec = false;
  1037. struct platform_device *pdev;
  1038. struct device_node *node;
  1039. int ret = 0, count = 0;
  1040. struct wcd_ctrl_platform_data *platdata = NULL;
  1041. char plat_dev_name[LPASS_CDC_STRING_LEN] = "";
  1042. priv = container_of(work, struct lpass_cdc_priv,
  1043. lpass_cdc_add_child_devices_work);
  1044. if (!priv) {
  1045. pr_err("%s: Memory for lpass_cdc priv does not exist\n",
  1046. __func__);
  1047. return;
  1048. }
  1049. if (!priv->dev || !priv->dev->of_node) {
  1050. dev_err(priv->dev, "%s: DT node for lpass_cdc does not exist\n",
  1051. __func__);
  1052. return;
  1053. }
  1054. platdata = &priv->plat_data;
  1055. priv->child_count = 0;
  1056. for_each_available_child_of_node(priv->dev->of_node, node) {
  1057. split_codec = false;
  1058. if (of_find_property(node, "qcom,split-codec", NULL)) {
  1059. split_codec = true;
  1060. dev_dbg(priv->dev, "%s: split codec slave exists\n",
  1061. __func__);
  1062. }
  1063. strlcpy(plat_dev_name, node->name,
  1064. (LPASS_CDC_STRING_LEN - 1));
  1065. pdev = platform_device_alloc(plat_dev_name, -1);
  1066. if (!pdev) {
  1067. dev_err(priv->dev, "%s: pdev memory alloc failed\n",
  1068. __func__);
  1069. ret = -ENOMEM;
  1070. goto err;
  1071. }
  1072. pdev->dev.parent = priv->dev;
  1073. pdev->dev.of_node = node;
  1074. priv->dev->platform_data = platdata;
  1075. if (split_codec)
  1076. priv->wcd_dev = &pdev->dev;
  1077. ret = platform_device_add(pdev);
  1078. if (ret) {
  1079. dev_err(&pdev->dev,
  1080. "%s: Cannot add platform device\n",
  1081. __func__);
  1082. platform_device_put(pdev);
  1083. goto fail_pdev_add;
  1084. }
  1085. if (priv->child_count < LPASS_CDC_CHILD_DEVICES_MAX)
  1086. priv->pdev_child_devices[priv->child_count++] = pdev;
  1087. else
  1088. goto err;
  1089. }
  1090. return;
  1091. fail_pdev_add:
  1092. for (count = 0; count < priv->child_count; count++)
  1093. platform_device_put(priv->pdev_child_devices[count]);
  1094. err:
  1095. return;
  1096. }
  1097. static int lpass_cdc_probe(struct platform_device *pdev)
  1098. {
  1099. struct lpass_cdc_priv *priv;
  1100. u32 num_macros = 0;
  1101. int ret;
  1102. struct clk *lpass_core_hw_vote = NULL;
  1103. struct clk *lpass_audio_hw_vote = NULL;
  1104. priv = devm_kzalloc(&pdev->dev, sizeof(struct lpass_cdc_priv),
  1105. GFP_KERNEL);
  1106. if (!priv)
  1107. return -ENOMEM;
  1108. ret = of_property_read_u32(pdev->dev.of_node, "qcom,num-macros",
  1109. &num_macros);
  1110. if (ret) {
  1111. dev_err(&pdev->dev,
  1112. "%s:num-macros property not found\n",
  1113. __func__);
  1114. return ret;
  1115. }
  1116. priv->num_macros = num_macros;
  1117. if (priv->num_macros > MAX_MACRO) {
  1118. dev_err(&pdev->dev,
  1119. "%s:num_macros(%d) > MAX_MACRO(%d) than supported\n",
  1120. __func__, priv->num_macros, MAX_MACRO);
  1121. return -EINVAL;
  1122. }
  1123. ret = of_property_read_u32(pdev->dev.of_node,
  1124. "qcom,lpass-cdc-version", &priv->version);
  1125. if (ret) {
  1126. dev_dbg(&pdev->dev, "%s:lpass_cdc version not specified\n",
  1127. __func__);
  1128. ret = 0;
  1129. }
  1130. BLOCKING_INIT_NOTIFIER_HEAD(&priv->notifier);
  1131. priv->dev = &pdev->dev;
  1132. priv->dev_up = true;
  1133. priv->initial_boot = true;
  1134. priv->regmap = lpass_cdc_regmap_init(priv->dev,
  1135. &lpass_cdc_regmap_config);
  1136. if (IS_ERR_OR_NULL((void *)(priv->regmap))) {
  1137. dev_err(&pdev->dev, "%s:regmap init failed\n", __func__);
  1138. return -EINVAL;
  1139. }
  1140. devm_regmap_qti_debugfs_register(priv->dev, priv->regmap);
  1141. priv->read_dev = __lpass_cdc_reg_read;
  1142. priv->write_dev = __lpass_cdc_reg_write;
  1143. priv->plat_data.handle = (void *) priv;
  1144. priv->plat_data.update_wcd_event = lpass_cdc_update_wcd_event;
  1145. priv->plat_data.register_notifier = lpass_cdc_register_notifier;
  1146. priv->core_hw_vote_count = 0;
  1147. priv->core_audio_vote_count = 0;
  1148. dev_set_drvdata(&pdev->dev, priv);
  1149. mutex_init(&priv->io_lock);
  1150. mutex_init(&priv->clk_lock);
  1151. mutex_init(&priv->vote_lock);
  1152. INIT_WORK(&priv->lpass_cdc_add_child_devices_work,
  1153. lpass_cdc_add_child_devices);
  1154. /* Register LPASS core hw vote */
  1155. lpass_core_hw_vote = devm_clk_get(&pdev->dev, "lpass_core_hw_vote");
  1156. if (IS_ERR(lpass_core_hw_vote)) {
  1157. ret = PTR_ERR(lpass_core_hw_vote);
  1158. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1159. __func__, "lpass_core_hw_vote", ret);
  1160. lpass_core_hw_vote = NULL;
  1161. ret = 0;
  1162. }
  1163. priv->lpass_core_hw_vote = lpass_core_hw_vote;
  1164. /* Register LPASS audio hw vote */
  1165. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  1166. if (IS_ERR(lpass_audio_hw_vote)) {
  1167. ret = PTR_ERR(lpass_audio_hw_vote);
  1168. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  1169. __func__, "lpass_audio_hw_vote", ret);
  1170. lpass_audio_hw_vote = NULL;
  1171. ret = 0;
  1172. }
  1173. priv->lpass_audio_hw_vote = lpass_audio_hw_vote;
  1174. schedule_work(&priv->lpass_cdc_add_child_devices_work);
  1175. return 0;
  1176. }
  1177. static int lpass_cdc_remove(struct platform_device *pdev)
  1178. {
  1179. struct lpass_cdc_priv *priv = dev_get_drvdata(&pdev->dev);
  1180. if (!priv)
  1181. return -EINVAL;
  1182. of_platform_depopulate(&pdev->dev);
  1183. mutex_destroy(&priv->io_lock);
  1184. mutex_destroy(&priv->clk_lock);
  1185. mutex_destroy(&priv->vote_lock);
  1186. return 0;
  1187. }
  1188. #ifdef CONFIG_PM
  1189. int lpass_cdc_runtime_resume(struct device *dev)
  1190. {
  1191. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1192. int ret = 0;
  1193. mutex_lock(&priv->vote_lock);
  1194. if (priv->lpass_core_hw_vote == NULL) {
  1195. dev_dbg(dev, "%s: Invalid lpass core hw node\n", __func__);
  1196. goto audio_vote;
  1197. }
  1198. if (priv->core_hw_vote_count == 0) {
  1199. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_core_hw_vote);
  1200. if (ret < 0) {
  1201. dev_err(dev, "%s:lpass core hw enable failed\n",
  1202. __func__);
  1203. goto audio_vote;
  1204. }
  1205. }
  1206. priv->core_hw_vote_count++;
  1207. trace_printk("%s: hw vote count %d\n",
  1208. __func__, priv->core_hw_vote_count);
  1209. audio_vote:
  1210. if (priv->lpass_audio_hw_vote == NULL) {
  1211. dev_dbg(dev, "%s: Invalid lpass audio hw node\n", __func__);
  1212. goto done;
  1213. }
  1214. if (priv->core_audio_vote_count == 0) {
  1215. ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote);
  1216. if (ret < 0) {
  1217. dev_err(dev, "%s:lpass audio hw enable failed\n",
  1218. __func__);
  1219. goto done;
  1220. }
  1221. }
  1222. priv->core_audio_vote_count++;
  1223. trace_printk("%s: audio vote count %d\n",
  1224. __func__, priv->core_audio_vote_count);
  1225. done:
  1226. mutex_unlock(&priv->vote_lock);
  1227. pm_runtime_set_autosuspend_delay(priv->dev, LPASS_CDC_AUTO_SUSPEND_DELAY);
  1228. return 0;
  1229. }
  1230. EXPORT_SYMBOL(lpass_cdc_runtime_resume);
  1231. int lpass_cdc_runtime_suspend(struct device *dev)
  1232. {
  1233. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1234. mutex_lock(&priv->vote_lock);
  1235. if (priv->lpass_core_hw_vote != NULL) {
  1236. if (--priv->core_hw_vote_count == 0)
  1237. digital_cdc_rsc_mgr_hw_vote_disable(
  1238. priv->lpass_core_hw_vote);
  1239. if (priv->core_hw_vote_count < 0)
  1240. priv->core_hw_vote_count = 0;
  1241. } else {
  1242. dev_dbg(dev, "%s: Invalid lpass core hw node\n",
  1243. __func__);
  1244. }
  1245. trace_printk("%s: hw vote count %d\n",
  1246. __func__, priv->core_hw_vote_count);
  1247. if (priv->lpass_audio_hw_vote != NULL) {
  1248. if (--priv->core_audio_vote_count == 0)
  1249. digital_cdc_rsc_mgr_hw_vote_disable(
  1250. priv->lpass_audio_hw_vote);
  1251. if (priv->core_audio_vote_count < 0)
  1252. priv->core_audio_vote_count = 0;
  1253. } else {
  1254. dev_dbg(dev, "%s: Invalid lpass audio hw node\n",
  1255. __func__);
  1256. }
  1257. trace_printk("%s: audio vote count %d\n",
  1258. __func__, priv->core_audio_vote_count);
  1259. mutex_unlock(&priv->vote_lock);
  1260. return 0;
  1261. }
  1262. EXPORT_SYMBOL(lpass_cdc_runtime_suspend);
  1263. #endif /* CONFIG_PM */
  1264. bool lpass_cdc_check_core_votes(struct device *dev)
  1265. {
  1266. struct lpass_cdc_priv *priv = dev_get_drvdata(dev->parent);
  1267. bool ret = true;
  1268. mutex_lock(&priv->vote_lock);
  1269. if ((priv->lpass_core_hw_vote && !priv->core_hw_vote_count) ||
  1270. (priv->lpass_audio_hw_vote && !priv->core_audio_vote_count))
  1271. ret = false;
  1272. mutex_unlock(&priv->vote_lock);
  1273. return ret;
  1274. }
  1275. EXPORT_SYMBOL(lpass_cdc_check_core_votes);
  1276. static const struct of_device_id lpass_cdc_dt_match[] = {
  1277. {.compatible = "qcom,lpass-cdc"},
  1278. {}
  1279. };
  1280. MODULE_DEVICE_TABLE(of, lpass_cdc_dt_match);
  1281. static struct platform_driver lpass_cdc_drv = {
  1282. .driver = {
  1283. .name = "lpass-cdc",
  1284. .owner = THIS_MODULE,
  1285. .of_match_table = lpass_cdc_dt_match,
  1286. .suppress_bind_attrs = true,
  1287. },
  1288. .probe = lpass_cdc_probe,
  1289. .remove = lpass_cdc_remove,
  1290. };
  1291. static int lpass_cdc_drv_init(void)
  1292. {
  1293. return platform_driver_register(&lpass_cdc_drv);
  1294. }
  1295. static void lpass_cdc_drv_exit(void)
  1296. {
  1297. platform_driver_unregister(&lpass_cdc_drv);
  1298. }
  1299. static int __init lpass_cdc_init(void)
  1300. {
  1301. lpass_cdc_drv_init();
  1302. lpass_cdc_clk_rsc_mgr_init();
  1303. return 0;
  1304. }
  1305. module_init(lpass_cdc_init);
  1306. static void __exit lpass_cdc_exit(void)
  1307. {
  1308. lpass_cdc_clk_rsc_mgr_exit();
  1309. lpass_cdc_drv_exit();
  1310. }
  1311. module_exit(lpass_cdc_exit);
  1312. MODULE_DESCRIPTION("LPASS Codec driver");
  1313. MODULE_LICENSE("GPL v2");