dsi_panel.c 126 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd && bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0))
  571. bl->pwm_bl = devm_pwm_get(panel->parent, NULL);
  572. #else
  573. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  574. #endif
  575. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  576. rc = PTR_ERR(bl->pwm_bl);
  577. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  578. rc);
  579. return rc;
  580. }
  581. if (panel->pinctrl.pwm_pin) {
  582. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  583. panel->pinctrl.pwm_pin);
  584. if (rc)
  585. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  586. panel->name, rc);
  587. }
  588. return 0;
  589. }
  590. static int dsi_panel_bl_register(struct dsi_panel *panel)
  591. {
  592. int rc = 0;
  593. struct dsi_backlight_config *bl = &panel->bl_config;
  594. if (panel->host_config.ext_bridge_mode)
  595. return 0;
  596. switch (bl->type) {
  597. case DSI_BACKLIGHT_WLED:
  598. rc = dsi_panel_wled_register(panel, bl);
  599. break;
  600. case DSI_BACKLIGHT_DCS:
  601. break;
  602. case DSI_BACKLIGHT_EXTERNAL:
  603. break;
  604. case DSI_BACKLIGHT_PWM:
  605. rc = dsi_panel_pwm_register(panel);
  606. break;
  607. default:
  608. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  609. rc = -ENOTSUPP;
  610. goto error;
  611. }
  612. error:
  613. return rc;
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. break;
  630. default:
  631. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  632. rc = -ENOTSUPP;
  633. goto error;
  634. }
  635. error:
  636. return rc;
  637. }
  638. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  639. struct dsi_parser_utils *utils)
  640. {
  641. int rc = 0;
  642. u64 tmp64 = 0;
  643. struct dsi_display_mode *display_mode;
  644. struct dsi_display_mode_priv_info *priv_info;
  645. u32 usecs_fps = 0;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (rc)
  663. mode->mdp_transfer_time_us = 0;
  664. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-min",
  665. &priv_info->mdp_transfer_time_us_min);
  666. if (rc)
  667. priv_info->mdp_transfer_time_us_min = 0;
  668. else if (!rc && mode->mdp_transfer_time_us < priv_info->mdp_transfer_time_us_min)
  669. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_min;
  670. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-max",
  671. &priv_info->mdp_transfer_time_us_max);
  672. if (rc)
  673. priv_info->mdp_transfer_time_us_max = 0;
  674. else if (!rc && mode->mdp_transfer_time_us > priv_info->mdp_transfer_time_us_max)
  675. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_max;
  676. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-panel-framerate",
  679. &mode->refresh_rate);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. usecs_fps = DIV_ROUND_UP((1 * 1000 * 1000), mode->refresh_rate);
  686. if (mode->mdp_transfer_time_us > usecs_fps)
  687. mode->mdp_transfer_time_us = 0;
  688. priv_info->mdp_transfer_time_us = mode->mdp_transfer_time_us;
  689. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  690. &mode->h_active);
  691. if (rc) {
  692. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. rc = utils->read_u32(utils->data,
  697. "qcom,mdss-dsi-h-front-porch",
  698. &mode->h_front_porch);
  699. if (rc) {
  700. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  701. rc);
  702. goto error;
  703. }
  704. rc = utils->read_u32(utils->data,
  705. "qcom,mdss-dsi-h-back-porch",
  706. &mode->h_back_porch);
  707. if (rc) {
  708. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  709. rc);
  710. goto error;
  711. }
  712. rc = utils->read_u32(utils->data,
  713. "qcom,mdss-dsi-h-pulse-width",
  714. &mode->h_sync_width);
  715. if (rc) {
  716. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  717. rc);
  718. goto error;
  719. }
  720. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  721. &mode->h_skew);
  722. if (rc)
  723. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  724. rc);
  725. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  726. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  727. mode->h_sync_width);
  728. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  729. &mode->v_active);
  730. if (rc) {
  731. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  732. rc);
  733. goto error;
  734. }
  735. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  736. &mode->v_back_porch);
  737. if (rc) {
  738. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  739. rc);
  740. goto error;
  741. }
  742. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  743. &mode->v_front_porch);
  744. if (rc) {
  745. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  746. rc);
  747. goto error;
  748. }
  749. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  750. &mode->v_sync_width);
  751. if (rc) {
  752. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  753. rc);
  754. goto error;
  755. }
  756. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  757. if (rc) {
  758. DSI_DEBUG("qsync min fps not defined in timing node\n");
  759. rc = 0;
  760. }
  761. rc = utils->read_u32(utils->data, "qcom,dsi-qsync-mode-avr-step-fps", &mode->avr_step_fps);
  762. if (rc) {
  763. DSI_DEBUG("avr step fps not defined in timing node\n");
  764. rc = 0;
  765. }
  766. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  767. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  768. mode->v_sync_width);
  769. error:
  770. return rc;
  771. }
  772. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  773. struct dsi_parser_utils *utils,
  774. const char *name)
  775. {
  776. int rc = 0;
  777. u32 bpp = 0;
  778. enum dsi_pixel_format fmt;
  779. const char *packing;
  780. bool bpp_switch_enabled;
  781. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  782. if (rc) {
  783. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  784. name, rc);
  785. return rc;
  786. }
  787. host->bpp = bpp;
  788. switch (bpp) {
  789. case 3:
  790. fmt = DSI_PIXEL_FORMAT_RGB111;
  791. break;
  792. case 8:
  793. fmt = DSI_PIXEL_FORMAT_RGB332;
  794. break;
  795. case 12:
  796. fmt = DSI_PIXEL_FORMAT_RGB444;
  797. break;
  798. case 16:
  799. fmt = DSI_PIXEL_FORMAT_RGB565;
  800. break;
  801. case 18:
  802. fmt = DSI_PIXEL_FORMAT_RGB666;
  803. break;
  804. case 30:
  805. fmt = DSI_PIXEL_FORMAT_RGB101010;
  806. break;
  807. case 24:
  808. default:
  809. fmt = DSI_PIXEL_FORMAT_RGB888;
  810. break;
  811. }
  812. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  813. packing = utils->get_property(utils->data,
  814. "qcom,mdss-dsi-pixel-packing",
  815. NULL);
  816. if (packing && !strcmp(packing, "loose"))
  817. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  818. }
  819. host->dst_format = fmt;
  820. bpp_switch_enabled = utils->read_bool(utils->data, "qcom,mdss-dsi-bpp-switch");
  821. host->bpp_switch_enabled = bpp_switch_enabled;
  822. return rc;
  823. }
  824. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  825. struct dsi_parser_utils *utils,
  826. const char *name)
  827. {
  828. int rc = 0;
  829. bool lane_enabled;
  830. u32 num_of_lanes = 0;
  831. lane_enabled = utils->read_bool(utils->data,
  832. "qcom,mdss-dsi-lane-0-state");
  833. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  834. lane_enabled = utils->read_bool(utils->data,
  835. "qcom,mdss-dsi-lane-1-state");
  836. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  837. lane_enabled = utils->read_bool(utils->data,
  838. "qcom,mdss-dsi-lane-2-state");
  839. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  840. lane_enabled = utils->read_bool(utils->data,
  841. "qcom,mdss-dsi-lane-3-state");
  842. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  843. if (host->data_lanes & DSI_DATA_LANE_0)
  844. num_of_lanes++;
  845. if (host->data_lanes & DSI_DATA_LANE_1)
  846. num_of_lanes++;
  847. if (host->data_lanes & DSI_DATA_LANE_2)
  848. num_of_lanes++;
  849. if (host->data_lanes & DSI_DATA_LANE_3)
  850. num_of_lanes++;
  851. host->num_data_lanes = num_of_lanes;
  852. if (host->data_lanes == 0) {
  853. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  854. rc = -EINVAL;
  855. }
  856. return rc;
  857. }
  858. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  859. struct dsi_parser_utils *utils,
  860. const char *name)
  861. {
  862. int rc = 0;
  863. const char *swap_mode;
  864. swap_mode = utils->get_property(utils->data,
  865. "qcom,mdss-dsi-color-order", NULL);
  866. if (swap_mode) {
  867. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  868. host->swap_mode = DSI_COLOR_SWAP_RGB;
  869. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  870. host->swap_mode = DSI_COLOR_SWAP_RBG;
  871. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  872. host->swap_mode = DSI_COLOR_SWAP_BRG;
  873. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  874. host->swap_mode = DSI_COLOR_SWAP_GRB;
  875. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  876. host->swap_mode = DSI_COLOR_SWAP_GBR;
  877. } else {
  878. DSI_ERR("[%s] Unrecognized color order-%s\n",
  879. name, swap_mode);
  880. rc = -EINVAL;
  881. }
  882. } else {
  883. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  884. host->swap_mode = DSI_COLOR_SWAP_RGB;
  885. }
  886. /* bit swap on color channel is not defined in dt */
  887. host->bit_swap_red = false;
  888. host->bit_swap_green = false;
  889. host->bit_swap_blue = false;
  890. return rc;
  891. }
  892. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  893. struct dsi_parser_utils *utils,
  894. const char *name)
  895. {
  896. const char *trig;
  897. int rc = 0;
  898. trig = utils->get_property(utils->data,
  899. "qcom,mdss-dsi-mdp-trigger", NULL);
  900. if (trig) {
  901. if (!strcmp(trig, "none")) {
  902. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  903. } else if (!strcmp(trig, "trigger_te")) {
  904. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  905. } else if (!strcmp(trig, "trigger_sw")) {
  906. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  907. } else if (!strcmp(trig, "trigger_sw_te")) {
  908. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  909. } else {
  910. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  911. name, trig);
  912. rc = -EINVAL;
  913. }
  914. } else {
  915. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  916. name);
  917. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  918. }
  919. trig = utils->get_property(utils->data,
  920. "qcom,mdss-dsi-dma-trigger", NULL);
  921. if (trig) {
  922. if (!strcmp(trig, "none")) {
  923. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  924. } else if (!strcmp(trig, "trigger_te")) {
  925. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  926. } else if (!strcmp(trig, "trigger_sw")) {
  927. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  928. } else if (!strcmp(trig, "trigger_sw_seof")) {
  929. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  930. } else if (!strcmp(trig, "trigger_sw_te")) {
  931. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  932. } else {
  933. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  934. name, trig);
  935. rc = -EINVAL;
  936. }
  937. } else {
  938. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  939. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  940. }
  941. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  942. &host->te_mode);
  943. if (rc) {
  944. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  945. host->te_mode = 1;
  946. rc = 0;
  947. }
  948. return rc;
  949. }
  950. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  951. struct dsi_parser_utils *utils,
  952. const char *name)
  953. {
  954. u32 val = 0, line_no = 0, window = 0;
  955. int rc = 0;
  956. bool panel_cphy_mode = false;
  957. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  958. if (!rc) {
  959. host->t_clk_post = val;
  960. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  961. }
  962. val = 0;
  963. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  964. if (!rc) {
  965. host->t_clk_pre = val;
  966. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  967. }
  968. host->ignore_rx_eot = utils->read_bool(utils->data,
  969. "qcom,mdss-dsi-rx-eot-ignore");
  970. host->append_tx_eot = utils->read_bool(utils->data,
  971. "qcom,mdss-dsi-tx-eot-append");
  972. host->ext_bridge_mode = utils->read_bool(utils->data,
  973. "qcom,mdss-dsi-ext-bridge-mode");
  974. host->force_hs_clk_lane = utils->read_bool(utils->data,
  975. "qcom,mdss-dsi-force-clock-lane-hs");
  976. panel_cphy_mode = utils->read_bool(utils->data,
  977. "qcom,panel-cphy-mode");
  978. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  979. : DSI_PHY_TYPE_DPHY;
  980. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  981. &line_no);
  982. if (rc)
  983. host->dma_sched_line = 0;
  984. else
  985. host->dma_sched_line = line_no;
  986. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  987. &window);
  988. if (rc)
  989. host->dma_sched_window = 0;
  990. else
  991. host->dma_sched_window = window;
  992. rc = utils->read_u32(utils->data, "qcom,vert-padding-value", &host->vpadding);
  993. host->line_insertion_enable = (rc || host->vpadding <= 0) ? false : true;
  994. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  995. host->dma_sched_line, host->dma_sched_window);
  996. return 0;
  997. }
  998. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  999. struct dsi_parser_utils *utils,
  1000. const char *name)
  1001. {
  1002. int rc = 0;
  1003. u32 val = 0;
  1004. bool supported = false;
  1005. struct dsi_split_link_config *split_link = &host->split_link;
  1006. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  1007. if (!supported) {
  1008. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1009. split_link->enabled = false;
  1010. return;
  1011. }
  1012. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1013. if (rc || val < 1) {
  1014. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1015. split_link->num_sublinks = 2;
  1016. } else {
  1017. split_link->num_sublinks = val;
  1018. }
  1019. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1020. if (rc || val < 1) {
  1021. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1022. split_link->lanes_per_sublink = 2;
  1023. } else {
  1024. split_link->lanes_per_sublink = val;
  1025. }
  1026. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1027. if (!supported)
  1028. split_link->sublink_swap = false;
  1029. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1030. split_link->num_sublinks, split_link->lanes_per_sublink);
  1031. split_link->enabled = true;
  1032. }
  1033. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1034. {
  1035. int rc = 0;
  1036. struct dsi_parser_utils *utils = &panel->utils;
  1037. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1038. panel->name);
  1039. if (rc) {
  1040. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1041. panel->name, rc);
  1042. goto error;
  1043. }
  1044. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1045. panel->name);
  1046. if (rc) {
  1047. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1048. panel->name, rc);
  1049. goto error;
  1050. }
  1051. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1052. panel->name);
  1053. if (rc) {
  1054. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1055. panel->name, rc);
  1056. goto error;
  1057. }
  1058. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1059. panel->name);
  1060. if (rc) {
  1061. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1062. panel->name, rc);
  1063. goto error;
  1064. }
  1065. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1066. panel->name);
  1067. if (rc) {
  1068. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1069. panel->name, rc);
  1070. goto error;
  1071. }
  1072. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1073. panel->name);
  1074. error:
  1075. return rc;
  1076. }
  1077. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1078. struct device_node *of_node)
  1079. {
  1080. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1081. struct dsi_parser_utils *utils = &panel->utils;
  1082. int val, rc = 0;
  1083. rc = of_property_read_u32(of_node, "qcom,dsi-qsync-avr-step-fps", &val);
  1084. if (rc)
  1085. DSI_DEBUG("[%s] avr step fps not defined rc:%d\n", panel->name, rc);
  1086. avr_caps->avr_step_fps = rc ? 0 : val;
  1087. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1088. if (val <= 0) {
  1089. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1090. return 0;
  1091. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1092. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1093. panel->name, val, panel->dfps_caps.dfps_list_len);
  1094. return -EINVAL;
  1095. } else if ((val > 0) && (avr_caps->avr_step_fps)) {
  1096. DSI_ERR("[%s] both modes of avr-steps are defined\n", panel->name);
  1097. return -EINVAL;
  1098. }
  1099. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1100. if (!avr_caps->avr_step_fps_list)
  1101. return -ENOMEM;
  1102. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1103. avr_caps->avr_step_fps_list, val);
  1104. if (rc) {
  1105. kfree(avr_caps->avr_step_fps_list);
  1106. return rc;
  1107. }
  1108. avr_caps->avr_step_fps_list_len = val;
  1109. return rc;
  1110. }
  1111. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1112. struct device_node *of_node)
  1113. {
  1114. int rc = 0;
  1115. u32 val = 0, i;
  1116. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1117. struct dsi_parser_utils *utils = &panel->utils;
  1118. const char *name = panel->name;
  1119. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1120. if (!qsync_caps->qsync_support) {
  1121. DSI_DEBUG("qsync feature not enabled\n");
  1122. goto error;
  1123. }
  1124. /**
  1125. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1126. * video mode when there is only one qsync min fps present.
  1127. */
  1128. rc = of_property_read_u32(of_node,
  1129. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1130. &val);
  1131. if (rc)
  1132. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1133. panel->name, rc);
  1134. qsync_caps->qsync_min_fps = val;
  1135. /**
  1136. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1137. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1138. * is defined.
  1139. */
  1140. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1141. "qcom,dsi-supported-qsync-min-fps-list");
  1142. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1143. qsync_caps->qsync_min_fps_list_len = 0;
  1144. goto qsync_support;
  1145. }
  1146. /**
  1147. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1148. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1149. */
  1150. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1151. qsync_caps->qsync_min_fps) {
  1152. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1153. name);
  1154. rc = -EINVAL;
  1155. goto error;
  1156. }
  1157. if (panel->dfps_caps.dfps_list_len !=
  1158. qsync_caps->qsync_min_fps_list_len) {
  1159. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1160. rc = -EINVAL;
  1161. goto error;
  1162. }
  1163. qsync_caps->qsync_min_fps_list =
  1164. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1165. GFP_KERNEL);
  1166. if (!qsync_caps->qsync_min_fps_list) {
  1167. rc = -ENOMEM;
  1168. goto error;
  1169. }
  1170. rc = utils->read_u32_array(utils->data,
  1171. "qcom,dsi-supported-qsync-min-fps-list",
  1172. qsync_caps->qsync_min_fps_list,
  1173. qsync_caps->qsync_min_fps_list_len);
  1174. if (rc) {
  1175. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1176. rc = -EINVAL;
  1177. goto error;
  1178. }
  1179. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1180. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1181. if (qsync_caps->qsync_min_fps_list[i] <
  1182. qsync_caps->qsync_min_fps)
  1183. qsync_caps->qsync_min_fps =
  1184. qsync_caps->qsync_min_fps_list[i];
  1185. }
  1186. qsync_support:
  1187. /* allow qsync support only if DFPS is with VFP approach */
  1188. if ((panel->dfps_caps.dfps_support) &&
  1189. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1190. qsync_caps->qsync_support = false;
  1191. qsync_caps->qsync_min_fps = 0;
  1192. }
  1193. error:
  1194. if (rc < 0) {
  1195. qsync_caps->qsync_min_fps = 0;
  1196. qsync_caps->qsync_min_fps_list_len = 0;
  1197. }
  1198. return rc;
  1199. }
  1200. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1201. struct dsi_parser_utils *utils)
  1202. {
  1203. int i, rc = 0;
  1204. struct msm_dyn_clk_list *bit_clk_list;
  1205. if (!mode || !mode->priv_info) {
  1206. DSI_ERR("invalid arguments\n");
  1207. return -EINVAL;
  1208. }
  1209. bit_clk_list = &mode->priv_info->bit_clk_list;
  1210. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1211. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1212. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1213. return -EINVAL;
  1214. }
  1215. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1216. if (!bit_clk_list->rates) {
  1217. DSI_ERR("failed to allocate space for bit clock list\n");
  1218. rc = -ENOMEM;
  1219. goto error;
  1220. }
  1221. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1222. if (!bit_clk_list->front_porches) {
  1223. DSI_ERR("failed to allocate space for front porch list\n");
  1224. rc = -ENOMEM;
  1225. goto error;
  1226. }
  1227. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1228. if (!bit_clk_list->pixel_clks_khz) {
  1229. DSI_ERR("failed to allocate space for pclk list\n");
  1230. rc = -ENOMEM;
  1231. goto error;
  1232. }
  1233. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1234. bit_clk_list->rates, bit_clk_list->count);
  1235. if (rc) {
  1236. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1237. goto error;
  1238. }
  1239. for (i = 0; i < bit_clk_list->count; i++)
  1240. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1241. return 0;
  1242. error:
  1243. bit_clk_list->count = 0;
  1244. kfree(bit_clk_list->rates);
  1245. kfree(bit_clk_list->front_porches);
  1246. kfree(bit_clk_list->pixel_clks_khz);
  1247. return rc;
  1248. }
  1249. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1250. {
  1251. int rc = 0;
  1252. bool supported = false;
  1253. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1254. struct dsi_parser_utils *utils = &panel->utils;
  1255. const char *type;
  1256. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1257. if (!supported) {
  1258. dyn_clk_caps->dyn_clk_support = false;
  1259. return rc;
  1260. }
  1261. dyn_clk_caps->dyn_clk_support = true;
  1262. type = utils->get_property(utils->data,
  1263. "qcom,dsi-dyn-clk-type", NULL);
  1264. if (!type) {
  1265. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1266. dyn_clk_caps->maintain_const_fps = false;
  1267. return 0;
  1268. }
  1269. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1270. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1271. dyn_clk_caps->maintain_const_fps = true;
  1272. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1273. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1274. dyn_clk_caps->maintain_const_fps = true;
  1275. } else {
  1276. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1277. dyn_clk_caps->maintain_const_fps = false;
  1278. }
  1279. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1280. return 0;
  1281. }
  1282. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1283. {
  1284. int rc = 0;
  1285. bool supported = false;
  1286. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1287. struct dsi_parser_utils *utils = &panel->utils;
  1288. const char *name = panel->name;
  1289. const char *type;
  1290. u32 i;
  1291. supported = utils->read_bool(utils->data,
  1292. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1293. if (!supported) {
  1294. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1295. dfps_caps->dfps_support = false;
  1296. return rc;
  1297. }
  1298. type = utils->get_property(utils->data,
  1299. "qcom,mdss-dsi-pan-fps-update", NULL);
  1300. if (!type) {
  1301. DSI_ERR("[%s] dfps type not defined\n", name);
  1302. rc = -EINVAL;
  1303. goto error;
  1304. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1305. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1306. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1307. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1308. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1309. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1310. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1311. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1312. } else {
  1313. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1314. rc = -EINVAL;
  1315. goto error;
  1316. }
  1317. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1318. "qcom,dsi-supported-dfps-list");
  1319. if (dfps_caps->dfps_list_len < 1) {
  1320. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1321. rc = -EINVAL;
  1322. goto error;
  1323. }
  1324. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1325. GFP_KERNEL);
  1326. if (!dfps_caps->dfps_list) {
  1327. rc = -ENOMEM;
  1328. goto error;
  1329. }
  1330. rc = utils->read_u32_array(utils->data,
  1331. "qcom,dsi-supported-dfps-list",
  1332. dfps_caps->dfps_list,
  1333. dfps_caps->dfps_list_len);
  1334. if (rc) {
  1335. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1336. rc = -EINVAL;
  1337. goto error;
  1338. }
  1339. dfps_caps->dfps_support = true;
  1340. /* calculate max and min fps */
  1341. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1342. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1343. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1344. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1345. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1346. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1347. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1348. }
  1349. error:
  1350. return rc;
  1351. }
  1352. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1353. struct dsi_parser_utils *utils,
  1354. const char *name)
  1355. {
  1356. int rc = 0;
  1357. const char *traffic_mode;
  1358. u32 vc_id = 0;
  1359. u32 val = 0;
  1360. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1361. if (rc) {
  1362. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1363. cfg->pulse_mode_hsa_he = false;
  1364. } else if (val == 1) {
  1365. cfg->pulse_mode_hsa_he = true;
  1366. } else if (val == 0) {
  1367. cfg->pulse_mode_hsa_he = false;
  1368. } else {
  1369. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1370. name);
  1371. rc = -EINVAL;
  1372. goto error;
  1373. }
  1374. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1375. "qcom,mdss-dsi-hfp-power-mode");
  1376. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1377. "qcom,mdss-dsi-hbp-power-mode");
  1378. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1379. "qcom,mdss-dsi-hsa-power-mode");
  1380. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1381. "qcom,mdss-dsi-last-line-interleave");
  1382. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1383. "qcom,mdss-dsi-bllp-eof-power-mode");
  1384. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1385. "qcom,mdss-dsi-bllp-power-mode");
  1386. traffic_mode = utils->get_property(utils->data,
  1387. "qcom,mdss-dsi-traffic-mode",
  1388. NULL);
  1389. if (!traffic_mode) {
  1390. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1391. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1392. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1393. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1394. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1395. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1396. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1397. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1398. } else {
  1399. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1400. traffic_mode);
  1401. rc = -EINVAL;
  1402. goto error;
  1403. }
  1404. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1405. &vc_id);
  1406. if (rc) {
  1407. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1408. cfg->vc_id = 0;
  1409. } else {
  1410. cfg->vc_id = vc_id;
  1411. }
  1412. error:
  1413. return rc;
  1414. }
  1415. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1416. struct dsi_parser_utils *utils,
  1417. const char *name)
  1418. {
  1419. u32 val = 0;
  1420. int rc = 0;
  1421. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1422. if (rc) {
  1423. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1424. cfg->wr_mem_start = 0x2C;
  1425. } else {
  1426. cfg->wr_mem_start = val;
  1427. }
  1428. val = 0;
  1429. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1430. &val);
  1431. if (rc) {
  1432. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1433. cfg->wr_mem_continue = 0x3C;
  1434. } else {
  1435. cfg->wr_mem_continue = val;
  1436. }
  1437. /* TODO: fix following */
  1438. cfg->max_cmd_packets_interleave = 0;
  1439. val = 0;
  1440. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1441. &val);
  1442. if (rc) {
  1443. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1444. cfg->insert_dcs_command = true;
  1445. } else if (val == 1) {
  1446. cfg->insert_dcs_command = true;
  1447. } else if (val == 0) {
  1448. cfg->insert_dcs_command = false;
  1449. } else {
  1450. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1451. name);
  1452. rc = -EINVAL;
  1453. goto error;
  1454. }
  1455. cfg->mdp_idle_ctrl_en =
  1456. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1457. if (cfg->mdp_idle_ctrl_en) {
  1458. val = 0;
  1459. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1460. if (rc) {
  1461. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1462. cfg->mdp_idle_ctrl_len = 0;
  1463. cfg->mdp_idle_ctrl_en = false;
  1464. rc = 0;
  1465. } else {
  1466. cfg->mdp_idle_ctrl_len = val;
  1467. }
  1468. }
  1469. error:
  1470. return rc;
  1471. }
  1472. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1473. {
  1474. int rc = 0;
  1475. struct dsi_parser_utils *utils = &panel->utils;
  1476. bool panel_mode_switch_enabled;
  1477. enum dsi_op_mode panel_mode;
  1478. const char *mode;
  1479. mode = utils->get_property(utils->data,
  1480. "qcom,mdss-dsi-panel-type", NULL);
  1481. if (!mode) {
  1482. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1483. panel_mode = DSI_OP_VIDEO_MODE;
  1484. } else if (!strcmp(mode, "dsi_video_mode")) {
  1485. panel_mode = DSI_OP_VIDEO_MODE;
  1486. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1487. panel_mode = DSI_OP_CMD_MODE;
  1488. } else {
  1489. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1490. rc = -EINVAL;
  1491. goto error;
  1492. }
  1493. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1494. "qcom,mdss-dsi-panel-mode-switch");
  1495. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1496. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1497. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1498. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1499. utils,
  1500. panel->name);
  1501. if (rc) {
  1502. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1503. panel->name, rc);
  1504. goto error;
  1505. }
  1506. }
  1507. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1508. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1509. utils,
  1510. panel->name);
  1511. if (rc) {
  1512. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1513. panel->name, rc);
  1514. goto error;
  1515. }
  1516. }
  1517. panel->poms_align_vsync = utils->read_bool(utils->data,
  1518. "qcom,poms-align-panel-vsync");
  1519. panel->panel_mode = panel_mode;
  1520. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1521. panel->panel_ack_disabled = utils->read_bool(utils->data,
  1522. "qcom,panel-ack-disabled");
  1523. error:
  1524. return rc;
  1525. }
  1526. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1527. {
  1528. int rc = 0;
  1529. u32 val = 0;
  1530. const char *str;
  1531. struct dsi_panel_phy_props *props = &panel->phy_props;
  1532. struct dsi_parser_utils *utils = &panel->utils;
  1533. const char *name = panel->name;
  1534. rc = utils->read_u32(utils->data,
  1535. "qcom,mdss-pan-physical-width-dimension", &val);
  1536. if (rc) {
  1537. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1538. props->panel_width_mm = 0;
  1539. rc = 0;
  1540. } else {
  1541. props->panel_width_mm = val;
  1542. }
  1543. rc = utils->read_u32(utils->data,
  1544. "qcom,mdss-pan-physical-height-dimension",
  1545. &val);
  1546. if (rc) {
  1547. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1548. props->panel_height_mm = 0;
  1549. rc = 0;
  1550. } else {
  1551. props->panel_height_mm = val;
  1552. }
  1553. str = utils->get_property(utils->data,
  1554. "qcom,mdss-dsi-panel-orientation", NULL);
  1555. if (!str) {
  1556. props->rotation = DSI_PANEL_ROTATE_NONE;
  1557. } else if (!strcmp(str, "180")) {
  1558. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1559. } else if (!strcmp(str, "hflip")) {
  1560. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1561. } else if (!strcmp(str, "vflip")) {
  1562. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1563. } else {
  1564. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1565. rc = -EINVAL;
  1566. goto error;
  1567. }
  1568. error:
  1569. return rc;
  1570. }
  1571. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1572. "qcom,mdss-dsi-pre-on-command",
  1573. "qcom,mdss-dsi-on-command",
  1574. "qcom,vid-on-commands",
  1575. "qcom,cmd-on-commands",
  1576. "qcom,mdss-dsi-post-panel-on-command",
  1577. "qcom,mdss-dsi-pre-off-command",
  1578. "qcom,mdss-dsi-off-command",
  1579. "qcom,mdss-dsi-post-off-command",
  1580. "qcom,mdss-dsi-pre-res-switch",
  1581. "qcom,mdss-dsi-res-switch",
  1582. "qcom,mdss-dsi-post-res-switch",
  1583. "qcom,video-mode-switch-in-commands",
  1584. "qcom,video-mode-switch-out-commands",
  1585. "qcom,cmd-mode-switch-in-commands",
  1586. "qcom,cmd-mode-switch-out-commands",
  1587. "qcom,mdss-dsi-panel-status-command",
  1588. "qcom,mdss-dsi-lp1-command",
  1589. "qcom,mdss-dsi-lp2-command",
  1590. "qcom,mdss-dsi-nolp-command",
  1591. "PPS not parsed from DTSI, generated dynamically",
  1592. "ROI not parsed from DTSI, generated dynamically",
  1593. "qcom,mdss-dsi-timing-switch-command",
  1594. "qcom,mdss-dsi-post-mode-switch-on-command",
  1595. "qcom,mdss-dsi-qsync-on-commands",
  1596. "qcom,mdss-dsi-qsync-off-commands",
  1597. };
  1598. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1599. "qcom,mdss-dsi-pre-on-command-state",
  1600. "qcom,mdss-dsi-on-command-state",
  1601. "qcom,vid-on-commands-state",
  1602. "qcom,cmd-on-commands-state",
  1603. "qcom,mdss-dsi-post-on-command-state",
  1604. "qcom,mdss-dsi-pre-off-command-state",
  1605. "qcom,mdss-dsi-off-command-state",
  1606. "qcom,mdss-dsi-post-off-command-state",
  1607. "qcom,mdss-dsi-pre-res-switch-state",
  1608. "qcom,mdss-dsi-res-switch-state",
  1609. "qcom,mdss-dsi-post-res-switch-state",
  1610. "qcom,video-mode-switch-in-commands-state",
  1611. "qcom,video-mode-switch-out-commands-state",
  1612. "qcom,cmd-mode-switch-in-commands-state",
  1613. "qcom,cmd-mode-switch-out-commands-state",
  1614. "qcom,mdss-dsi-panel-status-command-state",
  1615. "qcom,mdss-dsi-lp1-command-state",
  1616. "qcom,mdss-dsi-lp2-command-state",
  1617. "qcom,mdss-dsi-nolp-command-state",
  1618. "PPS not parsed from DTSI, generated dynamically",
  1619. "ROI not parsed from DTSI, generated dynamically",
  1620. "qcom,mdss-dsi-timing-switch-command-state",
  1621. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1622. "qcom,mdss-dsi-qsync-on-commands-state",
  1623. "qcom,mdss-dsi-qsync-off-commands-state",
  1624. };
  1625. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1626. {
  1627. const u32 cmd_set_min_size = 7;
  1628. u32 count = 0;
  1629. u32 packet_length;
  1630. u32 tmp;
  1631. while (length >= cmd_set_min_size) {
  1632. packet_length = cmd_set_min_size;
  1633. tmp = ((data[5] << 8) | (data[6]));
  1634. packet_length += tmp;
  1635. if (packet_length > length) {
  1636. DSI_ERR("format error\n");
  1637. return -EINVAL;
  1638. }
  1639. length -= packet_length;
  1640. data += packet_length;
  1641. count++;
  1642. }
  1643. *cnt = count;
  1644. return 0;
  1645. }
  1646. int dsi_panel_create_cmd_packets(const char *data,
  1647. u32 length,
  1648. u32 count,
  1649. struct dsi_cmd_desc *cmd)
  1650. {
  1651. int rc = 0;
  1652. int i, j;
  1653. u8 *payload;
  1654. for (i = 0; i < count; i++) {
  1655. u32 size;
  1656. cmd[i].msg.type = data[0];
  1657. cmd[i].msg.channel = data[2];
  1658. cmd[i].msg.flags |= data[3];
  1659. cmd[i].ctrl = 0;
  1660. cmd[i].post_wait_ms = data[4];
  1661. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1662. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1663. cmd[i].last_command = false;
  1664. else
  1665. cmd[i].last_command = true;
  1666. size = cmd[i].msg.tx_len * sizeof(u8);
  1667. payload = kzalloc(size, GFP_KERNEL);
  1668. if (!payload) {
  1669. rc = -ENOMEM;
  1670. goto error_free_payloads;
  1671. }
  1672. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1673. payload[j] = data[7 + j];
  1674. cmd[i].msg.tx_buf = payload;
  1675. data += (7 + cmd[i].msg.tx_len);
  1676. }
  1677. return rc;
  1678. error_free_payloads:
  1679. for (i = i - 1; i >= 0; i--) {
  1680. cmd--;
  1681. kfree(cmd->msg.tx_buf);
  1682. }
  1683. return rc;
  1684. }
  1685. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1686. {
  1687. u32 i = 0;
  1688. struct dsi_cmd_desc *cmd;
  1689. for (i = 0; i < set->count; i++) {
  1690. cmd = &set->cmds[i];
  1691. kfree(cmd->msg.tx_buf);
  1692. }
  1693. }
  1694. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1695. {
  1696. kfree(set->cmds);
  1697. }
  1698. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1699. u32 packet_count)
  1700. {
  1701. u32 size;
  1702. size = packet_count * sizeof(*cmd->cmds);
  1703. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1704. if (!cmd->cmds)
  1705. return -ENOMEM;
  1706. cmd->count = packet_count;
  1707. return 0;
  1708. }
  1709. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1710. enum dsi_cmd_set_type type,
  1711. struct dsi_parser_utils *utils)
  1712. {
  1713. int rc = 0;
  1714. u32 length = 0;
  1715. const char *data;
  1716. const char *state;
  1717. u32 packet_count = 0;
  1718. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1719. &length);
  1720. if (!data) {
  1721. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1722. rc = -ENOTSUPP;
  1723. goto error;
  1724. }
  1725. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1726. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1727. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1728. if (rc) {
  1729. DSI_ERR("commands failed, rc=%d\n", rc);
  1730. goto error;
  1731. }
  1732. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1733. packet_count, length);
  1734. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1735. if (rc) {
  1736. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1737. goto error;
  1738. }
  1739. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1740. cmd->cmds);
  1741. if (rc) {
  1742. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1743. goto error_free_mem;
  1744. }
  1745. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1746. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1747. cmd->state = DSI_CMD_SET_STATE_LP;
  1748. } else if (!strcmp(state, "dsi_hs_mode")) {
  1749. cmd->state = DSI_CMD_SET_STATE_HS;
  1750. } else {
  1751. DSI_ERR("[%s] command state unrecognized-%s\n",
  1752. cmd_set_state_map[type], state);
  1753. goto error_free_mem;
  1754. }
  1755. return rc;
  1756. error_free_mem:
  1757. kfree(cmd->cmds);
  1758. cmd->cmds = NULL;
  1759. error:
  1760. return rc;
  1761. }
  1762. static int dsi_panel_parse_cmd_sets(
  1763. struct dsi_display_mode_priv_info *priv_info,
  1764. struct dsi_parser_utils *utils)
  1765. {
  1766. int rc = 0;
  1767. struct dsi_panel_cmd_set *set;
  1768. u32 i;
  1769. if (!priv_info) {
  1770. DSI_ERR("invalid mode priv info\n");
  1771. return -EINVAL;
  1772. }
  1773. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1774. set = &priv_info->cmd_sets[i];
  1775. set->type = i;
  1776. set->count = 0;
  1777. if (i == DSI_CMD_SET_PPS) {
  1778. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1779. if (rc)
  1780. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1781. i, rc);
  1782. set->state = DSI_CMD_SET_STATE_LP;
  1783. } else {
  1784. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1785. if (rc)
  1786. DSI_DEBUG("failed to parse set %d\n", i);
  1787. }
  1788. }
  1789. rc = 0;
  1790. return rc;
  1791. }
  1792. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1793. {
  1794. int rc = 0;
  1795. int i;
  1796. u32 length = 0;
  1797. u32 count = 0;
  1798. u32 size = 0;
  1799. u32 *arr_32 = NULL;
  1800. const u32 *arr;
  1801. struct dsi_parser_utils *utils = &panel->utils;
  1802. struct dsi_reset_seq *seq;
  1803. if (panel->host_config.ext_bridge_mode)
  1804. return 0;
  1805. arr = utils->get_property(utils->data,
  1806. "qcom,mdss-dsi-reset-sequence", &length);
  1807. if (!arr) {
  1808. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1809. rc = -EINVAL;
  1810. goto error;
  1811. }
  1812. if (length & 0x1) {
  1813. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1814. panel->name);
  1815. rc = -EINVAL;
  1816. goto error;
  1817. }
  1818. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1819. length = length / sizeof(u32);
  1820. size = length * sizeof(u32);
  1821. arr_32 = kzalloc(size, GFP_KERNEL);
  1822. if (!arr_32) {
  1823. rc = -ENOMEM;
  1824. goto error;
  1825. }
  1826. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1827. arr_32, length);
  1828. if (rc) {
  1829. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1830. goto error_free_arr_32;
  1831. }
  1832. count = length / 2;
  1833. size = count * sizeof(*seq);
  1834. seq = kzalloc(size, GFP_KERNEL);
  1835. if (!seq) {
  1836. rc = -ENOMEM;
  1837. goto error_free_arr_32;
  1838. }
  1839. panel->reset_config.sequence = seq;
  1840. panel->reset_config.count = count;
  1841. for (i = 0; i < length; i += 2) {
  1842. seq->level = arr_32[i];
  1843. seq->sleep_ms = arr_32[i + 1];
  1844. seq++;
  1845. }
  1846. error_free_arr_32:
  1847. kfree(arr_32);
  1848. error:
  1849. return rc;
  1850. }
  1851. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1852. {
  1853. struct dsi_parser_utils *utils = &panel->utils;
  1854. const char *string;
  1855. int i, rc = 0;
  1856. panel->ulps_feature_enabled =
  1857. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1858. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1859. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1860. panel->ulps_suspend_enabled =
  1861. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1862. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1863. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1864. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1865. "qcom,mdss-dsi-te-using-wd");
  1866. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1867. "qcom,cmd-sync-wait-broadcast");
  1868. panel->lp11_init = utils->read_bool(utils->data,
  1869. "qcom,mdss-dsi-lp11-init");
  1870. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1871. "qcom,platform-reset-gpio-always-on");
  1872. panel->spr_info.enable = false;
  1873. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1874. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1875. if (!rc) {
  1876. // find match for pack-type string
  1877. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1878. if (msm_spr_pack_type_str[i] &&
  1879. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1880. panel->spr_info.enable = true;
  1881. panel->spr_info.pack_type = i;
  1882. break;
  1883. }
  1884. }
  1885. }
  1886. pr_debug("%s source side spr packing, pack-type %s\n",
  1887. panel->spr_info.enable ? "enable" : "disable",
  1888. panel->spr_info.enable ?
  1889. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1890. return 0;
  1891. }
  1892. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  1893. struct dsi_parser_utils *utils, u32 *jitter)
  1894. {
  1895. int rc = 0;
  1896. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  1897. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  1898. u32 ltj_time = 0;
  1899. const u32 max_ltj = 10;
  1900. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  1901. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1902. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1903. return 0;
  1904. }
  1905. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  1906. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1907. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  1908. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  1909. DSI_DEBUG("No valid long term jitter defined\n");
  1910. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1911. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1912. rc = -EINVAL;
  1913. } else {
  1914. wd_jitter->ltj_max_numer = ltj[0];
  1915. wd_jitter->ltj_max_denom = ltj[1];
  1916. wd_jitter->ltj_time_sec = ltj_time;
  1917. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  1918. }
  1919. if (jitter[0] && jitter[1]) {
  1920. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  1921. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1922. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1923. } else {
  1924. wd_jitter->inst_jitter_numer = jitter[0];
  1925. wd_jitter->inst_jitter_denom = jitter[1];
  1926. }
  1927. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1928. } else if (rc) {
  1929. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1930. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1931. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1932. }
  1933. priv_info->panel_jitter_numer = rc ?
  1934. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  1935. priv_info->panel_jitter_denom = rc ?
  1936. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  1937. return 0;
  1938. }
  1939. static int dsi_panel_parse_jitter_config(
  1940. struct dsi_display_mode *mode,
  1941. struct dsi_parser_utils *utils)
  1942. {
  1943. int rc;
  1944. struct dsi_display_mode_priv_info *priv_info;
  1945. struct dsi_panel *panel;
  1946. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1947. u64 jitter_val = 0;
  1948. priv_info = mode->priv_info;
  1949. panel = container_of(utils, struct dsi_panel, utils);
  1950. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1951. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1952. if (rc) {
  1953. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1954. } else {
  1955. jitter_val = jitter[0];
  1956. jitter_val = div_u64(jitter_val, jitter[1]);
  1957. }
  1958. if (panel->te_using_watchdog_timer) {
  1959. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  1960. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1961. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1962. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1963. } else {
  1964. priv_info->panel_jitter_numer = jitter[0];
  1965. priv_info->panel_jitter_denom = jitter[1];
  1966. }
  1967. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1968. &priv_info->panel_prefill_lines);
  1969. if (rc) {
  1970. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1971. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1972. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1973. } else if (priv_info->panel_prefill_lines >=
  1974. DSI_V_TOTAL(&mode->timing)) {
  1975. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1976. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1977. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1978. }
  1979. return 0;
  1980. }
  1981. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1982. {
  1983. int rc = 0;
  1984. char *supply_name;
  1985. if (panel->host_config.ext_bridge_mode)
  1986. return 0;
  1987. if (!strcmp(panel->type, "primary"))
  1988. supply_name = "qcom,panel-supply-entries";
  1989. else
  1990. supply_name = "qcom,panel-sec-supply-entries";
  1991. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1992. &panel->power_info, supply_name);
  1993. if (rc) {
  1994. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1995. goto error;
  1996. }
  1997. error:
  1998. return rc;
  1999. }
  2000. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  2001. struct msm_io_res *io_res)
  2002. {
  2003. struct dsi_parser_utils *utils = &panel->utils;
  2004. struct list_head *mem_list = &io_res->mem;
  2005. int reset_gpio;
  2006. int rc = 0;
  2007. reset_gpio = utils->get_named_gpio(utils->data,
  2008. "qcom,platform-reset-gpio", 0);
  2009. if (gpio_is_valid(reset_gpio)) {
  2010. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  2011. if (rc) {
  2012. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  2013. goto end;
  2014. }
  2015. }
  2016. end:
  2017. return rc;
  2018. }
  2019. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  2020. {
  2021. int rc = 0;
  2022. const char *data;
  2023. struct dsi_parser_utils *utils = &panel->utils;
  2024. char *reset_gpio_name, *mode_set_gpio_name;
  2025. if (!strcmp(panel->type, "primary")) {
  2026. reset_gpio_name = "qcom,platform-reset-gpio";
  2027. mode_set_gpio_name = "qcom,panel-mode-gpio";
  2028. } else {
  2029. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  2030. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  2031. }
  2032. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  2033. reset_gpio_name, 0);
  2034. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  2035. !panel->host_config.ext_bridge_mode) {
  2036. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2037. panel->reset_config.reset_gpio);
  2038. }
  2039. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2040. "qcom,5v-boost-gpio",
  2041. 0);
  2042. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2043. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2044. panel->name, rc);
  2045. panel->reset_config.disp_en_gpio =
  2046. utils->get_named_gpio(utils->data,
  2047. "qcom,platform-en-gpio", 0);
  2048. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2049. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2050. panel->name, rc);
  2051. }
  2052. }
  2053. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2054. utils->data, mode_set_gpio_name, 0);
  2055. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2056. DSI_DEBUG("mode gpio not specified\n");
  2057. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2058. data = utils->get_property(utils->data,
  2059. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2060. if (data) {
  2061. if (!strcmp(data, "single_port"))
  2062. panel->reset_config.mode_sel_state =
  2063. MODE_SEL_SINGLE_PORT;
  2064. else if (!strcmp(data, "dual_port"))
  2065. panel->reset_config.mode_sel_state =
  2066. MODE_SEL_DUAL_PORT;
  2067. else if (!strcmp(data, "high"))
  2068. panel->reset_config.mode_sel_state =
  2069. MODE_GPIO_HIGH;
  2070. else if (!strcmp(data, "low"))
  2071. panel->reset_config.mode_sel_state =
  2072. MODE_GPIO_LOW;
  2073. } else {
  2074. /* Set default mode as SPLIT mode */
  2075. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2076. }
  2077. /* TODO: release memory */
  2078. rc = dsi_panel_parse_reset_sequence(panel);
  2079. if (rc) {
  2080. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2081. panel->name, rc);
  2082. goto error;
  2083. }
  2084. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2085. "qcom,mdss-dsi-panel-test-pin",
  2086. 0);
  2087. if (!gpio_is_valid(panel->panel_test_gpio))
  2088. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2089. __LINE__);
  2090. error:
  2091. return rc;
  2092. }
  2093. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2094. {
  2095. int rc = 0;
  2096. u32 val;
  2097. struct dsi_backlight_config *config = &panel->bl_config;
  2098. struct dsi_parser_utils *utils = &panel->utils;
  2099. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2100. &val);
  2101. if (rc) {
  2102. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2103. goto error;
  2104. }
  2105. config->pwm_period_usecs = val;
  2106. error:
  2107. return rc;
  2108. }
  2109. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2110. {
  2111. int rc = 0;
  2112. u32 val = 0;
  2113. const char *bl_type = NULL;
  2114. const char *data = NULL;
  2115. const char *state = NULL;
  2116. struct dsi_parser_utils *utils = &panel->utils;
  2117. char *bl_name = NULL;
  2118. if (!strcmp(panel->type, "primary"))
  2119. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2120. else
  2121. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2122. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2123. if (!bl_type) {
  2124. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2125. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2126. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2127. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2128. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2129. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2130. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2131. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2132. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2133. } else {
  2134. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2135. panel->name, bl_type);
  2136. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2137. }
  2138. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2139. if (!data) {
  2140. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2141. } else if (!strcmp(data, "delay_until_first_frame")) {
  2142. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2143. } else {
  2144. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2145. panel->name, data);
  2146. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2147. }
  2148. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2149. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2150. panel->bl_config.dimming_min_bl = 0;
  2151. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2152. panel->bl_config.user_disable_notification = false;
  2153. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2154. if (rc) {
  2155. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2156. panel->name);
  2157. panel->bl_config.bl_min_level = 0;
  2158. } else {
  2159. panel->bl_config.bl_min_level = val;
  2160. }
  2161. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2162. if (rc) {
  2163. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2164. panel->name);
  2165. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2166. } else {
  2167. panel->bl_config.bl_max_level = val;
  2168. }
  2169. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2170. &val);
  2171. if (rc) {
  2172. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2173. panel->name);
  2174. panel->bl_config.brightness_max_level = 255;
  2175. rc = 0;
  2176. } else {
  2177. panel->bl_config.brightness_max_level = val;
  2178. }
  2179. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2180. "qcom,mdss-dsi-bl-inverted-dbv");
  2181. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2182. if (!state || !strcmp(state, "dsi_hs_mode"))
  2183. panel->bl_config.lp_mode = false;
  2184. else if (!strcmp(state, "dsi_lp_mode"))
  2185. panel->bl_config.lp_mode = true;
  2186. else
  2187. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2188. state);
  2189. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2190. rc = dsi_panel_parse_bl_pwm_config(panel);
  2191. if (rc) {
  2192. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2193. panel->name, rc);
  2194. goto error;
  2195. }
  2196. }
  2197. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2198. "qcom,platform-bklight-en-gpio",
  2199. 0);
  2200. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2201. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2202. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2203. panel->name, rc);
  2204. rc = -EPROBE_DEFER;
  2205. goto error;
  2206. } else {
  2207. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2208. panel->name, rc);
  2209. rc = 0;
  2210. goto error;
  2211. }
  2212. }
  2213. error:
  2214. return rc;
  2215. }
  2216. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2217. struct dsi_parser_utils *utils)
  2218. {
  2219. const char *data;
  2220. u32 len, i;
  2221. int rc = 0;
  2222. struct dsi_display_mode_priv_info *priv_info;
  2223. u64 pixel_clk_khz;
  2224. if (!mode || !mode->priv_info)
  2225. return -EINVAL;
  2226. priv_info = mode->priv_info;
  2227. data = utils->get_property(utils->data,
  2228. "qcom,mdss-dsi-panel-phy-timings", &len);
  2229. if (!data) {
  2230. DSI_DEBUG("Unable to read Phy timing settings\n");
  2231. } else {
  2232. priv_info->phy_timing_val =
  2233. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2234. if (!priv_info->phy_timing_val)
  2235. return -EINVAL;
  2236. for (i = 0; i < len; i++)
  2237. priv_info->phy_timing_val[i] = data[i];
  2238. priv_info->phy_timing_len = len;
  2239. }
  2240. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2241. /*
  2242. * For command mode we update the pclk as part of
  2243. * function dsi_panel_calc_dsi_transfer_time( )
  2244. * as we set it based on dsi clock or mdp transfer time.
  2245. */
  2246. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2247. DSI_V_TOTAL(&mode->timing) *
  2248. mode->timing.refresh_rate);
  2249. do_div(pixel_clk_khz, 1000);
  2250. mode->pixel_clk_khz = pixel_clk_khz;
  2251. }
  2252. return rc;
  2253. }
  2254. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2255. struct dsi_parser_utils *utils)
  2256. {
  2257. u32 data;
  2258. int rc = -EINVAL;
  2259. int intf_width;
  2260. const char *compression;
  2261. struct dsi_display_mode_priv_info *priv_info;
  2262. if (!mode || !mode->priv_info)
  2263. return -EINVAL;
  2264. priv_info = mode->priv_info;
  2265. priv_info->dsc_enabled = false;
  2266. compression = utils->get_property(utils->data,
  2267. "qcom,compression-mode", NULL);
  2268. if (compression && !strcmp(compression, "dsc"))
  2269. priv_info->dsc_enabled = true;
  2270. if (!priv_info->dsc_enabled) {
  2271. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2272. return 0;
  2273. }
  2274. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2275. if (rc) {
  2276. priv_info->dsc.config.dsc_version_major = 0x1;
  2277. priv_info->dsc.config.dsc_version_minor = 0x1;
  2278. rc = 0;
  2279. } else {
  2280. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2281. * major version information
  2282. */
  2283. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2284. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2285. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2286. ((priv_info->dsc.config.dsc_version_minor
  2287. != 0x1) &&
  2288. (priv_info->dsc.config.dsc_version_minor
  2289. != 0x2))) {
  2290. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2291. __func__,
  2292. priv_info->dsc.config.dsc_version_major,
  2293. priv_info->dsc.config.dsc_version_minor
  2294. );
  2295. rc = -EINVAL;
  2296. goto error;
  2297. }
  2298. }
  2299. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2300. if (rc) {
  2301. priv_info->dsc.scr_rev = 0x0;
  2302. rc = 0;
  2303. } else {
  2304. priv_info->dsc.scr_rev = data & 0xff;
  2305. /* only one scr rev supported */
  2306. if (priv_info->dsc.scr_rev > 0x1) {
  2307. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2308. __func__, priv_info->dsc.scr_rev);
  2309. rc = -EINVAL;
  2310. goto error;
  2311. }
  2312. }
  2313. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2314. if (rc) {
  2315. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2316. goto error;
  2317. }
  2318. priv_info->dsc.config.slice_height = data;
  2319. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2320. if (rc) {
  2321. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2322. goto error;
  2323. }
  2324. priv_info->dsc.config.slice_width = data;
  2325. intf_width = mode->timing.h_active;
  2326. if (intf_width % priv_info->dsc.config.slice_width) {
  2327. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2328. intf_width, priv_info->dsc.config.slice_width);
  2329. rc = -EINVAL;
  2330. goto error;
  2331. }
  2332. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2333. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2334. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2335. if (rc) {
  2336. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2337. goto error;
  2338. } else if (!data || (data > 2)) {
  2339. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2340. goto error;
  2341. }
  2342. priv_info->dsc.slice_per_pkt = data;
  2343. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2344. &data);
  2345. if (rc) {
  2346. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2347. goto error;
  2348. }
  2349. priv_info->dsc.config.bits_per_component = data;
  2350. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2351. if (rc) {
  2352. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2353. data = 0;
  2354. }
  2355. priv_info->dsc.pps_delay_ms = data;
  2356. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2357. &data);
  2358. if (rc) {
  2359. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2360. goto error;
  2361. }
  2362. priv_info->dsc.config.bits_per_pixel = data << 4;
  2363. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2364. &data);
  2365. if (rc) {
  2366. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2367. rc = 0;
  2368. data = MSM_CHROMA_444;
  2369. } else if (data == MSM_CHROMA_422) {
  2370. priv_info->dsc.config.native_422 = 1;
  2371. } else if (data == MSM_CHROMA_420) {
  2372. priv_info->dsc.config.native_420 = 1;
  2373. }
  2374. priv_info->dsc.chroma_format = data;
  2375. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2376. &data);
  2377. if (rc) {
  2378. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2379. rc = 0;
  2380. data = MSM_RGB;
  2381. }
  2382. priv_info->dsc.source_color_space = data;
  2383. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2384. "qcom,mdss-dsc-block-prediction-enable");
  2385. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2386. priv_info->dsc.config.slice_width);
  2387. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2388. priv_info->dsc.scr_rev);
  2389. if (rc) {
  2390. DSI_DEBUG("failed populating dsc params\n");
  2391. rc = -EINVAL;
  2392. goto error;
  2393. }
  2394. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width,
  2395. priv_info->widebus_support);
  2396. if (rc) {
  2397. DSI_DEBUG("failed populating other dsc params\n");
  2398. rc = -EINVAL;
  2399. goto error;
  2400. }
  2401. priv_info->pclk_scale.numer =
  2402. priv_info->dsc.config.bits_per_pixel >> 4;
  2403. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2404. priv_info->dsc.chroma_format,
  2405. priv_info->dsc.config.bits_per_component);
  2406. mode->timing.dsc_enabled = true;
  2407. mode->timing.dsc = &priv_info->dsc;
  2408. mode->timing.pclk_scale = priv_info->pclk_scale;
  2409. error:
  2410. return rc;
  2411. }
  2412. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2413. struct dsi_parser_utils *utils, int traffic_mode)
  2414. {
  2415. u32 data;
  2416. int rc = -EINVAL;
  2417. const char *compression;
  2418. struct dsi_display_mode_priv_info *priv_info;
  2419. int intf_width;
  2420. if (!mode || !mode->priv_info)
  2421. return -EINVAL;
  2422. priv_info = mode->priv_info;
  2423. priv_info->vdc_enabled = false;
  2424. compression = utils->get_property(utils->data,
  2425. "qcom,compression-mode", NULL);
  2426. if (compression && !strcmp(compression, "vdc"))
  2427. priv_info->vdc_enabled = true;
  2428. if (!priv_info->vdc_enabled) {
  2429. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2430. return 0;
  2431. }
  2432. priv_info->vdc.traffic_mode = traffic_mode;
  2433. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2434. if (rc) {
  2435. priv_info->vdc.version_major = 0x1;
  2436. priv_info->vdc.version_minor = 0x2;
  2437. priv_info->vdc.version_release = 0x0;
  2438. rc = 0;
  2439. } else {
  2440. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2441. * major version information
  2442. */
  2443. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2444. priv_info->vdc.version_minor = data & 0x0F;
  2445. if ((priv_info->vdc.version_major != 0x1) &&
  2446. ((priv_info->vdc.version_minor
  2447. != 0x2))) {
  2448. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2449. __func__,
  2450. priv_info->vdc.version_major,
  2451. priv_info->vdc.version_minor
  2452. );
  2453. rc = -EINVAL;
  2454. goto error;
  2455. }
  2456. }
  2457. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2458. if (rc) {
  2459. priv_info->vdc.version_release = 0x0;
  2460. rc = 0;
  2461. } else {
  2462. priv_info->vdc.version_release = data & 0xff;
  2463. /* only one release version is supported */
  2464. if (priv_info->vdc.version_release != 0x0) {
  2465. DSI_ERR("unsupported vdc release version %d\n",
  2466. priv_info->vdc.version_release);
  2467. rc = -EINVAL;
  2468. goto error;
  2469. }
  2470. }
  2471. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2472. priv_info->vdc.version_major,
  2473. priv_info->vdc.version_minor,
  2474. priv_info->vdc.version_release);
  2475. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2476. if (rc) {
  2477. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2478. goto error;
  2479. }
  2480. priv_info->vdc.slice_height = data;
  2481. /* slice height should be atleast 16 lines */
  2482. if (priv_info->vdc.slice_height < 16) {
  2483. DSI_ERR("invalid slice height %d\n",
  2484. priv_info->vdc.slice_height);
  2485. rc = -EINVAL;
  2486. goto error;
  2487. }
  2488. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2489. if (rc) {
  2490. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2491. goto error;
  2492. }
  2493. priv_info->vdc.slice_width = data;
  2494. /*
  2495. * slide-width should be multiple of 8
  2496. * slice-width should be atlease 64 pixels
  2497. */
  2498. if ((priv_info->vdc.slice_width & 7) ||
  2499. (priv_info->vdc.slice_width < 64)) {
  2500. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2501. rc = -EINVAL;
  2502. goto error;
  2503. }
  2504. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2505. if (rc) {
  2506. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2507. goto error;
  2508. } else if (!data || (data > 2)) {
  2509. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2510. rc = -EINVAL;
  2511. goto error;
  2512. }
  2513. intf_width = mode->timing.h_active;
  2514. priv_info->vdc.slice_per_pkt = data;
  2515. priv_info->vdc.frame_width = mode->timing.h_active;
  2516. priv_info->vdc.frame_height = mode->timing.v_active;
  2517. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2518. &data);
  2519. if (rc) {
  2520. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2521. goto error;
  2522. }
  2523. priv_info->vdc.bits_per_component = data;
  2524. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2525. if (rc) {
  2526. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2527. data = 0;
  2528. }
  2529. priv_info->vdc.pps_delay_ms = data;
  2530. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2531. &data);
  2532. if (rc) {
  2533. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2534. goto error;
  2535. }
  2536. priv_info->vdc.bits_per_pixel = data << 4;
  2537. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2538. &data);
  2539. if (rc) {
  2540. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2541. rc = 0;
  2542. data = MSM_CHROMA_444;
  2543. }
  2544. priv_info->vdc.chroma_format = data;
  2545. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2546. &data);
  2547. if (rc) {
  2548. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2549. rc = 0;
  2550. data = MSM_RGB;
  2551. }
  2552. priv_info->vdc.source_color_space = data;
  2553. rc = sde_vdc_populate_config(&priv_info->vdc,
  2554. intf_width, traffic_mode);
  2555. if (rc) {
  2556. DSI_DEBUG("failed populating vdc config\n");
  2557. rc = -EINVAL;
  2558. goto error;
  2559. }
  2560. priv_info->pclk_scale.numer =
  2561. priv_info->vdc.bits_per_pixel >> 4;
  2562. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2563. priv_info->vdc.chroma_format,
  2564. priv_info->vdc.bits_per_component);
  2565. mode->timing.vdc_enabled = true;
  2566. mode->timing.vdc = &priv_info->vdc;
  2567. mode->timing.pclk_scale = priv_info->pclk_scale;
  2568. error:
  2569. return rc;
  2570. }
  2571. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2572. {
  2573. int rc = 0;
  2574. struct drm_panel_hdr_properties *hdr_prop;
  2575. struct dsi_parser_utils *utils = &panel->utils;
  2576. hdr_prop = &panel->hdr_props;
  2577. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2578. "qcom,mdss-dsi-panel-hdr-enabled");
  2579. if (hdr_prop->hdr_enabled) {
  2580. rc = utils->read_u32_array(utils->data,
  2581. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2582. hdr_prop->display_primaries,
  2583. DISPLAY_PRIMARIES_MAX);
  2584. if (rc) {
  2585. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2586. __func__, __LINE__, rc);
  2587. hdr_prop->hdr_enabled = false;
  2588. return rc;
  2589. }
  2590. rc = utils->read_u32(utils->data,
  2591. "qcom,mdss-dsi-panel-peak-brightness",
  2592. &(hdr_prop->peak_brightness));
  2593. if (rc) {
  2594. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2595. __func__, __LINE__, rc);
  2596. hdr_prop->hdr_enabled = false;
  2597. return rc;
  2598. }
  2599. rc = utils->read_u32(utils->data,
  2600. "qcom,mdss-dsi-panel-blackness-level",
  2601. &(hdr_prop->blackness_level));
  2602. if (rc) {
  2603. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2604. __func__, __LINE__, rc);
  2605. hdr_prop->hdr_enabled = false;
  2606. return rc;
  2607. }
  2608. }
  2609. return 0;
  2610. }
  2611. static int dsi_panel_parse_topology(
  2612. struct dsi_display_mode_priv_info *priv_info,
  2613. struct dsi_parser_utils *utils,
  2614. int topology_override)
  2615. {
  2616. struct msm_display_topology *topology;
  2617. u32 top_count, top_sel, *array = NULL;
  2618. int i, len = 0;
  2619. int rc = -EINVAL;
  2620. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2621. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2622. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2623. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2624. return rc;
  2625. }
  2626. top_count = len / TOPOLOGY_SET_LEN;
  2627. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2628. if (!array)
  2629. return -ENOMEM;
  2630. rc = utils->read_u32_array(utils->data,
  2631. "qcom,display-topology", array, len);
  2632. if (rc) {
  2633. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2634. goto read_fail;
  2635. }
  2636. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2637. if (!topology) {
  2638. rc = -ENOMEM;
  2639. goto read_fail;
  2640. }
  2641. for (i = 0; i < top_count; i++) {
  2642. struct msm_display_topology *top = &topology[i];
  2643. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2644. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2645. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2646. }
  2647. if (topology_override >= 0 && topology_override < top_count) {
  2648. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2649. topology_override,
  2650. topology[topology_override].num_lm,
  2651. topology[topology_override].num_enc,
  2652. topology[topology_override].num_intf);
  2653. top_sel = topology_override;
  2654. goto parse_done;
  2655. }
  2656. rc = utils->read_u32(utils->data,
  2657. "qcom,default-topology-index", &top_sel);
  2658. if (rc) {
  2659. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2660. goto parse_fail;
  2661. }
  2662. if (top_sel >= top_count) {
  2663. rc = -EINVAL;
  2664. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2665. rc);
  2666. goto parse_fail;
  2667. }
  2668. parse_done:
  2669. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2670. !topology[top_sel].num_enc) {
  2671. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2672. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2673. topology[top_sel].num_enc);
  2674. goto parse_fail;
  2675. }
  2676. if (priv_info->dsc_enabled)
  2677. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2678. else if (priv_info->vdc_enabled)
  2679. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2680. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2681. topology[top_sel].num_lm,
  2682. topology[top_sel].num_enc,
  2683. topology[top_sel].num_intf);
  2684. memcpy(&priv_info->topology, &topology[top_sel],
  2685. sizeof(struct msm_display_topology));
  2686. parse_fail:
  2687. kfree(topology);
  2688. read_fail:
  2689. kfree(array);
  2690. return rc;
  2691. }
  2692. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2693. struct msm_roi_alignment *align)
  2694. {
  2695. int len = 0, rc = 0;
  2696. u32 value[6];
  2697. struct property *data;
  2698. if (!align)
  2699. return -EINVAL;
  2700. memset(align, 0, sizeof(*align));
  2701. data = utils->find_property(utils->data,
  2702. "qcom,panel-roi-alignment", &len);
  2703. len /= sizeof(u32);
  2704. if (!data) {
  2705. DSI_ERR("panel roi alignment not found\n");
  2706. rc = -EINVAL;
  2707. } else if (len != 6) {
  2708. DSI_ERR("incorrect roi alignment len %d\n", len);
  2709. rc = -EINVAL;
  2710. } else {
  2711. rc = utils->read_u32_array(utils->data,
  2712. "qcom,panel-roi-alignment", value, len);
  2713. if (rc)
  2714. DSI_DEBUG("error reading panel roi alignment values\n");
  2715. else {
  2716. align->xstart_pix_align = value[0];
  2717. align->ystart_pix_align = value[1];
  2718. align->width_pix_align = value[2];
  2719. align->height_pix_align = value[3];
  2720. align->min_width = value[4];
  2721. align->min_height = value[5];
  2722. }
  2723. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2724. align->xstart_pix_align,
  2725. align->width_pix_align,
  2726. align->ystart_pix_align,
  2727. align->height_pix_align,
  2728. align->min_width,
  2729. align->min_height);
  2730. }
  2731. return rc;
  2732. }
  2733. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2734. struct dsi_parser_utils *utils)
  2735. {
  2736. struct msm_roi_caps *roi_caps = NULL;
  2737. const char *data;
  2738. int rc = 0;
  2739. if (!mode || !mode->priv_info) {
  2740. DSI_ERR("invalid arguments\n");
  2741. return -EINVAL;
  2742. }
  2743. roi_caps = &mode->priv_info->roi_caps;
  2744. memset(roi_caps, 0, sizeof(*roi_caps));
  2745. data = utils->get_property(utils->data,
  2746. "qcom,partial-update-enabled", NULL);
  2747. if (data) {
  2748. if (!strcmp(data, "dual_roi"))
  2749. roi_caps->num_roi = 2;
  2750. else if (!strcmp(data, "single_roi"))
  2751. roi_caps->num_roi = 1;
  2752. else {
  2753. DSI_INFO(
  2754. "invalid value for qcom,partial-update-enabled: %s\n",
  2755. data);
  2756. return 0;
  2757. }
  2758. } else {
  2759. DSI_DEBUG("partial update disabled as the property is not set\n");
  2760. return 0;
  2761. }
  2762. roi_caps->merge_rois = utils->read_bool(utils->data,
  2763. "qcom,partial-update-roi-merge");
  2764. roi_caps->enabled = roi_caps->num_roi > 0;
  2765. if (roi_caps->enabled)
  2766. rc = dsi_panel_parse_roi_alignment(utils,
  2767. &roi_caps->align);
  2768. if (rc)
  2769. memset(roi_caps, 0, sizeof(*roi_caps));
  2770. else if (mode->priv_info->dsc_enabled &&
  2771. ((roi_caps->align.min_width % mode->priv_info->dsc.config.slice_width) ||
  2772. (roi_caps->align.min_height % mode->priv_info->dsc.config.slice_height))) {
  2773. memset(roi_caps, 0, sizeof(*roi_caps));
  2774. DSI_ERR("panel roi can't match DSC slice settings,disable partial update\n");
  2775. }
  2776. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2777. roi_caps->enabled);
  2778. return rc;
  2779. }
  2780. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2781. struct dsi_parser_utils *utils)
  2782. {
  2783. if (!mode || !mode->priv_info) {
  2784. DSI_ERR("invalid arguments\n");
  2785. return false;
  2786. }
  2787. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2788. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2789. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2790. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2791. if (!mode->panel_mode_caps)
  2792. return false;
  2793. return true;
  2794. };
  2795. static int dsi_panel_parse_bpp_mode_caps(struct dsi_display_mode *mode,
  2796. struct dsi_parser_utils *utils)
  2797. {
  2798. int rc = 0;
  2799. u32 bpp = 0;
  2800. if (!mode || !mode->priv_info) {
  2801. DSI_ERR("invalid arguments\n");
  2802. return -EINVAL;
  2803. }
  2804. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp-mode", &bpp);
  2805. if (rc) {
  2806. DSI_DEBUG("bpp mode not defined in timing node, setting default 24bpp\n");
  2807. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB888;
  2808. return 0;
  2809. }
  2810. switch(bpp) {
  2811. case 30:
  2812. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB101010;
  2813. break;
  2814. case 24:
  2815. default:
  2816. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB888;
  2817. break;
  2818. }
  2819. return rc;
  2820. };
  2821. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2822. {
  2823. int dms_enabled;
  2824. const char *data;
  2825. struct dsi_parser_utils *utils = &panel->utils;
  2826. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2827. dms_enabled = utils->read_bool(utils->data,
  2828. "qcom,dynamic-mode-switch-enabled");
  2829. if (!dms_enabled)
  2830. return 0;
  2831. data = utils->get_property(utils->data,
  2832. "qcom,dynamic-mode-switch-type", NULL);
  2833. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2834. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2835. } else {
  2836. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2837. panel->name, data);
  2838. return -EINVAL;
  2839. }
  2840. return 0;
  2841. };
  2842. /*
  2843. * The length of all the valid values to be checked should not be greater
  2844. * than the length of returned data from read command.
  2845. */
  2846. static bool
  2847. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2848. {
  2849. int i;
  2850. struct drm_panel_esd_config *config = &panel->esd_config;
  2851. for (i = 0; i < count; ++i) {
  2852. if (config->status_valid_params[i] >
  2853. config->status_cmds_rlen[i]) {
  2854. DSI_DEBUG("ignore valid params\n");
  2855. return false;
  2856. }
  2857. }
  2858. return true;
  2859. }
  2860. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2861. char *prop_key, u32 **target, u32 cmd_cnt)
  2862. {
  2863. int tmp;
  2864. if (!utils->find_property(utils->data, prop_key, &tmp))
  2865. return false;
  2866. tmp /= sizeof(u32);
  2867. if (tmp != cmd_cnt) {
  2868. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2869. tmp, cmd_cnt);
  2870. return false;
  2871. }
  2872. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2873. if (IS_ERR_OR_NULL(*target)) {
  2874. DSI_ERR("Error allocating memory for property\n");
  2875. return false;
  2876. }
  2877. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2878. DSI_ERR("cannot get values from dts\n");
  2879. kfree(*target);
  2880. *target = NULL;
  2881. return false;
  2882. }
  2883. return true;
  2884. }
  2885. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2886. {
  2887. kfree(esd_config->status_buf);
  2888. kfree(esd_config->return_buf);
  2889. kfree(esd_config->status_value);
  2890. kfree(esd_config->status_valid_params);
  2891. kfree(esd_config->status_cmds_rlen);
  2892. kfree(esd_config->status_cmd.cmds);
  2893. }
  2894. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2895. {
  2896. struct drm_panel_esd_config *esd_config;
  2897. int rc = 0;
  2898. u32 tmp;
  2899. u32 i, status_len, *lenp;
  2900. struct property *data;
  2901. struct dsi_parser_utils *utils = &panel->utils;
  2902. if (!panel) {
  2903. DSI_ERR("Invalid Params\n");
  2904. return -EINVAL;
  2905. }
  2906. esd_config = &panel->esd_config;
  2907. if (!esd_config)
  2908. return -EINVAL;
  2909. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2910. DSI_CMD_SET_PANEL_STATUS, utils);
  2911. if (!esd_config->status_cmd.count) {
  2912. DSI_ERR("panel status command parsing failed\n");
  2913. rc = -EINVAL;
  2914. goto error;
  2915. }
  2916. if (!dsi_panel_parse_esd_status_len(utils,
  2917. "qcom,mdss-dsi-panel-status-read-length",
  2918. &panel->esd_config.status_cmds_rlen,
  2919. esd_config->status_cmd.count)) {
  2920. DSI_ERR("Invalid status read length\n");
  2921. rc = -EINVAL;
  2922. goto error1;
  2923. }
  2924. if (dsi_panel_parse_esd_status_len(utils,
  2925. "qcom,mdss-dsi-panel-status-valid-params",
  2926. &panel->esd_config.status_valid_params,
  2927. esd_config->status_cmd.count)) {
  2928. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2929. esd_config->status_cmd.count)) {
  2930. rc = -EINVAL;
  2931. goto error2;
  2932. }
  2933. }
  2934. status_len = 0;
  2935. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2936. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2937. status_len += lenp[i];
  2938. if (!status_len) {
  2939. rc = -EINVAL;
  2940. goto error2;
  2941. }
  2942. /*
  2943. * Some panel may need multiple read commands to properly
  2944. * check panel status. Do a sanity check for proper status
  2945. * value which will be compared with the value read by dsi
  2946. * controller during ESD check. Also check if multiple read
  2947. * commands are there then, there should be corresponding
  2948. * status check values for each read command.
  2949. */
  2950. data = utils->find_property(utils->data,
  2951. "qcom,mdss-dsi-panel-status-value", &tmp);
  2952. tmp /= sizeof(u32);
  2953. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2954. esd_config->groups = tmp / status_len;
  2955. } else {
  2956. DSI_ERR("error parse panel-status-value\n");
  2957. rc = -EINVAL;
  2958. goto error2;
  2959. }
  2960. esd_config->status_value =
  2961. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2962. GFP_KERNEL);
  2963. if (!esd_config->status_value) {
  2964. rc = -ENOMEM;
  2965. goto error2;
  2966. }
  2967. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2968. sizeof(unsigned char), GFP_KERNEL);
  2969. if (!esd_config->return_buf) {
  2970. rc = -ENOMEM;
  2971. goto error3;
  2972. }
  2973. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2974. if (!esd_config->status_buf) {
  2975. rc = -ENOMEM;
  2976. goto error4;
  2977. }
  2978. rc = utils->read_u32_array(utils->data,
  2979. "qcom,mdss-dsi-panel-status-value",
  2980. esd_config->status_value, esd_config->groups * status_len);
  2981. if (rc) {
  2982. DSI_DEBUG("error reading panel status values\n");
  2983. memset(esd_config->status_value, 0,
  2984. esd_config->groups * status_len);
  2985. }
  2986. return 0;
  2987. error4:
  2988. kfree(esd_config->return_buf);
  2989. error3:
  2990. kfree(esd_config->status_value);
  2991. error2:
  2992. kfree(esd_config->status_valid_params);
  2993. kfree(esd_config->status_cmds_rlen);
  2994. error1:
  2995. kfree(esd_config->status_cmd.cmds);
  2996. error:
  2997. return rc;
  2998. }
  2999. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  3000. {
  3001. int rc = 0;
  3002. const char *string;
  3003. struct drm_panel_esd_config *esd_config;
  3004. struct dsi_parser_utils *utils = &panel->utils;
  3005. u8 *esd_mode = NULL;
  3006. esd_config = &panel->esd_config;
  3007. esd_config->status_mode = ESD_MODE_MAX;
  3008. esd_config->esd_enabled = utils->read_bool(utils->data,
  3009. "qcom,esd-check-enabled");
  3010. if (!esd_config->esd_enabled)
  3011. return 0;
  3012. rc = utils->read_string(utils->data,
  3013. "qcom,mdss-dsi-panel-status-check-mode", &string);
  3014. if (!rc) {
  3015. if (!strcmp(string, "bta_check")) {
  3016. esd_config->status_mode = ESD_MODE_SW_BTA;
  3017. } else if (!strcmp(string, "reg_read")) {
  3018. esd_config->status_mode = ESD_MODE_REG_READ;
  3019. } else if (!strcmp(string, "te_signal_check")) {
  3020. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3021. esd_config->status_mode = ESD_MODE_PANEL_TE;
  3022. } else {
  3023. DSI_ERR("TE-ESD not valid for video mode\n");
  3024. rc = -EINVAL;
  3025. goto error;
  3026. }
  3027. } else {
  3028. DSI_ERR("No valid panel-status-check-mode string\n");
  3029. rc = -EINVAL;
  3030. goto error;
  3031. }
  3032. } else {
  3033. DSI_DEBUG("status check method not defined!\n");
  3034. rc = -EINVAL;
  3035. goto error;
  3036. }
  3037. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  3038. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  3039. if (rc) {
  3040. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  3041. rc);
  3042. goto error;
  3043. }
  3044. esd_mode = "register_read";
  3045. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  3046. esd_mode = "bta_trigger";
  3047. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  3048. esd_mode = "te_check";
  3049. }
  3050. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  3051. return 0;
  3052. error:
  3053. panel->esd_config.esd_enabled = false;
  3054. return rc;
  3055. }
  3056. static void dsi_panel_update_util(struct dsi_panel *panel,
  3057. struct device_node *parser_node)
  3058. {
  3059. struct dsi_parser_utils *utils = &panel->utils;
  3060. if (parser_node) {
  3061. *utils = *dsi_parser_get_parser_utils();
  3062. utils->data = parser_node;
  3063. DSI_DEBUG("switching to parser APIs\n");
  3064. goto end;
  3065. }
  3066. *utils = *dsi_parser_get_of_utils();
  3067. utils->data = panel->panel_of_node;
  3068. end:
  3069. utils->node = panel->panel_of_node;
  3070. }
  3071. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3072. {
  3073. return 0;
  3074. }
  3075. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3076. {
  3077. if (trusted_vm_env) {
  3078. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3079. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3080. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3081. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3082. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3083. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3084. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3085. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3086. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3087. } else {
  3088. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3089. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3090. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3091. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3092. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3093. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3094. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3095. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3096. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3097. }
  3098. }
  3099. struct dsi_panel *dsi_panel_get(struct device *parent,
  3100. struct device_node *of_node,
  3101. struct device_node *parser_node,
  3102. const char *type,
  3103. int topology_override,
  3104. bool trusted_vm_env)
  3105. {
  3106. struct dsi_panel *panel;
  3107. struct dsi_parser_utils *utils;
  3108. const char *panel_physical_type;
  3109. int rc = 0;
  3110. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3111. if (!panel)
  3112. return ERR_PTR(-ENOMEM);
  3113. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3114. panel->panel_of_node = of_node;
  3115. panel->parent = parent;
  3116. panel->type = type;
  3117. dsi_panel_update_util(panel, parser_node);
  3118. utils = &panel->utils;
  3119. panel->name = utils->get_property(utils->data,
  3120. "qcom,mdss-dsi-panel-name", NULL);
  3121. if (!panel->name)
  3122. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3123. /*
  3124. * Set panel type to LCD as default.
  3125. */
  3126. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3127. panel_physical_type = utils->get_property(utils->data,
  3128. "qcom,mdss-dsi-panel-physical-type", NULL);
  3129. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3130. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3131. rc = dsi_panel_parse_host_config(panel);
  3132. if (rc) {
  3133. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3134. rc);
  3135. goto error;
  3136. }
  3137. rc = dsi_panel_parse_panel_mode(panel);
  3138. if (rc) {
  3139. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3140. rc);
  3141. goto error;
  3142. }
  3143. rc = dsi_panel_parse_dfps_caps(panel);
  3144. if (rc)
  3145. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3146. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3147. if (rc)
  3148. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3149. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3150. if (rc)
  3151. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3152. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3153. if (rc)
  3154. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3155. rc = dsi_panel_parse_phy_props(panel);
  3156. if (rc) {
  3157. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3158. rc);
  3159. goto error;
  3160. }
  3161. rc = panel->panel_ops.parse_gpios(panel);
  3162. if (rc) {
  3163. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3164. goto error;
  3165. }
  3166. rc = panel->panel_ops.parse_power_cfg(panel);
  3167. if (rc)
  3168. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3169. rc = dsi_panel_parse_bl_config(panel);
  3170. if (rc) {
  3171. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3172. if (rc == -EPROBE_DEFER)
  3173. goto error;
  3174. }
  3175. rc = dsi_panel_parse_misc_features(panel);
  3176. if (rc)
  3177. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3178. rc = dsi_panel_parse_hdr_config(panel);
  3179. if (rc)
  3180. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3181. rc = dsi_panel_get_mode_count(panel);
  3182. if (rc) {
  3183. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3184. goto error;
  3185. }
  3186. rc = dsi_panel_parse_dms_info(panel);
  3187. if (rc)
  3188. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3189. rc = dsi_panel_parse_esd_config(panel);
  3190. if (rc)
  3191. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3192. rc = dsi_panel_vreg_get(panel);
  3193. if (rc) {
  3194. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3195. panel->name, rc);
  3196. goto error;
  3197. }
  3198. panel->power_mode = SDE_MODE_DPMS_OFF;
  3199. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3200. NULL, DRM_MODE_CONNECTOR_DSI);
  3201. panel->mipi_device.dev.of_node = of_node;
  3202. drm_panel_add(&panel->drm_panel);
  3203. mutex_init(&panel->panel_lock);
  3204. return panel;
  3205. error:
  3206. kfree(panel);
  3207. return ERR_PTR(rc);
  3208. }
  3209. void dsi_panel_put(struct dsi_panel *panel)
  3210. {
  3211. drm_panel_remove(&panel->drm_panel);
  3212. /* free resources allocated for ESD check */
  3213. dsi_panel_esd_config_deinit(&panel->esd_config);
  3214. kfree(panel->avr_caps.avr_step_fps_list);
  3215. kfree(panel);
  3216. }
  3217. int dsi_panel_drv_init(struct dsi_panel *panel,
  3218. struct mipi_dsi_host *host)
  3219. {
  3220. int rc = 0;
  3221. struct mipi_dsi_device *dev;
  3222. if (!panel || !host) {
  3223. DSI_ERR("invalid params\n");
  3224. return -EINVAL;
  3225. }
  3226. mutex_lock(&panel->panel_lock);
  3227. dev = &panel->mipi_device;
  3228. dev->host = host;
  3229. /*
  3230. * We dont have device structure since panel is not a device node.
  3231. * When using drm panel framework, the device is probed when the host is
  3232. * create.
  3233. */
  3234. dev->channel = 0;
  3235. dev->lanes = 4;
  3236. panel->host = host;
  3237. rc = panel->panel_ops.pinctrl_init(panel);
  3238. if (rc) {
  3239. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3240. panel->name, rc);
  3241. goto exit;
  3242. }
  3243. rc = panel->panel_ops.gpio_request(panel);
  3244. if (rc) {
  3245. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3246. rc);
  3247. goto error_pinctrl_deinit;
  3248. }
  3249. rc = panel->panel_ops.bl_register(panel);
  3250. if (rc) {
  3251. if (rc != -EPROBE_DEFER)
  3252. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3253. panel->name, rc);
  3254. goto error_gpio_release;
  3255. }
  3256. goto exit;
  3257. error_gpio_release:
  3258. (void)dsi_panel_gpio_release(panel);
  3259. error_pinctrl_deinit:
  3260. (void)dsi_panel_pinctrl_deinit(panel);
  3261. exit:
  3262. mutex_unlock(&panel->panel_lock);
  3263. return rc;
  3264. }
  3265. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3266. {
  3267. int rc = 0;
  3268. if (!panel) {
  3269. DSI_ERR("invalid params\n");
  3270. return -EINVAL;
  3271. }
  3272. mutex_lock(&panel->panel_lock);
  3273. rc = panel->panel_ops.bl_unregister(panel);
  3274. if (rc)
  3275. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3276. panel->name, rc);
  3277. rc = panel->panel_ops.gpio_release(panel);
  3278. if (rc)
  3279. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3280. rc);
  3281. rc = panel->panel_ops.pinctrl_deinit(panel);
  3282. if (rc)
  3283. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3284. rc);
  3285. rc = dsi_panel_vreg_put(panel);
  3286. if (rc)
  3287. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3288. panel->host = NULL;
  3289. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3290. mutex_unlock(&panel->panel_lock);
  3291. return rc;
  3292. }
  3293. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3294. struct dsi_display_mode *mode)
  3295. {
  3296. return 0;
  3297. }
  3298. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3299. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3300. {
  3301. const char *compression;
  3302. u32 *array = NULL, top_count, len, i;
  3303. int rc = -EINVAL;
  3304. bool dsc_enable = false;
  3305. *dsc_count = 0;
  3306. *lm_count = 0;
  3307. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3308. if (compression && !strcmp(compression, "dsc"))
  3309. dsc_enable = true;
  3310. len = utils->count_u32_elems(node, "qcom,display-topology");
  3311. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3312. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3313. return rc;
  3314. top_count = len / TOPOLOGY_SET_LEN;
  3315. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3316. if (!array)
  3317. return -ENOMEM;
  3318. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3319. if (rc) {
  3320. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3321. goto read_fail;
  3322. }
  3323. for (i = 0; i < top_count; i++) {
  3324. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3325. if (dsc_enable)
  3326. *dsc_count = max(*dsc_count,
  3327. array[i * TOPOLOGY_SET_LEN + 1]);
  3328. }
  3329. read_fail:
  3330. kfree(array);
  3331. return 0;
  3332. }
  3333. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3334. {
  3335. const u32 SINGLE_MODE_SUPPORT = 1;
  3336. struct dsi_parser_utils *utils;
  3337. struct device_node *timings_np, *child_np;
  3338. int num_dfps_rates;
  3339. int num_video_modes = 0, num_cmd_modes = 0;
  3340. int count, rc = 0;
  3341. u32 dsc_count = 0, lm_count = 0;
  3342. if (!panel) {
  3343. DSI_ERR("invalid params\n");
  3344. return -EINVAL;
  3345. }
  3346. utils = &panel->utils;
  3347. panel->num_timing_nodes = 0;
  3348. timings_np = utils->get_child_by_name(utils->data,
  3349. "qcom,mdss-dsi-display-timings");
  3350. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3351. DSI_ERR("no display timing nodes defined\n");
  3352. rc = -EINVAL;
  3353. goto error;
  3354. }
  3355. count = utils->get_child_count(timings_np);
  3356. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3357. count > DSI_MODE_MAX) {
  3358. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3359. rc = -EINVAL;
  3360. goto error;
  3361. }
  3362. /* No multiresolution support is available for video mode panels.
  3363. * Multi-mode is supported for video mode during POMS is enabled.
  3364. */
  3365. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3366. !panel->host_config.ext_bridge_mode &&
  3367. !panel->panel_mode_switch_enabled)
  3368. count = SINGLE_MODE_SUPPORT;
  3369. panel->num_timing_nodes = count;
  3370. dsi_for_each_child_node(timings_np, child_np) {
  3371. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3372. num_video_modes++;
  3373. else if (utils->read_bool(child_np,
  3374. "qcom,mdss-dsi-cmd-mode"))
  3375. num_cmd_modes++;
  3376. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3377. num_video_modes++;
  3378. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3379. num_cmd_modes++;
  3380. dsi_panel_get_max_res_count(utils, child_np,
  3381. &dsc_count, &lm_count);
  3382. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3383. panel->lm_count = max(lm_count, panel->lm_count);
  3384. }
  3385. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3386. panel->dfps_caps.dfps_list_len;
  3387. /* Inflate num_of_modes by fps in dfps. */
  3388. num_video_modes = num_video_modes * num_dfps_rates;
  3389. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3390. error:
  3391. return rc;
  3392. }
  3393. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3394. struct dsi_panel_phy_props *phy_props)
  3395. {
  3396. int rc = 0;
  3397. if (!panel || !phy_props) {
  3398. DSI_ERR("invalid params\n");
  3399. return -EINVAL;
  3400. }
  3401. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3402. return rc;
  3403. }
  3404. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3405. struct dsi_dfps_capabilities *dfps_caps)
  3406. {
  3407. int rc = 0;
  3408. if (!panel || !dfps_caps) {
  3409. DSI_ERR("invalid params\n");
  3410. return -EINVAL;
  3411. }
  3412. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3413. return rc;
  3414. }
  3415. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3416. {
  3417. int i;
  3418. if (!mode->priv_info)
  3419. return;
  3420. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3421. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3422. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3423. }
  3424. kfree(mode->priv_info);
  3425. }
  3426. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3427. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3428. {
  3429. u32 frame_time_us, nslices;
  3430. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3431. dsi_transfer_time_us, pixel_clk_khz;
  3432. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3433. struct dsi_mode_info *timing = &mode->timing;
  3434. struct dsi_display_mode *display_mode;
  3435. u32 jitter_numer, jitter_denom, prefill_lines;
  3436. u32 default_prefill_lines, actual_prefill_lines, vtotal;
  3437. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3438. u32 bits_per_symbol = 16, num_of_symbols = 7; /* For Cphy */
  3439. u16 bpp;
  3440. /* Packet overhead in bits,
  3441. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3442. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3443. * 1 byte dcs data command.
  3444. */
  3445. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3446. packet_overhead = 120;
  3447. else
  3448. packet_overhead = 56;
  3449. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3450. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3451. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3452. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3453. if (timing->refresh_rate >= 120)
  3454. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3455. if (timing->dsc_enabled) {
  3456. nslices = (timing->h_active)/(dsc->config.slice_width);
  3457. /* (slice width x bit-per-pixel + packet overhead) x
  3458. * number of slices x height x fps / lane
  3459. */
  3460. bpp = DSC_BPP(dsc->config);
  3461. bits_per_line = ((dsc->config.slice_width * bpp) +
  3462. packet_overhead) * nslices;
  3463. bits_per_line = bits_per_line / (config->num_data_lanes);
  3464. min_bitclk_hz = (bits_per_line * timing->v_active *
  3465. timing->refresh_rate);
  3466. } else {
  3467. total_active_pixels = ((dsi_h_active_dce(timing)
  3468. * timing->v_active));
  3469. /* calculate the actual bitclk needed to transfer the frame */
  3470. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3471. (mode->bpp));
  3472. do_div(min_bitclk_hz, config->num_data_lanes);
  3473. }
  3474. timing->min_dsi_clk_hz = min_bitclk_hz;
  3475. if (config->phy_type == DSI_PHY_TYPE_CPHY) {
  3476. do_div(timing->min_dsi_clk_hz, bits_per_symbol);
  3477. timing->min_dsi_clk_hz *= num_of_symbols;
  3478. }
  3479. /*
  3480. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3481. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3482. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3483. * threshold time are configured to 40us.
  3484. */
  3485. if (mode->priv_info->disable_rsc_solver) {
  3486. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3487. } else {
  3488. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3489. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3490. }
  3491. /*
  3492. * Increase the prefill_lines proportionately as recommended
  3493. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3494. */
  3495. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3496. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3497. vtotal = actual_prefill_lines + timing->v_active;
  3498. /* consider the max of default prefill lines and actual prefill lines */
  3499. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3500. prefill_time_us = mult_frac(frame_time_us, prefill_lines, vtotal);
  3501. min_threshold_us = min_threshold_us + prefill_time_us;
  3502. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3503. if (timing->clk_rate_hz) {
  3504. /* adjust the transfer time proportionately for bit clk*/
  3505. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3506. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3507. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3508. } else if (mode->priv_info->mdp_transfer_time_us) {
  3509. max_transfer_us = frame_time_us - min_threshold_us;
  3510. mode->priv_info->mdp_transfer_time_us = min(
  3511. mode->priv_info->mdp_transfer_time_us,
  3512. max_transfer_us);
  3513. timing->dsi_transfer_time_us =
  3514. mode->priv_info->mdp_transfer_time_us;
  3515. } else {
  3516. if ((min_threshold_us > frame_threshold_us) ||
  3517. (mode->priv_info->disable_rsc_solver))
  3518. frame_threshold_us = min_threshold_us;
  3519. timing->dsi_transfer_time_us = frame_time_us -
  3520. frame_threshold_us;
  3521. }
  3522. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3523. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3524. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3525. timing->mdp_transfer_time_us =
  3526. mode->priv_info->mdp_transfer_time_us;
  3527. }
  3528. /* Calculate pclk_khz to update modeinfo */
  3529. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3530. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3531. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3532. do_div(pixel_clk_khz, mode->bpp);
  3533. display_mode->pixel_clk_khz = pixel_clk_khz;
  3534. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3535. }
  3536. int dsi_panel_get_mode(struct dsi_panel *panel,
  3537. u32 index, struct dsi_display_mode *mode,
  3538. int topology_override)
  3539. {
  3540. struct device_node *timings_np, *child_np;
  3541. struct dsi_parser_utils *utils;
  3542. struct dsi_display_mode_priv_info *prv_info;
  3543. u32 child_idx = 0;
  3544. int rc = 0, num_timings;
  3545. int traffic_mode;
  3546. void *utils_data = NULL;
  3547. if (!panel || !mode) {
  3548. DSI_ERR("invalid params\n");
  3549. return -EINVAL;
  3550. }
  3551. mutex_lock(&panel->panel_lock);
  3552. utils = &panel->utils;
  3553. prv_info = mode->priv_info;
  3554. timings_np = utils->get_child_by_name(utils->data,
  3555. "qcom,mdss-dsi-display-timings");
  3556. if (!timings_np) {
  3557. DSI_ERR("no display timing nodes defined\n");
  3558. rc = -EINVAL;
  3559. goto parse_fail;
  3560. }
  3561. num_timings = utils->get_child_count(timings_np);
  3562. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3563. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3564. rc = -EINVAL;
  3565. goto parse_fail;
  3566. }
  3567. utils_data = utils->data;
  3568. traffic_mode = panel->video_config.traffic_mode;
  3569. dsi_for_each_child_node(timings_np, child_np) {
  3570. if (index != child_idx++)
  3571. continue;
  3572. utils->data = child_np;
  3573. if (panel->panel_mode_switch_enabled) {
  3574. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3575. mode->panel_mode_caps = panel->panel_mode;
  3576. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3577. child_idx);
  3578. }
  3579. } else {
  3580. mode->panel_mode_caps = panel->panel_mode;
  3581. }
  3582. if (panel->host_config.bpp_switch_enabled) {
  3583. rc = dsi_panel_parse_bpp_mode_caps(mode, utils);
  3584. if (rc) {
  3585. DSI_ERR("failed to parse bpp mode caps, rc=%d\n", rc);
  3586. goto parse_fail;
  3587. }
  3588. } else {
  3589. mode->pixel_format_caps = panel->host_config.dst_format;
  3590. }
  3591. mode->bpp = dsi_pixel_format_to_bpp(mode->pixel_format_caps);
  3592. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3593. if (rc)
  3594. mode->mode_idx = index;
  3595. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3596. if (rc) {
  3597. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3598. goto parse_fail;
  3599. }
  3600. if (panel->dyn_clk_caps.dyn_clk_support) {
  3601. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3602. if (rc)
  3603. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3604. }
  3605. rc = dsi_panel_parse_dsc_params(mode, utils);
  3606. if (rc) {
  3607. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3608. goto parse_fail;
  3609. }
  3610. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3611. if (rc) {
  3612. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3613. goto parse_fail;
  3614. }
  3615. rc = dsi_panel_parse_topology(prv_info, utils,
  3616. topology_override);
  3617. if (rc) {
  3618. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3619. goto parse_fail;
  3620. }
  3621. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3622. if (rc) {
  3623. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3624. goto parse_fail;
  3625. }
  3626. rc = dsi_panel_parse_jitter_config(mode, utils);
  3627. if (rc)
  3628. DSI_ERR(
  3629. "failed to parse panel jitter config, rc=%d\n", rc);
  3630. rc = dsi_panel_parse_phy_timing(mode, utils);
  3631. if (rc) {
  3632. DSI_ERR(
  3633. "failed to parse panel phy timings, rc=%d\n", rc);
  3634. goto parse_fail;
  3635. }
  3636. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3637. if (rc)
  3638. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3639. }
  3640. parse_fail:
  3641. utils->data = utils_data;
  3642. mutex_unlock(&panel->panel_lock);
  3643. return rc;
  3644. }
  3645. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3646. struct dsi_display_mode *mode,
  3647. struct dsi_host_config *config)
  3648. {
  3649. int rc = 0;
  3650. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3651. if (!panel || !mode || !config) {
  3652. DSI_ERR("invalid params\n");
  3653. return -EINVAL;
  3654. }
  3655. mutex_lock(&panel->panel_lock);
  3656. config->panel_mode = panel->panel_mode;
  3657. memcpy(&config->common_config, &panel->host_config,
  3658. sizeof(config->common_config));
  3659. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3660. memcpy(&config->u.video_engine, &panel->video_config,
  3661. sizeof(config->u.video_engine));
  3662. } else {
  3663. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3664. sizeof(config->u.cmd_engine));
  3665. }
  3666. memcpy(&config->video_timing, &mode->timing,
  3667. sizeof(config->video_timing));
  3668. config->video_timing.mdp_transfer_time_us =
  3669. mode->priv_info->mdp_transfer_time_us;
  3670. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3671. config->video_timing.dsc = &mode->priv_info->dsc;
  3672. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3673. config->video_timing.vdc = &mode->priv_info->vdc;
  3674. if (dyn_clk_caps->dyn_clk_support)
  3675. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3676. else
  3677. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3678. config->esc_clk_rate_hz = 19200000;
  3679. mutex_unlock(&panel->panel_lock);
  3680. return rc;
  3681. }
  3682. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3683. {
  3684. int rc = 0;
  3685. if (!panel) {
  3686. DSI_ERR("invalid params\n");
  3687. return -EINVAL;
  3688. }
  3689. mutex_lock(&panel->panel_lock);
  3690. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3691. if (panel->lp11_init)
  3692. goto error;
  3693. rc = dsi_panel_power_on(panel);
  3694. if (rc) {
  3695. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3696. goto error;
  3697. }
  3698. error:
  3699. mutex_unlock(&panel->panel_lock);
  3700. return rc;
  3701. }
  3702. int dsi_panel_update_pps(struct dsi_panel *panel)
  3703. {
  3704. int rc = 0;
  3705. struct dsi_panel_cmd_set *set = NULL;
  3706. struct dsi_display_mode_priv_info *priv_info = NULL;
  3707. if (!panel || !panel->cur_mode) {
  3708. DSI_ERR("invalid params\n");
  3709. return -EINVAL;
  3710. }
  3711. mutex_lock(&panel->panel_lock);
  3712. priv_info = panel->cur_mode->priv_info;
  3713. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3714. if (priv_info->dsc_enabled)
  3715. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3716. panel->dce_pps_cmd, 0,
  3717. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3718. else if (priv_info->vdc_enabled)
  3719. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3720. panel->dce_pps_cmd, 0,
  3721. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3722. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3723. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3724. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3725. if (rc) {
  3726. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3727. goto error;
  3728. }
  3729. }
  3730. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3731. if (rc) {
  3732. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3733. panel->name, rc);
  3734. }
  3735. dsi_panel_destroy_cmd_packets(set);
  3736. error:
  3737. mutex_unlock(&panel->panel_lock);
  3738. return rc;
  3739. }
  3740. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3741. {
  3742. int rc = 0;
  3743. if (!panel) {
  3744. DSI_ERR("invalid params\n");
  3745. return -EINVAL;
  3746. }
  3747. mutex_lock(&panel->panel_lock);
  3748. if (!panel->panel_initialized)
  3749. goto exit;
  3750. /*
  3751. * Consider LP1->LP2->LP1.
  3752. * If the panel is already in LP mode, do not need to
  3753. * set the regulator.
  3754. * IBB and AB power mode would be set at the same time
  3755. * in PMIC driver, so we only call ibb setting that is enough.
  3756. */
  3757. if (dsi_panel_is_type_oled(panel) &&
  3758. panel->power_mode != SDE_MODE_DPMS_LP2)
  3759. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3760. "ibb", REGULATOR_MODE_IDLE);
  3761. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3762. if (rc)
  3763. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3764. panel->name, rc);
  3765. exit:
  3766. mutex_unlock(&panel->panel_lock);
  3767. return rc;
  3768. }
  3769. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3770. {
  3771. int rc = 0;
  3772. if (!panel) {
  3773. DSI_ERR("invalid params\n");
  3774. return -EINVAL;
  3775. }
  3776. mutex_lock(&panel->panel_lock);
  3777. if (!panel->panel_initialized)
  3778. goto exit;
  3779. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3780. if (rc)
  3781. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3782. panel->name, rc);
  3783. exit:
  3784. mutex_unlock(&panel->panel_lock);
  3785. return rc;
  3786. }
  3787. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3788. {
  3789. int rc = 0;
  3790. if (!panel) {
  3791. DSI_ERR("invalid params\n");
  3792. return -EINVAL;
  3793. }
  3794. mutex_lock(&panel->panel_lock);
  3795. if (!panel->panel_initialized)
  3796. goto exit;
  3797. /*
  3798. * Consider about LP1->LP2->NOLP.
  3799. */
  3800. if (dsi_panel_is_type_oled(panel) &&
  3801. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3802. panel->power_mode == SDE_MODE_DPMS_LP2))
  3803. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3804. "ibb", REGULATOR_MODE_NORMAL);
  3805. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3806. if (rc)
  3807. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3808. panel->name, rc);
  3809. exit:
  3810. mutex_unlock(&panel->panel_lock);
  3811. return rc;
  3812. }
  3813. int dsi_panel_prepare(struct dsi_panel *panel)
  3814. {
  3815. int rc = 0;
  3816. if (!panel) {
  3817. DSI_ERR("invalid params\n");
  3818. return -EINVAL;
  3819. }
  3820. mutex_lock(&panel->panel_lock);
  3821. if (panel->lp11_init) {
  3822. rc = dsi_panel_power_on(panel);
  3823. if (rc) {
  3824. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3825. panel->name, rc);
  3826. goto error;
  3827. }
  3828. }
  3829. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3830. if (rc) {
  3831. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3832. panel->name, rc);
  3833. goto error;
  3834. }
  3835. error:
  3836. mutex_unlock(&panel->panel_lock);
  3837. return rc;
  3838. }
  3839. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3840. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3841. {
  3842. static const int ROI_CMD_LEN = 5;
  3843. int rc = 0;
  3844. /* DTYPE_DCS_LWRITE */
  3845. char *caset, *paset;
  3846. set->cmds = NULL;
  3847. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3848. if (!caset) {
  3849. rc = -ENOMEM;
  3850. goto exit;
  3851. }
  3852. caset[0] = 0x2a;
  3853. caset[1] = (roi->x & 0xFF00) >> 8;
  3854. caset[2] = roi->x & 0xFF;
  3855. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3856. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3857. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3858. if (!paset) {
  3859. rc = -ENOMEM;
  3860. goto error_free_mem;
  3861. }
  3862. paset[0] = 0x2b;
  3863. paset[1] = (roi->y & 0xFF00) >> 8;
  3864. paset[2] = roi->y & 0xFF;
  3865. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3866. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3867. set->type = DSI_CMD_SET_ROI;
  3868. set->state = DSI_CMD_SET_STATE_LP;
  3869. set->count = 2; /* send caset + paset together */
  3870. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3871. if (!set->cmds) {
  3872. rc = -ENOMEM;
  3873. goto error_free_mem;
  3874. }
  3875. set->cmds[0].msg.channel = 0;
  3876. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3877. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3878. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3879. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3880. set->cmds[0].msg.tx_buf = caset;
  3881. set->cmds[0].msg.rx_len = 0;
  3882. set->cmds[0].msg.rx_buf = 0;
  3883. set->cmds[0].last_command = 0;
  3884. set->cmds[0].post_wait_ms = 0;
  3885. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3886. set->cmds[1].msg.channel = 0;
  3887. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3888. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3889. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3890. set->cmds[1].msg.tx_buf = paset;
  3891. set->cmds[1].msg.rx_len = 0;
  3892. set->cmds[1].msg.rx_buf = 0;
  3893. set->cmds[1].last_command = 1;
  3894. set->cmds[1].post_wait_ms = 0;
  3895. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3896. goto exit;
  3897. error_free_mem:
  3898. kfree(caset);
  3899. kfree(paset);
  3900. kfree(set->cmds);
  3901. exit:
  3902. return rc;
  3903. }
  3904. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3905. int ctrl_idx)
  3906. {
  3907. int rc = 0;
  3908. if (!panel) {
  3909. DSI_ERR("invalid params\n");
  3910. return -EINVAL;
  3911. }
  3912. mutex_lock(&panel->panel_lock);
  3913. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3914. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3915. if (rc)
  3916. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3917. panel->name, rc);
  3918. mutex_unlock(&panel->panel_lock);
  3919. return rc;
  3920. }
  3921. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3922. int ctrl_idx)
  3923. {
  3924. int rc = 0;
  3925. if (!panel) {
  3926. DSI_ERR("invalid params\n");
  3927. return -EINVAL;
  3928. }
  3929. mutex_lock(&panel->panel_lock);
  3930. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3931. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3932. if (rc)
  3933. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3934. panel->name, rc);
  3935. mutex_unlock(&panel->panel_lock);
  3936. return rc;
  3937. }
  3938. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3939. struct dsi_rect *roi)
  3940. {
  3941. int rc = 0;
  3942. struct dsi_panel_cmd_set *set;
  3943. struct dsi_display_mode_priv_info *priv_info;
  3944. if (!panel || !panel->cur_mode) {
  3945. DSI_ERR("Invalid params\n");
  3946. return -EINVAL;
  3947. }
  3948. priv_info = panel->cur_mode->priv_info;
  3949. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3950. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3951. if (rc) {
  3952. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3953. panel->name, rc);
  3954. return rc;
  3955. }
  3956. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3957. roi->x, roi->y, roi->w, roi->h);
  3958. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3959. mutex_lock(&panel->panel_lock);
  3960. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3961. if (rc)
  3962. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3963. panel->name, rc);
  3964. mutex_unlock(&panel->panel_lock);
  3965. dsi_panel_destroy_cmd_packets(set);
  3966. dsi_panel_dealloc_cmd_packets(set);
  3967. return rc;
  3968. }
  3969. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3970. {
  3971. int rc = 0;
  3972. if (!panel) {
  3973. DSI_ERR("Invalid params\n");
  3974. return -EINVAL;
  3975. }
  3976. mutex_lock(&panel->panel_lock);
  3977. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3978. if (rc)
  3979. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3980. panel->name, rc);
  3981. mutex_unlock(&panel->panel_lock);
  3982. return rc;
  3983. }
  3984. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3985. {
  3986. int rc = 0;
  3987. if (!panel) {
  3988. DSI_ERR("Invalid params\n");
  3989. return -EINVAL;
  3990. }
  3991. mutex_lock(&panel->panel_lock);
  3992. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3993. if (rc)
  3994. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3995. panel->name, rc);
  3996. mutex_unlock(&panel->panel_lock);
  3997. return rc;
  3998. }
  3999. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  4000. {
  4001. int rc = 0;
  4002. if (!panel) {
  4003. DSI_ERR("Invalid params\n");
  4004. return -EINVAL;
  4005. }
  4006. mutex_lock(&panel->panel_lock);
  4007. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  4008. if (rc)
  4009. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  4010. panel->name, rc);
  4011. mutex_unlock(&panel->panel_lock);
  4012. return rc;
  4013. }
  4014. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  4015. {
  4016. int rc = 0;
  4017. if (!panel) {
  4018. DSI_ERR("Invalid params\n");
  4019. return -EINVAL;
  4020. }
  4021. mutex_lock(&panel->panel_lock);
  4022. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  4023. if (rc)
  4024. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  4025. panel->name, rc);
  4026. mutex_unlock(&panel->panel_lock);
  4027. return rc;
  4028. }
  4029. int dsi_panel_switch(struct dsi_panel *panel)
  4030. {
  4031. int rc = 0;
  4032. if (!panel) {
  4033. DSI_ERR("Invalid params\n");
  4034. return -EINVAL;
  4035. }
  4036. mutex_lock(&panel->panel_lock);
  4037. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  4038. if (rc)
  4039. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  4040. panel->name, rc);
  4041. mutex_unlock(&panel->panel_lock);
  4042. return rc;
  4043. }
  4044. int dsi_panel_post_switch(struct dsi_panel *panel)
  4045. {
  4046. int rc = 0;
  4047. if (!panel) {
  4048. DSI_ERR("Invalid params\n");
  4049. return -EINVAL;
  4050. }
  4051. mutex_lock(&panel->panel_lock);
  4052. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  4053. if (rc)
  4054. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  4055. panel->name, rc);
  4056. mutex_unlock(&panel->panel_lock);
  4057. return rc;
  4058. }
  4059. int dsi_panel_enable(struct dsi_panel *panel)
  4060. {
  4061. int rc = 0;
  4062. if (!panel) {
  4063. DSI_ERR("Invalid params\n");
  4064. return -EINVAL;
  4065. }
  4066. mutex_lock(&panel->panel_lock);
  4067. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  4068. if (rc) {
  4069. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  4070. panel->name, rc);
  4071. goto error;
  4072. }
  4073. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4074. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4075. if (rc) {
  4076. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4077. panel->name, rc);
  4078. goto error;
  4079. }
  4080. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4081. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4082. if (rc) {
  4083. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4084. panel->name, rc);
  4085. goto error;
  4086. }
  4087. }
  4088. panel->panel_initialized = true;
  4089. error:
  4090. mutex_unlock(&panel->panel_lock);
  4091. return rc;
  4092. }
  4093. int dsi_panel_post_enable(struct dsi_panel *panel)
  4094. {
  4095. int rc = 0;
  4096. if (!panel) {
  4097. DSI_ERR("invalid params\n");
  4098. return -EINVAL;
  4099. }
  4100. mutex_lock(&panel->panel_lock);
  4101. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4102. if (rc) {
  4103. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4104. panel->name, rc);
  4105. goto error;
  4106. }
  4107. error:
  4108. mutex_unlock(&panel->panel_lock);
  4109. return rc;
  4110. }
  4111. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4112. {
  4113. int rc = 0;
  4114. if (!panel) {
  4115. DSI_ERR("invalid params\n");
  4116. return -EINVAL;
  4117. }
  4118. mutex_lock(&panel->panel_lock);
  4119. if (gpio_is_valid(panel->bl_config.en_gpio))
  4120. gpio_set_value(panel->bl_config.en_gpio, 0);
  4121. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4122. if (rc) {
  4123. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4124. panel->name, rc);
  4125. goto error;
  4126. }
  4127. error:
  4128. mutex_unlock(&panel->panel_lock);
  4129. return rc;
  4130. }
  4131. int dsi_panel_disable(struct dsi_panel *panel)
  4132. {
  4133. int rc = 0;
  4134. if (!panel) {
  4135. DSI_ERR("invalid params\n");
  4136. return -EINVAL;
  4137. }
  4138. mutex_lock(&panel->panel_lock);
  4139. /* Avoid sending panel off commands when ESD recovery is underway */
  4140. if (!atomic_read(&panel->esd_recovery_pending)) {
  4141. /*
  4142. * Need to set IBB/AB regulator mode to STANDBY,
  4143. * if panel is going off from AOD mode.
  4144. */
  4145. if (dsi_panel_is_type_oled(panel) &&
  4146. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4147. panel->power_mode == SDE_MODE_DPMS_LP2))
  4148. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4149. "ibb", REGULATOR_MODE_STANDBY);
  4150. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4151. if (rc) {
  4152. /*
  4153. * Sending panel off commands may fail when DSI
  4154. * controller is in a bad state. These failures can be
  4155. * ignored since controller will go for full reset on
  4156. * subsequent display enable anyway.
  4157. */
  4158. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4159. panel->name, rc);
  4160. rc = 0;
  4161. }
  4162. }
  4163. panel->panel_initialized = false;
  4164. panel->power_mode = SDE_MODE_DPMS_OFF;
  4165. mutex_unlock(&panel->panel_lock);
  4166. return rc;
  4167. }
  4168. int dsi_panel_unprepare(struct dsi_panel *panel)
  4169. {
  4170. int rc = 0;
  4171. if (!panel) {
  4172. DSI_ERR("invalid params\n");
  4173. return -EINVAL;
  4174. }
  4175. mutex_lock(&panel->panel_lock);
  4176. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4177. if (rc) {
  4178. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4179. panel->name, rc);
  4180. goto error;
  4181. }
  4182. error:
  4183. mutex_unlock(&panel->panel_lock);
  4184. return rc;
  4185. }
  4186. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4187. {
  4188. int rc = 0;
  4189. if (!panel) {
  4190. DSI_ERR("invalid params\n");
  4191. return -EINVAL;
  4192. }
  4193. mutex_lock(&panel->panel_lock);
  4194. rc = dsi_panel_power_off(panel);
  4195. if (rc) {
  4196. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4197. panel->name, rc);
  4198. goto error;
  4199. }
  4200. error:
  4201. mutex_unlock(&panel->panel_lock);
  4202. return rc;
  4203. }