dp_rx_mon_status.c 58 KB

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  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline void
  35. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  36. struct hal_rx_ppdu_info *ppdu_info,
  37. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  38. #ifndef QCA_SUPPORT_FULL_MON
  39. /**
  40. * dp_rx_mon_process () - Core brain processing for monitor mode
  41. *
  42. * This API processes monitor destination ring followed by monitor status ring
  43. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  44. *
  45. * @soc: datapath soc context
  46. * @mac_id: mac_id on which interrupt is received
  47. * @quota: Number of status ring entry that can be serviced in one shot.
  48. *
  49. * @Return: Number of reaped status ring entries
  50. */
  51. static inline uint32_t
  52. dp_rx_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  53. {
  54. return quota;
  55. }
  56. #endif
  57. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  58. #include "dp_rx_mon_feature.h"
  59. #else
  60. static QDF_STATUS
  61. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  62. struct hal_rx_ppdu_info *ppdu_info)
  63. {
  64. return QDF_STATUS_SUCCESS;
  65. }
  66. static void
  67. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  68. qdf_nbuf_t status_nbuf,
  69. struct hal_rx_ppdu_info *ppdu_info,
  70. bool *nbuf_used)
  71. {
  72. }
  73. #endif
  74. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  75. #include "dp_rx_mon_feature.h"
  76. #else
  77. static QDF_STATUS
  78. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  79. struct dp_pdev *pdev,
  80. struct hal_rx_ppdu_info *ppdu_info)
  81. {
  82. return QDF_STATUS_SUCCESS;
  83. }
  84. #endif
  85. #ifdef FEATURE_PERPKT_INFO
  86. static inline void
  87. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  88. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  89. {
  90. uint8_t chain, bw;
  91. int8_t rssi;
  92. for (chain = 0; chain < SS_COUNT; chain++) {
  93. for (bw = 0; bw < MAX_BW; bw++) {
  94. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  95. if (rssi != DP_RSSI_INVAL)
  96. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  97. else
  98. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  99. }
  100. }
  101. }
  102. /*
  103. * dp_rx_populate_su_evm_details() - Populate su evm info
  104. * @ppdu_info: ppdu info structure from ppdu ring
  105. * @cdp_rx_ppdu: rx ppdu indication structure
  106. */
  107. static inline void
  108. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  109. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  110. {
  111. uint8_t pilot_evm;
  112. uint8_t nss_count;
  113. uint8_t pilot_count;
  114. nss_count = ppdu_info->evm_info.nss_count;
  115. pilot_count = ppdu_info->evm_info.pilot_count;
  116. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  117. qdf_err("pilot evm count is more than expected");
  118. return;
  119. }
  120. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  121. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  122. /* Populate evm for pilot_evm = nss_count*pilot_count */
  123. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  124. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  125. ppdu_info->evm_info.pilot_evm[pilot_evm];
  126. }
  127. }
  128. /**
  129. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  130. * @pdev: pdev ctx
  131. * @rx_user_status: mon rx user status
  132. *
  133. * Return: bool
  134. */
  135. static inline bool
  136. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  137. struct mon_rx_user_status *rx_user_status)
  138. {
  139. uint32_t ru_size;
  140. bool is_data;
  141. ru_size = rx_user_status->ofdma_ru_size;
  142. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  143. DP_STATS_INC(pdev,
  144. ul_ofdma.data_rx_ru_size[ru_size], 1);
  145. is_data = true;
  146. } else {
  147. DP_STATS_INC(pdev,
  148. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  149. is_data = false;
  150. }
  151. return is_data;
  152. }
  153. /**
  154. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  155. * @pdev: pdev ctx
  156. * @ppdu_info: ppdu info structure from ppdu ring
  157. * @cdp_rx_ppdu: Rx PPDU indication structure
  158. *
  159. * Return: none
  160. */
  161. static inline void
  162. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  163. struct hal_rx_ppdu_info *ppdu_info,
  164. struct cdp_rx_indication_ppdu
  165. *cdp_rx_ppdu)
  166. {
  167. struct dp_peer *peer;
  168. struct dp_soc *soc = pdev->soc;
  169. struct dp_ast_entry *ast_entry;
  170. uint32_t ast_index;
  171. int i;
  172. struct mon_rx_user_status *rx_user_status;
  173. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  174. int ru_size;
  175. bool is_data = false;
  176. uint32_t num_users;
  177. num_users = ppdu_info->com_info.num_users;
  178. for (i = 0; i < num_users; i++) {
  179. if (i > OFDMA_NUM_USERS)
  180. return;
  181. rx_user_status = &ppdu_info->rx_user_status[i];
  182. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  183. ast_index = rx_user_status->ast_index;
  184. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  185. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  186. continue;
  187. }
  188. ast_entry = soc->ast_table[ast_index];
  189. if (!ast_entry) {
  190. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  191. continue;
  192. }
  193. peer = ast_entry->peer;
  194. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  195. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  196. continue;
  197. }
  198. rx_stats_peruser->first_data_seq_ctrl =
  199. rx_user_status->first_data_seq_ctrl;
  200. rx_stats_peruser->frame_control_info_valid =
  201. rx_user_status->frame_control_info_valid;
  202. rx_stats_peruser->frame_control =
  203. rx_user_status->frame_control;
  204. rx_stats_peruser->tcp_msdu_count =
  205. rx_user_status->tcp_msdu_count;
  206. rx_stats_peruser->udp_msdu_count =
  207. rx_user_status->udp_msdu_count;
  208. rx_stats_peruser->other_msdu_count =
  209. rx_user_status->other_msdu_count;
  210. rx_stats_peruser->num_msdu =
  211. rx_stats_peruser->tcp_msdu_count +
  212. rx_stats_peruser->udp_msdu_count +
  213. rx_stats_peruser->other_msdu_count;
  214. rx_stats_peruser->preamble_type =
  215. rx_user_status->preamble_type;
  216. rx_stats_peruser->mpdu_cnt_fcs_ok =
  217. rx_user_status->mpdu_cnt_fcs_ok;
  218. rx_stats_peruser->mpdu_cnt_fcs_err =
  219. rx_user_status->mpdu_cnt_fcs_err;
  220. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  221. &rx_user_status->mpdu_fcs_ok_bitmap,
  222. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  223. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  224. rx_stats_peruser->mpdu_ok_byte_count =
  225. rx_user_status->mpdu_ok_byte_count;
  226. rx_stats_peruser->mpdu_err_byte_count =
  227. rx_user_status->mpdu_err_byte_count;
  228. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  229. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  230. rx_stats_peruser->retries =
  231. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  232. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  233. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  234. rx_stats_peruser->is_ampdu = 1;
  235. else
  236. rx_stats_peruser->is_ampdu = 0;
  237. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  238. qdf_mem_copy(rx_stats_peruser->mac_addr,
  239. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  240. rx_stats_peruser->peer_id = peer->peer_ids[0];
  241. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  242. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  243. rx_stats_peruser->mu_ul_info_valid = 0;
  244. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  245. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  246. if (rx_user_status->mu_ul_info_valid) {
  247. rx_stats_peruser->nss = rx_user_status->nss;
  248. rx_stats_peruser->mcs = rx_user_status->mcs;
  249. rx_stats_peruser->mu_ul_info_valid =
  250. rx_user_status->mu_ul_info_valid;
  251. rx_stats_peruser->ofdma_ru_start_index =
  252. rx_user_status->ofdma_ru_start_index;
  253. rx_stats_peruser->ofdma_ru_width =
  254. rx_user_status->ofdma_ru_width;
  255. rx_stats_peruser->user_index = i;
  256. ru_size = rx_user_status->ofdma_ru_size;
  257. /*
  258. * max RU size will be equal to
  259. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  260. */
  261. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  262. dp_err("invalid ru_size %d\n",
  263. ru_size);
  264. return;
  265. }
  266. is_data = dp_rx_inc_rusize_cnt(pdev,
  267. rx_user_status);
  268. }
  269. if (is_data) {
  270. /* counter to get number of MU OFDMA */
  271. pdev->stats.ul_ofdma.data_rx_ppdu++;
  272. pdev->stats.ul_ofdma.data_users[num_users]++;
  273. }
  274. }
  275. }
  276. }
  277. /**
  278. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  279. * @pdev: pdev ctx
  280. * @ppdu_info: ppdu info structure from ppdu ring
  281. * @cdp_rx_ppdu: Rx PPDU indication structure
  282. *
  283. * Return: none
  284. */
  285. static inline void
  286. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  287. struct hal_rx_ppdu_info *ppdu_info,
  288. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  289. {
  290. struct dp_peer *peer;
  291. struct dp_soc *soc = pdev->soc;
  292. struct dp_ast_entry *ast_entry;
  293. uint32_t ast_index;
  294. uint32_t i;
  295. cdp_rx_ppdu->first_data_seq_ctrl =
  296. ppdu_info->rx_status.first_data_seq_ctrl;
  297. cdp_rx_ppdu->frame_ctrl =
  298. ppdu_info->rx_status.frame_control;
  299. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  300. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  301. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  302. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  303. /* num mpdu is consolidated and added together in num user loop */
  304. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  305. /* num msdu is consolidated and added together in num user loop */
  306. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  307. cdp_rx_ppdu->udp_msdu_count +
  308. cdp_rx_ppdu->other_msdu_count);
  309. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  310. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  311. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  312. cdp_rx_ppdu->is_ampdu = 1;
  313. else
  314. cdp_rx_ppdu->is_ampdu = 0;
  315. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  316. ast_index = ppdu_info->rx_status.ast_index;
  317. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  318. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  319. cdp_rx_ppdu->num_users = 0;
  320. goto end;
  321. }
  322. ast_entry = soc->ast_table[ast_index];
  323. if (!ast_entry) {
  324. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  325. cdp_rx_ppdu->num_users = 0;
  326. goto end;
  327. }
  328. peer = ast_entry->peer;
  329. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  330. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  331. cdp_rx_ppdu->num_users = 0;
  332. goto end;
  333. }
  334. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  335. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  336. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  337. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  338. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  339. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  340. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  341. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  342. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  343. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  344. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  345. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  346. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  347. else
  348. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  349. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  350. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  351. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  352. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  353. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  354. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  355. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  356. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  357. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  358. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  359. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  360. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  361. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  362. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  363. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  364. for (i = 0; i < MAX_CHAIN; i++)
  365. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  366. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  367. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  368. cdp_rx_ppdu->num_mpdu = 0;
  369. cdp_rx_ppdu->num_msdu = 0;
  370. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  371. return;
  372. end:
  373. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  374. }
  375. #else
  376. static inline void
  377. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  378. struct hal_rx_ppdu_info *ppdu_info,
  379. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  380. {
  381. }
  382. #endif
  383. /**
  384. * dp_rx_stats_update() - Update per-peer statistics
  385. * @soc: Datapath SOC handle
  386. * @peer: Datapath peer handle
  387. * @ppdu: PPDU Descriptor
  388. *
  389. * Return: None
  390. */
  391. #ifdef FEATURE_PERPKT_INFO
  392. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  393. struct cdp_rx_indication_ppdu *ppdu,
  394. uint32_t user)
  395. {
  396. uint32_t ratekbps = 0;
  397. uint32_t ppdu_rx_rate = 0;
  398. uint32_t nss = 0;
  399. uint8_t mcs = 0;
  400. uint32_t rix;
  401. uint16_t ratecode;
  402. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  403. if (!peer || !ppdu)
  404. return;
  405. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  406. ppdu_user = &ppdu->user[user];
  407. if (ppdu_user->nss == 0)
  408. nss = 0;
  409. else
  410. nss = ppdu_user->nss - 1;
  411. mcs = ppdu_user->mcs;
  412. } else {
  413. mcs = ppdu->u.mcs;
  414. nss = ppdu->u.nss;
  415. }
  416. ratekbps = dp_getrateindex(ppdu->u.gi,
  417. mcs,
  418. nss,
  419. ppdu->u.preamble,
  420. ppdu->u.bw,
  421. &rix,
  422. &ratecode);
  423. if (!ratekbps)
  424. return;
  425. ppdu->rix = rix;
  426. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  427. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  428. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  429. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  430. ppdu->rx_ratekbps = ratekbps;
  431. ppdu->rx_ratecode = ratecode;
  432. if (peer->vdev)
  433. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  434. }
  435. static void dp_rx_stats_update(struct dp_pdev *pdev,
  436. struct cdp_rx_indication_ppdu *ppdu)
  437. {
  438. struct dp_soc *soc = NULL;
  439. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  440. uint16_t num_msdu;
  441. uint8_t pkt_bw_offset;
  442. struct dp_peer *peer;
  443. struct cdp_rx_stats_ppdu_user *ppdu_user;
  444. uint32_t i;
  445. enum cdp_mu_packet_type mu_pkt_type;
  446. if (pdev)
  447. soc = pdev->soc;
  448. else
  449. return;
  450. if (!soc || soc->process_rx_status)
  451. return;
  452. preamble = ppdu->u.preamble;
  453. ppdu_type = ppdu->u.ppdu_type;
  454. for (i = 0; i < ppdu->num_users; i++) {
  455. ppdu_user = &ppdu->user[i];
  456. peer = dp_peer_find_by_id(soc, ppdu_user->peer_id);
  457. if (!peer)
  458. peer = pdev->invalid_peer;
  459. ppdu->cookie = (void *)peer->wlanstats_ctx;
  460. if (ppdu_type == HAL_RX_TYPE_SU) {
  461. mcs = ppdu->u.mcs;
  462. nss = ppdu->u.nss;
  463. } else {
  464. mcs = ppdu_user->mcs;
  465. nss = ppdu_user->nss;
  466. }
  467. num_msdu = ppdu_user->num_msdu;
  468. switch (ppdu->u.bw) {
  469. case CMN_BW_20MHZ:
  470. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  471. break;
  472. case CMN_BW_40MHZ:
  473. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  474. break;
  475. case CMN_BW_80MHZ:
  476. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  477. break;
  478. case CMN_BW_160MHZ:
  479. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  480. break;
  481. default:
  482. pkt_bw_offset = 0;
  483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  484. "Invalid BW index = %d", ppdu->u.bw);
  485. }
  486. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  487. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  488. peer->stats.rx.avg_rssi =
  489. CDP_RSSI_IN(peer->stats.rx.rssi);
  490. else
  491. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  492. peer->stats.rx.rssi);
  493. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  494. nss = 1;
  495. if (ppdu_type == HAL_RX_TYPE_SU) {
  496. if (nss) {
  497. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  498. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  499. }
  500. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  501. ppdu_user->mpdu_cnt_fcs_ok);
  502. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  503. ppdu_user->mpdu_cnt_fcs_err);
  504. }
  505. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  506. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  507. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  508. mu_pkt_type = RX_TYPE_MU_MIMO;
  509. else
  510. mu_pkt_type = RX_TYPE_MU_OFDMA;
  511. if (nss) {
  512. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  513. DP_STATS_INC(peer,
  514. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  515. 1);
  516. }
  517. DP_STATS_INC(peer,
  518. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  519. ppdu_user->mpdu_cnt_fcs_ok);
  520. DP_STATS_INC(peer,
  521. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  522. ppdu_user->mpdu_cnt_fcs_err);
  523. }
  524. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  525. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  526. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  527. num_msdu);
  528. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  529. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  530. ppdu_user->is_ampdu);
  531. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  532. !(ppdu_user->is_ampdu));
  533. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  534. DP_STATS_INCC(peer,
  535. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  536. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  537. DP_STATS_INCC(peer,
  538. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  539. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  540. DP_STATS_INCC(peer,
  541. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  542. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  543. DP_STATS_INCC(peer,
  544. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  545. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  546. DP_STATS_INCC(peer,
  547. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  548. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  549. DP_STATS_INCC(peer,
  550. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  551. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  552. DP_STATS_INCC(peer,
  553. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  554. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  555. DP_STATS_INCC(peer,
  556. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  557. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  558. DP_STATS_INCC(peer,
  559. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  560. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  561. DP_STATS_INCC(peer,
  562. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  563. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  564. DP_STATS_INCC(peer,
  565. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  566. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  567. (ppdu_type == HAL_RX_TYPE_SU)));
  568. DP_STATS_INCC(peer,
  569. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  570. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  571. (ppdu_type == HAL_RX_TYPE_SU)));
  572. DP_STATS_INCC(peer,
  573. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  574. 1, ((mcs >= (MAX_MCS - 1)) &&
  575. (preamble == DOT11_AX) &&
  576. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  577. DP_STATS_INCC(peer,
  578. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  579. 1, ((mcs < (MAX_MCS - 1)) &&
  580. (preamble == DOT11_AX) &&
  581. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  582. DP_STATS_INCC(peer,
  583. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  584. 1, ((mcs >= (MAX_MCS - 1)) &&
  585. (preamble == DOT11_AX) &&
  586. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  587. DP_STATS_INCC(peer,
  588. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  589. 1, ((mcs < (MAX_MCS - 1)) &&
  590. (preamble == DOT11_AX) &&
  591. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  592. /*
  593. * If invalid TID, it could be a non-qos frame, hence do not
  594. * update any AC counters
  595. */
  596. ac = TID_TO_WME_AC(ppdu_user->tid);
  597. if (ppdu->tid != HAL_TID_INVALID)
  598. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  599. dp_peer_stats_notify(pdev, peer);
  600. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  601. if (peer == pdev->invalid_peer)
  602. continue;
  603. if (dp_is_subtype_data(ppdu->frame_ctrl))
  604. dp_rx_rate_stats_update(peer, ppdu, i);
  605. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  606. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  607. &peer->stats, ppdu->peer_id,
  608. UPDATE_PEER_STATS, pdev->pdev_id);
  609. #endif
  610. dp_peer_unref_del_find_by_id(peer);
  611. }
  612. }
  613. #endif
  614. /*
  615. * dp_rx_get_fcs_ok_msdu() - get ppdu status buffer containing fcs_ok msdu
  616. * @pdev: pdev object
  617. * @ppdu_info: ppdu info object
  618. *
  619. * Return: nbuf
  620. */
  621. static inline qdf_nbuf_t
  622. dp_rx_get_fcs_ok_msdu(struct dp_pdev *pdev,
  623. struct hal_rx_ppdu_info *ppdu_info)
  624. {
  625. uint16_t mpdu_fcs_ok;
  626. qdf_nbuf_t status_nbuf = NULL;
  627. unsigned long *fcs_ok_bitmap;
  628. if (qdf_unlikely(qdf_nbuf_is_queue_empty(&pdev->rx_ppdu_buf_q)))
  629. return NULL;
  630. /* Obtain fcs_ok passed index from bitmap
  631. * this index is used to get fcs passed first msdu payload
  632. */
  633. fcs_ok_bitmap =
  634. (unsigned long *)&ppdu_info->com_info.mpdu_fcs_ok_bitmap[0];
  635. mpdu_fcs_ok = qdf_find_first_bit(fcs_ok_bitmap,
  636. HAL_RX_MAX_MPDU);
  637. if (qdf_unlikely(mpdu_fcs_ok >= HAL_RX_MAX_MPDU))
  638. goto end;
  639. if (qdf_unlikely(!ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf))
  640. goto end;
  641. /* Get status buffer by indexing mpdu_fcs_ok index
  642. * containing first msdu payload with fcs passed
  643. * and clone the buffer
  644. */
  645. status_nbuf = ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf;
  646. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf = NULL;
  647. /* Take ref of status nbuf as this nbuf is to be
  648. * freeed by upper layer.
  649. */
  650. qdf_nbuf_ref(status_nbuf);
  651. ppdu_info->fcs_ok_msdu_info.first_msdu_payload =
  652. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].first_msdu_payload;
  653. ppdu_info->fcs_ok_msdu_info.payload_len =
  654. ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].payload_len;
  655. end:
  656. /* Free the ppdu status buffer queue */
  657. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  658. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  659. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  660. ppdu_info->com_info.mpdu_cnt_fcs_err)
  661. * sizeof(struct hal_rx_msdu_payload_info));
  662. return status_nbuf;
  663. }
  664. static inline void
  665. dp_rx_handle_ppdu_status_buf(struct dp_pdev *pdev,
  666. struct hal_rx_ppdu_info *ppdu_info,
  667. qdf_nbuf_t status_nbuf)
  668. {
  669. qdf_nbuf_t dropnbuf;
  670. if (qdf_nbuf_queue_len(&pdev->rx_ppdu_buf_q) >
  671. HAL_RX_MAX_MPDU) {
  672. dropnbuf = qdf_nbuf_queue_remove(&pdev->rx_ppdu_buf_q);
  673. qdf_nbuf_free(dropnbuf);
  674. }
  675. qdf_nbuf_queue_add(&pdev->rx_ppdu_buf_q, status_nbuf);
  676. }
  677. /**
  678. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  679. * @soc: core txrx main context
  680. * @pdev: pdev strcuture
  681. * @ppdu_info: structure for rx ppdu ring
  682. *
  683. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  684. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  685. */
  686. #ifdef FEATURE_PERPKT_INFO
  687. static inline QDF_STATUS
  688. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  689. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  690. {
  691. uint8_t size = 0;
  692. struct ieee80211_frame *wh;
  693. uint32_t *nbuf_data;
  694. if (!ppdu_info->fcs_ok_msdu_info.first_msdu_payload)
  695. return QDF_STATUS_SUCCESS;
  696. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  697. return QDF_STATUS_SUCCESS;
  698. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  699. wh = (struct ieee80211_frame *)
  700. (ppdu_info->fcs_ok_msdu_info.first_msdu_payload + 4);
  701. size = (ppdu_info->fcs_ok_msdu_info.first_msdu_payload -
  702. qdf_nbuf_data(nbuf));
  703. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  704. return QDF_STATUS_SUCCESS;
  705. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  706. IEEE80211_FC0_TYPE_MGT) ||
  707. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  708. IEEE80211_FC0_TYPE_CTL)) {
  709. return QDF_STATUS_SUCCESS;
  710. }
  711. ppdu_info->fcs_ok_msdu_info.first_msdu_payload = NULL;
  712. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  713. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  714. /* only retain RX MSDU payload in the skb */
  715. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  716. ppdu_info->fcs_ok_msdu_info.payload_len);
  717. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  718. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  719. return QDF_STATUS_E_ALREADY;
  720. }
  721. #else
  722. static inline QDF_STATUS
  723. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  724. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  725. {
  726. return QDF_STATUS_SUCCESS;
  727. }
  728. #endif
  729. #ifdef FEATURE_PERPKT_INFO
  730. static inline void
  731. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  732. struct hal_rx_ppdu_info *ppdu_info,
  733. uint32_t tlv_status,
  734. qdf_nbuf_t status_nbuf)
  735. {
  736. QDF_STATUS mcopy_status;
  737. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt)) {
  738. qdf_nbuf_free(status_nbuf);
  739. return;
  740. }
  741. /* Add buffers to queue until we receive
  742. * HAL_TLV_STATUS_PPDU_DONE
  743. */
  744. dp_rx_handle_ppdu_status_buf(pdev, ppdu_info, status_nbuf);
  745. /* If tlv_status is PPDU_DONE, process rx_ppdu_buf_q
  746. * and devliver fcs_ok msdu buffer
  747. */
  748. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  749. if (qdf_unlikely(ppdu_info->com_info.mpdu_cnt !=
  750. (ppdu_info->com_info.mpdu_cnt_fcs_ok +
  751. ppdu_info->com_info.mpdu_cnt_fcs_err))) {
  752. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  753. return;
  754. }
  755. /* Get rx ppdu status buffer having fcs ok msdu */
  756. status_nbuf = dp_rx_get_fcs_ok_msdu(pdev, ppdu_info);
  757. if (status_nbuf) {
  758. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  759. ppdu_info,
  760. status_nbuf);
  761. if (mcopy_status == QDF_STATUS_SUCCESS)
  762. qdf_nbuf_free(status_nbuf);
  763. }
  764. }
  765. }
  766. #else
  767. static inline void
  768. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  769. struct hal_rx_ppdu_info *ppdu_info,
  770. uint32_t tlv_status,
  771. qdf_nbuf_t status_nbuf)
  772. {
  773. }
  774. #endif
  775. /**
  776. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  777. * @soc: Datapath SOC handle
  778. * @pdev: Datapath PDEV handle
  779. * @ppdu_info: Structure for rx ppdu info
  780. * @nbuf: Qdf nbuf abstraction for linux skb
  781. *
  782. * Return: 0 on success, 1 on failure
  783. */
  784. static inline int
  785. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  786. struct hal_rx_ppdu_info *ppdu_info,
  787. qdf_nbuf_t nbuf)
  788. {
  789. uint8_t size = 0;
  790. if (!pdev->monitor_vdev) {
  791. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  792. "[%s]:[%d] Monitor vdev is NULL !!",
  793. __func__, __LINE__);
  794. return 1;
  795. }
  796. if (!ppdu_info->msdu_info.first_msdu_payload) {
  797. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  798. "[%s]:[%d] First msdu payload not present",
  799. __func__, __LINE__);
  800. return 1;
  801. }
  802. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  803. size = (ppdu_info->msdu_info.first_msdu_payload -
  804. qdf_nbuf_data(nbuf)) + 4;
  805. ppdu_info->msdu_info.first_msdu_payload = NULL;
  806. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  807. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  808. "[%s]:[%d] No header present",
  809. __func__, __LINE__);
  810. return 1;
  811. }
  812. /* Only retain RX MSDU payload in the skb */
  813. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  814. ppdu_info->msdu_info.payload_len);
  815. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  816. qdf_nbuf_headroom(nbuf))) {
  817. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  818. return 1;
  819. }
  820. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  821. nbuf, NULL);
  822. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  823. return 0;
  824. }
  825. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  826. /*
  827. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  828. * the PPDU received, this will be used for correlation of CFR data captured
  829. * for an UL-MU-PPDU
  830. * @pdev: pdev ctx
  831. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  832. * @cdp_rx_ppdu: Rx PPDU indication structure
  833. *
  834. * Return: none
  835. */
  836. static inline void
  837. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  838. struct hal_rx_ppdu_info *ppdu_info,
  839. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  840. {
  841. struct dp_peer *peer;
  842. struct dp_soc *soc = pdev->soc;
  843. struct dp_ast_entry *ast_entry;
  844. struct mon_rx_user_status *rx_user_status;
  845. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  846. uint32_t num_users;
  847. int user_id;
  848. uint32_t ast_index;
  849. qdf_spin_lock_bh(&soc->ast_lock);
  850. num_users = ppdu_info->com_info.num_users;
  851. for (user_id = 0; user_id < num_users; user_id++) {
  852. if (user_id > OFDMA_NUM_USERS) {
  853. qdf_spin_unlock_bh(&soc->ast_lock);
  854. return;
  855. }
  856. rx_user_status = &ppdu_info->rx_user_status[user_id];
  857. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  858. ast_index = rx_user_status->ast_index;
  859. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  860. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  861. continue;
  862. }
  863. ast_entry = soc->ast_table[ast_index];
  864. if (!ast_entry) {
  865. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  866. continue;
  867. }
  868. peer = ast_entry->peer;
  869. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  870. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  871. continue;
  872. }
  873. qdf_mem_copy(rx_stats_peruser->mac_addr,
  874. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  875. }
  876. qdf_spin_unlock_bh(&soc->ast_lock);
  877. }
  878. /*
  879. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  880. * info
  881. * @pdev: pdev ctx
  882. * @ppdu_info: ppdu info structure from ppdu ring
  883. * @cdp_rx_ppdu : Rx PPDU indication structure
  884. *
  885. * Return: none
  886. */
  887. static inline void
  888. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  889. struct hal_rx_ppdu_info *ppdu_info,
  890. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  891. {
  892. int chain;
  893. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  894. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  895. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  896. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  897. for (chain = 0; chain < MAX_CHAIN; chain++)
  898. cdp_rx_ppdu->per_chain_rssi[chain] =
  899. ppdu_info->rx_status.rssi[chain];
  900. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  901. }
  902. /**
  903. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  904. * @pdev: pdev ctx
  905. *
  906. * Return: True or False
  907. */
  908. static inline bool
  909. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  910. {
  911. return pdev->cfr_rcc_mode;
  912. }
  913. /*
  914. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  915. * @pdev: pdev ctx
  916. * @ppdu_info: ppdu info structure from ppdu ring
  917. * @cdp_rx_ppdu: Rx PPDU indication structure
  918. *
  919. * Return: none
  920. */
  921. static inline void
  922. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  923. struct hal_rx_ppdu_info *ppdu_info,
  924. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  925. {
  926. struct cdp_rx_ppdu_cfr_info *cfr_info;
  927. if (!dp_cfr_rcc_mode_status(pdev))
  928. return;
  929. cfr_info = &cdp_rx_ppdu->cfr_info;
  930. cfr_info->bb_captured_channel
  931. = ppdu_info->cfr_info.bb_captured_channel;
  932. cfr_info->bb_captured_timeout
  933. = ppdu_info->cfr_info.bb_captured_timeout;
  934. cfr_info->bb_captured_reason
  935. = ppdu_info->cfr_info.bb_captured_reason;
  936. cfr_info->rx_location_info_valid
  937. = ppdu_info->cfr_info.rx_location_info_valid;
  938. cfr_info->chan_capture_status
  939. = ppdu_info->cfr_info.chan_capture_status;
  940. cfr_info->rtt_che_buffer_pointer_high8
  941. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  942. cfr_info->rtt_che_buffer_pointer_low32
  943. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  944. }
  945. /**
  946. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  947. * @pdev: pdev structure
  948. * @ppdu_info: structure for rx ppdu ring
  949. *
  950. * Return: none
  951. */
  952. static inline void
  953. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  954. struct hal_rx_ppdu_info *ppdu_info)
  955. {
  956. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  957. DP_STATS_INC(pdev,
  958. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  959. if (cfr->rx_location_info_valid) {
  960. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  961. if (cfr->bb_captured_channel) {
  962. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  963. DP_STATS_INC(pdev,
  964. rcc.reason_cnt[cfr->bb_captured_reason],
  965. 1);
  966. } else if (cfr->bb_captured_timeout) {
  967. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  968. DP_STATS_INC(pdev,
  969. rcc.reason_cnt[cfr->bb_captured_reason],
  970. 1);
  971. }
  972. }
  973. }
  974. /*
  975. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  976. * @soc: core txrx main context
  977. * @pdev: pdev ctx
  978. * @ppdu_info: ppdu info structure from ppdu ring
  979. *
  980. * Return: none
  981. */
  982. static inline void
  983. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  984. struct hal_rx_ppdu_info *ppdu_info)
  985. {
  986. qdf_nbuf_t ppdu_nbuf;
  987. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  988. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  989. if (!ppdu_info->cfr_info.bb_captured_channel)
  990. return;
  991. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  992. sizeof(struct cdp_rx_indication_ppdu),
  993. 0,
  994. 0,
  995. FALSE);
  996. if (ppdu_nbuf) {
  997. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  998. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  999. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1000. qdf_nbuf_put_tail(ppdu_nbuf,
  1001. sizeof(struct cdp_rx_indication_ppdu));
  1002. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1003. ppdu_nbuf, HTT_INVALID_PEER,
  1004. WDI_NO_VAL, pdev->pdev_id);
  1005. }
  1006. }
  1007. /**
  1008. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1009. * non-associated stations
  1010. * @pdev: pdev ctx
  1011. * @ppdu_info: ppdu info structure from ppdu ring
  1012. * @cdp_rx_ppdu: Rx PPDU indication structure
  1013. *
  1014. * Return: none
  1015. */
  1016. static inline void
  1017. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1018. struct hal_rx_ppdu_info *ppdu_info,
  1019. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1020. {
  1021. if (!dp_cfr_rcc_mode_status(pdev))
  1022. return;
  1023. if (ppdu_info->cfr_info.bb_captured_channel)
  1024. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1025. }
  1026. /**
  1027. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1028. * @ppdu_info: structure for rx ppdu ring
  1029. *
  1030. * Return: Success/ Failure
  1031. */
  1032. static inline QDF_STATUS
  1033. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1034. struct hal_rx_ppdu_info *ppdu_info)
  1035. {
  1036. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1037. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1038. if (dp_cfr_rcc_mode_status(pdev)) {
  1039. if (cfr->bb_captured_channel)
  1040. status = QDF_STATUS_SUCCESS;
  1041. }
  1042. return status;
  1043. }
  1044. #else
  1045. static inline void
  1046. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1047. struct hal_rx_ppdu_info *ppdu_info,
  1048. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1049. {
  1050. }
  1051. static inline void
  1052. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1053. struct hal_rx_ppdu_info *ppdu_info,
  1054. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1055. {
  1056. }
  1057. static inline void
  1058. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1059. struct hal_rx_ppdu_info *ppdu_info,
  1060. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1061. {
  1062. }
  1063. static inline void
  1064. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1065. struct hal_rx_ppdu_info *ppdu_info)
  1066. {
  1067. }
  1068. static inline void
  1069. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1070. struct hal_rx_ppdu_info *ppdu_info,
  1071. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1072. {
  1073. }
  1074. static inline void
  1075. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1076. struct hal_rx_ppdu_info *ppdu_info)
  1077. {
  1078. }
  1079. static inline QDF_STATUS
  1080. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1081. struct hal_rx_ppdu_info *ppdu_info)
  1082. {
  1083. return QDF_STATUS_E_NOSUPPORT;
  1084. }
  1085. static inline bool
  1086. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1087. {
  1088. return false;
  1089. }
  1090. #endif
  1091. /**
  1092. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1093. * @soc: core txrx main context
  1094. * @pdev: pdev strcuture
  1095. * @ppdu_info: structure for rx ppdu ring
  1096. *
  1097. * Return: none
  1098. */
  1099. #ifdef FEATURE_PERPKT_INFO
  1100. static inline void
  1101. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1102. struct hal_rx_ppdu_info *ppdu_info)
  1103. {
  1104. qdf_nbuf_t ppdu_nbuf;
  1105. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1106. /*
  1107. * Do not allocate if fcs error,
  1108. * ast idx invalid / fctl invalid
  1109. *
  1110. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1111. */
  1112. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1113. return;
  1114. if (ppdu_info->nac_info.fc_valid &&
  1115. ppdu_info->nac_info.to_ds_flag &&
  1116. ppdu_info->nac_info.mac_addr2_valid) {
  1117. struct dp_neighbour_peer *peer = NULL;
  1118. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1119. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1120. if (pdev->neighbour_peers_added) {
  1121. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1122. neighbour_peer_list_elem) {
  1123. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1124. &ppdu_info->nac_info.mac_addr2,
  1125. QDF_MAC_ADDR_SIZE)) {
  1126. peer->rssi = rssi;
  1127. break;
  1128. }
  1129. }
  1130. }
  1131. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1132. }
  1133. /* need not generate wdi event when mcopy, cfr rcc mode and
  1134. * enhanced stats are not enabled
  1135. */
  1136. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1137. !dp_cfr_rcc_mode_status(pdev))
  1138. return;
  1139. if (dp_cfr_rcc_mode_status(pdev))
  1140. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1141. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1142. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1143. if (!(pdev->mcopy_mode ||
  1144. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1145. QDF_STATUS_SUCCESS)))
  1146. return;
  1147. }
  1148. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1149. sizeof(struct cdp_rx_indication_ppdu),
  1150. 0, 0, FALSE);
  1151. if (ppdu_nbuf) {
  1152. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1153. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1154. dp_rx_populate_cdp_indication_ppdu(pdev,
  1155. ppdu_info, cdp_rx_ppdu);
  1156. qdf_nbuf_put_tail(ppdu_nbuf,
  1157. sizeof(struct cdp_rx_indication_ppdu));
  1158. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1159. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1160. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1161. soc, ppdu_nbuf,
  1162. cdp_rx_ppdu->peer_id,
  1163. WDI_NO_VAL, pdev->pdev_id);
  1164. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1165. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1166. ppdu_nbuf, HTT_INVALID_PEER,
  1167. WDI_NO_VAL, pdev->pdev_id);
  1168. } else {
  1169. qdf_nbuf_free(ppdu_nbuf);
  1170. }
  1171. }
  1172. }
  1173. #else
  1174. static inline void
  1175. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1176. struct hal_rx_ppdu_info *ppdu_info)
  1177. {
  1178. }
  1179. #endif
  1180. /**
  1181. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1182. * filtering enabled
  1183. * @soc: core txrx main context
  1184. * @ppdu_info: Structure for rx ppdu info
  1185. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1186. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1187. *
  1188. * Return: none
  1189. */
  1190. static inline void
  1191. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1192. struct hal_rx_ppdu_info *ppdu_info,
  1193. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  1194. {
  1195. struct dp_peer *peer;
  1196. struct dp_ast_entry *ast_entry;
  1197. uint32_t ast_index;
  1198. ast_index = ppdu_info->rx_status.ast_index;
  1199. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1200. ast_entry = soc->ast_table[ast_index];
  1201. if (ast_entry) {
  1202. peer = ast_entry->peer;
  1203. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  1204. if (peer->peer_based_pktlog_filter) {
  1205. dp_wdi_event_handler(
  1206. WDI_EVENT_RX_DESC, soc,
  1207. status_nbuf,
  1208. peer->peer_ids[0],
  1209. WDI_NO_VAL, mac_id);
  1210. }
  1211. }
  1212. }
  1213. }
  1214. }
  1215. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1216. static inline void
  1217. dp_rx_ul_ofdma_ru_size_to_width(
  1218. uint32_t ru_size,
  1219. uint32_t *ru_width)
  1220. {
  1221. uint32_t width;
  1222. width = 0;
  1223. switch (ru_size) {
  1224. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1225. width = 1;
  1226. break;
  1227. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1228. width = 2;
  1229. break;
  1230. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1231. width = 4;
  1232. break;
  1233. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1234. width = 9;
  1235. break;
  1236. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1237. width = 18;
  1238. break;
  1239. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1240. width = 37;
  1241. break;
  1242. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1243. width = 74;
  1244. break;
  1245. default:
  1246. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1247. "RU size to width convert err");
  1248. break;
  1249. }
  1250. *ru_width = width;
  1251. }
  1252. static inline void
  1253. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1254. {
  1255. struct mon_rx_user_status *mon_rx_user_status;
  1256. uint32_t num_users;
  1257. uint32_t i;
  1258. uint32_t mu_ul_user_v0_word0;
  1259. uint32_t mu_ul_user_v0_word1;
  1260. uint32_t ru_width;
  1261. uint32_t ru_size;
  1262. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1263. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1264. return;
  1265. num_users = ppdu_info->com_info.num_users;
  1266. if (num_users > HAL_MAX_UL_MU_USERS)
  1267. num_users = HAL_MAX_UL_MU_USERS;
  1268. for (i = 0; i < num_users; i++) {
  1269. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1270. mu_ul_user_v0_word0 =
  1271. mon_rx_user_status->mu_ul_user_v0_word0;
  1272. mu_ul_user_v0_word1 =
  1273. mon_rx_user_status->mu_ul_user_v0_word1;
  1274. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1275. mu_ul_user_v0_word0) &&
  1276. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1277. mu_ul_user_v0_word0)) {
  1278. mon_rx_user_status->mcs =
  1279. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1280. mu_ul_user_v0_word1);
  1281. mon_rx_user_status->nss =
  1282. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1283. mu_ul_user_v0_word1) + 1;
  1284. mon_rx_user_status->mu_ul_info_valid = 1;
  1285. mon_rx_user_status->ofdma_ru_start_index =
  1286. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1287. mu_ul_user_v0_word1);
  1288. ru_size =
  1289. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1290. mu_ul_user_v0_word1);
  1291. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1292. mon_rx_user_status->ofdma_ru_width = ru_width;
  1293. mon_rx_user_status->ofdma_ru_size = ru_size;
  1294. }
  1295. }
  1296. }
  1297. #else
  1298. static inline void
  1299. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1300. {
  1301. }
  1302. #endif
  1303. /**
  1304. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1305. * buffer on Rx status Queue posted by status SRNG processing.
  1306. * @soc: core txrx main context
  1307. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1308. *
  1309. * Return: none
  1310. */
  1311. static inline void
  1312. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  1313. uint32_t quota)
  1314. {
  1315. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1316. struct hal_rx_ppdu_info *ppdu_info;
  1317. qdf_nbuf_t status_nbuf;
  1318. uint8_t *rx_tlv;
  1319. uint8_t *rx_tlv_start;
  1320. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1321. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1322. struct cdp_pdev_mon_stats *rx_mon_stats;
  1323. int smart_mesh_status;
  1324. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1325. bool nbuf_used;
  1326. uint32_t rx_enh_capture_mode;
  1327. if (!pdev) {
  1328. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1329. "pdev is null for mac_id = %d", mac_id);
  1330. return;
  1331. }
  1332. ppdu_info = &pdev->ppdu_info;
  1333. rx_mon_stats = &pdev->rx_mon_stats;
  1334. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1335. return;
  1336. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1337. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1338. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1339. rx_tlv = qdf_nbuf_data(status_nbuf);
  1340. rx_tlv_start = rx_tlv;
  1341. nbuf_used = false;
  1342. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1343. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1344. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1345. do {
  1346. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1347. ppdu_info, pdev->soc->hal_soc,
  1348. status_nbuf);
  1349. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1350. rx_mon_stats);
  1351. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1352. status_nbuf, ppdu_info,
  1353. &nbuf_used);
  1354. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1355. if ((rx_tlv - rx_tlv_start) >=
  1356. RX_DATA_BUFFER_SIZE)
  1357. break;
  1358. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1359. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1360. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1361. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1362. }
  1363. if (pdev->dp_peer_based_pktlog) {
  1364. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1365. status_nbuf, mac_id);
  1366. } else {
  1367. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1368. pktlog_mode = WDI_EVENT_RX_DESC;
  1369. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1370. pktlog_mode = WDI_EVENT_LITE_RX;
  1371. if (pktlog_mode != WDI_NO_VAL)
  1372. dp_wdi_event_handler(pktlog_mode, soc,
  1373. status_nbuf,
  1374. HTT_INVALID_PEER,
  1375. WDI_NO_VAL, mac_id);
  1376. }
  1377. /* smart monitor vap and m_copy cannot co-exist */
  1378. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1379. && pdev->monitor_vdev) {
  1380. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1381. pdev, ppdu_info, status_nbuf);
  1382. if (smart_mesh_status)
  1383. qdf_nbuf_free(status_nbuf);
  1384. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1385. dp_rx_process_mcopy_mode(soc, pdev,
  1386. ppdu_info, tlv_status,
  1387. status_nbuf);
  1388. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1389. if (!nbuf_used)
  1390. qdf_nbuf_free(status_nbuf);
  1391. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1392. enh_log_status =
  1393. dp_rx_handle_enh_capture(soc,
  1394. pdev, ppdu_info);
  1395. } else {
  1396. qdf_nbuf_free(status_nbuf);
  1397. }
  1398. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1399. dp_rx_mon_deliver_non_std(soc, mac_id);
  1400. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1401. rx_mon_stats->status_ppdu_done++;
  1402. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1403. if (pdev->tx_capture_enabled
  1404. != CDP_TX_ENH_CAPTURE_DISABLED)
  1405. dp_send_ack_frame_to_stack(soc, pdev,
  1406. ppdu_info);
  1407. if (pdev->enhanced_stats_en ||
  1408. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1409. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1410. else if (dp_cfr_rcc_mode_status(pdev))
  1411. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1412. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1413. /*
  1414. * if chan_num is not fetched correctly from ppdu RX TLV,
  1415. * get it from pdev saved.
  1416. */
  1417. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1418. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1419. /*
  1420. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1421. * get it from pdev saved.
  1422. */
  1423. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1424. pdev->ppdu_info.rx_status.chan_freq =
  1425. pdev->mon_chan_freq;
  1426. }
  1427. if (qdf_unlikely(soc->full_mon_mode))
  1428. dp_rx_mon_process(soc, mac_id, quota);
  1429. else
  1430. dp_rx_mon_dest_process(soc, mac_id, quota);
  1431. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1432. }
  1433. }
  1434. return;
  1435. }
  1436. /*
  1437. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1438. * post the status ring buffer to Rx status Queue for later
  1439. * processing when status ring is filled with status TLV.
  1440. * Allocate a new buffer to status ring if the filled buffer
  1441. * is posted.
  1442. *
  1443. * @soc: core txrx main context
  1444. * @mac_id: mac_id which is one of 3 mac_ids
  1445. * @quota: No. of ring entry that can be serviced in one shot.
  1446. * Return: uint32_t: No. of ring entry that is processed.
  1447. */
  1448. static inline uint32_t
  1449. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  1450. uint32_t quota)
  1451. {
  1452. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1453. hal_soc_handle_t hal_soc;
  1454. void *mon_status_srng;
  1455. void *rxdma_mon_status_ring_entry;
  1456. QDF_STATUS status;
  1457. uint32_t work_done = 0;
  1458. if (!pdev) {
  1459. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1460. "pdev is null for mac_id = %d", mac_id);
  1461. return work_done;
  1462. }
  1463. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1464. qdf_assert(mon_status_srng);
  1465. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1466. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1467. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1468. __func__, __LINE__, mon_status_srng);
  1469. return work_done;
  1470. }
  1471. hal_soc = soc->hal_soc;
  1472. qdf_assert(hal_soc);
  1473. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  1474. goto done;
  1475. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1476. * BUFFER_ADDR_INFO STRUCT
  1477. */
  1478. while (qdf_likely((rxdma_mon_status_ring_entry =
  1479. hal_srng_src_peek(hal_soc, mon_status_srng))
  1480. && quota--)) {
  1481. uint32_t rx_buf_cookie;
  1482. qdf_nbuf_t status_nbuf;
  1483. struct dp_rx_desc *rx_desc;
  1484. uint8_t *status_buf;
  1485. qdf_dma_addr_t paddr;
  1486. uint64_t buf_addr;
  1487. buf_addr =
  1488. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1489. rxdma_mon_status_ring_entry) |
  1490. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1491. rxdma_mon_status_ring_entry)) << 32));
  1492. if (qdf_likely(buf_addr)) {
  1493. rx_buf_cookie =
  1494. HAL_RX_BUF_COOKIE_GET(
  1495. rxdma_mon_status_ring_entry);
  1496. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1497. rx_buf_cookie);
  1498. qdf_assert(rx_desc);
  1499. status_nbuf = rx_desc->nbuf;
  1500. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1501. QDF_DMA_FROM_DEVICE);
  1502. status_buf = qdf_nbuf_data(status_nbuf);
  1503. status = hal_get_rx_status_done(status_buf);
  1504. if (status != QDF_STATUS_SUCCESS) {
  1505. uint32_t hp, tp;
  1506. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1507. &tp, &hp);
  1508. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1509. hp, tp);
  1510. pdev->rx_mon_stats.tlv_tag_status_err++;
  1511. /* WAR for missing status: Skip status entry */
  1512. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1513. continue;
  1514. }
  1515. qdf_nbuf_set_pktlen(status_nbuf, RX_DATA_BUFFER_SIZE);
  1516. qdf_nbuf_unmap_single(soc->osdev, status_nbuf,
  1517. QDF_DMA_FROM_DEVICE);
  1518. /* Put the status_nbuf to queue */
  1519. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1520. } else {
  1521. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1522. union dp_rx_desc_list_elem_t *tail = NULL;
  1523. struct rx_desc_pool *rx_desc_pool;
  1524. uint32_t num_alloc_desc;
  1525. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1526. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1527. rx_desc_pool,
  1528. 1,
  1529. &desc_list,
  1530. &tail);
  1531. /*
  1532. * No free descriptors available
  1533. */
  1534. if (qdf_unlikely(num_alloc_desc == 0)) {
  1535. work_done++;
  1536. break;
  1537. }
  1538. rx_desc = &desc_list->rx_desc;
  1539. }
  1540. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1541. /*
  1542. * qdf_nbuf alloc or map failed,
  1543. * free the dp rx desc to free list,
  1544. * fill in NULL dma address at current HP entry,
  1545. * keep HP in mon_status_ring unchanged,
  1546. * wait next time dp_rx_mon_status_srng_process
  1547. * to fill in buffer at current HP.
  1548. */
  1549. if (qdf_unlikely(!status_nbuf)) {
  1550. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1551. union dp_rx_desc_list_elem_t *tail = NULL;
  1552. struct rx_desc_pool *rx_desc_pool;
  1553. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1554. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1555. "%s: fail to allocate or map qdf_nbuf",
  1556. __func__);
  1557. dp_rx_add_to_free_desc_list(&desc_list,
  1558. &tail, rx_desc);
  1559. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1560. &tail, mac_id, rx_desc_pool);
  1561. hal_rxdma_buff_addr_info_set(
  1562. rxdma_mon_status_ring_entry,
  1563. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1564. work_done++;
  1565. break;
  1566. }
  1567. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1568. rx_desc->nbuf = status_nbuf;
  1569. rx_desc->in_use = 1;
  1570. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1571. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1572. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1573. work_done++;
  1574. }
  1575. done:
  1576. hal_srng_access_end(hal_soc, mon_status_srng);
  1577. return work_done;
  1578. }
  1579. /*
  1580. * dp_rx_mon_status_process() - Process monitor status ring and
  1581. * TLV in status ring.
  1582. *
  1583. * @soc: core txrx main context
  1584. * @mac_id: mac_id which is one of 3 mac_ids
  1585. * @quota: No. of ring entry that can be serviced in one shot.
  1586. * Return: uint32_t: No. of ring entry that is processed.
  1587. */
  1588. static inline uint32_t
  1589. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1590. uint32_t work_done;
  1591. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  1592. quota -= work_done;
  1593. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  1594. return work_done;
  1595. }
  1596. /**
  1597. * dp_mon_process() - Main monitor mode processing roution.
  1598. * This call monitor status ring process then monitor
  1599. * destination ring process.
  1600. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1601. * @soc: core txrx main context
  1602. * @mac_id: mac_id which is one of 3 mac_ids
  1603. * @quota: No. of status ring entry that can be serviced in one shot.
  1604. * Return: uint32_t: No. of ring entry that is processed.
  1605. */
  1606. uint32_t
  1607. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1608. return dp_rx_mon_status_process(soc, mac_id, quota);
  1609. }
  1610. /**
  1611. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  1612. * @pdev: core txrx pdev context
  1613. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1614. *
  1615. * This function will detach DP RX status ring from
  1616. * main device context. will free DP Rx resources for
  1617. * status ring
  1618. *
  1619. * Return: QDF_STATUS_SUCCESS: success
  1620. * QDF_STATUS_E_RESOURCES: Error return
  1621. */
  1622. QDF_STATUS
  1623. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  1624. {
  1625. struct dp_soc *soc = pdev->soc;
  1626. struct rx_desc_pool *rx_desc_pool;
  1627. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1628. if (rx_desc_pool->pool_size != 0) {
  1629. if (!dp_is_soc_reinit(soc))
  1630. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1631. rx_desc_pool);
  1632. else
  1633. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1634. }
  1635. return QDF_STATUS_SUCCESS;
  1636. }
  1637. /*
  1638. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1639. * rx nbufs called during dp rx
  1640. * monitor status ring initialization
  1641. *
  1642. * @soc: core txrx main context
  1643. * @mac_id: mac_id which is one of 3 mac_ids
  1644. * @dp_rxdma_srng: dp monitor status circular ring
  1645. * @rx_desc_pool; Pointer to Rx descriptor pool
  1646. * @num_req_buffers: number of buffer to be replenished
  1647. * @desc_list: list of descs if called from dp rx monitor status
  1648. * process or NULL during dp rx initialization or
  1649. * out of buffer interrupt
  1650. * @tail: tail of descs list
  1651. * @owner: who owns the nbuf (host, NSS etc...)
  1652. * Return: return success or failure
  1653. */
  1654. static inline
  1655. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1656. uint32_t mac_id,
  1657. struct dp_srng *dp_rxdma_srng,
  1658. struct rx_desc_pool *rx_desc_pool,
  1659. uint32_t num_req_buffers,
  1660. union dp_rx_desc_list_elem_t **desc_list,
  1661. union dp_rx_desc_list_elem_t **tail,
  1662. uint8_t owner)
  1663. {
  1664. uint32_t num_alloc_desc;
  1665. uint16_t num_desc_to_free = 0;
  1666. uint32_t num_entries_avail;
  1667. uint32_t count = 0;
  1668. int sync_hw_ptr = 1;
  1669. qdf_dma_addr_t paddr;
  1670. qdf_nbuf_t rx_netbuf;
  1671. void *rxdma_ring_entry;
  1672. union dp_rx_desc_list_elem_t *next;
  1673. void *rxdma_srng;
  1674. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1675. if (!dp_pdev) {
  1676. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1677. "pdev is null for mac_id = %d", mac_id);
  1678. return QDF_STATUS_E_FAILURE;
  1679. }
  1680. rxdma_srng = dp_rxdma_srng->hal_srng;
  1681. qdf_assert(rxdma_srng);
  1682. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1683. "[%s][%d] requested %d buffers for replenish",
  1684. __func__, __LINE__, num_req_buffers);
  1685. /*
  1686. * if desc_list is NULL, allocate the descs from freelist
  1687. */
  1688. if (!(*desc_list)) {
  1689. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1690. rx_desc_pool,
  1691. num_req_buffers,
  1692. desc_list,
  1693. tail);
  1694. if (!num_alloc_desc) {
  1695. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1696. "[%s][%d] no free rx_descs in freelist",
  1697. __func__, __LINE__);
  1698. return QDF_STATUS_E_NOMEM;
  1699. }
  1700. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1701. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1702. num_alloc_desc);
  1703. num_req_buffers = num_alloc_desc;
  1704. }
  1705. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1706. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1707. rxdma_srng, sync_hw_ptr);
  1708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1709. "[%s][%d] no of available entries in rxdma ring: %d",
  1710. __func__, __LINE__, num_entries_avail);
  1711. if (num_entries_avail < num_req_buffers) {
  1712. num_desc_to_free = num_req_buffers - num_entries_avail;
  1713. num_req_buffers = num_entries_avail;
  1714. }
  1715. while (count < num_req_buffers) {
  1716. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1717. /*
  1718. * qdf_nbuf alloc or map failed,
  1719. * keep HP in mon_status_ring unchanged,
  1720. * wait dp_rx_mon_status_srng_process
  1721. * to fill in buffer at current HP.
  1722. */
  1723. if (qdf_unlikely(!rx_netbuf)) {
  1724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1725. "%s: qdf_nbuf allocate or map fail, count %d",
  1726. __func__, count);
  1727. break;
  1728. }
  1729. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1730. next = (*desc_list)->next;
  1731. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  1732. rxdma_srng);
  1733. if (qdf_unlikely(!rxdma_ring_entry)) {
  1734. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1735. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1736. __func__, __LINE__, count);
  1737. qdf_nbuf_unmap_single(dp_soc->osdev, rx_netbuf,
  1738. QDF_DMA_FROM_DEVICE);
  1739. qdf_nbuf_free(rx_netbuf);
  1740. break;
  1741. }
  1742. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1743. (*desc_list)->rx_desc.in_use = 1;
  1744. count++;
  1745. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1746. (*desc_list)->rx_desc.cookie, owner);
  1747. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1748. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1749. paddr=%pK",
  1750. __func__, __LINE__, &(*desc_list)->rx_desc,
  1751. (*desc_list)->rx_desc.cookie, rx_netbuf,
  1752. (void *)paddr);
  1753. *desc_list = next;
  1754. }
  1755. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1756. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1757. "successfully replenished %d buffers", num_req_buffers);
  1758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1759. "%d rx desc added back to free list", num_desc_to_free);
  1760. /*
  1761. * add any available free desc back to the free list
  1762. */
  1763. if (*desc_list) {
  1764. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1765. mac_id, rx_desc_pool);
  1766. }
  1767. return QDF_STATUS_SUCCESS;
  1768. }
  1769. /**
  1770. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  1771. * @pdev: core txrx pdev context
  1772. * @ring_id: ring number
  1773. * This function will attach a DP RX monitor status ring into pDEV
  1774. * and replenish monitor status ring with buffer.
  1775. *
  1776. * Return: QDF_STATUS_SUCCESS: success
  1777. * QDF_STATUS_E_RESOURCES: Error return
  1778. */
  1779. QDF_STATUS
  1780. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  1781. struct dp_soc *soc = pdev->soc;
  1782. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1783. union dp_rx_desc_list_elem_t *tail = NULL;
  1784. struct dp_srng *mon_status_ring;
  1785. uint32_t num_entries;
  1786. uint32_t i;
  1787. struct rx_desc_pool *rx_desc_pool;
  1788. QDF_STATUS status;
  1789. mon_status_ring = &soc->rxdma_mon_status_ring[ring_id];
  1790. num_entries = mon_status_ring->num_entries;
  1791. rx_desc_pool = &soc->rx_desc_status[ring_id];
  1792. dp_info("Mon RX Status Pool[%d] entries=%d",
  1793. ring_id, num_entries);
  1794. status = dp_rx_desc_pool_alloc(soc, ring_id, num_entries + 1,
  1795. rx_desc_pool);
  1796. if (!QDF_IS_STATUS_SUCCESS(status))
  1797. return status;
  1798. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  1799. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1800. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  1801. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  1802. mon_status_ring,
  1803. rx_desc_pool,
  1804. num_entries,
  1805. &desc_list, &tail,
  1806. HAL_RX_BUF_RBM_SW3_BM);
  1807. if (!QDF_IS_STATUS_SUCCESS(status))
  1808. return status;
  1809. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1810. qdf_nbuf_queue_init(&pdev->rx_ppdu_buf_q);
  1811. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1812. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  1813. sizeof(pdev->ppdu_info.rx_status));
  1814. qdf_mem_zero(&pdev->rx_mon_stats,
  1815. sizeof(pdev->rx_mon_stats));
  1816. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1817. &pdev->rx_mon_stats);
  1818. for (i = 0; i < MAX_MU_USERS; i++) {
  1819. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1820. pdev->is_mpdu_hdr[i] = true;
  1821. }
  1822. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1823. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1824. return QDF_STATUS_SUCCESS;
  1825. }