qmi.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  271. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  272. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  273. &iova_ipa_size)) {
  274. req->ddr_range_valid = 1;
  275. req->ddr_range[0].start = iova_start;
  276. req->ddr_range[0].size = iova_size + iova_ipa_size;
  277. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  278. req->ddr_range[0].start, req->ddr_range[0].size);
  279. }
  280. req->host_build_type_valid = 1;
  281. req->host_build_type = cnss_get_host_build_type();
  282. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  283. ret = cnss_get_feature_list(plat_priv, &feature_list);
  284. if (!ret) {
  285. req->feature_list_valid = 1;
  286. req->feature_list = feature_list;
  287. cnss_pr_dbg("Sending feature list 0x%llx\n",
  288. req->feature_list);
  289. }
  290. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  291. wlfw_host_cap_resp_msg_v01_ei, resp);
  292. if (ret < 0) {
  293. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  294. ret);
  295. goto out;
  296. }
  297. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  298. QMI_WLFW_HOST_CAP_REQ_V01,
  299. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  300. wlfw_host_cap_req_msg_v01_ei, req);
  301. if (ret < 0) {
  302. qmi_txn_cancel(&txn);
  303. cnss_pr_err("Failed to send host capability request, err: %d\n",
  304. ret);
  305. goto out;
  306. }
  307. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  308. if (ret < 0) {
  309. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  310. ret);
  311. goto out;
  312. }
  313. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  314. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  315. resp->resp.result, resp->resp.error);
  316. ret = -resp->resp.result;
  317. goto out;
  318. }
  319. kfree(req);
  320. kfree(resp);
  321. return 0;
  322. out:
  323. CNSS_QMI_ASSERT();
  324. kfree(req);
  325. kfree(resp);
  326. return ret;
  327. }
  328. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  329. {
  330. struct wlfw_respond_mem_req_msg_v01 *req;
  331. struct wlfw_respond_mem_resp_msg_v01 *resp;
  332. struct qmi_txn txn;
  333. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  334. int ret = 0, i;
  335. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  336. plat_priv->driver_state);
  337. req = kzalloc(sizeof(*req), GFP_KERNEL);
  338. if (!req)
  339. return -ENOMEM;
  340. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  341. if (!resp) {
  342. kfree(req);
  343. return -ENOMEM;
  344. }
  345. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  346. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  347. ret = -EINVAL;
  348. goto out;
  349. }
  350. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  351. for (i = 0; i < req->mem_seg_len; i++) {
  352. if (!fw_mem[i].pa || !fw_mem[i].size) {
  353. if (fw_mem[i].type == 0) {
  354. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  355. i);
  356. ret = -EINVAL;
  357. goto out;
  358. }
  359. cnss_pr_err("Memory for FW is not available for type: %u\n",
  360. fw_mem[i].type);
  361. ret = -ENOMEM;
  362. goto out;
  363. }
  364. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  365. fw_mem[i].va, &fw_mem[i].pa,
  366. fw_mem[i].size, fw_mem[i].type);
  367. req->mem_seg[i].addr = fw_mem[i].pa;
  368. req->mem_seg[i].size = fw_mem[i].size;
  369. req->mem_seg[i].type = fw_mem[i].type;
  370. }
  371. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  372. wlfw_respond_mem_resp_msg_v01_ei, resp);
  373. if (ret < 0) {
  374. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  375. ret);
  376. goto out;
  377. }
  378. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  379. QMI_WLFW_RESPOND_MEM_REQ_V01,
  380. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  381. wlfw_respond_mem_req_msg_v01_ei, req);
  382. if (ret < 0) {
  383. qmi_txn_cancel(&txn);
  384. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  385. ret);
  386. goto out;
  387. }
  388. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  389. if (ret < 0) {
  390. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  391. ret);
  392. goto out;
  393. }
  394. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  395. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  396. resp->resp.result, resp->resp.error);
  397. ret = -resp->resp.result;
  398. goto out;
  399. }
  400. kfree(req);
  401. kfree(resp);
  402. return 0;
  403. out:
  404. CNSS_QMI_ASSERT();
  405. kfree(req);
  406. kfree(resp);
  407. return ret;
  408. }
  409. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  410. {
  411. struct wlfw_cap_req_msg_v01 *req;
  412. struct wlfw_cap_resp_msg_v01 *resp;
  413. struct qmi_txn txn;
  414. char *fw_build_timestamp;
  415. int ret = 0, i;
  416. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  417. plat_priv->driver_state);
  418. req = kzalloc(sizeof(*req), GFP_KERNEL);
  419. if (!req)
  420. return -ENOMEM;
  421. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  422. if (!resp) {
  423. kfree(req);
  424. return -ENOMEM;
  425. }
  426. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  427. wlfw_cap_resp_msg_v01_ei, resp);
  428. if (ret < 0) {
  429. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  430. ret);
  431. goto out;
  432. }
  433. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  434. QMI_WLFW_CAP_REQ_V01,
  435. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  436. wlfw_cap_req_msg_v01_ei, req);
  437. if (ret < 0) {
  438. qmi_txn_cancel(&txn);
  439. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  440. ret);
  441. goto out;
  442. }
  443. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  444. if (ret < 0) {
  445. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  446. ret);
  447. goto out;
  448. }
  449. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  450. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  451. resp->resp.result, resp->resp.error);
  452. ret = -resp->resp.result;
  453. goto out;
  454. }
  455. if (resp->chip_info_valid) {
  456. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  457. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  458. }
  459. if (resp->board_info_valid)
  460. plat_priv->board_info.board_id = resp->board_info.board_id;
  461. else
  462. plat_priv->board_info.board_id = 0xFF;
  463. if (resp->soc_info_valid)
  464. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  465. if (resp->fw_version_info_valid) {
  466. plat_priv->fw_version_info.fw_version =
  467. resp->fw_version_info.fw_version;
  468. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  469. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  470. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  471. resp->fw_version_info.fw_build_timestamp,
  472. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  473. }
  474. if (resp->fw_build_id_valid) {
  475. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  476. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  477. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  478. }
  479. /* FW will send aop retention volatage for qca6490 */
  480. if (resp->voltage_mv_valid) {
  481. plat_priv->cpr_info.voltage = resp->voltage_mv;
  482. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  483. plat_priv->cpr_info.voltage);
  484. cnss_update_cpr_info(plat_priv);
  485. }
  486. if (resp->time_freq_hz_valid) {
  487. plat_priv->device_freq_hz = resp->time_freq_hz;
  488. cnss_pr_dbg("Device frequency is %d HZ\n",
  489. plat_priv->device_freq_hz);
  490. }
  491. if (resp->otp_version_valid)
  492. plat_priv->otp_version = resp->otp_version;
  493. if (resp->dev_mem_info_valid) {
  494. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  495. plat_priv->dev_mem_info[i].start =
  496. resp->dev_mem_info[i].start;
  497. plat_priv->dev_mem_info[i].size =
  498. resp->dev_mem_info[i].size;
  499. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  500. i, plat_priv->dev_mem_info[i].start,
  501. plat_priv->dev_mem_info[i].size);
  502. }
  503. }
  504. if (resp->fw_caps_valid) {
  505. plat_priv->fw_pcie_gen_switch =
  506. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  507. plat_priv->fw_caps = resp->fw_caps;
  508. }
  509. if (resp->hang_data_length_valid &&
  510. resp->hang_data_length &&
  511. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  512. plat_priv->hang_event_data_len = resp->hang_data_length;
  513. else
  514. plat_priv->hang_event_data_len = 0;
  515. if (resp->hang_data_addr_offset_valid)
  516. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  517. else
  518. plat_priv->hang_data_addr_offset = 0;
  519. if (resp->hwid_bitmap_valid)
  520. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  521. if (resp->ol_cpr_cfg_valid)
  522. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  523. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  524. plat_priv->chip_info.chip_id,
  525. plat_priv->chip_info.chip_family,
  526. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  527. plat_priv->otp_version);
  528. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  529. plat_priv->fw_version_info.fw_version,
  530. plat_priv->fw_version_info.fw_build_timestamp,
  531. plat_priv->fw_build_id,
  532. plat_priv->hwid_bitmap);
  533. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  534. plat_priv->hang_event_data_len,
  535. plat_priv->hang_data_addr_offset);
  536. kfree(req);
  537. kfree(resp);
  538. return 0;
  539. out:
  540. CNSS_QMI_ASSERT();
  541. kfree(req);
  542. kfree(resp);
  543. return ret;
  544. }
  545. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  546. u32 bdf_type, char *filename,
  547. u32 filename_len)
  548. {
  549. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  550. int ret = 0;
  551. switch (bdf_type) {
  552. case CNSS_BDF_ELF:
  553. /* Board ID will be equal or less than 0xFF in GF mask case */
  554. if (plat_priv->board_info.board_id == 0xFF) {
  555. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  556. snprintf(filename_tmp, filename_len,
  557. ELF_BDF_FILE_NAME_GF);
  558. else
  559. snprintf(filename_tmp, filename_len,
  560. ELF_BDF_FILE_NAME);
  561. } else if (plat_priv->board_info.board_id < 0xFF) {
  562. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  563. snprintf(filename_tmp, filename_len,
  564. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  565. plat_priv->board_info.board_id);
  566. else
  567. snprintf(filename_tmp, filename_len,
  568. ELF_BDF_FILE_NAME_PREFIX "%02x",
  569. plat_priv->board_info.board_id);
  570. } else {
  571. snprintf(filename_tmp, filename_len,
  572. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  573. plat_priv->board_info.board_id >> 8 & 0xFF,
  574. plat_priv->board_info.board_id & 0xFF);
  575. }
  576. break;
  577. case CNSS_BDF_BIN:
  578. if (plat_priv->board_info.board_id == 0xFF) {
  579. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  580. snprintf(filename_tmp, filename_len,
  581. BIN_BDF_FILE_NAME_GF);
  582. else
  583. snprintf(filename_tmp, filename_len,
  584. BIN_BDF_FILE_NAME);
  585. } else if (plat_priv->board_info.board_id < 0xFF) {
  586. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  587. snprintf(filename_tmp, filename_len,
  588. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  589. plat_priv->board_info.board_id);
  590. else
  591. snprintf(filename_tmp, filename_len,
  592. BIN_BDF_FILE_NAME_PREFIX "%02x",
  593. plat_priv->board_info.board_id);
  594. } else {
  595. snprintf(filename_tmp, filename_len,
  596. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  597. plat_priv->board_info.board_id >> 8 & 0xFF,
  598. plat_priv->board_info.board_id & 0xFF);
  599. }
  600. break;
  601. case CNSS_BDF_REGDB:
  602. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  603. break;
  604. case CNSS_BDF_HDS:
  605. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  606. break;
  607. default:
  608. cnss_pr_err("Invalid BDF type: %d\n",
  609. plat_priv->ctrl_params.bdf_type);
  610. ret = -EINVAL;
  611. break;
  612. }
  613. if (!ret)
  614. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  615. return ret;
  616. }
  617. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  618. enum wlfw_ini_file_type_v01 file_type)
  619. {
  620. struct wlfw_ini_file_download_req_msg_v01 *req;
  621. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  622. struct qmi_txn txn;
  623. int ret = 0;
  624. const struct firmware *fw;
  625. char filename[INI_FILE_NAME_LEN] = {0};
  626. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  627. const u8 *temp;
  628. unsigned int remaining;
  629. bool backup_supported = false;
  630. req = kzalloc(sizeof(*req), GFP_KERNEL);
  631. if (!req)
  632. return -ENOMEM;
  633. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  634. if (!resp) {
  635. kfree(req);
  636. return -ENOMEM;
  637. }
  638. switch (file_type) {
  639. case WLFW_CONN_ROAM_INI_V01:
  640. snprintf(tmp_filename, sizeof(tmp_filename),
  641. CONN_ROAM_FILE_NAME);
  642. backup_supported = true;
  643. break;
  644. default:
  645. cnss_pr_err("Invalid file type: %u\n", file_type);
  646. ret = -EINVAL;
  647. goto err_req_fw;
  648. }
  649. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  650. /* Fetch the file */
  651. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  652. if (ret) {
  653. if (!backup_supported)
  654. goto err_req_fw;
  655. snprintf(filename, sizeof(filename),
  656. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  657. ret = firmware_request_nowarn(&fw, filename,
  658. &plat_priv->plat_dev->dev);
  659. if (ret)
  660. goto err_req_fw;
  661. }
  662. temp = fw->data;
  663. remaining = fw->size;
  664. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  665. remaining);
  666. while (remaining) {
  667. req->file_type_valid = 1;
  668. req->file_type = file_type;
  669. req->total_size_valid = 1;
  670. req->total_size = remaining;
  671. req->seg_id_valid = 1;
  672. req->data_valid = 1;
  673. req->end_valid = 1;
  674. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  675. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  676. } else {
  677. req->data_len = remaining;
  678. req->end = 1;
  679. }
  680. memcpy(req->data, temp, req->data_len);
  681. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  682. wlfw_ini_file_download_resp_msg_v01_ei,
  683. resp);
  684. if (ret < 0) {
  685. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  686. ret);
  687. goto err;
  688. }
  689. ret = qmi_send_request
  690. (&plat_priv->qmi_wlfw, NULL, &txn,
  691. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  692. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  693. wlfw_ini_file_download_req_msg_v01_ei, req);
  694. if (ret < 0) {
  695. qmi_txn_cancel(&txn);
  696. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  697. ret);
  698. goto err;
  699. }
  700. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  701. if (ret < 0) {
  702. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  703. ret);
  704. goto err;
  705. }
  706. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  707. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  708. resp->resp.result, resp->resp.error);
  709. ret = -resp->resp.result;
  710. goto err;
  711. }
  712. remaining -= req->data_len;
  713. temp += req->data_len;
  714. req->seg_id++;
  715. }
  716. release_firmware(fw);
  717. kfree(req);
  718. kfree(resp);
  719. return 0;
  720. err:
  721. release_firmware(fw);
  722. err_req_fw:
  723. kfree(req);
  724. kfree(resp);
  725. return ret;
  726. }
  727. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  728. u32 bdf_type)
  729. {
  730. struct wlfw_bdf_download_req_msg_v01 *req;
  731. struct wlfw_bdf_download_resp_msg_v01 *resp;
  732. struct qmi_txn txn;
  733. char filename[MAX_FIRMWARE_NAME_LEN];
  734. const struct firmware *fw_entry = NULL;
  735. const u8 *temp;
  736. unsigned int remaining;
  737. int ret = 0;
  738. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  739. plat_priv->driver_state, bdf_type);
  740. req = kzalloc(sizeof(*req), GFP_KERNEL);
  741. if (!req)
  742. return -ENOMEM;
  743. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  744. if (!resp) {
  745. kfree(req);
  746. return -ENOMEM;
  747. }
  748. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  749. filename, sizeof(filename));
  750. if (ret)
  751. goto err_req_fw;
  752. if (bdf_type == CNSS_BDF_REGDB)
  753. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  754. filename);
  755. else
  756. ret = firmware_request_nowarn(&fw_entry, filename,
  757. &plat_priv->plat_dev->dev);
  758. if (ret) {
  759. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  760. goto err_req_fw;
  761. }
  762. temp = fw_entry->data;
  763. remaining = fw_entry->size;
  764. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  765. while (remaining) {
  766. req->valid = 1;
  767. req->file_id_valid = 1;
  768. req->file_id = plat_priv->board_info.board_id;
  769. req->total_size_valid = 1;
  770. req->total_size = remaining;
  771. req->seg_id_valid = 1;
  772. req->data_valid = 1;
  773. req->end_valid = 1;
  774. req->bdf_type_valid = 1;
  775. req->bdf_type = bdf_type;
  776. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  777. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  778. } else {
  779. req->data_len = remaining;
  780. req->end = 1;
  781. }
  782. memcpy(req->data, temp, req->data_len);
  783. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  784. wlfw_bdf_download_resp_msg_v01_ei, resp);
  785. if (ret < 0) {
  786. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  787. ret);
  788. goto err_send;
  789. }
  790. ret = qmi_send_request
  791. (&plat_priv->qmi_wlfw, NULL, &txn,
  792. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  793. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  794. wlfw_bdf_download_req_msg_v01_ei, req);
  795. if (ret < 0) {
  796. qmi_txn_cancel(&txn);
  797. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  798. ret);
  799. goto err_send;
  800. }
  801. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  802. if (ret < 0) {
  803. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  804. ret);
  805. goto err_send;
  806. }
  807. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  808. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  809. resp->resp.result, resp->resp.error);
  810. ret = -resp->resp.result;
  811. goto err_send;
  812. }
  813. remaining -= req->data_len;
  814. temp += req->data_len;
  815. req->seg_id++;
  816. }
  817. release_firmware(fw_entry);
  818. if (resp->host_bdf_data_valid) {
  819. /* QCA6490 enable S3E regulator for IPA configuration only */
  820. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  821. cnss_enable_int_pow_amp_vreg(plat_priv);
  822. plat_priv->cbc_file_download =
  823. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  824. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  825. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  826. plat_priv->cbc_file_download);
  827. }
  828. kfree(req);
  829. kfree(resp);
  830. return 0;
  831. err_send:
  832. release_firmware(fw_entry);
  833. err_req_fw:
  834. if (!(bdf_type == CNSS_BDF_REGDB ||
  835. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  836. ret == -EAGAIN))
  837. CNSS_QMI_ASSERT();
  838. kfree(req);
  839. kfree(resp);
  840. return ret;
  841. }
  842. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  843. {
  844. struct wlfw_m3_info_req_msg_v01 *req;
  845. struct wlfw_m3_info_resp_msg_v01 *resp;
  846. struct qmi_txn txn;
  847. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  848. int ret = 0;
  849. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  850. plat_priv->driver_state);
  851. req = kzalloc(sizeof(*req), GFP_KERNEL);
  852. if (!req)
  853. return -ENOMEM;
  854. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  855. if (!resp) {
  856. kfree(req);
  857. return -ENOMEM;
  858. }
  859. if (!m3_mem->pa || !m3_mem->size) {
  860. cnss_pr_err("Memory for M3 is not available\n");
  861. ret = -ENOMEM;
  862. goto out;
  863. }
  864. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  865. m3_mem->va, &m3_mem->pa, m3_mem->size);
  866. req->addr = plat_priv->m3_mem.pa;
  867. req->size = plat_priv->m3_mem.size;
  868. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  869. wlfw_m3_info_resp_msg_v01_ei, resp);
  870. if (ret < 0) {
  871. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  872. ret);
  873. goto out;
  874. }
  875. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  876. QMI_WLFW_M3_INFO_REQ_V01,
  877. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  878. wlfw_m3_info_req_msg_v01_ei, req);
  879. if (ret < 0) {
  880. qmi_txn_cancel(&txn);
  881. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  882. ret);
  883. goto out;
  884. }
  885. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  886. if (ret < 0) {
  887. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  888. ret);
  889. goto out;
  890. }
  891. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  892. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  893. resp->resp.result, resp->resp.error);
  894. ret = -resp->resp.result;
  895. goto out;
  896. }
  897. kfree(req);
  898. kfree(resp);
  899. return 0;
  900. out:
  901. CNSS_QMI_ASSERT();
  902. kfree(req);
  903. kfree(resp);
  904. return ret;
  905. }
  906. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  907. u8 *mac, u32 mac_len)
  908. {
  909. struct wlfw_mac_addr_req_msg_v01 req;
  910. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  911. struct qmi_txn txn;
  912. int ret;
  913. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  914. return -EINVAL;
  915. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  916. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  917. if (ret < 0) {
  918. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  919. ret);
  920. ret = -EIO;
  921. goto out;
  922. }
  923. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  924. mac, plat_priv->driver_state);
  925. memcpy(req.mac_addr, mac, mac_len);
  926. req.mac_addr_valid = 1;
  927. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  928. QMI_WLFW_MAC_ADDR_REQ_V01,
  929. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  930. wlfw_mac_addr_req_msg_v01_ei, &req);
  931. if (ret < 0) {
  932. qmi_txn_cancel(&txn);
  933. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  934. ret = -EIO;
  935. goto out;
  936. }
  937. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  938. if (ret < 0) {
  939. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  940. ret);
  941. ret = -EIO;
  942. goto out;
  943. }
  944. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  945. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  946. resp.resp.result);
  947. ret = -resp.resp.result;
  948. }
  949. out:
  950. return ret;
  951. }
  952. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  953. u32 total_size)
  954. {
  955. int ret = 0;
  956. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  957. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  958. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  959. unsigned int remaining;
  960. struct qmi_txn txn;
  961. cnss_pr_dbg("%s\n", __func__);
  962. req = kzalloc(sizeof(*req), GFP_KERNEL);
  963. if (!req)
  964. return -ENOMEM;
  965. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  966. if (!resp) {
  967. kfree(req);
  968. return -ENOMEM;
  969. }
  970. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  971. if (!p_qdss_trace_data) {
  972. ret = ENOMEM;
  973. goto end;
  974. }
  975. remaining = total_size;
  976. p_qdss_trace_data_temp = p_qdss_trace_data;
  977. while (remaining && resp->end == 0) {
  978. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  979. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  980. if (ret < 0) {
  981. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  982. ret);
  983. goto fail;
  984. }
  985. ret = qmi_send_request
  986. (&plat_priv->qmi_wlfw, NULL, &txn,
  987. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  988. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  989. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  990. if (ret < 0) {
  991. qmi_txn_cancel(&txn);
  992. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  993. ret);
  994. goto fail;
  995. }
  996. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  997. if (ret < 0) {
  998. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  999. ret);
  1000. goto fail;
  1001. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1002. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1003. resp->resp.result, resp->resp.error);
  1004. ret = -resp->resp.result;
  1005. goto fail;
  1006. } else {
  1007. ret = 0;
  1008. }
  1009. cnss_pr_dbg("%s: response total size %d data len %d",
  1010. __func__, resp->total_size, resp->data_len);
  1011. if ((resp->total_size_valid == 1 &&
  1012. resp->total_size == total_size) &&
  1013. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1014. (resp->data_valid == 1 &&
  1015. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1016. resp->data_len <= remaining) {
  1017. memcpy(p_qdss_trace_data_temp,
  1018. resp->data, resp->data_len);
  1019. } else {
  1020. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1021. __func__,
  1022. total_size, req->seg_id,
  1023. resp->total_size_valid,
  1024. resp->total_size,
  1025. resp->seg_id_valid,
  1026. resp->seg_id,
  1027. resp->data_valid,
  1028. resp->data_len);
  1029. ret = -1;
  1030. goto fail;
  1031. }
  1032. remaining -= resp->data_len;
  1033. p_qdss_trace_data_temp += resp->data_len;
  1034. req->seg_id++;
  1035. }
  1036. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1037. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1038. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1039. total_size);
  1040. if (ret < 0) {
  1041. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1042. ret);
  1043. ret = -1;
  1044. goto fail;
  1045. }
  1046. } else {
  1047. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1048. __func__,
  1049. remaining, resp->end_valid, resp->end);
  1050. ret = -1;
  1051. goto fail;
  1052. }
  1053. fail:
  1054. kfree(p_qdss_trace_data);
  1055. end:
  1056. kfree(req);
  1057. kfree(resp);
  1058. return ret;
  1059. }
  1060. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1061. char *filename, u32 filename_len)
  1062. {
  1063. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1064. char *debug_str = QDSS_DEBUG_FILE_STR;
  1065. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1066. plat_priv->device_id == MANGO_DEVICE_ID)
  1067. debug_str = "";
  1068. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1069. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1070. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1071. else
  1072. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1073. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1074. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1075. }
  1076. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1077. {
  1078. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1079. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1080. struct qmi_txn txn;
  1081. const struct firmware *fw_entry = NULL;
  1082. const u8 *temp;
  1083. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1084. unsigned int remaining;
  1085. int ret = 0;
  1086. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1087. plat_priv->driver_state);
  1088. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1089. if (!req)
  1090. return -ENOMEM;
  1091. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1092. if (!resp) {
  1093. kfree(req);
  1094. return -ENOMEM;
  1095. }
  1096. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1097. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1098. qdss_cfg_filename);
  1099. if (ret) {
  1100. cnss_pr_dbg("Unable to load %s\n",
  1101. qdss_cfg_filename);
  1102. goto err_req_fw;
  1103. }
  1104. temp = fw_entry->data;
  1105. remaining = fw_entry->size;
  1106. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1107. qdss_cfg_filename, remaining);
  1108. while (remaining) {
  1109. req->total_size_valid = 1;
  1110. req->total_size = remaining;
  1111. req->seg_id_valid = 1;
  1112. req->data_valid = 1;
  1113. req->end_valid = 1;
  1114. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1115. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1116. } else {
  1117. req->data_len = remaining;
  1118. req->end = 1;
  1119. }
  1120. memcpy(req->data, temp, req->data_len);
  1121. ret = qmi_txn_init
  1122. (&plat_priv->qmi_wlfw, &txn,
  1123. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1124. resp);
  1125. if (ret < 0) {
  1126. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1127. ret);
  1128. goto err_send;
  1129. }
  1130. ret = qmi_send_request
  1131. (&plat_priv->qmi_wlfw, NULL, &txn,
  1132. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1133. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1134. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1135. if (ret < 0) {
  1136. qmi_txn_cancel(&txn);
  1137. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1138. ret);
  1139. goto err_send;
  1140. }
  1141. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1142. if (ret < 0) {
  1143. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1144. ret);
  1145. goto err_send;
  1146. }
  1147. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1148. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1149. resp->resp.result, resp->resp.error);
  1150. ret = -resp->resp.result;
  1151. goto err_send;
  1152. }
  1153. remaining -= req->data_len;
  1154. temp += req->data_len;
  1155. req->seg_id++;
  1156. }
  1157. release_firmware(fw_entry);
  1158. kfree(req);
  1159. kfree(resp);
  1160. return 0;
  1161. err_send:
  1162. release_firmware(fw_entry);
  1163. err_req_fw:
  1164. kfree(req);
  1165. kfree(resp);
  1166. return ret;
  1167. }
  1168. static int wlfw_send_qdss_trace_mode_req
  1169. (struct cnss_plat_data *plat_priv,
  1170. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1171. unsigned long long option)
  1172. {
  1173. int rc = 0;
  1174. int tmp = 0;
  1175. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1176. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1177. struct qmi_txn txn;
  1178. if (!plat_priv)
  1179. return -ENODEV;
  1180. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1181. if (!req)
  1182. return -ENOMEM;
  1183. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1184. if (!resp) {
  1185. kfree(req);
  1186. return -ENOMEM;
  1187. }
  1188. req->mode_valid = 1;
  1189. req->mode = mode;
  1190. req->option_valid = 1;
  1191. req->option = option;
  1192. tmp = plat_priv->hw_trc_override;
  1193. req->hw_trc_disable_override_valid = 1;
  1194. req->hw_trc_disable_override =
  1195. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1196. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1197. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1198. __func__, mode, option, req->hw_trc_disable_override);
  1199. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1200. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1201. if (rc < 0) {
  1202. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1203. rc);
  1204. goto out;
  1205. }
  1206. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1207. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1208. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1209. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1210. if (rc < 0) {
  1211. qmi_txn_cancel(&txn);
  1212. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1213. goto out;
  1214. }
  1215. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1216. if (rc < 0) {
  1217. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1218. rc);
  1219. goto out;
  1220. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1221. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1222. resp->resp.result, resp->resp.error);
  1223. rc = -resp->resp.result;
  1224. goto out;
  1225. }
  1226. kfree(resp);
  1227. kfree(req);
  1228. return rc;
  1229. out:
  1230. kfree(resp);
  1231. kfree(req);
  1232. CNSS_QMI_ASSERT();
  1233. return rc;
  1234. }
  1235. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1236. {
  1237. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1238. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1239. }
  1240. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1241. {
  1242. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1243. option);
  1244. }
  1245. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1246. enum cnss_driver_mode mode)
  1247. {
  1248. struct wlfw_wlan_mode_req_msg_v01 *req;
  1249. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1250. struct qmi_txn txn;
  1251. int ret = 0;
  1252. if (!plat_priv)
  1253. return -ENODEV;
  1254. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1255. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1256. if (mode == CNSS_OFF &&
  1257. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1258. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1259. return 0;
  1260. }
  1261. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1262. if (!req)
  1263. return -ENOMEM;
  1264. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1265. if (!resp) {
  1266. kfree(req);
  1267. return -ENOMEM;
  1268. }
  1269. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1270. req->hw_debug_valid = 1;
  1271. req->hw_debug = 0;
  1272. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1273. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1274. if (ret < 0) {
  1275. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1276. cnss_qmi_mode_to_str(mode), mode, ret);
  1277. goto out;
  1278. }
  1279. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1280. QMI_WLFW_WLAN_MODE_REQ_V01,
  1281. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1282. wlfw_wlan_mode_req_msg_v01_ei, req);
  1283. if (ret < 0) {
  1284. qmi_txn_cancel(&txn);
  1285. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1286. cnss_qmi_mode_to_str(mode), mode, ret);
  1287. goto out;
  1288. }
  1289. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1290. if (ret < 0) {
  1291. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1292. cnss_qmi_mode_to_str(mode), mode, ret);
  1293. goto out;
  1294. }
  1295. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1296. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1297. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1298. resp->resp.error);
  1299. ret = -resp->resp.result;
  1300. goto out;
  1301. }
  1302. kfree(req);
  1303. kfree(resp);
  1304. return 0;
  1305. out:
  1306. if (mode == CNSS_OFF) {
  1307. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1308. ret = 0;
  1309. } else {
  1310. CNSS_QMI_ASSERT();
  1311. }
  1312. kfree(req);
  1313. kfree(resp);
  1314. return ret;
  1315. }
  1316. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1317. struct cnss_wlan_enable_cfg *config,
  1318. const char *host_version)
  1319. {
  1320. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1321. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1322. struct qmi_txn txn;
  1323. u32 i;
  1324. int ret = 0;
  1325. if (!plat_priv)
  1326. return -ENODEV;
  1327. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1328. plat_priv->driver_state);
  1329. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1330. if (!req)
  1331. return -ENOMEM;
  1332. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1333. if (!resp) {
  1334. kfree(req);
  1335. return -ENOMEM;
  1336. }
  1337. req->host_version_valid = 1;
  1338. strlcpy(req->host_version, host_version,
  1339. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1340. req->tgt_cfg_valid = 1;
  1341. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1342. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1343. else
  1344. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1345. for (i = 0; i < req->tgt_cfg_len; i++) {
  1346. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1347. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1348. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1349. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1350. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1351. }
  1352. req->svc_cfg_valid = 1;
  1353. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1354. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1355. else
  1356. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1357. for (i = 0; i < req->svc_cfg_len; i++) {
  1358. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1359. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1360. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1361. }
  1362. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1363. plat_priv->device_id != MANGO_DEVICE_ID) {
  1364. req->shadow_reg_v2_valid = 1;
  1365. if (config->num_shadow_reg_v2_cfg >
  1366. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1367. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1368. else
  1369. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1370. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1371. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1372. * req->shadow_reg_v2_len);
  1373. } else {
  1374. req->shadow_reg_v3_valid = 1;
  1375. if (config->num_shadow_reg_v3_cfg >
  1376. MAX_NUM_SHADOW_REG_V3)
  1377. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1378. else
  1379. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1380. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1381. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1382. plat_priv->num_shadow_regs_v3);
  1383. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1384. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1385. * req->shadow_reg_v3_len);
  1386. }
  1387. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1388. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1389. if (ret < 0) {
  1390. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1391. ret);
  1392. goto out;
  1393. }
  1394. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1395. QMI_WLFW_WLAN_CFG_REQ_V01,
  1396. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1397. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1398. if (ret < 0) {
  1399. qmi_txn_cancel(&txn);
  1400. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1401. ret);
  1402. goto out;
  1403. }
  1404. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1405. if (ret < 0) {
  1406. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1407. ret);
  1408. goto out;
  1409. }
  1410. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1411. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1412. resp->resp.result, resp->resp.error);
  1413. ret = -resp->resp.result;
  1414. goto out;
  1415. }
  1416. kfree(req);
  1417. kfree(resp);
  1418. return 0;
  1419. out:
  1420. CNSS_QMI_ASSERT();
  1421. kfree(req);
  1422. kfree(resp);
  1423. return ret;
  1424. }
  1425. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1426. u32 offset, u32 mem_type,
  1427. u32 data_len, u8 *data)
  1428. {
  1429. struct wlfw_athdiag_read_req_msg_v01 *req;
  1430. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1431. struct qmi_txn txn;
  1432. int ret = 0;
  1433. if (!plat_priv)
  1434. return -ENODEV;
  1435. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1436. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1437. data, data_len);
  1438. return -EINVAL;
  1439. }
  1440. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1441. plat_priv->driver_state, offset, mem_type, data_len);
  1442. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1443. if (!req)
  1444. return -ENOMEM;
  1445. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1446. if (!resp) {
  1447. kfree(req);
  1448. return -ENOMEM;
  1449. }
  1450. req->offset = offset;
  1451. req->mem_type = mem_type;
  1452. req->data_len = data_len;
  1453. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1454. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1455. if (ret < 0) {
  1456. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1457. ret);
  1458. goto out;
  1459. }
  1460. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1461. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1462. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1463. wlfw_athdiag_read_req_msg_v01_ei, req);
  1464. if (ret < 0) {
  1465. qmi_txn_cancel(&txn);
  1466. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1467. ret);
  1468. goto out;
  1469. }
  1470. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1471. if (ret < 0) {
  1472. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1473. ret);
  1474. goto out;
  1475. }
  1476. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1477. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1478. resp->resp.result, resp->resp.error);
  1479. ret = -resp->resp.result;
  1480. goto out;
  1481. }
  1482. if (!resp->data_valid || resp->data_len != data_len) {
  1483. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1484. resp->data_valid, resp->data_len);
  1485. ret = -EINVAL;
  1486. goto out;
  1487. }
  1488. memcpy(data, resp->data, resp->data_len);
  1489. kfree(req);
  1490. kfree(resp);
  1491. return 0;
  1492. out:
  1493. kfree(req);
  1494. kfree(resp);
  1495. return ret;
  1496. }
  1497. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1498. u32 offset, u32 mem_type,
  1499. u32 data_len, u8 *data)
  1500. {
  1501. struct wlfw_athdiag_write_req_msg_v01 *req;
  1502. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1503. struct qmi_txn txn;
  1504. int ret = 0;
  1505. if (!plat_priv)
  1506. return -ENODEV;
  1507. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1508. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1509. data, data_len);
  1510. return -EINVAL;
  1511. }
  1512. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1513. plat_priv->driver_state, offset, mem_type, data_len, data);
  1514. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1515. if (!req)
  1516. return -ENOMEM;
  1517. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1518. if (!resp) {
  1519. kfree(req);
  1520. return -ENOMEM;
  1521. }
  1522. req->offset = offset;
  1523. req->mem_type = mem_type;
  1524. req->data_len = data_len;
  1525. memcpy(req->data, data, data_len);
  1526. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1527. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1528. if (ret < 0) {
  1529. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1530. ret);
  1531. goto out;
  1532. }
  1533. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1534. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1535. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1536. wlfw_athdiag_write_req_msg_v01_ei, req);
  1537. if (ret < 0) {
  1538. qmi_txn_cancel(&txn);
  1539. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1540. ret);
  1541. goto out;
  1542. }
  1543. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1544. if (ret < 0) {
  1545. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1546. ret);
  1547. goto out;
  1548. }
  1549. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1550. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1551. resp->resp.result, resp->resp.error);
  1552. ret = -resp->resp.result;
  1553. goto out;
  1554. }
  1555. kfree(req);
  1556. kfree(resp);
  1557. return 0;
  1558. out:
  1559. kfree(req);
  1560. kfree(resp);
  1561. return ret;
  1562. }
  1563. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1564. u8 fw_log_mode)
  1565. {
  1566. struct wlfw_ini_req_msg_v01 *req;
  1567. struct wlfw_ini_resp_msg_v01 *resp;
  1568. struct qmi_txn txn;
  1569. int ret = 0;
  1570. if (!plat_priv)
  1571. return -ENODEV;
  1572. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1573. plat_priv->driver_state, fw_log_mode);
  1574. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1575. if (!req)
  1576. return -ENOMEM;
  1577. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1578. if (!resp) {
  1579. kfree(req);
  1580. return -ENOMEM;
  1581. }
  1582. req->enablefwlog_valid = 1;
  1583. req->enablefwlog = fw_log_mode;
  1584. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1585. wlfw_ini_resp_msg_v01_ei, resp);
  1586. if (ret < 0) {
  1587. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1588. fw_log_mode, ret);
  1589. goto out;
  1590. }
  1591. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1592. QMI_WLFW_INI_REQ_V01,
  1593. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1594. wlfw_ini_req_msg_v01_ei, req);
  1595. if (ret < 0) {
  1596. qmi_txn_cancel(&txn);
  1597. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1598. fw_log_mode, ret);
  1599. goto out;
  1600. }
  1601. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1602. if (ret < 0) {
  1603. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1604. fw_log_mode, ret);
  1605. goto out;
  1606. }
  1607. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1608. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1609. fw_log_mode, resp->resp.result, resp->resp.error);
  1610. ret = -resp->resp.result;
  1611. goto out;
  1612. }
  1613. kfree(req);
  1614. kfree(resp);
  1615. return 0;
  1616. out:
  1617. kfree(req);
  1618. kfree(resp);
  1619. return ret;
  1620. }
  1621. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1622. {
  1623. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1624. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1625. struct qmi_txn txn;
  1626. int ret = 0;
  1627. if (!plat_priv)
  1628. return -ENODEV;
  1629. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1630. !plat_priv->fw_pcie_gen_switch) {
  1631. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1632. return 0;
  1633. }
  1634. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1635. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1636. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1637. plat_priv->pcie_gen_speed;
  1638. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1639. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1640. if (ret < 0) {
  1641. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1642. ret);
  1643. goto out;
  1644. }
  1645. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1646. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1647. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1648. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1649. if (ret < 0) {
  1650. qmi_txn_cancel(&txn);
  1651. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1652. goto out;
  1653. }
  1654. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1655. if (ret < 0) {
  1656. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1657. ret);
  1658. goto out;
  1659. }
  1660. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1661. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1662. plat_priv->pcie_gen_speed, resp.resp.result,
  1663. resp.resp.error);
  1664. ret = -resp.resp.result;
  1665. }
  1666. out:
  1667. /* Reset PCIE Gen speed after one time use */
  1668. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1669. return ret;
  1670. }
  1671. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1672. {
  1673. struct wlfw_antenna_switch_req_msg_v01 *req;
  1674. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1675. struct qmi_txn txn;
  1676. int ret = 0;
  1677. if (!plat_priv)
  1678. return -ENODEV;
  1679. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1680. plat_priv->driver_state);
  1681. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1682. if (!req)
  1683. return -ENOMEM;
  1684. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1685. if (!resp) {
  1686. kfree(req);
  1687. return -ENOMEM;
  1688. }
  1689. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1690. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1691. if (ret < 0) {
  1692. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1693. ret);
  1694. goto out;
  1695. }
  1696. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1697. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1698. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1699. wlfw_antenna_switch_req_msg_v01_ei, req);
  1700. if (ret < 0) {
  1701. qmi_txn_cancel(&txn);
  1702. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1703. ret);
  1704. goto out;
  1705. }
  1706. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1707. if (ret < 0) {
  1708. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1709. ret);
  1710. goto out;
  1711. }
  1712. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1713. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1714. resp->resp.result, resp->resp.error);
  1715. ret = -resp->resp.result;
  1716. goto out;
  1717. }
  1718. if (resp->antenna_valid)
  1719. plat_priv->antenna = resp->antenna;
  1720. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1721. resp->antenna_valid, resp->antenna);
  1722. kfree(req);
  1723. kfree(resp);
  1724. return 0;
  1725. out:
  1726. kfree(req);
  1727. kfree(resp);
  1728. return ret;
  1729. }
  1730. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1731. {
  1732. struct wlfw_antenna_grant_req_msg_v01 *req;
  1733. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1734. struct qmi_txn txn;
  1735. int ret = 0;
  1736. if (!plat_priv)
  1737. return -ENODEV;
  1738. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1739. plat_priv->driver_state, plat_priv->grant);
  1740. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1741. if (!req)
  1742. return -ENOMEM;
  1743. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1744. if (!resp) {
  1745. kfree(req);
  1746. return -ENOMEM;
  1747. }
  1748. req->grant_valid = 1;
  1749. req->grant = plat_priv->grant;
  1750. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1751. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1752. if (ret < 0) {
  1753. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1754. ret);
  1755. goto out;
  1756. }
  1757. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1758. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1759. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1760. wlfw_antenna_grant_req_msg_v01_ei, req);
  1761. if (ret < 0) {
  1762. qmi_txn_cancel(&txn);
  1763. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1764. ret);
  1765. goto out;
  1766. }
  1767. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1768. if (ret < 0) {
  1769. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1770. ret);
  1771. goto out;
  1772. }
  1773. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1774. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1775. resp->resp.result, resp->resp.error);
  1776. ret = -resp->resp.result;
  1777. goto out;
  1778. }
  1779. kfree(req);
  1780. kfree(resp);
  1781. return 0;
  1782. out:
  1783. kfree(req);
  1784. kfree(resp);
  1785. return ret;
  1786. }
  1787. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1788. {
  1789. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1790. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1791. struct qmi_txn txn;
  1792. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1793. int ret = 0;
  1794. int i;
  1795. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1796. plat_priv->driver_state);
  1797. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1798. if (!req)
  1799. return -ENOMEM;
  1800. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1801. if (!resp) {
  1802. kfree(req);
  1803. return -ENOMEM;
  1804. }
  1805. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1806. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1807. ret = -EINVAL;
  1808. goto out;
  1809. }
  1810. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1811. for (i = 0; i < req->mem_seg_len; i++) {
  1812. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1813. qdss_mem[i].va, &qdss_mem[i].pa,
  1814. qdss_mem[i].size, qdss_mem[i].type);
  1815. req->mem_seg[i].addr = qdss_mem[i].pa;
  1816. req->mem_seg[i].size = qdss_mem[i].size;
  1817. req->mem_seg[i].type = qdss_mem[i].type;
  1818. }
  1819. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1820. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1821. if (ret < 0) {
  1822. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1823. ret);
  1824. goto out;
  1825. }
  1826. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1827. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1828. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1829. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1830. if (ret < 0) {
  1831. qmi_txn_cancel(&txn);
  1832. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1833. ret);
  1834. goto out;
  1835. }
  1836. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1837. if (ret < 0) {
  1838. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1839. ret);
  1840. goto out;
  1841. }
  1842. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1843. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1844. resp->resp.result, resp->resp.error);
  1845. ret = -resp->resp.result;
  1846. goto out;
  1847. }
  1848. kfree(req);
  1849. kfree(resp);
  1850. return 0;
  1851. out:
  1852. kfree(req);
  1853. kfree(resp);
  1854. return ret;
  1855. }
  1856. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1857. struct cnss_wfc_cfg cfg)
  1858. {
  1859. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1860. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1861. struct qmi_txn txn;
  1862. int ret = 0;
  1863. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1864. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1865. return -EINVAL;
  1866. }
  1867. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1868. if (!req)
  1869. return -ENOMEM;
  1870. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1871. if (!resp) {
  1872. kfree(req);
  1873. return -ENOMEM;
  1874. }
  1875. req->wfc_call_active_valid = 1;
  1876. req->wfc_call_active = cfg.mode;
  1877. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1878. plat_priv->driver_state);
  1879. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1880. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1881. if (ret < 0) {
  1882. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1883. ret);
  1884. goto out;
  1885. }
  1886. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1887. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1888. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1889. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1890. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1891. if (ret < 0) {
  1892. qmi_txn_cancel(&txn);
  1893. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1894. ret);
  1895. goto out;
  1896. }
  1897. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1898. if (ret < 0) {
  1899. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1900. ret);
  1901. goto out;
  1902. }
  1903. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1904. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1905. resp->resp.result, resp->resp.error);
  1906. ret = -EINVAL;
  1907. goto out;
  1908. }
  1909. ret = 0;
  1910. out:
  1911. kfree(req);
  1912. kfree(resp);
  1913. return ret;
  1914. }
  1915. static int cnss_wlfw_wfc_call_status_send_sync
  1916. (struct cnss_plat_data *plat_priv,
  1917. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1918. {
  1919. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1920. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1921. struct qmi_txn txn;
  1922. int ret = 0;
  1923. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1924. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1925. return -EINVAL;
  1926. }
  1927. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1928. if (!req)
  1929. return -ENOMEM;
  1930. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1931. if (!resp) {
  1932. kfree(req);
  1933. return -ENOMEM;
  1934. }
  1935. /**
  1936. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1937. * But in r2 update QMI structure is expanded and as an effect qmi
  1938. * decoded structures have padding. Thus we cannot use buffer design.
  1939. * For backward compatibility for r1 design copy only wfc_call_active
  1940. * value in hex buffer.
  1941. */
  1942. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1943. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1944. /* wfc_call_active is mandatory in IMS indication */
  1945. req->wfc_call_active_valid = 1;
  1946. req->wfc_call_active = ind_msg->wfc_call_active;
  1947. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1948. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1949. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1950. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1951. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1952. req->twt_ims_start = ind_msg->twt_ims_start;
  1953. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1954. req->twt_ims_int = ind_msg->twt_ims_int;
  1955. req->media_quality_valid = ind_msg->media_quality_valid;
  1956. req->media_quality =
  1957. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1958. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1959. plat_priv->driver_state);
  1960. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1961. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1962. if (ret < 0) {
  1963. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1964. ret);
  1965. goto out;
  1966. }
  1967. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1968. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1969. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1970. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1971. if (ret < 0) {
  1972. qmi_txn_cancel(&txn);
  1973. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1974. ret);
  1975. goto out;
  1976. }
  1977. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1978. if (ret < 0) {
  1979. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1980. ret);
  1981. goto out;
  1982. }
  1983. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1984. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1985. resp->resp.result, resp->resp.error);
  1986. ret = -resp->resp.result;
  1987. goto out;
  1988. }
  1989. ret = 0;
  1990. out:
  1991. kfree(req);
  1992. kfree(resp);
  1993. return ret;
  1994. }
  1995. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1996. {
  1997. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1998. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1999. struct qmi_txn txn;
  2000. int ret = 0;
  2001. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2002. plat_priv->dynamic_feature,
  2003. plat_priv->driver_state);
  2004. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2005. if (!req)
  2006. return -ENOMEM;
  2007. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2008. if (!resp) {
  2009. kfree(req);
  2010. return -ENOMEM;
  2011. }
  2012. req->mask_valid = 1;
  2013. req->mask = plat_priv->dynamic_feature;
  2014. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2015. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2016. if (ret < 0) {
  2017. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2018. ret);
  2019. goto out;
  2020. }
  2021. ret = qmi_send_request
  2022. (&plat_priv->qmi_wlfw, NULL, &txn,
  2023. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2024. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2025. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2026. if (ret < 0) {
  2027. qmi_txn_cancel(&txn);
  2028. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2029. ret);
  2030. goto out;
  2031. }
  2032. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2033. if (ret < 0) {
  2034. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2035. ret);
  2036. goto out;
  2037. }
  2038. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2039. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2040. resp->resp.result, resp->resp.error);
  2041. ret = -resp->resp.result;
  2042. goto out;
  2043. }
  2044. out:
  2045. kfree(req);
  2046. kfree(resp);
  2047. return ret;
  2048. }
  2049. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2050. void *cmd, int cmd_len)
  2051. {
  2052. struct wlfw_get_info_req_msg_v01 *req;
  2053. struct wlfw_get_info_resp_msg_v01 *resp;
  2054. struct qmi_txn txn;
  2055. int ret = 0;
  2056. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2057. type, cmd_len, plat_priv->driver_state);
  2058. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2059. return -EINVAL;
  2060. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2061. if (!req)
  2062. return -ENOMEM;
  2063. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2064. if (!resp) {
  2065. kfree(req);
  2066. return -ENOMEM;
  2067. }
  2068. req->type = type;
  2069. req->data_len = cmd_len;
  2070. memcpy(req->data, cmd, req->data_len);
  2071. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2072. wlfw_get_info_resp_msg_v01_ei, resp);
  2073. if (ret < 0) {
  2074. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2075. ret);
  2076. goto out;
  2077. }
  2078. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2079. QMI_WLFW_GET_INFO_REQ_V01,
  2080. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2081. wlfw_get_info_req_msg_v01_ei, req);
  2082. if (ret < 0) {
  2083. qmi_txn_cancel(&txn);
  2084. cnss_pr_err("Failed to send get info request, err: %d\n",
  2085. ret);
  2086. goto out;
  2087. }
  2088. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2089. if (ret < 0) {
  2090. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2091. ret);
  2092. goto out;
  2093. }
  2094. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2095. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2096. resp->resp.result, resp->resp.error);
  2097. ret = -resp->resp.result;
  2098. goto out;
  2099. }
  2100. kfree(req);
  2101. kfree(resp);
  2102. return 0;
  2103. out:
  2104. kfree(req);
  2105. kfree(resp);
  2106. return ret;
  2107. }
  2108. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2109. {
  2110. return QMI_WLFW_TIMEOUT_MS;
  2111. }
  2112. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2113. struct sockaddr_qrtr *sq,
  2114. struct qmi_txn *txn, const void *data)
  2115. {
  2116. struct cnss_plat_data *plat_priv =
  2117. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2118. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2119. int i;
  2120. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2121. if (!txn) {
  2122. cnss_pr_err("Spurious indication\n");
  2123. return;
  2124. }
  2125. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2126. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2127. return;
  2128. }
  2129. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2130. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2131. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2132. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2133. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2134. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2135. if (!plat_priv->fw_mem[i].va &&
  2136. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2137. plat_priv->fw_mem[i].attrs |=
  2138. DMA_ATTR_FORCE_CONTIGUOUS;
  2139. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2140. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2141. }
  2142. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2143. 0, NULL);
  2144. }
  2145. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2146. struct sockaddr_qrtr *sq,
  2147. struct qmi_txn *txn, const void *data)
  2148. {
  2149. struct cnss_plat_data *plat_priv =
  2150. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2151. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2152. if (!txn) {
  2153. cnss_pr_err("Spurious indication\n");
  2154. return;
  2155. }
  2156. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2157. 0, NULL);
  2158. }
  2159. /**
  2160. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2161. *
  2162. * This event is not required for HST/ HSP as FW calibration done is
  2163. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2164. */
  2165. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2166. struct sockaddr_qrtr *sq,
  2167. struct qmi_txn *txn, const void *data)
  2168. {
  2169. struct cnss_plat_data *plat_priv =
  2170. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2171. struct cnss_cal_info *cal_info;
  2172. if (!txn) {
  2173. cnss_pr_err("Spurious indication\n");
  2174. return;
  2175. }
  2176. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2177. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2178. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2179. return;
  2180. }
  2181. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2182. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2183. if (!cal_info)
  2184. return;
  2185. cal_info->cal_status = CNSS_CAL_DONE;
  2186. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2187. 0, cal_info);
  2188. }
  2189. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2190. struct sockaddr_qrtr *sq,
  2191. struct qmi_txn *txn, const void *data)
  2192. {
  2193. struct cnss_plat_data *plat_priv =
  2194. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2195. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2196. if (!txn) {
  2197. cnss_pr_err("Spurious indication\n");
  2198. return;
  2199. }
  2200. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2201. }
  2202. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2203. struct sockaddr_qrtr *sq,
  2204. struct qmi_txn *txn, const void *data)
  2205. {
  2206. struct cnss_plat_data *plat_priv =
  2207. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2208. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2209. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2210. if (!txn) {
  2211. cnss_pr_err("Spurious indication\n");
  2212. return;
  2213. }
  2214. if (ind_msg->pwr_pin_result_valid)
  2215. plat_priv->pin_result.fw_pwr_pin_result =
  2216. ind_msg->pwr_pin_result;
  2217. if (ind_msg->phy_io_pin_result_valid)
  2218. plat_priv->pin_result.fw_phy_io_pin_result =
  2219. ind_msg->phy_io_pin_result;
  2220. if (ind_msg->rf_pin_result_valid)
  2221. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2222. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2223. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2224. ind_msg->rf_pin_result);
  2225. }
  2226. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2227. u32 cal_file_download_size)
  2228. {
  2229. struct wlfw_cal_report_req_msg_v01 req = {0};
  2230. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2231. struct qmi_txn txn;
  2232. int ret = 0;
  2233. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2234. cal_file_download_size, plat_priv->driver_state);
  2235. req.cal_file_download_size_valid = 1;
  2236. req.cal_file_download_size = cal_file_download_size;
  2237. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2238. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2239. if (ret < 0) {
  2240. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2241. ret);
  2242. goto out;
  2243. }
  2244. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2245. QMI_WLFW_CAL_REPORT_REQ_V01,
  2246. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2247. wlfw_cal_report_req_msg_v01_ei, &req);
  2248. if (ret < 0) {
  2249. qmi_txn_cancel(&txn);
  2250. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2251. ret);
  2252. goto out;
  2253. }
  2254. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2255. if (ret < 0) {
  2256. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2257. ret);
  2258. goto out;
  2259. }
  2260. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2261. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2262. resp.resp.result, resp.resp.error);
  2263. ret = -resp.resp.result;
  2264. goto out;
  2265. }
  2266. out:
  2267. return ret;
  2268. }
  2269. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2270. struct sockaddr_qrtr *sq,
  2271. struct qmi_txn *txn, const void *data)
  2272. {
  2273. struct cnss_plat_data *plat_priv =
  2274. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2275. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2276. struct cnss_cal_info *cal_info;
  2277. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2278. ind->cal_file_upload_size);
  2279. cnss_pr_info("Calibration took %d ms\n",
  2280. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2281. if (!txn) {
  2282. cnss_pr_err("Spurious indication\n");
  2283. return;
  2284. }
  2285. if (ind->cal_file_upload_size_valid)
  2286. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2287. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2288. if (!cal_info)
  2289. return;
  2290. cal_info->cal_status = CNSS_CAL_DONE;
  2291. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2292. 0, cal_info);
  2293. }
  2294. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2295. struct sockaddr_qrtr *sq,
  2296. struct qmi_txn *txn,
  2297. const void *data)
  2298. {
  2299. struct cnss_plat_data *plat_priv =
  2300. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2301. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2302. int i;
  2303. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2304. if (!txn) {
  2305. cnss_pr_err("Spurious indication\n");
  2306. return;
  2307. }
  2308. if (plat_priv->qdss_mem_seg_len) {
  2309. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2310. plat_priv->qdss_mem_seg_len);
  2311. return;
  2312. }
  2313. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2314. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2315. return;
  2316. }
  2317. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2318. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2319. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2320. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2321. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2322. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2323. }
  2324. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2325. 0, NULL);
  2326. }
  2327. /**
  2328. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2329. *
  2330. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2331. * fw memory segment for dumping to file system. Only one type of mem can be
  2332. * saved per indication and is provided in mem seg index 0.
  2333. *
  2334. * Return: None
  2335. */
  2336. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2337. struct sockaddr_qrtr *sq,
  2338. struct qmi_txn *txn,
  2339. const void *data)
  2340. {
  2341. struct cnss_plat_data *plat_priv =
  2342. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2343. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2344. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2345. int i = 0;
  2346. if (!txn || !data) {
  2347. cnss_pr_err("Spurious indication\n");
  2348. return;
  2349. }
  2350. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2351. ind_msg->source, ind_msg->mem_seg_valid,
  2352. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2353. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2354. if (!event_data)
  2355. return;
  2356. event_data->mem_type = ind_msg->mem_seg[0].type;
  2357. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2358. event_data->total_size = ind_msg->total_size;
  2359. if (ind_msg->mem_seg_valid) {
  2360. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2361. cnss_pr_err("Invalid seg len indication\n");
  2362. goto free_event_data;
  2363. }
  2364. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2365. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2366. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2367. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2368. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2369. goto free_event_data;
  2370. }
  2371. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2372. i, ind_msg->mem_seg[i].addr,
  2373. ind_msg->mem_seg[i].size);
  2374. }
  2375. }
  2376. if (ind_msg->file_name_valid)
  2377. strlcpy(event_data->file_name, ind_msg->file_name,
  2378. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2379. if (ind_msg->source == 1) {
  2380. if (!ind_msg->file_name_valid)
  2381. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2382. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2383. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2384. 0, event_data);
  2385. } else {
  2386. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2387. if (!ind_msg->file_name_valid)
  2388. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2389. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2390. } else {
  2391. if (!ind_msg->file_name_valid)
  2392. strlcpy(event_data->file_name, "fw_mem_dump",
  2393. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2394. }
  2395. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2396. 0, event_data);
  2397. }
  2398. return;
  2399. free_event_data:
  2400. kfree(event_data);
  2401. }
  2402. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2403. struct sockaddr_qrtr *sq,
  2404. struct qmi_txn *txn,
  2405. const void *data)
  2406. {
  2407. struct cnss_plat_data *plat_priv =
  2408. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2409. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2410. 0, NULL);
  2411. }
  2412. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2413. struct sockaddr_qrtr *sq,
  2414. struct qmi_txn *txn,
  2415. const void *data)
  2416. {
  2417. struct cnss_plat_data *plat_priv =
  2418. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2419. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2420. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2421. if (!txn) {
  2422. cnss_pr_err("Spurious indication\n");
  2423. return;
  2424. }
  2425. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2426. ind_msg->data_len, ind_msg->type,
  2427. ind_msg->is_last, ind_msg->seq_no);
  2428. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2429. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2430. (void *)ind_msg->data,
  2431. ind_msg->data_len);
  2432. }
  2433. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2434. (struct cnss_plat_data *plat_priv,
  2435. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2436. {
  2437. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2438. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2439. struct qmi_txn txn;
  2440. int ret = 0;
  2441. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2442. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2443. return -EINVAL;
  2444. }
  2445. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2446. if (!req)
  2447. return -ENOMEM;
  2448. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2449. if (!resp) {
  2450. kfree(req);
  2451. return -ENOMEM;
  2452. }
  2453. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2454. req->twt_sta_start = ind_msg->twt_sta_start;
  2455. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2456. req->twt_sta_int = ind_msg->twt_sta_int;
  2457. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2458. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2459. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2460. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2461. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2462. req->twt_sta_dl = req->twt_sta_dl;
  2463. req->twt_sta_config_changed_valid =
  2464. ind_msg->twt_sta_config_changed_valid;
  2465. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2466. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2467. plat_priv->driver_state);
  2468. ret =
  2469. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2470. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2471. resp);
  2472. if (ret < 0) {
  2473. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2474. ret);
  2475. goto out;
  2476. }
  2477. ret =
  2478. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2479. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2480. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2481. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2482. if (ret < 0) {
  2483. qmi_txn_cancel(&txn);
  2484. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2485. goto out;
  2486. }
  2487. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2488. if (ret < 0) {
  2489. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2490. goto out;
  2491. }
  2492. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2493. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2494. resp->resp.result, resp->resp.error);
  2495. ret = -resp->resp.result;
  2496. goto out;
  2497. }
  2498. ret = 0;
  2499. out:
  2500. kfree(req);
  2501. kfree(resp);
  2502. return ret;
  2503. }
  2504. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2505. void *data)
  2506. {
  2507. int ret;
  2508. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2509. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2510. kfree(data);
  2511. return ret;
  2512. }
  2513. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2514. struct sockaddr_qrtr *sq,
  2515. struct qmi_txn *txn,
  2516. const void *data)
  2517. {
  2518. struct cnss_plat_data *plat_priv =
  2519. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2520. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2521. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2522. if (!txn) {
  2523. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2524. return;
  2525. }
  2526. if (!ind_msg) {
  2527. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2528. return;
  2529. }
  2530. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2531. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2532. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2533. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2534. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2535. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2536. ind_msg->twt_sta_config_changed_valid,
  2537. ind_msg->twt_sta_config_changed);
  2538. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2539. if (!event_data)
  2540. return;
  2541. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2542. event_data);
  2543. }
  2544. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2545. {
  2546. .type = QMI_INDICATION,
  2547. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2548. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2549. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2550. .fn = cnss_wlfw_request_mem_ind_cb
  2551. },
  2552. {
  2553. .type = QMI_INDICATION,
  2554. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2555. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2556. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2557. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2558. },
  2559. {
  2560. .type = QMI_INDICATION,
  2561. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2562. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2563. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2564. .fn = cnss_wlfw_fw_ready_ind_cb
  2565. },
  2566. {
  2567. .type = QMI_INDICATION,
  2568. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2569. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2570. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2571. .fn = cnss_wlfw_fw_init_done_ind_cb
  2572. },
  2573. {
  2574. .type = QMI_INDICATION,
  2575. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2576. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2577. .decoded_size =
  2578. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2579. .fn = cnss_wlfw_pin_result_ind_cb
  2580. },
  2581. {
  2582. .type = QMI_INDICATION,
  2583. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2584. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2585. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2586. .fn = cnss_wlfw_cal_done_ind_cb
  2587. },
  2588. {
  2589. .type = QMI_INDICATION,
  2590. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2591. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2592. .decoded_size =
  2593. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2594. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2595. },
  2596. {
  2597. .type = QMI_INDICATION,
  2598. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2599. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2600. .decoded_size =
  2601. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2602. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2603. },
  2604. {
  2605. .type = QMI_INDICATION,
  2606. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2607. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2608. .decoded_size =
  2609. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2610. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2611. },
  2612. {
  2613. .type = QMI_INDICATION,
  2614. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2615. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2616. .decoded_size =
  2617. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2618. .fn = cnss_wlfw_respond_get_info_ind_cb
  2619. },
  2620. {
  2621. .type = QMI_INDICATION,
  2622. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2623. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2624. .decoded_size =
  2625. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2626. .fn = cnss_wlfw_process_twt_cfg_ind
  2627. },
  2628. {}
  2629. };
  2630. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2631. void *data)
  2632. {
  2633. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2634. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2635. struct sockaddr_qrtr sq = { 0 };
  2636. int ret = 0;
  2637. if (!event_data)
  2638. return -EINVAL;
  2639. sq.sq_family = AF_QIPCRTR;
  2640. sq.sq_node = event_data->node;
  2641. sq.sq_port = event_data->port;
  2642. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2643. sizeof(sq), 0);
  2644. if (ret < 0) {
  2645. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2646. goto out;
  2647. }
  2648. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2649. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2650. plat_priv->driver_state);
  2651. kfree(data);
  2652. return 0;
  2653. out:
  2654. CNSS_QMI_ASSERT();
  2655. kfree(data);
  2656. return ret;
  2657. }
  2658. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2659. {
  2660. int ret = 0;
  2661. if (!plat_priv)
  2662. return -ENODEV;
  2663. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2664. cnss_pr_err("Unexpected WLFW server arrive\n");
  2665. CNSS_ASSERT(0);
  2666. return -EINVAL;
  2667. }
  2668. cnss_ignore_qmi_failure(false);
  2669. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2670. if (ret < 0)
  2671. goto out;
  2672. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2673. if (ret < 0) {
  2674. if (ret == -EALREADY)
  2675. ret = 0;
  2676. goto out;
  2677. }
  2678. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2679. if (ret < 0)
  2680. goto out;
  2681. return 0;
  2682. out:
  2683. return ret;
  2684. }
  2685. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2686. {
  2687. int ret;
  2688. if (!plat_priv)
  2689. return -ENODEV;
  2690. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2691. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2692. plat_priv->driver_state);
  2693. cnss_qmi_deinit(plat_priv);
  2694. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2695. ret = cnss_qmi_init(plat_priv);
  2696. if (ret < 0) {
  2697. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2698. CNSS_ASSERT(0);
  2699. }
  2700. return 0;
  2701. }
  2702. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2703. struct qmi_service *service)
  2704. {
  2705. struct cnss_plat_data *plat_priv =
  2706. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2707. struct cnss_qmi_event_server_arrive_data *event_data;
  2708. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2709. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2710. plat_priv->driver_state);
  2711. return 0;
  2712. }
  2713. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2714. service->node, service->port);
  2715. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2716. if (!event_data)
  2717. return -ENOMEM;
  2718. event_data->node = service->node;
  2719. event_data->port = service->port;
  2720. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2721. 0, event_data);
  2722. return 0;
  2723. }
  2724. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2725. struct qmi_service *service)
  2726. {
  2727. struct cnss_plat_data *plat_priv =
  2728. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2729. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2730. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2731. plat_priv->driver_state);
  2732. return;
  2733. }
  2734. cnss_pr_dbg("WLFW server exiting\n");
  2735. if (plat_priv) {
  2736. cnss_ignore_qmi_failure(true);
  2737. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2738. }
  2739. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2740. 0, NULL);
  2741. }
  2742. static struct qmi_ops qmi_wlfw_ops = {
  2743. .new_server = wlfw_new_server,
  2744. .del_server = wlfw_del_server,
  2745. };
  2746. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2747. {
  2748. int ret = 0;
  2749. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2750. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2751. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2752. if (ret < 0) {
  2753. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2754. ret);
  2755. goto out;
  2756. }
  2757. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2758. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2759. if (ret < 0)
  2760. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2761. out:
  2762. return ret;
  2763. }
  2764. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2765. {
  2766. qmi_handle_release(&plat_priv->qmi_wlfw);
  2767. }
  2768. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2769. {
  2770. struct dms_get_mac_address_req_msg_v01 req;
  2771. struct dms_get_mac_address_resp_msg_v01 resp;
  2772. struct qmi_txn txn;
  2773. int ret = 0;
  2774. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2775. cnss_pr_err("DMS QMI connection not established\n");
  2776. return -EINVAL;
  2777. }
  2778. cnss_pr_dbg("Requesting DMS MAC address");
  2779. memset(&resp, 0, sizeof(resp));
  2780. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2781. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2782. if (ret < 0) {
  2783. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2784. ret);
  2785. goto out;
  2786. }
  2787. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2788. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2789. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2790. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2791. dms_get_mac_address_req_msg_v01_ei, &req);
  2792. if (ret < 0) {
  2793. qmi_txn_cancel(&txn);
  2794. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2795. ret);
  2796. goto out;
  2797. }
  2798. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2799. if (ret < 0) {
  2800. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2801. ret);
  2802. goto out;
  2803. }
  2804. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2805. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2806. resp.resp.result, resp.resp.error);
  2807. ret = -resp.resp.result;
  2808. goto out;
  2809. }
  2810. if (!resp.mac_address_valid ||
  2811. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2812. cnss_pr_err("Invalid MAC address received from DMS\n");
  2813. plat_priv->dms.mac_valid = false;
  2814. goto out;
  2815. }
  2816. plat_priv->dms.mac_valid = true;
  2817. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2818. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2819. out:
  2820. return ret;
  2821. }
  2822. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2823. unsigned int node, unsigned int port)
  2824. {
  2825. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2826. struct sockaddr_qrtr sq = {0};
  2827. int ret = 0;
  2828. sq.sq_family = AF_QIPCRTR;
  2829. sq.sq_node = node;
  2830. sq.sq_port = port;
  2831. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2832. sizeof(sq), 0);
  2833. if (ret < 0) {
  2834. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2835. node, port);
  2836. goto out;
  2837. }
  2838. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2839. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2840. plat_priv->driver_state);
  2841. out:
  2842. return ret;
  2843. }
  2844. static int dms_new_server(struct qmi_handle *qmi_dms,
  2845. struct qmi_service *service)
  2846. {
  2847. struct cnss_plat_data *plat_priv =
  2848. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2849. if (!service)
  2850. return -EINVAL;
  2851. return cnss_dms_connect_to_server(plat_priv, service->node,
  2852. service->port);
  2853. }
  2854. static void cnss_dms_server_exit_work(struct work_struct *work)
  2855. {
  2856. int ret;
  2857. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2858. cnss_dms_deinit(plat_priv);
  2859. cnss_pr_info("QMI DMS Server Exit");
  2860. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2861. ret = cnss_dms_init(plat_priv);
  2862. if (ret < 0)
  2863. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2864. }
  2865. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2866. static void dms_del_server(struct qmi_handle *qmi_dms,
  2867. struct qmi_service *service)
  2868. {
  2869. struct cnss_plat_data *plat_priv =
  2870. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2871. if (!plat_priv)
  2872. return;
  2873. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2874. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2875. plat_priv->driver_state);
  2876. return;
  2877. }
  2878. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2879. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2880. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2881. plat_priv->driver_state);
  2882. schedule_work(&cnss_dms_del_work);
  2883. }
  2884. void cnss_cancel_dms_work(void)
  2885. {
  2886. cancel_work_sync(&cnss_dms_del_work);
  2887. }
  2888. static struct qmi_ops qmi_dms_ops = {
  2889. .new_server = dms_new_server,
  2890. .del_server = dms_del_server,
  2891. };
  2892. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2893. {
  2894. int ret = 0;
  2895. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2896. &qmi_dms_ops, NULL);
  2897. if (ret < 0) {
  2898. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2899. goto out;
  2900. }
  2901. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2902. DMS_SERVICE_VERS_V01, 0);
  2903. if (ret < 0)
  2904. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2905. out:
  2906. return ret;
  2907. }
  2908. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2909. {
  2910. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2911. qmi_handle_release(&plat_priv->qmi_dms);
  2912. }
  2913. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2914. {
  2915. int ret;
  2916. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2917. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2918. struct qmi_txn txn;
  2919. if (!plat_priv)
  2920. return -ENODEV;
  2921. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2922. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2923. if (!req)
  2924. return -ENOMEM;
  2925. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2926. if (!resp) {
  2927. kfree(req);
  2928. return -ENOMEM;
  2929. }
  2930. req->antenna = plat_priv->antenna;
  2931. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2932. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2933. if (ret < 0) {
  2934. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2935. ret);
  2936. goto out;
  2937. }
  2938. ret = qmi_send_request
  2939. (&plat_priv->coex_qmi, NULL, &txn,
  2940. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2941. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2942. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2943. if (ret < 0) {
  2944. qmi_txn_cancel(&txn);
  2945. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2946. ret);
  2947. goto out;
  2948. }
  2949. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2950. if (ret < 0) {
  2951. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2952. ret);
  2953. goto out;
  2954. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2955. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2956. resp->resp.result, resp->resp.error);
  2957. ret = -resp->resp.result;
  2958. goto out;
  2959. }
  2960. if (resp->grant_valid)
  2961. plat_priv->grant = resp->grant;
  2962. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2963. kfree(resp);
  2964. kfree(req);
  2965. return 0;
  2966. out:
  2967. kfree(resp);
  2968. kfree(req);
  2969. return ret;
  2970. }
  2971. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2972. {
  2973. int ret;
  2974. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2975. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2976. struct qmi_txn txn;
  2977. if (!plat_priv)
  2978. return -ENODEV;
  2979. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2980. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2981. if (!req)
  2982. return -ENOMEM;
  2983. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2984. if (!resp) {
  2985. kfree(req);
  2986. return -ENOMEM;
  2987. }
  2988. req->antenna = plat_priv->antenna;
  2989. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2990. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2991. if (ret < 0) {
  2992. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2993. ret);
  2994. goto out;
  2995. }
  2996. ret = qmi_send_request
  2997. (&plat_priv->coex_qmi, NULL, &txn,
  2998. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2999. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3000. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3001. if (ret < 0) {
  3002. qmi_txn_cancel(&txn);
  3003. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3004. ret);
  3005. goto out;
  3006. }
  3007. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3008. if (ret < 0) {
  3009. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3010. ret);
  3011. goto out;
  3012. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3013. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3014. resp->resp.result, resp->resp.error);
  3015. ret = -resp->resp.result;
  3016. goto out;
  3017. }
  3018. kfree(resp);
  3019. kfree(req);
  3020. return 0;
  3021. out:
  3022. kfree(resp);
  3023. kfree(req);
  3024. return ret;
  3025. }
  3026. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3027. {
  3028. int ret;
  3029. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3030. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3031. u8 pcss_enabled;
  3032. if (!plat_priv)
  3033. return -ENODEV;
  3034. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3035. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3036. return 0;
  3037. }
  3038. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3039. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3040. req.restart_level_type_valid = 1;
  3041. req.restart_level_type = pcss_enabled;
  3042. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3043. wlfw_subsys_restart_level_req_msg_v01_ei,
  3044. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3045. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3046. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3047. QMI_WLFW_TIMEOUT_JF);
  3048. if (ret < 0)
  3049. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3050. return ret;
  3051. }
  3052. static int coex_new_server(struct qmi_handle *qmi,
  3053. struct qmi_service *service)
  3054. {
  3055. struct cnss_plat_data *plat_priv =
  3056. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3057. struct sockaddr_qrtr sq = { 0 };
  3058. int ret = 0;
  3059. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3060. service->node, service->port);
  3061. sq.sq_family = AF_QIPCRTR;
  3062. sq.sq_node = service->node;
  3063. sq.sq_port = service->port;
  3064. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3065. if (ret < 0) {
  3066. cnss_pr_err("Fail to connect to remote service port\n");
  3067. return ret;
  3068. }
  3069. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3070. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3071. plat_priv->driver_state);
  3072. return 0;
  3073. }
  3074. static void coex_del_server(struct qmi_handle *qmi,
  3075. struct qmi_service *service)
  3076. {
  3077. struct cnss_plat_data *plat_priv =
  3078. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3079. cnss_pr_dbg("COEX server exit\n");
  3080. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3081. }
  3082. static struct qmi_ops coex_qmi_ops = {
  3083. .new_server = coex_new_server,
  3084. .del_server = coex_del_server,
  3085. };
  3086. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3087. { int ret;
  3088. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3089. COEX_SERVICE_MAX_MSG_LEN,
  3090. &coex_qmi_ops, NULL);
  3091. if (ret < 0)
  3092. return ret;
  3093. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3094. COEX_SERVICE_VERS_V01, 0);
  3095. return ret;
  3096. }
  3097. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3098. {
  3099. qmi_handle_release(&plat_priv->coex_qmi);
  3100. }
  3101. /* IMS Service */
  3102. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3103. {
  3104. int ret;
  3105. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3106. struct qmi_txn *txn;
  3107. if (!plat_priv)
  3108. return -ENODEV;
  3109. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3110. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3111. if (!req)
  3112. return -ENOMEM;
  3113. req->wfc_call_status_valid = 1;
  3114. req->wfc_call_status = 1;
  3115. txn = &plat_priv->txn;
  3116. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3117. if (ret < 0) {
  3118. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3119. ret);
  3120. goto out;
  3121. }
  3122. ret = qmi_send_request
  3123. (&plat_priv->ims_qmi, NULL, txn,
  3124. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3125. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3126. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3127. if (ret < 0) {
  3128. qmi_txn_cancel(txn);
  3129. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3130. ret);
  3131. goto out;
  3132. }
  3133. kfree(req);
  3134. return 0;
  3135. out:
  3136. kfree(req);
  3137. return ret;
  3138. }
  3139. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3140. struct sockaddr_qrtr *sq,
  3141. struct qmi_txn *txn,
  3142. const void *data)
  3143. {
  3144. const
  3145. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3146. data;
  3147. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3148. if (!txn) {
  3149. cnss_pr_err("spurious response\n");
  3150. return;
  3151. }
  3152. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3153. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3154. resp->resp.result, resp->resp.error);
  3155. txn->result = -resp->resp.result;
  3156. }
  3157. }
  3158. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3159. void *data)
  3160. {
  3161. int ret;
  3162. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3163. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3164. kfree(data);
  3165. return ret;
  3166. }
  3167. static void
  3168. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3169. struct sockaddr_qrtr *sq,
  3170. struct qmi_txn *txn, const void *data)
  3171. {
  3172. struct cnss_plat_data *plat_priv =
  3173. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3174. const
  3175. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3176. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3177. if (!txn) {
  3178. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3179. return;
  3180. }
  3181. if (!ind_msg) {
  3182. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3183. return;
  3184. }
  3185. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3186. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3187. ind_msg->all_wfc_calls_held,
  3188. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3189. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3190. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3191. ind_msg->media_quality_valid, ind_msg->media_quality);
  3192. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3193. if (!event_data)
  3194. return;
  3195. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3196. 0, event_data);
  3197. }
  3198. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3199. {
  3200. .type = QMI_RESPONSE,
  3201. .msg_id =
  3202. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3203. .ei =
  3204. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3205. .decoded_size = sizeof(struct
  3206. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3207. .fn = ims_subscribe_for_indication_resp_cb
  3208. },
  3209. {
  3210. .type = QMI_INDICATION,
  3211. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3212. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3213. .decoded_size =
  3214. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3215. .fn = cnss_ims_process_wfc_call_ind_cb
  3216. },
  3217. {}
  3218. };
  3219. static int ims_new_server(struct qmi_handle *qmi,
  3220. struct qmi_service *service)
  3221. {
  3222. struct cnss_plat_data *plat_priv =
  3223. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3224. struct sockaddr_qrtr sq = { 0 };
  3225. int ret = 0;
  3226. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3227. service->node, service->port);
  3228. sq.sq_family = AF_QIPCRTR;
  3229. sq.sq_node = service->node;
  3230. sq.sq_port = service->port;
  3231. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3232. if (ret < 0) {
  3233. cnss_pr_err("Fail to connect to remote service port\n");
  3234. return ret;
  3235. }
  3236. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3237. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3238. plat_priv->driver_state);
  3239. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3240. return ret;
  3241. }
  3242. static void ims_del_server(struct qmi_handle *qmi,
  3243. struct qmi_service *service)
  3244. {
  3245. struct cnss_plat_data *plat_priv =
  3246. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3247. cnss_pr_dbg("IMS server exit\n");
  3248. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3249. }
  3250. static struct qmi_ops ims_qmi_ops = {
  3251. .new_server = ims_new_server,
  3252. .del_server = ims_del_server,
  3253. };
  3254. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3255. { int ret;
  3256. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3257. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3258. &ims_qmi_ops, qmi_ims_msg_handlers);
  3259. if (ret < 0)
  3260. return ret;
  3261. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3262. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3263. return ret;
  3264. }
  3265. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3266. {
  3267. qmi_handle_release(&plat_priv->ims_qmi);
  3268. }