dp_rx.c 67 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  41. {
  42. return vdev->ap_bridge_enabled;
  43. }
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  46. void *ring_desc, struct dp_rx_desc *rx_desc)
  47. {
  48. void *hal_soc = soc->hal_soc;
  49. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  50. dp_rx_desc_dump(rx_desc);
  51. }
  52. #else
  53. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  54. hal_ring_desc_t ring_desc,
  55. struct dp_rx_desc *rx_desc)
  56. {
  57. void *hal_soc = soc->hal_soc;
  58. dp_rx_desc_dump(rx_desc);
  59. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  60. hal_srng_dump_ring(hal_soc, hal_ring);
  61. qdf_assert_always(0);
  62. }
  63. #endif
  64. /*
  65. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  66. * called during dp rx initialization
  67. * and at the end of dp_rx_process.
  68. *
  69. * @soc: core txrx main context
  70. * @mac_id: mac_id which is one of 3 mac_ids
  71. * @dp_rxdma_srng: dp rxdma circular ring
  72. * @rx_desc_pool: Pointer to free Rx descriptor pool
  73. * @num_req_buffers: number of buffer to be replenished
  74. * @desc_list: list of descs if called from dp_rx_process
  75. * or NULL during dp rx initialization or out of buffer
  76. * interrupt.
  77. * @tail: tail of descs list
  78. * Return: return success or failure
  79. */
  80. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  81. struct dp_srng *dp_rxdma_srng,
  82. struct rx_desc_pool *rx_desc_pool,
  83. uint32_t num_req_buffers,
  84. union dp_rx_desc_list_elem_t **desc_list,
  85. union dp_rx_desc_list_elem_t **tail)
  86. {
  87. uint32_t num_alloc_desc;
  88. uint16_t num_desc_to_free = 0;
  89. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  90. uint32_t num_entries_avail;
  91. uint32_t count;
  92. int sync_hw_ptr = 1;
  93. qdf_dma_addr_t paddr;
  94. qdf_nbuf_t rx_netbuf;
  95. void *rxdma_ring_entry;
  96. union dp_rx_desc_list_elem_t *next;
  97. QDF_STATUS ret;
  98. void *rxdma_srng;
  99. rxdma_srng = dp_rxdma_srng->hal_srng;
  100. if (!rxdma_srng) {
  101. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  102. "rxdma srng not initialized");
  103. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  104. return QDF_STATUS_E_FAILURE;
  105. }
  106. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  107. "requested %d buffers for replenish", num_req_buffers);
  108. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  109. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  110. rxdma_srng,
  111. sync_hw_ptr);
  112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  113. "no of available entries in rxdma ring: %d",
  114. num_entries_avail);
  115. if (!(*desc_list) && (num_entries_avail >
  116. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  117. num_req_buffers = num_entries_avail;
  118. } else if (num_entries_avail < num_req_buffers) {
  119. num_desc_to_free = num_req_buffers - num_entries_avail;
  120. num_req_buffers = num_entries_avail;
  121. }
  122. if (qdf_unlikely(!num_req_buffers)) {
  123. num_desc_to_free = num_req_buffers;
  124. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  125. goto free_descs;
  126. }
  127. /*
  128. * if desc_list is NULL, allocate the descs from freelist
  129. */
  130. if (!(*desc_list)) {
  131. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  132. rx_desc_pool,
  133. num_req_buffers,
  134. desc_list,
  135. tail);
  136. if (!num_alloc_desc) {
  137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  138. "no free rx_descs in freelist");
  139. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  140. num_req_buffers);
  141. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  142. return QDF_STATUS_E_NOMEM;
  143. }
  144. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  145. "%d rx desc allocated", num_alloc_desc);
  146. num_req_buffers = num_alloc_desc;
  147. }
  148. count = 0;
  149. while (count < num_req_buffers) {
  150. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  151. RX_BUFFER_SIZE,
  152. RX_BUFFER_RESERVATION,
  153. RX_BUFFER_ALIGNMENT,
  154. FALSE);
  155. if (qdf_unlikely(!rx_netbuf)) {
  156. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  157. break;
  158. }
  159. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  160. QDF_DMA_FROM_DEVICE);
  161. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  162. qdf_nbuf_free(rx_netbuf);
  163. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  164. continue;
  165. }
  166. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  167. /*
  168. * check if the physical address of nbuf->data is
  169. * less then 0x50000000 then free the nbuf and try
  170. * allocating new nbuf. We can try for 100 times.
  171. * this is a temp WAR till we fix it properly.
  172. */
  173. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  174. if (ret == QDF_STATUS_E_FAILURE) {
  175. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  176. break;
  177. }
  178. count++;
  179. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  180. rxdma_srng);
  181. qdf_assert_always(rxdma_ring_entry);
  182. next = (*desc_list)->next;
  183. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  184. /* rx_desc.in_use should be zero at this time*/
  185. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  186. (*desc_list)->rx_desc.in_use = 1;
  187. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  188. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  189. (unsigned long long)paddr,
  190. (*desc_list)->rx_desc.cookie);
  191. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  192. (*desc_list)->rx_desc.cookie,
  193. rx_desc_pool->owner);
  194. *desc_list = next;
  195. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  196. }
  197. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  198. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  199. count, num_desc_to_free);
  200. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  201. (RX_BUFFER_SIZE * count));
  202. free_descs:
  203. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  204. /*
  205. * add any available free desc back to the free list
  206. */
  207. if (*desc_list)
  208. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  209. mac_id, rx_desc_pool);
  210. return QDF_STATUS_SUCCESS;
  211. }
  212. /*
  213. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  214. * pkts to RAW mode simulation to
  215. * decapsulate the pkt.
  216. *
  217. * @vdev: vdev on which RAW mode is enabled
  218. * @nbuf_list: list of RAW pkts to process
  219. * @peer: peer object from which the pkt is rx
  220. *
  221. * Return: void
  222. */
  223. void
  224. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  225. struct dp_peer *peer)
  226. {
  227. qdf_nbuf_t deliver_list_head = NULL;
  228. qdf_nbuf_t deliver_list_tail = NULL;
  229. qdf_nbuf_t nbuf;
  230. nbuf = nbuf_list;
  231. while (nbuf) {
  232. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  233. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  234. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  235. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  236. /*
  237. * reset the chfrag_start and chfrag_end bits in nbuf cb
  238. * as this is a non-amsdu pkt and RAW mode simulation expects
  239. * these bit s to be 0 for non-amsdu pkt.
  240. */
  241. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  242. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  243. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  244. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  245. }
  246. nbuf = next;
  247. }
  248. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  249. &deliver_list_tail, (struct cdp_peer*) peer);
  250. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  251. }
  252. #ifdef DP_LFR
  253. /*
  254. * In case of LFR, data of a new peer might be sent up
  255. * even before peer is added.
  256. */
  257. static inline struct dp_vdev *
  258. dp_get_vdev_from_peer(struct dp_soc *soc,
  259. uint16_t peer_id,
  260. struct dp_peer *peer,
  261. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  262. {
  263. struct dp_vdev *vdev;
  264. uint8_t vdev_id;
  265. if (unlikely(!peer)) {
  266. if (peer_id != HTT_INVALID_PEER) {
  267. vdev_id = DP_PEER_METADATA_ID_GET(
  268. mpdu_desc_info.peer_meta_data);
  269. QDF_TRACE(QDF_MODULE_ID_DP,
  270. QDF_TRACE_LEVEL_DEBUG,
  271. FL("PeerID %d not found use vdevID %d"),
  272. peer_id, vdev_id);
  273. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  274. vdev_id);
  275. } else {
  276. QDF_TRACE(QDF_MODULE_ID_DP,
  277. QDF_TRACE_LEVEL_DEBUG,
  278. FL("Invalid PeerID %d"),
  279. peer_id);
  280. return NULL;
  281. }
  282. } else {
  283. vdev = peer->vdev;
  284. }
  285. return vdev;
  286. }
  287. #else
  288. static inline struct dp_vdev *
  289. dp_get_vdev_from_peer(struct dp_soc *soc,
  290. uint16_t peer_id,
  291. struct dp_peer *peer,
  292. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  293. {
  294. if (unlikely(!peer)) {
  295. QDF_TRACE(QDF_MODULE_ID_DP,
  296. QDF_TRACE_LEVEL_DEBUG,
  297. FL("Peer not found for peerID %d"),
  298. peer_id);
  299. return NULL;
  300. } else {
  301. return peer->vdev;
  302. }
  303. }
  304. #endif
  305. #ifndef FEATURE_WDS
  306. static void
  307. dp_rx_da_learn(struct dp_soc *soc,
  308. uint8_t *rx_tlv_hdr,
  309. struct dp_peer *ta_peer,
  310. qdf_nbuf_t nbuf)
  311. {
  312. }
  313. #endif
  314. /*
  315. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  316. *
  317. * @soc: core txrx main context
  318. * @ta_peer : source peer entry
  319. * @rx_tlv_hdr : start address of rx tlvs
  320. * @nbuf : nbuf that has to be intrabss forwarded
  321. *
  322. * Return: bool: true if it is forwarded else false
  323. */
  324. static bool
  325. dp_rx_intrabss_fwd(struct dp_soc *soc,
  326. struct dp_peer *ta_peer,
  327. uint8_t *rx_tlv_hdr,
  328. qdf_nbuf_t nbuf)
  329. {
  330. uint16_t da_idx;
  331. uint16_t len;
  332. uint8_t is_frag;
  333. struct dp_peer *da_peer;
  334. struct dp_ast_entry *ast_entry;
  335. qdf_nbuf_t nbuf_copy;
  336. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  337. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  338. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  339. tid_stats.tid_rx_stats[ring_id][tid];
  340. /* check if the destination peer is available in peer table
  341. * and also check if the source peer and destination peer
  342. * belong to the same vap and destination peer is not bss peer.
  343. */
  344. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  345. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  346. ast_entry = soc->ast_table[da_idx];
  347. if (!ast_entry)
  348. return false;
  349. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  350. ast_entry->is_active = TRUE;
  351. return false;
  352. }
  353. da_peer = ast_entry->peer;
  354. if (!da_peer)
  355. return false;
  356. /* TA peer cannot be same as peer(DA) on which AST is present
  357. * this indicates a change in topology and that AST entries
  358. * are yet to be updated.
  359. */
  360. if (da_peer == ta_peer)
  361. return false;
  362. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  363. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  364. is_frag = qdf_nbuf_is_frag(nbuf);
  365. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  366. /* linearize the nbuf just before we send to
  367. * dp_tx_send()
  368. */
  369. if (qdf_unlikely(is_frag)) {
  370. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  371. return false;
  372. nbuf = qdf_nbuf_unshare(nbuf);
  373. if (!nbuf) {
  374. DP_STATS_INC_PKT(ta_peer,
  375. rx.intra_bss.fail,
  376. 1,
  377. len);
  378. /* return true even though the pkt is
  379. * not forwarded. Basically skb_unshare
  380. * failed and we want to continue with
  381. * next nbuf.
  382. */
  383. tid_stats->fail_cnt[INTRABSS_DROP]++;
  384. return true;
  385. }
  386. }
  387. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  388. nbuf)) {
  389. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  390. len);
  391. return true;
  392. } else {
  393. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  394. len);
  395. tid_stats->fail_cnt[INTRABSS_DROP]++;
  396. return false;
  397. }
  398. }
  399. }
  400. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  401. * source, then clone the pkt and send the cloned pkt for
  402. * intra BSS forwarding and original pkt up the network stack
  403. * Note: how do we handle multicast pkts. do we forward
  404. * all multicast pkts as is or let a higher layer module
  405. * like igmpsnoop decide whether to forward or not with
  406. * Mcast enhancement.
  407. */
  408. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  409. !ta_peer->bss_peer))) {
  410. nbuf_copy = qdf_nbuf_copy(nbuf);
  411. if (!nbuf_copy)
  412. return false;
  413. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  414. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  415. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  416. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  417. tid_stats->fail_cnt[INTRABSS_DROP]++;
  418. qdf_nbuf_free(nbuf_copy);
  419. } else {
  420. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  421. tid_stats->intrabss_cnt++;
  422. }
  423. }
  424. /* return false as we have to still send the original pkt
  425. * up the stack
  426. */
  427. return false;
  428. }
  429. #ifdef MESH_MODE_SUPPORT
  430. /**
  431. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  432. *
  433. * @vdev: DP Virtual device handle
  434. * @nbuf: Buffer pointer
  435. * @rx_tlv_hdr: start of rx tlv header
  436. * @peer: pointer to peer
  437. *
  438. * This function allocated memory for mesh receive stats and fill the
  439. * required stats. Stores the memory address in skb cb.
  440. *
  441. * Return: void
  442. */
  443. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  444. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  445. {
  446. struct mesh_recv_hdr_s *rx_info = NULL;
  447. uint32_t pkt_type;
  448. uint32_t nss;
  449. uint32_t rate_mcs;
  450. uint32_t bw;
  451. /* fill recv mesh stats */
  452. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  453. /* upper layers are resposible to free this memory */
  454. if (!rx_info) {
  455. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  456. "Memory allocation failed for mesh rx stats");
  457. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  458. return;
  459. }
  460. rx_info->rs_flags = MESH_RXHDR_VER1;
  461. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  462. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  463. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  464. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  465. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  466. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  467. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  468. if (vdev->osif_get_key)
  469. vdev->osif_get_key(vdev->osif_vdev,
  470. &rx_info->rs_decryptkey[0],
  471. &peer->mac_addr.raw[0],
  472. rx_info->rs_keyix);
  473. }
  474. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  475. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  476. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  477. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  478. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  479. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  480. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  481. (bw << 24);
  482. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  483. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  484. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  485. rx_info->rs_flags,
  486. rx_info->rs_rssi,
  487. rx_info->rs_channel,
  488. rx_info->rs_ratephy1,
  489. rx_info->rs_keyix);
  490. }
  491. /**
  492. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  493. *
  494. * @vdev: DP Virtual device handle
  495. * @nbuf: Buffer pointer
  496. * @rx_tlv_hdr: start of rx tlv header
  497. *
  498. * This checks if the received packet is matching any filter out
  499. * catogery and and drop the packet if it matches.
  500. *
  501. * Return: status(0 indicates drop, 1 indicate to no drop)
  502. */
  503. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  504. uint8_t *rx_tlv_hdr)
  505. {
  506. union dp_align_mac_addr mac_addr;
  507. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  508. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  509. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  510. return QDF_STATUS_SUCCESS;
  511. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  512. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  513. return QDF_STATUS_SUCCESS;
  514. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  515. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  516. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  517. return QDF_STATUS_SUCCESS;
  518. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  519. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  520. &mac_addr.raw[0]))
  521. return QDF_STATUS_E_FAILURE;
  522. if (!qdf_mem_cmp(&mac_addr.raw[0],
  523. &vdev->mac_addr.raw[0],
  524. QDF_MAC_ADDR_SIZE))
  525. return QDF_STATUS_SUCCESS;
  526. }
  527. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  528. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  529. &mac_addr.raw[0]))
  530. return QDF_STATUS_E_FAILURE;
  531. if (!qdf_mem_cmp(&mac_addr.raw[0],
  532. &vdev->mac_addr.raw[0],
  533. QDF_MAC_ADDR_SIZE))
  534. return QDF_STATUS_SUCCESS;
  535. }
  536. }
  537. return QDF_STATUS_E_FAILURE;
  538. }
  539. #else
  540. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  541. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  542. {
  543. }
  544. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  545. uint8_t *rx_tlv_hdr)
  546. {
  547. return QDF_STATUS_E_FAILURE;
  548. }
  549. #endif
  550. #ifdef FEATURE_NAC_RSSI
  551. /**
  552. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  553. * clients
  554. * @pdev: DP pdev handle
  555. * @rx_pkt_hdr: Rx packet Header
  556. *
  557. * return: dp_vdev*
  558. */
  559. static
  560. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  561. uint8_t *rx_pkt_hdr)
  562. {
  563. struct ieee80211_frame *wh;
  564. struct dp_neighbour_peer *peer = NULL;
  565. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  566. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  567. return NULL;
  568. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  569. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  570. neighbour_peer_list_elem) {
  571. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  572. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  573. QDF_TRACE(
  574. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  575. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  576. peer->neighbour_peers_macaddr.raw[0],
  577. peer->neighbour_peers_macaddr.raw[1],
  578. peer->neighbour_peers_macaddr.raw[2],
  579. peer->neighbour_peers_macaddr.raw[3],
  580. peer->neighbour_peers_macaddr.raw[4],
  581. peer->neighbour_peers_macaddr.raw[5]);
  582. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  583. return pdev->monitor_vdev;
  584. }
  585. }
  586. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  587. return NULL;
  588. }
  589. /**
  590. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  591. * @soc: DP SOC handle
  592. * @mpdu: mpdu for which peer is invalid
  593. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  594. * pool_id has same mapping)
  595. *
  596. * return: integer type
  597. */
  598. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  599. uint8_t mac_id)
  600. {
  601. struct dp_invalid_peer_msg msg;
  602. struct dp_vdev *vdev = NULL;
  603. struct dp_pdev *pdev = NULL;
  604. struct ieee80211_frame *wh;
  605. qdf_nbuf_t curr_nbuf, next_nbuf;
  606. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  607. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  608. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  609. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  610. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  611. "Drop decapped frames");
  612. goto free;
  613. }
  614. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  615. if (!DP_FRAME_IS_DATA(wh)) {
  616. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  617. "NAWDS valid only for data frames");
  618. goto free;
  619. }
  620. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  622. "Invalid nbuf length");
  623. goto free;
  624. }
  625. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  626. if (!pdev) {
  627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  628. "PDEV not found");
  629. goto free;
  630. }
  631. if (pdev->filter_neighbour_peers) {
  632. /* Next Hop scenario not yet handle */
  633. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  634. if (vdev) {
  635. dp_rx_mon_deliver(soc, pdev->pdev_id,
  636. pdev->invalid_peer_head_msdu,
  637. pdev->invalid_peer_tail_msdu);
  638. pdev->invalid_peer_head_msdu = NULL;
  639. pdev->invalid_peer_tail_msdu = NULL;
  640. return 0;
  641. }
  642. }
  643. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  644. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  645. QDF_MAC_ADDR_SIZE) == 0) {
  646. goto out;
  647. }
  648. }
  649. if (!vdev) {
  650. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  651. "VDEV not found");
  652. goto free;
  653. }
  654. out:
  655. msg.wh = wh;
  656. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  657. msg.nbuf = mpdu;
  658. msg.vdev_id = vdev->vdev_id;
  659. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  660. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  661. &msg);
  662. free:
  663. /* Drop and free packet */
  664. curr_nbuf = mpdu;
  665. while (curr_nbuf) {
  666. next_nbuf = qdf_nbuf_next(curr_nbuf);
  667. qdf_nbuf_free(curr_nbuf);
  668. curr_nbuf = next_nbuf;
  669. }
  670. return 0;
  671. }
  672. /**
  673. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  674. * @soc: DP SOC handle
  675. * @mpdu: mpdu for which peer is invalid
  676. * @mpdu_done: if an mpdu is completed
  677. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  678. * pool_id has same mapping)
  679. *
  680. * return: integer type
  681. */
  682. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  683. qdf_nbuf_t mpdu, bool mpdu_done,
  684. uint8_t mac_id)
  685. {
  686. /* Only trigger the process when mpdu is completed */
  687. if (mpdu_done)
  688. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  689. }
  690. #else
  691. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  692. uint8_t mac_id)
  693. {
  694. qdf_nbuf_t curr_nbuf, next_nbuf;
  695. struct dp_pdev *pdev;
  696. struct dp_vdev *vdev = NULL;
  697. struct ieee80211_frame *wh;
  698. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  699. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  700. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  701. if (!DP_FRAME_IS_DATA(wh)) {
  702. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  703. "only for data frames");
  704. goto free;
  705. }
  706. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  707. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  708. "Invalid nbuf length");
  709. goto free;
  710. }
  711. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  712. if (!pdev) {
  713. QDF_TRACE(QDF_MODULE_ID_DP,
  714. QDF_TRACE_LEVEL_ERROR,
  715. "PDEV not found");
  716. goto free;
  717. }
  718. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  719. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  720. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  721. QDF_MAC_ADDR_SIZE) == 0) {
  722. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  723. goto out;
  724. }
  725. }
  726. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  727. if (!vdev) {
  728. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  729. "VDEV not found");
  730. goto free;
  731. }
  732. out:
  733. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  734. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  735. free:
  736. /* reset the head and tail pointers */
  737. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  738. if (pdev) {
  739. pdev->invalid_peer_head_msdu = NULL;
  740. pdev->invalid_peer_tail_msdu = NULL;
  741. }
  742. /* Drop and free packet */
  743. curr_nbuf = mpdu;
  744. while (curr_nbuf) {
  745. next_nbuf = qdf_nbuf_next(curr_nbuf);
  746. qdf_nbuf_free(curr_nbuf);
  747. curr_nbuf = next_nbuf;
  748. }
  749. return 0;
  750. }
  751. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  752. qdf_nbuf_t mpdu, bool mpdu_done,
  753. uint8_t mac_id)
  754. {
  755. /* Process the nbuf */
  756. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  757. }
  758. #endif
  759. #ifdef RECEIVE_OFFLOAD
  760. /**
  761. * dp_rx_print_offload_info() - Print offload info from RX TLV
  762. * @rx_tlv: RX TLV for which offload information is to be printed
  763. *
  764. * Return: None
  765. */
  766. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  767. {
  768. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  769. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  770. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  771. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  772. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  773. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  774. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  775. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  776. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  777. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  778. dp_verbose_debug("---------------------------------------------------------");
  779. }
  780. /**
  781. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  782. * @soc: DP SOC handle
  783. * @rx_tlv: RX TLV received for the msdu
  784. * @msdu: msdu for which GRO info needs to be filled
  785. *
  786. * Return: None
  787. */
  788. static
  789. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  790. qdf_nbuf_t msdu)
  791. {
  792. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  793. return;
  794. /* Filling up RX offload info only for TCP packets */
  795. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  796. return;
  797. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  798. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  799. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  800. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  801. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  802. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  803. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  804. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  805. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  806. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  807. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  808. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  809. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  810. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  811. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  812. HAL_RX_TLV_GET_IPV6(rx_tlv);
  813. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  814. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  815. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  816. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  817. dp_rx_print_offload_info(rx_tlv);
  818. }
  819. #else
  820. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  821. qdf_nbuf_t msdu)
  822. {
  823. }
  824. #endif /* RECEIVE_OFFLOAD */
  825. /**
  826. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  827. *
  828. * @nbuf: pointer to msdu.
  829. * @mpdu_len: mpdu length
  830. *
  831. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  832. */
  833. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  834. {
  835. bool last_nbuf;
  836. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  837. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  838. last_nbuf = false;
  839. } else {
  840. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  841. last_nbuf = true;
  842. }
  843. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  844. return last_nbuf;
  845. }
  846. /**
  847. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  848. * multiple nbufs.
  849. * @nbuf: pointer to the first msdu of an amsdu.
  850. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  851. *
  852. *
  853. * This function implements the creation of RX frag_list for cases
  854. * where an MSDU is spread across multiple nbufs.
  855. *
  856. * Return: returns the head nbuf which contains complete frag_list.
  857. */
  858. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  859. {
  860. qdf_nbuf_t parent, next, frag_list;
  861. uint16_t frag_list_len = 0;
  862. uint16_t mpdu_len;
  863. bool last_nbuf;
  864. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  865. /*
  866. * this is a case where the complete msdu fits in one single nbuf.
  867. * in this case HW sets both start and end bit and we only need to
  868. * reset these bits for RAW mode simulator to decap the pkt
  869. */
  870. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  871. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  872. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  873. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  874. return nbuf;
  875. }
  876. /*
  877. * This is a case where we have multiple msdus (A-MSDU) spread across
  878. * multiple nbufs. here we create a fraglist out of these nbufs.
  879. *
  880. * the moment we encounter a nbuf with continuation bit set we
  881. * know for sure we have an MSDU which is spread across multiple
  882. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  883. */
  884. parent = nbuf;
  885. frag_list = nbuf->next;
  886. nbuf = nbuf->next;
  887. /*
  888. * set the start bit in the first nbuf we encounter with continuation
  889. * bit set. This has the proper mpdu length set as it is the first
  890. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  891. * nbufs will form the frag_list of the parent nbuf.
  892. */
  893. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  894. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  895. /*
  896. * this is where we set the length of the fragments which are
  897. * associated to the parent nbuf. We iterate through the frag_list
  898. * till we hit the last_nbuf of the list.
  899. */
  900. do {
  901. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  902. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  903. frag_list_len += qdf_nbuf_len(nbuf);
  904. if (last_nbuf) {
  905. next = nbuf->next;
  906. nbuf->next = NULL;
  907. break;
  908. }
  909. nbuf = nbuf->next;
  910. } while (!last_nbuf);
  911. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  912. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  913. parent->next = next;
  914. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  915. return parent;
  916. }
  917. /**
  918. * dp_rx_compute_delay() - Compute and fill in all timestamps
  919. * to pass in correct fields
  920. *
  921. * @vdev: pdev handle
  922. * @tx_desc: tx descriptor
  923. * @tid: tid value
  924. * Return: none
  925. */
  926. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  927. {
  928. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  929. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  930. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  931. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  932. uint32_t interframe_delay =
  933. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  934. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  935. CDP_DELAY_STATS_REAP_STACK, ring_id);
  936. /*
  937. * Update interframe delay stats calculated at deliver_data_ol point.
  938. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  939. * interframe delay will not be calculate correctly for 1st frame.
  940. * On the other side, this will help in avoiding extra per packet check
  941. * of vdev->prev_rx_deliver_tstamp.
  942. */
  943. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  944. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  945. vdev->prev_rx_deliver_tstamp = current_ts;
  946. }
  947. /**
  948. * dp_rx_drop_nbuf_list() - drop an nbuf list
  949. * @pdev: dp pdev reference
  950. * @buf_list: buffer list to be dropepd
  951. *
  952. * Return: int (number of bufs dropped)
  953. */
  954. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  955. qdf_nbuf_t buf_list)
  956. {
  957. struct cdp_tid_rx_stats *stats = NULL;
  958. uint8_t tid = 0, ring_id = 0;
  959. int num_dropped = 0;
  960. qdf_nbuf_t buf, next_buf;
  961. buf = buf_list;
  962. while (buf) {
  963. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  964. next_buf = qdf_nbuf_queue_next(buf);
  965. tid = qdf_nbuf_get_tid_val(buf);
  966. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  967. stats->fail_cnt[INVALID_PEER_VDEV]++;
  968. stats->delivered_to_stack--;
  969. qdf_nbuf_free(buf);
  970. buf = next_buf;
  971. num_dropped++;
  972. }
  973. return num_dropped;
  974. }
  975. #ifdef PEER_CACHE_RX_PKTS
  976. /**
  977. * dp_rx_flush_rx_cached() - flush cached rx frames
  978. * @peer: peer
  979. * @drop: flag to drop frames or forward to net stack
  980. *
  981. * Return: None
  982. */
  983. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  984. {
  985. struct dp_peer_cached_bufq *bufqi;
  986. struct dp_rx_cached_buf *cache_buf = NULL;
  987. ol_txrx_rx_fp data_rx = NULL;
  988. int num_buff_elem;
  989. QDF_STATUS status;
  990. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  991. qdf_atomic_dec(&peer->flush_in_progress);
  992. return;
  993. }
  994. qdf_spin_lock_bh(&peer->peer_info_lock);
  995. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  996. data_rx = peer->vdev->osif_rx;
  997. else
  998. drop = true;
  999. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1000. bufqi = &peer->bufq_info;
  1001. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1002. qdf_list_remove_front(&bufqi->cached_bufq,
  1003. (qdf_list_node_t **)&cache_buf);
  1004. while (cache_buf) {
  1005. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1006. cache_buf->buf);
  1007. bufqi->entries -= num_buff_elem;
  1008. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1009. if (drop) {
  1010. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1011. cache_buf->buf);
  1012. } else {
  1013. /* Flush the cached frames to OSIF DEV */
  1014. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1015. if (status != QDF_STATUS_SUCCESS)
  1016. bufqi->dropped = dp_rx_drop_nbuf_list(
  1017. peer->vdev->pdev,
  1018. cache_buf->buf);
  1019. }
  1020. qdf_mem_free(cache_buf);
  1021. cache_buf = NULL;
  1022. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1023. qdf_list_remove_front(&bufqi->cached_bufq,
  1024. (qdf_list_node_t **)&cache_buf);
  1025. }
  1026. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1027. qdf_atomic_dec(&peer->flush_in_progress);
  1028. }
  1029. /**
  1030. * dp_rx_enqueue_rx() - cache rx frames
  1031. * @peer: peer
  1032. * @rx_buf_list: cache buffer list
  1033. *
  1034. * Return: None
  1035. */
  1036. static QDF_STATUS
  1037. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1038. {
  1039. struct dp_rx_cached_buf *cache_buf;
  1040. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1041. int num_buff_elem;
  1042. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1043. bufqi->entries, bufqi->dropped);
  1044. if (!peer->valid) {
  1045. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1046. rx_buf_list);
  1047. return QDF_STATUS_E_INVAL;
  1048. }
  1049. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1050. if (bufqi->entries >= bufqi->thresh) {
  1051. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1052. rx_buf_list);
  1053. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1054. return QDF_STATUS_E_RESOURCES;
  1055. }
  1056. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1057. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1058. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1059. if (!cache_buf) {
  1060. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1061. "Failed to allocate buf to cache rx frames");
  1062. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1063. rx_buf_list);
  1064. return QDF_STATUS_E_NOMEM;
  1065. }
  1066. cache_buf->buf = rx_buf_list;
  1067. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1068. qdf_list_insert_back(&bufqi->cached_bufq,
  1069. &cache_buf->node);
  1070. bufqi->entries += num_buff_elem;
  1071. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1072. return QDF_STATUS_SUCCESS;
  1073. }
  1074. static inline
  1075. bool dp_rx_is_peer_cache_bufq_supported(void)
  1076. {
  1077. return true;
  1078. }
  1079. #else
  1080. static inline
  1081. bool dp_rx_is_peer_cache_bufq_supported(void)
  1082. {
  1083. return false;
  1084. }
  1085. static inline QDF_STATUS
  1086. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1087. {
  1088. return QDF_STATUS_SUCCESS;
  1089. }
  1090. #endif
  1091. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1092. struct dp_peer *peer,
  1093. qdf_nbuf_t nbuf_head,
  1094. qdf_nbuf_t nbuf_tail)
  1095. {
  1096. /*
  1097. * highly unlikely to have a vdev without a registered rx
  1098. * callback function. if so let us free the nbuf_list.
  1099. */
  1100. if (qdf_unlikely(!vdev->osif_rx)) {
  1101. if (dp_rx_is_peer_cache_bufq_supported())
  1102. dp_rx_enqueue_rx(peer, nbuf_head);
  1103. else
  1104. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1105. return;
  1106. }
  1107. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1108. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1109. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1110. &nbuf_tail, (struct cdp_peer *) peer);
  1111. }
  1112. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1113. }
  1114. /**
  1115. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1116. * @nbuf: pointer to the first msdu of an amsdu.
  1117. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1118. *
  1119. * The ipsumed field of the skb is set based on whether HW validated the
  1120. * IP/TCP/UDP checksum.
  1121. *
  1122. * Return: void
  1123. */
  1124. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1125. qdf_nbuf_t nbuf,
  1126. uint8_t *rx_tlv_hdr)
  1127. {
  1128. qdf_nbuf_rx_cksum_t cksum = {0};
  1129. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1130. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1131. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1132. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1133. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1134. } else {
  1135. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1136. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1137. }
  1138. }
  1139. /**
  1140. * dp_rx_msdu_stats_update() - update per msdu stats.
  1141. * @soc: core txrx main context
  1142. * @nbuf: pointer to the first msdu of an amsdu.
  1143. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1144. * @peer: pointer to the peer object.
  1145. * @ring_id: reo dest ring number on which pkt is reaped.
  1146. * @tid_stats: per tid rx stats.
  1147. *
  1148. * update all the per msdu stats for that nbuf.
  1149. * Return: void
  1150. */
  1151. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1152. qdf_nbuf_t nbuf,
  1153. uint8_t *rx_tlv_hdr,
  1154. struct dp_peer *peer,
  1155. uint8_t ring_id,
  1156. struct cdp_tid_rx_stats *tid_stats)
  1157. {
  1158. bool is_ampdu, is_not_amsdu;
  1159. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1160. struct dp_vdev *vdev = peer->vdev;
  1161. qdf_ether_header_t *eh;
  1162. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1163. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1164. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1165. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1166. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1167. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1168. tid_stats->msdu_cnt++;
  1169. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1170. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1171. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1172. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1173. tid_stats->mcast_msdu_cnt++;
  1174. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1175. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1176. tid_stats->bcast_msdu_cnt++;
  1177. }
  1178. }
  1179. /*
  1180. * currently we can return from here as we have similar stats
  1181. * updated at per ppdu level instead of msdu level
  1182. */
  1183. if (!soc->process_rx_status)
  1184. return;
  1185. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1186. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1187. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1188. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1189. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1190. tid = qdf_nbuf_get_tid_val(nbuf);
  1191. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1192. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1193. rx_tlv_hdr);
  1194. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1195. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1196. DP_STATS_INC(peer, rx.bw[bw], 1);
  1197. /*
  1198. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1199. * then increase index [nss - 1] in array counter.
  1200. */
  1201. if (nss > 0 && (pkt_type == DOT11_N ||
  1202. pkt_type == DOT11_AC ||
  1203. pkt_type == DOT11_AX))
  1204. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1205. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1206. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1207. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1208. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1209. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1210. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1211. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1212. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1213. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1214. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1215. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1216. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1217. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1218. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1219. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1220. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1221. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1222. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1223. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1224. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1225. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1226. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1227. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1228. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1229. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1230. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1231. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1232. if ((soc->process_rx_status) &&
  1233. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1234. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1235. if (!vdev->pdev)
  1236. return;
  1237. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1238. &peer->stats, peer->peer_ids[0],
  1239. UPDATE_PEER_STATS,
  1240. vdev->pdev->pdev_id);
  1241. #endif
  1242. }
  1243. }
  1244. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1245. uint8_t *rx_tlv_hdr,
  1246. qdf_nbuf_t nbuf)
  1247. {
  1248. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1249. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1250. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1251. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1252. qdf_nbuf_is_da_valid(nbuf) &&
  1253. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1254. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1255. return false;
  1256. return true;
  1257. }
  1258. #ifndef WDS_VENDOR_EXTENSION
  1259. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1260. struct dp_vdev *vdev,
  1261. struct dp_peer *peer)
  1262. {
  1263. return 1;
  1264. }
  1265. #endif
  1266. #ifdef RX_DESC_DEBUG_CHECK
  1267. /**
  1268. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1269. * corruption
  1270. *
  1271. * @ring_desc: REO ring descriptor
  1272. * @rx_desc: Rx descriptor
  1273. *
  1274. * Return: NONE
  1275. */
  1276. static inline
  1277. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1278. struct dp_rx_desc *rx_desc)
  1279. {
  1280. struct hal_buf_info hbi;
  1281. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1282. /* Sanity check for possible buffer paddr corruption */
  1283. qdf_assert_always((&hbi)->paddr ==
  1284. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1285. }
  1286. #else
  1287. static inline
  1288. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1289. struct dp_rx_desc *rx_desc)
  1290. {
  1291. }
  1292. #endif
  1293. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1294. static inline
  1295. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1296. {
  1297. bool limit_hit = false;
  1298. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1299. limit_hit =
  1300. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1301. if (limit_hit)
  1302. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1303. return limit_hit;
  1304. }
  1305. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1306. {
  1307. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1308. }
  1309. #else
  1310. static inline
  1311. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1312. {
  1313. return false;
  1314. }
  1315. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1316. {
  1317. return false;
  1318. }
  1319. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1320. /**
  1321. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1322. *
  1323. * @nbuf: pkt skb pointer
  1324. *
  1325. * Return: true if matched, false if not
  1326. */
  1327. static inline
  1328. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1329. {
  1330. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1331. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1332. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1333. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1334. return true;
  1335. else
  1336. return false;
  1337. }
  1338. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1339. /**
  1340. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1341. * no corresbonding peer found
  1342. * @soc: core txrx main context
  1343. * @nbuf: pkt skb pointer
  1344. *
  1345. * This function will try to deliver some RX special frames to stack
  1346. * even there is no peer matched found. for instance, LFR case, some
  1347. * eapol data will be sent to host before peer_map done.
  1348. *
  1349. * Return: None
  1350. */
  1351. static inline
  1352. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1353. {
  1354. uint32_t peer_mdata;
  1355. uint16_t peer_id;
  1356. uint8_t vdev_id;
  1357. struct dp_vdev *vdev;
  1358. uint32_t l2_hdr_offset = 0;
  1359. uint16_t msdu_len = 0;
  1360. uint32_t pkt_len = 0;
  1361. uint8_t *rx_tlv_hdr;
  1362. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1363. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1364. if (peer_id > soc->max_peers)
  1365. goto deliver_fail;
  1366. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1367. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1368. if (!vdev || !vdev->osif_rx)
  1369. goto deliver_fail;
  1370. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1371. l2_hdr_offset =
  1372. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1373. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1374. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1375. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1376. qdf_nbuf_pull_head(nbuf,
  1377. RX_PKT_TLVS_LEN +
  1378. l2_hdr_offset);
  1379. /* only allow special frames */
  1380. if (!dp_is_special_data(nbuf))
  1381. goto deliver_fail;
  1382. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1383. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1384. return;
  1385. deliver_fail:
  1386. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1387. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1388. qdf_nbuf_free(nbuf);
  1389. }
  1390. #else
  1391. static inline
  1392. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1393. {
  1394. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1395. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1396. qdf_nbuf_free(nbuf);
  1397. }
  1398. #endif
  1399. /**
  1400. * dp_rx_process() - Brain of the Rx processing functionality
  1401. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1402. * @soc: core txrx main context
  1403. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1404. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1405. * @quota: No. of units (packets) that can be serviced in one shot.
  1406. *
  1407. * This function implements the core of Rx functionality. This is
  1408. * expected to handle only non-error frames.
  1409. *
  1410. * Return: uint32_t: No. of elements processed
  1411. */
  1412. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1413. uint8_t reo_ring_num, uint32_t quota)
  1414. {
  1415. void *hal_soc;
  1416. hal_ring_desc_t ring_desc;
  1417. struct dp_rx_desc *rx_desc = NULL;
  1418. qdf_nbuf_t nbuf, next;
  1419. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1420. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1421. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1422. uint32_t l2_hdr_offset = 0;
  1423. uint16_t msdu_len = 0;
  1424. uint16_t peer_id;
  1425. struct dp_peer *peer;
  1426. struct dp_vdev *vdev;
  1427. uint32_t pkt_len = 0;
  1428. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1429. struct hal_rx_msdu_desc_info msdu_desc_info;
  1430. enum hal_reo_error_status error;
  1431. uint32_t peer_mdata;
  1432. uint8_t *rx_tlv_hdr;
  1433. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1434. uint8_t mac_id = 0;
  1435. struct dp_pdev *pdev;
  1436. struct dp_pdev *rx_pdev;
  1437. struct dp_srng *dp_rxdma_srng;
  1438. struct rx_desc_pool *rx_desc_pool;
  1439. struct dp_soc *soc = int_ctx->soc;
  1440. uint8_t ring_id = 0;
  1441. uint8_t core_id = 0;
  1442. struct cdp_tid_rx_stats *tid_stats;
  1443. qdf_nbuf_t nbuf_head;
  1444. qdf_nbuf_t nbuf_tail;
  1445. qdf_nbuf_t deliver_list_head;
  1446. qdf_nbuf_t deliver_list_tail;
  1447. uint32_t num_rx_bufs_reaped = 0;
  1448. uint32_t intr_id;
  1449. struct hif_opaque_softc *scn;
  1450. int32_t tid = 0;
  1451. bool is_prev_msdu_last = true;
  1452. uint32_t num_entries_avail = 0;
  1453. DP_HIST_INIT();
  1454. qdf_assert_always(soc && hal_ring);
  1455. hal_soc = soc->hal_soc;
  1456. qdf_assert_always(hal_soc);
  1457. scn = soc->hif_handle;
  1458. hif_pm_runtime_mark_last_busy(scn);
  1459. intr_id = int_ctx->dp_intr_id;
  1460. more_data:
  1461. /* reset local variables here to be re-used in the function */
  1462. nbuf_head = NULL;
  1463. nbuf_tail = NULL;
  1464. deliver_list_head = NULL;
  1465. deliver_list_tail = NULL;
  1466. peer = NULL;
  1467. vdev = NULL;
  1468. num_rx_bufs_reaped = 0;
  1469. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1470. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1471. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1472. qdf_mem_zero(head, sizeof(head));
  1473. qdf_mem_zero(tail, sizeof(tail));
  1474. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring))) {
  1475. /*
  1476. * Need API to convert from hal_ring pointer to
  1477. * Ring Type / Ring Id combo
  1478. */
  1479. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1480. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1481. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1482. goto done;
  1483. }
  1484. /*
  1485. * start reaping the buffers from reo ring and queue
  1486. * them in per vdev queue.
  1487. * Process the received pkts in a different per vdev loop.
  1488. */
  1489. while (qdf_likely(quota &&
  1490. (ring_desc = hal_srng_dst_peek(hal_soc, hal_ring)))) {
  1491. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1492. ring_id = hal_srng_ring_id_get(hal_ring);
  1493. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1494. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1495. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1496. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1497. /* Don't know how to deal with this -- assert */
  1498. qdf_assert(0);
  1499. }
  1500. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1501. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1502. qdf_assert(rx_desc);
  1503. /*
  1504. * this is a unlikely scenario where the host is reaping
  1505. * a descriptor which it already reaped just a while ago
  1506. * but is yet to replenish it back to HW.
  1507. * In this case host will dump the last 128 descriptors
  1508. * including the software descriptor rx_desc and assert.
  1509. */
  1510. if (qdf_unlikely(!rx_desc->in_use)) {
  1511. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1512. dp_info_rl("Reaping rx_desc not in use!");
  1513. dp_rx_dump_info_and_assert(soc, hal_ring,
  1514. ring_desc, rx_desc);
  1515. /* ignore duplicate RX desc and continue to process */
  1516. /* Pop out the descriptor */
  1517. hal_srng_dst_get_next(hal_soc, hal_ring);
  1518. continue;
  1519. }
  1520. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1521. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1522. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1523. dp_rx_dump_info_and_assert(soc, hal_ring,
  1524. ring_desc, rx_desc);
  1525. }
  1526. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1527. /* TODO */
  1528. /*
  1529. * Need a separate API for unmapping based on
  1530. * phyiscal address
  1531. */
  1532. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1533. QDF_DMA_FROM_DEVICE);
  1534. rx_desc->unmapped = 1;
  1535. core_id = smp_processor_id();
  1536. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1537. /* Get MPDU DESC info */
  1538. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1539. /* Get MSDU DESC info */
  1540. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1541. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1542. HAL_MPDU_F_RAW_AMPDU)) {
  1543. /* previous msdu has end bit set, so current one is
  1544. * the new MPDU
  1545. */
  1546. if (is_prev_msdu_last) {
  1547. is_prev_msdu_last = false;
  1548. /* Get number of entries available in HW ring */
  1549. num_entries_avail =
  1550. hal_srng_dst_num_valid(hal_soc, hal_ring, 1);
  1551. /* For new MPDU check if we can read complete
  1552. * MPDU by comparing the number of buffers
  1553. * available and number of buffers needed to
  1554. * reap this MPDU
  1555. */
  1556. if (((msdu_desc_info.msdu_len /
  1557. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1558. num_entries_avail)
  1559. break;
  1560. } else {
  1561. if (msdu_desc_info.msdu_flags &
  1562. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1563. is_prev_msdu_last = true;
  1564. }
  1565. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1566. }
  1567. /* Pop out the descriptor*/
  1568. hal_srng_dst_get_next(hal_soc, hal_ring);
  1569. rx_bufs_reaped[rx_desc->pool_id]++;
  1570. peer_mdata = mpdu_desc_info.peer_meta_data;
  1571. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1572. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1573. /*
  1574. * save msdu flags first, last and continuation msdu in
  1575. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1576. * length to nbuf->cb. This ensures the info required for
  1577. * per pkt processing is always in the same cache line.
  1578. * This helps in improving throughput for smaller pkt
  1579. * sizes.
  1580. */
  1581. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1582. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1583. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1584. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1585. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1586. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1587. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1588. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1589. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1590. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1591. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1592. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1593. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1594. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1595. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1596. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1597. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1598. /*
  1599. * if continuation bit is set then we have MSDU spread
  1600. * across multiple buffers, let us not decrement quota
  1601. * till we reap all buffers of that MSDU.
  1602. */
  1603. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1604. quota -= 1;
  1605. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1606. &tail[rx_desc->pool_id],
  1607. rx_desc);
  1608. num_rx_bufs_reaped++;
  1609. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1610. break;
  1611. }
  1612. done:
  1613. dp_srng_access_end(int_ctx, soc, hal_ring);
  1614. if (nbuf_tail)
  1615. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1616. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1617. /*
  1618. * continue with next mac_id if no pkts were reaped
  1619. * from that pool
  1620. */
  1621. if (!rx_bufs_reaped[mac_id])
  1622. continue;
  1623. pdev = soc->pdev_list[mac_id];
  1624. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1625. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1626. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1627. rx_desc_pool, rx_bufs_reaped[mac_id],
  1628. &head[mac_id], &tail[mac_id]);
  1629. }
  1630. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1631. /* Peer can be NULL is case of LFR */
  1632. if (qdf_likely(peer))
  1633. vdev = NULL;
  1634. /*
  1635. * BIG loop where each nbuf is dequeued from global queue,
  1636. * processed and queued back on a per vdev basis. These nbufs
  1637. * are sent to stack as and when we run out of nbufs
  1638. * or a new nbuf dequeued from global queue has a different
  1639. * vdev when compared to previous nbuf.
  1640. */
  1641. nbuf = nbuf_head;
  1642. while (nbuf) {
  1643. next = nbuf->next;
  1644. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1645. /* Get TID from struct cb->tid_val, save to tid */
  1646. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1647. tid = qdf_nbuf_get_tid_val(nbuf);
  1648. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1649. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1650. peer = dp_peer_find_by_id(soc, peer_id);
  1651. if (peer) {
  1652. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1653. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1654. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1655. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1656. QDF_NBUF_RX_PKT_DATA_TRACK;
  1657. }
  1658. rx_bufs_used++;
  1659. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1660. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1661. deliver_list_tail);
  1662. deliver_list_head = NULL;
  1663. deliver_list_tail = NULL;
  1664. }
  1665. if (qdf_likely(peer)) {
  1666. vdev = peer->vdev;
  1667. } else {
  1668. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1669. nbuf = next;
  1670. continue;
  1671. }
  1672. if (qdf_unlikely(!vdev)) {
  1673. qdf_nbuf_free(nbuf);
  1674. nbuf = next;
  1675. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1676. dp_peer_unref_del_find_by_id(peer);
  1677. continue;
  1678. }
  1679. rx_pdev = vdev->pdev;
  1680. DP_RX_TID_SAVE(nbuf, tid);
  1681. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1682. qdf_nbuf_set_timestamp(nbuf);
  1683. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1684. tid_stats =
  1685. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1686. /*
  1687. * Check if DMA completed -- msdu_done is the last bit
  1688. * to be written
  1689. */
  1690. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1691. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1692. dp_err("MSDU DONE failure");
  1693. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1694. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1695. QDF_TRACE_LEVEL_INFO);
  1696. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1697. qdf_nbuf_free(nbuf);
  1698. qdf_assert(0);
  1699. nbuf = next;
  1700. continue;
  1701. }
  1702. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1703. /*
  1704. * First IF condition:
  1705. * 802.11 Fragmented pkts are reinjected to REO
  1706. * HW block as SG pkts and for these pkts we only
  1707. * need to pull the RX TLVS header length.
  1708. * Second IF condition:
  1709. * The below condition happens when an MSDU is spread
  1710. * across multiple buffers. This can happen in two cases
  1711. * 1. The nbuf size is smaller then the received msdu.
  1712. * ex: we have set the nbuf size to 2048 during
  1713. * nbuf_alloc. but we received an msdu which is
  1714. * 2304 bytes in size then this msdu is spread
  1715. * across 2 nbufs.
  1716. *
  1717. * 2. AMSDUs when RAW mode is enabled.
  1718. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1719. * across 1st nbuf and 2nd nbuf and last MSDU is
  1720. * spread across 2nd nbuf and 3rd nbuf.
  1721. *
  1722. * for these scenarios let us create a skb frag_list and
  1723. * append these buffers till the last MSDU of the AMSDU
  1724. * Third condition:
  1725. * This is the most likely case, we receive 802.3 pkts
  1726. * decapsulated by HW, here we need to set the pkt length.
  1727. */
  1728. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1729. bool is_mcbc, is_sa_vld, is_da_vld;
  1730. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1731. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1732. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1733. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1734. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1735. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1736. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1737. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1738. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1739. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1740. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1741. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1742. next = nbuf->next;
  1743. } else {
  1744. l2_hdr_offset =
  1745. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1746. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1747. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1748. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1749. qdf_nbuf_pull_head(nbuf,
  1750. RX_PKT_TLVS_LEN +
  1751. l2_hdr_offset);
  1752. }
  1753. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1754. QDF_TRACE(QDF_MODULE_ID_DP,
  1755. QDF_TRACE_LEVEL_ERROR,
  1756. FL("Policy Check Drop pkt"));
  1757. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1758. /* Drop & free packet */
  1759. qdf_nbuf_free(nbuf);
  1760. /* Statistics */
  1761. nbuf = next;
  1762. dp_peer_unref_del_find_by_id(peer);
  1763. continue;
  1764. }
  1765. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1766. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1767. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1768. false))) {
  1769. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1770. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1771. qdf_nbuf_free(nbuf);
  1772. nbuf = next;
  1773. dp_peer_unref_del_find_by_id(peer);
  1774. continue;
  1775. }
  1776. if (soc->process_rx_status)
  1777. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1778. /* Update the protocol tag in SKB based on CCE metadata */
  1779. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1780. reo_ring_num, false, true);
  1781. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1782. ring_id, tid_stats);
  1783. if (qdf_unlikely(vdev->mesh_vdev)) {
  1784. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1785. == QDF_STATUS_SUCCESS) {
  1786. QDF_TRACE(QDF_MODULE_ID_DP,
  1787. QDF_TRACE_LEVEL_INFO_MED,
  1788. FL("mesh pkt filtered"));
  1789. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1790. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1791. 1);
  1792. qdf_nbuf_free(nbuf);
  1793. nbuf = next;
  1794. dp_peer_unref_del_find_by_id(peer);
  1795. continue;
  1796. }
  1797. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1798. }
  1799. if (qdf_likely(vdev->rx_decap_type ==
  1800. htt_cmn_pkt_type_ethernet) &&
  1801. qdf_likely(!vdev->mesh_vdev)) {
  1802. /* WDS Destination Address Learning */
  1803. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1804. /* Due to HW issue, sometimes we see that the sa_idx
  1805. * and da_idx are invalid with sa_valid and da_valid
  1806. * bits set
  1807. *
  1808. * in this case we also see that value of
  1809. * sa_sw_peer_id is set as 0
  1810. *
  1811. * Drop the packet if sa_idx and da_idx OOB or
  1812. * sa_sw_peerid is 0
  1813. */
  1814. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1815. qdf_nbuf_free(nbuf);
  1816. nbuf = next;
  1817. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1818. dp_peer_unref_del_find_by_id(peer);
  1819. continue;
  1820. }
  1821. /* WDS Source Port Learning */
  1822. if (qdf_likely(vdev->wds_enabled))
  1823. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1824. peer, nbuf);
  1825. /* Intrabss-fwd */
  1826. if (dp_rx_check_ap_bridge(vdev))
  1827. if (dp_rx_intrabss_fwd(soc,
  1828. peer,
  1829. rx_tlv_hdr,
  1830. nbuf)) {
  1831. nbuf = next;
  1832. dp_peer_unref_del_find_by_id(peer);
  1833. tid_stats->intrabss_cnt++;
  1834. continue; /* Get next desc */
  1835. }
  1836. }
  1837. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1838. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1839. DP_RX_LIST_APPEND(deliver_list_head,
  1840. deliver_list_tail,
  1841. nbuf);
  1842. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1843. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1844. tid_stats->delivered_to_stack++;
  1845. nbuf = next;
  1846. dp_peer_unref_del_find_by_id(peer);
  1847. }
  1848. if (deliver_list_head && peer)
  1849. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1850. deliver_list_tail);
  1851. if (dp_rx_enable_eol_data_check(soc)) {
  1852. if (quota &&
  1853. hal_srng_dst_peek_sync_locked(soc, hal_ring)) {
  1854. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1855. if (!hif_exec_should_yield(scn, intr_id))
  1856. goto more_data;
  1857. }
  1858. }
  1859. /* Update histogram statistics by looping through pdev's */
  1860. DP_RX_HIST_STATS_PER_PDEV();
  1861. return rx_bufs_used; /* Assume no scale factor for now */
  1862. }
  1863. /**
  1864. * dp_rx_detach() - detach dp rx
  1865. * @pdev: core txrx pdev context
  1866. *
  1867. * This function will detach DP RX into main device context
  1868. * will free DP Rx resources.
  1869. *
  1870. * Return: void
  1871. */
  1872. void
  1873. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1874. {
  1875. uint8_t pdev_id = pdev->pdev_id;
  1876. struct dp_soc *soc = pdev->soc;
  1877. struct rx_desc_pool *rx_desc_pool;
  1878. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1879. if (rx_desc_pool->pool_size != 0) {
  1880. if (!dp_is_soc_reinit(soc))
  1881. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1882. rx_desc_pool);
  1883. else
  1884. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1885. }
  1886. return;
  1887. }
  1888. static QDF_STATUS
  1889. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1890. struct dp_pdev *dp_pdev)
  1891. {
  1892. qdf_dma_addr_t paddr;
  1893. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1894. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1895. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1896. FALSE);
  1897. if (!(*nbuf)) {
  1898. dp_err("nbuf alloc failed");
  1899. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1900. return ret;
  1901. }
  1902. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1903. QDF_DMA_FROM_DEVICE);
  1904. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1905. qdf_nbuf_free(*nbuf);
  1906. dp_err("nbuf map failed");
  1907. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1908. return ret;
  1909. }
  1910. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1911. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1912. if (ret == QDF_STATUS_E_FAILURE) {
  1913. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1914. QDF_DMA_FROM_DEVICE);
  1915. qdf_nbuf_free(*nbuf);
  1916. dp_err("nbuf check x86 failed");
  1917. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1918. return ret;
  1919. }
  1920. return QDF_STATUS_SUCCESS;
  1921. }
  1922. QDF_STATUS
  1923. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1924. struct dp_srng *dp_rxdma_srng,
  1925. struct rx_desc_pool *rx_desc_pool,
  1926. uint32_t num_req_buffers)
  1927. {
  1928. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1929. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1930. union dp_rx_desc_list_elem_t *next;
  1931. void *rxdma_ring_entry;
  1932. qdf_dma_addr_t paddr;
  1933. qdf_nbuf_t *rx_nbuf_arr;
  1934. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1935. uint32_t buffer_index, nbuf_ptrs_per_page;
  1936. qdf_nbuf_t nbuf;
  1937. QDF_STATUS ret;
  1938. int page_idx, total_pages;
  1939. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1940. union dp_rx_desc_list_elem_t *tail = NULL;
  1941. if (qdf_unlikely(!rxdma_srng)) {
  1942. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1943. return QDF_STATUS_E_FAILURE;
  1944. }
  1945. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1946. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1947. num_req_buffers, &desc_list, &tail);
  1948. if (!nr_descs) {
  1949. dp_err("no free rx_descs in freelist");
  1950. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1951. return QDF_STATUS_E_NOMEM;
  1952. }
  1953. dp_debug("got %u RX descs for driver attach", nr_descs);
  1954. /*
  1955. * Try to allocate pointers to the nbuf one page at a time.
  1956. * Take pointers that can fit in one page of memory and
  1957. * iterate through the total descriptors that need to be
  1958. * allocated in order of pages. Reuse the pointers that
  1959. * have been allocated to fit in one page across each
  1960. * iteration to index into the nbuf.
  1961. */
  1962. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1963. /*
  1964. * Add an extra page to store the remainder if any
  1965. */
  1966. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1967. total_pages++;
  1968. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1969. if (!rx_nbuf_arr) {
  1970. dp_err("failed to allocate nbuf array");
  1971. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1972. QDF_BUG(0);
  1973. return QDF_STATUS_E_NOMEM;
  1974. }
  1975. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1976. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1977. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1978. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1979. /*
  1980. * The last page of buffer pointers may not be required
  1981. * completely based on the number of descriptors. Below
  1982. * check will ensure we are allocating only the
  1983. * required number of descriptors.
  1984. */
  1985. if (nr_nbuf_total >= nr_descs)
  1986. break;
  1987. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1988. &rx_nbuf_arr[nr_nbuf],
  1989. dp_pdev);
  1990. if (QDF_IS_STATUS_ERROR(ret))
  1991. break;
  1992. nr_nbuf_total++;
  1993. }
  1994. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1995. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1996. rxdma_ring_entry =
  1997. hal_srng_src_get_next(dp_soc->hal_soc,
  1998. rxdma_srng);
  1999. qdf_assert_always(rxdma_ring_entry);
  2000. next = desc_list->next;
  2001. nbuf = rx_nbuf_arr[buffer_index];
  2002. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2003. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2004. desc_list->rx_desc.in_use = 1;
  2005. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2006. desc_list->rx_desc.cookie,
  2007. rx_desc_pool->owner);
  2008. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2009. desc_list = next;
  2010. }
  2011. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2012. }
  2013. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2014. qdf_mem_free(rx_nbuf_arr);
  2015. if (!nr_nbuf_total) {
  2016. dp_err("No nbuf's allocated");
  2017. QDF_BUG(0);
  2018. return QDF_STATUS_E_RESOURCES;
  2019. }
  2020. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2021. RX_BUFFER_SIZE * nr_nbuf_total);
  2022. return QDF_STATUS_SUCCESS;
  2023. }
  2024. /**
  2025. * dp_rx_attach() - attach DP RX
  2026. * @pdev: core txrx pdev context
  2027. *
  2028. * This function will attach a DP RX instance into the main
  2029. * device (SOC) context. Will allocate dp rx resource and
  2030. * initialize resources.
  2031. *
  2032. * Return: QDF_STATUS_SUCCESS: success
  2033. * QDF_STATUS_E_RESOURCES: Error return
  2034. */
  2035. QDF_STATUS
  2036. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2037. {
  2038. uint8_t pdev_id = pdev->pdev_id;
  2039. struct dp_soc *soc = pdev->soc;
  2040. uint32_t rxdma_entries;
  2041. struct dp_srng *dp_rxdma_srng;
  2042. struct rx_desc_pool *rx_desc_pool;
  2043. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2044. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2045. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2046. return QDF_STATUS_SUCCESS;
  2047. }
  2048. pdev = soc->pdev_list[pdev_id];
  2049. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2050. rxdma_entries = dp_rxdma_srng->num_entries;
  2051. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2052. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2053. dp_rx_desc_pool_alloc(soc, pdev_id,
  2054. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2055. rx_desc_pool);
  2056. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2057. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2058. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2059. rx_desc_pool, rxdma_entries - 1);
  2060. }
  2061. /*
  2062. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2063. * @soc: core txrx main context
  2064. * @pdev: core txrx pdev context
  2065. *
  2066. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2067. * until retry times reaches max threshold or succeeded.
  2068. *
  2069. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2070. */
  2071. qdf_nbuf_t
  2072. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2073. {
  2074. uint8_t *buf;
  2075. int32_t nbuf_retry_count;
  2076. QDF_STATUS ret;
  2077. qdf_nbuf_t nbuf = NULL;
  2078. for (nbuf_retry_count = 0; nbuf_retry_count <
  2079. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2080. nbuf_retry_count++) {
  2081. /* Allocate a new skb */
  2082. nbuf = qdf_nbuf_alloc(soc->osdev,
  2083. RX_BUFFER_SIZE,
  2084. RX_BUFFER_RESERVATION,
  2085. RX_BUFFER_ALIGNMENT,
  2086. FALSE);
  2087. if (!nbuf) {
  2088. DP_STATS_INC(pdev,
  2089. replenish.nbuf_alloc_fail, 1);
  2090. continue;
  2091. }
  2092. buf = qdf_nbuf_data(nbuf);
  2093. memset(buf, 0, RX_BUFFER_SIZE);
  2094. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2095. QDF_DMA_FROM_DEVICE);
  2096. /* nbuf map failed */
  2097. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2098. qdf_nbuf_free(nbuf);
  2099. DP_STATS_INC(pdev, replenish.map_err, 1);
  2100. continue;
  2101. }
  2102. /* qdf_nbuf alloc and map succeeded */
  2103. break;
  2104. }
  2105. /* qdf_nbuf still alloc or map failed */
  2106. if (qdf_unlikely(nbuf_retry_count >=
  2107. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2108. return NULL;
  2109. return nbuf;
  2110. }