main.c 131 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  135. *plat_dev)
  136. {
  137. int i;
  138. if (!plat_dev) {
  139. for (i = 0; i < plat_env_count; i++) {
  140. if (plat_env[i])
  141. return plat_env[i];
  142. }
  143. }
  144. return NULL;
  145. }
  146. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  147. {
  148. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  149. plat_env[plat_priv->plat_idx] = NULL;
  150. plat_env_count--;
  151. }
  152. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  153. {
  154. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  155. "wlan_%d", plat_priv->plat_idx);
  156. return 0;
  157. }
  158. static int cnss_plat_env_available(void)
  159. {
  160. int ret = 0;
  161. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  162. cnss_pr_err("ERROR: No space to store plat_priv\n");
  163. ret = -ENOMEM;
  164. }
  165. return ret;
  166. }
  167. int cnss_get_plat_env_count(void)
  168. {
  169. return plat_env_count;
  170. }
  171. struct cnss_plat_data *cnss_get_plat_env(int index)
  172. {
  173. return plat_env[index];
  174. }
  175. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  176. {
  177. int i;
  178. for (i = 0; i < plat_env_count; i++) {
  179. if (plat_env[i]->rc_num == rc_num)
  180. return plat_env[i];
  181. }
  182. return NULL;
  183. }
  184. static inline int
  185. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  186. {
  187. return of_property_read_u32(plat_priv->dev_node,
  188. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  189. }
  190. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  191. {
  192. int ret = 0;
  193. ret = cnss_get_qrtr_node_id(plat_priv);
  194. if (ret) {
  195. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  196. plat_priv->qrtr_node_id = 0;
  197. plat_priv->wlfw_service_instance_id = 0;
  198. } else {
  199. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  200. QRTR_NODE_FW_ID_BASE;
  201. cnss_pr_dbg("service_instance_id=0x%x\n",
  202. plat_priv->wlfw_service_instance_id);
  203. }
  204. }
  205. static inline int
  206. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  207. {
  208. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  209. "qcom,pld_bus_ops_name",
  210. &plat_priv->pld_bus_ops_name);
  211. }
  212. #else
  213. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  214. struct cnss_plat_data *plat_priv)
  215. {
  216. plat_env = plat_priv;
  217. }
  218. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  219. {
  220. return plat_env;
  221. }
  222. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  223. {
  224. plat_env = NULL;
  225. }
  226. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  227. {
  228. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  229. "wlan");
  230. return 0;
  231. }
  232. static int cnss_plat_env_available(void)
  233. {
  234. return 0;
  235. }
  236. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  237. {
  238. return cnss_bus_dev_to_plat_priv(NULL);
  239. }
  240. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  241. {
  242. }
  243. static int
  244. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  245. {
  246. return 0;
  247. }
  248. #endif
  249. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  250. {
  251. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  252. "qcom,sleep-clk-support");
  253. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  254. plat_priv->sleep_clk);
  255. }
  256. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,no-bwscale");
  260. }
  261. static inline int
  262. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  263. {
  264. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  265. "qcom,wlan-rc-num", &plat_priv->rc_num);
  266. }
  267. bool cnss_is_dual_wlan_enabled(void)
  268. {
  269. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  270. }
  271. /**
  272. * cnss_get_mem_seg_count - Get segment count of memory
  273. * @type: memory type
  274. * @seg: segment count
  275. *
  276. * Return: 0 on success, negative value on failure
  277. */
  278. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  279. {
  280. struct cnss_plat_data *plat_priv;
  281. plat_priv = cnss_get_plat_priv(NULL);
  282. if (!plat_priv)
  283. return -ENODEV;
  284. switch (type) {
  285. case CNSS_REMOTE_MEM_TYPE_FW:
  286. *seg = plat_priv->fw_mem_seg_len;
  287. break;
  288. case CNSS_REMOTE_MEM_TYPE_QDSS:
  289. *seg = plat_priv->qdss_mem_seg_len;
  290. break;
  291. default:
  292. return -EINVAL;
  293. }
  294. return 0;
  295. }
  296. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  297. /**
  298. * cnss_get_wifi_kobject -return wifi kobject
  299. * Return: Null, to maintain driver comnpatibilty
  300. */
  301. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  302. {
  303. struct cnss_plat_data *plat_priv;
  304. plat_priv = cnss_get_plat_priv(NULL);
  305. if (!plat_priv)
  306. return NULL;
  307. return plat_priv->wifi_kobj;
  308. }
  309. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  310. /**
  311. * cnss_get_mem_segment_info - Get memory info of different type
  312. * @type: memory type
  313. * @segment: array to save the segment info
  314. * @seg: segment count
  315. *
  316. * Return: 0 on success, negative value on failure
  317. */
  318. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  319. struct cnss_mem_segment segment[],
  320. u32 segment_count)
  321. {
  322. struct cnss_plat_data *plat_priv;
  323. u32 i;
  324. plat_priv = cnss_get_plat_priv(NULL);
  325. if (!plat_priv)
  326. return -ENODEV;
  327. switch (type) {
  328. case CNSS_REMOTE_MEM_TYPE_FW:
  329. if (segment_count > plat_priv->fw_mem_seg_len)
  330. segment_count = plat_priv->fw_mem_seg_len;
  331. for (i = 0; i < segment_count; i++) {
  332. segment[i].size = plat_priv->fw_mem[i].size;
  333. segment[i].va = plat_priv->fw_mem[i].va;
  334. segment[i].pa = plat_priv->fw_mem[i].pa;
  335. }
  336. break;
  337. case CNSS_REMOTE_MEM_TYPE_QDSS:
  338. if (segment_count > plat_priv->qdss_mem_seg_len)
  339. segment_count = plat_priv->qdss_mem_seg_len;
  340. for (i = 0; i < segment_count; i++) {
  341. segment[i].size = plat_priv->qdss_mem[i].size;
  342. segment[i].va = plat_priv->qdss_mem[i].va;
  343. segment[i].pa = plat_priv->qdss_mem[i].pa;
  344. }
  345. break;
  346. default:
  347. return -EINVAL;
  348. }
  349. return 0;
  350. }
  351. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  352. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  353. {
  354. struct device_node *audio_ion_node;
  355. struct platform_device *audio_ion_pdev;
  356. audio_ion_node = of_find_compatible_node(NULL, NULL,
  357. "qcom,msm-audio-ion");
  358. if (!audio_ion_node) {
  359. cnss_pr_err("Unable to get Audio ion node");
  360. return -EINVAL;
  361. }
  362. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  363. of_node_put(audio_ion_node);
  364. if (!audio_ion_pdev) {
  365. cnss_pr_err("Unable to get Audio ion platform device");
  366. return -EINVAL;
  367. }
  368. plat_priv->audio_iommu_domain =
  369. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  370. put_device(&audio_ion_pdev->dev);
  371. if (!plat_priv->audio_iommu_domain) {
  372. cnss_pr_err("Unable to get Audio ion iommu domain");
  373. return -EINVAL;
  374. }
  375. return 0;
  376. }
  377. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  378. enum cnss_feature_v01 feature)
  379. {
  380. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  381. return -EINVAL;
  382. plat_priv->feature_list |= 1 << feature;
  383. return 0;
  384. }
  385. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  386. enum cnss_feature_v01 feature)
  387. {
  388. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  389. return -EINVAL;
  390. plat_priv->feature_list &= ~(1 << feature);
  391. return 0;
  392. }
  393. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  394. u64 *feature_list)
  395. {
  396. if (unlikely(!plat_priv))
  397. return -EINVAL;
  398. *feature_list = plat_priv->feature_list;
  399. return 0;
  400. }
  401. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  402. {
  403. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  404. return;
  405. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  406. plat_priv->driver_state,
  407. atomic_read(&plat_priv->pm_count));
  408. pm_stay_awake(&plat_priv->plat_dev->dev);
  409. }
  410. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  411. {
  412. int r = atomic_dec_return(&plat_priv->pm_count);
  413. WARN_ON(r < 0);
  414. if (r != 0)
  415. return;
  416. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  417. plat_priv->driver_state,
  418. atomic_read(&plat_priv->pm_count));
  419. pm_relax(&plat_priv->plat_dev->dev);
  420. }
  421. int cnss_get_fw_files_for_target(struct device *dev,
  422. struct cnss_fw_files *pfw_files,
  423. u32 target_type, u32 target_version)
  424. {
  425. if (!pfw_files)
  426. return -ENODEV;
  427. switch (target_version) {
  428. case QCA6174_REV3_VERSION:
  429. case QCA6174_REV3_2_VERSION:
  430. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  431. break;
  432. default:
  433. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  434. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  435. target_type, target_version);
  436. break;
  437. }
  438. return 0;
  439. }
  440. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  441. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  442. {
  443. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  444. if (!plat_priv)
  445. return -ENODEV;
  446. if (!cap)
  447. return -EINVAL;
  448. *cap = plat_priv->cap;
  449. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  450. return 0;
  451. }
  452. EXPORT_SYMBOL(cnss_get_platform_cap);
  453. /**
  454. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  455. * @dev: Device
  456. * @fw_cap: FW Capability which needs to be checked
  457. *
  458. * Return: TRUE if supported, FALSE on failure or if not supported
  459. */
  460. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  461. {
  462. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  463. bool is_supported = false;
  464. if (!plat_priv)
  465. return is_supported;
  466. if (!plat_priv->fw_caps)
  467. return is_supported;
  468. switch (fw_cap) {
  469. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  470. is_supported = !!(plat_priv->fw_caps &
  471. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  472. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  473. is_supported = false;
  474. break;
  475. default:
  476. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  477. }
  478. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  479. is_supported ? "supported" : "not supported");
  480. return is_supported;
  481. }
  482. EXPORT_SYMBOL(cnss_get_fw_cap);
  483. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  484. {
  485. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  486. if (!plat_priv)
  487. return;
  488. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  489. }
  490. EXPORT_SYMBOL(cnss_request_pm_qos);
  491. void cnss_remove_pm_qos(struct device *dev)
  492. {
  493. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  494. if (!plat_priv)
  495. return;
  496. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  497. }
  498. EXPORT_SYMBOL(cnss_remove_pm_qos);
  499. int cnss_wlan_enable(struct device *dev,
  500. struct cnss_wlan_enable_cfg *config,
  501. enum cnss_driver_mode mode,
  502. const char *host_version)
  503. {
  504. int ret = 0;
  505. struct cnss_plat_data *plat_priv;
  506. if (!dev) {
  507. cnss_pr_err("Invalid dev pointer\n");
  508. return -EINVAL;
  509. }
  510. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  511. if (!plat_priv)
  512. return -ENODEV;
  513. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  514. return 0;
  515. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  516. return 0;
  517. if (!config || !host_version) {
  518. cnss_pr_err("Invalid config or host_version pointer\n");
  519. return -EINVAL;
  520. }
  521. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  522. mode, config, host_version);
  523. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  524. goto skip_cfg;
  525. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  526. config->send_msi_ce = true;
  527. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  528. if (ret)
  529. goto out;
  530. skip_cfg:
  531. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  532. out:
  533. return ret;
  534. }
  535. EXPORT_SYMBOL(cnss_wlan_enable);
  536. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  537. {
  538. int ret = 0;
  539. struct cnss_plat_data *plat_priv;
  540. if (!dev) {
  541. cnss_pr_err("Invalid dev pointer\n");
  542. return -EINVAL;
  543. }
  544. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  545. if (!plat_priv)
  546. return -ENODEV;
  547. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  548. return 0;
  549. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  550. return 0;
  551. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  552. cnss_bus_free_qdss_mem(plat_priv);
  553. return ret;
  554. }
  555. EXPORT_SYMBOL(cnss_wlan_disable);
  556. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  557. dma_addr_t iova, size_t size)
  558. {
  559. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  560. uint32_t page_offset;
  561. if (!plat_priv)
  562. return -ENODEV;
  563. if (!plat_priv->audio_iommu_domain)
  564. return -EINVAL;
  565. page_offset = iova & (PAGE_SIZE - 1);
  566. if (page_offset + size > PAGE_SIZE)
  567. size += PAGE_SIZE;
  568. iova -= page_offset;
  569. paddr -= page_offset;
  570. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  571. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  572. IOMMU_CACHE);
  573. }
  574. EXPORT_SYMBOL(cnss_audio_smmu_map);
  575. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  576. {
  577. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  578. uint32_t page_offset;
  579. if (!plat_priv)
  580. return;
  581. if (!plat_priv->audio_iommu_domain)
  582. return;
  583. page_offset = iova & (PAGE_SIZE - 1);
  584. if (page_offset + size > PAGE_SIZE)
  585. size += PAGE_SIZE;
  586. iova -= page_offset;
  587. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  588. roundup(size, PAGE_SIZE));
  589. }
  590. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  591. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  592. u32 data_len, u8 *output)
  593. {
  594. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  595. int ret = 0;
  596. if (!plat_priv) {
  597. cnss_pr_err("plat_priv is NULL!\n");
  598. return -EINVAL;
  599. }
  600. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  601. return 0;
  602. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  603. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  604. plat_priv->driver_state);
  605. ret = -EINVAL;
  606. goto out;
  607. }
  608. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  609. data_len, output);
  610. out:
  611. return ret;
  612. }
  613. EXPORT_SYMBOL(cnss_athdiag_read);
  614. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  615. u32 data_len, u8 *input)
  616. {
  617. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  618. int ret = 0;
  619. if (!plat_priv) {
  620. cnss_pr_err("plat_priv is NULL!\n");
  621. return -EINVAL;
  622. }
  623. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  624. return 0;
  625. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  626. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  627. plat_priv->driver_state);
  628. ret = -EINVAL;
  629. goto out;
  630. }
  631. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  632. data_len, input);
  633. out:
  634. return ret;
  635. }
  636. EXPORT_SYMBOL(cnss_athdiag_write);
  637. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  638. {
  639. struct cnss_plat_data *plat_priv;
  640. if (!dev) {
  641. cnss_pr_err("Invalid dev pointer\n");
  642. return -EINVAL;
  643. }
  644. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  645. if (!plat_priv)
  646. return -ENODEV;
  647. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  648. return 0;
  649. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  650. }
  651. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  652. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  653. {
  654. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  655. if (!plat_priv)
  656. return -EINVAL;
  657. if (!plat_priv->fw_pcie_gen_switch) {
  658. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  659. return -EOPNOTSUPP;
  660. }
  661. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  662. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  663. return -EINVAL;
  664. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  665. plat_priv->pcie_gen_speed = pcie_gen_speed;
  666. return 0;
  667. }
  668. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  669. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  670. {
  671. int ret = 0;
  672. if (!plat_priv)
  673. return -ENODEV;
  674. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  675. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  676. if (ret)
  677. goto out;
  678. if (plat_priv->hds_enabled)
  679. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  680. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  681. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  682. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  683. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  684. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  685. plat_priv->ctrl_params.bdf_type);
  686. if (ret)
  687. goto out;
  688. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  689. return 0;
  690. ret = cnss_bus_load_m3(plat_priv);
  691. if (ret)
  692. goto out;
  693. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  694. if (ret)
  695. goto out;
  696. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  697. return 0;
  698. out:
  699. return ret;
  700. }
  701. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  702. {
  703. int ret = 0;
  704. if (!plat_priv->antenna) {
  705. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  706. if (ret)
  707. goto out;
  708. }
  709. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  710. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  711. if (ret)
  712. goto out;
  713. }
  714. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  715. if (ret)
  716. goto out;
  717. return 0;
  718. out:
  719. return ret;
  720. }
  721. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  722. {
  723. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  724. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  725. }
  726. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  727. {
  728. u32 i;
  729. int ret = 0;
  730. struct cnss_plat_ipc_daemon_config *cfg;
  731. ret = cnss_qmi_get_dms_mac(plat_priv);
  732. if (ret == 0 && plat_priv->dms.mac_valid)
  733. goto qmi_send;
  734. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  735. * Thus assert on failure to get MAC from DMS even after retries
  736. */
  737. if (plat_priv->use_nv_mac) {
  738. /* Check if Daemon says platform support DMS MAC provisioning */
  739. cfg = cnss_plat_ipc_qmi_daemon_config();
  740. if (cfg) {
  741. if (!cfg->dms_mac_addr_supported) {
  742. cnss_pr_err("DMS MAC address not supported\n");
  743. CNSS_ASSERT(0);
  744. return -EINVAL;
  745. }
  746. }
  747. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  748. if (plat_priv->dms.mac_valid)
  749. break;
  750. ret = cnss_qmi_get_dms_mac(plat_priv);
  751. if (ret == 0)
  752. break;
  753. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  754. }
  755. if (!plat_priv->dms.mac_valid) {
  756. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  757. CNSS_ASSERT(0);
  758. return -EINVAL;
  759. }
  760. }
  761. qmi_send:
  762. if (plat_priv->dms.mac_valid)
  763. ret =
  764. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  765. ARRAY_SIZE(plat_priv->dms.mac));
  766. return ret;
  767. }
  768. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  769. enum cnss_cal_db_op op, u32 *size)
  770. {
  771. int ret = 0;
  772. u32 timeout = cnss_get_timeout(plat_priv,
  773. CNSS_TIMEOUT_DAEMON_CONNECTION);
  774. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  775. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  776. if (op >= CNSS_CAL_DB_INVALID_OP)
  777. return -EINVAL;
  778. if (!plat_priv->cbc_file_download) {
  779. cnss_pr_info("CAL DB file not required as per BDF\n");
  780. return 0;
  781. }
  782. if (*size == 0) {
  783. cnss_pr_err("Invalid cal file size\n");
  784. return -EINVAL;
  785. }
  786. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  787. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  788. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  789. msecs_to_jiffies(timeout));
  790. if (!ret) {
  791. cnss_pr_err("Daemon not yet connected\n");
  792. CNSS_ASSERT(0);
  793. return ret;
  794. }
  795. }
  796. if (!plat_priv->cal_mem->va) {
  797. cnss_pr_err("CAL DB Memory not setup for FW\n");
  798. return -EINVAL;
  799. }
  800. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  801. if (op == CNSS_CAL_DB_DOWNLOAD) {
  802. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  803. ret = cnss_plat_ipc_qmi_file_download(client_id,
  804. CNSS_CAL_DB_FILE_NAME,
  805. plat_priv->cal_mem->va,
  806. size);
  807. } else {
  808. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  809. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  810. CNSS_CAL_DB_FILE_NAME,
  811. plat_priv->cal_mem->va,
  812. *size);
  813. }
  814. if (ret)
  815. cnss_pr_err("Cal DB file %s %s failure\n",
  816. CNSS_CAL_DB_FILE_NAME,
  817. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  818. else
  819. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  820. CNSS_CAL_DB_FILE_NAME,
  821. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  822. *size);
  823. return ret;
  824. }
  825. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  826. {
  827. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  828. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  829. return -EINVAL;
  830. }
  831. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  832. &plat_priv->cal_file_size);
  833. }
  834. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  835. u32 *cal_file_size)
  836. {
  837. /* To download pass the total size of cal DB mem allocated.
  838. * After cal file is download to mem, its size is updated in
  839. * return pointer
  840. */
  841. *cal_file_size = plat_priv->cal_mem->size;
  842. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  843. cal_file_size);
  844. }
  845. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  846. {
  847. int ret = 0;
  848. u32 cal_file_size = 0;
  849. if (!plat_priv)
  850. return -ENODEV;
  851. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  852. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  853. return -EINVAL;
  854. }
  855. cnss_pr_dbg("Processing FW Init Done..\n");
  856. del_timer(&plat_priv->fw_boot_timer);
  857. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  858. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  859. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  860. cnss_send_subsys_restart_level_msg(plat_priv);
  861. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  862. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  863. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  864. }
  865. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  866. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  867. CNSS_WALTEST);
  868. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  869. cnss_request_antenna_sharing(plat_priv);
  870. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  871. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  872. plat_priv->cal_time = jiffies;
  873. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  874. CNSS_CALIBRATION);
  875. } else {
  876. ret = cnss_setup_dms_mac(plat_priv);
  877. ret = cnss_bus_call_driver_probe(plat_priv);
  878. }
  879. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  880. goto out;
  881. else if (ret)
  882. goto shutdown;
  883. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  884. return 0;
  885. shutdown:
  886. cnss_bus_dev_shutdown(plat_priv);
  887. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  888. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  889. out:
  890. return ret;
  891. }
  892. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  893. {
  894. switch (type) {
  895. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  896. return "SERVER_ARRIVE";
  897. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  898. return "SERVER_EXIT";
  899. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  900. return "REQUEST_MEM";
  901. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  902. return "FW_MEM_READY";
  903. case CNSS_DRIVER_EVENT_FW_READY:
  904. return "FW_READY";
  905. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  906. return "COLD_BOOT_CAL_START";
  907. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  908. return "COLD_BOOT_CAL_DONE";
  909. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  910. return "REGISTER_DRIVER";
  911. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  912. return "UNREGISTER_DRIVER";
  913. case CNSS_DRIVER_EVENT_RECOVERY:
  914. return "RECOVERY";
  915. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  916. return "FORCE_FW_ASSERT";
  917. case CNSS_DRIVER_EVENT_POWER_UP:
  918. return "POWER_UP";
  919. case CNSS_DRIVER_EVENT_POWER_DOWN:
  920. return "POWER_DOWN";
  921. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  922. return "IDLE_RESTART";
  923. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  924. return "IDLE_SHUTDOWN";
  925. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  926. return "IMS_WFC_CALL_IND";
  927. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  928. return "WLFW_TWC_CFG_IND";
  929. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  930. return "QDSS_TRACE_REQ_MEM";
  931. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  932. return "FW_MEM_FILE_SAVE";
  933. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  934. return "QDSS_TRACE_FREE";
  935. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  936. return "QDSS_TRACE_REQ_DATA";
  937. case CNSS_DRIVER_EVENT_MAX:
  938. return "EVENT_MAX";
  939. }
  940. return "UNKNOWN";
  941. };
  942. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  943. enum cnss_driver_event_type type,
  944. u32 flags, void *data)
  945. {
  946. struct cnss_driver_event *event;
  947. unsigned long irq_flags;
  948. int gfp = GFP_KERNEL;
  949. int ret = 0;
  950. if (!plat_priv)
  951. return -ENODEV;
  952. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  953. cnss_driver_event_to_str(type), type,
  954. flags ? "-sync" : "", plat_priv->driver_state, flags);
  955. if (type >= CNSS_DRIVER_EVENT_MAX) {
  956. cnss_pr_err("Invalid Event type: %d, can't post", type);
  957. return -EINVAL;
  958. }
  959. if (in_interrupt() || irqs_disabled())
  960. gfp = GFP_ATOMIC;
  961. event = kzalloc(sizeof(*event), gfp);
  962. if (!event)
  963. return -ENOMEM;
  964. cnss_pm_stay_awake(plat_priv);
  965. event->type = type;
  966. event->data = data;
  967. init_completion(&event->complete);
  968. event->ret = CNSS_EVENT_PENDING;
  969. event->sync = !!(flags & CNSS_EVENT_SYNC);
  970. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  971. list_add_tail(&event->list, &plat_priv->event_list);
  972. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  973. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  974. if (!(flags & CNSS_EVENT_SYNC))
  975. goto out;
  976. if (flags & CNSS_EVENT_UNKILLABLE)
  977. wait_for_completion(&event->complete);
  978. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  979. ret = wait_for_completion_killable(&event->complete);
  980. else
  981. ret = wait_for_completion_interruptible(&event->complete);
  982. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  983. cnss_driver_event_to_str(type), type,
  984. plat_priv->driver_state, ret, event->ret);
  985. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  986. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  987. event->sync = false;
  988. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  989. ret = -EINTR;
  990. goto out;
  991. }
  992. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  993. ret = event->ret;
  994. kfree(event);
  995. out:
  996. cnss_pm_relax(plat_priv);
  997. return ret;
  998. }
  999. /**
  1000. * cnss_get_timeout - Get timeout for corresponding type.
  1001. * @plat_priv: Pointer to platform driver context.
  1002. * @cnss_timeout_type: Timeout type.
  1003. *
  1004. * Return: Timeout in milliseconds.
  1005. */
  1006. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1007. enum cnss_timeout_type timeout_type)
  1008. {
  1009. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1010. switch (timeout_type) {
  1011. case CNSS_TIMEOUT_QMI:
  1012. return qmi_timeout;
  1013. case CNSS_TIMEOUT_POWER_UP:
  1014. return (qmi_timeout << 2);
  1015. case CNSS_TIMEOUT_IDLE_RESTART:
  1016. /* In idle restart power up sequence, we have fw_boot_timer to
  1017. * handle FW initialization failure.
  1018. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1019. * account for FW dump collection and FW re-initialization on
  1020. * retry.
  1021. */
  1022. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1023. case CNSS_TIMEOUT_CALIBRATION:
  1024. /* Similar to mission mode, in CBC if FW init fails
  1025. * fw recovery is tried. Thus return 2x the CBC timeout.
  1026. */
  1027. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1028. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1029. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1030. case CNSS_TIMEOUT_RDDM:
  1031. return CNSS_RDDM_TIMEOUT_MS;
  1032. case CNSS_TIMEOUT_RECOVERY:
  1033. return RECOVERY_TIMEOUT;
  1034. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1035. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1036. default:
  1037. return qmi_timeout;
  1038. }
  1039. }
  1040. unsigned int cnss_get_boot_timeout(struct device *dev)
  1041. {
  1042. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1043. if (!plat_priv) {
  1044. cnss_pr_err("plat_priv is NULL\n");
  1045. return 0;
  1046. }
  1047. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1048. }
  1049. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1050. int cnss_power_up(struct device *dev)
  1051. {
  1052. int ret = 0;
  1053. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1054. unsigned int timeout;
  1055. if (!plat_priv) {
  1056. cnss_pr_err("plat_priv is NULL\n");
  1057. return -ENODEV;
  1058. }
  1059. cnss_pr_dbg("Powering up device\n");
  1060. ret = cnss_driver_event_post(plat_priv,
  1061. CNSS_DRIVER_EVENT_POWER_UP,
  1062. CNSS_EVENT_SYNC, NULL);
  1063. if (ret)
  1064. goto out;
  1065. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1066. goto out;
  1067. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1068. reinit_completion(&plat_priv->power_up_complete);
  1069. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1070. msecs_to_jiffies(timeout));
  1071. if (!ret) {
  1072. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1073. timeout);
  1074. ret = -EAGAIN;
  1075. goto out;
  1076. }
  1077. return 0;
  1078. out:
  1079. return ret;
  1080. }
  1081. EXPORT_SYMBOL(cnss_power_up);
  1082. int cnss_power_down(struct device *dev)
  1083. {
  1084. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1085. if (!plat_priv) {
  1086. cnss_pr_err("plat_priv is NULL\n");
  1087. return -ENODEV;
  1088. }
  1089. cnss_pr_dbg("Powering down device\n");
  1090. return cnss_driver_event_post(plat_priv,
  1091. CNSS_DRIVER_EVENT_POWER_DOWN,
  1092. CNSS_EVENT_SYNC, NULL);
  1093. }
  1094. EXPORT_SYMBOL(cnss_power_down);
  1095. int cnss_idle_restart(struct device *dev)
  1096. {
  1097. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1098. unsigned int timeout;
  1099. int ret = 0;
  1100. if (!plat_priv) {
  1101. cnss_pr_err("plat_priv is NULL\n");
  1102. return -ENODEV;
  1103. }
  1104. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1105. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1106. return -EBUSY;
  1107. }
  1108. cnss_pr_dbg("Doing idle restart\n");
  1109. reinit_completion(&plat_priv->power_up_complete);
  1110. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1111. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1112. ret = -EINVAL;
  1113. goto out;
  1114. }
  1115. ret = cnss_driver_event_post(plat_priv,
  1116. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1117. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1118. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1119. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1120. else if (ret)
  1121. goto out;
  1122. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1123. ret = cnss_bus_call_driver_probe(plat_priv);
  1124. goto out;
  1125. }
  1126. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1127. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1128. msecs_to_jiffies(timeout));
  1129. if (plat_priv->power_up_error) {
  1130. ret = plat_priv->power_up_error;
  1131. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1132. cnss_pr_dbg("Power up error:%d, exiting\n",
  1133. plat_priv->power_up_error);
  1134. goto out;
  1135. }
  1136. if (!ret) {
  1137. /* This exception occurs after attempting retry of FW recovery.
  1138. * Thus we can safely power off the device.
  1139. */
  1140. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1141. timeout);
  1142. ret = -ETIMEDOUT;
  1143. cnss_power_down(dev);
  1144. CNSS_ASSERT(0);
  1145. goto out;
  1146. }
  1147. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1148. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1149. del_timer(&plat_priv->fw_boot_timer);
  1150. ret = -EINVAL;
  1151. goto out;
  1152. }
  1153. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1154. * non-DRV is supported only once after device reboots and before wifi
  1155. * is turned on. We do not allow switching back to DRV.
  1156. * To bring device back into DRV, user needs to reboot device.
  1157. */
  1158. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1159. cnss_pr_dbg("DRV is disabled\n");
  1160. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1161. }
  1162. mutex_unlock(&plat_priv->driver_ops_lock);
  1163. return 0;
  1164. out:
  1165. mutex_unlock(&plat_priv->driver_ops_lock);
  1166. return ret;
  1167. }
  1168. EXPORT_SYMBOL(cnss_idle_restart);
  1169. int cnss_idle_shutdown(struct device *dev)
  1170. {
  1171. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1172. if (!plat_priv) {
  1173. cnss_pr_err("plat_priv is NULL\n");
  1174. return -ENODEV;
  1175. }
  1176. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1177. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1178. return -EAGAIN;
  1179. }
  1180. cnss_pr_dbg("Doing idle shutdown\n");
  1181. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1182. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1183. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1184. return -EBUSY;
  1185. }
  1186. return cnss_driver_event_post(plat_priv,
  1187. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1188. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1189. }
  1190. EXPORT_SYMBOL(cnss_idle_shutdown);
  1191. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1192. {
  1193. int ret = 0;
  1194. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1195. if (ret < 0) {
  1196. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1197. goto out;
  1198. }
  1199. ret = cnss_get_clk(plat_priv);
  1200. if (ret) {
  1201. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1202. goto put_vreg;
  1203. }
  1204. ret = cnss_get_pinctrl(plat_priv);
  1205. if (ret) {
  1206. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1207. goto put_clk;
  1208. }
  1209. return 0;
  1210. put_clk:
  1211. cnss_put_clk(plat_priv);
  1212. put_vreg:
  1213. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1214. out:
  1215. return ret;
  1216. }
  1217. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1218. {
  1219. cnss_put_clk(plat_priv);
  1220. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1221. }
  1222. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1223. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1224. unsigned long code,
  1225. void *ss_handle)
  1226. {
  1227. struct cnss_plat_data *plat_priv =
  1228. container_of(nb, struct cnss_plat_data, modem_nb);
  1229. struct cnss_esoc_info *esoc_info;
  1230. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1231. if (!plat_priv)
  1232. return NOTIFY_DONE;
  1233. esoc_info = &plat_priv->esoc_info;
  1234. if (code == SUBSYS_AFTER_POWERUP)
  1235. esoc_info->modem_current_status = 1;
  1236. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1237. esoc_info->modem_current_status = 0;
  1238. else
  1239. return NOTIFY_DONE;
  1240. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1241. esoc_info->modem_current_status))
  1242. return NOTIFY_DONE;
  1243. return NOTIFY_OK;
  1244. }
  1245. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1246. {
  1247. int ret = 0;
  1248. struct device *dev;
  1249. struct cnss_esoc_info *esoc_info;
  1250. struct esoc_desc *esoc_desc;
  1251. const char *client_desc;
  1252. dev = &plat_priv->plat_dev->dev;
  1253. esoc_info = &plat_priv->esoc_info;
  1254. esoc_info->notify_modem_status =
  1255. of_property_read_bool(dev->of_node,
  1256. "qcom,notify-modem-status");
  1257. if (!esoc_info->notify_modem_status)
  1258. goto out;
  1259. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1260. &client_desc);
  1261. if (ret) {
  1262. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1263. } else {
  1264. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1265. if (IS_ERR_OR_NULL(esoc_desc)) {
  1266. ret = PTR_RET(esoc_desc);
  1267. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1268. ret);
  1269. goto out;
  1270. }
  1271. esoc_info->esoc_desc = esoc_desc;
  1272. }
  1273. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1274. esoc_info->modem_current_status = 0;
  1275. esoc_info->modem_notify_handler =
  1276. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1277. esoc_info->esoc_desc->name :
  1278. "modem", &plat_priv->modem_nb);
  1279. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1280. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1281. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1282. ret);
  1283. goto unreg_esoc;
  1284. }
  1285. return 0;
  1286. unreg_esoc:
  1287. if (esoc_info->esoc_desc)
  1288. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1289. out:
  1290. return ret;
  1291. }
  1292. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1293. {
  1294. struct device *dev;
  1295. struct cnss_esoc_info *esoc_info;
  1296. dev = &plat_priv->plat_dev->dev;
  1297. esoc_info = &plat_priv->esoc_info;
  1298. if (esoc_info->notify_modem_status)
  1299. subsys_notif_unregister_notifier
  1300. (esoc_info->modem_notify_handler,
  1301. &plat_priv->modem_nb);
  1302. if (esoc_info->esoc_desc)
  1303. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1304. }
  1305. #else
  1306. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1307. {
  1308. return 0;
  1309. }
  1310. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1311. #endif
  1312. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1313. {
  1314. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1315. int ret = 0;
  1316. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1317. return 0;
  1318. enable_irq(sol_gpio->dev_sol_irq);
  1319. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1320. if (ret)
  1321. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1322. ret);
  1323. return ret;
  1324. }
  1325. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1326. {
  1327. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1328. int ret = 0;
  1329. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1330. return 0;
  1331. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1332. if (ret)
  1333. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1334. ret);
  1335. disable_irq(sol_gpio->dev_sol_irq);
  1336. return ret;
  1337. }
  1338. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1339. {
  1340. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1341. if (sol_gpio->dev_sol_gpio < 0)
  1342. return -EINVAL;
  1343. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1344. }
  1345. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1346. {
  1347. struct cnss_plat_data *plat_priv = data;
  1348. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1349. sol_gpio->dev_sol_counter++;
  1350. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1351. irq, sol_gpio->dev_sol_counter);
  1352. /* Make sure abort current suspend */
  1353. cnss_pm_stay_awake(plat_priv);
  1354. cnss_pm_relax(plat_priv);
  1355. pm_system_wakeup();
  1356. cnss_bus_handle_dev_sol_irq(plat_priv);
  1357. return IRQ_HANDLED;
  1358. }
  1359. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1360. {
  1361. struct device *dev = &plat_priv->plat_dev->dev;
  1362. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1363. int ret = 0;
  1364. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1365. "wlan-dev-sol-gpio", 0);
  1366. if (sol_gpio->dev_sol_gpio < 0)
  1367. goto out;
  1368. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1369. sol_gpio->dev_sol_gpio);
  1370. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1371. if (ret) {
  1372. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1373. ret);
  1374. goto out;
  1375. }
  1376. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1377. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1378. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1379. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1380. if (ret) {
  1381. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1382. goto free_gpio;
  1383. }
  1384. return 0;
  1385. free_gpio:
  1386. gpio_free(sol_gpio->dev_sol_gpio);
  1387. out:
  1388. return ret;
  1389. }
  1390. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1391. {
  1392. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1393. if (sol_gpio->dev_sol_gpio < 0)
  1394. return;
  1395. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1396. gpio_free(sol_gpio->dev_sol_gpio);
  1397. }
  1398. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1399. {
  1400. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1401. if (sol_gpio->host_sol_gpio < 0)
  1402. return -EINVAL;
  1403. if (value)
  1404. cnss_pr_dbg("Assert host SOL GPIO\n");
  1405. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1406. return 0;
  1407. }
  1408. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1409. {
  1410. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1411. if (sol_gpio->host_sol_gpio < 0)
  1412. return -EINVAL;
  1413. return gpio_get_value(sol_gpio->host_sol_gpio);
  1414. }
  1415. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1416. {
  1417. struct device *dev = &plat_priv->plat_dev->dev;
  1418. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1419. int ret = 0;
  1420. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1421. "wlan-host-sol-gpio", 0);
  1422. if (sol_gpio->host_sol_gpio < 0)
  1423. goto out;
  1424. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1425. sol_gpio->host_sol_gpio);
  1426. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1427. if (ret) {
  1428. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1429. ret);
  1430. goto out;
  1431. }
  1432. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1433. return 0;
  1434. out:
  1435. return ret;
  1436. }
  1437. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1438. {
  1439. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1440. if (sol_gpio->host_sol_gpio < 0)
  1441. return;
  1442. gpio_free(sol_gpio->host_sol_gpio);
  1443. }
  1444. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1445. {
  1446. int ret;
  1447. ret = cnss_init_dev_sol_gpio(plat_priv);
  1448. if (ret)
  1449. goto out;
  1450. ret = cnss_init_host_sol_gpio(plat_priv);
  1451. if (ret)
  1452. goto deinit_dev_sol;
  1453. return 0;
  1454. deinit_dev_sol:
  1455. cnss_deinit_dev_sol_gpio(plat_priv);
  1456. out:
  1457. return ret;
  1458. }
  1459. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1460. {
  1461. cnss_deinit_host_sol_gpio(plat_priv);
  1462. cnss_deinit_dev_sol_gpio(plat_priv);
  1463. }
  1464. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1465. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1466. {
  1467. struct cnss_plat_data *plat_priv;
  1468. int ret = 0;
  1469. if (!subsys_desc->dev) {
  1470. cnss_pr_err("dev from subsys_desc is NULL\n");
  1471. return -ENODEV;
  1472. }
  1473. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1474. if (!plat_priv) {
  1475. cnss_pr_err("plat_priv is NULL\n");
  1476. return -ENODEV;
  1477. }
  1478. if (!plat_priv->driver_state) {
  1479. cnss_pr_dbg("subsys powerup is ignored\n");
  1480. return 0;
  1481. }
  1482. ret = cnss_bus_dev_powerup(plat_priv);
  1483. if (ret)
  1484. __pm_relax(plat_priv->recovery_ws);
  1485. return ret;
  1486. }
  1487. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1488. bool force_stop)
  1489. {
  1490. struct cnss_plat_data *plat_priv;
  1491. if (!subsys_desc->dev) {
  1492. cnss_pr_err("dev from subsys_desc is NULL\n");
  1493. return -ENODEV;
  1494. }
  1495. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1496. if (!plat_priv) {
  1497. cnss_pr_err("plat_priv is NULL\n");
  1498. return -ENODEV;
  1499. }
  1500. if (!plat_priv->driver_state) {
  1501. cnss_pr_dbg("subsys shutdown is ignored\n");
  1502. return 0;
  1503. }
  1504. return cnss_bus_dev_shutdown(plat_priv);
  1505. }
  1506. void cnss_device_crashed(struct device *dev)
  1507. {
  1508. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1509. struct cnss_subsys_info *subsys_info;
  1510. if (!plat_priv)
  1511. return;
  1512. subsys_info = &plat_priv->subsys_info;
  1513. if (subsys_info->subsys_device) {
  1514. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1515. subsys_set_crash_status(subsys_info->subsys_device, true);
  1516. subsystem_restart_dev(subsys_info->subsys_device);
  1517. }
  1518. }
  1519. EXPORT_SYMBOL(cnss_device_crashed);
  1520. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1521. {
  1522. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1523. if (!plat_priv) {
  1524. cnss_pr_err("plat_priv is NULL\n");
  1525. return;
  1526. }
  1527. cnss_bus_dev_crash_shutdown(plat_priv);
  1528. }
  1529. static int cnss_subsys_ramdump(int enable,
  1530. const struct subsys_desc *subsys_desc)
  1531. {
  1532. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1533. if (!plat_priv) {
  1534. cnss_pr_err("plat_priv is NULL\n");
  1535. return -ENODEV;
  1536. }
  1537. if (!enable)
  1538. return 0;
  1539. return cnss_bus_dev_ramdump(plat_priv);
  1540. }
  1541. static void cnss_recovery_work_handler(struct work_struct *work)
  1542. {
  1543. }
  1544. #else
  1545. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1546. {
  1547. int ret;
  1548. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1549. if (!plat_priv->recovery_enabled)
  1550. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1551. cnss_bus_dev_shutdown(plat_priv);
  1552. cnss_bus_dev_ramdump(plat_priv);
  1553. /* If recovery is triggered before Host driver registration,
  1554. * avoid device power up because eventually device will be
  1555. * power up as part of driver registration.
  1556. */
  1557. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1558. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1559. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1560. plat_priv->driver_state);
  1561. return;
  1562. }
  1563. msleep(POWER_RESET_MIN_DELAY_MS);
  1564. ret = cnss_bus_dev_powerup(plat_priv);
  1565. if (ret)
  1566. __pm_relax(plat_priv->recovery_ws);
  1567. return;
  1568. }
  1569. static void cnss_recovery_work_handler(struct work_struct *work)
  1570. {
  1571. struct cnss_plat_data *plat_priv =
  1572. container_of(work, struct cnss_plat_data, recovery_work);
  1573. cnss_recovery_handler(plat_priv);
  1574. }
  1575. void cnss_device_crashed(struct device *dev)
  1576. {
  1577. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1578. if (!plat_priv)
  1579. return;
  1580. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1581. schedule_work(&plat_priv->recovery_work);
  1582. }
  1583. EXPORT_SYMBOL(cnss_device_crashed);
  1584. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1585. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1586. {
  1587. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1588. struct cnss_ramdump_info *ramdump_info;
  1589. if (!plat_priv)
  1590. return NULL;
  1591. ramdump_info = &plat_priv->ramdump_info;
  1592. *size = ramdump_info->ramdump_size;
  1593. return ramdump_info->ramdump_va;
  1594. }
  1595. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1596. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1597. {
  1598. switch (reason) {
  1599. case CNSS_REASON_DEFAULT:
  1600. return "DEFAULT";
  1601. case CNSS_REASON_LINK_DOWN:
  1602. return "LINK_DOWN";
  1603. case CNSS_REASON_RDDM:
  1604. return "RDDM";
  1605. case CNSS_REASON_TIMEOUT:
  1606. return "TIMEOUT";
  1607. }
  1608. return "UNKNOWN";
  1609. };
  1610. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1611. enum cnss_recovery_reason reason)
  1612. {
  1613. plat_priv->recovery_count++;
  1614. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1615. goto self_recovery;
  1616. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1617. cnss_pr_dbg("Skip device recovery\n");
  1618. return 0;
  1619. }
  1620. /* FW recovery sequence has multiple steps and firmware load requires
  1621. * linux PM in awake state. Thus hold the cnss wake source until
  1622. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1623. * time taken in this process.
  1624. */
  1625. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1626. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1627. true);
  1628. switch (reason) {
  1629. case CNSS_REASON_LINK_DOWN:
  1630. if (!cnss_bus_check_link_status(plat_priv)) {
  1631. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1632. return 0;
  1633. }
  1634. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1635. &plat_priv->ctrl_params.quirks))
  1636. goto self_recovery;
  1637. if (!cnss_bus_recover_link_down(plat_priv)) {
  1638. /* clear recovery bit here to avoid skipping
  1639. * the recovery work for RDDM later
  1640. */
  1641. clear_bit(CNSS_DRIVER_RECOVERY,
  1642. &plat_priv->driver_state);
  1643. return 0;
  1644. }
  1645. break;
  1646. case CNSS_REASON_RDDM:
  1647. cnss_bus_collect_dump_info(plat_priv, false);
  1648. break;
  1649. case CNSS_REASON_DEFAULT:
  1650. case CNSS_REASON_TIMEOUT:
  1651. break;
  1652. default:
  1653. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1654. cnss_recovery_reason_to_str(reason), reason);
  1655. break;
  1656. }
  1657. cnss_bus_device_crashed(plat_priv);
  1658. return 0;
  1659. self_recovery:
  1660. cnss_pr_dbg("Going for self recovery\n");
  1661. cnss_bus_dev_shutdown(plat_priv);
  1662. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1663. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1664. &plat_priv->ctrl_params.quirks);
  1665. /* If link down self recovery is triggered before Host driver
  1666. * registration, avoid device power up because eventually device
  1667. * will be power up as part of driver registration.
  1668. */
  1669. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1670. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1671. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1672. plat_priv->driver_state);
  1673. return 0;
  1674. }
  1675. cnss_bus_dev_powerup(plat_priv);
  1676. return 0;
  1677. }
  1678. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1679. void *data)
  1680. {
  1681. struct cnss_recovery_data *recovery_data = data;
  1682. int ret = 0;
  1683. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1684. cnss_recovery_reason_to_str(recovery_data->reason),
  1685. recovery_data->reason);
  1686. if (!plat_priv->driver_state) {
  1687. cnss_pr_err("Improper driver state, ignore recovery\n");
  1688. ret = -EINVAL;
  1689. goto out;
  1690. }
  1691. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1692. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1693. ret = -EINVAL;
  1694. goto out;
  1695. }
  1696. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1697. cnss_pr_err("Recovery is already in progress\n");
  1698. CNSS_ASSERT(0);
  1699. ret = -EINVAL;
  1700. goto out;
  1701. }
  1702. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1703. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1704. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1705. ret = -EINVAL;
  1706. goto out;
  1707. }
  1708. switch (plat_priv->device_id) {
  1709. case QCA6174_DEVICE_ID:
  1710. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1711. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1712. &plat_priv->driver_state)) {
  1713. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1714. ret = -EINVAL;
  1715. goto out;
  1716. }
  1717. break;
  1718. default:
  1719. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1720. set_bit(CNSS_FW_BOOT_RECOVERY,
  1721. &plat_priv->driver_state);
  1722. }
  1723. break;
  1724. }
  1725. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1726. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1727. out:
  1728. kfree(data);
  1729. return ret;
  1730. }
  1731. int cnss_self_recovery(struct device *dev,
  1732. enum cnss_recovery_reason reason)
  1733. {
  1734. cnss_schedule_recovery(dev, reason);
  1735. return 0;
  1736. }
  1737. EXPORT_SYMBOL(cnss_self_recovery);
  1738. void cnss_schedule_recovery(struct device *dev,
  1739. enum cnss_recovery_reason reason)
  1740. {
  1741. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1742. struct cnss_recovery_data *data;
  1743. int gfp = GFP_KERNEL;
  1744. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1745. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1746. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1747. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1748. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1749. return;
  1750. }
  1751. if (in_interrupt() || irqs_disabled())
  1752. gfp = GFP_ATOMIC;
  1753. data = kzalloc(sizeof(*data), gfp);
  1754. if (!data)
  1755. return;
  1756. data->reason = reason;
  1757. cnss_driver_event_post(plat_priv,
  1758. CNSS_DRIVER_EVENT_RECOVERY,
  1759. 0, data);
  1760. }
  1761. EXPORT_SYMBOL(cnss_schedule_recovery);
  1762. int cnss_force_fw_assert(struct device *dev)
  1763. {
  1764. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1765. if (!plat_priv) {
  1766. cnss_pr_err("plat_priv is NULL\n");
  1767. return -ENODEV;
  1768. }
  1769. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1770. cnss_pr_info("Forced FW assert is not supported\n");
  1771. return -EOPNOTSUPP;
  1772. }
  1773. if (cnss_bus_is_device_down(plat_priv)) {
  1774. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1775. return 0;
  1776. }
  1777. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1778. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1779. return 0;
  1780. }
  1781. if (in_interrupt() || irqs_disabled())
  1782. cnss_driver_event_post(plat_priv,
  1783. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1784. 0, NULL);
  1785. else
  1786. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1787. return 0;
  1788. }
  1789. EXPORT_SYMBOL(cnss_force_fw_assert);
  1790. int cnss_force_collect_rddm(struct device *dev)
  1791. {
  1792. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1793. unsigned int timeout;
  1794. int ret = 0;
  1795. if (!plat_priv) {
  1796. cnss_pr_err("plat_priv is NULL\n");
  1797. return -ENODEV;
  1798. }
  1799. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1800. cnss_pr_info("Force collect rddm is not supported\n");
  1801. return -EOPNOTSUPP;
  1802. }
  1803. if (cnss_bus_is_device_down(plat_priv)) {
  1804. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1805. goto wait_rddm;
  1806. }
  1807. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1808. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1809. goto wait_rddm;
  1810. }
  1811. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1812. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1813. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1814. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1815. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1816. return 0;
  1817. }
  1818. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1819. if (ret)
  1820. return ret;
  1821. wait_rddm:
  1822. reinit_completion(&plat_priv->rddm_complete);
  1823. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1824. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1825. msecs_to_jiffies(timeout));
  1826. if (!ret) {
  1827. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1828. timeout);
  1829. ret = -ETIMEDOUT;
  1830. } else if (ret > 0) {
  1831. ret = 0;
  1832. }
  1833. return ret;
  1834. }
  1835. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1836. int cnss_qmi_send_get(struct device *dev)
  1837. {
  1838. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1839. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1840. return 0;
  1841. return cnss_bus_qmi_send_get(plat_priv);
  1842. }
  1843. EXPORT_SYMBOL(cnss_qmi_send_get);
  1844. int cnss_qmi_send_put(struct device *dev)
  1845. {
  1846. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1847. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1848. return 0;
  1849. return cnss_bus_qmi_send_put(plat_priv);
  1850. }
  1851. EXPORT_SYMBOL(cnss_qmi_send_put);
  1852. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1853. int cmd_len, void *cb_ctx,
  1854. int (*cb)(void *ctx, void *event, int event_len))
  1855. {
  1856. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1857. int ret;
  1858. if (!plat_priv)
  1859. return -ENODEV;
  1860. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1861. return -EINVAL;
  1862. plat_priv->get_info_cb = cb;
  1863. plat_priv->get_info_cb_ctx = cb_ctx;
  1864. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1865. if (ret) {
  1866. plat_priv->get_info_cb = NULL;
  1867. plat_priv->get_info_cb_ctx = NULL;
  1868. }
  1869. return ret;
  1870. }
  1871. EXPORT_SYMBOL(cnss_qmi_send);
  1872. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1873. {
  1874. int ret = 0;
  1875. u32 retry = 0, timeout;
  1876. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1877. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1878. goto out;
  1879. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1880. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1881. goto out;
  1882. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1883. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1884. goto out;
  1885. }
  1886. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1887. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1888. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1889. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1890. CNSS_ASSERT(0);
  1891. return -EINVAL;
  1892. }
  1893. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1894. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1895. break;
  1896. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1897. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1898. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1899. CNSS_ASSERT(0);
  1900. ret = -EINVAL;
  1901. goto mark_cal_fail;
  1902. }
  1903. }
  1904. switch (plat_priv->device_id) {
  1905. case QCA6290_DEVICE_ID:
  1906. case QCA6390_DEVICE_ID:
  1907. case QCA6490_DEVICE_ID:
  1908. case KIWI_DEVICE_ID:
  1909. case MANGO_DEVICE_ID:
  1910. case PEACH_DEVICE_ID:
  1911. break;
  1912. default:
  1913. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1914. plat_priv->device_id);
  1915. ret = -EINVAL;
  1916. goto mark_cal_fail;
  1917. }
  1918. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1919. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1920. timeout = cnss_get_timeout(plat_priv,
  1921. CNSS_TIMEOUT_CALIBRATION);
  1922. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1923. timeout / 1000);
  1924. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1925. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1926. msecs_to_jiffies(timeout));
  1927. }
  1928. reinit_completion(&plat_priv->cal_complete);
  1929. ret = cnss_bus_dev_powerup(plat_priv);
  1930. mark_cal_fail:
  1931. if (ret) {
  1932. complete(&plat_priv->cal_complete);
  1933. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1934. /* Set CBC done in driver state to mark attempt and note error
  1935. * since calibration cannot be retried at boot.
  1936. */
  1937. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1938. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1939. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1940. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1941. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1942. goto out;
  1943. cnss_pr_info("Schedule WLAN driver load\n");
  1944. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1945. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1946. 0);
  1947. }
  1948. }
  1949. out:
  1950. return ret;
  1951. }
  1952. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1953. void *data)
  1954. {
  1955. struct cnss_cal_info *cal_info = data;
  1956. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1957. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1958. goto out;
  1959. switch (cal_info->cal_status) {
  1960. case CNSS_CAL_DONE:
  1961. cnss_pr_dbg("Calibration completed successfully\n");
  1962. plat_priv->cal_done = true;
  1963. break;
  1964. case CNSS_CAL_TIMEOUT:
  1965. case CNSS_CAL_FAILURE:
  1966. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1967. cal_info->cal_status);
  1968. break;
  1969. default:
  1970. cnss_pr_err("Unknown calibration status: %u\n",
  1971. cal_info->cal_status);
  1972. break;
  1973. }
  1974. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1975. cnss_bus_free_qdss_mem(plat_priv);
  1976. cnss_release_antenna_sharing(plat_priv);
  1977. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  1978. goto skip_shutdown;
  1979. cnss_bus_dev_shutdown(plat_priv);
  1980. msleep(POWER_RESET_MIN_DELAY_MS);
  1981. skip_shutdown:
  1982. complete(&plat_priv->cal_complete);
  1983. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1984. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1985. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1986. cnss_cal_mem_upload_to_file(plat_priv);
  1987. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1988. goto out;
  1989. cnss_pr_dbg("Schedule WLAN driver load\n");
  1990. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1991. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1992. 0);
  1993. }
  1994. out:
  1995. kfree(data);
  1996. return 0;
  1997. }
  1998. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1999. {
  2000. int ret;
  2001. ret = cnss_bus_dev_powerup(plat_priv);
  2002. if (ret)
  2003. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2004. return ret;
  2005. }
  2006. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2007. {
  2008. cnss_bus_dev_shutdown(plat_priv);
  2009. return 0;
  2010. }
  2011. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2012. {
  2013. int ret = 0;
  2014. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2015. if (ret < 0)
  2016. return ret;
  2017. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2018. }
  2019. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2020. u32 mem_seg_len, u64 pa, u32 size)
  2021. {
  2022. int i = 0;
  2023. u64 offset = 0;
  2024. void *va = NULL;
  2025. u64 local_pa;
  2026. u32 local_size;
  2027. for (i = 0; i < mem_seg_len; i++) {
  2028. local_pa = (u64)fw_mem[i].pa;
  2029. local_size = (u32)fw_mem[i].size;
  2030. if (pa == local_pa && size <= local_size) {
  2031. va = fw_mem[i].va;
  2032. break;
  2033. }
  2034. if (pa > local_pa &&
  2035. pa < local_pa + local_size &&
  2036. pa + size <= local_pa + local_size) {
  2037. offset = pa - local_pa;
  2038. va = fw_mem[i].va + offset;
  2039. break;
  2040. }
  2041. }
  2042. return va;
  2043. }
  2044. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2045. void *data)
  2046. {
  2047. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2048. struct cnss_fw_mem *fw_mem_seg;
  2049. int ret = 0L;
  2050. void *va = NULL;
  2051. u32 i, fw_mem_seg_len;
  2052. switch (event_data->mem_type) {
  2053. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2054. if (!plat_priv->fw_mem_seg_len)
  2055. goto invalid_mem_save;
  2056. fw_mem_seg = plat_priv->fw_mem;
  2057. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2058. break;
  2059. case QMI_WLFW_MEM_QDSS_V01:
  2060. if (!plat_priv->qdss_mem_seg_len)
  2061. goto invalid_mem_save;
  2062. fw_mem_seg = plat_priv->qdss_mem;
  2063. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2064. break;
  2065. default:
  2066. goto invalid_mem_save;
  2067. }
  2068. for (i = 0; i < event_data->mem_seg_len; i++) {
  2069. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2070. event_data->mem_seg[i].addr,
  2071. event_data->mem_seg[i].size);
  2072. if (!va) {
  2073. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2074. &event_data->mem_seg[i].addr,
  2075. event_data->mem_type);
  2076. ret = -EINVAL;
  2077. break;
  2078. }
  2079. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2080. event_data->file_name,
  2081. event_data->mem_seg[i].size);
  2082. if (ret < 0) {
  2083. cnss_pr_err("Fail to save fw mem data: %d\n",
  2084. ret);
  2085. break;
  2086. }
  2087. }
  2088. kfree(data);
  2089. return ret;
  2090. invalid_mem_save:
  2091. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2092. event_data->mem_type);
  2093. kfree(data);
  2094. return -EINVAL;
  2095. }
  2096. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2097. {
  2098. cnss_bus_free_qdss_mem(plat_priv);
  2099. return 0;
  2100. }
  2101. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2102. void *data)
  2103. {
  2104. int ret = 0;
  2105. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2106. if (!plat_priv)
  2107. return -ENODEV;
  2108. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2109. event_data->total_size);
  2110. kfree(data);
  2111. return ret;
  2112. }
  2113. static void cnss_driver_event_work(struct work_struct *work)
  2114. {
  2115. struct cnss_plat_data *plat_priv =
  2116. container_of(work, struct cnss_plat_data, event_work);
  2117. struct cnss_driver_event *event;
  2118. unsigned long flags;
  2119. int ret = 0;
  2120. if (!plat_priv) {
  2121. cnss_pr_err("plat_priv is NULL!\n");
  2122. return;
  2123. }
  2124. cnss_pm_stay_awake(plat_priv);
  2125. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2126. while (!list_empty(&plat_priv->event_list)) {
  2127. event = list_first_entry(&plat_priv->event_list,
  2128. struct cnss_driver_event, list);
  2129. list_del(&event->list);
  2130. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2131. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2132. cnss_driver_event_to_str(event->type),
  2133. event->sync ? "-sync" : "", event->type,
  2134. plat_priv->driver_state);
  2135. switch (event->type) {
  2136. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2137. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2138. break;
  2139. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2140. ret = cnss_wlfw_server_exit(plat_priv);
  2141. break;
  2142. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2143. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2144. if (ret)
  2145. break;
  2146. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2147. break;
  2148. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2149. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2150. break;
  2151. case CNSS_DRIVER_EVENT_FW_READY:
  2152. ret = cnss_fw_ready_hdlr(plat_priv);
  2153. break;
  2154. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2155. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2156. break;
  2157. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2158. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2159. event->data);
  2160. break;
  2161. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2162. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2163. event->data);
  2164. break;
  2165. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2166. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2167. break;
  2168. case CNSS_DRIVER_EVENT_RECOVERY:
  2169. ret = cnss_driver_recovery_hdlr(plat_priv,
  2170. event->data);
  2171. break;
  2172. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2173. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2174. break;
  2175. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2176. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2177. &plat_priv->driver_state);
  2178. fallthrough;
  2179. case CNSS_DRIVER_EVENT_POWER_UP:
  2180. ret = cnss_power_up_hdlr(plat_priv);
  2181. break;
  2182. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2183. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2184. &plat_priv->driver_state);
  2185. fallthrough;
  2186. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2187. ret = cnss_power_down_hdlr(plat_priv);
  2188. break;
  2189. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2190. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2191. event->data);
  2192. break;
  2193. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2194. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2195. event->data);
  2196. break;
  2197. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2198. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2199. break;
  2200. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2201. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2202. event->data);
  2203. break;
  2204. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2205. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2206. break;
  2207. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2208. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2209. event->data);
  2210. break;
  2211. default:
  2212. cnss_pr_err("Invalid driver event type: %d",
  2213. event->type);
  2214. kfree(event);
  2215. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2216. continue;
  2217. }
  2218. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2219. if (event->sync) {
  2220. event->ret = ret;
  2221. complete(&event->complete);
  2222. continue;
  2223. }
  2224. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2225. kfree(event);
  2226. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2227. }
  2228. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2229. cnss_pm_relax(plat_priv);
  2230. }
  2231. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2232. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2233. {
  2234. int ret = 0;
  2235. struct cnss_subsys_info *subsys_info;
  2236. subsys_info = &plat_priv->subsys_info;
  2237. subsys_info->subsys_desc.name = plat_priv->device_name;
  2238. subsys_info->subsys_desc.owner = THIS_MODULE;
  2239. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2240. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2241. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2242. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2243. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2244. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2245. if (IS_ERR(subsys_info->subsys_device)) {
  2246. ret = PTR_ERR(subsys_info->subsys_device);
  2247. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2248. goto out;
  2249. }
  2250. subsys_info->subsys_handle =
  2251. subsystem_get(subsys_info->subsys_desc.name);
  2252. if (!subsys_info->subsys_handle) {
  2253. cnss_pr_err("Failed to get subsys_handle!\n");
  2254. ret = -EINVAL;
  2255. goto unregister_subsys;
  2256. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2257. ret = PTR_ERR(subsys_info->subsys_handle);
  2258. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2259. goto unregister_subsys;
  2260. }
  2261. return 0;
  2262. unregister_subsys:
  2263. subsys_unregister(subsys_info->subsys_device);
  2264. out:
  2265. return ret;
  2266. }
  2267. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2268. {
  2269. struct cnss_subsys_info *subsys_info;
  2270. subsys_info = &plat_priv->subsys_info;
  2271. subsystem_put(subsys_info->subsys_handle);
  2272. subsys_unregister(subsys_info->subsys_device);
  2273. }
  2274. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2275. {
  2276. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2277. return create_ramdump_device(subsys_info->subsys_desc.name,
  2278. subsys_info->subsys_desc.dev);
  2279. }
  2280. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2281. void *ramdump_dev)
  2282. {
  2283. destroy_ramdump_device(ramdump_dev);
  2284. }
  2285. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2286. {
  2287. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2288. struct ramdump_segment segment;
  2289. memset(&segment, 0, sizeof(segment));
  2290. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2291. segment.size = ramdump_info->ramdump_size;
  2292. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2293. }
  2294. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2295. {
  2296. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2297. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2298. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2299. struct ramdump_segment *ramdump_segs, *s;
  2300. struct cnss_dump_meta_info meta_info = {0};
  2301. int i, ret = 0;
  2302. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2303. sizeof(*ramdump_segs),
  2304. GFP_KERNEL);
  2305. if (!ramdump_segs)
  2306. return -ENOMEM;
  2307. s = ramdump_segs + 1;
  2308. for (i = 0; i < dump_data->nentries; i++) {
  2309. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2310. cnss_pr_err("Unsupported dump type: %d",
  2311. dump_seg->type);
  2312. continue;
  2313. }
  2314. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2315. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2316. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2317. }
  2318. meta_info.entry[dump_seg->type].entry_num++;
  2319. s->address = dump_seg->address;
  2320. s->v_address = (void __iomem *)dump_seg->v_address;
  2321. s->size = dump_seg->size;
  2322. s++;
  2323. dump_seg++;
  2324. }
  2325. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2326. meta_info.version = CNSS_RAMDUMP_VERSION;
  2327. meta_info.chipset = plat_priv->device_id;
  2328. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2329. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2330. ramdump_segs->size = sizeof(meta_info);
  2331. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2332. dump_data->nentries + 1);
  2333. kfree(ramdump_segs);
  2334. return ret;
  2335. }
  2336. #else
  2337. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2338. void *data)
  2339. {
  2340. struct cnss_plat_data *plat_priv =
  2341. container_of(nb, struct cnss_plat_data, panic_nb);
  2342. cnss_bus_dev_crash_shutdown(plat_priv);
  2343. return NOTIFY_DONE;
  2344. }
  2345. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2346. {
  2347. int ret;
  2348. if (!plat_priv)
  2349. return -ENODEV;
  2350. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2351. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2352. &plat_priv->panic_nb);
  2353. if (ret) {
  2354. cnss_pr_err("Failed to register panic handler\n");
  2355. return -EINVAL;
  2356. }
  2357. return 0;
  2358. }
  2359. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2360. {
  2361. int ret;
  2362. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2363. &plat_priv->panic_nb);
  2364. if (ret)
  2365. cnss_pr_err("Failed to unregister panic handler\n");
  2366. }
  2367. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2368. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2369. {
  2370. return &plat_priv->plat_dev->dev;
  2371. }
  2372. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2373. void *ramdump_dev)
  2374. {
  2375. }
  2376. #endif
  2377. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2378. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2379. {
  2380. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2381. struct qcom_dump_segment segment;
  2382. struct list_head head;
  2383. INIT_LIST_HEAD(&head);
  2384. memset(&segment, 0, sizeof(segment));
  2385. segment.va = ramdump_info->ramdump_va;
  2386. segment.size = ramdump_info->ramdump_size;
  2387. list_add(&segment.node, &head);
  2388. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2389. }
  2390. #else
  2391. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2392. {
  2393. return 0;
  2394. }
  2395. /* Using completion event inside dynamically allocated ramdump_desc
  2396. * may result a race between freeing the event after setting it to
  2397. * complete inside dev coredump free callback and the thread that is
  2398. * waiting for completion.
  2399. */
  2400. DECLARE_COMPLETION(dump_done);
  2401. #define TIMEOUT_SAVE_DUMP_MS 30000
  2402. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2403. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2404. { \
  2405. if (class == ELFCLASS32) \
  2406. return sizeof(struct elf32_##__xhdr); \
  2407. else \
  2408. return sizeof(struct elf64_##__xhdr); \
  2409. }
  2410. SIZEOF_ELF_STRUCT(phdr)
  2411. SIZEOF_ELF_STRUCT(hdr)
  2412. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2413. do { \
  2414. if (class == ELFCLASS32) \
  2415. ((struct elf32_##__xhdr *)arg)->member = value; \
  2416. else \
  2417. ((struct elf64_##__xhdr *)arg)->member = value; \
  2418. } while (0)
  2419. #define set_ehdr_property(arg, class, member, value) \
  2420. set_xhdr_property(hdr, arg, class, member, value)
  2421. #define set_phdr_property(arg, class, member, value) \
  2422. set_xhdr_property(phdr, arg, class, member, value)
  2423. /* These replace qcom_ramdump driver APIs called from common API
  2424. * cnss_do_elf_dump() by the ones defined here.
  2425. */
  2426. #define qcom_dump_segment cnss_qcom_dump_segment
  2427. #define qcom_elf_dump cnss_qcom_elf_dump
  2428. #define dump_enabled cnss_dump_enabled
  2429. struct cnss_qcom_dump_segment {
  2430. struct list_head node;
  2431. dma_addr_t da;
  2432. void *va;
  2433. size_t size;
  2434. };
  2435. struct cnss_qcom_ramdump_desc {
  2436. void *data;
  2437. struct completion dump_done;
  2438. };
  2439. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2440. void *data, size_t datalen)
  2441. {
  2442. struct cnss_qcom_ramdump_desc *desc = data;
  2443. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2444. datalen);
  2445. }
  2446. static void cnss_qcom_devcd_freev(void *data)
  2447. {
  2448. struct cnss_qcom_ramdump_desc *desc = data;
  2449. cnss_pr_dbg("Free dump data for dev coredump\n");
  2450. complete(&dump_done);
  2451. vfree(desc->data);
  2452. kfree(desc);
  2453. }
  2454. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2455. gfp_t gfp)
  2456. {
  2457. struct cnss_qcom_ramdump_desc *desc;
  2458. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2459. int ret;
  2460. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2461. if (!desc)
  2462. return -ENOMEM;
  2463. desc->data = data;
  2464. reinit_completion(&dump_done);
  2465. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2466. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2467. ret = wait_for_completion_timeout(&dump_done,
  2468. msecs_to_jiffies(timeout));
  2469. if (!ret)
  2470. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2471. timeout);
  2472. return ret ? 0 : -ETIMEDOUT;
  2473. }
  2474. /* Since the elf32 and elf64 identification is identical apart from
  2475. * the class, use elf32 by default.
  2476. */
  2477. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2478. {
  2479. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2480. ehdr->e_ident[EI_CLASS] = class;
  2481. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2482. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2483. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2484. }
  2485. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2486. unsigned char class)
  2487. {
  2488. struct cnss_qcom_dump_segment *segment;
  2489. void *phdr, *ehdr;
  2490. size_t data_size, offset;
  2491. int phnum = 0;
  2492. void *data;
  2493. void __iomem *ptr;
  2494. if (!segs || list_empty(segs))
  2495. return -EINVAL;
  2496. data_size = sizeof_elf_hdr(class);
  2497. list_for_each_entry(segment, segs, node) {
  2498. data_size += sizeof_elf_phdr(class) + segment->size;
  2499. phnum++;
  2500. }
  2501. data = vmalloc(data_size);
  2502. if (!data)
  2503. return -ENOMEM;
  2504. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2505. ehdr = data;
  2506. memset(ehdr, 0, sizeof_elf_hdr(class));
  2507. init_elf_identification(ehdr, class);
  2508. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2509. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2510. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2511. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2512. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2513. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2514. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2515. phdr = data + sizeof_elf_hdr(class);
  2516. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2517. list_for_each_entry(segment, segs, node) {
  2518. memset(phdr, 0, sizeof_elf_phdr(class));
  2519. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2520. set_phdr_property(phdr, class, p_offset, offset);
  2521. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2522. set_phdr_property(phdr, class, p_paddr, segment->da);
  2523. set_phdr_property(phdr, class, p_filesz, segment->size);
  2524. set_phdr_property(phdr, class, p_memsz, segment->size);
  2525. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2526. set_phdr_property(phdr, class, p_align, 0);
  2527. if (segment->va) {
  2528. memcpy(data + offset, segment->va, segment->size);
  2529. } else {
  2530. ptr = devm_ioremap(dev, segment->da, segment->size);
  2531. if (!ptr) {
  2532. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2533. &segment->da, segment->size);
  2534. memset(data + offset, 0xff, segment->size);
  2535. } else {
  2536. memcpy_fromio(data + offset, ptr,
  2537. segment->size);
  2538. }
  2539. }
  2540. offset += segment->size;
  2541. phdr += sizeof_elf_phdr(class);
  2542. }
  2543. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2544. }
  2545. /* Saving dump to file system is always needed in this case. */
  2546. static bool cnss_dump_enabled(void)
  2547. {
  2548. return true;
  2549. }
  2550. #endif /* CONFIG_QCOM_RAMDUMP */
  2551. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2552. {
  2553. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2554. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2555. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2556. struct qcom_dump_segment *seg;
  2557. struct cnss_dump_meta_info meta_info = {0};
  2558. struct list_head head;
  2559. int i, ret = 0;
  2560. if (!dump_enabled()) {
  2561. cnss_pr_info("Dump collection is not enabled\n");
  2562. return ret;
  2563. }
  2564. INIT_LIST_HEAD(&head);
  2565. for (i = 0; i < dump_data->nentries; i++) {
  2566. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2567. cnss_pr_err("Unsupported dump type: %d",
  2568. dump_seg->type);
  2569. continue;
  2570. }
  2571. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2572. if (!seg) {
  2573. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2574. __func__, i);
  2575. continue;
  2576. }
  2577. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2578. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2579. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2580. }
  2581. meta_info.entry[dump_seg->type].entry_num++;
  2582. seg->da = dump_seg->address;
  2583. seg->va = dump_seg->v_address;
  2584. seg->size = dump_seg->size;
  2585. list_add_tail(&seg->node, &head);
  2586. dump_seg++;
  2587. }
  2588. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2589. if (!seg) {
  2590. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2591. __func__);
  2592. goto skip_elf_dump;
  2593. }
  2594. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2595. meta_info.version = CNSS_RAMDUMP_VERSION;
  2596. meta_info.chipset = plat_priv->device_id;
  2597. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2598. seg->va = &meta_info;
  2599. seg->size = sizeof(meta_info);
  2600. list_add(&seg->node, &head);
  2601. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2602. skip_elf_dump:
  2603. while (!list_empty(&head)) {
  2604. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2605. list_del(&seg->node);
  2606. kfree(seg);
  2607. }
  2608. return ret;
  2609. }
  2610. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2611. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2612. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2613. size_t num_entries_loaded)
  2614. {
  2615. struct qcom_dump_segment *seg;
  2616. struct cnss_host_dump_meta_info meta_info = {0};
  2617. struct list_head head;
  2618. int dev_ret = 0;
  2619. struct device *new_device;
  2620. static const char * const wlan_str[] = {
  2621. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2622. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2623. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2624. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2625. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2626. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2627. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2628. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2629. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2630. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2631. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2632. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2633. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2634. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2635. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2636. [CNSS_HOST_HIF_CE_DESC_HISTORY] = "hif_ce_desc_history",
  2637. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2638. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data"
  2639. };
  2640. int i;
  2641. int ret = 0;
  2642. enum cnss_host_dump_type j;
  2643. if (!dump_enabled()) {
  2644. cnss_pr_info("Dump collection is not enabled\n");
  2645. return ret;
  2646. }
  2647. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2648. if (!new_device) {
  2649. cnss_pr_err("Failed to alloc device mem\n");
  2650. return -ENOMEM;
  2651. }
  2652. device_initialize(new_device);
  2653. dev_set_name(new_device, "wlan_driver");
  2654. dev_ret = device_add(new_device);
  2655. if (dev_ret) {
  2656. cnss_pr_err("Failed to add new device\n");
  2657. goto put_device;
  2658. }
  2659. INIT_LIST_HEAD(&head);
  2660. for (i = 0; i < num_entries_loaded; i++) {
  2661. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2662. if (!seg) {
  2663. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2664. continue;
  2665. }
  2666. seg->va = ssr_entry[i].buffer_pointer;
  2667. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2668. seg->size = ssr_entry[i].buffer_size;
  2669. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2670. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2671. strlen(wlan_str[j])) == 0) {
  2672. meta_info.entry[i].type = j;
  2673. }
  2674. }
  2675. meta_info.entry[i].entry_start = i + 1;
  2676. meta_info.entry[i].entry_num++;
  2677. list_add_tail(&seg->node, &head);
  2678. }
  2679. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2680. if (!seg) {
  2681. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2682. __func__);
  2683. goto skip_host_dump;
  2684. }
  2685. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2686. meta_info.version = CNSS_RAMDUMP_VERSION;
  2687. meta_info.chipset = plat_priv->device_id;
  2688. meta_info.total_entries = num_entries_loaded;
  2689. seg->va = &meta_info;
  2690. seg->da = (dma_addr_t)&meta_info;
  2691. seg->size = sizeof(meta_info);
  2692. list_add(&seg->node, &head);
  2693. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2694. skip_host_dump:
  2695. while (!list_empty(&head)) {
  2696. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2697. list_del(&seg->node);
  2698. kfree(seg);
  2699. }
  2700. device_del(new_device);
  2701. put_device:
  2702. put_device(new_device);
  2703. kfree(new_device);
  2704. return ret;
  2705. }
  2706. #endif
  2707. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2708. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2709. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2710. {
  2711. struct cnss_ramdump_info *ramdump_info;
  2712. struct msm_dump_entry dump_entry;
  2713. ramdump_info = &plat_priv->ramdump_info;
  2714. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2715. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2716. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2717. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2718. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2719. sizeof(ramdump_info->dump_data.name));
  2720. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2721. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2722. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2723. &dump_entry);
  2724. }
  2725. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2726. {
  2727. int ret = 0;
  2728. struct device *dev;
  2729. struct cnss_ramdump_info *ramdump_info;
  2730. u32 ramdump_size = 0;
  2731. dev = &plat_priv->plat_dev->dev;
  2732. ramdump_info = &plat_priv->ramdump_info;
  2733. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2734. /* dt type: legacy or converged */
  2735. ret = of_property_read_u32(dev->of_node,
  2736. "qcom,wlan-ramdump-dynamic",
  2737. &ramdump_size);
  2738. } else {
  2739. ret = of_property_read_u32(plat_priv->dev_node,
  2740. "qcom,wlan-ramdump-dynamic",
  2741. &ramdump_size);
  2742. }
  2743. if (ret == 0) {
  2744. ramdump_info->ramdump_va =
  2745. dma_alloc_coherent(dev, ramdump_size,
  2746. &ramdump_info->ramdump_pa,
  2747. GFP_KERNEL);
  2748. if (ramdump_info->ramdump_va)
  2749. ramdump_info->ramdump_size = ramdump_size;
  2750. }
  2751. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2752. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2753. if (ramdump_info->ramdump_size == 0) {
  2754. cnss_pr_info("Ramdump will not be collected");
  2755. goto out;
  2756. }
  2757. ret = cnss_init_dump_entry(plat_priv);
  2758. if (ret) {
  2759. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2760. goto free_ramdump;
  2761. }
  2762. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2763. if (!ramdump_info->ramdump_dev) {
  2764. cnss_pr_err("Failed to create ramdump device!");
  2765. ret = -ENOMEM;
  2766. goto free_ramdump;
  2767. }
  2768. return 0;
  2769. free_ramdump:
  2770. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2771. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2772. out:
  2773. return ret;
  2774. }
  2775. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2776. {
  2777. struct device *dev;
  2778. struct cnss_ramdump_info *ramdump_info;
  2779. dev = &plat_priv->plat_dev->dev;
  2780. ramdump_info = &plat_priv->ramdump_info;
  2781. if (ramdump_info->ramdump_dev)
  2782. cnss_destroy_ramdump_device(plat_priv,
  2783. ramdump_info->ramdump_dev);
  2784. if (ramdump_info->ramdump_va)
  2785. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2786. ramdump_info->ramdump_va,
  2787. ramdump_info->ramdump_pa);
  2788. }
  2789. /**
  2790. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2791. * @ret: Error returned by msm_dump_data_register_nominidump
  2792. *
  2793. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2794. * ignore failure.
  2795. *
  2796. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2797. */
  2798. static int cnss_ignore_dump_data_reg_fail(int ret)
  2799. {
  2800. return ret;
  2801. }
  2802. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2803. {
  2804. int ret = 0;
  2805. struct cnss_ramdump_info_v2 *info_v2;
  2806. struct cnss_dump_data *dump_data;
  2807. struct msm_dump_entry dump_entry;
  2808. struct device *dev = &plat_priv->plat_dev->dev;
  2809. u32 ramdump_size = 0;
  2810. info_v2 = &plat_priv->ramdump_info_v2;
  2811. dump_data = &info_v2->dump_data;
  2812. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2813. /* dt type: legacy or converged */
  2814. ret = of_property_read_u32(dev->of_node,
  2815. "qcom,wlan-ramdump-dynamic",
  2816. &ramdump_size);
  2817. } else {
  2818. ret = of_property_read_u32(plat_priv->dev_node,
  2819. "qcom,wlan-ramdump-dynamic",
  2820. &ramdump_size);
  2821. }
  2822. if (ret == 0)
  2823. info_v2->ramdump_size = ramdump_size;
  2824. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2825. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2826. if (!info_v2->dump_data_vaddr)
  2827. return -ENOMEM;
  2828. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2829. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2830. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2831. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2832. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2833. sizeof(dump_data->name));
  2834. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2835. dump_entry.addr = virt_to_phys(dump_data);
  2836. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2837. &dump_entry);
  2838. if (ret) {
  2839. ret = cnss_ignore_dump_data_reg_fail(ret);
  2840. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2841. ret ? "Error" : "Ignoring", ret);
  2842. goto free_ramdump;
  2843. }
  2844. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2845. if (!info_v2->ramdump_dev) {
  2846. cnss_pr_err("Failed to create ramdump device!\n");
  2847. ret = -ENOMEM;
  2848. goto free_ramdump;
  2849. }
  2850. return 0;
  2851. free_ramdump:
  2852. kfree(info_v2->dump_data_vaddr);
  2853. info_v2->dump_data_vaddr = NULL;
  2854. return ret;
  2855. }
  2856. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2857. {
  2858. struct cnss_ramdump_info_v2 *info_v2;
  2859. info_v2 = &plat_priv->ramdump_info_v2;
  2860. if (info_v2->ramdump_dev)
  2861. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2862. kfree(info_v2->dump_data_vaddr);
  2863. info_v2->dump_data_vaddr = NULL;
  2864. info_v2->dump_data_valid = false;
  2865. }
  2866. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2867. {
  2868. int ret = 0;
  2869. switch (plat_priv->device_id) {
  2870. case QCA6174_DEVICE_ID:
  2871. ret = cnss_register_ramdump_v1(plat_priv);
  2872. break;
  2873. case QCA6290_DEVICE_ID:
  2874. case QCA6390_DEVICE_ID:
  2875. case QCN7605_DEVICE_ID:
  2876. case QCA6490_DEVICE_ID:
  2877. case KIWI_DEVICE_ID:
  2878. case MANGO_DEVICE_ID:
  2879. case PEACH_DEVICE_ID:
  2880. ret = cnss_register_ramdump_v2(plat_priv);
  2881. break;
  2882. default:
  2883. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2884. ret = -ENODEV;
  2885. break;
  2886. }
  2887. return ret;
  2888. }
  2889. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2890. {
  2891. switch (plat_priv->device_id) {
  2892. case QCA6174_DEVICE_ID:
  2893. cnss_unregister_ramdump_v1(plat_priv);
  2894. break;
  2895. case QCA6290_DEVICE_ID:
  2896. case QCA6390_DEVICE_ID:
  2897. case QCN7605_DEVICE_ID:
  2898. case QCA6490_DEVICE_ID:
  2899. case KIWI_DEVICE_ID:
  2900. case MANGO_DEVICE_ID:
  2901. case PEACH_DEVICE_ID:
  2902. cnss_unregister_ramdump_v2(plat_priv);
  2903. break;
  2904. default:
  2905. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2906. break;
  2907. }
  2908. }
  2909. #else
  2910. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2911. {
  2912. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2913. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2914. struct device *dev = &plat_priv->plat_dev->dev;
  2915. u32 ramdump_size = 0;
  2916. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2917. &ramdump_size) == 0)
  2918. info_v2->ramdump_size = ramdump_size;
  2919. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2920. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2921. if (!info_v2->dump_data_vaddr)
  2922. return -ENOMEM;
  2923. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2924. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2925. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2926. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2927. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2928. sizeof(dump_data->name));
  2929. info_v2->ramdump_dev = dev;
  2930. return 0;
  2931. }
  2932. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2933. {
  2934. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2935. info_v2->ramdump_dev = NULL;
  2936. kfree(info_v2->dump_data_vaddr);
  2937. info_v2->dump_data_vaddr = NULL;
  2938. info_v2->dump_data_valid = false;
  2939. }
  2940. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2941. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2942. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2943. phys_addr_t *pa, unsigned long attrs)
  2944. {
  2945. struct sg_table sgt;
  2946. int ret;
  2947. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2948. if (ret) {
  2949. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2950. va, &dma, size, attrs);
  2951. return -EINVAL;
  2952. }
  2953. *pa = page_to_phys(sg_page(sgt.sgl));
  2954. sg_free_table(&sgt);
  2955. return 0;
  2956. }
  2957. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2958. enum cnss_fw_dump_type type, int seg_no,
  2959. void *va, phys_addr_t pa, size_t size)
  2960. {
  2961. struct md_region md_entry;
  2962. int ret;
  2963. switch (type) {
  2964. case CNSS_FW_IMAGE:
  2965. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2966. seg_no);
  2967. break;
  2968. case CNSS_FW_RDDM:
  2969. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2970. seg_no);
  2971. break;
  2972. case CNSS_FW_REMOTE_HEAP:
  2973. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2974. seg_no);
  2975. break;
  2976. default:
  2977. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2978. return -EINVAL;
  2979. }
  2980. md_entry.phys_addr = pa;
  2981. md_entry.virt_addr = (uintptr_t)va;
  2982. md_entry.size = size;
  2983. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2984. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2985. md_entry.name, va, &pa, size);
  2986. ret = msm_minidump_add_region(&md_entry);
  2987. if (ret < 0)
  2988. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2989. return ret;
  2990. }
  2991. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2992. enum cnss_fw_dump_type type, int seg_no,
  2993. void *va, phys_addr_t pa, size_t size)
  2994. {
  2995. struct md_region md_entry;
  2996. int ret;
  2997. switch (type) {
  2998. case CNSS_FW_IMAGE:
  2999. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3000. seg_no);
  3001. break;
  3002. case CNSS_FW_RDDM:
  3003. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3004. seg_no);
  3005. break;
  3006. case CNSS_FW_REMOTE_HEAP:
  3007. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3008. seg_no);
  3009. break;
  3010. default:
  3011. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3012. return -EINVAL;
  3013. }
  3014. md_entry.phys_addr = pa;
  3015. md_entry.virt_addr = (uintptr_t)va;
  3016. md_entry.size = size;
  3017. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3018. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3019. md_entry.name, va, &pa, size);
  3020. ret = msm_minidump_remove_region(&md_entry);
  3021. if (ret)
  3022. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3023. ret);
  3024. return ret;
  3025. }
  3026. #else
  3027. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3028. phys_addr_t *pa, unsigned long attrs)
  3029. {
  3030. return 0;
  3031. }
  3032. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3033. enum cnss_fw_dump_type type, int seg_no,
  3034. void *va, phys_addr_t pa, size_t size)
  3035. {
  3036. return 0;
  3037. }
  3038. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3039. enum cnss_fw_dump_type type, int seg_no,
  3040. void *va, phys_addr_t pa, size_t size)
  3041. {
  3042. return 0;
  3043. }
  3044. #endif /* CONFIG_QCOM_MINIDUMP */
  3045. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3046. const struct firmware **fw_entry,
  3047. const char *filename)
  3048. {
  3049. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3050. return request_firmware_direct(fw_entry, filename,
  3051. &plat_priv->plat_dev->dev);
  3052. else
  3053. return firmware_request_nowarn(fw_entry, filename,
  3054. &plat_priv->plat_dev->dev);
  3055. }
  3056. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3057. /**
  3058. * cnss_register_bus_scale() - Setup interconnect voting data
  3059. * @plat_priv: Platform data structure
  3060. *
  3061. * For different interconnect path configured in device tree setup voting data
  3062. * for list of bandwidth requirements.
  3063. *
  3064. * Result: 0 for success. -EINVAL if not configured
  3065. */
  3066. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3067. {
  3068. int ret = -EINVAL;
  3069. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3070. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3071. struct device *dev = &plat_priv->plat_dev->dev;
  3072. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3073. ret = of_property_read_u32(dev->of_node,
  3074. "qcom,icc-path-count",
  3075. &plat_priv->icc.path_count);
  3076. if (ret) {
  3077. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3078. return 0;
  3079. }
  3080. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3081. "qcom,bus-bw-cfg-count",
  3082. &plat_priv->icc.bus_bw_cfg_count);
  3083. if (ret) {
  3084. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3085. goto cleanup;
  3086. }
  3087. cfg_arr_size = plat_priv->icc.path_count *
  3088. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3089. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3090. if (!cfg_arr) {
  3091. cnss_pr_err("Failed to alloc cfg table mem\n");
  3092. ret = -ENOMEM;
  3093. goto cleanup;
  3094. }
  3095. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3096. "qcom,bus-bw-cfg", cfg_arr,
  3097. cfg_arr_size);
  3098. if (ret) {
  3099. cnss_pr_err("Invalid Bus BW Config Table\n");
  3100. goto cleanup;
  3101. }
  3102. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3103. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3104. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3105. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3106. GFP_KERNEL);
  3107. if (!bus_bw_info) {
  3108. ret = -ENOMEM;
  3109. goto out;
  3110. }
  3111. ret = of_property_read_string_index(dev->of_node,
  3112. "interconnect-names", idx,
  3113. &bus_bw_info->icc_name);
  3114. if (ret)
  3115. goto out;
  3116. bus_bw_info->icc_path =
  3117. of_icc_get(&plat_priv->plat_dev->dev,
  3118. bus_bw_info->icc_name);
  3119. if (IS_ERR(bus_bw_info->icc_path)) {
  3120. ret = PTR_ERR(bus_bw_info->icc_path);
  3121. if (ret != -EPROBE_DEFER) {
  3122. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3123. bus_bw_info->icc_name, ret);
  3124. goto out;
  3125. }
  3126. }
  3127. bus_bw_info->cfg_table =
  3128. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3129. sizeof(*bus_bw_info->cfg_table),
  3130. GFP_KERNEL);
  3131. if (!bus_bw_info->cfg_table) {
  3132. ret = -ENOMEM;
  3133. goto out;
  3134. }
  3135. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3136. bus_bw_info->icc_name);
  3137. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3138. CNSS_ICC_VOTE_MAX);
  3139. i < plat_priv->icc.bus_bw_cfg_count;
  3140. i++, j += 2) {
  3141. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3142. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3143. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3144. i, bus_bw_info->cfg_table[i].avg_bw,
  3145. bus_bw_info->cfg_table[i].peak_bw);
  3146. }
  3147. list_add_tail(&bus_bw_info->list,
  3148. &plat_priv->icc.list_head);
  3149. }
  3150. kfree(cfg_arr);
  3151. return 0;
  3152. out:
  3153. list_for_each_entry_safe(bus_bw_info, tmp,
  3154. &plat_priv->icc.list_head, list) {
  3155. list_del(&bus_bw_info->list);
  3156. }
  3157. cleanup:
  3158. kfree(cfg_arr);
  3159. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3160. return ret;
  3161. }
  3162. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3163. {
  3164. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3165. list_for_each_entry_safe(bus_bw_info, tmp,
  3166. &plat_priv->icc.list_head, list) {
  3167. list_del(&bus_bw_info->list);
  3168. if (bus_bw_info->icc_path)
  3169. icc_put(bus_bw_info->icc_path);
  3170. }
  3171. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3172. }
  3173. #else
  3174. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3175. {
  3176. return 0;
  3177. }
  3178. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3179. #endif /* CONFIG_INTERCONNECT */
  3180. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3181. {
  3182. struct cnss_plat_data *plat_priv = cb_ctx;
  3183. if (!plat_priv) {
  3184. cnss_pr_err("%s: Invalid context\n", __func__);
  3185. return;
  3186. }
  3187. if (status) {
  3188. cnss_pr_info("CNSS Daemon connected\n");
  3189. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3190. complete(&plat_priv->daemon_connected);
  3191. } else {
  3192. cnss_pr_info("CNSS Daemon disconnected\n");
  3193. reinit_completion(&plat_priv->daemon_connected);
  3194. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3195. }
  3196. }
  3197. static ssize_t enable_hds_store(struct device *dev,
  3198. struct device_attribute *attr,
  3199. const char *buf, size_t count)
  3200. {
  3201. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3202. unsigned int enable_hds = 0;
  3203. if (!plat_priv)
  3204. return -ENODEV;
  3205. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3206. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3207. return -EINVAL;
  3208. }
  3209. if (enable_hds)
  3210. plat_priv->hds_enabled = true;
  3211. else
  3212. plat_priv->hds_enabled = false;
  3213. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3214. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3215. return count;
  3216. }
  3217. static ssize_t recovery_show(struct device *dev,
  3218. struct device_attribute *attr,
  3219. char *buf)
  3220. {
  3221. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3222. u32 buf_size = PAGE_SIZE;
  3223. u32 curr_len = 0;
  3224. u32 buf_written = 0;
  3225. if (!plat_priv)
  3226. return -ENODEV;
  3227. buf_written = scnprintf(buf, buf_size,
  3228. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3229. "BIT0 -- wlan fw recovery\n"
  3230. "BIT1 -- wlan pcss recovery\n"
  3231. "---------------------------------\n");
  3232. curr_len += buf_written;
  3233. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3234. "WLAN recovery %s[%d]\n",
  3235. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3236. plat_priv->recovery_enabled);
  3237. curr_len += buf_written;
  3238. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3239. "WLAN PCSS recovery %s[%d]\n",
  3240. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3241. plat_priv->recovery_pcss_enabled);
  3242. curr_len += buf_written;
  3243. /*
  3244. * Now size of curr_len is not over page size for sure,
  3245. * later if new item or none-fixed size item added, need
  3246. * add check to make sure curr_len is not over page size.
  3247. */
  3248. return curr_len;
  3249. }
  3250. static ssize_t time_sync_period_show(struct device *dev,
  3251. struct device_attribute *attr,
  3252. char *buf)
  3253. {
  3254. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3255. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3256. plat_priv->ctrl_params.time_sync_period);
  3257. }
  3258. static ssize_t time_sync_period_store(struct device *dev,
  3259. struct device_attribute *attr,
  3260. const char *buf, size_t count)
  3261. {
  3262. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3263. unsigned int time_sync_period = 0;
  3264. if (!plat_priv)
  3265. return -ENODEV;
  3266. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3267. cnss_pr_err("Invalid time sync sysfs command\n");
  3268. return -EINVAL;
  3269. }
  3270. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3271. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3272. return count;
  3273. }
  3274. static ssize_t recovery_store(struct device *dev,
  3275. struct device_attribute *attr,
  3276. const char *buf, size_t count)
  3277. {
  3278. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3279. unsigned int recovery = 0;
  3280. if (!plat_priv)
  3281. return -ENODEV;
  3282. if (sscanf(buf, "%du", &recovery) != 1) {
  3283. cnss_pr_err("Invalid recovery sysfs command\n");
  3284. return -EINVAL;
  3285. }
  3286. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3287. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3288. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3289. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3290. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3291. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3292. cnss_send_subsys_restart_level_msg(plat_priv);
  3293. return count;
  3294. }
  3295. static ssize_t shutdown_store(struct device *dev,
  3296. struct device_attribute *attr,
  3297. const char *buf, size_t count)
  3298. {
  3299. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3300. cnss_pr_dbg("Received shutdown notification\n");
  3301. if (plat_priv) {
  3302. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3303. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3304. del_timer(&plat_priv->fw_boot_timer);
  3305. complete_all(&plat_priv->power_up_complete);
  3306. complete_all(&plat_priv->cal_complete);
  3307. cnss_pr_dbg("Shutdown notification handled\n");
  3308. }
  3309. return count;
  3310. }
  3311. static ssize_t fs_ready_store(struct device *dev,
  3312. struct device_attribute *attr,
  3313. const char *buf, size_t count)
  3314. {
  3315. int fs_ready = 0;
  3316. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3317. if (sscanf(buf, "%du", &fs_ready) != 1)
  3318. return -EINVAL;
  3319. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3320. fs_ready, count);
  3321. if (!plat_priv) {
  3322. cnss_pr_err("plat_priv is NULL\n");
  3323. return count;
  3324. }
  3325. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3326. cnss_pr_dbg("QMI is bypassed\n");
  3327. return count;
  3328. }
  3329. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3330. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3331. cnss_driver_event_post(plat_priv,
  3332. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3333. 0, NULL);
  3334. }
  3335. return count;
  3336. }
  3337. static ssize_t qdss_trace_start_store(struct device *dev,
  3338. struct device_attribute *attr,
  3339. const char *buf, size_t count)
  3340. {
  3341. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3342. wlfw_qdss_trace_start(plat_priv);
  3343. cnss_pr_dbg("Received QDSS start command\n");
  3344. return count;
  3345. }
  3346. static ssize_t qdss_trace_stop_store(struct device *dev,
  3347. struct device_attribute *attr,
  3348. const char *buf, size_t count)
  3349. {
  3350. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3351. u32 option = 0;
  3352. if (sscanf(buf, "%du", &option) != 1)
  3353. return -EINVAL;
  3354. wlfw_qdss_trace_stop(plat_priv, option);
  3355. cnss_pr_dbg("Received QDSS stop command\n");
  3356. return count;
  3357. }
  3358. static ssize_t qdss_conf_download_store(struct device *dev,
  3359. struct device_attribute *attr,
  3360. const char *buf, size_t count)
  3361. {
  3362. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3363. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3364. cnss_pr_dbg("Received QDSS download config command\n");
  3365. return count;
  3366. }
  3367. static ssize_t hw_trace_override_store(struct device *dev,
  3368. struct device_attribute *attr,
  3369. const char *buf, size_t count)
  3370. {
  3371. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3372. int tmp = 0;
  3373. if (sscanf(buf, "%du", &tmp) != 1)
  3374. return -EINVAL;
  3375. plat_priv->hw_trc_override = tmp;
  3376. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3377. return count;
  3378. }
  3379. static ssize_t charger_mode_store(struct device *dev,
  3380. struct device_attribute *attr,
  3381. const char *buf, size_t count)
  3382. {
  3383. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3384. int tmp = 0;
  3385. if (sscanf(buf, "%du", &tmp) != 1)
  3386. return -EINVAL;
  3387. plat_priv->charger_mode = tmp;
  3388. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3389. return count;
  3390. }
  3391. static DEVICE_ATTR_WO(fs_ready);
  3392. static DEVICE_ATTR_WO(shutdown);
  3393. static DEVICE_ATTR_RW(recovery);
  3394. static DEVICE_ATTR_WO(enable_hds);
  3395. static DEVICE_ATTR_WO(qdss_trace_start);
  3396. static DEVICE_ATTR_WO(qdss_trace_stop);
  3397. static DEVICE_ATTR_WO(qdss_conf_download);
  3398. static DEVICE_ATTR_WO(hw_trace_override);
  3399. static DEVICE_ATTR_WO(charger_mode);
  3400. static DEVICE_ATTR_RW(time_sync_period);
  3401. static struct attribute *cnss_attrs[] = {
  3402. &dev_attr_fs_ready.attr,
  3403. &dev_attr_shutdown.attr,
  3404. &dev_attr_recovery.attr,
  3405. &dev_attr_enable_hds.attr,
  3406. &dev_attr_qdss_trace_start.attr,
  3407. &dev_attr_qdss_trace_stop.attr,
  3408. &dev_attr_qdss_conf_download.attr,
  3409. &dev_attr_hw_trace_override.attr,
  3410. &dev_attr_charger_mode.attr,
  3411. &dev_attr_time_sync_period.attr,
  3412. NULL,
  3413. };
  3414. static struct attribute_group cnss_attr_group = {
  3415. .attrs = cnss_attrs,
  3416. };
  3417. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3418. {
  3419. struct device *dev = &plat_priv->plat_dev->dev;
  3420. int ret;
  3421. char cnss_name[CNSS_FS_NAME_SIZE];
  3422. char shutdown_name[32];
  3423. if (cnss_is_dual_wlan_enabled()) {
  3424. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3425. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3426. snprintf(shutdown_name, sizeof(shutdown_name),
  3427. "shutdown_wlan_%d", plat_priv->plat_idx);
  3428. } else {
  3429. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3430. snprintf(shutdown_name, sizeof(shutdown_name),
  3431. "shutdown_wlan");
  3432. }
  3433. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3434. if (ret) {
  3435. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3436. ret);
  3437. goto out;
  3438. }
  3439. /* This is only for backward compatibility. */
  3440. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3441. if (ret) {
  3442. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3443. ret);
  3444. goto rm_cnss_link;
  3445. }
  3446. return 0;
  3447. rm_cnss_link:
  3448. sysfs_remove_link(kernel_kobj, cnss_name);
  3449. out:
  3450. return ret;
  3451. }
  3452. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3453. {
  3454. char cnss_name[CNSS_FS_NAME_SIZE];
  3455. char shutdown_name[32];
  3456. if (cnss_is_dual_wlan_enabled()) {
  3457. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3458. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3459. snprintf(shutdown_name, sizeof(shutdown_name),
  3460. "shutdown_wlan_%d", plat_priv->plat_idx);
  3461. } else {
  3462. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3463. snprintf(shutdown_name, sizeof(shutdown_name),
  3464. "shutdown_wlan");
  3465. }
  3466. sysfs_remove_link(kernel_kobj, shutdown_name);
  3467. sysfs_remove_link(kernel_kobj, cnss_name);
  3468. }
  3469. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3470. {
  3471. int ret = 0;
  3472. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3473. &cnss_attr_group);
  3474. if (ret) {
  3475. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3476. ret);
  3477. goto out;
  3478. }
  3479. cnss_create_sysfs_link(plat_priv);
  3480. return 0;
  3481. out:
  3482. return ret;
  3483. }
  3484. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3485. {
  3486. cnss_remove_sysfs_link(plat_priv);
  3487. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3488. }
  3489. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3490. {
  3491. spin_lock_init(&plat_priv->event_lock);
  3492. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3493. WQ_UNBOUND, 1);
  3494. if (!plat_priv->event_wq) {
  3495. cnss_pr_err("Failed to create event workqueue!\n");
  3496. return -EFAULT;
  3497. }
  3498. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3499. INIT_LIST_HEAD(&plat_priv->event_list);
  3500. return 0;
  3501. }
  3502. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3503. {
  3504. destroy_workqueue(plat_priv->event_wq);
  3505. }
  3506. static int cnss_reboot_notifier(struct notifier_block *nb,
  3507. unsigned long action,
  3508. void *data)
  3509. {
  3510. struct cnss_plat_data *plat_priv =
  3511. container_of(nb, struct cnss_plat_data, reboot_nb);
  3512. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3513. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3514. del_timer(&plat_priv->fw_boot_timer);
  3515. complete_all(&plat_priv->power_up_complete);
  3516. complete_all(&plat_priv->cal_complete);
  3517. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3518. return NOTIFY_DONE;
  3519. }
  3520. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3521. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3522. {
  3523. struct Object client_env;
  3524. struct Object app_object;
  3525. u32 wifi_uid = HW_WIFI_UID;
  3526. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3527. int ret;
  3528. u8 state = 0;
  3529. /* Once this flag is set, secure peripheral feature
  3530. * will not be supported till next reboot
  3531. */
  3532. if (plat_priv->sec_peri_feature_disable)
  3533. return 0;
  3534. /* get rootObj */
  3535. ret = get_client_env_object(&client_env);
  3536. if (ret) {
  3537. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3538. goto end;
  3539. }
  3540. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3541. if (ret) {
  3542. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3543. if (ret == FEATURE_NOT_SUPPORTED) {
  3544. ret = 0; /* Do not Assert */
  3545. plat_priv->sec_peri_feature_disable = true;
  3546. cnss_pr_dbg("Secure HW feature not supported\n");
  3547. }
  3548. goto exit_release_clientenv;
  3549. }
  3550. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3551. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3552. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3553. ObjectCounts_pack(1, 1, 0, 0));
  3554. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3555. if (ret) {
  3556. if (ret == PERIPHERAL_NOT_FOUND) {
  3557. ret = 0; /* Do not Assert */
  3558. plat_priv->sec_peri_feature_disable = true;
  3559. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3560. }
  3561. goto exit_release_app_obj;
  3562. }
  3563. if (state == 1)
  3564. set_bit(CNSS_WLAN_HW_DISABLED,
  3565. &plat_priv->driver_state);
  3566. else
  3567. clear_bit(CNSS_WLAN_HW_DISABLED,
  3568. &plat_priv->driver_state);
  3569. exit_release_app_obj:
  3570. Object_release(app_object);
  3571. exit_release_clientenv:
  3572. Object_release(client_env);
  3573. end:
  3574. if (ret) {
  3575. cnss_pr_err("Unable to get HW disable status\n");
  3576. CNSS_ASSERT(0);
  3577. }
  3578. return ret;
  3579. }
  3580. #else
  3581. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3582. {
  3583. return 0;
  3584. }
  3585. #endif
  3586. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3587. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3588. {
  3589. }
  3590. #else
  3591. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3592. {
  3593. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3594. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3595. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3596. }
  3597. #endif
  3598. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3599. static void cnss_initialize_mem_pool(unsigned long device_id)
  3600. {
  3601. cnss_initialize_prealloc_pool(device_id);
  3602. }
  3603. static void cnss_deinitialize_mem_pool(void)
  3604. {
  3605. cnss_deinitialize_prealloc_pool();
  3606. }
  3607. #else
  3608. static void cnss_initialize_mem_pool(unsigned long device_id)
  3609. {
  3610. }
  3611. static void cnss_deinitialize_mem_pool(void)
  3612. {
  3613. }
  3614. #endif
  3615. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3616. {
  3617. int ret;
  3618. ret = cnss_init_sol_gpio(plat_priv);
  3619. if (ret)
  3620. return ret;
  3621. timer_setup(&plat_priv->fw_boot_timer,
  3622. cnss_bus_fw_boot_timeout_hdlr, 0);
  3623. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3624. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3625. if (ret)
  3626. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3627. ret);
  3628. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3629. if (ret)
  3630. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3631. ret);
  3632. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3633. init_completion(&plat_priv->power_up_complete);
  3634. init_completion(&plat_priv->cal_complete);
  3635. init_completion(&plat_priv->rddm_complete);
  3636. init_completion(&plat_priv->recovery_complete);
  3637. init_completion(&plat_priv->daemon_connected);
  3638. mutex_init(&plat_priv->dev_lock);
  3639. mutex_init(&plat_priv->driver_ops_lock);
  3640. plat_priv->recovery_ws =
  3641. wakeup_source_register(&plat_priv->plat_dev->dev,
  3642. "CNSS_FW_RECOVERY");
  3643. if (!plat_priv->recovery_ws)
  3644. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3645. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3646. cnss_daemon_connection_update_cb,
  3647. plat_priv);
  3648. if (ret)
  3649. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3650. ret);
  3651. cnss_sram_dump_init(plat_priv);
  3652. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3653. "qcom,rc-ep-short-channel"))
  3654. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3655. return 0;
  3656. }
  3657. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3658. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3659. {
  3660. }
  3661. #else
  3662. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3663. {
  3664. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3665. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3666. kfree(plat_priv->sram_dump);
  3667. }
  3668. #endif
  3669. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3670. {
  3671. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3672. plat_priv);
  3673. complete_all(&plat_priv->recovery_complete);
  3674. complete_all(&plat_priv->rddm_complete);
  3675. complete_all(&plat_priv->cal_complete);
  3676. complete_all(&plat_priv->power_up_complete);
  3677. complete_all(&plat_priv->daemon_connected);
  3678. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3679. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3680. del_timer(&plat_priv->fw_boot_timer);
  3681. wakeup_source_unregister(plat_priv->recovery_ws);
  3682. cnss_deinit_sol_gpio(plat_priv);
  3683. cnss_sram_dump_deinit(plat_priv);
  3684. kfree(plat_priv->on_chip_pmic_board_ids);
  3685. }
  3686. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3687. {
  3688. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3689. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3690. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3691. "qcom,wlan-cbc-enabled");
  3692. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3693. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3694. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3695. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3696. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3697. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3698. * enabled by default
  3699. */
  3700. plat_priv->adsp_pc_enabled = true;
  3701. }
  3702. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3703. {
  3704. struct device *dev = &plat_priv->plat_dev->dev;
  3705. plat_priv->use_pm_domain =
  3706. of_property_read_bool(dev->of_node, "use-pm-domain");
  3707. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3708. }
  3709. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3710. {
  3711. struct device *dev = &plat_priv->plat_dev->dev;
  3712. plat_priv->set_wlaon_pwr_ctrl =
  3713. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3714. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3715. plat_priv->set_wlaon_pwr_ctrl);
  3716. }
  3717. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3718. {
  3719. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3720. "qcom,converged-dt") ||
  3721. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3722. "qcom,same-dt-multi-dev") ||
  3723. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3724. "qcom,multi-wlan-exchg"));
  3725. }
  3726. static const struct platform_device_id cnss_platform_id_table[] = {
  3727. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3728. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3729. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3730. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3731. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3732. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3733. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3734. { .name = "qcaconv", .driver_data = 0, },
  3735. { },
  3736. };
  3737. static const struct of_device_id cnss_of_match_table[] = {
  3738. {
  3739. .compatible = "qcom,cnss",
  3740. .data = (void *)&cnss_platform_id_table[0]},
  3741. {
  3742. .compatible = "qcom,cnss-qca6290",
  3743. .data = (void *)&cnss_platform_id_table[1]},
  3744. {
  3745. .compatible = "qcom,cnss-qca6390",
  3746. .data = (void *)&cnss_platform_id_table[2]},
  3747. {
  3748. .compatible = "qcom,cnss-qca6490",
  3749. .data = (void *)&cnss_platform_id_table[3]},
  3750. {
  3751. .compatible = "qcom,cnss-kiwi",
  3752. .data = (void *)&cnss_platform_id_table[4]},
  3753. {
  3754. .compatible = "qcom,cnss-mango",
  3755. .data = (void *)&cnss_platform_id_table[5]},
  3756. {
  3757. .compatible = "qcom,cnss-peach",
  3758. .data = (void *)&cnss_platform_id_table[6]},
  3759. {
  3760. .compatible = "qcom,cnss-qca-converged",
  3761. .data = (void *)&cnss_platform_id_table[7]},
  3762. { },
  3763. };
  3764. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3765. static inline bool
  3766. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3767. {
  3768. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3769. "use-nv-mac");
  3770. }
  3771. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3772. {
  3773. struct device_node *child;
  3774. u32 id, i;
  3775. int id_n, device_identifier_gpio, ret;
  3776. u8 gpio_value;
  3777. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3778. return 0;
  3779. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3780. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3781. if (ret) {
  3782. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3783. return ret;
  3784. }
  3785. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3786. gpio_value = gpio_get_value(device_identifier_gpio);
  3787. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3788. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3789. child) {
  3790. if (strcmp(child->name, "chip_cfg"))
  3791. continue;
  3792. id_n = of_property_count_u32_elems(child, "supported-ids");
  3793. if (id_n <= 0) {
  3794. cnss_pr_err("Device id is NOT set\n");
  3795. return -EINVAL;
  3796. }
  3797. for (i = 0; i < id_n; i++) {
  3798. ret = of_property_read_u32_index(child,
  3799. "supported-ids",
  3800. i, &id);
  3801. if (ret) {
  3802. cnss_pr_err("Failed to read supported ids\n");
  3803. return -EINVAL;
  3804. }
  3805. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3806. plat_priv->plat_dev->dev.of_node = child;
  3807. plat_priv->device_id = QCA6490_DEVICE_ID;
  3808. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3809. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3810. child->name, i, id);
  3811. return 0;
  3812. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3813. plat_priv->plat_dev->dev.of_node = child;
  3814. plat_priv->device_id = KIWI_DEVICE_ID;
  3815. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3816. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3817. child->name, i, id);
  3818. return 0;
  3819. }
  3820. }
  3821. }
  3822. return -EINVAL;
  3823. }
  3824. static inline u32
  3825. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3826. {
  3827. bool is_converged_dt = of_property_read_bool(
  3828. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3829. bool is_multi_wlan_xchg;
  3830. if (is_converged_dt)
  3831. return CNSS_DTT_CONVERGED;
  3832. is_multi_wlan_xchg = of_property_read_bool(
  3833. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3834. if (is_multi_wlan_xchg)
  3835. return CNSS_DTT_MULTIEXCHG;
  3836. return CNSS_DTT_LEGACY;
  3837. }
  3838. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3839. {
  3840. int ret = 0;
  3841. int retry = 0;
  3842. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3843. return 0;
  3844. retry:
  3845. ret = cnss_power_on_device(plat_priv, true);
  3846. if (ret)
  3847. goto end;
  3848. ret = cnss_bus_init(plat_priv);
  3849. if (ret) {
  3850. if ((ret != -EPROBE_DEFER) &&
  3851. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3852. cnss_power_off_device(plat_priv);
  3853. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3854. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3855. goto retry;
  3856. }
  3857. goto power_off;
  3858. }
  3859. return 0;
  3860. power_off:
  3861. cnss_power_off_device(plat_priv);
  3862. end:
  3863. return ret;
  3864. }
  3865. int cnss_wlan_hw_enable(void)
  3866. {
  3867. struct cnss_plat_data *plat_priv;
  3868. int ret = 0;
  3869. if (cnss_is_dual_wlan_enabled())
  3870. plat_priv = cnss_get_first_plat_priv(NULL);
  3871. else
  3872. plat_priv = cnss_get_plat_priv(NULL);
  3873. if (!plat_priv)
  3874. return -ENODEV;
  3875. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3876. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3877. goto register_driver;
  3878. ret = cnss_wlan_device_init(plat_priv);
  3879. if (ret) {
  3880. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3881. CNSS_ASSERT(0);
  3882. return ret;
  3883. }
  3884. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3885. cnss_driver_event_post(plat_priv,
  3886. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3887. 0, NULL);
  3888. register_driver:
  3889. if (plat_priv->driver_ops)
  3890. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3891. return ret;
  3892. }
  3893. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3894. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3895. {
  3896. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3897. int ret = 0;
  3898. if (!plat_priv)
  3899. return -ENODEV;
  3900. /* If IMS server is connected, return success without QMI send */
  3901. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3902. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3903. return ret;
  3904. }
  3905. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3906. return ret;
  3907. }
  3908. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3909. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3910. unsigned long *thermal_state)
  3911. {
  3912. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3913. if (!tcdev || !tcdev->devdata) {
  3914. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3915. return -EINVAL;
  3916. }
  3917. cnss_tcdev = tcdev->devdata;
  3918. *thermal_state = cnss_tcdev->max_thermal_state;
  3919. return 0;
  3920. }
  3921. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3922. unsigned long *thermal_state)
  3923. {
  3924. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3925. if (!tcdev || !tcdev->devdata) {
  3926. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3927. return -EINVAL;
  3928. }
  3929. cnss_tcdev = tcdev->devdata;
  3930. *thermal_state = cnss_tcdev->curr_thermal_state;
  3931. return 0;
  3932. }
  3933. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3934. unsigned long thermal_state)
  3935. {
  3936. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3937. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3938. int ret = 0;
  3939. if (!tcdev || !tcdev->devdata) {
  3940. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3941. return -EINVAL;
  3942. }
  3943. cnss_tcdev = tcdev->devdata;
  3944. if (thermal_state > cnss_tcdev->max_thermal_state)
  3945. return -EINVAL;
  3946. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3947. thermal_state, cnss_tcdev->tcdev_id);
  3948. mutex_lock(&plat_priv->tcdev_lock);
  3949. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3950. thermal_state,
  3951. cnss_tcdev->tcdev_id);
  3952. if (!ret)
  3953. cnss_tcdev->curr_thermal_state = thermal_state;
  3954. mutex_unlock(&plat_priv->tcdev_lock);
  3955. if (ret) {
  3956. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3957. ret, cnss_tcdev->tcdev_id);
  3958. return ret;
  3959. }
  3960. return 0;
  3961. }
  3962. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3963. .get_max_state = cnss_tcdev_get_max_state,
  3964. .get_cur_state = cnss_tcdev_get_cur_state,
  3965. .set_cur_state = cnss_tcdev_set_cur_state,
  3966. };
  3967. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3968. int tcdev_id)
  3969. {
  3970. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3971. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3972. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3973. struct device_node *dev_node;
  3974. int ret = 0;
  3975. if (!priv) {
  3976. cnss_pr_err("Platform driver is not initialized!\n");
  3977. return -ENODEV;
  3978. }
  3979. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  3980. if (!cnss_tcdev) {
  3981. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  3982. return -ENOMEM;
  3983. }
  3984. cnss_tcdev->tcdev_id = tcdev_id;
  3985. cnss_tcdev->max_thermal_state = max_state;
  3986. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  3987. "qcom,cnss_cdev%d", tcdev_id);
  3988. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  3989. if (!dev_node) {
  3990. cnss_pr_err("Failed to get cooling device node\n");
  3991. kfree(cnss_tcdev);
  3992. return -EINVAL;
  3993. }
  3994. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  3995. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  3996. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  3997. cdev_node_name,
  3998. cnss_tcdev,
  3999. &cnss_cooling_ops);
  4000. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4001. ret = PTR_ERR(cnss_tcdev->tcdev);
  4002. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4003. ret, cnss_tcdev->tcdev_id);
  4004. kfree(cnss_tcdev);
  4005. } else {
  4006. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4007. cnss_tcdev->tcdev_id);
  4008. mutex_lock(&priv->tcdev_lock);
  4009. list_add(&cnss_tcdev->tcdev_list,
  4010. &priv->cnss_tcdev_list);
  4011. mutex_unlock(&priv->tcdev_lock);
  4012. }
  4013. } else {
  4014. cnss_pr_dbg("Cooling device registration not supported");
  4015. kfree(cnss_tcdev);
  4016. ret = -EOPNOTSUPP;
  4017. }
  4018. return ret;
  4019. }
  4020. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4021. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4022. {
  4023. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4024. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4025. if (!priv) {
  4026. cnss_pr_err("Platform driver is not initialized!\n");
  4027. return;
  4028. }
  4029. mutex_lock(&priv->tcdev_lock);
  4030. while (!list_empty(&priv->cnss_tcdev_list)) {
  4031. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4032. struct cnss_thermal_cdev,
  4033. tcdev_list);
  4034. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4035. list_del(&cnss_tcdev->tcdev_list);
  4036. kfree(cnss_tcdev);
  4037. }
  4038. mutex_unlock(&priv->tcdev_lock);
  4039. }
  4040. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4041. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4042. unsigned long *thermal_state,
  4043. int tcdev_id)
  4044. {
  4045. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4046. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4047. if (!priv) {
  4048. cnss_pr_err("Platform driver is not initialized!\n");
  4049. return -ENODEV;
  4050. }
  4051. mutex_lock(&priv->tcdev_lock);
  4052. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4053. if (cnss_tcdev->tcdev_id != tcdev_id)
  4054. continue;
  4055. *thermal_state = cnss_tcdev->curr_thermal_state;
  4056. mutex_unlock(&priv->tcdev_lock);
  4057. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4058. cnss_tcdev->curr_thermal_state, tcdev_id);
  4059. return 0;
  4060. }
  4061. mutex_unlock(&priv->tcdev_lock);
  4062. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4063. return -EINVAL;
  4064. }
  4065. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4066. static int cnss_probe(struct platform_device *plat_dev)
  4067. {
  4068. int ret = 0;
  4069. struct cnss_plat_data *plat_priv;
  4070. const struct of_device_id *of_id;
  4071. const struct platform_device_id *device_id;
  4072. if (cnss_get_plat_priv(plat_dev)) {
  4073. cnss_pr_err("Driver is already initialized!\n");
  4074. ret = -EEXIST;
  4075. goto out;
  4076. }
  4077. ret = cnss_plat_env_available();
  4078. if (ret)
  4079. goto out;
  4080. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4081. if (!of_id || !of_id->data) {
  4082. cnss_pr_err("Failed to find of match device!\n");
  4083. ret = -ENODEV;
  4084. goto out;
  4085. }
  4086. device_id = of_id->data;
  4087. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4088. GFP_KERNEL);
  4089. if (!plat_priv) {
  4090. ret = -ENOMEM;
  4091. goto out;
  4092. }
  4093. plat_priv->plat_dev = plat_dev;
  4094. plat_priv->dev_node = NULL;
  4095. plat_priv->device_id = device_id->driver_data;
  4096. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4097. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4098. plat_priv->dt_type);
  4099. plat_priv->use_fw_path_with_prefix =
  4100. cnss_use_fw_path_with_prefix(plat_priv);
  4101. ret = cnss_get_dev_cfg_node(plat_priv);
  4102. if (ret) {
  4103. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4104. goto reset_plat_dev;
  4105. }
  4106. cnss_initialize_mem_pool(plat_priv->device_id);
  4107. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4108. if (ret)
  4109. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  4110. ret);
  4111. ret = cnss_get_rc_num(plat_priv);
  4112. if (ret)
  4113. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4114. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4115. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4116. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4117. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4118. cnss_set_plat_priv(plat_dev, plat_priv);
  4119. cnss_set_device_name(plat_priv);
  4120. platform_set_drvdata(plat_dev, plat_priv);
  4121. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4122. INIT_LIST_HEAD(&plat_priv->clk_list);
  4123. cnss_get_pm_domain_info(plat_priv);
  4124. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4125. cnss_power_misc_params_init(plat_priv);
  4126. cnss_get_tcs_info(plat_priv);
  4127. cnss_get_cpr_info(plat_priv);
  4128. cnss_aop_interface_init(plat_priv);
  4129. cnss_init_control_params(plat_priv);
  4130. ret = cnss_get_resources(plat_priv);
  4131. if (ret)
  4132. goto reset_ctx;
  4133. ret = cnss_register_esoc(plat_priv);
  4134. if (ret)
  4135. goto free_res;
  4136. ret = cnss_register_bus_scale(plat_priv);
  4137. if (ret)
  4138. goto unreg_esoc;
  4139. ret = cnss_create_sysfs(plat_priv);
  4140. if (ret)
  4141. goto unreg_bus_scale;
  4142. ret = cnss_event_work_init(plat_priv);
  4143. if (ret)
  4144. goto remove_sysfs;
  4145. ret = cnss_dms_init(plat_priv);
  4146. if (ret)
  4147. goto deinit_event_work;
  4148. ret = cnss_debugfs_create(plat_priv);
  4149. if (ret)
  4150. goto deinit_dms;
  4151. ret = cnss_misc_init(plat_priv);
  4152. if (ret)
  4153. goto destroy_debugfs;
  4154. ret = cnss_wlan_hw_disable_check(plat_priv);
  4155. if (ret)
  4156. goto deinit_misc;
  4157. /* Make sure all platform related init are done before
  4158. * device power on and bus init.
  4159. */
  4160. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4161. ret = cnss_wlan_device_init(plat_priv);
  4162. if (ret)
  4163. goto deinit_misc;
  4164. } else {
  4165. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4166. }
  4167. cnss_register_coex_service(plat_priv);
  4168. cnss_register_ims_service(plat_priv);
  4169. mutex_init(&plat_priv->tcdev_lock);
  4170. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4171. cnss_pr_info("Platform driver probed successfully.\n");
  4172. return 0;
  4173. deinit_misc:
  4174. cnss_misc_deinit(plat_priv);
  4175. destroy_debugfs:
  4176. cnss_debugfs_destroy(plat_priv);
  4177. deinit_dms:
  4178. cnss_dms_deinit(plat_priv);
  4179. deinit_event_work:
  4180. cnss_event_work_deinit(plat_priv);
  4181. remove_sysfs:
  4182. cnss_remove_sysfs(plat_priv);
  4183. unreg_bus_scale:
  4184. cnss_unregister_bus_scale(plat_priv);
  4185. unreg_esoc:
  4186. cnss_unregister_esoc(plat_priv);
  4187. free_res:
  4188. cnss_put_resources(plat_priv);
  4189. reset_ctx:
  4190. cnss_aop_interface_deinit(plat_priv);
  4191. platform_set_drvdata(plat_dev, NULL);
  4192. cnss_deinitialize_mem_pool();
  4193. reset_plat_dev:
  4194. cnss_clear_plat_priv(plat_priv);
  4195. out:
  4196. return ret;
  4197. }
  4198. static int cnss_remove(struct platform_device *plat_dev)
  4199. {
  4200. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4201. plat_priv->audio_iommu_domain = NULL;
  4202. cnss_genl_exit();
  4203. cnss_unregister_ims_service(plat_priv);
  4204. cnss_unregister_coex_service(plat_priv);
  4205. cnss_bus_deinit(plat_priv);
  4206. cnss_misc_deinit(plat_priv);
  4207. cnss_debugfs_destroy(plat_priv);
  4208. cnss_dms_deinit(plat_priv);
  4209. cnss_qmi_deinit(plat_priv);
  4210. cnss_event_work_deinit(plat_priv);
  4211. cnss_cancel_dms_work();
  4212. cnss_remove_sysfs(plat_priv);
  4213. cnss_unregister_bus_scale(plat_priv);
  4214. cnss_unregister_esoc(plat_priv);
  4215. cnss_put_resources(plat_priv);
  4216. cnss_aop_interface_deinit(plat_priv);
  4217. cnss_deinitialize_mem_pool();
  4218. platform_set_drvdata(plat_dev, NULL);
  4219. cnss_clear_plat_priv(plat_priv);
  4220. return 0;
  4221. }
  4222. static struct platform_driver cnss_platform_driver = {
  4223. .probe = cnss_probe,
  4224. .remove = cnss_remove,
  4225. .driver = {
  4226. .name = "cnss2",
  4227. .of_match_table = cnss_of_match_table,
  4228. #ifdef CONFIG_CNSS_ASYNC
  4229. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4230. #endif
  4231. },
  4232. };
  4233. static bool cnss_check_compatible_node(void)
  4234. {
  4235. struct device_node *dn = NULL;
  4236. for_each_matching_node(dn, cnss_of_match_table) {
  4237. if (of_device_is_available(dn)) {
  4238. cnss_allow_driver_loading = true;
  4239. return true;
  4240. }
  4241. }
  4242. return false;
  4243. }
  4244. /**
  4245. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4246. *
  4247. * Valid device tree node means a node with "compatible" property from the
  4248. * device match table and "status" property is not disabled.
  4249. *
  4250. * Return: true if valid device tree node found, false if not found
  4251. */
  4252. static bool cnss_is_valid_dt_node_found(void)
  4253. {
  4254. struct device_node *dn = NULL;
  4255. for_each_matching_node(dn, cnss_of_match_table) {
  4256. if (of_device_is_available(dn))
  4257. break;
  4258. }
  4259. if (dn)
  4260. return true;
  4261. return false;
  4262. }
  4263. static int __init cnss_initialize(void)
  4264. {
  4265. int ret = 0;
  4266. if (!cnss_is_valid_dt_node_found())
  4267. return -ENODEV;
  4268. if (!cnss_check_compatible_node())
  4269. return ret;
  4270. cnss_debug_init();
  4271. ret = platform_driver_register(&cnss_platform_driver);
  4272. if (ret)
  4273. cnss_debug_deinit();
  4274. ret = cnss_genl_init();
  4275. if (ret < 0)
  4276. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4277. return ret;
  4278. }
  4279. static void __exit cnss_exit(void)
  4280. {
  4281. cnss_genl_exit();
  4282. platform_driver_unregister(&cnss_platform_driver);
  4283. cnss_debug_deinit();
  4284. }
  4285. module_init(cnss_initialize);
  4286. module_exit(cnss_exit);
  4287. MODULE_LICENSE("GPL v2");
  4288. MODULE_DESCRIPTION("CNSS2 Platform Driver");