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samsung-sm8650
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android_kernel_samsung_sm8650-modules
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android_kernel_...
/
pll
/
dsi_pll.h

dsi_pll.h 1.3 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef __MDSS_DSI_PLL_H
    7. 

  7. #define __MDSS_DSI_PLL_H
    8. 

  8. 

  9. #include <linux/clk-provider.h>
    10. 

  10. #include "pll_drv.h"
    11. 

  11. #define MAX_DSI_PLL_EN_SEQS	10
    12. 

  12. 

  13. /* Register offsets for 20nm PHY PLL */
    14. 

  14. #define MMSS_DSI_PHY_PLL_PLL_CNTRL		(0x0014)
    15. 

  15. #define MMSS_DSI_PHY_PLL_PLL_BKG_KVCO_CAL_EN	(0x002C)
    16. 

  16. #define MMSS_DSI_PHY_PLL_PLLLOCK_CMP_EN		(0x009C)
    17. 

  17. 

  18. struct lpfr_cfg {
    19. 

  19. 	unsigned long vco_rate;
    20. 

  20. 	u32 r;
    21. 

  21. };
    22. 

  22. 

  23. struct dsi_pll_vco_clk {
    24. 

  24. 	struct clk_hw	hw;
    25. 

  25. 	unsigned long	ref_clk_rate;
    26. 

  26. 	unsigned long	min_rate;
    27. 

  27. 	unsigned long	max_rate;
    28. 

  28. 	u32		pll_en_seq_cnt;
    29. 

  29. 	struct lpfr_cfg *lpfr_lut;
    30. 

  30. 	u32		lpfr_lut_size;
    31. 

  31. 	void		*priv;
    32. 

  32. 

  33. 	int (*pll_enable_seqs[MAX_DSI_PLL_EN_SEQS])
    34. 

  34. 			(struct mdss_pll_resources *dsi_pll_Res);
    35. 

  35. };
    36. 

  36. 

  37. int dsi_pll_clock_register_10nm(struct platform_device *pdev,
    38. 

  38. 				struct mdss_pll_resources *pll_res);
    39. 

  39. 

  40. int dsi_pll_clock_register_7nm(struct platform_device *pdev,
    41. 

  41. 				struct mdss_pll_resources *pll_res);
    42. 

  42. int dsi_pll_clock_register_28lpm(struct platform_device *pdev,
    43. 

  43. 				struct mdss_pll_resources *pll_res);
    44. 

  44. 

  45. static inline struct dsi_pll_vco_clk *to_vco_clk_hw(struct clk_hw *hw)
    46. 

  46. {
    47. 

  47. 	return container_of(hw, struct dsi_pll_vco_clk, hw);
    48. 

  48. }
    49. 

  49. 

  50. int dsi_pll_clock_register_14nm(struct platform_device *pdev,
    51. 

  51. 				struct mdss_pll_resources *pll_res);
    52. 

  52. #endif
    53.