sde_rm.c 56 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s] " fmt, __func__
  6. #include "sde_kms.h"
  7. #include "sde_hw_lm.h"
  8. #include "sde_hw_ctl.h"
  9. #include "sde_hw_cdm.h"
  10. #include "sde_hw_dspp.h"
  11. #include "sde_hw_ds.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_intf.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_encoder.h"
  16. #include "sde_connector.h"
  17. #include "sde_hw_dsc.h"
  18. #include "sde_crtc.h"
  19. #include "sde_hw_qdss.h"
  20. #define RESERVED_BY_OTHER(h, r) \
  21. (((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) ||\
  22. ((h)->rsvp_nxt && ((h)->rsvp_nxt->enc_id != (r)->enc_id)))
  23. #define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK))
  24. #define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_CLEAR))
  25. #define RM_RQ_DSPP(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DSPP))
  26. #define RM_RQ_DS(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DS))
  27. #define RM_RQ_CWB(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_CWB))
  28. #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \
  29. (t).num_comp_enc == (r).num_enc && \
  30. (t).num_intf == (r).num_intf)
  31. /**
  32. * toplogy information to be used when ctl path version does not
  33. * support driving more than one interface per ctl_path
  34. */
  35. static const struct sde_rm_topology_def g_top_table[] = {
  36. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  37. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  38. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  39. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true },
  40. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true },
  41. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  42. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  43. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  44. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  45. };
  46. /**
  47. * topology information to be used when the ctl path version
  48. * is SDE_CTL_CFG_VERSION_1_0_0
  49. */
  50. static const struct sde_rm_topology_def g_ctl_ver_1_top_table[] = {
  51. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false },
  52. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false },
  53. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false },
  54. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 1, true },
  55. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 1, true },
  56. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false },
  57. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false },
  58. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false },
  59. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true },
  60. };
  61. /**
  62. * struct sde_rm_requirements - Reservation requirements parameter bundle
  63. * @top_ctrl: topology control preference from kernel client
  64. * @top: selected topology for the display
  65. * @hw_res: Hardware resources required as reported by the encoders
  66. */
  67. struct sde_rm_requirements {
  68. uint64_t top_ctrl;
  69. const struct sde_rm_topology_def *topology;
  70. struct sde_encoder_hw_resources hw_res;
  71. };
  72. /**
  73. * struct sde_rm_rsvp - Use Case Reservation tagging structure
  74. * Used to tag HW blocks as reserved by a CRTC->Encoder->Connector chain
  75. * By using as a tag, rather than lists of pointers to HW blocks used
  76. * we can avoid some list management since we don't know how many blocks
  77. * of each type a given use case may require.
  78. * @list: List head for list of all reservations
  79. * @seq: Global RSVP sequence number for debugging, especially for
  80. * differentiating differenct allocations for same encoder.
  81. * @enc_id: Reservations are tracked by Encoder DRM object ID.
  82. * CRTCs may be connected to multiple Encoders.
  83. * An encoder or connector id identifies the display path.
  84. * @topology DRM<->HW topology use case
  85. */
  86. struct sde_rm_rsvp {
  87. struct list_head list;
  88. uint32_t seq;
  89. uint32_t enc_id;
  90. enum sde_rm_topology_name topology;
  91. };
  92. /**
  93. * struct sde_rm_hw_blk - hardware block tracking list member
  94. * @list: List head for list of all hardware blocks tracking items
  95. * @rsvp: Pointer to use case reservation if reserved by a client
  96. * @rsvp_nxt: Temporary pointer used during reservation to the incoming
  97. * request. Will be swapped into rsvp if proposal is accepted
  98. * @type: Type of hardware block this structure tracks
  99. * @id: Hardware ID number, within it's own space, ie. LM_X
  100. * @catalog: Pointer to the hardware catalog entry for this block
  101. * @hw: Pointer to the hardware register access object for this block
  102. */
  103. struct sde_rm_hw_blk {
  104. struct list_head list;
  105. struct sde_rm_rsvp *rsvp;
  106. struct sde_rm_rsvp *rsvp_nxt;
  107. enum sde_hw_blk_type type;
  108. uint32_t id;
  109. struct sde_hw_blk *hw;
  110. };
  111. /**
  112. * sde_rm_dbg_rsvp_stage - enum of steps in making reservation for event logging
  113. */
  114. enum sde_rm_dbg_rsvp_stage {
  115. SDE_RM_STAGE_BEGIN,
  116. SDE_RM_STAGE_AFTER_CLEAR,
  117. SDE_RM_STAGE_AFTER_RSVPNEXT,
  118. SDE_RM_STAGE_FINAL
  119. };
  120. static void _sde_rm_inc_resource_info_lm(struct sde_rm *rm,
  121. struct msm_resource_caps_info *avail_res,
  122. struct sde_rm_hw_blk *blk)
  123. {
  124. struct sde_rm_hw_blk *blk2;
  125. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  126. avail_res->num_lm++;
  127. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  128. /* Check for 3d muxes by comparing paired lms */
  129. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  130. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  131. /*
  132. * If lm2 is free, or
  133. * lm1 & lm2 reserved by same enc, check mask
  134. */
  135. if ((!blk2->rsvp || (blk->rsvp &&
  136. blk2->rsvp->enc_id == blk->rsvp->enc_id
  137. && lm_cfg->id > lm_cfg2->id)) &&
  138. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  139. avail_res->num_3dmux++;
  140. }
  141. }
  142. static void _sde_rm_dec_resource_info_lm(struct sde_rm *rm,
  143. struct msm_resource_caps_info *avail_res,
  144. struct sde_rm_hw_blk *blk)
  145. {
  146. struct sde_rm_hw_blk *blk2;
  147. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  148. avail_res->num_lm--;
  149. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  150. /* Check for 3d muxes by comparing paired lms */
  151. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  152. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  153. /* If lm2 is free and lm1 is now being reserved */
  154. if (!blk2->rsvp &&
  155. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  156. avail_res->num_3dmux--;
  157. }
  158. }
  159. static void _sde_rm_inc_resource_info(struct sde_rm *rm,
  160. struct msm_resource_caps_info *avail_res,
  161. struct sde_rm_hw_blk *blk)
  162. {
  163. enum sde_hw_blk_type type = blk->type;
  164. if (type == SDE_HW_BLK_LM)
  165. _sde_rm_inc_resource_info_lm(rm, avail_res, blk);
  166. else if (type == SDE_HW_BLK_CTL)
  167. avail_res->num_ctl++;
  168. else if (type == SDE_HW_BLK_DSC)
  169. avail_res->num_dsc++;
  170. }
  171. static void _sde_rm_dec_resource_info(struct sde_rm *rm,
  172. struct msm_resource_caps_info *avail_res,
  173. struct sde_rm_hw_blk *blk)
  174. {
  175. enum sde_hw_blk_type type = blk->type;
  176. if (type == SDE_HW_BLK_LM)
  177. _sde_rm_dec_resource_info_lm(rm, avail_res, blk);
  178. else if (type == SDE_HW_BLK_CTL)
  179. avail_res->num_ctl--;
  180. else if (type == SDE_HW_BLK_DSC)
  181. avail_res->num_dsc--;
  182. }
  183. void sde_rm_get_resource_info(struct sde_rm *rm,
  184. struct drm_encoder *drm_enc,
  185. struct msm_resource_caps_info *avail_res)
  186. {
  187. struct sde_rm_hw_blk *blk;
  188. enum sde_hw_blk_type type;
  189. struct sde_rm_rsvp rsvp;
  190. memcpy(avail_res, &rm->avail_res,
  191. sizeof(rm->avail_res));
  192. if (!drm_enc)
  193. return;
  194. rsvp.enc_id = drm_enc->base.id;
  195. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  196. list_for_each_entry(blk, &rm->hw_blks[type], list)
  197. if (blk->rsvp && blk->rsvp->enc_id == rsvp.enc_id)
  198. _sde_rm_inc_resource_info(rm, avail_res, blk);
  199. }
  200. static void _sde_rm_print_rsvps(
  201. struct sde_rm *rm,
  202. enum sde_rm_dbg_rsvp_stage stage)
  203. {
  204. struct sde_rm_rsvp *rsvp;
  205. struct sde_rm_hw_blk *blk;
  206. enum sde_hw_blk_type type;
  207. SDE_DEBUG("%d\n", stage);
  208. list_for_each_entry(rsvp, &rm->rsvps, list) {
  209. SDE_DEBUG("%d rsvp[s%ue%u] topology %d\n", stage, rsvp->seq,
  210. rsvp->enc_id, rsvp->topology);
  211. SDE_EVT32(stage, rsvp->seq, rsvp->enc_id, rsvp->topology);
  212. }
  213. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  214. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  215. if (!blk->rsvp && !blk->rsvp_nxt)
  216. continue;
  217. SDE_DEBUG("%d rsvp[s%ue%u->s%ue%u] %d %d\n", stage,
  218. (blk->rsvp) ? blk->rsvp->seq : 0,
  219. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  220. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  221. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  222. blk->type, blk->id);
  223. SDE_EVT32(stage,
  224. (blk->rsvp) ? blk->rsvp->seq : 0,
  225. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  226. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  227. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  228. blk->type, blk->id);
  229. }
  230. }
  231. }
  232. static void _sde_rm_print_rsvps_by_type(
  233. struct sde_rm *rm,
  234. enum sde_hw_blk_type type)
  235. {
  236. struct sde_rm_hw_blk *blk;
  237. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  238. if (!blk->rsvp && !blk->rsvp_nxt)
  239. continue;
  240. SDE_ERROR("rsvp[s%ue%u->s%ue%u] %d %d\n",
  241. (blk->rsvp) ? blk->rsvp->seq : 0,
  242. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  243. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  244. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  245. blk->type, blk->id);
  246. SDE_EVT32((blk->rsvp) ? blk->rsvp->seq : 0,
  247. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  248. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  249. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  250. blk->type, blk->id);
  251. }
  252. }
  253. struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm)
  254. {
  255. return rm->hw_mdp;
  256. }
  257. void sde_rm_init_hw_iter(
  258. struct sde_rm_hw_iter *iter,
  259. uint32_t enc_id,
  260. enum sde_hw_blk_type type)
  261. {
  262. memset(iter, 0, sizeof(*iter));
  263. iter->enc_id = enc_id;
  264. iter->type = type;
  265. }
  266. enum sde_rm_topology_name sde_rm_get_topology_name(
  267. struct msm_display_topology topology)
  268. {
  269. int i;
  270. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  271. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology))
  272. return g_top_table[i].top_name;
  273. return SDE_RM_TOPOLOGY_NONE;
  274. }
  275. static bool _sde_rm_get_hw_locked(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  276. {
  277. struct list_head *blk_list;
  278. if (!rm || !i || i->type >= SDE_HW_BLK_MAX) {
  279. SDE_ERROR("invalid rm\n");
  280. return false;
  281. }
  282. i->hw = NULL;
  283. blk_list = &rm->hw_blks[i->type];
  284. if (i->blk && (&i->blk->list == blk_list)) {
  285. SDE_DEBUG("attempt resume iteration past last\n");
  286. return false;
  287. }
  288. i->blk = list_prepare_entry(i->blk, blk_list, list);
  289. list_for_each_entry_continue(i->blk, blk_list, list) {
  290. struct sde_rm_rsvp *rsvp = i->blk->rsvp;
  291. if (i->blk->type != i->type) {
  292. SDE_ERROR("found incorrect block type %d on %d list\n",
  293. i->blk->type, i->type);
  294. return false;
  295. }
  296. if ((i->enc_id == 0) || (rsvp && rsvp->enc_id == i->enc_id)) {
  297. i->hw = i->blk->hw;
  298. SDE_DEBUG("found type %d id %d for enc %d\n",
  299. i->type, i->blk->id, i->enc_id);
  300. return true;
  301. }
  302. }
  303. SDE_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
  304. return false;
  305. }
  306. static bool _sde_rm_request_hw_blk_locked(struct sde_rm *rm,
  307. struct sde_rm_hw_request *hw_blk_info)
  308. {
  309. struct list_head *blk_list;
  310. struct sde_rm_hw_blk *blk = NULL;
  311. if (!rm || !hw_blk_info || hw_blk_info->type >= SDE_HW_BLK_MAX) {
  312. SDE_ERROR("invalid rm\n");
  313. return false;
  314. }
  315. hw_blk_info->hw = NULL;
  316. blk_list = &rm->hw_blks[hw_blk_info->type];
  317. blk = list_prepare_entry(blk, blk_list, list);
  318. list_for_each_entry_continue(blk, blk_list, list) {
  319. if (blk->type != hw_blk_info->type) {
  320. SDE_ERROR("found incorrect block type %d on %d list\n",
  321. blk->type, hw_blk_info->type);
  322. return false;
  323. }
  324. if (blk->hw->id == hw_blk_info->id) {
  325. hw_blk_info->hw = blk->hw;
  326. SDE_DEBUG("found type %d id %d\n",
  327. blk->type, blk->id);
  328. return true;
  329. }
  330. }
  331. SDE_DEBUG("no match, type %d id %d\n", hw_blk_info->type,
  332. hw_blk_info->id);
  333. return false;
  334. }
  335. bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  336. {
  337. bool ret;
  338. mutex_lock(&rm->rm_lock);
  339. ret = _sde_rm_get_hw_locked(rm, i);
  340. mutex_unlock(&rm->rm_lock);
  341. return ret;
  342. }
  343. bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw)
  344. {
  345. bool ret;
  346. mutex_lock(&rm->rm_lock);
  347. ret = _sde_rm_request_hw_blk_locked(rm, hw);
  348. mutex_unlock(&rm->rm_lock);
  349. return ret;
  350. }
  351. static void _sde_rm_hw_destroy(enum sde_hw_blk_type type, void *hw)
  352. {
  353. switch (type) {
  354. case SDE_HW_BLK_LM:
  355. sde_hw_lm_destroy(hw);
  356. break;
  357. case SDE_HW_BLK_DSPP:
  358. sde_hw_dspp_destroy(hw);
  359. break;
  360. case SDE_HW_BLK_DS:
  361. sde_hw_ds_destroy(hw);
  362. break;
  363. case SDE_HW_BLK_CTL:
  364. sde_hw_ctl_destroy(hw);
  365. break;
  366. case SDE_HW_BLK_CDM:
  367. sde_hw_cdm_destroy(hw);
  368. break;
  369. case SDE_HW_BLK_PINGPONG:
  370. sde_hw_pingpong_destroy(hw);
  371. break;
  372. case SDE_HW_BLK_INTF:
  373. sde_hw_intf_destroy(hw);
  374. break;
  375. case SDE_HW_BLK_WB:
  376. sde_hw_wb_destroy(hw);
  377. break;
  378. case SDE_HW_BLK_DSC:
  379. sde_hw_dsc_destroy(hw);
  380. break;
  381. case SDE_HW_BLK_QDSS:
  382. sde_hw_qdss_destroy(hw);
  383. break;
  384. case SDE_HW_BLK_SSPP:
  385. /* SSPPs are not managed by the resource manager */
  386. case SDE_HW_BLK_TOP:
  387. /* Top is a singleton, not managed in hw_blks list */
  388. case SDE_HW_BLK_MAX:
  389. default:
  390. SDE_ERROR("unsupported block type %d\n", type);
  391. break;
  392. }
  393. }
  394. int sde_rm_destroy(struct sde_rm *rm)
  395. {
  396. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  397. struct sde_rm_hw_blk *hw_cur, *hw_nxt;
  398. enum sde_hw_blk_type type;
  399. if (!rm) {
  400. SDE_ERROR("invalid rm\n");
  401. return -EINVAL;
  402. }
  403. list_for_each_entry_safe(rsvp_cur, rsvp_nxt, &rm->rsvps, list) {
  404. list_del(&rsvp_cur->list);
  405. kfree(rsvp_cur);
  406. }
  407. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  408. list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
  409. list) {
  410. list_del(&hw_cur->list);
  411. _sde_rm_hw_destroy(hw_cur->type, hw_cur->hw);
  412. kfree(hw_cur);
  413. }
  414. }
  415. sde_hw_mdp_destroy(rm->hw_mdp);
  416. rm->hw_mdp = NULL;
  417. mutex_destroy(&rm->rm_lock);
  418. return 0;
  419. }
  420. static int _sde_rm_hw_blk_create(
  421. struct sde_rm *rm,
  422. struct sde_mdss_cfg *cat,
  423. void __iomem *mmio,
  424. enum sde_hw_blk_type type,
  425. uint32_t id,
  426. void *hw_catalog_info)
  427. {
  428. struct sde_rm_hw_blk *blk;
  429. struct sde_hw_mdp *hw_mdp;
  430. void *hw;
  431. hw_mdp = rm->hw_mdp;
  432. switch (type) {
  433. case SDE_HW_BLK_LM:
  434. hw = sde_hw_lm_init(id, mmio, cat);
  435. break;
  436. case SDE_HW_BLK_DSPP:
  437. hw = sde_hw_dspp_init(id, mmio, cat);
  438. break;
  439. case SDE_HW_BLK_DS:
  440. hw = sde_hw_ds_init(id, mmio, cat);
  441. break;
  442. case SDE_HW_BLK_CTL:
  443. hw = sde_hw_ctl_init(id, mmio, cat);
  444. break;
  445. case SDE_HW_BLK_CDM:
  446. hw = sde_hw_cdm_init(id, mmio, cat, hw_mdp);
  447. break;
  448. case SDE_HW_BLK_PINGPONG:
  449. hw = sde_hw_pingpong_init(id, mmio, cat);
  450. break;
  451. case SDE_HW_BLK_INTF:
  452. hw = sde_hw_intf_init(id, mmio, cat);
  453. break;
  454. case SDE_HW_BLK_WB:
  455. hw = sde_hw_wb_init(id, mmio, cat, hw_mdp);
  456. break;
  457. case SDE_HW_BLK_DSC:
  458. hw = sde_hw_dsc_init(id, mmio, cat);
  459. break;
  460. case SDE_HW_BLK_QDSS:
  461. hw = sde_hw_qdss_init(id, mmio, cat);
  462. break;
  463. case SDE_HW_BLK_SSPP:
  464. /* SSPPs are not managed by the resource manager */
  465. case SDE_HW_BLK_TOP:
  466. /* Top is a singleton, not managed in hw_blks list */
  467. case SDE_HW_BLK_MAX:
  468. default:
  469. SDE_ERROR("unsupported block type %d\n", type);
  470. return -EINVAL;
  471. }
  472. if (IS_ERR_OR_NULL(hw)) {
  473. SDE_ERROR("failed hw object creation: type %d, err %ld\n",
  474. type, PTR_ERR(hw));
  475. return -EFAULT;
  476. }
  477. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  478. if (!blk) {
  479. _sde_rm_hw_destroy(type, hw);
  480. return -ENOMEM;
  481. }
  482. blk->type = type;
  483. blk->id = id;
  484. blk->hw = hw;
  485. list_add_tail(&blk->list, &rm->hw_blks[type]);
  486. _sde_rm_inc_resource_info(rm, &rm->avail_res, blk);
  487. return 0;
  488. }
  489. static int _sde_rm_hw_blk_create_new(struct sde_rm *rm,
  490. struct sde_mdss_cfg *cat,
  491. void __iomem *mmio)
  492. {
  493. int i, rc = 0;
  494. for (i = 0; i < cat->dspp_count; i++) {
  495. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSPP,
  496. cat->dspp[i].id, &cat->dspp[i]);
  497. if (rc) {
  498. SDE_ERROR("failed: dspp hw not available\n");
  499. goto fail;
  500. }
  501. }
  502. if (cat->mdp[0].has_dest_scaler) {
  503. for (i = 0; i < cat->ds_count; i++) {
  504. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DS,
  505. cat->ds[i].id, &cat->ds[i]);
  506. if (rc) {
  507. SDE_ERROR("failed: ds hw not available\n");
  508. goto fail;
  509. }
  510. }
  511. }
  512. for (i = 0; i < cat->pingpong_count; i++) {
  513. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_PINGPONG,
  514. cat->pingpong[i].id, &cat->pingpong[i]);
  515. if (rc) {
  516. SDE_ERROR("failed: pp hw not available\n");
  517. goto fail;
  518. }
  519. }
  520. for (i = 0; i < cat->dsc_count; i++) {
  521. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSC,
  522. cat->dsc[i].id, &cat->dsc[i]);
  523. if (rc) {
  524. SDE_ERROR("failed: dsc hw not available\n");
  525. goto fail;
  526. }
  527. }
  528. for (i = 0; i < cat->intf_count; i++) {
  529. if (cat->intf[i].type == INTF_NONE) {
  530. SDE_DEBUG("skip intf %d with type none\n", i);
  531. continue;
  532. }
  533. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_INTF,
  534. cat->intf[i].id, &cat->intf[i]);
  535. if (rc) {
  536. SDE_ERROR("failed: intf hw not available\n");
  537. goto fail;
  538. }
  539. }
  540. for (i = 0; i < cat->wb_count; i++) {
  541. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_WB,
  542. cat->wb[i].id, &cat->wb[i]);
  543. if (rc) {
  544. SDE_ERROR("failed: wb hw not available\n");
  545. goto fail;
  546. }
  547. }
  548. for (i = 0; i < cat->ctl_count; i++) {
  549. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CTL,
  550. cat->ctl[i].id, &cat->ctl[i]);
  551. if (rc) {
  552. SDE_ERROR("failed: ctl hw not available\n");
  553. goto fail;
  554. }
  555. }
  556. for (i = 0; i < cat->cdm_count; i++) {
  557. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CDM,
  558. cat->cdm[i].id, &cat->cdm[i]);
  559. if (rc) {
  560. SDE_ERROR("failed: cdm hw not available\n");
  561. goto fail;
  562. }
  563. }
  564. for (i = 0; i < cat->qdss_count; i++) {
  565. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_QDSS,
  566. cat->qdss[i].id, &cat->qdss[i]);
  567. if (rc) {
  568. SDE_ERROR("failed: qdss hw not available\n");
  569. goto fail;
  570. }
  571. }
  572. fail:
  573. return rc;
  574. }
  575. int sde_rm_init(struct sde_rm *rm,
  576. struct sde_mdss_cfg *cat,
  577. void __iomem *mmio,
  578. struct drm_device *dev)
  579. {
  580. int i, rc = 0;
  581. enum sde_hw_blk_type type;
  582. if (!rm || !cat || !mmio || !dev) {
  583. SDE_ERROR("invalid input params\n");
  584. return -EINVAL;
  585. }
  586. /* Clear, setup lists */
  587. memset(rm, 0, sizeof(*rm));
  588. mutex_init(&rm->rm_lock);
  589. INIT_LIST_HEAD(&rm->rsvps);
  590. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  591. INIT_LIST_HEAD(&rm->hw_blks[type]);
  592. rm->dev = dev;
  593. if (IS_SDE_CTL_REV_100(cat->ctl_rev))
  594. rm->topology_tbl = g_ctl_ver_1_top_table;
  595. else
  596. rm->topology_tbl = g_top_table;
  597. /* Some of the sub-blocks require an mdptop to be created */
  598. rm->hw_mdp = sde_hw_mdptop_init(MDP_TOP, mmio, cat);
  599. if (IS_ERR_OR_NULL(rm->hw_mdp)) {
  600. rc = PTR_ERR(rm->hw_mdp);
  601. rm->hw_mdp = NULL;
  602. SDE_ERROR("failed: mdp hw not available\n");
  603. goto fail;
  604. }
  605. /* Interrogate HW catalog and create tracking items for hw blocks */
  606. for (i = 0; i < cat->mixer_count; i++) {
  607. struct sde_lm_cfg *lm = &cat->mixer[i];
  608. if (lm->pingpong == PINGPONG_MAX) {
  609. SDE_ERROR("mixer %d without pingpong\n", lm->id);
  610. goto fail;
  611. }
  612. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_LM,
  613. cat->mixer[i].id, &cat->mixer[i]);
  614. if (rc) {
  615. SDE_ERROR("failed: lm hw not available\n");
  616. goto fail;
  617. }
  618. if (!rm->lm_max_width) {
  619. rm->lm_max_width = lm->sblk->maxwidth;
  620. } else if (rm->lm_max_width != lm->sblk->maxwidth) {
  621. /*
  622. * Don't expect to have hw where lm max widths differ.
  623. * If found, take the min.
  624. */
  625. SDE_ERROR("unsupported: lm maxwidth differs\n");
  626. if (rm->lm_max_width > lm->sblk->maxwidth)
  627. rm->lm_max_width = lm->sblk->maxwidth;
  628. }
  629. }
  630. rc = _sde_rm_hw_blk_create_new(rm, cat, mmio);
  631. if (!rc)
  632. return 0;
  633. fail:
  634. sde_rm_destroy(rm);
  635. return rc;
  636. }
  637. static bool _sde_rm_check_lm(
  638. struct sde_rm *rm,
  639. struct sde_rm_rsvp *rsvp,
  640. struct sde_rm_requirements *reqs,
  641. const struct sde_lm_cfg *lm_cfg,
  642. struct sde_rm_hw_blk *lm,
  643. struct sde_rm_hw_blk **dspp,
  644. struct sde_rm_hw_blk **ds,
  645. struct sde_rm_hw_blk **pp)
  646. {
  647. bool is_valid_dspp, is_valid_ds, ret;
  648. is_valid_dspp = (lm_cfg->dspp != DSPP_MAX) ? true : false;
  649. is_valid_ds = (lm_cfg->ds != DS_MAX) ? true : false;
  650. /**
  651. * RM_RQ_X: specification of which LMs to choose
  652. * is_valid_X: indicates whether LM is tied with block X
  653. * ret: true if given LM matches the user requirement,
  654. * false otherwise
  655. */
  656. if (RM_RQ_DSPP(reqs) && RM_RQ_DS(reqs))
  657. ret = (is_valid_dspp && is_valid_ds);
  658. else if (RM_RQ_DSPP(reqs))
  659. ret = is_valid_dspp;
  660. else if (RM_RQ_DS(reqs))
  661. ret = is_valid_ds;
  662. else
  663. ret = !(is_valid_dspp || is_valid_ds);
  664. if (!ret) {
  665. SDE_DEBUG(
  666. "fail:lm(%d)req_dspp(%d)dspp(%d)req_ds(%d)ds(%d)\n",
  667. lm_cfg->id, (bool)(RM_RQ_DSPP(reqs)),
  668. lm_cfg->dspp, (bool)(RM_RQ_DS(reqs)),
  669. lm_cfg->ds);
  670. return ret;
  671. }
  672. return true;
  673. }
  674. static bool _sde_rm_reserve_dspp(
  675. struct sde_rm *rm,
  676. struct sde_rm_rsvp *rsvp,
  677. const struct sde_lm_cfg *lm_cfg,
  678. struct sde_rm_hw_blk *lm,
  679. struct sde_rm_hw_blk **dspp)
  680. {
  681. struct sde_rm_hw_iter iter;
  682. if (lm_cfg->dspp != DSPP_MAX) {
  683. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSPP);
  684. while (_sde_rm_get_hw_locked(rm, &iter)) {
  685. if (iter.blk->id == lm_cfg->dspp) {
  686. *dspp = iter.blk;
  687. break;
  688. }
  689. }
  690. if (!*dspp) {
  691. SDE_DEBUG("lm %d failed to retrieve dspp %d\n", lm->id,
  692. lm_cfg->dspp);
  693. return false;
  694. }
  695. if (RESERVED_BY_OTHER(*dspp, rsvp)) {
  696. SDE_DEBUG("lm %d dspp %d already reserved\n",
  697. lm->id, (*dspp)->id);
  698. return false;
  699. }
  700. }
  701. return true;
  702. }
  703. static bool _sde_rm_reserve_ds(
  704. struct sde_rm *rm,
  705. struct sde_rm_rsvp *rsvp,
  706. const struct sde_lm_cfg *lm_cfg,
  707. struct sde_rm_hw_blk *lm,
  708. struct sde_rm_hw_blk **ds)
  709. {
  710. struct sde_rm_hw_iter iter;
  711. if (lm_cfg->ds != DS_MAX) {
  712. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DS);
  713. while (_sde_rm_get_hw_locked(rm, &iter)) {
  714. if (iter.blk->id == lm_cfg->ds) {
  715. *ds = iter.blk;
  716. break;
  717. }
  718. }
  719. if (!*ds) {
  720. SDE_DEBUG("lm %d failed to retrieve ds %d\n", lm->id,
  721. lm_cfg->ds);
  722. return false;
  723. }
  724. if (RESERVED_BY_OTHER(*ds, rsvp)) {
  725. SDE_DEBUG("lm %d ds %d already reserved\n",
  726. lm->id, (*ds)->id);
  727. return false;
  728. }
  729. }
  730. return true;
  731. }
  732. static bool _sde_rm_reserve_pp(
  733. struct sde_rm *rm,
  734. struct sde_rm_rsvp *rsvp,
  735. struct sde_rm_requirements *reqs,
  736. const struct sde_lm_cfg *lm_cfg,
  737. const struct sde_pingpong_cfg *pp_cfg,
  738. struct sde_rm_hw_blk *lm,
  739. struct sde_rm_hw_blk **dspp,
  740. struct sde_rm_hw_blk **ds,
  741. struct sde_rm_hw_blk **pp)
  742. {
  743. struct sde_rm_hw_iter iter;
  744. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_PINGPONG);
  745. while (_sde_rm_get_hw_locked(rm, &iter)) {
  746. if (iter.blk->id == lm_cfg->pingpong) {
  747. *pp = iter.blk;
  748. break;
  749. }
  750. }
  751. if (!*pp) {
  752. SDE_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
  753. return false;
  754. }
  755. if (RESERVED_BY_OTHER(*pp, rsvp)) {
  756. SDE_DEBUG("lm %d pp %d already reserved\n", lm->id,
  757. (*pp)->id);
  758. *dspp = NULL;
  759. *ds = NULL;
  760. return false;
  761. }
  762. pp_cfg = to_sde_hw_pingpong((*pp)->hw)->caps;
  763. if ((reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) &&
  764. !(test_bit(SDE_PINGPONG_SPLIT, &pp_cfg->features))) {
  765. SDE_DEBUG("pp %d doesn't support ppsplit\n", pp_cfg->id);
  766. *dspp = NULL;
  767. *ds = NULL;
  768. return false;
  769. }
  770. return true;
  771. }
  772. /**
  773. * _sde_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
  774. * proposed use case requirements, incl. hardwired dependent blocks like
  775. * pingpong, and dspp.
  776. * @rm: sde resource manager handle
  777. * @rsvp: reservation currently being created
  778. * @reqs: proposed use case requirements
  779. * @lm: proposed layer mixer, function checks if lm, and all other hardwired
  780. * blocks connected to the lm (pp, dspp) are available and appropriate
  781. * @dspp: output parameter, dspp block attached to the layer mixer.
  782. * NULL if dspp was not available, or not matching requirements.
  783. * @pp: output parameter, pingpong block attached to the layer mixer.
  784. * NULL if dspp was not available, or not matching requirements.
  785. * @primary_lm: if non-null, this function check if lm is compatible primary_lm
  786. * as well as satisfying all other requirements
  787. * @Return: true if lm matches all requirements, false otherwise
  788. */
  789. static bool _sde_rm_check_lm_and_get_connected_blks(
  790. struct sde_rm *rm,
  791. struct sde_rm_rsvp *rsvp,
  792. struct sde_rm_requirements *reqs,
  793. struct sde_rm_hw_blk *lm,
  794. struct sde_rm_hw_blk **dspp,
  795. struct sde_rm_hw_blk **ds,
  796. struct sde_rm_hw_blk **pp,
  797. struct sde_rm_hw_blk *primary_lm)
  798. {
  799. const struct sde_lm_cfg *lm_cfg = to_sde_hw_mixer(lm->hw)->cap;
  800. const struct sde_pingpong_cfg *pp_cfg;
  801. bool ret;
  802. u32 display_pref, cwb_pref;
  803. *dspp = NULL;
  804. *ds = NULL;
  805. *pp = NULL;
  806. display_pref = lm_cfg->features & BIT(SDE_DISP_PRIMARY_PREF) ||
  807. lm_cfg->features & BIT(SDE_DISP_SECONDARY_PREF);
  808. cwb_pref = lm_cfg->features & BIT(SDE_DISP_CWB_PREF);
  809. SDE_DEBUG("check lm %d: dspp %d ds %d pp %d disp_pref: %d cwb_pref%d\n",
  810. lm_cfg->id, lm_cfg->dspp, lm_cfg->ds,
  811. lm_cfg->pingpong, display_pref, cwb_pref);
  812. /* Check if this layer mixer is a peer of the proposed primary LM */
  813. if (primary_lm) {
  814. const struct sde_lm_cfg *prim_lm_cfg =
  815. to_sde_hw_mixer(primary_lm->hw)->cap;
  816. if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
  817. SDE_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
  818. prim_lm_cfg->id);
  819. return false;
  820. }
  821. }
  822. /* bypass rest of the checks if LM for primary display is found */
  823. if (!display_pref) {
  824. /* Check lm for valid requirements */
  825. ret = _sde_rm_check_lm(rm, rsvp, reqs, lm_cfg, lm,
  826. dspp, ds, pp);
  827. if (!ret)
  828. return ret;
  829. /**
  830. * If CWB is enabled and LM is not CWB supported
  831. * then return false.
  832. */
  833. if (RM_RQ_CWB(reqs) && !cwb_pref) {
  834. SDE_DEBUG("fail: cwb supported lm not allocated\n");
  835. return false;
  836. }
  837. } else if (!(reqs->hw_res.display_type && display_pref)) {
  838. SDE_DEBUG(
  839. "display preference is not met. display_type: %d display_pref: %d\n",
  840. (int)reqs->hw_res.display_type, (int)display_pref);
  841. return false;
  842. }
  843. /* Already reserved? */
  844. if (RESERVED_BY_OTHER(lm, rsvp)) {
  845. SDE_DEBUG("lm %d already reserved\n", lm_cfg->id);
  846. return false;
  847. }
  848. /* Reserve dspp */
  849. ret = _sde_rm_reserve_dspp(rm, rsvp, lm_cfg, lm, dspp);
  850. if (!ret)
  851. return ret;
  852. /* Reserve ds */
  853. ret = _sde_rm_reserve_ds(rm, rsvp, lm_cfg, lm, ds);
  854. if (!ret)
  855. return ret;
  856. /* Reserve pp */
  857. ret = _sde_rm_reserve_pp(rm, rsvp, reqs, lm_cfg, pp_cfg, lm,
  858. dspp, ds, pp);
  859. if (!ret)
  860. return ret;
  861. return true;
  862. }
  863. static int _sde_rm_reserve_lms(
  864. struct sde_rm *rm,
  865. struct sde_rm_rsvp *rsvp,
  866. struct sde_rm_requirements *reqs,
  867. u8 *_lm_ids)
  868. {
  869. struct sde_rm_hw_blk *lm[MAX_BLOCKS];
  870. struct sde_rm_hw_blk *dspp[MAX_BLOCKS];
  871. struct sde_rm_hw_blk *ds[MAX_BLOCKS];
  872. struct sde_rm_hw_blk *pp[MAX_BLOCKS];
  873. struct sde_rm_hw_iter iter_i, iter_j;
  874. int lm_count = 0;
  875. int i, rc = 0;
  876. if (!reqs->topology->num_lm) {
  877. SDE_DEBUG("invalid number of lm: %d\n", reqs->topology->num_lm);
  878. return 0;
  879. }
  880. /* Find a primary mixer */
  881. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_LM);
  882. while (lm_count != reqs->topology->num_lm &&
  883. _sde_rm_get_hw_locked(rm, &iter_i)) {
  884. memset(&lm, 0, sizeof(lm));
  885. memset(&dspp, 0, sizeof(dspp));
  886. memset(&ds, 0, sizeof(ds));
  887. memset(&pp, 0, sizeof(pp));
  888. lm_count = 0;
  889. lm[lm_count] = iter_i.blk;
  890. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  891. iter_i.blk->id,
  892. lm_count,
  893. _lm_ids ? _lm_ids[lm_count] : -1);
  894. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  895. continue;
  896. if (!_sde_rm_check_lm_and_get_connected_blks(
  897. rm, rsvp, reqs, lm[lm_count],
  898. &dspp[lm_count], &ds[lm_count],
  899. &pp[lm_count], NULL))
  900. continue;
  901. ++lm_count;
  902. /* Valid primary mixer found, find matching peers */
  903. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_LM);
  904. while (lm_count != reqs->topology->num_lm &&
  905. _sde_rm_get_hw_locked(rm, &iter_j)) {
  906. if (iter_i.blk == iter_j.blk)
  907. continue;
  908. if (!_sde_rm_check_lm_and_get_connected_blks(
  909. rm, rsvp, reqs, iter_j.blk,
  910. &dspp[lm_count], &ds[lm_count],
  911. &pp[lm_count], iter_i.blk))
  912. continue;
  913. lm[lm_count] = iter_j.blk;
  914. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  915. iter_i.blk->id,
  916. lm_count,
  917. _lm_ids ? _lm_ids[lm_count] : -1);
  918. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  919. continue;
  920. ++lm_count;
  921. }
  922. }
  923. if (lm_count != reqs->topology->num_lm) {
  924. SDE_DEBUG("unable to find appropriate mixers\n");
  925. return -ENAVAIL;
  926. }
  927. for (i = 0; i < ARRAY_SIZE(lm); i++) {
  928. if (!lm[i])
  929. break;
  930. lm[i]->rsvp_nxt = rsvp;
  931. pp[i]->rsvp_nxt = rsvp;
  932. if (dspp[i])
  933. dspp[i]->rsvp_nxt = rsvp;
  934. if (ds[i])
  935. ds[i]->rsvp_nxt = rsvp;
  936. SDE_EVT32(lm[i]->type, rsvp->enc_id, lm[i]->id, pp[i]->id,
  937. dspp[i] ? dspp[i]->id : 0,
  938. ds[i] ? ds[i]->id : 0);
  939. }
  940. if (reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) {
  941. /* reserve a free PINGPONG_SLAVE block */
  942. rc = -ENAVAIL;
  943. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_PINGPONG);
  944. while (_sde_rm_get_hw_locked(rm, &iter_i)) {
  945. const struct sde_hw_pingpong *pp =
  946. to_sde_hw_pingpong(iter_i.blk->hw);
  947. const struct sde_pingpong_cfg *pp_cfg = pp->caps;
  948. if (!(test_bit(SDE_PINGPONG_SLAVE, &pp_cfg->features)))
  949. continue;
  950. if (RESERVED_BY_OTHER(iter_i.blk, rsvp))
  951. continue;
  952. iter_i.blk->rsvp_nxt = rsvp;
  953. rc = 0;
  954. break;
  955. }
  956. }
  957. return rc;
  958. }
  959. static int _sde_rm_reserve_ctls(
  960. struct sde_rm *rm,
  961. struct sde_rm_rsvp *rsvp,
  962. struct sde_rm_requirements *reqs,
  963. const struct sde_rm_topology_def *top,
  964. u8 *_ctl_ids)
  965. {
  966. struct sde_rm_hw_blk *ctls[MAX_BLOCKS];
  967. struct sde_rm_hw_iter iter;
  968. int i = 0;
  969. if (!top->num_ctl) {
  970. SDE_DEBUG("invalid number of ctl: %d\n", top->num_ctl);
  971. return 0;
  972. }
  973. memset(&ctls, 0, sizeof(ctls));
  974. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CTL);
  975. while (_sde_rm_get_hw_locked(rm, &iter)) {
  976. const struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter.blk->hw);
  977. unsigned long features = ctl->caps->features;
  978. bool has_split_display, has_ppsplit, primary_pref;
  979. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  980. continue;
  981. has_split_display = BIT(SDE_CTL_SPLIT_DISPLAY) & features;
  982. has_ppsplit = BIT(SDE_CTL_PINGPONG_SPLIT) & features;
  983. primary_pref = BIT(SDE_CTL_PRIMARY_PREF) & features;
  984. SDE_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
  985. /*
  986. * bypass rest feature checks on finding CTL preferred
  987. * for primary displays.
  988. */
  989. if (!primary_pref && !_ctl_ids) {
  990. if (top->needs_split_display != has_split_display)
  991. continue;
  992. if (top->top_name == SDE_RM_TOPOLOGY_PPSPLIT &&
  993. !has_ppsplit)
  994. continue;
  995. } else if (!(reqs->hw_res.display_type ==
  996. SDE_CONNECTOR_PRIMARY && primary_pref) && !_ctl_ids) {
  997. SDE_DEBUG(
  998. "display pref not met. display_type: %d primary_pref: %d\n",
  999. reqs->hw_res.display_type, primary_pref);
  1000. continue;
  1001. }
  1002. ctls[i] = iter.blk;
  1003. SDE_DEBUG("blk id = %d, _ctl_ids[%d] = %d\n",
  1004. iter.blk->id, i,
  1005. _ctl_ids ? _ctl_ids[i] : -1);
  1006. if (_ctl_ids && (ctls[i]->id != _ctl_ids[i]))
  1007. continue;
  1008. SDE_DEBUG("ctl %d match\n", iter.blk->id);
  1009. if (++i == top->num_ctl)
  1010. break;
  1011. }
  1012. if (i != top->num_ctl)
  1013. return -ENAVAIL;
  1014. for (i = 0; i < ARRAY_SIZE(ctls) && i < top->num_ctl; i++) {
  1015. ctls[i]->rsvp_nxt = rsvp;
  1016. SDE_EVT32(ctls[i]->type, rsvp->enc_id, ctls[i]->id);
  1017. }
  1018. return 0;
  1019. }
  1020. static bool _sde_rm_check_dsc(struct sde_rm *rm,
  1021. struct sde_rm_rsvp *rsvp,
  1022. struct sde_rm_hw_blk *dsc,
  1023. struct sde_rm_hw_blk *paired_dsc)
  1024. {
  1025. const struct sde_dsc_cfg *dsc_cfg = to_sde_hw_dsc(dsc->hw)->caps;
  1026. /* Already reserved? */
  1027. if (RESERVED_BY_OTHER(dsc, rsvp)) {
  1028. SDE_DEBUG("dsc %d already reserved\n", dsc_cfg->id);
  1029. return false;
  1030. }
  1031. /* Check if this dsc is a peer of the proposed paired DSC */
  1032. if (paired_dsc) {
  1033. const struct sde_dsc_cfg *paired_dsc_cfg =
  1034. to_sde_hw_dsc(paired_dsc->hw)->caps;
  1035. if (!test_bit(dsc_cfg->id, paired_dsc_cfg->dsc_pair_mask)) {
  1036. SDE_DEBUG("dsc %d not peer of dsc %d\n", dsc_cfg->id,
  1037. paired_dsc_cfg->id);
  1038. return false;
  1039. }
  1040. }
  1041. return true;
  1042. }
  1043. static int _sde_rm_reserve_dsc(
  1044. struct sde_rm *rm,
  1045. struct sde_rm_rsvp *rsvp,
  1046. const struct sde_rm_topology_def *top,
  1047. u8 *_dsc_ids)
  1048. {
  1049. struct sde_rm_hw_iter iter_i, iter_j;
  1050. struct sde_rm_hw_blk *dsc[MAX_BLOCKS];
  1051. int alloc_count = 0;
  1052. int num_dsc_enc = top->num_comp_enc;
  1053. int i;
  1054. if (!top->num_comp_enc)
  1055. return 0;
  1056. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_DSC);
  1057. /* Find a first DSC */
  1058. while (alloc_count != num_dsc_enc &&
  1059. _sde_rm_get_hw_locked(rm, &iter_i)) {
  1060. memset(&dsc, 0, sizeof(dsc));
  1061. alloc_count = 0;
  1062. if (_dsc_ids && (iter_i.blk->id != _dsc_ids[alloc_count]))
  1063. continue;
  1064. if (!_sde_rm_check_dsc(rm, rsvp, iter_i.blk, NULL))
  1065. continue;
  1066. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1067. iter_i.blk->id,
  1068. alloc_count,
  1069. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1070. dsc[alloc_count++] = iter_i.blk;
  1071. /* Valid first dsc found, find matching peers */
  1072. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_DSC);
  1073. while (alloc_count != num_dsc_enc &&
  1074. _sde_rm_get_hw_locked(rm, &iter_j)) {
  1075. if (iter_i.blk == iter_j.blk)
  1076. continue;
  1077. if (_dsc_ids && (iter_j.blk->id !=
  1078. _dsc_ids[alloc_count]))
  1079. continue;
  1080. if (!_sde_rm_check_dsc(rm, rsvp,
  1081. iter_j.blk, iter_i.blk))
  1082. continue;
  1083. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1084. iter_j.blk->id,
  1085. alloc_count,
  1086. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1087. dsc[alloc_count++] = iter_j.blk;
  1088. }
  1089. }
  1090. if (alloc_count != num_dsc_enc) {
  1091. SDE_ERROR("couldn't reserve %d dsc blocks for enc id %d\n",
  1092. num_dsc_enc, rsvp->enc_id);
  1093. return -EINVAL;
  1094. }
  1095. for (i = 0; i < ARRAY_SIZE(dsc); i++) {
  1096. if (!dsc[i])
  1097. break;
  1098. dsc[i]->rsvp_nxt = rsvp;
  1099. SDE_EVT32(dsc[i]->type, rsvp->enc_id, dsc[i]->id);
  1100. }
  1101. return 0;
  1102. }
  1103. static int _sde_rm_reserve_qdss(
  1104. struct sde_rm *rm,
  1105. struct sde_rm_rsvp *rsvp,
  1106. const struct sde_rm_topology_def *top,
  1107. u8 *_qdss_ids)
  1108. {
  1109. struct sde_rm_hw_iter iter;
  1110. struct msm_drm_private *priv = rm->dev->dev_private;
  1111. struct sde_kms *sde_kms;
  1112. if (!priv->kms) {
  1113. SDE_ERROR("invalid kms\n");
  1114. return -EINVAL;
  1115. }
  1116. sde_kms = to_sde_kms(priv->kms);
  1117. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_QDSS);
  1118. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1119. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1120. continue;
  1121. SDE_DEBUG("blk id = %d\n", iter.blk->id);
  1122. iter.blk->rsvp_nxt = rsvp;
  1123. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1124. return 0;
  1125. }
  1126. if (!iter.hw && sde_kms->catalog->qdss_count) {
  1127. SDE_DEBUG("couldn't reserve qdss for type %d id %d\n",
  1128. SDE_HW_BLK_QDSS, iter.blk->id);
  1129. return -ENAVAIL;
  1130. }
  1131. return 0;
  1132. }
  1133. static int _sde_rm_reserve_cdm(
  1134. struct sde_rm *rm,
  1135. struct sde_rm_rsvp *rsvp,
  1136. uint32_t id,
  1137. enum sde_hw_blk_type type)
  1138. {
  1139. struct sde_rm_hw_iter iter;
  1140. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CDM);
  1141. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1142. const struct sde_hw_cdm *cdm = to_sde_hw_cdm(iter.blk->hw);
  1143. const struct sde_cdm_cfg *caps = cdm->caps;
  1144. bool match = false;
  1145. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1146. continue;
  1147. if (type == SDE_HW_BLK_INTF && id != INTF_MAX)
  1148. match = test_bit(id, &caps->intf_connect);
  1149. else if (type == SDE_HW_BLK_WB && id != WB_MAX)
  1150. match = test_bit(id, &caps->wb_connect);
  1151. SDE_DEBUG("type %d id %d, cdm intfs %lu wbs %lu match %d\n",
  1152. type, id, caps->intf_connect, caps->wb_connect,
  1153. match);
  1154. if (!match)
  1155. continue;
  1156. iter.blk->rsvp_nxt = rsvp;
  1157. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1158. break;
  1159. }
  1160. if (!iter.hw) {
  1161. SDE_ERROR("couldn't reserve cdm for type %d id %d\n", type, id);
  1162. return -ENAVAIL;
  1163. }
  1164. return 0;
  1165. }
  1166. static int _sde_rm_reserve_intf_or_wb(
  1167. struct sde_rm *rm,
  1168. struct sde_rm_rsvp *rsvp,
  1169. uint32_t id,
  1170. enum sde_hw_blk_type type,
  1171. bool needs_cdm)
  1172. {
  1173. struct sde_rm_hw_iter iter;
  1174. int ret = 0;
  1175. /* Find the block entry in the rm, and note the reservation */
  1176. sde_rm_init_hw_iter(&iter, 0, type);
  1177. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1178. if (iter.blk->id != id)
  1179. continue;
  1180. if (RESERVED_BY_OTHER(iter.blk, rsvp)) {
  1181. SDE_ERROR("type %d id %d already reserved\n", type, id);
  1182. return -ENAVAIL;
  1183. }
  1184. iter.blk->rsvp_nxt = rsvp;
  1185. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1186. break;
  1187. }
  1188. /* Shouldn't happen since wbs / intfs are fixed at probe */
  1189. if (!iter.hw) {
  1190. SDE_ERROR("couldn't find type %d id %d\n", type, id);
  1191. return -EINVAL;
  1192. }
  1193. /* Expected only one intf or wb will request cdm */
  1194. if (needs_cdm)
  1195. ret = _sde_rm_reserve_cdm(rm, rsvp, id, type);
  1196. return ret;
  1197. }
  1198. static int _sde_rm_reserve_intf_related_hw(
  1199. struct sde_rm *rm,
  1200. struct sde_rm_rsvp *rsvp,
  1201. struct sde_encoder_hw_resources *hw_res)
  1202. {
  1203. int i, ret = 0;
  1204. u32 id;
  1205. for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
  1206. if (hw_res->intfs[i] == INTF_MODE_NONE)
  1207. continue;
  1208. id = i + INTF_0;
  1209. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1210. SDE_HW_BLK_INTF, hw_res->needs_cdm);
  1211. if (ret)
  1212. return ret;
  1213. }
  1214. for (i = 0; i < ARRAY_SIZE(hw_res->wbs); i++) {
  1215. if (hw_res->wbs[i] == INTF_MODE_NONE)
  1216. continue;
  1217. id = i + WB_0;
  1218. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1219. SDE_HW_BLK_WB, hw_res->needs_cdm);
  1220. if (ret)
  1221. return ret;
  1222. }
  1223. return ret;
  1224. }
  1225. static bool _sde_rm_is_display_in_cont_splash(struct sde_kms *sde_kms,
  1226. struct drm_encoder *enc)
  1227. {
  1228. int i;
  1229. struct sde_splash_display *splash_dpy;
  1230. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  1231. splash_dpy = &sde_kms->splash_data.splash_display[i];
  1232. if (splash_dpy->encoder == enc)
  1233. return splash_dpy->cont_splash_enabled;
  1234. }
  1235. return false;
  1236. }
  1237. static int _sde_rm_make_lm_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1238. struct sde_rm_requirements *reqs,
  1239. struct sde_splash_display *splash_display)
  1240. {
  1241. int ret, i;
  1242. u8 *hw_ids = NULL;
  1243. /* Check if splash data provided lm_ids */
  1244. if (splash_display) {
  1245. hw_ids = splash_display->lm_ids;
  1246. for (i = 0; i < splash_display->lm_cnt; i++)
  1247. SDE_DEBUG("splash_display->lm_ids[%d] = %d\n",
  1248. i, splash_display->lm_ids[i]);
  1249. if (splash_display->lm_cnt != reqs->topology->num_lm)
  1250. SDE_DEBUG("Configured splash LMs != needed LM cnt\n");
  1251. }
  1252. /*
  1253. * Assign LMs and blocks whose usage is tied to them: DSPP & Pingpong.
  1254. * Do assignment preferring to give away low-resource mixers first:
  1255. * - Check mixers without DSPPs
  1256. * - Only then allow to grab from mixers with DSPP capability
  1257. */
  1258. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1259. if (ret && !RM_RQ_DSPP(reqs)) {
  1260. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1261. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1262. }
  1263. return ret;
  1264. }
  1265. static int _sde_rm_make_ctl_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1266. struct sde_rm_requirements *reqs,
  1267. struct sde_splash_display *splash_display)
  1268. {
  1269. int ret, i;
  1270. u8 *hw_ids = NULL;
  1271. struct sde_rm_topology_def topology;
  1272. /* Check if splash data provided ctl_ids */
  1273. if (splash_display) {
  1274. hw_ids = splash_display->ctl_ids;
  1275. for (i = 0; i < splash_display->ctl_cnt; i++)
  1276. SDE_DEBUG("splash_display->ctl_ids[%d] = %d\n",
  1277. i, splash_display->ctl_ids[i]);
  1278. }
  1279. /*
  1280. * Do assignment preferring to give away low-resource CTLs first:
  1281. * - Check mixers without Split Display
  1282. * - Only then allow to grab from CTLs with split display capability
  1283. */
  1284. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, reqs->topology, hw_ids);
  1285. if (ret && !reqs->topology->needs_split_display &&
  1286. reqs->topology->num_ctl > SINGLE_CTL) {
  1287. memcpy(&topology, reqs->topology, sizeof(topology));
  1288. topology.needs_split_display = true;
  1289. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, &topology, hw_ids);
  1290. }
  1291. return ret;
  1292. }
  1293. static int _sde_rm_make_dsc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1294. struct sde_rm_requirements *reqs,
  1295. struct sde_splash_display *splash_display)
  1296. {
  1297. int ret, i;
  1298. u8 *hw_ids = NULL;
  1299. /* Check if splash data provided dsc_ids */
  1300. if (splash_display) {
  1301. hw_ids = splash_display->dsc_ids;
  1302. for (i = 0; i < splash_display->dsc_cnt; i++)
  1303. SDE_DEBUG("splash_data.dsc_ids[%d] = %d\n",
  1304. i, splash_display->dsc_ids[i]);
  1305. }
  1306. ret = _sde_rm_reserve_dsc(rm, rsvp, reqs->topology, hw_ids);
  1307. return ret;
  1308. }
  1309. static int _sde_rm_make_next_rsvp(struct sde_rm *rm, struct drm_encoder *enc,
  1310. struct drm_crtc_state *crtc_state,
  1311. struct drm_connector_state *conn_state,
  1312. struct sde_rm_rsvp *rsvp,
  1313. struct sde_rm_requirements *reqs)
  1314. {
  1315. struct msm_drm_private *priv;
  1316. struct sde_kms *sde_kms;
  1317. struct sde_splash_display *splash_display = NULL;
  1318. struct sde_splash_data *splash_data;
  1319. int i, ret;
  1320. priv = enc->dev->dev_private;
  1321. sde_kms = to_sde_kms(priv->kms);
  1322. splash_data = &sde_kms->splash_data;
  1323. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1324. for (i = 0; i < ARRAY_SIZE(splash_data->splash_display); i++) {
  1325. if (enc == splash_data->splash_display[i].encoder)
  1326. splash_display =
  1327. &splash_data->splash_display[i];
  1328. }
  1329. if (!splash_display) {
  1330. SDE_ERROR("rm is in cont_splash but data not found\n");
  1331. return -EINVAL;
  1332. }
  1333. }
  1334. /* Create reservation info, tag reserved blocks with it as we go */
  1335. rsvp->seq = ++rm->rsvp_next_seq;
  1336. rsvp->enc_id = enc->base.id;
  1337. rsvp->topology = reqs->topology->top_name;
  1338. list_add_tail(&rsvp->list, &rm->rsvps);
  1339. ret = _sde_rm_make_lm_rsvp(rm, rsvp, reqs, splash_display);
  1340. if (ret) {
  1341. SDE_ERROR("unable to find appropriate mixers\n");
  1342. _sde_rm_print_rsvps_by_type(rm, SDE_HW_BLK_LM);
  1343. return ret;
  1344. }
  1345. ret = _sde_rm_make_ctl_rsvp(rm, rsvp, reqs, splash_display);
  1346. if (ret) {
  1347. SDE_ERROR("unable to find appropriate CTL\n");
  1348. return ret;
  1349. }
  1350. /* Assign INTFs, WBs, and blks whose usage is tied to them: CTL & CDM */
  1351. ret = _sde_rm_reserve_intf_related_hw(rm, rsvp, &reqs->hw_res);
  1352. if (ret)
  1353. return ret;
  1354. ret = _sde_rm_make_dsc_rsvp(rm, rsvp, reqs, splash_display);
  1355. if (ret)
  1356. return ret;
  1357. ret = _sde_rm_reserve_qdss(rm, rsvp, reqs->topology, NULL);
  1358. if (ret)
  1359. return ret;
  1360. return ret;
  1361. }
  1362. /**
  1363. * _sde_rm_get_hw_blk_for_cont_splash - retrieve the LM blocks on given CTL
  1364. * and populate the connected HW blk ids in sde_splash_display
  1365. * @rm: Pointer to resource manager structure
  1366. * @ctl: Pointer to CTL hardware block
  1367. * @splash_display: Pointer to struct sde_splash_display
  1368. * return: number of active LM blocks for this CTL block
  1369. */
  1370. static int _sde_rm_get_hw_blk_for_cont_splash(struct sde_rm *rm,
  1371. struct sde_hw_ctl *ctl,
  1372. struct sde_splash_display *splash_display)
  1373. {
  1374. u32 lm_reg;
  1375. struct sde_rm_hw_iter iter_lm, iter_pp;
  1376. struct sde_hw_pingpong *pp;
  1377. if (!rm || !ctl || !splash_display) {
  1378. SDE_ERROR("invalid input parameters\n");
  1379. return 0;
  1380. }
  1381. sde_rm_init_hw_iter(&iter_lm, 0, SDE_HW_BLK_LM);
  1382. sde_rm_init_hw_iter(&iter_pp, 0, SDE_HW_BLK_PINGPONG);
  1383. while (_sde_rm_get_hw_locked(rm, &iter_lm)) {
  1384. _sde_rm_get_hw_locked(rm, &iter_pp);
  1385. if (splash_display->lm_cnt >= MAX_DATA_PATH_PER_DSIPLAY)
  1386. break;
  1387. lm_reg = ctl->ops.read_ctl_layers(ctl, iter_lm.blk->id);
  1388. if (!lm_reg)
  1389. continue;
  1390. splash_display->lm_ids[splash_display->lm_cnt++] =
  1391. iter_lm.blk->id;
  1392. SDE_DEBUG("lm_cnt=%d lm_reg[%d]=0x%x\n", splash_display->lm_cnt,
  1393. iter_lm.blk->id - LM_0, lm_reg);
  1394. if (ctl->ops.get_staged_sspp &&
  1395. ctl->ops.get_staged_sspp(ctl, iter_lm.blk->id,
  1396. &splash_display->pipes[
  1397. splash_display->pipe_cnt], 1)) {
  1398. splash_display->pipe_cnt++;
  1399. } else {
  1400. SDE_ERROR("no pipe detected on LM-%d\n",
  1401. iter_lm.blk->id - LM_0);
  1402. return 0;
  1403. }
  1404. pp = to_sde_hw_pingpong(iter_pp.blk->hw);
  1405. if (pp && pp->ops.get_dsc_status &&
  1406. pp->ops.get_dsc_status(pp)) {
  1407. splash_display->dsc_ids[splash_display->dsc_cnt++] =
  1408. iter_pp.blk->id;
  1409. SDE_DEBUG("lm/pp[%d] path, using dsc[%d]\n",
  1410. iter_lm.blk->id - LM_0,
  1411. iter_pp.blk->id - DSC_0);
  1412. }
  1413. }
  1414. return splash_display->lm_cnt;
  1415. }
  1416. int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
  1417. struct sde_rm *rm,
  1418. struct sde_splash_data *splash_data,
  1419. struct sde_mdss_cfg *cat)
  1420. {
  1421. struct sde_rm_hw_iter iter_c;
  1422. int index = 0, ctl_top_cnt;
  1423. struct sde_kms *sde_kms = NULL;
  1424. struct sde_hw_mdp *hw_mdp;
  1425. struct sde_splash_display *splash_display;
  1426. u8 intf_sel;
  1427. if (!priv || !rm || !cat || !splash_data) {
  1428. SDE_ERROR("invalid input parameters\n");
  1429. return -EINVAL;
  1430. }
  1431. SDE_DEBUG("mixer_count=%d, ctl_count=%d, dsc_count=%d\n",
  1432. cat->mixer_count,
  1433. cat->ctl_count,
  1434. cat->dsc_count);
  1435. ctl_top_cnt = cat->ctl_count;
  1436. if (!priv->kms) {
  1437. SDE_ERROR("invalid kms\n");
  1438. return -EINVAL;
  1439. }
  1440. sde_kms = to_sde_kms(priv->kms);
  1441. hw_mdp = sde_rm_get_mdp(rm);
  1442. sde_rm_init_hw_iter(&iter_c, 0, SDE_HW_BLK_CTL);
  1443. while (_sde_rm_get_hw_locked(rm, &iter_c)
  1444. && (index < splash_data->num_splash_displays)) {
  1445. struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter_c.blk->hw);
  1446. if (!ctl->ops.get_ctl_intf) {
  1447. SDE_ERROR("get_ctl_intf not initialized\n");
  1448. return -EINVAL;
  1449. }
  1450. intf_sel = ctl->ops.get_ctl_intf(ctl);
  1451. if (intf_sel) {
  1452. splash_display = &splash_data->splash_display[index];
  1453. SDE_DEBUG("finding resources for display=%d ctl=%d\n",
  1454. index, iter_c.blk->id - CTL_0);
  1455. _sde_rm_get_hw_blk_for_cont_splash(rm,
  1456. ctl, splash_display);
  1457. splash_display->cont_splash_enabled = true;
  1458. splash_display->ctl_ids[splash_display->ctl_cnt++] =
  1459. iter_c.blk->id;
  1460. }
  1461. index++;
  1462. }
  1463. return 0;
  1464. }
  1465. static int _sde_rm_populate_requirements(
  1466. struct sde_rm *rm,
  1467. struct drm_encoder *enc,
  1468. struct drm_crtc_state *crtc_state,
  1469. struct drm_connector_state *conn_state,
  1470. struct sde_rm_requirements *reqs)
  1471. {
  1472. const struct drm_display_mode *mode = &crtc_state->mode;
  1473. int i;
  1474. memset(reqs, 0, sizeof(*reqs));
  1475. reqs->top_ctrl = sde_connector_get_property(conn_state,
  1476. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1477. sde_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);
  1478. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++) {
  1479. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  1480. reqs->hw_res.topology)) {
  1481. reqs->topology = &rm->topology_tbl[i];
  1482. break;
  1483. }
  1484. }
  1485. if (!reqs->topology) {
  1486. SDE_ERROR("invalid topology for the display\n");
  1487. return -EINVAL;
  1488. }
  1489. /*
  1490. * select dspp HW block for all dsi displays and ds for only
  1491. * primary dsi display.
  1492. */
  1493. if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
  1494. if (!RM_RQ_DSPP(reqs))
  1495. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1496. if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
  1497. sde_encoder_is_primary_display(enc))
  1498. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DS);
  1499. }
  1500. /**
  1501. * Set the requirement for LM which has CWB support if CWB is
  1502. * found enabled.
  1503. */
  1504. if (!RM_RQ_CWB(reqs) && sde_encoder_in_clone_mode(enc)) {
  1505. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_CWB);
  1506. /*
  1507. * topology selection based on conn mode is not valid for CWB
  1508. * as WB conn populates modes based on max_mixer_width check
  1509. * but primary can be using dual LMs. This topology override for
  1510. * CWB is to check number of datapath active in primary and
  1511. * allocate same number of LM/PP blocks reserved for CWB
  1512. */
  1513. reqs->topology =
  1514. &rm->topology_tbl[SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE];
  1515. if (sde_crtc_get_num_datapath(crtc_state->crtc) == 1)
  1516. reqs->topology =
  1517. &rm->topology_tbl[SDE_RM_TOPOLOGY_SINGLEPIPE];
  1518. }
  1519. SDE_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
  1520. reqs->hw_res.display_num_of_h_tiles);
  1521. SDE_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
  1522. reqs->topology->num_lm, reqs->topology->num_ctl,
  1523. reqs->topology->top_name,
  1524. reqs->topology->needs_split_display);
  1525. SDE_EVT32(mode->hdisplay, rm->lm_max_width, reqs->topology->num_lm,
  1526. reqs->top_ctrl, reqs->topology->top_name,
  1527. reqs->topology->num_ctl);
  1528. return 0;
  1529. }
  1530. static struct sde_rm_rsvp *_sde_rm_get_rsvp(
  1531. struct sde_rm *rm,
  1532. struct drm_encoder *enc)
  1533. {
  1534. struct sde_rm_rsvp *i;
  1535. if (!rm || !enc) {
  1536. SDE_ERROR("invalid params\n");
  1537. return NULL;
  1538. }
  1539. if (list_empty(&rm->rsvps))
  1540. return NULL;
  1541. list_for_each_entry(i, &rm->rsvps, list)
  1542. if (i->enc_id == enc->base.id)
  1543. return i;
  1544. return NULL;
  1545. }
  1546. static struct sde_rm_rsvp *_sde_rm_get_rsvp_nxt(
  1547. struct sde_rm *rm,
  1548. struct drm_encoder *enc)
  1549. {
  1550. struct sde_rm_rsvp *i;
  1551. if (list_empty(&rm->rsvps))
  1552. return NULL;
  1553. list_for_each_entry(i, &rm->rsvps, list)
  1554. if (i->enc_id == enc->base.id)
  1555. break;
  1556. list_for_each_entry_continue(i, &rm->rsvps, list)
  1557. if (i->enc_id == enc->base.id)
  1558. return i;
  1559. return NULL;
  1560. }
  1561. static struct drm_connector *_sde_rm_get_connector(
  1562. struct drm_encoder *enc)
  1563. {
  1564. struct drm_connector *conn = NULL;
  1565. struct list_head *connector_list =
  1566. &enc->dev->mode_config.connector_list;
  1567. list_for_each_entry(conn, connector_list, head)
  1568. if (conn->encoder == enc)
  1569. return conn;
  1570. return NULL;
  1571. }
  1572. int sde_rm_update_topology(struct drm_connector_state *conn_state,
  1573. struct msm_display_topology *topology)
  1574. {
  1575. int i, ret = 0;
  1576. struct msm_display_topology top;
  1577. enum sde_rm_topology_name top_name = SDE_RM_TOPOLOGY_NONE;
  1578. if (!conn_state)
  1579. return -EINVAL;
  1580. if (topology) {
  1581. top = *topology;
  1582. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  1583. if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], top)) {
  1584. top_name = g_top_table[i].top_name;
  1585. break;
  1586. }
  1587. }
  1588. ret = msm_property_set_property(
  1589. sde_connector_get_propinfo(conn_state->connector),
  1590. sde_connector_get_property_state(conn_state),
  1591. CONNECTOR_PROP_TOPOLOGY_NAME, top_name);
  1592. return ret;
  1593. }
  1594. /**
  1595. * _sde_rm_release_rsvp - release resources and release a reservation
  1596. * @rm: KMS handle
  1597. * @rsvp: RSVP pointer to release and release resources for
  1598. */
  1599. static void _sde_rm_release_rsvp(
  1600. struct sde_rm *rm,
  1601. struct sde_rm_rsvp *rsvp,
  1602. struct drm_connector *conn)
  1603. {
  1604. struct sde_rm_rsvp *rsvp_c, *rsvp_n;
  1605. struct sde_rm_hw_blk *blk;
  1606. enum sde_hw_blk_type type;
  1607. if (!rsvp)
  1608. return;
  1609. SDE_DEBUG("rel rsvp %d enc %d\n", rsvp->seq, rsvp->enc_id);
  1610. list_for_each_entry_safe(rsvp_c, rsvp_n, &rm->rsvps, list) {
  1611. if (rsvp == rsvp_c) {
  1612. list_del(&rsvp_c->list);
  1613. break;
  1614. }
  1615. }
  1616. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1617. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1618. if (blk->rsvp == rsvp) {
  1619. blk->rsvp = NULL;
  1620. SDE_DEBUG("rel rsvp %d enc %d %d %d\n",
  1621. rsvp->seq, rsvp->enc_id,
  1622. blk->type, blk->id);
  1623. _sde_rm_inc_resource_info(rm,
  1624. &rm->avail_res, blk);
  1625. }
  1626. if (blk->rsvp_nxt == rsvp) {
  1627. blk->rsvp_nxt = NULL;
  1628. SDE_DEBUG("rel rsvp_nxt %d enc %d %d %d\n",
  1629. rsvp->seq, rsvp->enc_id,
  1630. blk->type, blk->id);
  1631. }
  1632. }
  1633. }
  1634. kfree(rsvp);
  1635. }
  1636. void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt)
  1637. {
  1638. struct sde_rm_rsvp *rsvp;
  1639. struct drm_connector *conn;
  1640. struct msm_drm_private *priv;
  1641. struct sde_kms *sde_kms;
  1642. uint64_t top_ctrl;
  1643. if (!rm || !enc) {
  1644. SDE_ERROR("invalid params\n");
  1645. return;
  1646. }
  1647. priv = enc->dev->dev_private;
  1648. if (!priv->kms) {
  1649. SDE_ERROR("invalid kms\n");
  1650. return;
  1651. }
  1652. sde_kms = to_sde_kms(priv->kms);
  1653. mutex_lock(&rm->rm_lock);
  1654. if (nxt)
  1655. rsvp = _sde_rm_get_rsvp_nxt(rm, enc);
  1656. else
  1657. rsvp = _sde_rm_get_rsvp(rm, enc);
  1658. if (!rsvp) {
  1659. SDE_DEBUG("failed to find rsvp for enc %d, nxt %d",
  1660. enc->base.id, nxt);
  1661. goto end;
  1662. }
  1663. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1664. _sde_rm_release_rsvp(rm, rsvp, conn);
  1665. goto end;
  1666. }
  1667. conn = _sde_rm_get_connector(enc);
  1668. if (!conn) {
  1669. SDE_ERROR("failed to get connector for enc %d, nxt %d",
  1670. enc->base.id, nxt);
  1671. goto end;
  1672. }
  1673. top_ctrl = sde_connector_get_property(conn->state,
  1674. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1675. if (top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK)) {
  1676. SDE_DEBUG("rsvp[s%de%d] not releasing locked resources\n",
  1677. rsvp->seq, rsvp->enc_id);
  1678. } else {
  1679. SDE_DEBUG("release rsvp[s%de%d]\n", rsvp->seq,
  1680. rsvp->enc_id);
  1681. _sde_rm_release_rsvp(rm, rsvp, conn);
  1682. }
  1683. end:
  1684. mutex_unlock(&rm->rm_lock);
  1685. }
  1686. static int _sde_rm_commit_rsvp(
  1687. struct sde_rm *rm,
  1688. struct sde_rm_rsvp *rsvp,
  1689. struct drm_connector_state *conn_state)
  1690. {
  1691. struct sde_rm_hw_blk *blk;
  1692. enum sde_hw_blk_type type;
  1693. int ret = 0;
  1694. /* Swap next rsvp to be the active */
  1695. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1696. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1697. if (blk->rsvp_nxt) {
  1698. blk->rsvp = blk->rsvp_nxt;
  1699. blk->rsvp_nxt = NULL;
  1700. _sde_rm_dec_resource_info(rm,
  1701. &rm->avail_res, blk);
  1702. }
  1703. }
  1704. }
  1705. if (!ret) {
  1706. SDE_DEBUG("rsrv enc %d topology %d\n", rsvp->enc_id,
  1707. rsvp->topology);
  1708. SDE_EVT32(rsvp->enc_id, rsvp->topology);
  1709. }
  1710. return ret;
  1711. }
  1712. int sde_rm_reserve(
  1713. struct sde_rm *rm,
  1714. struct drm_encoder *enc,
  1715. struct drm_crtc_state *crtc_state,
  1716. struct drm_connector_state *conn_state,
  1717. bool test_only)
  1718. {
  1719. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  1720. struct sde_rm_requirements reqs;
  1721. struct msm_drm_private *priv;
  1722. struct sde_kms *sde_kms;
  1723. int ret;
  1724. if (!rm || !enc || !crtc_state || !conn_state) {
  1725. SDE_ERROR("invalid arguments\n");
  1726. return -EINVAL;
  1727. }
  1728. if (!enc->dev || !enc->dev->dev_private) {
  1729. SDE_ERROR("drm device invalid\n");
  1730. return -EINVAL;
  1731. }
  1732. priv = enc->dev->dev_private;
  1733. if (!priv->kms) {
  1734. SDE_ERROR("invalid kms\n");
  1735. return -EINVAL;
  1736. }
  1737. sde_kms = to_sde_kms(priv->kms);
  1738. /* Check if this is just a page-flip */
  1739. if (!_sde_rm_is_display_in_cont_splash(sde_kms, enc) &&
  1740. !drm_atomic_crtc_needs_modeset(crtc_state))
  1741. return 0;
  1742. SDE_DEBUG("reserving hw for conn %d enc %d crtc %d test_only %d\n",
  1743. conn_state->connector->base.id, enc->base.id,
  1744. crtc_state->crtc->base.id, test_only);
  1745. SDE_EVT32(enc->base.id, conn_state->connector->base.id);
  1746. mutex_lock(&rm->rm_lock);
  1747. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_BEGIN);
  1748. rsvp_cur = _sde_rm_get_rsvp(rm, enc);
  1749. rsvp_nxt = _sde_rm_get_rsvp_nxt(rm, enc);
  1750. if (!test_only && rsvp_nxt)
  1751. goto commit_rsvp;
  1752. ret = _sde_rm_populate_requirements(rm, enc, crtc_state,
  1753. conn_state, &reqs);
  1754. if (ret) {
  1755. SDE_ERROR("failed to populate hw requirements\n");
  1756. goto end;
  1757. }
  1758. /*
  1759. * We only support one active reservation per-hw-block. But to implement
  1760. * transactional semantics for test-only, and for allowing failure while
  1761. * modifying your existing reservation, over the course of this
  1762. * function we can have two reservations:
  1763. * Current: Existing reservation
  1764. * Next: Proposed reservation. The proposed reservation may fail, or may
  1765. * be discarded if in test-only mode.
  1766. * If reservation is successful, and we're not in test-only, then we
  1767. * replace the current with the next.
  1768. */
  1769. rsvp_nxt = kzalloc(sizeof(*rsvp_nxt), GFP_KERNEL);
  1770. if (!rsvp_nxt) {
  1771. ret = -ENOMEM;
  1772. goto end;
  1773. }
  1774. /*
  1775. * User can request that we clear out any reservation during the
  1776. * atomic_check phase by using this CLEAR bit
  1777. */
  1778. if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) {
  1779. SDE_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n",
  1780. rsvp_cur->seq, rsvp_cur->enc_id);
  1781. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1782. rsvp_cur = NULL;
  1783. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_CLEAR);
  1784. }
  1785. /* Check the proposed reservation, store it in hw's "next" field */
  1786. ret = _sde_rm_make_next_rsvp(rm, enc, crtc_state, conn_state,
  1787. rsvp_nxt, &reqs);
  1788. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_RSVPNEXT);
  1789. if (ret) {
  1790. SDE_ERROR("failed to reserve hw resources: %d, test_only %d\n",
  1791. ret, test_only);
  1792. _sde_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector);
  1793. goto end;
  1794. } else if (test_only && !RM_RQ_LOCK(&reqs)) {
  1795. /*
  1796. * Normally, if test_only, test the reservation and then undo
  1797. * However, if the user requests LOCK, then keep the reservation
  1798. * made during the atomic_check phase.
  1799. */
  1800. SDE_DEBUG("test_only: rsvp[s%de%d]\n",
  1801. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1802. goto end;
  1803. } else {
  1804. if (test_only && RM_RQ_LOCK(&reqs))
  1805. SDE_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n",
  1806. rsvp_nxt->seq, rsvp_nxt->enc_id);
  1807. }
  1808. commit_rsvp:
  1809. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1810. ret = _sde_rm_commit_rsvp(rm, rsvp_nxt, conn_state);
  1811. end:
  1812. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_FINAL);
  1813. mutex_unlock(&rm->rm_lock);
  1814. return ret;
  1815. }
  1816. int sde_rm_ext_blk_create_reserve(struct sde_rm *rm,
  1817. struct sde_hw_blk *hw, struct drm_encoder *enc)
  1818. {
  1819. struct sde_rm_hw_blk *blk;
  1820. struct sde_rm_rsvp *rsvp;
  1821. int ret = 0;
  1822. if (!rm || !hw || !enc) {
  1823. SDE_ERROR("invalid parameters\n");
  1824. return -EINVAL;
  1825. }
  1826. if (hw->type >= SDE_HW_BLK_MAX) {
  1827. SDE_ERROR("invalid HW type\n");
  1828. return -EINVAL;
  1829. }
  1830. mutex_lock(&rm->rm_lock);
  1831. rsvp = _sde_rm_get_rsvp(rm, enc);
  1832. if (!rsvp) {
  1833. rsvp = kzalloc(sizeof(*rsvp), GFP_KERNEL);
  1834. if (!rsvp) {
  1835. ret = -ENOMEM;
  1836. goto end;
  1837. }
  1838. rsvp->seq = ++rm->rsvp_next_seq;
  1839. rsvp->enc_id = enc->base.id;
  1840. list_add_tail(&rsvp->list, &rm->rsvps);
  1841. SDE_DEBUG("create rsvp %d for enc %d\n",
  1842. rsvp->seq, rsvp->enc_id);
  1843. }
  1844. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  1845. if (!blk) {
  1846. ret = -ENOMEM;
  1847. goto end;
  1848. }
  1849. blk->type = hw->type;
  1850. blk->id = hw->id;
  1851. blk->hw = hw;
  1852. blk->rsvp = rsvp;
  1853. list_add_tail(&blk->list, &rm->hw_blks[hw->type]);
  1854. SDE_DEBUG("create blk %d %d for rsvp %d enc %d\n", blk->type, blk->id,
  1855. rsvp->seq, rsvp->enc_id);
  1856. end:
  1857. mutex_unlock(&rm->rm_lock);
  1858. return ret;
  1859. }
  1860. int sde_rm_ext_blk_destroy(struct sde_rm *rm,
  1861. struct drm_encoder *enc)
  1862. {
  1863. struct sde_rm_hw_blk *blk = NULL, *p;
  1864. struct sde_rm_rsvp *rsvp;
  1865. enum sde_hw_blk_type type;
  1866. int ret = 0;
  1867. if (!rm || !enc) {
  1868. SDE_ERROR("invalid parameters\n");
  1869. return -EINVAL;
  1870. }
  1871. mutex_lock(&rm->rm_lock);
  1872. rsvp = _sde_rm_get_rsvp(rm, enc);
  1873. if (!rsvp) {
  1874. ret = -ENOENT;
  1875. SDE_ERROR("failed to find rsvp for enc %d\n", enc->base.id);
  1876. goto end;
  1877. }
  1878. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1879. list_for_each_entry_safe(blk, p, &rm->hw_blks[type], list) {
  1880. if (blk->rsvp == rsvp) {
  1881. list_del(&blk->list);
  1882. SDE_DEBUG("del blk %d %d from rsvp %d enc %d\n",
  1883. blk->type, blk->id,
  1884. rsvp->seq, rsvp->enc_id);
  1885. kfree(blk);
  1886. }
  1887. }
  1888. }
  1889. SDE_DEBUG("del rsvp %d\n", rsvp->seq);
  1890. list_del(&rsvp->list);
  1891. kfree(rsvp);
  1892. end:
  1893. mutex_unlock(&rm->rm_lock);
  1894. return ret;
  1895. }