cfg_dp.h 43 KB

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  1. /*
  2. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * DOC: This file contains definitions of Data Path configuration.
  20. */
  21. #ifndef _CFG_DP_H_
  22. #define _CFG_DP_H_
  23. #include "cfg_define.h"
  24. #include "wlan_init_cfg.h"
  25. #define WLAN_CFG_MAX_CLIENTS 64
  26. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  27. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  28. /* Change this to a lower value to enforce scattered idle list mode */
  29. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  30. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  31. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  32. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  33. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  34. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  35. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  36. #else
  37. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  38. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  39. #endif
  40. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  41. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  42. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  43. #define WLAN_CFG_PER_PDEV_RX_RING 0
  44. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  45. #define WLAN_LRO_ENABLE 0
  46. #ifdef QCA_WIFI_QCA6750
  47. #define WLAN_CFG_MAC_PER_TARGET 1
  48. #else
  49. #define WLAN_CFG_MAC_PER_TARGET 2
  50. #endif
  51. #ifdef IPA_OFFLOAD
  52. /* Size of TCL TX Ring */
  53. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  54. #define WLAN_CFG_TX_RING_SIZE 2048
  55. #else
  56. #define WLAN_CFG_TX_RING_SIZE 1024
  57. #endif
  58. #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 1024
  59. #define WLAN_CFG_IPA_TX_RING_SIZE 1024
  60. #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 8096
  61. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 1024
  62. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024
  63. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 8096
  64. #ifdef IPA_WDI3_TX_TWO_PIPES
  65. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 1024
  66. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024
  67. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 8096
  68. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 1024
  69. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024
  70. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 8096
  71. #endif
  72. #define WLAN_CFG_PER_PDEV_TX_RING 0
  73. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  74. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  75. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  76. #else
  77. #define WLAN_CFG_TX_RING_SIZE 512
  78. #define WLAN_CFG_PER_PDEV_TX_RING 1
  79. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  80. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  81. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  82. #endif
  83. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  84. #define WLAN_CFG_TX_COMP_RING_SIZE 4096
  85. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  86. #define WLAN_CFG_NUM_TX_DESC 4096
  87. #define WLAN_CFG_NUM_TX_EXT_DESC 4096
  88. #else
  89. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  90. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  91. #define WLAN_CFG_NUM_TX_DESC 1024
  92. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  93. #endif
  94. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  95. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  96. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  97. /* Interrupt Mitigation - Timer threshold in us */
  98. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  99. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  100. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  101. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \
  102. WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING
  103. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \
  104. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING
  105. #else
  106. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  107. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  108. #endif
  109. #endif
  110. #ifdef NBUF_MEMORY_DEBUG
  111. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
  112. #else
  113. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF
  114. #endif
  115. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \
  116. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  117. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0
  118. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000
  119. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \
  120. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  121. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100
  122. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000
  123. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  124. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512
  125. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0
  126. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  127. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  128. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  129. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  130. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  131. #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000
  132. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  133. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  134. #define WLAN_CFG_NUM_TX_DESC_MIN 16
  135. #define WLAN_CFG_NUM_TX_DESC_MAX 32768
  136. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16
  137. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  138. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  139. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  140. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
  141. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  142. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  143. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  144. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  145. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  146. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  147. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  148. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  149. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
  150. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  151. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  152. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  153. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  154. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  155. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512
  156. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  157. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  158. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  159. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  160. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  161. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  162. /* Per vdev pools */
  163. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  164. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  165. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  166. #ifdef TX_PER_PDEV_DESC_POOL
  167. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  168. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  169. #else /* TX_PER_PDEV_DESC_POOL */
  170. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  171. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  172. #endif /* TX_PER_PDEV_DESC_POOL */
  173. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  174. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  175. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  176. #define WLAN_CFG_HTT_PKT_TYPE 2
  177. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  178. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  179. #define WLAN_CFG_MAX_PEER_ID 64
  180. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  181. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  182. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  183. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  184. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  185. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  186. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
  187. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS
  188. #if defined(CONFIG_BERYLLIUM)
  189. #define WLAN_CFG_NUM_REO_DEST_RING 8
  190. #else
  191. #define WLAN_CFG_NUM_REO_DEST_RING 4
  192. #endif
  193. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  194. #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS
  195. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2
  196. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1
  197. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3
  198. #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2
  199. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1
  200. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3
  201. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024
  202. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  203. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024
  204. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 32
  205. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32
  206. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 32
  207. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  208. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  209. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  210. #if defined(QCA_WIFI_QCA6290)
  211. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  212. #else
  213. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  214. #endif
  215. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8
  216. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192
  217. #define WLAN_CFG_REO_REINJECT_RING_SIZE 128
  218. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  219. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128
  220. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  221. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  222. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  223. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_WCN7850)
  224. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  225. #else
  226. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
  227. #endif
  228. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256
  229. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  230. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512
  231. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  232. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  233. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  234. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  235. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  236. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  237. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  238. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  239. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 1024
  240. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  241. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  242. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 4096
  243. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  244. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  245. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  246. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  247. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  248. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  249. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  250. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  251. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  252. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  253. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  254. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  255. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024
  256. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128
  257. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024
  258. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  259. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  260. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  261. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  262. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  263. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  264. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  265. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  266. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  267. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  268. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  269. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  270. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  271. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  272. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  273. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32
  274. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0
  275. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256
  276. /**
  277. * Allocate as many RX descriptors as buffers in the SW2RXDMA
  278. * ring. This value may need to be tuned later.
  279. */
  280. #if defined(QCA_HOST2FW_RXBUF_RING)
  281. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  282. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  283. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
  284. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  285. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  286. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 4096
  287. /**
  288. * For low memory AP cases using 1 will reduce the rx descriptors memory req
  289. */
  290. #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
  291. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  292. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  293. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  294. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  295. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  296. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  297. /**
  298. * AP use cases need to allocate more RX Descriptors than the number of
  299. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  300. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  301. * multiplication factor of 3, to allocate three times as many RX descriptors
  302. * as RX buffers.
  303. */
  304. #else
  305. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
  306. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  307. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  308. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288
  309. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096
  310. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  311. #endif //QCA_HOST2FW_RXBUF_RING
  312. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384
  313. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1
  314. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384
  315. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128
  316. #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10
  317. #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1
  318. #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10
  319. #ifdef QCA_WIFI_WCN7850
  320. #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7
  321. #else
  322. #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF
  323. #endif
  324. #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1
  325. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF
  326. #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1
  327. #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2
  328. #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3
  329. #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1
  330. #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4
  331. #define WLAN_CFG_REO2PPE_RING_SIZE 1024
  332. #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64
  333. #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 1024
  334. #define WLAN_CFG_PPE2TCL_RING_SIZE 1024
  335. #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64
  336. #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 1024
  337. #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024
  338. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64
  339. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024
  340. /* DP INI Declerations */
  341. #define CFG_DP_HTT_PACKET_TYPE \
  342. CFG_INI_UINT("dp_htt_packet_type", \
  343. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  344. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  345. WLAN_CFG_HTT_PKT_TYPE, \
  346. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  347. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  348. CFG_INI_UINT("dp_int_batch_threshold_other", \
  349. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  350. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  351. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  352. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  353. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  354. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  355. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  356. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  357. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  358. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  359. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  360. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  361. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  362. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  363. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  364. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  365. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  366. CFG_INI_UINT("dp_int_timer_threshold_other", \
  367. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  368. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  369. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  370. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  371. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  372. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  373. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  374. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  375. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  376. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  377. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  378. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  379. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  380. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  381. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  382. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  383. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  384. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  385. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  386. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  387. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  388. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  389. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  390. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  391. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  392. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  393. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  394. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  395. #define CFG_DP_MAX_ALLOC_SIZE \
  396. CFG_INI_UINT("dp_max_alloc_size", \
  397. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  398. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  399. WLAN_CFG_MAX_ALLOC_SIZE, \
  400. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  401. #define CFG_DP_MAX_CLIENTS \
  402. CFG_INI_UINT("dp_max_clients", \
  403. WLAN_CFG_MAX_CLIENTS_MIN, \
  404. WLAN_CFG_MAX_CLIENTS_MAX, \
  405. WLAN_CFG_MAX_CLIENTS, \
  406. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  407. #define CFG_DP_MAX_PEER_ID \
  408. CFG_INI_UINT("dp_max_peer_id", \
  409. WLAN_CFG_MAX_PEER_ID_MIN, \
  410. WLAN_CFG_MAX_PEER_ID_MAX, \
  411. WLAN_CFG_MAX_PEER_ID, \
  412. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  413. #define CFG_DP_REO_DEST_RINGS \
  414. CFG_INI_UINT("dp_reo_dest_rings", \
  415. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  416. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  417. WLAN_CFG_NUM_REO_DEST_RING, \
  418. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  419. #define CFG_DP_TCL_DATA_RINGS \
  420. CFG_INI_UINT("dp_tcl_data_rings", \
  421. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  422. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  423. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  424. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  425. #define CFG_DP_NSS_REO_DEST_RINGS \
  426. CFG_INI_UINT("dp_nss_reo_dest_rings", \
  427. WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \
  428. WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \
  429. WLAN_CFG_NSS_NUM_REO_DEST_RING, \
  430. CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
  431. #define CFG_DP_NSS_TCL_DATA_RINGS \
  432. CFG_INI_UINT("dp_nss_tcl_data_rings", \
  433. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \
  434. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \
  435. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \
  436. CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
  437. #define CFG_DP_TX_DESC \
  438. CFG_INI_UINT("dp_tx_desc", \
  439. WLAN_CFG_NUM_TX_DESC_MIN, \
  440. WLAN_CFG_NUM_TX_DESC_MAX, \
  441. WLAN_CFG_NUM_TX_DESC, \
  442. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  443. #define CFG_DP_TX_EXT_DESC \
  444. CFG_INI_UINT("dp_tx_ext_desc", \
  445. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  446. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  447. WLAN_CFG_NUM_TX_EXT_DESC, \
  448. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  449. #define CFG_DP_TX_EXT_DESC_POOLS \
  450. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  451. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  452. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  453. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  454. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  455. #define CFG_DP_PDEV_RX_RING \
  456. CFG_INI_UINT("dp_pdev_rx_ring", \
  457. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  458. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  459. WLAN_CFG_PER_PDEV_RX_RING, \
  460. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  461. #define CFG_DP_PDEV_TX_RING \
  462. CFG_INI_UINT("dp_pdev_tx_ring", \
  463. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  464. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  465. WLAN_CFG_PER_PDEV_TX_RING, \
  466. CFG_VALUE_OR_DEFAULT, \
  467. "DP PDEV Tx Ring")
  468. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  469. CFG_INI_UINT("dp_rx_defrag_timeout", \
  470. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  471. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  472. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  473. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  474. #define CFG_DP_TX_COMPL_RING_SIZE \
  475. CFG_INI_UINT("dp_tx_compl_ring_size", \
  476. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  477. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  478. WLAN_CFG_TX_COMP_RING_SIZE, \
  479. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  480. #define CFG_DP_TX_RING_SIZE \
  481. CFG_INI_UINT("dp_tx_ring_size", \
  482. WLAN_CFG_TX_RING_SIZE_MIN,\
  483. WLAN_CFG_TX_RING_SIZE_MAX,\
  484. WLAN_CFG_TX_RING_SIZE,\
  485. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  486. #define CFG_DP_NSS_COMP_RING_SIZE \
  487. CFG_INI_UINT("dp_nss_comp_ring_size", \
  488. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  489. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  490. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  491. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  492. #define CFG_DP_PDEV_LMAC_RING \
  493. CFG_INI_UINT("dp_pdev_lmac_ring", \
  494. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  495. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  496. WLAN_CFG_PER_PDEV_LMAC_RING, \
  497. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  498. /*
  499. * <ini>
  500. * dp_rx_pending_hl_threshold - High threshold of frame number to start
  501. * frame dropping scheme
  502. * @Min: 0
  503. * @Max: 524288
  504. * @Default: 393216
  505. *
  506. * This ini entry is used to set a high limit threshold to start frame
  507. * dropping scheme
  508. *
  509. * Usage: External
  510. *
  511. * </ini>
  512. */
  513. #define CFG_DP_RX_PENDING_HL_THRESHOLD \
  514. CFG_INI_UINT("dp_rx_pending_hl_threshold", \
  515. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \
  516. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \
  517. WLAN_CFG_RX_PENDING_HL_THRESHOLD, \
  518. CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
  519. /*
  520. * <ini>
  521. * dp_rx_pending_lo_threshold - Low threshold of frame number to stop
  522. * frame dropping scheme
  523. * @Min: 100
  524. * @Max: 524288
  525. * @Default: 393216
  526. *
  527. * This ini entry is used to set a low limit threshold to stop frame
  528. * dropping scheme
  529. *
  530. * Usage: External
  531. *
  532. * </ini>
  533. */
  534. #define CFG_DP_RX_PENDING_LO_THRESHOLD \
  535. CFG_INI_UINT("dp_rx_pending_lo_threshold", \
  536. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \
  537. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \
  538. WLAN_CFG_RX_PENDING_LO_THRESHOLD, \
  539. CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
  540. #define CFG_DP_BASE_HW_MAC_ID \
  541. CFG_INI_UINT("dp_base_hw_macid", \
  542. 0, 1, 1, \
  543. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  544. #define CFG_DP_RX_HASH \
  545. CFG_INI_BOOL("dp_rx_hash", true, \
  546. "DP Rx Hash")
  547. #define CFG_DP_TSO \
  548. CFG_INI_BOOL("TSOEnable", false, \
  549. "DP TSO Enabled")
  550. #define CFG_DP_LRO \
  551. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  552. "DP LRO Enable")
  553. /*
  554. * <ini>
  555. * CFG_DP_SG - Enable the SG feature standalonely
  556. * @Min: 0
  557. * @Max: 1
  558. * @Default: 1
  559. *
  560. * This ini entry is used to enable/disable SG feature standalonely.
  561. * Also does Rome support SG on TX, lithium does not.
  562. * For example the lithium does not support SG on UDP frames.
  563. * Which is able to handle SG only for TSO frames(in case TSO is enabled).
  564. *
  565. * Usage: External
  566. *
  567. * </ini>
  568. */
  569. #define CFG_DP_SG \
  570. CFG_INI_BOOL("dp_sg_support", false, \
  571. "DP SG Enable")
  572. #define CFG_DP_GRO \
  573. CFG_INI_BOOL("GROEnable", false, \
  574. "DP GRO Enable")
  575. #define CFG_DP_OL_TX_CSUM \
  576. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  577. "DP tx csum Enable")
  578. #define CFG_DP_OL_RX_CSUM \
  579. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  580. "DP rx csum Enable")
  581. #define CFG_DP_RAWMODE \
  582. CFG_INI_BOOL("dp_rawmode_support", false, \
  583. "DP rawmode Enable")
  584. #define CFG_DP_PEER_FLOW_CTRL \
  585. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  586. "DP peer flow ctrl Enable")
  587. #define CFG_DP_NAPI \
  588. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  589. "DP Napi Enabled")
  590. /*
  591. * <ini>
  592. * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode
  593. * @Min: 0
  594. * @Max: 1
  595. * @Default: 1
  596. *
  597. * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes.
  598. * This includes P2P device mode, P2P client mode and P2P GO mode.
  599. * The feature is enabled by default. To disable TX checksum for P2P, add the
  600. * following entry in ini file:
  601. * gEnableP2pIpTcpUdpChecksumOffload=0
  602. *
  603. * Usage: External
  604. *
  605. * </ini>
  606. */
  607. #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \
  608. CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \
  609. "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)")
  610. /*
  611. * <ini>
  612. * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode
  613. * @Min: 0
  614. * @Max: 1
  615. * @Default: 1
  616. *
  617. * Usage: External
  618. *
  619. * </ini>
  620. */
  621. #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \
  622. CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \
  623. "DP TCP UDP Checksum Offload for NAN mode")
  624. /*
  625. * <ini>
  626. * gEnableIpTcpUdpChecksumOffload - Enable checksum offload
  627. * @Min: 0
  628. * @Max: 1
  629. * @Default: 1
  630. *
  631. * Usage: External
  632. *
  633. * </ini>
  634. */
  635. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  636. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  637. "DP TCP UDP Checksum Offload")
  638. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  639. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  640. "DP Defrag Timeout Check")
  641. #define CFG_DP_WBM_RELEASE_RING \
  642. CFG_INI_UINT("dp_wbm_release_ring", \
  643. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  644. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  645. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  646. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  647. #define CFG_DP_TCL_CMD_CREDIT_RING \
  648. CFG_INI_UINT("dp_tcl_cmd_credit_ring", \
  649. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \
  650. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \
  651. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \
  652. CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
  653. #define CFG_DP_TCL_STATUS_RING \
  654. CFG_INI_UINT("dp_tcl_status_ring",\
  655. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  656. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  657. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  658. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  659. #define CFG_DP_REO_REINJECT_RING \
  660. CFG_INI_UINT("dp_reo_reinject_ring", \
  661. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  662. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  663. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  664. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  665. #define CFG_DP_RX_RELEASE_RING \
  666. CFG_INI_UINT("dp_rx_release_ring", \
  667. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  668. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  669. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  670. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  671. #define CFG_DP_RX_DESTINATION_RING \
  672. CFG_INI_UINT("dp_reo_dst_ring", \
  673. WLAN_CFG_REO_DST_RING_SIZE_MIN, \
  674. WLAN_CFG_REO_DST_RING_SIZE_MAX, \
  675. WLAN_CFG_REO_DST_RING_SIZE, \
  676. CFG_VALUE_OR_DEFAULT, "DP REO destination ring")
  677. #define CFG_DP_REO_EXCEPTION_RING \
  678. CFG_INI_UINT("dp_reo_exception_ring", \
  679. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  680. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  681. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  682. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  683. #define CFG_DP_REO_CMD_RING \
  684. CFG_INI_UINT("dp_reo_cmd_ring", \
  685. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  686. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  687. WLAN_CFG_REO_CMD_RING_SIZE, \
  688. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  689. #define CFG_DP_REO_STATUS_RING \
  690. CFG_INI_UINT("dp_reo_status_ring", \
  691. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  692. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  693. WLAN_CFG_REO_STATUS_RING_SIZE, \
  694. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  695. #define CFG_DP_RXDMA_BUF_RING \
  696. CFG_INI_UINT("dp_rxdma_buf_ring", \
  697. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  698. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  699. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  700. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  701. #define CFG_DP_RXDMA_REFILL_RING \
  702. CFG_INI_UINT("dp_rxdma_refill_ring", \
  703. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  704. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  705. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  706. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  707. #define CFG_DP_TX_DESC_LIMIT_0 \
  708. CFG_INI_UINT("dp_tx_desc_limit_0", \
  709. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  710. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  711. WLAN_CFG_TX_DESC_LIMIT_0, \
  712. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  713. #define CFG_DP_TX_DESC_LIMIT_1 \
  714. CFG_INI_UINT("dp_tx_desc_limit_1", \
  715. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  716. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  717. WLAN_CFG_TX_DESC_LIMIT_1, \
  718. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  719. #define CFG_DP_TX_DESC_LIMIT_2 \
  720. CFG_INI_UINT("dp_tx_desc_limit_2", \
  721. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  722. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  723. WLAN_CFG_TX_DESC_LIMIT_2, \
  724. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  725. #define CFG_DP_TX_DEVICE_LIMIT \
  726. CFG_INI_UINT("dp_tx_device_limit", \
  727. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  728. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  729. WLAN_CFG_TX_DEVICE_LIMIT, \
  730. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  731. #define CFG_DP_TX_SW_INTERNODE_QUEUE \
  732. CFG_INI_UINT("dp_tx_sw_internode_queue", \
  733. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \
  734. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \
  735. WLAN_CFG_TX_SW_INTERNODE_QUEUE, \
  736. CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
  737. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  738. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  739. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  740. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  741. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  742. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  743. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  744. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  745. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  746. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  747. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  748. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  749. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  750. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  751. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  752. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  753. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  754. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  755. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  756. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  757. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  758. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  759. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  760. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  761. #define CFG_DP_RXDMA_ERR_DST_RING \
  762. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  763. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  764. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  765. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  766. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  767. #define CFG_DP_PER_PKT_LOGGING \
  768. CFG_INI_UINT("enable_verbose_debug", \
  769. 0, 0xffff, 0, \
  770. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  771. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  772. CFG_INI_UINT("TxFlowStartQueueOffset", \
  773. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  774. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  775. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  776. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  777. 0, 50, 15, \
  778. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  779. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  780. CFG_INI_UINT("IpaUcTxBufSize", \
  781. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  782. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  783. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  784. CFG_INI_UINT("IpaUcTxPartitionBase", \
  785. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  786. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  787. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  788. CFG_INI_UINT("IpaUcRxIndRingCount", \
  789. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  790. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  791. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  792. CFG_INI_BOOL("gDisableIntraBssFwd", \
  793. false, "Disable intrs BSS Rx packets")
  794. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  795. CFG_INI_BOOL("gEnableDataStallDetection", \
  796. true, "Enable/Disable Data stall detection")
  797. #define CFG_DP_RX_SW_DESC_WEIGHT \
  798. CFG_INI_UINT("dp_rx_sw_desc_weight", \
  799. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
  800. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
  801. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
  802. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
  803. #define CFG_DP_RX_SW_DESC_NUM \
  804. CFG_INI_UINT("dp_rx_sw_desc_num", \
  805. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \
  806. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \
  807. WLAN_CFG_RX_SW_DESC_NUM_SIZE, \
  808. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
  809. #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \
  810. CFG_INI_UINT("dp_rx_flow_search_table_size", \
  811. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \
  812. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \
  813. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \
  814. CFG_VALUE_OR_DEFAULT, \
  815. "DP Rx Flow Search Table Size in number of entries")
  816. #define CFG_DP_RX_FLOW_TAG_ENABLE \
  817. CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \
  818. "Enable/Disable DP Rx Flow Tag")
  819. #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \
  820. CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \
  821. "DP Rx Flow Search Table Is Per PDev")
  822. #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \
  823. CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \
  824. "Enable/Disable Rx Protocol & Flow tags in Monitor mode")
  825. #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \
  826. CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \
  827. "Enable/Disable tx Per Pkt vdev id check")
  828. /*
  829. * <ini>
  830. * dp_rx_fisa_enable - Control Rx datapath FISA
  831. * @Min: 0
  832. * @Max: 1
  833. * @Default: 1
  834. *
  835. * This ini is used to enable DP Rx FISA feature
  836. *
  837. * Related: dp_rx_flow_search_table_size
  838. *
  839. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  840. *
  841. * Usage: Internal
  842. *
  843. * </ini>
  844. */
  845. #define CFG_DP_RX_FISA_ENABLE \
  846. CFG_INI_BOOL("dp_rx_fisa_enable", true, \
  847. "Enable/Disable DP Rx FISA")
  848. #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \
  849. CFG_INI_UINT("mon_drop_thresh", \
  850. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \
  851. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \
  852. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \
  853. CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop theshold")
  854. #define CFG_DP_PKTLOG_BUFFER_SIZE \
  855. CFG_INI_UINT("PktlogBufSize", \
  856. WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \
  857. WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \
  858. WLAN_CFG_PKTLOG_BUFFER_SIZE, \
  859. CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
  860. #define CFG_DP_FULL_MON_MODE \
  861. CFG_INI_BOOL("full_mon_mode", \
  862. false, "Full Monitor mode support")
  863. #define CFG_DP_REO_RINGS_MAP \
  864. CFG_INI_UINT("dp_reo_rings_map", \
  865. WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \
  866. WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \
  867. WLAN_CFG_NUM_REO_RINGS_MAP, \
  868. CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
  869. #define CFG_DP_RX_RADIO_0_DEFAULT_REO \
  870. CFG_INI_UINT("dp_rx_radio0_default_reo", \
  871. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  872. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  873. WLAN_CFG_RADIO_0_DEFAULT_REO, \
  874. CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
  875. #define CFG_DP_RX_RADIO_1_DEFAULT_REO \
  876. CFG_INI_UINT("dp_rx_radio1_default_reo", \
  877. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  878. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  879. WLAN_CFG_RADIO_1_DEFAULT_REO, \
  880. CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
  881. #define CFG_DP_RX_RADIO_2_DEFAULT_REO \
  882. CFG_INI_UINT("dp_rx_radio2_default_reo", \
  883. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  884. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  885. WLAN_CFG_RADIO_2_DEFAULT_REO, \
  886. CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
  887. #define CFG_DP_PEER_EXT_STATS \
  888. CFG_INI_BOOL("peer_ext_stats", \
  889. false, "Peer extended stats")
  890. /*
  891. * <ini>
  892. * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes
  893. * @Min: 0
  894. * @Max: 1
  895. * @Default: Default value indicating if checksum should be disabled for
  896. * legacy WLAN modes
  897. *
  898. * This ini is used to disable HW checksum offload capability for legacy
  899. * connections
  900. *
  901. * Related: gEnableIpTcpUdpChecksumOffload should be enabled
  902. *
  903. * Usage: Internal
  904. *
  905. * </ini>
  906. */
  907. #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE
  908. #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1
  909. #endif
  910. #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \
  911. CFG_INI_BOOL("legacy_mode_csum_disable", \
  912. DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \
  913. "Enable/Disable legacy mode checksum")
  914. #define CFG_DP_RX_BUFF_POOL_ENABLE \
  915. CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \
  916. "Enable/Disable DP RX emergency buffer pool support")
  917. #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \
  918. CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \
  919. "Enable/Disable DP RX refill buffer pool support")
  920. #define CFG_DP_POLL_MODE_ENABLE \
  921. CFG_INI_BOOL("dp_poll_mode_enable", false, \
  922. "Enable/Disable Polling mode for data path")
  923. #define CFG_DP_RX_FST_IN_CMEM \
  924. CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \
  925. "Enable/Disable flow search table in CMEM")
  926. /*
  927. * <ini>
  928. * gEnableSWLM - Control DP Software latency manager
  929. * @Min: 0
  930. * @Max: 1
  931. * @Default: 0
  932. *
  933. * This ini is used to enable DP Software latency Manager
  934. *
  935. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  936. *
  937. * Usage: Internal
  938. *
  939. * </ini>
  940. */
  941. #define CFG_DP_SWLM_ENABLE \
  942. CFG_INI_BOOL("gEnableSWLM", false, \
  943. "Enable/Disable DP SWLM")
  944. /*
  945. * <ini>
  946. * wow_check_rx_pending_enable - control to check RX frames pending in Wow
  947. * @Min: 0
  948. * @Max: 1
  949. * @Default: 0
  950. *
  951. * This ini is used to control DP Software to perform RX pending check
  952. * before entering WoW mode
  953. *
  954. * Usage: Internal
  955. *
  956. * </ini>
  957. */
  958. #define CFG_DP_WOW_CHECK_RX_PENDING \
  959. CFG_INI_BOOL("wow_check_rx_pending_enable", \
  960. false, \
  961. "enable rx frame pending check in WoW mode")
  962. #define CFG_DP_DELAY_MON_REPLENISH \
  963. CFG_INI_BOOL("delay_mon_replenish", \
  964. true, "Delay Monitor Replenish")
  965. /*
  966. * <ini>
  967. * gForceRX64BA - enable force 64 blockack mode for RX
  968. * @Min: 0
  969. * @Max: 1
  970. * @Default: 0
  971. *
  972. * This ini is used to control DP Software to use 64 blockack
  973. * for RX direction forcibly
  974. *
  975. * Usage: Internal
  976. *
  977. * </ini>
  978. */
  979. #define CFG_FORCE_RX_64_BA \
  980. CFG_INI_BOOL("gForceRX64BA", \
  981. false, "Enable/Disable force 64 blockack in RX side")
  982. /*
  983. * <ini>
  984. * ghw_cc_enable - enable HW cookie conversion by register
  985. * @Min: 0
  986. * @Max: 1
  987. * @Default: 1
  988. *
  989. * This ini is used to control HW based 20 bits cookie to 64 bits
  990. * Desc virtual address conversion
  991. *
  992. * Usage: Internal
  993. *
  994. * </ini>
  995. */
  996. #define CFG_DP_HW_CC_ENABLE \
  997. CFG_INI_BOOL("ghw_cc_enable", \
  998. true, "Enable/Disable HW cookie conversion")
  999. #ifdef IPA_OFFLOAD
  1000. /*
  1001. * <ini>
  1002. * dp_ipa_tx_ring_size - Set tcl ring size for IPA
  1003. * @Min: 1024
  1004. * @Max: 8096
  1005. * @Default: 1024
  1006. *
  1007. * This ini sets the tcl ring size for IPA
  1008. *
  1009. * Related: N/A
  1010. *
  1011. * Supported Feature: IPA
  1012. *
  1013. * Usage: Internal
  1014. *
  1015. * </ini>
  1016. */
  1017. #define CFG_DP_IPA_TX_RING_SIZE \
  1018. CFG_INI_UINT("dp_ipa_tx_ring_size", \
  1019. WLAN_CFG_IPA_TX_RING_SIZE_MIN, \
  1020. WLAN_CFG_IPA_TX_RING_SIZE_MAX, \
  1021. WLAN_CFG_IPA_TX_RING_SIZE, \
  1022. CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
  1023. /*
  1024. * <ini>
  1025. * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA
  1026. * @Min: 1024
  1027. * @Max: 8096
  1028. * @Default: 1024
  1029. *
  1030. * This ini sets the tx comp ring size for IPA
  1031. *
  1032. * Related: N/A
  1033. *
  1034. * Supported Feature: IPA
  1035. *
  1036. * Usage: Internal
  1037. *
  1038. * </ini>
  1039. */
  1040. #define CFG_DP_IPA_TX_COMP_RING_SIZE \
  1041. CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \
  1042. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \
  1043. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \
  1044. WLAN_CFG_IPA_TX_COMP_RING_SIZE, \
  1045. CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
  1046. #ifdef IPA_WDI3_TX_TWO_PIPES
  1047. /*
  1048. * <ini>
  1049. * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA
  1050. * @Min: 1024
  1051. * @Max: 8096
  1052. * @Default: 1024
  1053. *
  1054. * This ini sets the alt tcl ring size for IPA
  1055. *
  1056. * Related: N/A
  1057. *
  1058. * Supported Feature: IPA
  1059. *
  1060. * Usage: Internal
  1061. *
  1062. * </ini>
  1063. */
  1064. #define CFG_DP_IPA_TX_ALT_RING_SIZE \
  1065. CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \
  1066. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \
  1067. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \
  1068. WLAN_CFG_IPA_TX_ALT_RING_SIZE, \
  1069. CFG_VALUE_OR_DEFAULT, \
  1070. "DP IPA TX Alternative Ring Size")
  1071. /*
  1072. * <ini>
  1073. * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA
  1074. * @Min: 1024
  1075. * @Max: 8096
  1076. * @Default: 1024
  1077. *
  1078. * This ini sets the tx alt comp ring size for IPA
  1079. *
  1080. * Related: N/A
  1081. *
  1082. * Supported Feature: IPA
  1083. *
  1084. * Usage: Internal
  1085. *
  1086. * </ini>
  1087. */
  1088. #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \
  1089. CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \
  1090. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \
  1091. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \
  1092. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \
  1093. CFG_VALUE_OR_DEFAULT, \
  1094. "DP IPA TX Alternative Completion Ring Size")
  1095. #define CFG_DP_IPA_TX_ALT_RING_CFG \
  1096. CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \
  1097. CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE)
  1098. #else
  1099. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1100. #endif
  1101. #define CFG_DP_IPA_TX_RING_CFG \
  1102. CFG(CFG_DP_IPA_TX_RING_SIZE) \
  1103. CFG(CFG_DP_IPA_TX_COMP_RING_SIZE)
  1104. #else
  1105. #define CFG_DP_IPA_TX_RING_CFG
  1106. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1107. #endif
  1108. #ifdef WLAN_SUPPORT_PPEDS
  1109. #define CFG_DP_PPE_ENABLE \
  1110. CFG_INI_BOOL("ppe_enable", false, \
  1111. "DP ppe enable flag")
  1112. #define CFG_DP_REO2PPE_RING \
  1113. CFG_INI_UINT("dp_reo2ppe_ring", \
  1114. WLAN_CFG_REO2PPE_RING_SIZE_MIN, \
  1115. WLAN_CFG_REO2PPE_RING_SIZE_MAX, \
  1116. WLAN_CFG_REO2PPE_RING_SIZE, \
  1117. CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring")
  1118. #define CFG_DP_PPE2TCL_RING \
  1119. CFG_INI_UINT("dp_ppe2tcl_ring", \
  1120. WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \
  1121. WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \
  1122. WLAN_CFG_PPE2TCL_RING_SIZE, \
  1123. CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings")
  1124. #define CFG_DP_PPE_RELEASE_RING \
  1125. CFG_INI_UINT("dp_ppe_release_ring", \
  1126. WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN, \
  1127. WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX, \
  1128. WLAN_CFG_PPE_RELEASE_RING_SIZE, \
  1129. CFG_VALUE_OR_DEFAULT, "DP PPE Release Ring")
  1130. #define CFG_DP_PPE_CONFIG \
  1131. CFG(CFG_DP_PPE_ENABLE) \
  1132. CFG(CFG_DP_REO2PPE_RING) \
  1133. CFG(CFG_DP_PPE2TCL_RING) \
  1134. CFG(CFG_DP_PPE_RELEASE_RING)
  1135. #else
  1136. #define CFG_DP_PPE_CONFIG
  1137. #endif
  1138. #define CFG_DP \
  1139. CFG(CFG_DP_HTT_PACKET_TYPE) \
  1140. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  1141. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  1142. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  1143. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  1144. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  1145. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  1146. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  1147. CFG(CFG_DP_MAX_CLIENTS) \
  1148. CFG(CFG_DP_MAX_PEER_ID) \
  1149. CFG(CFG_DP_REO_DEST_RINGS) \
  1150. CFG(CFG_DP_TCL_DATA_RINGS) \
  1151. CFG(CFG_DP_NSS_REO_DEST_RINGS) \
  1152. CFG(CFG_DP_NSS_TCL_DATA_RINGS) \
  1153. CFG(CFG_DP_TX_DESC) \
  1154. CFG(CFG_DP_TX_EXT_DESC) \
  1155. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  1156. CFG(CFG_DP_PDEV_RX_RING) \
  1157. CFG(CFG_DP_PDEV_TX_RING) \
  1158. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  1159. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  1160. CFG(CFG_DP_TX_RING_SIZE) \
  1161. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  1162. CFG(CFG_DP_PDEV_LMAC_RING) \
  1163. CFG(CFG_DP_BASE_HW_MAC_ID) \
  1164. CFG(CFG_DP_RX_HASH) \
  1165. CFG(CFG_DP_TSO) \
  1166. CFG(CFG_DP_LRO) \
  1167. CFG(CFG_DP_SG) \
  1168. CFG(CFG_DP_GRO) \
  1169. CFG(CFG_DP_OL_TX_CSUM) \
  1170. CFG(CFG_DP_OL_RX_CSUM) \
  1171. CFG(CFG_DP_RAWMODE) \
  1172. CFG(CFG_DP_PEER_FLOW_CTRL) \
  1173. CFG(CFG_DP_NAPI) \
  1174. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  1175. CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \
  1176. CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \
  1177. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  1178. CFG(CFG_DP_WBM_RELEASE_RING) \
  1179. CFG(CFG_DP_TCL_CMD_CREDIT_RING) \
  1180. CFG(CFG_DP_TCL_STATUS_RING) \
  1181. CFG(CFG_DP_REO_REINJECT_RING) \
  1182. CFG(CFG_DP_RX_RELEASE_RING) \
  1183. CFG(CFG_DP_REO_EXCEPTION_RING) \
  1184. CFG(CFG_DP_RX_DESTINATION_RING) \
  1185. CFG(CFG_DP_REO_CMD_RING) \
  1186. CFG(CFG_DP_REO_STATUS_RING) \
  1187. CFG(CFG_DP_RXDMA_BUF_RING) \
  1188. CFG(CFG_DP_RXDMA_REFILL_RING) \
  1189. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  1190. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  1191. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  1192. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  1193. CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \
  1194. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  1195. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  1196. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  1197. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  1198. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  1199. CFG(CFG_DP_PER_PKT_LOGGING) \
  1200. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  1201. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  1202. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  1203. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  1204. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  1205. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  1206. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
  1207. CFG(CFG_DP_RX_SW_DESC_WEIGHT) \
  1208. CFG(CFG_DP_RX_SW_DESC_NUM) \
  1209. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \
  1210. CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \
  1211. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \
  1212. CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \
  1213. CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \
  1214. CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \
  1215. CFG(CFG_DP_RX_FISA_ENABLE) \
  1216. CFG(CFG_DP_FULL_MON_MODE) \
  1217. CFG(CFG_DP_REO_RINGS_MAP) \
  1218. CFG(CFG_DP_PEER_EXT_STATS) \
  1219. CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \
  1220. CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \
  1221. CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \
  1222. CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \
  1223. CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \
  1224. CFG(CFG_DP_POLL_MODE_ENABLE) \
  1225. CFG(CFG_DP_SWLM_ENABLE) \
  1226. CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \
  1227. CFG(CFG_DP_RX_FST_IN_CMEM) \
  1228. CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \
  1229. CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \
  1230. CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \
  1231. CFG(CFG_DP_WOW_CHECK_RX_PENDING) \
  1232. CFG(CFG_DP_HW_CC_ENABLE) \
  1233. CFG(CFG_FORCE_RX_64_BA) \
  1234. CFG(CFG_DP_DELAY_MON_REPLENISH) \
  1235. CFG_DP_IPA_TX_RING_CFG \
  1236. CFG_DP_PPE_CONFIG \
  1237. CFG_DP_IPA_TX_ALT_RING_CFG
  1238. #endif /* _CFG_DP_H_ */