dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  167. {
  168. if (!panel) {
  169. DSI_ERR("Invalid panel param\n");
  170. return -EINVAL;
  171. }
  172. /* toggle reset-gpio by writing directly to register in trusted-vm */
  173. if (trusted_vm_env) {
  174. struct dsi_tlmm_gpio *gpio = NULL;
  175. void __iomem *io;
  176. u32 offset = 0x4;
  177. int i;
  178. for (i = 0; i < panel->tlmm_gpio_count; i++)
  179. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  180. gpio = &panel->tlmm_gpio[i];
  181. if (!gpio) {
  182. DSI_ERR("reset gpio not found\n");
  183. return -EINVAL;
  184. }
  185. io = ioremap(gpio->addr, gpio->size);
  186. writel_relaxed(0, io + offset);
  187. iounmap(io);
  188. } else {
  189. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  190. if (!r_config) {
  191. DSI_ERR("Invalid panel reset configuration\n");
  192. return -EINVAL;
  193. }
  194. if (!gpio_is_valid(r_config->reset_gpio)) {
  195. DSI_ERR("failed to pull down gpio\n");
  196. return -EINVAL;
  197. }
  198. gpio_set_value(r_config->reset_gpio, 0);
  199. }
  200. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  201. DSI_INFO("GPIO pulled low to simulate ESD\n");
  202. return 0;
  203. }
  204. static int dsi_panel_reset(struct dsi_panel *panel)
  205. {
  206. int rc = 0;
  207. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  208. int i;
  209. if (!gpio_is_valid(r_config->reset_gpio))
  210. goto skip_reset_gpio;
  211. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  212. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  213. if (rc) {
  214. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  215. goto exit;
  216. }
  217. }
  218. if (r_config->count) {
  219. rc = gpio_direction_output(r_config->reset_gpio,
  220. r_config->sequence[0].level);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. for (i = 0; i < r_config->count; i++) {
  227. gpio_set_value(r_config->reset_gpio,
  228. r_config->sequence[i].level);
  229. if (r_config->sequence[i].sleep_ms)
  230. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  231. (r_config->sequence[i].sleep_ms * 1000) + 100);
  232. }
  233. skip_reset_gpio:
  234. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  235. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  236. if (rc)
  237. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  238. }
  239. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  240. bool out = true;
  241. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  242. || (panel->reset_config.mode_sel_state
  243. == MODE_GPIO_LOW))
  244. out = false;
  245. else if ((panel->reset_config.mode_sel_state
  246. == MODE_SEL_SINGLE_PORT) ||
  247. (panel->reset_config.mode_sel_state
  248. == MODE_GPIO_HIGH))
  249. out = true;
  250. rc = gpio_direction_output(
  251. panel->reset_config.lcd_mode_sel_gpio, out);
  252. if (rc)
  253. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  254. }
  255. if (gpio_is_valid(panel->panel_test_gpio)) {
  256. rc = gpio_direction_input(panel->panel_test_gpio);
  257. if (rc)
  258. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  259. rc);
  260. }
  261. exit:
  262. return rc;
  263. }
  264. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  265. {
  266. int rc = 0;
  267. struct pinctrl_state *state;
  268. if (panel->host_config.ext_bridge_mode)
  269. return 0;
  270. if (!panel->pinctrl.pinctrl)
  271. return 0;
  272. if (enable)
  273. state = panel->pinctrl.active;
  274. else
  275. state = panel->pinctrl.suspend;
  276. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  277. if (rc)
  278. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  279. panel->name, rc);
  280. return rc;
  281. }
  282. static int dsi_panel_power_on(struct dsi_panel *panel)
  283. {
  284. int rc = 0;
  285. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  286. if (rc) {
  287. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  288. panel->name, rc);
  289. goto exit;
  290. }
  291. rc = dsi_panel_set_pinctrl_state(panel, true);
  292. if (rc) {
  293. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  294. goto error_disable_vregs;
  295. }
  296. rc = dsi_panel_reset(panel);
  297. if (rc) {
  298. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  299. goto error_disable_gpio;
  300. }
  301. goto exit;
  302. error_disable_gpio:
  303. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  304. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  305. if (gpio_is_valid(panel->bl_config.en_gpio))
  306. gpio_set_value(panel->bl_config.en_gpio, 0);
  307. (void)dsi_panel_set_pinctrl_state(panel, false);
  308. error_disable_vregs:
  309. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  310. exit:
  311. return rc;
  312. }
  313. static int dsi_panel_power_off(struct dsi_panel *panel)
  314. {
  315. int rc = 0;
  316. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  317. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  318. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  319. !panel->reset_gpio_always_on)
  320. gpio_set_value(panel->reset_config.reset_gpio, 0);
  321. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  322. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  323. if (gpio_is_valid(panel->panel_test_gpio)) {
  324. rc = gpio_direction_input(panel->panel_test_gpio);
  325. if (rc)
  326. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  327. rc);
  328. }
  329. rc = dsi_panel_set_pinctrl_state(panel, false);
  330. if (rc) {
  331. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  332. rc);
  333. }
  334. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  335. if (rc)
  336. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  337. panel->name, rc);
  338. return rc;
  339. }
  340. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  341. enum dsi_cmd_set_type type)
  342. {
  343. int rc = 0, i = 0;
  344. ssize_t len;
  345. struct dsi_cmd_desc *cmds;
  346. u32 count;
  347. enum dsi_cmd_set_state state;
  348. struct dsi_display_mode *mode;
  349. if (!panel || !panel->cur_mode)
  350. return -EINVAL;
  351. mode = panel->cur_mode;
  352. cmds = mode->priv_info->cmd_sets[type].cmds;
  353. count = mode->priv_info->cmd_sets[type].count;
  354. state = mode->priv_info->cmd_sets[type].state;
  355. SDE_EVT32(type, state, count);
  356. if (count == 0) {
  357. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  358. panel->name, type);
  359. goto error;
  360. }
  361. for (i = 0; i < count; i++) {
  362. if (state == DSI_CMD_SET_STATE_LP)
  363. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  364. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  365. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  366. len = dsi_host_transfer_sub(panel->host, cmds);
  367. if (len < 0) {
  368. rc = len;
  369. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  370. goto error;
  371. }
  372. if (cmds->post_wait_ms)
  373. usleep_range(cmds->post_wait_ms*1000,
  374. ((cmds->post_wait_ms*1000)+10));
  375. cmds++;
  376. }
  377. error:
  378. return rc;
  379. }
  380. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  381. {
  382. int rc = 0;
  383. if (panel->host_config.ext_bridge_mode)
  384. return 0;
  385. devm_pinctrl_put(panel->pinctrl.pinctrl);
  386. return rc;
  387. }
  388. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  389. {
  390. int rc = 0;
  391. if (panel->host_config.ext_bridge_mode)
  392. return 0;
  393. /* TODO: pinctrl is defined in dsi dt node */
  394. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  395. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  396. rc = PTR_ERR(panel->pinctrl.pinctrl);
  397. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  398. goto error;
  399. }
  400. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  401. "panel_active");
  402. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  403. rc = PTR_ERR(panel->pinctrl.active);
  404. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  405. goto error;
  406. }
  407. panel->pinctrl.suspend =
  408. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  409. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  410. rc = PTR_ERR(panel->pinctrl.suspend);
  411. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  412. goto error;
  413. }
  414. panel->pinctrl.pwm_pin =
  415. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  416. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  417. panel->pinctrl.pwm_pin = NULL;
  418. DSI_DEBUG("failed to get pinctrl pwm_pin");
  419. }
  420. error:
  421. return rc;
  422. }
  423. static int dsi_panel_wled_register(struct dsi_panel *panel,
  424. struct dsi_backlight_config *bl)
  425. {
  426. struct backlight_device *bd;
  427. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  428. if (!bd) {
  429. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  430. panel->name, -EPROBE_DEFER);
  431. return -EPROBE_DEFER;
  432. }
  433. bl->raw_bd = bd;
  434. return 0;
  435. }
  436. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  437. u32 bl_lvl)
  438. {
  439. int rc = 0;
  440. unsigned long mode_flags = 0;
  441. struct mipi_dsi_device *dsi = NULL;
  442. if (!panel || (bl_lvl > 0xffff)) {
  443. DSI_ERR("invalid params\n");
  444. return -EINVAL;
  445. }
  446. dsi = &panel->mipi_device;
  447. if (unlikely(panel->bl_config.lp_mode)) {
  448. mode_flags = dsi->mode_flags;
  449. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  450. }
  451. if (panel->bl_config.bl_inverted_dbv)
  452. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  453. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  454. if (rc < 0)
  455. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  456. if (unlikely(panel->bl_config.lp_mode))
  457. dsi->mode_flags = mode_flags;
  458. return rc;
  459. }
  460. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  461. u32 bl_lvl)
  462. {
  463. int rc = 0;
  464. u32 duty = 0;
  465. u32 period_ns = 0;
  466. struct dsi_backlight_config *bl;
  467. if (!panel) {
  468. DSI_ERR("Invalid Params\n");
  469. return -EINVAL;
  470. }
  471. bl = &panel->bl_config;
  472. if (!bl->pwm_bl) {
  473. DSI_ERR("pwm device not found\n");
  474. return -EINVAL;
  475. }
  476. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  477. duty = bl_lvl * period_ns;
  478. duty /= bl->bl_max_level;
  479. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  480. if (rc) {
  481. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  482. rc);
  483. goto error;
  484. }
  485. if (bl_lvl == 0 && bl->pwm_enabled) {
  486. pwm_disable(bl->pwm_bl);
  487. bl->pwm_enabled = false;
  488. return 0;
  489. }
  490. if (bl_lvl != 0 && !bl->pwm_enabled) {
  491. rc = pwm_enable(bl->pwm_bl);
  492. if (rc) {
  493. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  494. rc);
  495. goto error;
  496. }
  497. bl->pwm_enabled = true;
  498. }
  499. error:
  500. return rc;
  501. }
  502. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  503. {
  504. int rc = 0;
  505. struct dsi_backlight_config *bl = &panel->bl_config;
  506. if (panel->host_config.ext_bridge_mode)
  507. return 0;
  508. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  509. switch (bl->type) {
  510. case DSI_BACKLIGHT_WLED:
  511. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  512. break;
  513. case DSI_BACKLIGHT_DCS:
  514. rc = dsi_panel_update_backlight(panel, bl_lvl);
  515. break;
  516. case DSI_BACKLIGHT_EXTERNAL:
  517. break;
  518. case DSI_BACKLIGHT_PWM:
  519. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  520. break;
  521. default:
  522. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  523. rc = -ENOTSUPP;
  524. }
  525. return rc;
  526. }
  527. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  528. {
  529. u32 cur_bl_level;
  530. struct backlight_device *bd = bl->raw_bd;
  531. /* default the brightness level to 50% */
  532. cur_bl_level = bl->bl_max_level >> 1;
  533. switch (bl->type) {
  534. case DSI_BACKLIGHT_WLED:
  535. /* Try to query the backlight level from the backlight device */
  536. if (bd->ops && bd->ops->get_brightness)
  537. cur_bl_level = bd->ops->get_brightness(bd);
  538. break;
  539. case DSI_BACKLIGHT_DCS:
  540. case DSI_BACKLIGHT_EXTERNAL:
  541. case DSI_BACKLIGHT_PWM:
  542. default:
  543. /*
  544. * Ideally, we should read the backlight level from the
  545. * panel. For now, just set it default value.
  546. */
  547. break;
  548. }
  549. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  550. return cur_bl_level;
  551. }
  552. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  553. {
  554. struct dsi_backlight_config *bl = &panel->bl_config;
  555. bl->bl_level = dsi_panel_get_brightness(bl);
  556. }
  557. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  558. {
  559. int rc = 0;
  560. struct dsi_backlight_config *bl = &panel->bl_config;
  561. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  562. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  563. rc = PTR_ERR(bl->pwm_bl);
  564. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  565. rc);
  566. return rc;
  567. }
  568. if (panel->pinctrl.pwm_pin) {
  569. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  570. panel->pinctrl.pwm_pin);
  571. if (rc)
  572. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  573. panel->name, rc);
  574. }
  575. return 0;
  576. }
  577. static int dsi_panel_bl_register(struct dsi_panel *panel)
  578. {
  579. int rc = 0;
  580. struct dsi_backlight_config *bl = &panel->bl_config;
  581. if (panel->host_config.ext_bridge_mode)
  582. return 0;
  583. switch (bl->type) {
  584. case DSI_BACKLIGHT_WLED:
  585. rc = dsi_panel_wled_register(panel, bl);
  586. break;
  587. case DSI_BACKLIGHT_DCS:
  588. break;
  589. case DSI_BACKLIGHT_EXTERNAL:
  590. break;
  591. case DSI_BACKLIGHT_PWM:
  592. rc = dsi_panel_pwm_register(panel);
  593. break;
  594. default:
  595. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  596. rc = -ENOTSUPP;
  597. goto error;
  598. }
  599. error:
  600. return rc;
  601. }
  602. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  603. {
  604. struct dsi_backlight_config *bl = &panel->bl_config;
  605. devm_pwm_put(panel->parent, bl->pwm_bl);
  606. }
  607. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  608. {
  609. int rc = 0;
  610. struct dsi_backlight_config *bl = &panel->bl_config;
  611. if (panel->host_config.ext_bridge_mode)
  612. return 0;
  613. switch (bl->type) {
  614. case DSI_BACKLIGHT_WLED:
  615. break;
  616. case DSI_BACKLIGHT_DCS:
  617. break;
  618. case DSI_BACKLIGHT_EXTERNAL:
  619. break;
  620. case DSI_BACKLIGHT_PWM:
  621. dsi_panel_pwm_unregister(panel);
  622. break;
  623. default:
  624. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  625. rc = -ENOTSUPP;
  626. goto error;
  627. }
  628. error:
  629. return rc;
  630. }
  631. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  632. struct dsi_parser_utils *utils)
  633. {
  634. int rc = 0;
  635. u64 tmp64 = 0;
  636. struct dsi_display_mode *display_mode;
  637. struct dsi_display_mode_priv_info *priv_info;
  638. display_mode = container_of(mode, struct dsi_display_mode, timing);
  639. priv_info = display_mode->priv_info;
  640. rc = utils->read_u64(utils->data,
  641. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  642. if (rc == -EOVERFLOW) {
  643. tmp64 = 0;
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  646. }
  647. mode->clk_rate_hz = !rc ? tmp64 : 0;
  648. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  649. mode->pclk_scale.numer = 1;
  650. mode->pclk_scale.denom = 1;
  651. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  652. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  653. &mode->mdp_transfer_time_us);
  654. if (!rc)
  655. display_mode->priv_info->mdp_transfer_time_us =
  656. mode->mdp_transfer_time_us;
  657. else
  658. display_mode->priv_info->mdp_transfer_time_us = 0;
  659. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  660. rc = utils->read_u32(utils->data,
  661. "qcom,mdss-dsi-panel-framerate",
  662. &mode->refresh_rate);
  663. if (rc) {
  664. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  665. rc);
  666. goto error;
  667. }
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  669. &mode->h_active);
  670. if (rc) {
  671. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  672. rc);
  673. goto error;
  674. }
  675. rc = utils->read_u32(utils->data,
  676. "qcom,mdss-dsi-h-front-porch",
  677. &mode->h_front_porch);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data,
  684. "qcom,mdss-dsi-h-back-porch",
  685. &mode->h_back_porch);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. rc = utils->read_u32(utils->data,
  692. "qcom,mdss-dsi-h-pulse-width",
  693. &mode->h_sync_width);
  694. if (rc) {
  695. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  696. rc);
  697. goto error;
  698. }
  699. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  700. &mode->h_skew);
  701. if (rc)
  702. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  703. rc);
  704. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  705. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  706. mode->h_sync_width);
  707. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  708. &mode->v_active);
  709. if (rc) {
  710. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  711. rc);
  712. goto error;
  713. }
  714. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  715. &mode->v_back_porch);
  716. if (rc) {
  717. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  718. rc);
  719. goto error;
  720. }
  721. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  722. &mode->v_front_porch);
  723. if (rc) {
  724. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  725. rc);
  726. goto error;
  727. }
  728. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  729. &mode->v_sync_width);
  730. if (rc) {
  731. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  732. rc);
  733. goto error;
  734. }
  735. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  736. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  737. mode->v_sync_width);
  738. error:
  739. return rc;
  740. }
  741. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  742. struct dsi_parser_utils *utils,
  743. const char *name)
  744. {
  745. int rc = 0;
  746. u32 bpp = 0;
  747. enum dsi_pixel_format fmt;
  748. const char *packing;
  749. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  750. if (rc) {
  751. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  752. name, rc);
  753. return rc;
  754. }
  755. host->bpp = bpp;
  756. switch (bpp) {
  757. case 3:
  758. fmt = DSI_PIXEL_FORMAT_RGB111;
  759. break;
  760. case 8:
  761. fmt = DSI_PIXEL_FORMAT_RGB332;
  762. break;
  763. case 12:
  764. fmt = DSI_PIXEL_FORMAT_RGB444;
  765. break;
  766. case 16:
  767. fmt = DSI_PIXEL_FORMAT_RGB565;
  768. break;
  769. case 18:
  770. fmt = DSI_PIXEL_FORMAT_RGB666;
  771. break;
  772. case 24:
  773. default:
  774. fmt = DSI_PIXEL_FORMAT_RGB888;
  775. break;
  776. }
  777. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  778. packing = utils->get_property(utils->data,
  779. "qcom,mdss-dsi-pixel-packing",
  780. NULL);
  781. if (packing && !strcmp(packing, "loose"))
  782. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  783. }
  784. host->dst_format = fmt;
  785. return rc;
  786. }
  787. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  788. struct dsi_parser_utils *utils,
  789. const char *name)
  790. {
  791. int rc = 0;
  792. bool lane_enabled;
  793. u32 num_of_lanes = 0;
  794. lane_enabled = utils->read_bool(utils->data,
  795. "qcom,mdss-dsi-lane-0-state");
  796. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  797. lane_enabled = utils->read_bool(utils->data,
  798. "qcom,mdss-dsi-lane-1-state");
  799. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  800. lane_enabled = utils->read_bool(utils->data,
  801. "qcom,mdss-dsi-lane-2-state");
  802. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  803. lane_enabled = utils->read_bool(utils->data,
  804. "qcom,mdss-dsi-lane-3-state");
  805. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  806. if (host->data_lanes & DSI_DATA_LANE_0)
  807. num_of_lanes++;
  808. if (host->data_lanes & DSI_DATA_LANE_1)
  809. num_of_lanes++;
  810. if (host->data_lanes & DSI_DATA_LANE_2)
  811. num_of_lanes++;
  812. if (host->data_lanes & DSI_DATA_LANE_3)
  813. num_of_lanes++;
  814. host->num_data_lanes = num_of_lanes;
  815. if (host->data_lanes == 0) {
  816. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  817. rc = -EINVAL;
  818. }
  819. return rc;
  820. }
  821. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  822. struct dsi_parser_utils *utils,
  823. const char *name)
  824. {
  825. int rc = 0;
  826. const char *swap_mode;
  827. swap_mode = utils->get_property(utils->data,
  828. "qcom,mdss-dsi-color-order", NULL);
  829. if (swap_mode) {
  830. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  831. host->swap_mode = DSI_COLOR_SWAP_RGB;
  832. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  833. host->swap_mode = DSI_COLOR_SWAP_RBG;
  834. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  835. host->swap_mode = DSI_COLOR_SWAP_BRG;
  836. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  837. host->swap_mode = DSI_COLOR_SWAP_GRB;
  838. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  839. host->swap_mode = DSI_COLOR_SWAP_GBR;
  840. } else {
  841. DSI_ERR("[%s] Unrecognized color order-%s\n",
  842. name, swap_mode);
  843. rc = -EINVAL;
  844. }
  845. } else {
  846. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  847. host->swap_mode = DSI_COLOR_SWAP_RGB;
  848. }
  849. /* bit swap on color channel is not defined in dt */
  850. host->bit_swap_red = false;
  851. host->bit_swap_green = false;
  852. host->bit_swap_blue = false;
  853. return rc;
  854. }
  855. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  856. struct dsi_parser_utils *utils,
  857. const char *name)
  858. {
  859. const char *trig;
  860. int rc = 0;
  861. trig = utils->get_property(utils->data,
  862. "qcom,mdss-dsi-mdp-trigger", NULL);
  863. if (trig) {
  864. if (!strcmp(trig, "none")) {
  865. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  866. } else if (!strcmp(trig, "trigger_te")) {
  867. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  868. } else if (!strcmp(trig, "trigger_sw")) {
  869. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  870. } else if (!strcmp(trig, "trigger_sw_te")) {
  871. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  872. } else {
  873. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  874. name, trig);
  875. rc = -EINVAL;
  876. }
  877. } else {
  878. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  879. name);
  880. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  881. }
  882. trig = utils->get_property(utils->data,
  883. "qcom,mdss-dsi-dma-trigger", NULL);
  884. if (trig) {
  885. if (!strcmp(trig, "none")) {
  886. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  887. } else if (!strcmp(trig, "trigger_te")) {
  888. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  889. } else if (!strcmp(trig, "trigger_sw")) {
  890. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  891. } else if (!strcmp(trig, "trigger_sw_seof")) {
  892. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  893. } else if (!strcmp(trig, "trigger_sw_te")) {
  894. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  895. } else {
  896. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  897. name, trig);
  898. rc = -EINVAL;
  899. }
  900. } else {
  901. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  902. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  903. }
  904. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  905. &host->te_mode);
  906. if (rc) {
  907. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  908. host->te_mode = 1;
  909. rc = 0;
  910. }
  911. return rc;
  912. }
  913. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  914. struct dsi_parser_utils *utils,
  915. const char *name)
  916. {
  917. u32 val = 0, line_no = 0, window = 0;
  918. int rc = 0;
  919. bool panel_cphy_mode = false;
  920. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  921. if (!rc) {
  922. host->t_clk_post = val;
  923. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  924. }
  925. val = 0;
  926. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  927. if (!rc) {
  928. host->t_clk_pre = val;
  929. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  930. }
  931. host->ignore_rx_eot = utils->read_bool(utils->data,
  932. "qcom,mdss-dsi-rx-eot-ignore");
  933. host->append_tx_eot = utils->read_bool(utils->data,
  934. "qcom,mdss-dsi-tx-eot-append");
  935. host->ext_bridge_mode = utils->read_bool(utils->data,
  936. "qcom,mdss-dsi-ext-bridge-mode");
  937. host->force_hs_clk_lane = utils->read_bool(utils->data,
  938. "qcom,mdss-dsi-force-clock-lane-hs");
  939. panel_cphy_mode = utils->read_bool(utils->data,
  940. "qcom,panel-cphy-mode");
  941. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  942. : DSI_PHY_TYPE_DPHY;
  943. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  944. &line_no);
  945. if (rc)
  946. host->dma_sched_line = 0;
  947. else
  948. host->dma_sched_line = line_no;
  949. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  950. &window);
  951. if (rc)
  952. host->dma_sched_window = 0;
  953. else
  954. host->dma_sched_window = window;
  955. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  956. host->dma_sched_line, host->dma_sched_window);
  957. return 0;
  958. }
  959. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  960. struct dsi_parser_utils *utils,
  961. const char *name)
  962. {
  963. int rc = 0;
  964. u32 val = 0;
  965. bool supported = false;
  966. struct dsi_split_link_config *split_link = &host->split_link;
  967. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  968. if (!supported) {
  969. DSI_DEBUG("[%s] Split link is not supported\n", name);
  970. split_link->enabled = false;
  971. return;
  972. }
  973. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  974. if (rc || val < 1) {
  975. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  976. split_link->num_sublinks = 2;
  977. } else {
  978. split_link->num_sublinks = val;
  979. }
  980. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  981. if (rc || val < 1) {
  982. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  983. split_link->lanes_per_sublink = 2;
  984. } else {
  985. split_link->lanes_per_sublink = val;
  986. }
  987. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  988. if (!supported)
  989. split_link->sublink_swap = false;
  990. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  991. split_link->num_sublinks, split_link->lanes_per_sublink);
  992. split_link->enabled = true;
  993. }
  994. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  995. {
  996. int rc = 0;
  997. struct dsi_parser_utils *utils = &panel->utils;
  998. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  999. panel->name);
  1000. if (rc) {
  1001. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1002. panel->name, rc);
  1003. goto error;
  1004. }
  1005. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1006. panel->name);
  1007. if (rc) {
  1008. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1009. panel->name, rc);
  1010. goto error;
  1011. }
  1012. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1013. panel->name);
  1014. if (rc) {
  1015. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1016. panel->name, rc);
  1017. goto error;
  1018. }
  1019. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1020. panel->name);
  1021. if (rc) {
  1022. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1023. panel->name, rc);
  1024. goto error;
  1025. }
  1026. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1027. panel->name);
  1028. if (rc) {
  1029. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1030. panel->name, rc);
  1031. goto error;
  1032. }
  1033. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1034. panel->name);
  1035. error:
  1036. return rc;
  1037. }
  1038. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1039. struct device_node *of_node)
  1040. {
  1041. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1042. struct dsi_parser_utils *utils = &panel->utils;
  1043. int val, rc = 0;
  1044. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1045. if (val <= 0) {
  1046. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1047. return rc;
  1048. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1049. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1050. val, panel->dfps_caps.dfps_list_len);
  1051. return -EINVAL;
  1052. }
  1053. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1054. if (!avr_caps->avr_step_fps_list)
  1055. return -ENOMEM;
  1056. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1057. avr_caps->avr_step_fps_list, val);
  1058. if (rc) {
  1059. kfree(avr_caps->avr_step_fps_list);
  1060. return rc;
  1061. }
  1062. avr_caps->avr_step_fps_list_len = val;
  1063. return rc;
  1064. }
  1065. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1066. struct device_node *of_node)
  1067. {
  1068. int rc = 0;
  1069. u32 val = 0, i;
  1070. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1071. struct dsi_parser_utils *utils = &panel->utils;
  1072. const char *name = panel->name;
  1073. /**
  1074. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1075. * video mode when there is only one qsync min fps present.
  1076. */
  1077. rc = of_property_read_u32(of_node,
  1078. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1079. &val);
  1080. if (rc)
  1081. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1082. panel->name, rc);
  1083. qsync_caps->qsync_min_fps = val;
  1084. /**
  1085. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1086. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1087. * is defined.
  1088. */
  1089. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1090. "qcom,dsi-supported-qsync-min-fps-list");
  1091. if (qsync_caps->qsync_min_fps_list_len < 1)
  1092. goto qsync_support;
  1093. /**
  1094. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1095. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1096. */
  1097. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1098. qsync_caps->qsync_min_fps) {
  1099. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1100. name);
  1101. rc = -EINVAL;
  1102. goto error;
  1103. }
  1104. if (panel->dfps_caps.dfps_list_len !=
  1105. qsync_caps->qsync_min_fps_list_len) {
  1106. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1107. rc = -EINVAL;
  1108. goto error;
  1109. }
  1110. qsync_caps->qsync_min_fps_list =
  1111. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1112. GFP_KERNEL);
  1113. if (!qsync_caps->qsync_min_fps_list) {
  1114. rc = -ENOMEM;
  1115. goto error;
  1116. }
  1117. rc = utils->read_u32_array(utils->data,
  1118. "qcom,dsi-supported-qsync-min-fps-list",
  1119. qsync_caps->qsync_min_fps_list,
  1120. qsync_caps->qsync_min_fps_list_len);
  1121. if (rc) {
  1122. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1123. rc = -EINVAL;
  1124. goto error;
  1125. }
  1126. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1127. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1128. if (qsync_caps->qsync_min_fps_list[i] <
  1129. qsync_caps->qsync_min_fps)
  1130. qsync_caps->qsync_min_fps =
  1131. qsync_caps->qsync_min_fps_list[i];
  1132. }
  1133. qsync_support:
  1134. /* allow qsync support only if DFPS is with VFP approach */
  1135. if ((panel->dfps_caps.dfps_support) &&
  1136. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1137. panel->qsync_caps.qsync_min_fps = 0;
  1138. error:
  1139. if (rc < 0) {
  1140. qsync_caps->qsync_min_fps = 0;
  1141. qsync_caps->qsync_min_fps_list_len = 0;
  1142. }
  1143. return rc;
  1144. }
  1145. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1146. struct dsi_parser_utils *utils)
  1147. {
  1148. int i, rc = 0;
  1149. struct dyn_clk_list *bit_clk_list;
  1150. if (!mode || !mode->priv_info) {
  1151. DSI_ERR("invalid arguments\n");
  1152. return -EINVAL;
  1153. }
  1154. bit_clk_list = &mode->priv_info->bit_clk_list;
  1155. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1156. if (bit_clk_list->count < 1)
  1157. return 0;
  1158. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1159. if (!bit_clk_list->rates) {
  1160. DSI_ERR("failed to allocate space for bit clock list\n");
  1161. return -ENOMEM;
  1162. }
  1163. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1164. bit_clk_list->rates, bit_clk_list->count);
  1165. if (rc) {
  1166. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1167. return -EINVAL;
  1168. }
  1169. for (i = 0; i < bit_clk_list->count; i++)
  1170. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1171. return 0;
  1172. }
  1173. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1174. {
  1175. int rc = 0;
  1176. bool supported = false;
  1177. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1178. struct dsi_parser_utils *utils = &panel->utils;
  1179. const char *type;
  1180. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1181. if (!supported) {
  1182. dyn_clk_caps->dyn_clk_support = false;
  1183. return rc;
  1184. }
  1185. dyn_clk_caps->dyn_clk_support = true;
  1186. type = utils->get_property(utils->data,
  1187. "qcom,dsi-dyn-clk-type", NULL);
  1188. if (!type) {
  1189. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1190. dyn_clk_caps->maintain_const_fps = false;
  1191. return 0;
  1192. }
  1193. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1194. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1195. dyn_clk_caps->maintain_const_fps = true;
  1196. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1197. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1198. dyn_clk_caps->maintain_const_fps = true;
  1199. } else {
  1200. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1201. dyn_clk_caps->maintain_const_fps = false;
  1202. }
  1203. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1204. return 0;
  1205. }
  1206. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1207. {
  1208. int rc = 0;
  1209. bool supported = false;
  1210. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1211. struct dsi_parser_utils *utils = &panel->utils;
  1212. const char *name = panel->name;
  1213. const char *type;
  1214. u32 i;
  1215. supported = utils->read_bool(utils->data,
  1216. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1217. if (!supported) {
  1218. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1219. dfps_caps->dfps_support = false;
  1220. return rc;
  1221. }
  1222. type = utils->get_property(utils->data,
  1223. "qcom,mdss-dsi-pan-fps-update", NULL);
  1224. if (!type) {
  1225. DSI_ERR("[%s] dfps type not defined\n", name);
  1226. rc = -EINVAL;
  1227. goto error;
  1228. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1229. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1230. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1231. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1232. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1233. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1234. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1235. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1236. } else {
  1237. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1238. rc = -EINVAL;
  1239. goto error;
  1240. }
  1241. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1242. "qcom,dsi-supported-dfps-list");
  1243. if (dfps_caps->dfps_list_len < 1) {
  1244. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1245. rc = -EINVAL;
  1246. goto error;
  1247. }
  1248. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1249. GFP_KERNEL);
  1250. if (!dfps_caps->dfps_list) {
  1251. rc = -ENOMEM;
  1252. goto error;
  1253. }
  1254. rc = utils->read_u32_array(utils->data,
  1255. "qcom,dsi-supported-dfps-list",
  1256. dfps_caps->dfps_list,
  1257. dfps_caps->dfps_list_len);
  1258. if (rc) {
  1259. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1260. rc = -EINVAL;
  1261. goto error;
  1262. }
  1263. dfps_caps->dfps_support = true;
  1264. /* calculate max and min fps */
  1265. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1266. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1267. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1268. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1269. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1270. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1271. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1272. }
  1273. error:
  1274. return rc;
  1275. }
  1276. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1277. struct dsi_parser_utils *utils,
  1278. const char *name)
  1279. {
  1280. int rc = 0;
  1281. const char *traffic_mode;
  1282. u32 vc_id = 0;
  1283. u32 val = 0;
  1284. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1285. if (rc) {
  1286. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1287. cfg->pulse_mode_hsa_he = false;
  1288. } else if (val == 1) {
  1289. cfg->pulse_mode_hsa_he = true;
  1290. } else if (val == 0) {
  1291. cfg->pulse_mode_hsa_he = false;
  1292. } else {
  1293. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1294. name);
  1295. rc = -EINVAL;
  1296. goto error;
  1297. }
  1298. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1299. "qcom,mdss-dsi-hfp-power-mode");
  1300. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1301. "qcom,mdss-dsi-hbp-power-mode");
  1302. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1303. "qcom,mdss-dsi-hsa-power-mode");
  1304. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1305. "qcom,mdss-dsi-last-line-interleave");
  1306. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1307. "qcom,mdss-dsi-bllp-eof-power-mode");
  1308. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1309. "qcom,mdss-dsi-bllp-power-mode");
  1310. traffic_mode = utils->get_property(utils->data,
  1311. "qcom,mdss-dsi-traffic-mode",
  1312. NULL);
  1313. if (!traffic_mode) {
  1314. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1315. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1316. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1317. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1318. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1319. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1320. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1321. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1322. } else {
  1323. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1324. traffic_mode);
  1325. rc = -EINVAL;
  1326. goto error;
  1327. }
  1328. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1329. &vc_id);
  1330. if (rc) {
  1331. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1332. cfg->vc_id = 0;
  1333. } else {
  1334. cfg->vc_id = vc_id;
  1335. }
  1336. error:
  1337. return rc;
  1338. }
  1339. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1340. struct dsi_parser_utils *utils,
  1341. const char *name)
  1342. {
  1343. u32 val = 0;
  1344. int rc = 0;
  1345. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1346. if (rc) {
  1347. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1348. cfg->wr_mem_start = 0x2C;
  1349. } else {
  1350. cfg->wr_mem_start = val;
  1351. }
  1352. val = 0;
  1353. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1354. &val);
  1355. if (rc) {
  1356. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1357. cfg->wr_mem_continue = 0x3C;
  1358. } else {
  1359. cfg->wr_mem_continue = val;
  1360. }
  1361. /* TODO: fix following */
  1362. cfg->max_cmd_packets_interleave = 0;
  1363. val = 0;
  1364. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1365. &val);
  1366. if (rc) {
  1367. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1368. cfg->insert_dcs_command = true;
  1369. } else if (val == 1) {
  1370. cfg->insert_dcs_command = true;
  1371. } else if (val == 0) {
  1372. cfg->insert_dcs_command = false;
  1373. } else {
  1374. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1375. name);
  1376. rc = -EINVAL;
  1377. goto error;
  1378. }
  1379. error:
  1380. return rc;
  1381. }
  1382. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1383. {
  1384. int rc = 0;
  1385. struct dsi_parser_utils *utils = &panel->utils;
  1386. bool panel_mode_switch_enabled;
  1387. enum dsi_op_mode panel_mode;
  1388. const char *mode;
  1389. mode = utils->get_property(utils->data,
  1390. "qcom,mdss-dsi-panel-type", NULL);
  1391. if (!mode) {
  1392. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1393. panel_mode = DSI_OP_VIDEO_MODE;
  1394. } else if (!strcmp(mode, "dsi_video_mode")) {
  1395. panel_mode = DSI_OP_VIDEO_MODE;
  1396. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1397. panel_mode = DSI_OP_CMD_MODE;
  1398. } else {
  1399. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1400. rc = -EINVAL;
  1401. goto error;
  1402. }
  1403. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1404. "qcom,mdss-dsi-panel-mode-switch");
  1405. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1406. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1407. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1408. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1409. utils,
  1410. panel->name);
  1411. if (rc) {
  1412. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1413. panel->name, rc);
  1414. goto error;
  1415. }
  1416. }
  1417. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1418. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1419. utils,
  1420. panel->name);
  1421. if (rc) {
  1422. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1423. panel->name, rc);
  1424. goto error;
  1425. }
  1426. }
  1427. panel->poms_align_vsync = utils->read_bool(utils->data,
  1428. "qcom,poms-align-panel-vsync");
  1429. panel->panel_mode = panel_mode;
  1430. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1431. error:
  1432. return rc;
  1433. }
  1434. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1435. {
  1436. int rc = 0;
  1437. u32 val = 0;
  1438. const char *str;
  1439. struct dsi_panel_phy_props *props = &panel->phy_props;
  1440. struct dsi_parser_utils *utils = &panel->utils;
  1441. const char *name = panel->name;
  1442. rc = utils->read_u32(utils->data,
  1443. "qcom,mdss-pan-physical-width-dimension", &val);
  1444. if (rc) {
  1445. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1446. props->panel_width_mm = 0;
  1447. rc = 0;
  1448. } else {
  1449. props->panel_width_mm = val;
  1450. }
  1451. rc = utils->read_u32(utils->data,
  1452. "qcom,mdss-pan-physical-height-dimension",
  1453. &val);
  1454. if (rc) {
  1455. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1456. props->panel_height_mm = 0;
  1457. rc = 0;
  1458. } else {
  1459. props->panel_height_mm = val;
  1460. }
  1461. str = utils->get_property(utils->data,
  1462. "qcom,mdss-dsi-panel-orientation", NULL);
  1463. if (!str) {
  1464. props->rotation = DSI_PANEL_ROTATE_NONE;
  1465. } else if (!strcmp(str, "180")) {
  1466. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1467. } else if (!strcmp(str, "hflip")) {
  1468. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1469. } else if (!strcmp(str, "vflip")) {
  1470. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1471. } else {
  1472. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1473. rc = -EINVAL;
  1474. goto error;
  1475. }
  1476. error:
  1477. return rc;
  1478. }
  1479. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1480. "qcom,mdss-dsi-pre-on-command",
  1481. "qcom,mdss-dsi-on-command",
  1482. "qcom,vid-on-commands",
  1483. "qcom,cmd-on-commands",
  1484. "qcom,mdss-dsi-post-panel-on-command",
  1485. "qcom,mdss-dsi-pre-off-command",
  1486. "qcom,mdss-dsi-off-command",
  1487. "qcom,mdss-dsi-post-off-command",
  1488. "qcom,mdss-dsi-pre-res-switch",
  1489. "qcom,mdss-dsi-res-switch",
  1490. "qcom,mdss-dsi-post-res-switch",
  1491. "qcom,video-mode-switch-in-commands",
  1492. "qcom,video-mode-switch-out-commands",
  1493. "qcom,cmd-mode-switch-in-commands",
  1494. "qcom,cmd-mode-switch-out-commands",
  1495. "qcom,mdss-dsi-panel-status-command",
  1496. "qcom,mdss-dsi-lp1-command",
  1497. "qcom,mdss-dsi-lp2-command",
  1498. "qcom,mdss-dsi-nolp-command",
  1499. "PPS not parsed from DTSI, generated dynamically",
  1500. "ROI not parsed from DTSI, generated dynamically",
  1501. "qcom,mdss-dsi-timing-switch-command",
  1502. "qcom,mdss-dsi-post-mode-switch-on-command",
  1503. "qcom,mdss-dsi-qsync-on-commands",
  1504. "qcom,mdss-dsi-qsync-off-commands",
  1505. };
  1506. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1507. "qcom,mdss-dsi-pre-on-command-state",
  1508. "qcom,mdss-dsi-on-command-state",
  1509. "qcom,vid-on-commands-state",
  1510. "qcom,cmd-on-commands-state",
  1511. "qcom,mdss-dsi-post-on-command-state",
  1512. "qcom,mdss-dsi-pre-off-command-state",
  1513. "qcom,mdss-dsi-off-command-state",
  1514. "qcom,mdss-dsi-post-off-command-state",
  1515. "qcom,mdss-dsi-pre-res-switch-state",
  1516. "qcom,mdss-dsi-res-switch-state",
  1517. "qcom,mdss-dsi-post-res-switch-state",
  1518. "qcom,video-mode-switch-in-commands-state",
  1519. "qcom,video-mode-switch-out-commands-state",
  1520. "qcom,cmd-mode-switch-in-commands-state",
  1521. "qcom,cmd-mode-switch-out-commands-state",
  1522. "qcom,mdss-dsi-panel-status-command-state",
  1523. "qcom,mdss-dsi-lp1-command-state",
  1524. "qcom,mdss-dsi-lp2-command-state",
  1525. "qcom,mdss-dsi-nolp-command-state",
  1526. "PPS not parsed from DTSI, generated dynamically",
  1527. "ROI not parsed from DTSI, generated dynamically",
  1528. "qcom,mdss-dsi-timing-switch-command-state",
  1529. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1530. "qcom,mdss-dsi-qsync-on-commands-state",
  1531. "qcom,mdss-dsi-qsync-off-commands-state",
  1532. };
  1533. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1534. {
  1535. const u32 cmd_set_min_size = 7;
  1536. u32 count = 0;
  1537. u32 packet_length;
  1538. u32 tmp;
  1539. while (length >= cmd_set_min_size) {
  1540. packet_length = cmd_set_min_size;
  1541. tmp = ((data[5] << 8) | (data[6]));
  1542. packet_length += tmp;
  1543. if (packet_length > length) {
  1544. DSI_ERR("format error\n");
  1545. return -EINVAL;
  1546. }
  1547. length -= packet_length;
  1548. data += packet_length;
  1549. count++;
  1550. }
  1551. *cnt = count;
  1552. return 0;
  1553. }
  1554. int dsi_panel_create_cmd_packets(const char *data,
  1555. u32 length,
  1556. u32 count,
  1557. struct dsi_cmd_desc *cmd)
  1558. {
  1559. int rc = 0;
  1560. int i, j;
  1561. u8 *payload;
  1562. for (i = 0; i < count; i++) {
  1563. u32 size;
  1564. cmd[i].msg.type = data[0];
  1565. cmd[i].msg.channel = data[2];
  1566. cmd[i].msg.flags |= data[3];
  1567. cmd[i].ctrl = 0;
  1568. cmd[i].post_wait_ms = data[4];
  1569. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1570. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1571. cmd[i].last_command = false;
  1572. else
  1573. cmd[i].last_command = true;
  1574. size = cmd[i].msg.tx_len * sizeof(u8);
  1575. payload = kzalloc(size, GFP_KERNEL);
  1576. if (!payload) {
  1577. rc = -ENOMEM;
  1578. goto error_free_payloads;
  1579. }
  1580. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1581. payload[j] = data[7 + j];
  1582. cmd[i].msg.tx_buf = payload;
  1583. data += (7 + cmd[i].msg.tx_len);
  1584. }
  1585. return rc;
  1586. error_free_payloads:
  1587. for (i = i - 1; i >= 0; i--) {
  1588. cmd--;
  1589. kfree(cmd->msg.tx_buf);
  1590. }
  1591. return rc;
  1592. }
  1593. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1594. {
  1595. u32 i = 0;
  1596. struct dsi_cmd_desc *cmd;
  1597. for (i = 0; i < set->count; i++) {
  1598. cmd = &set->cmds[i];
  1599. kfree(cmd->msg.tx_buf);
  1600. }
  1601. }
  1602. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1603. {
  1604. kfree(set->cmds);
  1605. }
  1606. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1607. u32 packet_count)
  1608. {
  1609. u32 size;
  1610. size = packet_count * sizeof(*cmd->cmds);
  1611. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1612. if (!cmd->cmds)
  1613. return -ENOMEM;
  1614. cmd->count = packet_count;
  1615. return 0;
  1616. }
  1617. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1618. enum dsi_cmd_set_type type,
  1619. struct dsi_parser_utils *utils)
  1620. {
  1621. int rc = 0;
  1622. u32 length = 0;
  1623. const char *data;
  1624. const char *state;
  1625. u32 packet_count = 0;
  1626. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1627. &length);
  1628. if (!data) {
  1629. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1630. rc = -ENOTSUPP;
  1631. goto error;
  1632. }
  1633. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1634. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1635. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1636. if (rc) {
  1637. DSI_ERR("commands failed, rc=%d\n", rc);
  1638. goto error;
  1639. }
  1640. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1641. packet_count, length);
  1642. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1643. if (rc) {
  1644. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1645. goto error;
  1646. }
  1647. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1648. cmd->cmds);
  1649. if (rc) {
  1650. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1651. goto error_free_mem;
  1652. }
  1653. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1654. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1655. cmd->state = DSI_CMD_SET_STATE_LP;
  1656. } else if (!strcmp(state, "dsi_hs_mode")) {
  1657. cmd->state = DSI_CMD_SET_STATE_HS;
  1658. } else {
  1659. DSI_ERR("[%s] command state unrecognized-%s\n",
  1660. cmd_set_state_map[type], state);
  1661. goto error_free_mem;
  1662. }
  1663. return rc;
  1664. error_free_mem:
  1665. kfree(cmd->cmds);
  1666. cmd->cmds = NULL;
  1667. error:
  1668. return rc;
  1669. }
  1670. static int dsi_panel_parse_cmd_sets(
  1671. struct dsi_display_mode_priv_info *priv_info,
  1672. struct dsi_parser_utils *utils)
  1673. {
  1674. int rc = 0;
  1675. struct dsi_panel_cmd_set *set;
  1676. u32 i;
  1677. if (!priv_info) {
  1678. DSI_ERR("invalid mode priv info\n");
  1679. return -EINVAL;
  1680. }
  1681. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1682. set = &priv_info->cmd_sets[i];
  1683. set->type = i;
  1684. set->count = 0;
  1685. if (i == DSI_CMD_SET_PPS) {
  1686. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1687. if (rc)
  1688. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1689. i, rc);
  1690. set->state = DSI_CMD_SET_STATE_LP;
  1691. } else {
  1692. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1693. if (rc)
  1694. DSI_DEBUG("failed to parse set %d\n", i);
  1695. }
  1696. }
  1697. rc = 0;
  1698. return rc;
  1699. }
  1700. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1701. {
  1702. int rc = 0;
  1703. int i;
  1704. u32 length = 0;
  1705. u32 count = 0;
  1706. u32 size = 0;
  1707. u32 *arr_32 = NULL;
  1708. const u32 *arr;
  1709. struct dsi_parser_utils *utils = &panel->utils;
  1710. struct dsi_reset_seq *seq;
  1711. if (panel->host_config.ext_bridge_mode)
  1712. return 0;
  1713. arr = utils->get_property(utils->data,
  1714. "qcom,mdss-dsi-reset-sequence", &length);
  1715. if (!arr) {
  1716. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1717. rc = -EINVAL;
  1718. goto error;
  1719. }
  1720. if (length & 0x1) {
  1721. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1722. panel->name);
  1723. rc = -EINVAL;
  1724. goto error;
  1725. }
  1726. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1727. length = length / sizeof(u32);
  1728. size = length * sizeof(u32);
  1729. arr_32 = kzalloc(size, GFP_KERNEL);
  1730. if (!arr_32) {
  1731. rc = -ENOMEM;
  1732. goto error;
  1733. }
  1734. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1735. arr_32, length);
  1736. if (rc) {
  1737. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1738. goto error_free_arr_32;
  1739. }
  1740. count = length / 2;
  1741. size = count * sizeof(*seq);
  1742. seq = kzalloc(size, GFP_KERNEL);
  1743. if (!seq) {
  1744. rc = -ENOMEM;
  1745. goto error_free_arr_32;
  1746. }
  1747. panel->reset_config.sequence = seq;
  1748. panel->reset_config.count = count;
  1749. for (i = 0; i < length; i += 2) {
  1750. seq->level = arr_32[i];
  1751. seq->sleep_ms = arr_32[i + 1];
  1752. seq++;
  1753. }
  1754. error_free_arr_32:
  1755. kfree(arr_32);
  1756. error:
  1757. return rc;
  1758. }
  1759. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1760. {
  1761. struct dsi_parser_utils *utils = &panel->utils;
  1762. const char *string;
  1763. int i, rc = 0;
  1764. panel->ulps_feature_enabled =
  1765. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1766. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1767. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1768. panel->ulps_suspend_enabled =
  1769. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1770. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1771. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1772. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1773. "qcom,mdss-dsi-te-using-wd");
  1774. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1775. "qcom,cmd-sync-wait-broadcast");
  1776. panel->lp11_init = utils->read_bool(utils->data,
  1777. "qcom,mdss-dsi-lp11-init");
  1778. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1779. "qcom,platform-reset-gpio-always-on");
  1780. panel->spr_info.enable = false;
  1781. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1782. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1783. if (!rc) {
  1784. // find match for pack-type string
  1785. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1786. if (msm_spr_pack_type_str[i] &&
  1787. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1788. panel->spr_info.enable = true;
  1789. panel->spr_info.pack_type = i;
  1790. break;
  1791. }
  1792. }
  1793. }
  1794. pr_debug("%s source side spr packing, pack-type %s\n",
  1795. panel->spr_info.enable ? "enable" : "disable",
  1796. panel->spr_info.enable ?
  1797. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1798. return 0;
  1799. }
  1800. static int dsi_panel_parse_jitter_config(
  1801. struct dsi_display_mode *mode,
  1802. struct dsi_parser_utils *utils)
  1803. {
  1804. int rc;
  1805. struct dsi_display_mode_priv_info *priv_info;
  1806. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1807. u64 jitter_val = 0;
  1808. priv_info = mode->priv_info;
  1809. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1810. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1811. if (rc) {
  1812. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1813. } else {
  1814. jitter_val = jitter[0];
  1815. jitter_val = div_u64(jitter_val, jitter[1]);
  1816. }
  1817. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1818. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1819. priv_info->panel_jitter_denom =
  1820. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1821. } else {
  1822. priv_info->panel_jitter_numer = jitter[0];
  1823. priv_info->panel_jitter_denom = jitter[1];
  1824. }
  1825. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1826. &priv_info->panel_prefill_lines);
  1827. if (rc) {
  1828. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1829. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1830. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1831. } else if (priv_info->panel_prefill_lines >=
  1832. DSI_V_TOTAL(&mode->timing)) {
  1833. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1834. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1835. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1836. }
  1837. return 0;
  1838. }
  1839. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1840. {
  1841. int rc = 0;
  1842. char *supply_name;
  1843. if (panel->host_config.ext_bridge_mode)
  1844. return 0;
  1845. if (!strcmp(panel->type, "primary"))
  1846. supply_name = "qcom,panel-supply-entries";
  1847. else
  1848. supply_name = "qcom,panel-sec-supply-entries";
  1849. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1850. &panel->power_info, supply_name);
  1851. if (rc) {
  1852. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1853. goto error;
  1854. }
  1855. error:
  1856. return rc;
  1857. }
  1858. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1859. struct msm_io_res *io_res)
  1860. {
  1861. struct list_head temp_head;
  1862. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1863. struct list_head *mem_list = &io_res->mem;
  1864. int i, rc = 0;
  1865. INIT_LIST_HEAD(&temp_head);
  1866. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1867. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1868. if (!io_mem) {
  1869. rc = -ENOMEM;
  1870. goto parse_fail;
  1871. }
  1872. io_mem->base = panel->tlmm_gpio[i].addr;
  1873. io_mem->size = panel->tlmm_gpio[i].size;
  1874. list_add(&io_mem->list, &temp_head);
  1875. }
  1876. list_splice(&temp_head, mem_list);
  1877. goto end;
  1878. parse_fail:
  1879. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1880. list_del(&pos->list);
  1881. kfree(pos);
  1882. }
  1883. end:
  1884. return rc;
  1885. }
  1886. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1887. {
  1888. int rc = 0;
  1889. const char *data;
  1890. struct dsi_parser_utils *utils = &panel->utils;
  1891. char *reset_gpio_name, *mode_set_gpio_name;
  1892. if (!strcmp(panel->type, "primary")) {
  1893. reset_gpio_name = "qcom,platform-reset-gpio";
  1894. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1895. } else {
  1896. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1897. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1898. }
  1899. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1900. reset_gpio_name, 0);
  1901. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1902. !panel->host_config.ext_bridge_mode) {
  1903. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1904. panel->reset_config.reset_gpio);
  1905. }
  1906. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1907. "qcom,5v-boost-gpio",
  1908. 0);
  1909. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1910. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1911. panel->name, rc);
  1912. panel->reset_config.disp_en_gpio =
  1913. utils->get_named_gpio(utils->data,
  1914. "qcom,platform-en-gpio", 0);
  1915. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1916. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1917. panel->name, rc);
  1918. }
  1919. }
  1920. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1921. utils->data, mode_set_gpio_name, 0);
  1922. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1923. DSI_DEBUG("mode gpio not specified\n");
  1924. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1925. data = utils->get_property(utils->data,
  1926. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1927. if (data) {
  1928. if (!strcmp(data, "single_port"))
  1929. panel->reset_config.mode_sel_state =
  1930. MODE_SEL_SINGLE_PORT;
  1931. else if (!strcmp(data, "dual_port"))
  1932. panel->reset_config.mode_sel_state =
  1933. MODE_SEL_DUAL_PORT;
  1934. else if (!strcmp(data, "high"))
  1935. panel->reset_config.mode_sel_state =
  1936. MODE_GPIO_HIGH;
  1937. else if (!strcmp(data, "low"))
  1938. panel->reset_config.mode_sel_state =
  1939. MODE_GPIO_LOW;
  1940. } else {
  1941. /* Set default mode as SPLIT mode */
  1942. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1943. }
  1944. /* TODO: release memory */
  1945. rc = dsi_panel_parse_reset_sequence(panel);
  1946. if (rc) {
  1947. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1948. panel->name, rc);
  1949. goto error;
  1950. }
  1951. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1952. "qcom,mdss-dsi-panel-test-pin",
  1953. 0);
  1954. if (!gpio_is_valid(panel->panel_test_gpio))
  1955. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1956. __LINE__);
  1957. error:
  1958. return rc;
  1959. }
  1960. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1961. {
  1962. struct dsi_parser_utils *utils = &panel->utils;
  1963. u32 base, size, pin;
  1964. int pin_count, address_count, name_count, i;
  1965. address_count = utils->count_u32_elems(utils->data,
  1966. "qcom,dsi-panel-gpio-address");
  1967. if (address_count != 2) {
  1968. DSI_DEBUG("panel gpio address not defined\n");
  1969. return 0;
  1970. }
  1971. utils->read_u32_index(utils->data,
  1972. "qcom,dsi-panel-gpio-address", 0, &base);
  1973. utils->read_u32_index(utils->data,
  1974. "qcom,dsi-panel-gpio-address", 1, &size);
  1975. pin_count = utils->count_u32_elems(utils->data,
  1976. "qcom,dsi-panel-gpio-pins");
  1977. name_count = utils->count_strings(utils->data,
  1978. "qcom,dsi-panel-gpio-names");
  1979. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1980. DSI_ERR("invalid gpio pins/names\n");
  1981. return -EINVAL;
  1982. }
  1983. panel->tlmm_gpio = kcalloc(pin_count,
  1984. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1985. if (!panel->tlmm_gpio)
  1986. return -ENOMEM;
  1987. panel->tlmm_gpio_count = pin_count;
  1988. for (i = 0; i < pin_count; i++) {
  1989. utils->read_u32_index(utils->data,
  1990. "qcom,dsi-panel-gpio-pins", i, &pin);
  1991. panel->tlmm_gpio[i].num = pin;
  1992. panel->tlmm_gpio[i].addr = base + (pin * size);
  1993. panel->tlmm_gpio[i].size = size;
  1994. utils->read_string_index(utils->data,
  1995. "qcom,dsi-panel-gpio-names", i,
  1996. &(panel->tlmm_gpio[i].name));
  1997. }
  1998. return 0;
  1999. }
  2000. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2001. {
  2002. int rc = 0;
  2003. u32 val;
  2004. struct dsi_backlight_config *config = &panel->bl_config;
  2005. struct dsi_parser_utils *utils = &panel->utils;
  2006. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2007. &val);
  2008. if (rc) {
  2009. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2010. goto error;
  2011. }
  2012. config->pwm_period_usecs = val;
  2013. error:
  2014. return rc;
  2015. }
  2016. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2017. {
  2018. int rc = 0;
  2019. u32 val = 0;
  2020. const char *bl_type = NULL;
  2021. const char *data = NULL;
  2022. const char *state = NULL;
  2023. struct dsi_parser_utils *utils = &panel->utils;
  2024. char *bl_name = NULL;
  2025. if (!strcmp(panel->type, "primary"))
  2026. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2027. else
  2028. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2029. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2030. if (!bl_type) {
  2031. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2032. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2033. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2034. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2035. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2036. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2037. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2038. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2039. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2040. } else {
  2041. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2042. panel->name, bl_type);
  2043. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2044. }
  2045. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2046. if (!data) {
  2047. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2048. } else if (!strcmp(data, "delay_until_first_frame")) {
  2049. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2050. } else {
  2051. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2052. panel->name, data);
  2053. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2054. }
  2055. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2056. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2057. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2058. if (rc) {
  2059. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2060. panel->name);
  2061. panel->bl_config.bl_min_level = 0;
  2062. } else {
  2063. panel->bl_config.bl_min_level = val;
  2064. }
  2065. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2066. if (rc) {
  2067. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2068. panel->name);
  2069. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2070. } else {
  2071. panel->bl_config.bl_max_level = val;
  2072. }
  2073. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2074. &val);
  2075. if (rc) {
  2076. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2077. panel->name);
  2078. panel->bl_config.brightness_max_level = 255;
  2079. rc = 0;
  2080. } else {
  2081. panel->bl_config.brightness_max_level = val;
  2082. }
  2083. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2084. "qcom,mdss-dsi-bl-inverted-dbv");
  2085. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2086. if (!state || !strcmp(state, "dsi_hs_mode"))
  2087. panel->bl_config.lp_mode = false;
  2088. else if (!strcmp(state, "dsi_lp_mode"))
  2089. panel->bl_config.lp_mode = true;
  2090. else
  2091. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2092. state);
  2093. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2094. rc = dsi_panel_parse_bl_pwm_config(panel);
  2095. if (rc) {
  2096. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2097. panel->name, rc);
  2098. goto error;
  2099. }
  2100. }
  2101. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2102. "qcom,platform-bklight-en-gpio",
  2103. 0);
  2104. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2105. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2106. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2107. panel->name, rc);
  2108. rc = -EPROBE_DEFER;
  2109. goto error;
  2110. } else {
  2111. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2112. panel->name, rc);
  2113. rc = 0;
  2114. goto error;
  2115. }
  2116. }
  2117. error:
  2118. return rc;
  2119. }
  2120. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2121. struct dsi_parser_utils *utils)
  2122. {
  2123. const char *data;
  2124. u32 len, i;
  2125. int rc = 0;
  2126. struct dsi_display_mode_priv_info *priv_info;
  2127. u64 pixel_clk_khz;
  2128. if (!mode || !mode->priv_info)
  2129. return -EINVAL;
  2130. priv_info = mode->priv_info;
  2131. data = utils->get_property(utils->data,
  2132. "qcom,mdss-dsi-panel-phy-timings", &len);
  2133. if (!data) {
  2134. DSI_DEBUG("Unable to read Phy timing settings\n");
  2135. } else {
  2136. priv_info->phy_timing_val =
  2137. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2138. if (!priv_info->phy_timing_val)
  2139. return -EINVAL;
  2140. for (i = 0; i < len; i++)
  2141. priv_info->phy_timing_val[i] = data[i];
  2142. priv_info->phy_timing_len = len;
  2143. }
  2144. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2145. /*
  2146. * For command mode we update the pclk as part of
  2147. * function dsi_panel_calc_dsi_transfer_time( )
  2148. * as we set it based on dsi clock or mdp transfer time.
  2149. */
  2150. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2151. DSI_V_TOTAL(&mode->timing) *
  2152. mode->timing.refresh_rate);
  2153. do_div(pixel_clk_khz, 1000);
  2154. mode->pixel_clk_khz = pixel_clk_khz;
  2155. }
  2156. return rc;
  2157. }
  2158. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2159. struct dsi_parser_utils *utils)
  2160. {
  2161. u32 data;
  2162. int rc = -EINVAL;
  2163. int intf_width;
  2164. const char *compression;
  2165. struct dsi_display_mode_priv_info *priv_info;
  2166. if (!mode || !mode->priv_info)
  2167. return -EINVAL;
  2168. priv_info = mode->priv_info;
  2169. priv_info->dsc_enabled = false;
  2170. compression = utils->get_property(utils->data,
  2171. "qcom,compression-mode", NULL);
  2172. if (compression && !strcmp(compression, "dsc"))
  2173. priv_info->dsc_enabled = true;
  2174. if (!priv_info->dsc_enabled) {
  2175. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2176. return 0;
  2177. }
  2178. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2179. if (rc) {
  2180. priv_info->dsc.config.dsc_version_major = 0x1;
  2181. priv_info->dsc.config.dsc_version_minor = 0x1;
  2182. rc = 0;
  2183. } else {
  2184. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2185. * major version information
  2186. */
  2187. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2188. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2189. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2190. ((priv_info->dsc.config.dsc_version_minor
  2191. != 0x1) &&
  2192. (priv_info->dsc.config.dsc_version_minor
  2193. != 0x2))) {
  2194. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2195. __func__,
  2196. priv_info->dsc.config.dsc_version_major,
  2197. priv_info->dsc.config.dsc_version_minor
  2198. );
  2199. rc = -EINVAL;
  2200. goto error;
  2201. }
  2202. }
  2203. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2204. if (rc) {
  2205. priv_info->dsc.scr_rev = 0x0;
  2206. rc = 0;
  2207. } else {
  2208. priv_info->dsc.scr_rev = data & 0xff;
  2209. /* only one scr rev supported */
  2210. if (priv_info->dsc.scr_rev > 0x1) {
  2211. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2212. __func__, priv_info->dsc.scr_rev);
  2213. rc = -EINVAL;
  2214. goto error;
  2215. }
  2216. }
  2217. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2218. if (rc) {
  2219. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2220. goto error;
  2221. }
  2222. priv_info->dsc.config.slice_height = data;
  2223. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2224. if (rc) {
  2225. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2226. goto error;
  2227. }
  2228. priv_info->dsc.config.slice_width = data;
  2229. intf_width = mode->timing.h_active;
  2230. if (intf_width % priv_info->dsc.config.slice_width) {
  2231. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2232. intf_width, priv_info->dsc.config.slice_width);
  2233. rc = -EINVAL;
  2234. goto error;
  2235. }
  2236. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2237. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2238. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2239. if (rc) {
  2240. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2241. goto error;
  2242. } else if (!data || (data > 2)) {
  2243. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2244. goto error;
  2245. }
  2246. priv_info->dsc.slice_per_pkt = data;
  2247. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2248. &data);
  2249. if (rc) {
  2250. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2251. goto error;
  2252. }
  2253. priv_info->dsc.config.bits_per_component = data;
  2254. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2255. if (rc) {
  2256. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2257. data = 0;
  2258. }
  2259. priv_info->dsc.pps_delay_ms = data;
  2260. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2261. &data);
  2262. if (rc) {
  2263. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2264. goto error;
  2265. }
  2266. priv_info->dsc.config.bits_per_pixel = data << 4;
  2267. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2268. &data);
  2269. if (rc) {
  2270. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2271. rc = 0;
  2272. data = MSM_CHROMA_444;
  2273. }
  2274. priv_info->dsc.chroma_format = data;
  2275. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2276. &data);
  2277. if (rc) {
  2278. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2279. rc = 0;
  2280. data = MSM_RGB;
  2281. }
  2282. priv_info->dsc.source_color_space = data;
  2283. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2284. "qcom,mdss-dsc-block-prediction-enable");
  2285. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2286. priv_info->dsc.config.slice_width);
  2287. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2288. priv_info->dsc.scr_rev);
  2289. if (rc) {
  2290. DSI_DEBUG("failed populating dsc params\n");
  2291. rc = -EINVAL;
  2292. goto error;
  2293. }
  2294. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2295. if (rc) {
  2296. DSI_DEBUG("failed populating other dsc params\n");
  2297. rc = -EINVAL;
  2298. goto error;
  2299. }
  2300. priv_info->pclk_scale.numer =
  2301. priv_info->dsc.config.bits_per_pixel >> 4;
  2302. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2303. priv_info->dsc.chroma_format,
  2304. priv_info->dsc.config.bits_per_component);
  2305. mode->timing.dsc_enabled = true;
  2306. mode->timing.dsc = &priv_info->dsc;
  2307. mode->timing.pclk_scale = priv_info->pclk_scale;
  2308. error:
  2309. return rc;
  2310. }
  2311. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2312. struct dsi_parser_utils *utils, int traffic_mode)
  2313. {
  2314. u32 data;
  2315. int rc = -EINVAL;
  2316. const char *compression;
  2317. struct dsi_display_mode_priv_info *priv_info;
  2318. int intf_width;
  2319. if (!mode || !mode->priv_info)
  2320. return -EINVAL;
  2321. priv_info = mode->priv_info;
  2322. priv_info->vdc_enabled = false;
  2323. compression = utils->get_property(utils->data,
  2324. "qcom,compression-mode", NULL);
  2325. if (compression && !strcmp(compression, "vdc"))
  2326. priv_info->vdc_enabled = true;
  2327. if (!priv_info->vdc_enabled) {
  2328. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2329. return 0;
  2330. }
  2331. priv_info->vdc.traffic_mode = traffic_mode;
  2332. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2333. if (rc) {
  2334. priv_info->vdc.version_major = 0x1;
  2335. priv_info->vdc.version_minor = 0x2;
  2336. priv_info->vdc.version_release = 0x0;
  2337. rc = 0;
  2338. } else {
  2339. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2340. * major version information
  2341. */
  2342. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2343. priv_info->vdc.version_minor = data & 0x0F;
  2344. if ((priv_info->vdc.version_major != 0x1) &&
  2345. ((priv_info->vdc.version_minor
  2346. != 0x2))) {
  2347. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2348. __func__,
  2349. priv_info->vdc.version_major,
  2350. priv_info->vdc.version_minor
  2351. );
  2352. rc = -EINVAL;
  2353. goto error;
  2354. }
  2355. }
  2356. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2357. if (rc) {
  2358. priv_info->vdc.version_release = 0x0;
  2359. rc = 0;
  2360. } else {
  2361. priv_info->vdc.version_release = data & 0xff;
  2362. /* only one release version is supported */
  2363. if (priv_info->vdc.version_release != 0x0) {
  2364. DSI_ERR("unsupported vdc release version %d\n",
  2365. priv_info->vdc.version_release);
  2366. rc = -EINVAL;
  2367. goto error;
  2368. }
  2369. }
  2370. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2371. priv_info->vdc.version_major,
  2372. priv_info->vdc.version_minor,
  2373. priv_info->vdc.version_release);
  2374. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2375. if (rc) {
  2376. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2377. goto error;
  2378. }
  2379. priv_info->vdc.slice_height = data;
  2380. /* slice height should be atleast 16 lines */
  2381. if (priv_info->vdc.slice_height < 16) {
  2382. DSI_ERR("invalid slice height %d\n",
  2383. priv_info->vdc.slice_height);
  2384. rc = -EINVAL;
  2385. goto error;
  2386. }
  2387. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2388. if (rc) {
  2389. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2390. goto error;
  2391. }
  2392. priv_info->vdc.slice_width = data;
  2393. /*
  2394. * slide-width should be multiple of 8
  2395. * slice-width should be atlease 64 pixels
  2396. */
  2397. if ((priv_info->vdc.slice_width & 7) ||
  2398. (priv_info->vdc.slice_width < 64)) {
  2399. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2400. rc = -EINVAL;
  2401. goto error;
  2402. }
  2403. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2404. if (rc) {
  2405. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2406. goto error;
  2407. } else if (!data || (data > 2)) {
  2408. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2409. rc = -EINVAL;
  2410. goto error;
  2411. }
  2412. intf_width = mode->timing.h_active;
  2413. priv_info->vdc.slice_per_pkt = data;
  2414. priv_info->vdc.frame_width = mode->timing.h_active;
  2415. priv_info->vdc.frame_height = mode->timing.v_active;
  2416. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2417. &data);
  2418. if (rc) {
  2419. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2420. goto error;
  2421. }
  2422. priv_info->vdc.bits_per_component = data;
  2423. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2424. if (rc) {
  2425. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2426. data = 0;
  2427. }
  2428. priv_info->vdc.pps_delay_ms = data;
  2429. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2430. &data);
  2431. if (rc) {
  2432. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2433. goto error;
  2434. }
  2435. priv_info->vdc.bits_per_pixel = data << 4;
  2436. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2437. &data);
  2438. if (rc) {
  2439. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2440. rc = 0;
  2441. data = MSM_CHROMA_444;
  2442. }
  2443. priv_info->vdc.chroma_format = data;
  2444. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2445. &data);
  2446. if (rc) {
  2447. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2448. rc = 0;
  2449. data = MSM_RGB;
  2450. }
  2451. priv_info->vdc.source_color_space = data;
  2452. rc = sde_vdc_populate_config(&priv_info->vdc,
  2453. intf_width, traffic_mode);
  2454. if (rc) {
  2455. DSI_DEBUG("failed populating vdc config\n");
  2456. rc = -EINVAL;
  2457. goto error;
  2458. }
  2459. priv_info->pclk_scale.numer =
  2460. priv_info->vdc.bits_per_pixel >> 4;
  2461. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2462. priv_info->vdc.chroma_format,
  2463. priv_info->vdc.bits_per_component);
  2464. mode->timing.vdc_enabled = true;
  2465. mode->timing.vdc = &priv_info->vdc;
  2466. mode->timing.pclk_scale = priv_info->pclk_scale;
  2467. error:
  2468. return rc;
  2469. }
  2470. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2471. {
  2472. int rc = 0;
  2473. struct drm_panel_hdr_properties *hdr_prop;
  2474. struct dsi_parser_utils *utils = &panel->utils;
  2475. hdr_prop = &panel->hdr_props;
  2476. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2477. "qcom,mdss-dsi-panel-hdr-enabled");
  2478. if (hdr_prop->hdr_enabled) {
  2479. rc = utils->read_u32_array(utils->data,
  2480. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2481. hdr_prop->display_primaries,
  2482. DISPLAY_PRIMARIES_MAX);
  2483. if (rc) {
  2484. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2485. __func__, __LINE__, rc);
  2486. hdr_prop->hdr_enabled = false;
  2487. return rc;
  2488. }
  2489. rc = utils->read_u32(utils->data,
  2490. "qcom,mdss-dsi-panel-peak-brightness",
  2491. &(hdr_prop->peak_brightness));
  2492. if (rc) {
  2493. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2494. __func__, __LINE__, rc);
  2495. hdr_prop->hdr_enabled = false;
  2496. return rc;
  2497. }
  2498. rc = utils->read_u32(utils->data,
  2499. "qcom,mdss-dsi-panel-blackness-level",
  2500. &(hdr_prop->blackness_level));
  2501. if (rc) {
  2502. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2503. __func__, __LINE__, rc);
  2504. hdr_prop->hdr_enabled = false;
  2505. return rc;
  2506. }
  2507. }
  2508. return 0;
  2509. }
  2510. static int dsi_panel_parse_topology(
  2511. struct dsi_display_mode_priv_info *priv_info,
  2512. struct dsi_parser_utils *utils,
  2513. int topology_override)
  2514. {
  2515. struct msm_display_topology *topology;
  2516. u32 top_count, top_sel, *array = NULL;
  2517. int i, len = 0;
  2518. int rc = -EINVAL;
  2519. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2520. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2521. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2522. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2523. return rc;
  2524. }
  2525. top_count = len / TOPOLOGY_SET_LEN;
  2526. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2527. if (!array)
  2528. return -ENOMEM;
  2529. rc = utils->read_u32_array(utils->data,
  2530. "qcom,display-topology", array, len);
  2531. if (rc) {
  2532. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2533. goto read_fail;
  2534. }
  2535. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2536. if (!topology) {
  2537. rc = -ENOMEM;
  2538. goto read_fail;
  2539. }
  2540. for (i = 0; i < top_count; i++) {
  2541. struct msm_display_topology *top = &topology[i];
  2542. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2543. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2544. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2545. }
  2546. if (topology_override >= 0 && topology_override < top_count) {
  2547. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2548. topology_override,
  2549. topology[topology_override].num_lm,
  2550. topology[topology_override].num_enc,
  2551. topology[topology_override].num_intf);
  2552. top_sel = topology_override;
  2553. goto parse_done;
  2554. }
  2555. rc = utils->read_u32(utils->data,
  2556. "qcom,default-topology-index", &top_sel);
  2557. if (rc) {
  2558. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2559. goto parse_fail;
  2560. }
  2561. if (top_sel >= top_count) {
  2562. rc = -EINVAL;
  2563. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2564. rc);
  2565. goto parse_fail;
  2566. }
  2567. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2568. !topology[top_sel].num_enc) {
  2569. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2570. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2571. topology[top_sel].num_enc);
  2572. goto parse_fail;
  2573. }
  2574. if (priv_info->dsc_enabled)
  2575. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2576. else if (priv_info->vdc_enabled)
  2577. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2578. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2579. topology[top_sel].num_lm,
  2580. topology[top_sel].num_enc,
  2581. topology[top_sel].num_intf);
  2582. parse_done:
  2583. memcpy(&priv_info->topology, &topology[top_sel],
  2584. sizeof(struct msm_display_topology));
  2585. parse_fail:
  2586. kfree(topology);
  2587. read_fail:
  2588. kfree(array);
  2589. return rc;
  2590. }
  2591. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2592. struct msm_roi_alignment *align)
  2593. {
  2594. int len = 0, rc = 0;
  2595. u32 value[6];
  2596. struct property *data;
  2597. if (!align)
  2598. return -EINVAL;
  2599. memset(align, 0, sizeof(*align));
  2600. data = utils->find_property(utils->data,
  2601. "qcom,panel-roi-alignment", &len);
  2602. len /= sizeof(u32);
  2603. if (!data) {
  2604. DSI_ERR("panel roi alignment not found\n");
  2605. rc = -EINVAL;
  2606. } else if (len != 6) {
  2607. DSI_ERR("incorrect roi alignment len %d\n", len);
  2608. rc = -EINVAL;
  2609. } else {
  2610. rc = utils->read_u32_array(utils->data,
  2611. "qcom,panel-roi-alignment", value, len);
  2612. if (rc)
  2613. DSI_DEBUG("error reading panel roi alignment values\n");
  2614. else {
  2615. align->xstart_pix_align = value[0];
  2616. align->ystart_pix_align = value[1];
  2617. align->width_pix_align = value[2];
  2618. align->height_pix_align = value[3];
  2619. align->min_width = value[4];
  2620. align->min_height = value[5];
  2621. }
  2622. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2623. align->xstart_pix_align,
  2624. align->width_pix_align,
  2625. align->ystart_pix_align,
  2626. align->height_pix_align,
  2627. align->min_width,
  2628. align->min_height);
  2629. }
  2630. return rc;
  2631. }
  2632. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2633. struct dsi_parser_utils *utils)
  2634. {
  2635. struct msm_roi_caps *roi_caps = NULL;
  2636. const char *data;
  2637. int rc = 0;
  2638. if (!mode || !mode->priv_info) {
  2639. DSI_ERR("invalid arguments\n");
  2640. return -EINVAL;
  2641. }
  2642. roi_caps = &mode->priv_info->roi_caps;
  2643. memset(roi_caps, 0, sizeof(*roi_caps));
  2644. data = utils->get_property(utils->data,
  2645. "qcom,partial-update-enabled", NULL);
  2646. if (data) {
  2647. if (!strcmp(data, "dual_roi"))
  2648. roi_caps->num_roi = 2;
  2649. else if (!strcmp(data, "single_roi"))
  2650. roi_caps->num_roi = 1;
  2651. else {
  2652. DSI_INFO(
  2653. "invalid value for qcom,partial-update-enabled: %s\n",
  2654. data);
  2655. return 0;
  2656. }
  2657. } else {
  2658. DSI_DEBUG("partial update disabled as the property is not set\n");
  2659. return 0;
  2660. }
  2661. roi_caps->merge_rois = utils->read_bool(utils->data,
  2662. "qcom,partial-update-roi-merge");
  2663. roi_caps->enabled = roi_caps->num_roi > 0;
  2664. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2665. roi_caps->enabled);
  2666. if (roi_caps->enabled)
  2667. rc = dsi_panel_parse_roi_alignment(utils,
  2668. &roi_caps->align);
  2669. if (rc)
  2670. memset(roi_caps, 0, sizeof(*roi_caps));
  2671. return rc;
  2672. }
  2673. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2674. struct dsi_parser_utils *utils)
  2675. {
  2676. if (!mode || !mode->priv_info) {
  2677. DSI_ERR("invalid arguments\n");
  2678. return false;
  2679. }
  2680. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2681. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2682. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2683. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2684. if (!mode->panel_mode_caps)
  2685. return false;
  2686. return true;
  2687. };
  2688. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2689. {
  2690. int dms_enabled;
  2691. const char *data;
  2692. struct dsi_parser_utils *utils = &panel->utils;
  2693. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2694. dms_enabled = utils->read_bool(utils->data,
  2695. "qcom,dynamic-mode-switch-enabled");
  2696. if (!dms_enabled)
  2697. return 0;
  2698. data = utils->get_property(utils->data,
  2699. "qcom,dynamic-mode-switch-type", NULL);
  2700. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2701. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2702. } else {
  2703. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2704. panel->name, data);
  2705. return -EINVAL;
  2706. }
  2707. return 0;
  2708. };
  2709. /*
  2710. * The length of all the valid values to be checked should not be greater
  2711. * than the length of returned data from read command.
  2712. */
  2713. static bool
  2714. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2715. {
  2716. int i;
  2717. struct drm_panel_esd_config *config = &panel->esd_config;
  2718. for (i = 0; i < count; ++i) {
  2719. if (config->status_valid_params[i] >
  2720. config->status_cmds_rlen[i]) {
  2721. DSI_DEBUG("ignore valid params\n");
  2722. return false;
  2723. }
  2724. }
  2725. return true;
  2726. }
  2727. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2728. char *prop_key, u32 **target, u32 cmd_cnt)
  2729. {
  2730. int tmp;
  2731. if (!utils->find_property(utils->data, prop_key, &tmp))
  2732. return false;
  2733. tmp /= sizeof(u32);
  2734. if (tmp != cmd_cnt) {
  2735. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2736. tmp, cmd_cnt);
  2737. return false;
  2738. }
  2739. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2740. if (IS_ERR_OR_NULL(*target)) {
  2741. DSI_ERR("Error allocating memory for property\n");
  2742. return false;
  2743. }
  2744. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2745. DSI_ERR("cannot get values from dts\n");
  2746. kfree(*target);
  2747. *target = NULL;
  2748. return false;
  2749. }
  2750. return true;
  2751. }
  2752. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2753. {
  2754. kfree(esd_config->status_buf);
  2755. kfree(esd_config->return_buf);
  2756. kfree(esd_config->status_value);
  2757. kfree(esd_config->status_valid_params);
  2758. kfree(esd_config->status_cmds_rlen);
  2759. kfree(esd_config->status_cmd.cmds);
  2760. }
  2761. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2762. {
  2763. struct drm_panel_esd_config *esd_config;
  2764. int rc = 0;
  2765. u32 tmp;
  2766. u32 i, status_len, *lenp;
  2767. struct property *data;
  2768. struct dsi_parser_utils *utils = &panel->utils;
  2769. if (!panel) {
  2770. DSI_ERR("Invalid Params\n");
  2771. return -EINVAL;
  2772. }
  2773. esd_config = &panel->esd_config;
  2774. if (!esd_config)
  2775. return -EINVAL;
  2776. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2777. DSI_CMD_SET_PANEL_STATUS, utils);
  2778. if (!esd_config->status_cmd.count) {
  2779. DSI_ERR("panel status command parsing failed\n");
  2780. rc = -EINVAL;
  2781. goto error;
  2782. }
  2783. if (!dsi_panel_parse_esd_status_len(utils,
  2784. "qcom,mdss-dsi-panel-status-read-length",
  2785. &panel->esd_config.status_cmds_rlen,
  2786. esd_config->status_cmd.count)) {
  2787. DSI_ERR("Invalid status read length\n");
  2788. rc = -EINVAL;
  2789. goto error1;
  2790. }
  2791. if (dsi_panel_parse_esd_status_len(utils,
  2792. "qcom,mdss-dsi-panel-status-valid-params",
  2793. &panel->esd_config.status_valid_params,
  2794. esd_config->status_cmd.count)) {
  2795. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2796. esd_config->status_cmd.count)) {
  2797. rc = -EINVAL;
  2798. goto error2;
  2799. }
  2800. }
  2801. status_len = 0;
  2802. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2803. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2804. status_len += lenp[i];
  2805. if (!status_len) {
  2806. rc = -EINVAL;
  2807. goto error2;
  2808. }
  2809. /*
  2810. * Some panel may need multiple read commands to properly
  2811. * check panel status. Do a sanity check for proper status
  2812. * value which will be compared with the value read by dsi
  2813. * controller during ESD check. Also check if multiple read
  2814. * commands are there then, there should be corresponding
  2815. * status check values for each read command.
  2816. */
  2817. data = utils->find_property(utils->data,
  2818. "qcom,mdss-dsi-panel-status-value", &tmp);
  2819. tmp /= sizeof(u32);
  2820. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2821. esd_config->groups = tmp / status_len;
  2822. } else {
  2823. DSI_ERR("error parse panel-status-value\n");
  2824. rc = -EINVAL;
  2825. goto error2;
  2826. }
  2827. esd_config->status_value =
  2828. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2829. GFP_KERNEL);
  2830. if (!esd_config->status_value) {
  2831. rc = -ENOMEM;
  2832. goto error2;
  2833. }
  2834. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2835. sizeof(unsigned char), GFP_KERNEL);
  2836. if (!esd_config->return_buf) {
  2837. rc = -ENOMEM;
  2838. goto error3;
  2839. }
  2840. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2841. if (!esd_config->status_buf) {
  2842. rc = -ENOMEM;
  2843. goto error4;
  2844. }
  2845. rc = utils->read_u32_array(utils->data,
  2846. "qcom,mdss-dsi-panel-status-value",
  2847. esd_config->status_value, esd_config->groups * status_len);
  2848. if (rc) {
  2849. DSI_DEBUG("error reading panel status values\n");
  2850. memset(esd_config->status_value, 0,
  2851. esd_config->groups * status_len);
  2852. }
  2853. return 0;
  2854. error4:
  2855. kfree(esd_config->return_buf);
  2856. error3:
  2857. kfree(esd_config->status_value);
  2858. error2:
  2859. kfree(esd_config->status_valid_params);
  2860. kfree(esd_config->status_cmds_rlen);
  2861. error1:
  2862. kfree(esd_config->status_cmd.cmds);
  2863. error:
  2864. return rc;
  2865. }
  2866. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2867. {
  2868. int rc = 0;
  2869. const char *string;
  2870. struct drm_panel_esd_config *esd_config;
  2871. struct dsi_parser_utils *utils = &panel->utils;
  2872. u8 *esd_mode = NULL;
  2873. esd_config = &panel->esd_config;
  2874. esd_config->status_mode = ESD_MODE_MAX;
  2875. esd_config->esd_enabled = utils->read_bool(utils->data,
  2876. "qcom,esd-check-enabled");
  2877. if (!esd_config->esd_enabled)
  2878. return 0;
  2879. rc = utils->read_string(utils->data,
  2880. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2881. if (!rc) {
  2882. if (!strcmp(string, "bta_check")) {
  2883. esd_config->status_mode = ESD_MODE_SW_BTA;
  2884. } else if (!strcmp(string, "reg_read")) {
  2885. esd_config->status_mode = ESD_MODE_REG_READ;
  2886. } else if (!strcmp(string, "te_signal_check")) {
  2887. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2888. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2889. } else {
  2890. DSI_ERR("TE-ESD not valid for video mode\n");
  2891. rc = -EINVAL;
  2892. goto error;
  2893. }
  2894. } else {
  2895. DSI_ERR("No valid panel-status-check-mode string\n");
  2896. rc = -EINVAL;
  2897. goto error;
  2898. }
  2899. } else {
  2900. DSI_DEBUG("status check method not defined!\n");
  2901. rc = -EINVAL;
  2902. goto error;
  2903. }
  2904. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2905. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2906. if (rc) {
  2907. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2908. rc);
  2909. goto error;
  2910. }
  2911. esd_mode = "register_read";
  2912. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2913. esd_mode = "bta_trigger";
  2914. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2915. esd_mode = "te_check";
  2916. }
  2917. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2918. return 0;
  2919. error:
  2920. panel->esd_config.esd_enabled = false;
  2921. return rc;
  2922. }
  2923. static void dsi_panel_update_util(struct dsi_panel *panel,
  2924. struct device_node *parser_node)
  2925. {
  2926. struct dsi_parser_utils *utils = &panel->utils;
  2927. if (parser_node) {
  2928. *utils = *dsi_parser_get_parser_utils();
  2929. utils->data = parser_node;
  2930. DSI_DEBUG("switching to parser APIs\n");
  2931. goto end;
  2932. }
  2933. *utils = *dsi_parser_get_of_utils();
  2934. utils->data = panel->panel_of_node;
  2935. end:
  2936. utils->node = panel->panel_of_node;
  2937. }
  2938. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2939. {
  2940. return 0;
  2941. }
  2942. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2943. {
  2944. if (trusted_vm_env) {
  2945. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2946. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2947. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2948. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2949. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2950. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2951. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2952. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2953. } else {
  2954. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2955. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2956. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2957. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2958. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2959. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2960. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2961. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2962. }
  2963. }
  2964. struct dsi_panel *dsi_panel_get(struct device *parent,
  2965. struct device_node *of_node,
  2966. struct device_node *parser_node,
  2967. const char *type,
  2968. int topology_override,
  2969. bool trusted_vm_env)
  2970. {
  2971. struct dsi_panel *panel;
  2972. struct dsi_parser_utils *utils;
  2973. const char *panel_physical_type;
  2974. int rc = 0;
  2975. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2976. if (!panel)
  2977. return ERR_PTR(-ENOMEM);
  2978. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2979. panel->panel_of_node = of_node;
  2980. panel->parent = parent;
  2981. panel->type = type;
  2982. dsi_panel_update_util(panel, parser_node);
  2983. utils = &panel->utils;
  2984. panel->name = utils->get_property(utils->data,
  2985. "qcom,mdss-dsi-panel-name", NULL);
  2986. if (!panel->name)
  2987. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2988. /*
  2989. * Set panel type to LCD as default.
  2990. */
  2991. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2992. panel_physical_type = utils->get_property(utils->data,
  2993. "qcom,mdss-dsi-panel-physical-type", NULL);
  2994. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2995. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2996. rc = dsi_panel_parse_host_config(panel);
  2997. if (rc) {
  2998. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2999. rc);
  3000. goto error;
  3001. }
  3002. rc = dsi_panel_parse_panel_mode(panel);
  3003. if (rc) {
  3004. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3005. rc);
  3006. goto error;
  3007. }
  3008. rc = dsi_panel_parse_dfps_caps(panel);
  3009. if (rc)
  3010. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3011. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3012. if (rc)
  3013. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3014. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3015. if (rc)
  3016. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3017. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3018. if (rc)
  3019. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3020. rc = dsi_panel_parse_phy_props(panel);
  3021. if (rc) {
  3022. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3023. rc);
  3024. goto error;
  3025. }
  3026. rc = panel->panel_ops.parse_gpios(panel);
  3027. if (rc) {
  3028. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3029. goto error;
  3030. }
  3031. rc = dsi_panel_parse_tlmm_gpio(panel);
  3032. if (rc) {
  3033. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  3034. goto error;
  3035. }
  3036. rc = panel->panel_ops.parse_power_cfg(panel);
  3037. if (rc)
  3038. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3039. rc = dsi_panel_parse_bl_config(panel);
  3040. if (rc) {
  3041. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3042. if (rc == -EPROBE_DEFER)
  3043. goto error;
  3044. }
  3045. rc = dsi_panel_parse_misc_features(panel);
  3046. if (rc)
  3047. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3048. rc = dsi_panel_parse_hdr_config(panel);
  3049. if (rc)
  3050. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3051. rc = dsi_panel_get_mode_count(panel);
  3052. if (rc) {
  3053. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3054. goto error;
  3055. }
  3056. rc = dsi_panel_parse_dms_info(panel);
  3057. if (rc)
  3058. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3059. rc = dsi_panel_parse_esd_config(panel);
  3060. if (rc)
  3061. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3062. rc = dsi_panel_vreg_get(panel);
  3063. if (rc) {
  3064. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3065. panel->name, rc);
  3066. goto error;
  3067. }
  3068. panel->power_mode = SDE_MODE_DPMS_OFF;
  3069. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3070. NULL, DRM_MODE_CONNECTOR_DSI);
  3071. panel->mipi_device.dev.of_node = of_node;
  3072. drm_panel_add(&panel->drm_panel);
  3073. mutex_init(&panel->panel_lock);
  3074. return panel;
  3075. error:
  3076. kfree(panel);
  3077. return ERR_PTR(rc);
  3078. }
  3079. void dsi_panel_put(struct dsi_panel *panel)
  3080. {
  3081. drm_panel_remove(&panel->drm_panel);
  3082. /* free resources allocated for ESD check */
  3083. dsi_panel_esd_config_deinit(&panel->esd_config);
  3084. kfree(panel->avr_caps.avr_step_fps_list);
  3085. kfree(panel);
  3086. }
  3087. int dsi_panel_drv_init(struct dsi_panel *panel,
  3088. struct mipi_dsi_host *host)
  3089. {
  3090. int rc = 0;
  3091. struct mipi_dsi_device *dev;
  3092. if (!panel || !host) {
  3093. DSI_ERR("invalid params\n");
  3094. return -EINVAL;
  3095. }
  3096. mutex_lock(&panel->panel_lock);
  3097. dev = &panel->mipi_device;
  3098. dev->host = host;
  3099. /*
  3100. * We dont have device structure since panel is not a device node.
  3101. * When using drm panel framework, the device is probed when the host is
  3102. * create.
  3103. */
  3104. dev->channel = 0;
  3105. dev->lanes = 4;
  3106. panel->host = host;
  3107. rc = panel->panel_ops.pinctrl_init(panel);
  3108. if (rc) {
  3109. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3110. panel->name, rc);
  3111. goto exit;
  3112. }
  3113. rc = panel->panel_ops.gpio_request(panel);
  3114. if (rc) {
  3115. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3116. rc);
  3117. goto error_pinctrl_deinit;
  3118. }
  3119. rc = panel->panel_ops.bl_register(panel);
  3120. if (rc) {
  3121. if (rc != -EPROBE_DEFER)
  3122. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3123. panel->name, rc);
  3124. goto error_gpio_release;
  3125. }
  3126. goto exit;
  3127. error_gpio_release:
  3128. (void)dsi_panel_gpio_release(panel);
  3129. error_pinctrl_deinit:
  3130. (void)dsi_panel_pinctrl_deinit(panel);
  3131. exit:
  3132. mutex_unlock(&panel->panel_lock);
  3133. return rc;
  3134. }
  3135. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3136. {
  3137. int rc = 0;
  3138. if (!panel) {
  3139. DSI_ERR("invalid params\n");
  3140. return -EINVAL;
  3141. }
  3142. mutex_lock(&panel->panel_lock);
  3143. rc = panel->panel_ops.bl_unregister(panel);
  3144. if (rc)
  3145. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3146. panel->name, rc);
  3147. rc = panel->panel_ops.gpio_release(panel);
  3148. if (rc)
  3149. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3150. rc);
  3151. rc = panel->panel_ops.pinctrl_deinit(panel);
  3152. if (rc)
  3153. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3154. rc);
  3155. rc = dsi_panel_vreg_put(panel);
  3156. if (rc)
  3157. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3158. kfree(panel->tlmm_gpio);
  3159. panel->host = NULL;
  3160. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3161. mutex_unlock(&panel->panel_lock);
  3162. return rc;
  3163. }
  3164. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3165. struct dsi_display_mode *mode)
  3166. {
  3167. return 0;
  3168. }
  3169. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3170. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3171. {
  3172. const char *compression;
  3173. u32 *array = NULL, top_count, len, i;
  3174. int rc = -EINVAL;
  3175. bool dsc_enable = false;
  3176. *dsc_count = 0;
  3177. *lm_count = 0;
  3178. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3179. if (compression && !strcmp(compression, "dsc"))
  3180. dsc_enable = true;
  3181. len = utils->count_u32_elems(node, "qcom,display-topology");
  3182. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3183. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3184. return rc;
  3185. top_count = len / TOPOLOGY_SET_LEN;
  3186. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3187. if (!array)
  3188. return -ENOMEM;
  3189. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3190. if (rc) {
  3191. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3192. goto read_fail;
  3193. }
  3194. for (i = 0; i < top_count; i++) {
  3195. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3196. if (dsc_enable)
  3197. *dsc_count = max(*dsc_count,
  3198. array[i * TOPOLOGY_SET_LEN + 1]);
  3199. }
  3200. read_fail:
  3201. kfree(array);
  3202. return 0;
  3203. }
  3204. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3205. {
  3206. const u32 SINGLE_MODE_SUPPORT = 1;
  3207. struct dsi_parser_utils *utils;
  3208. struct device_node *timings_np, *child_np;
  3209. int num_dfps_rates;
  3210. int num_video_modes = 0, num_cmd_modes = 0;
  3211. int count, rc = 0;
  3212. u32 dsc_count = 0, lm_count = 0;
  3213. if (!panel) {
  3214. DSI_ERR("invalid params\n");
  3215. return -EINVAL;
  3216. }
  3217. utils = &panel->utils;
  3218. panel->num_timing_nodes = 0;
  3219. timings_np = utils->get_child_by_name(utils->data,
  3220. "qcom,mdss-dsi-display-timings");
  3221. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3222. DSI_ERR("no display timing nodes defined\n");
  3223. rc = -EINVAL;
  3224. goto error;
  3225. }
  3226. count = utils->get_child_count(timings_np);
  3227. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3228. count > DSI_MODE_MAX) {
  3229. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3230. rc = -EINVAL;
  3231. goto error;
  3232. }
  3233. /* No multiresolution support is available for video mode panels.
  3234. * Multi-mode is supported for video mode during POMS is enabled.
  3235. */
  3236. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3237. !panel->host_config.ext_bridge_mode &&
  3238. !panel->panel_mode_switch_enabled)
  3239. count = SINGLE_MODE_SUPPORT;
  3240. panel->num_timing_nodes = count;
  3241. dsi_for_each_child_node(timings_np, child_np) {
  3242. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3243. num_video_modes++;
  3244. else if (utils->read_bool(child_np,
  3245. "qcom,mdss-dsi-cmd-mode"))
  3246. num_cmd_modes++;
  3247. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3248. num_video_modes++;
  3249. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3250. num_cmd_modes++;
  3251. dsi_panel_get_max_res_count(utils, child_np,
  3252. &dsc_count, &lm_count);
  3253. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3254. panel->lm_count = max(lm_count, panel->lm_count);
  3255. }
  3256. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3257. panel->dfps_caps.dfps_list_len;
  3258. /*
  3259. * Inflate num_of_modes by fps in dfps.
  3260. * Single command mode for video mode panels supporting
  3261. * panel operating mode switch.
  3262. */
  3263. num_video_modes = num_video_modes * num_dfps_rates;
  3264. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3265. (panel->panel_mode_switch_enabled))
  3266. num_cmd_modes = 1;
  3267. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3268. error:
  3269. return rc;
  3270. }
  3271. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3272. struct dsi_panel_phy_props *phy_props)
  3273. {
  3274. int rc = 0;
  3275. if (!panel || !phy_props) {
  3276. DSI_ERR("invalid params\n");
  3277. return -EINVAL;
  3278. }
  3279. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3280. return rc;
  3281. }
  3282. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3283. struct dsi_dfps_capabilities *dfps_caps)
  3284. {
  3285. int rc = 0;
  3286. if (!panel || !dfps_caps) {
  3287. DSI_ERR("invalid params\n");
  3288. return -EINVAL;
  3289. }
  3290. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3291. return rc;
  3292. }
  3293. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3294. {
  3295. int i;
  3296. if (!mode->priv_info)
  3297. return;
  3298. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3299. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3300. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3301. }
  3302. kfree(mode->priv_info);
  3303. }
  3304. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3305. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3306. {
  3307. u32 frame_time_us, nslices;
  3308. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3309. dsi_transfer_time_us, pixel_clk_khz;
  3310. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3311. struct dsi_mode_info *timing = &mode->timing;
  3312. struct dsi_display_mode *display_mode;
  3313. u32 jitter_numer, jitter_denom, prefill_lines;
  3314. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3315. u16 bpp;
  3316. /* Packet overhead in bits,
  3317. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3318. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3319. * 1 byte dcs data command.
  3320. */
  3321. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3322. packet_overhead = 120;
  3323. else
  3324. packet_overhead = 56;
  3325. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3326. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3327. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3328. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3329. if (timing->refresh_rate >= 120)
  3330. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3331. if (timing->dsc_enabled) {
  3332. nslices = (timing->h_active)/(dsc->config.slice_width);
  3333. /* (slice width x bit-per-pixel + packet overhead) x
  3334. * number of slices x height x fps / lane
  3335. */
  3336. bpp = DSC_BPP(dsc->config);
  3337. bits_per_line = ((dsc->config.slice_width * bpp) +
  3338. packet_overhead) * nslices;
  3339. bits_per_line = bits_per_line / (config->num_data_lanes);
  3340. min_bitclk_hz = (bits_per_line * timing->v_active *
  3341. timing->refresh_rate);
  3342. } else {
  3343. total_active_pixels = ((dsi_h_active_dce(timing)
  3344. * timing->v_active));
  3345. /* calculate the actual bitclk needed to transfer the frame */
  3346. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3347. (config->bpp));
  3348. do_div(min_bitclk_hz, config->num_data_lanes);
  3349. }
  3350. timing->min_dsi_clk_hz = min_bitclk_hz;
  3351. /*
  3352. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3353. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3354. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3355. * threshold time are configured to 40us.
  3356. */
  3357. if (mode->priv_info->disable_rsc_solver) {
  3358. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3359. } else {
  3360. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3361. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3362. }
  3363. /*
  3364. * Increase the prefill_lines proportionately as recommended
  3365. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3366. */
  3367. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3368. timing->refresh_rate, 60);
  3369. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3370. (timing->v_active));
  3371. min_threshold_us = min_threshold_us + prefill_time_us;
  3372. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3373. if (timing->clk_rate_hz) {
  3374. /* adjust the transfer time proportionately for bit clk*/
  3375. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3376. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3377. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3378. } else if (mode->priv_info->mdp_transfer_time_us) {
  3379. max_transfer_us = frame_time_us - min_threshold_us;
  3380. mode->priv_info->mdp_transfer_time_us = min(
  3381. mode->priv_info->mdp_transfer_time_us,
  3382. max_transfer_us);
  3383. timing->dsi_transfer_time_us =
  3384. mode->priv_info->mdp_transfer_time_us;
  3385. } else {
  3386. if ((min_threshold_us > frame_threshold_us) ||
  3387. (mode->priv_info->disable_rsc_solver))
  3388. frame_threshold_us = min_threshold_us;
  3389. timing->dsi_transfer_time_us = frame_time_us -
  3390. frame_threshold_us;
  3391. }
  3392. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3393. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3394. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3395. timing->mdp_transfer_time_us =
  3396. mode->priv_info->mdp_transfer_time_us;
  3397. }
  3398. /* Calculate pclk_khz to update modeinfo */
  3399. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3400. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3401. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3402. do_div(pixel_clk_khz, config->bpp);
  3403. display_mode->pixel_clk_khz = pixel_clk_khz;
  3404. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3405. }
  3406. int dsi_panel_get_mode(struct dsi_panel *panel,
  3407. u32 index, struct dsi_display_mode *mode,
  3408. int topology_override)
  3409. {
  3410. struct device_node *timings_np, *child_np;
  3411. struct dsi_parser_utils *utils;
  3412. struct dsi_display_mode_priv_info *prv_info;
  3413. u32 child_idx = 0;
  3414. int rc = 0, num_timings;
  3415. int traffic_mode;
  3416. void *utils_data = NULL;
  3417. if (!panel || !mode) {
  3418. DSI_ERR("invalid params\n");
  3419. return -EINVAL;
  3420. }
  3421. mutex_lock(&panel->panel_lock);
  3422. utils = &panel->utils;
  3423. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3424. if (!mode->priv_info) {
  3425. rc = -ENOMEM;
  3426. goto done;
  3427. }
  3428. prv_info = mode->priv_info;
  3429. timings_np = utils->get_child_by_name(utils->data,
  3430. "qcom,mdss-dsi-display-timings");
  3431. if (!timings_np) {
  3432. DSI_ERR("no display timing nodes defined\n");
  3433. rc = -EINVAL;
  3434. goto parse_fail;
  3435. }
  3436. num_timings = utils->get_child_count(timings_np);
  3437. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3438. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3439. rc = -EINVAL;
  3440. goto parse_fail;
  3441. }
  3442. utils_data = utils->data;
  3443. traffic_mode = panel->video_config.traffic_mode;
  3444. dsi_for_each_child_node(timings_np, child_np) {
  3445. if (index != child_idx++)
  3446. continue;
  3447. utils->data = child_np;
  3448. if (panel->panel_mode_switch_enabled) {
  3449. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3450. mode->panel_mode_caps = panel->panel_mode;
  3451. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3452. child_idx);
  3453. }
  3454. } else {
  3455. mode->panel_mode_caps = panel->panel_mode;
  3456. }
  3457. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3458. if (rc)
  3459. mode->mode_idx = index;
  3460. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3461. if (rc) {
  3462. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3463. goto parse_fail;
  3464. }
  3465. if (panel->dyn_clk_caps.dyn_clk_support) {
  3466. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3467. if (rc)
  3468. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3469. }
  3470. rc = dsi_panel_parse_dsc_params(mode, utils);
  3471. if (rc) {
  3472. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3473. goto parse_fail;
  3474. }
  3475. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3476. if (rc) {
  3477. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3478. goto parse_fail;
  3479. }
  3480. rc = dsi_panel_parse_topology(prv_info, utils,
  3481. topology_override);
  3482. if (rc) {
  3483. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3484. goto parse_fail;
  3485. }
  3486. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3487. if (rc) {
  3488. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3489. goto parse_fail;
  3490. }
  3491. rc = dsi_panel_parse_jitter_config(mode, utils);
  3492. if (rc)
  3493. DSI_ERR(
  3494. "failed to parse panel jitter config, rc=%d\n", rc);
  3495. rc = dsi_panel_parse_phy_timing(mode, utils);
  3496. if (rc) {
  3497. DSI_ERR(
  3498. "failed to parse panel phy timings, rc=%d\n", rc);
  3499. goto parse_fail;
  3500. }
  3501. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3502. if (rc)
  3503. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3504. }
  3505. goto done;
  3506. parse_fail:
  3507. kfree(mode->priv_info);
  3508. mode->priv_info = NULL;
  3509. done:
  3510. utils->data = utils_data;
  3511. mutex_unlock(&panel->panel_lock);
  3512. return rc;
  3513. }
  3514. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3515. struct dsi_display_mode *mode,
  3516. struct dsi_host_config *config)
  3517. {
  3518. int rc = 0;
  3519. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3520. if (!panel || !mode || !config) {
  3521. DSI_ERR("invalid params\n");
  3522. return -EINVAL;
  3523. }
  3524. mutex_lock(&panel->panel_lock);
  3525. config->panel_mode = panel->panel_mode;
  3526. memcpy(&config->common_config, &panel->host_config,
  3527. sizeof(config->common_config));
  3528. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3529. memcpy(&config->u.video_engine, &panel->video_config,
  3530. sizeof(config->u.video_engine));
  3531. } else {
  3532. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3533. sizeof(config->u.cmd_engine));
  3534. }
  3535. memcpy(&config->video_timing, &mode->timing,
  3536. sizeof(config->video_timing));
  3537. config->video_timing.mdp_transfer_time_us =
  3538. mode->priv_info->mdp_transfer_time_us;
  3539. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3540. config->video_timing.dsc = &mode->priv_info->dsc;
  3541. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3542. config->video_timing.vdc = &mode->priv_info->vdc;
  3543. if (dyn_clk_caps->dyn_clk_support)
  3544. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3545. else
  3546. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3547. config->esc_clk_rate_hz = 19200000;
  3548. mutex_unlock(&panel->panel_lock);
  3549. return rc;
  3550. }
  3551. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3552. {
  3553. int rc = 0;
  3554. if (!panel) {
  3555. DSI_ERR("invalid params\n");
  3556. return -EINVAL;
  3557. }
  3558. mutex_lock(&panel->panel_lock);
  3559. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3560. if (panel->lp11_init)
  3561. goto error;
  3562. rc = dsi_panel_power_on(panel);
  3563. if (rc) {
  3564. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3565. goto error;
  3566. }
  3567. error:
  3568. mutex_unlock(&panel->panel_lock);
  3569. return rc;
  3570. }
  3571. int dsi_panel_update_pps(struct dsi_panel *panel)
  3572. {
  3573. int rc = 0;
  3574. struct dsi_panel_cmd_set *set = NULL;
  3575. struct dsi_display_mode_priv_info *priv_info = NULL;
  3576. if (!panel || !panel->cur_mode) {
  3577. DSI_ERR("invalid params\n");
  3578. return -EINVAL;
  3579. }
  3580. mutex_lock(&panel->panel_lock);
  3581. priv_info = panel->cur_mode->priv_info;
  3582. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3583. if (priv_info->dsc_enabled)
  3584. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3585. panel->dce_pps_cmd, 0,
  3586. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3587. else if (priv_info->vdc_enabled)
  3588. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3589. panel->dce_pps_cmd, 0,
  3590. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3591. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3592. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3593. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3594. if (rc) {
  3595. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3596. goto error;
  3597. }
  3598. }
  3599. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3600. if (rc) {
  3601. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3602. panel->name, rc);
  3603. }
  3604. dsi_panel_destroy_cmd_packets(set);
  3605. error:
  3606. mutex_unlock(&panel->panel_lock);
  3607. return rc;
  3608. }
  3609. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3610. {
  3611. int rc = 0;
  3612. if (!panel) {
  3613. DSI_ERR("invalid params\n");
  3614. return -EINVAL;
  3615. }
  3616. mutex_lock(&panel->panel_lock);
  3617. if (!panel->panel_initialized)
  3618. goto exit;
  3619. /*
  3620. * Consider LP1->LP2->LP1.
  3621. * If the panel is already in LP mode, do not need to
  3622. * set the regulator.
  3623. * IBB and AB power mode would be set at the same time
  3624. * in PMIC driver, so we only call ibb setting that is enough.
  3625. */
  3626. if (dsi_panel_is_type_oled(panel) &&
  3627. panel->power_mode != SDE_MODE_DPMS_LP2)
  3628. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3629. "ibb", REGULATOR_MODE_IDLE);
  3630. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3631. if (rc)
  3632. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3633. panel->name, rc);
  3634. exit:
  3635. mutex_unlock(&panel->panel_lock);
  3636. return rc;
  3637. }
  3638. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3639. {
  3640. int rc = 0;
  3641. if (!panel) {
  3642. DSI_ERR("invalid params\n");
  3643. return -EINVAL;
  3644. }
  3645. mutex_lock(&panel->panel_lock);
  3646. if (!panel->panel_initialized)
  3647. goto exit;
  3648. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3649. if (rc)
  3650. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3651. panel->name, rc);
  3652. exit:
  3653. mutex_unlock(&panel->panel_lock);
  3654. return rc;
  3655. }
  3656. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3657. {
  3658. int rc = 0;
  3659. if (!panel) {
  3660. DSI_ERR("invalid params\n");
  3661. return -EINVAL;
  3662. }
  3663. mutex_lock(&panel->panel_lock);
  3664. if (!panel->panel_initialized)
  3665. goto exit;
  3666. /*
  3667. * Consider about LP1->LP2->NOLP.
  3668. */
  3669. if (dsi_panel_is_type_oled(panel) &&
  3670. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3671. panel->power_mode == SDE_MODE_DPMS_LP2))
  3672. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3673. "ibb", REGULATOR_MODE_NORMAL);
  3674. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3675. if (rc)
  3676. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3677. panel->name, rc);
  3678. exit:
  3679. mutex_unlock(&panel->panel_lock);
  3680. return rc;
  3681. }
  3682. int dsi_panel_prepare(struct dsi_panel *panel)
  3683. {
  3684. int rc = 0;
  3685. if (!panel) {
  3686. DSI_ERR("invalid params\n");
  3687. return -EINVAL;
  3688. }
  3689. mutex_lock(&panel->panel_lock);
  3690. if (panel->lp11_init) {
  3691. rc = dsi_panel_power_on(panel);
  3692. if (rc) {
  3693. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3694. panel->name, rc);
  3695. goto error;
  3696. }
  3697. }
  3698. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3699. if (rc) {
  3700. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3701. panel->name, rc);
  3702. goto error;
  3703. }
  3704. error:
  3705. mutex_unlock(&panel->panel_lock);
  3706. return rc;
  3707. }
  3708. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3709. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3710. {
  3711. static const int ROI_CMD_LEN = 5;
  3712. int rc = 0;
  3713. /* DTYPE_DCS_LWRITE */
  3714. char *caset, *paset;
  3715. set->cmds = NULL;
  3716. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3717. if (!caset) {
  3718. rc = -ENOMEM;
  3719. goto exit;
  3720. }
  3721. caset[0] = 0x2a;
  3722. caset[1] = (roi->x & 0xFF00) >> 8;
  3723. caset[2] = roi->x & 0xFF;
  3724. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3725. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3726. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3727. if (!paset) {
  3728. rc = -ENOMEM;
  3729. goto error_free_mem;
  3730. }
  3731. paset[0] = 0x2b;
  3732. paset[1] = (roi->y & 0xFF00) >> 8;
  3733. paset[2] = roi->y & 0xFF;
  3734. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3735. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3736. set->type = DSI_CMD_SET_ROI;
  3737. set->state = DSI_CMD_SET_STATE_LP;
  3738. set->count = 2; /* send caset + paset together */
  3739. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3740. if (!set->cmds) {
  3741. rc = -ENOMEM;
  3742. goto error_free_mem;
  3743. }
  3744. set->cmds[0].msg.channel = 0;
  3745. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3746. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3747. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3748. set->cmds[0].msg.tx_buf = caset;
  3749. set->cmds[0].msg.rx_len = 0;
  3750. set->cmds[0].msg.rx_buf = 0;
  3751. set->cmds[0].last_command = 0;
  3752. set->cmds[0].post_wait_ms = 0;
  3753. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3754. set->cmds[1].msg.channel = 0;
  3755. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3756. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3757. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3758. set->cmds[1].msg.tx_buf = paset;
  3759. set->cmds[1].msg.rx_len = 0;
  3760. set->cmds[1].msg.rx_buf = 0;
  3761. set->cmds[1].last_command = 1;
  3762. set->cmds[1].post_wait_ms = 0;
  3763. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3764. goto exit;
  3765. error_free_mem:
  3766. kfree(caset);
  3767. kfree(paset);
  3768. kfree(set->cmds);
  3769. exit:
  3770. return rc;
  3771. }
  3772. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3773. int ctrl_idx)
  3774. {
  3775. int rc = 0;
  3776. if (!panel) {
  3777. DSI_ERR("invalid params\n");
  3778. return -EINVAL;
  3779. }
  3780. mutex_lock(&panel->panel_lock);
  3781. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3782. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3783. if (rc)
  3784. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3785. panel->name, rc);
  3786. mutex_unlock(&panel->panel_lock);
  3787. return rc;
  3788. }
  3789. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3790. int ctrl_idx)
  3791. {
  3792. int rc = 0;
  3793. if (!panel) {
  3794. DSI_ERR("invalid params\n");
  3795. return -EINVAL;
  3796. }
  3797. mutex_lock(&panel->panel_lock);
  3798. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3799. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3800. if (rc)
  3801. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3802. panel->name, rc);
  3803. mutex_unlock(&panel->panel_lock);
  3804. return rc;
  3805. }
  3806. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3807. struct dsi_rect *roi)
  3808. {
  3809. int rc = 0;
  3810. struct dsi_panel_cmd_set *set;
  3811. struct dsi_display_mode_priv_info *priv_info;
  3812. if (!panel || !panel->cur_mode) {
  3813. DSI_ERR("Invalid params\n");
  3814. return -EINVAL;
  3815. }
  3816. priv_info = panel->cur_mode->priv_info;
  3817. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3818. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3819. if (rc) {
  3820. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3821. panel->name, rc);
  3822. return rc;
  3823. }
  3824. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3825. roi->x, roi->y, roi->w, roi->h);
  3826. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3827. mutex_lock(&panel->panel_lock);
  3828. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3829. if (rc)
  3830. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3831. panel->name, rc);
  3832. mutex_unlock(&panel->panel_lock);
  3833. dsi_panel_destroy_cmd_packets(set);
  3834. dsi_panel_dealloc_cmd_packets(set);
  3835. return rc;
  3836. }
  3837. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3838. {
  3839. int rc = 0;
  3840. if (!panel) {
  3841. DSI_ERR("Invalid params\n");
  3842. return -EINVAL;
  3843. }
  3844. mutex_lock(&panel->panel_lock);
  3845. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3846. if (rc)
  3847. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3848. panel->name, rc);
  3849. mutex_unlock(&panel->panel_lock);
  3850. return rc;
  3851. }
  3852. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3853. {
  3854. int rc = 0;
  3855. if (!panel) {
  3856. DSI_ERR("Invalid params\n");
  3857. return -EINVAL;
  3858. }
  3859. mutex_lock(&panel->panel_lock);
  3860. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3861. if (rc)
  3862. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3863. panel->name, rc);
  3864. mutex_unlock(&panel->panel_lock);
  3865. return rc;
  3866. }
  3867. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3868. {
  3869. int rc = 0;
  3870. if (!panel) {
  3871. DSI_ERR("Invalid params\n");
  3872. return -EINVAL;
  3873. }
  3874. mutex_lock(&panel->panel_lock);
  3875. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3876. if (rc)
  3877. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3878. panel->name, rc);
  3879. mutex_unlock(&panel->panel_lock);
  3880. return rc;
  3881. }
  3882. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3883. {
  3884. int rc = 0;
  3885. if (!panel) {
  3886. DSI_ERR("Invalid params\n");
  3887. return -EINVAL;
  3888. }
  3889. mutex_lock(&panel->panel_lock);
  3890. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3891. if (rc)
  3892. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3893. panel->name, rc);
  3894. mutex_unlock(&panel->panel_lock);
  3895. return rc;
  3896. }
  3897. int dsi_panel_switch(struct dsi_panel *panel)
  3898. {
  3899. int rc = 0;
  3900. if (!panel) {
  3901. DSI_ERR("Invalid params\n");
  3902. return -EINVAL;
  3903. }
  3904. mutex_lock(&panel->panel_lock);
  3905. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3906. if (rc)
  3907. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3908. panel->name, rc);
  3909. mutex_unlock(&panel->panel_lock);
  3910. return rc;
  3911. }
  3912. int dsi_panel_post_switch(struct dsi_panel *panel)
  3913. {
  3914. int rc = 0;
  3915. if (!panel) {
  3916. DSI_ERR("Invalid params\n");
  3917. return -EINVAL;
  3918. }
  3919. mutex_lock(&panel->panel_lock);
  3920. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3921. if (rc)
  3922. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3923. panel->name, rc);
  3924. mutex_unlock(&panel->panel_lock);
  3925. return rc;
  3926. }
  3927. int dsi_panel_enable(struct dsi_panel *panel)
  3928. {
  3929. int rc = 0;
  3930. if (!panel) {
  3931. DSI_ERR("Invalid params\n");
  3932. return -EINVAL;
  3933. }
  3934. mutex_lock(&panel->panel_lock);
  3935. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3936. if (rc) {
  3937. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3938. panel->name, rc);
  3939. goto error;
  3940. }
  3941. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3942. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3943. if (rc) {
  3944. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3945. panel->name, rc);
  3946. goto error;
  3947. }
  3948. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3949. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3950. if (rc) {
  3951. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3952. panel->name, rc);
  3953. goto error;
  3954. }
  3955. }
  3956. panel->panel_initialized = true;
  3957. error:
  3958. mutex_unlock(&panel->panel_lock);
  3959. return rc;
  3960. }
  3961. int dsi_panel_post_enable(struct dsi_panel *panel)
  3962. {
  3963. int rc = 0;
  3964. if (!panel) {
  3965. DSI_ERR("invalid params\n");
  3966. return -EINVAL;
  3967. }
  3968. mutex_lock(&panel->panel_lock);
  3969. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3970. if (rc) {
  3971. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3972. panel->name, rc);
  3973. goto error;
  3974. }
  3975. error:
  3976. mutex_unlock(&panel->panel_lock);
  3977. return rc;
  3978. }
  3979. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3980. {
  3981. int rc = 0;
  3982. if (!panel) {
  3983. DSI_ERR("invalid params\n");
  3984. return -EINVAL;
  3985. }
  3986. mutex_lock(&panel->panel_lock);
  3987. if (gpio_is_valid(panel->bl_config.en_gpio))
  3988. gpio_set_value(panel->bl_config.en_gpio, 0);
  3989. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3990. if (rc) {
  3991. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3992. panel->name, rc);
  3993. goto error;
  3994. }
  3995. error:
  3996. mutex_unlock(&panel->panel_lock);
  3997. return rc;
  3998. }
  3999. int dsi_panel_disable(struct dsi_panel *panel)
  4000. {
  4001. int rc = 0;
  4002. if (!panel) {
  4003. DSI_ERR("invalid params\n");
  4004. return -EINVAL;
  4005. }
  4006. mutex_lock(&panel->panel_lock);
  4007. /* Avoid sending panel off commands when ESD recovery is underway */
  4008. if (!atomic_read(&panel->esd_recovery_pending)) {
  4009. /*
  4010. * Need to set IBB/AB regulator mode to STANDBY,
  4011. * if panel is going off from AOD mode.
  4012. */
  4013. if (dsi_panel_is_type_oled(panel) &&
  4014. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4015. panel->power_mode == SDE_MODE_DPMS_LP2))
  4016. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4017. "ibb", REGULATOR_MODE_STANDBY);
  4018. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4019. if (rc) {
  4020. /*
  4021. * Sending panel off commands may fail when DSI
  4022. * controller is in a bad state. These failures can be
  4023. * ignored since controller will go for full reset on
  4024. * subsequent display enable anyway.
  4025. */
  4026. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4027. panel->name, rc);
  4028. rc = 0;
  4029. }
  4030. }
  4031. panel->panel_initialized = false;
  4032. panel->power_mode = SDE_MODE_DPMS_OFF;
  4033. mutex_unlock(&panel->panel_lock);
  4034. return rc;
  4035. }
  4036. int dsi_panel_unprepare(struct dsi_panel *panel)
  4037. {
  4038. int rc = 0;
  4039. if (!panel) {
  4040. DSI_ERR("invalid params\n");
  4041. return -EINVAL;
  4042. }
  4043. mutex_lock(&panel->panel_lock);
  4044. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4045. if (rc) {
  4046. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4047. panel->name, rc);
  4048. goto error;
  4049. }
  4050. error:
  4051. mutex_unlock(&panel->panel_lock);
  4052. return rc;
  4053. }
  4054. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4055. {
  4056. int rc = 0;
  4057. if (!panel) {
  4058. DSI_ERR("invalid params\n");
  4059. return -EINVAL;
  4060. }
  4061. mutex_lock(&panel->panel_lock);
  4062. rc = dsi_panel_power_off(panel);
  4063. if (rc) {
  4064. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4065. panel->name, rc);
  4066. goto error;
  4067. }
  4068. error:
  4069. mutex_unlock(&panel->panel_lock);
  4070. return rc;
  4071. }