qcs405.c 208 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499
  1. /* Copyright (c) 2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/input.h>
  21. #include <linux/of_device.h>
  22. #include <linux/pm_qos.h>
  23. #include <sound/core.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/info.h>
  29. #include <dsp/audio_notifier.h>
  30. #include <dsp/q6afe-v2.h>
  31. #include <dsp/q6core.h>
  32. #include "device_event.h"
  33. #include "msm-pcm-routing-v2.h"
  34. #include "codecs/msm-cdc-pinctrl.h"
  35. #include "codecs/wcd9335.h"
  36. #include "codecs/wsa881x.h"
  37. #include <dt-bindings/sound/audio-codec-port-types.h>
  38. #define DRV_NAME "qcs405-asoc-snd"
  39. #define __CHIPSET__ "QCS405 "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define DEV_NAME_STR_LEN 32
  42. #define SAMPLING_RATE_8KHZ 8000
  43. #define SAMPLING_RATE_11P025KHZ 11025
  44. #define SAMPLING_RATE_16KHZ 16000
  45. #define SAMPLING_RATE_22P05KHZ 22050
  46. #define SAMPLING_RATE_32KHZ 32000
  47. #define SAMPLING_RATE_44P1KHZ 44100
  48. #define SAMPLING_RATE_48KHZ 48000
  49. #define SAMPLING_RATE_88P2KHZ 88200
  50. #define SAMPLING_RATE_96KHZ 96000
  51. #define SAMPLING_RATE_176P4KHZ 176400
  52. #define SAMPLING_RATE_192KHZ 192000
  53. #define SAMPLING_RATE_352P8KHZ 352800
  54. #define SAMPLING_RATE_384KHZ 384000
  55. #define WSA8810_NAME_1 "wsa881x.20170211"
  56. #define WSA8810_NAME_2 "wsa881x.20170212"
  57. #define WCN_CDC_SLIM_RX_CH_MAX 2
  58. #define WCN_CDC_SLIM_TX_CH_MAX 3
  59. #define TDM_CHANNEL_MAX 8
  60. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  61. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  62. enum {
  63. SLIM_RX_0 = 0,
  64. SLIM_RX_1,
  65. SLIM_RX_2,
  66. SLIM_RX_3,
  67. SLIM_RX_4,
  68. SLIM_RX_5,
  69. SLIM_RX_6,
  70. SLIM_RX_7,
  71. SLIM_RX_MAX,
  72. };
  73. enum {
  74. SLIM_TX_0 = 0,
  75. SLIM_TX_1,
  76. SLIM_TX_2,
  77. SLIM_TX_3,
  78. SLIM_TX_4,
  79. SLIM_TX_5,
  80. SLIM_TX_6,
  81. SLIM_TX_7,
  82. SLIM_TX_8,
  83. SLIM_TX_MAX,
  84. };
  85. enum {
  86. PRIM_MI2S = 0,
  87. SEC_MI2S,
  88. TERT_MI2S,
  89. QUAT_MI2S,
  90. QUIN_MI2S,
  91. MI2S_MAX,
  92. };
  93. enum {
  94. PRIM_AUX_PCM = 0,
  95. SEC_AUX_PCM,
  96. TERT_AUX_PCM,
  97. QUAT_AUX_PCM,
  98. QUIN_AUX_PCM,
  99. AUX_PCM_MAX,
  100. };
  101. enum {
  102. WSA_CDC_DMA_RX_0 = 0,
  103. WSA_CDC_DMA_RX_1,
  104. CDC_DMA_RX_MAX,
  105. };
  106. enum {
  107. WSA_CDC_DMA_TX_0 = 0,
  108. WSA_CDC_DMA_TX_1,
  109. WSA_CDC_DMA_TX_2,
  110. VA_CDC_DMA_TX_0,
  111. VA_CDC_DMA_TX_1,
  112. CDC_DMA_TX_MAX,
  113. };
  114. struct mi2s_conf {
  115. struct mutex lock;
  116. u32 ref_cnt;
  117. u32 msm_is_mi2s_master;
  118. };
  119. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  120. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  121. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  122. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  123. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  124. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  125. };
  126. struct dev_config {
  127. u32 sample_rate;
  128. u32 bit_format;
  129. u32 channels;
  130. };
  131. struct msm_wsa881x_dev_info {
  132. struct device_node *of_node;
  133. u32 index;
  134. };
  135. enum pinctrl_pin_state {
  136. STATE_DISABLE = 0, /* All pins are in sleep state */
  137. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  138. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  139. };
  140. struct msm_pinctrl_info {
  141. struct pinctrl *pinctrl;
  142. struct pinctrl_state *mi2s_disable;
  143. struct pinctrl_state *tdm_disable;
  144. struct pinctrl_state *mi2s_active;
  145. struct pinctrl_state *tdm_active;
  146. enum pinctrl_pin_state curr_state;
  147. };
  148. struct msm_asoc_mach_data {
  149. struct snd_info_entry *codec_root;
  150. struct msm_pinctrl_info pinctrl_info;
  151. struct device_node *dmic_01_gpio_p; /* used by pinctrl API */
  152. struct device_node *dmic_23_gpio_p; /* used by pinctrl API */
  153. struct device_node *dmic_45_gpio_p; /* used by pinctrl API */
  154. struct device_node *dmic_67_gpio_p; /* used by pinctrl API */
  155. int dmic_01_gpio_cnt;
  156. int dmic_23_gpio_cnt;
  157. int dmic_45_gpio_cnt;
  158. int dmic_67_gpio_cnt;
  159. };
  160. struct msm_asoc_wcd93xx_codec {
  161. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  162. enum afe_config_type config_type);
  163. };
  164. static const char *const pin_states[] = {"sleep", "i2s-active",
  165. "tdm-active"};
  166. enum {
  167. TDM_0 = 0,
  168. TDM_1,
  169. TDM_2,
  170. TDM_3,
  171. TDM_4,
  172. TDM_5,
  173. TDM_6,
  174. TDM_7,
  175. TDM_PORT_MAX,
  176. };
  177. enum {
  178. TDM_PRI = 0,
  179. TDM_SEC,
  180. TDM_TERT,
  181. TDM_QUAT,
  182. TDM_QUIN,
  183. TDM_INTERFACE_MAX,
  184. };
  185. struct tdm_port {
  186. u32 mode;
  187. u32 channel;
  188. };
  189. /* TDM default config */
  190. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  191. { /* PRI TDM */
  192. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  193. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  194. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  195. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  196. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  197. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  198. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  199. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  200. },
  201. { /* SEC TDM */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  210. },
  211. { /* TERT TDM */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  220. },
  221. { /* QUAT TDM */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  230. },
  231. { /* QUIN TDM */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  240. }
  241. };
  242. /* TDM default config */
  243. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  244. { /* PRI TDM */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  253. },
  254. { /* SEC TDM */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  263. },
  264. { /* TERT TDM */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  273. },
  274. { /* QUAT TDM */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  283. },
  284. { /* QUIN TDM */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  293. }
  294. };
  295. /* Default configuration of slimbus channels */
  296. static struct dev_config slim_rx_cfg[] = {
  297. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  298. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  299. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  300. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  301. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  302. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  303. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  304. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  305. };
  306. static struct dev_config slim_tx_cfg[] = {
  307. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  308. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  309. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  313. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  316. };
  317. /* Default configuration of Codec DMA Interface Tx */
  318. static struct dev_config cdc_dma_rx_cfg[] = {
  319. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  320. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  321. };
  322. /* Default configuration of Codec DMA Interface Rx */
  323. static struct dev_config cdc_dma_tx_cfg[] = {
  324. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  325. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  326. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  327. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  328. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  329. };
  330. static struct dev_config usb_rx_cfg = {
  331. .sample_rate = SAMPLING_RATE_48KHZ,
  332. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  333. .channels = 2,
  334. };
  335. static struct dev_config usb_tx_cfg = {
  336. .sample_rate = SAMPLING_RATE_48KHZ,
  337. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  338. .channels = 1,
  339. };
  340. static struct dev_config proxy_rx_cfg = {
  341. .sample_rate = SAMPLING_RATE_48KHZ,
  342. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  343. .channels = 2,
  344. };
  345. /* Default configuration of MI2S channels */
  346. static struct dev_config mi2s_rx_cfg[] = {
  347. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. };
  353. static struct dev_config mi2s_tx_cfg[] = {
  354. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  355. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  356. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  357. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  358. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  359. };
  360. static struct dev_config aux_pcm_rx_cfg[] = {
  361. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  362. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  363. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  364. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  365. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  366. };
  367. static struct dev_config aux_pcm_tx_cfg[] = {
  368. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  369. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  370. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  371. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  372. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  373. };
  374. static int msm_vi_feed_tx_ch = 2;
  375. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  376. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  377. "Five", "Six", "Seven",
  378. "Eight"};
  379. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  380. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  381. "S32_LE"};
  382. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  383. "KHZ_32", "KHZ_44P1", "KHZ_48",
  384. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  385. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  386. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  387. "KHZ_44P1", "KHZ_48",
  388. "KHZ_88P2", "KHZ_96"};
  389. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  390. "Five", "Six", "Seven",
  391. "Eight"};
  392. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  393. "Six", "Seven", "Eight"};
  394. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  395. "KHZ_16", "KHZ_22P05",
  396. "KHZ_32", "KHZ_44P1", "KHZ_48",
  397. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  398. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  399. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  400. "Five", "Six", "Seven", "Eight"};
  401. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  402. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  403. "KHZ_48", "KHZ_176P4",
  404. "KHZ_352P8"};
  405. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  406. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  407. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  408. "KHZ_48", "KHZ_96", "KHZ_192"};
  409. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  410. "Five", "Six", "Seven",
  411. "Eight"};
  412. static const char *const qos_text[] = {"Disable", "Enable"};
  413. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  414. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  415. "Five", "Six", "Seven",
  416. "Eight"};
  417. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  418. "KHZ_32", "KHZ_44P1", "KHZ_48",
  419. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  420. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  421. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  499. cdc_dma_sample_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  501. cdc_dma_sample_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  503. cdc_dma_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  505. cdc_dma_sample_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  507. cdc_dma_sample_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  509. cdc_dma_sample_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  511. cdc_dma_sample_rate_text);
  512. static struct platform_device *spdev;
  513. static bool is_initial_boot;
  514. static bool codec_reg_done;
  515. static struct snd_soc_aux_dev *msm_aux_dev;
  516. static struct snd_soc_codec_conf *msm_codec_conf;
  517. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  518. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  519. int enable, bool dapm);
  520. static int msm_wsa881x_init(struct snd_soc_component *component);
  521. static struct snd_soc_dapm_route wcd_audio_paths[] = {
  522. {"MIC BIAS1", NULL, "MCLK TX"},
  523. {"MIC BIAS2", NULL, "MCLK TX"},
  524. {"MIC BIAS3", NULL, "MCLK TX"},
  525. {"MIC BIAS4", NULL, "MCLK TX"},
  526. };
  527. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  528. {
  529. AFE_API_VERSION_I2S_CONFIG,
  530. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  531. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  532. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  533. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  534. 0,
  535. },
  536. {
  537. AFE_API_VERSION_I2S_CONFIG,
  538. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  539. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  540. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  541. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  542. 0,
  543. },
  544. {
  545. AFE_API_VERSION_I2S_CONFIG,
  546. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  547. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  548. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  549. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  550. 0,
  551. },
  552. {
  553. AFE_API_VERSION_I2S_CONFIG,
  554. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  555. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  556. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  557. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  558. 0,
  559. },
  560. {
  561. AFE_API_VERSION_I2S_CONFIG,
  562. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  563. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  564. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  565. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  566. 0,
  567. }
  568. };
  569. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  570. static int slim_get_sample_rate_val(int sample_rate)
  571. {
  572. int sample_rate_val = 0;
  573. switch (sample_rate) {
  574. case SAMPLING_RATE_8KHZ:
  575. sample_rate_val = 0;
  576. break;
  577. case SAMPLING_RATE_16KHZ:
  578. sample_rate_val = 1;
  579. break;
  580. case SAMPLING_RATE_32KHZ:
  581. sample_rate_val = 2;
  582. break;
  583. case SAMPLING_RATE_44P1KHZ:
  584. sample_rate_val = 3;
  585. break;
  586. case SAMPLING_RATE_48KHZ:
  587. sample_rate_val = 4;
  588. break;
  589. case SAMPLING_RATE_88P2KHZ:
  590. sample_rate_val = 5;
  591. break;
  592. case SAMPLING_RATE_96KHZ:
  593. sample_rate_val = 6;
  594. break;
  595. case SAMPLING_RATE_176P4KHZ:
  596. sample_rate_val = 7;
  597. break;
  598. case SAMPLING_RATE_192KHZ:
  599. sample_rate_val = 8;
  600. break;
  601. case SAMPLING_RATE_352P8KHZ:
  602. sample_rate_val = 9;
  603. break;
  604. case SAMPLING_RATE_384KHZ:
  605. sample_rate_val = 10;
  606. break;
  607. default:
  608. sample_rate_val = 4;
  609. break;
  610. }
  611. return sample_rate_val;
  612. }
  613. static int slim_get_sample_rate(int value)
  614. {
  615. int sample_rate = 0;
  616. switch (value) {
  617. case 0:
  618. sample_rate = SAMPLING_RATE_8KHZ;
  619. break;
  620. case 1:
  621. sample_rate = SAMPLING_RATE_16KHZ;
  622. break;
  623. case 2:
  624. sample_rate = SAMPLING_RATE_32KHZ;
  625. break;
  626. case 3:
  627. sample_rate = SAMPLING_RATE_44P1KHZ;
  628. break;
  629. case 4:
  630. sample_rate = SAMPLING_RATE_48KHZ;
  631. break;
  632. case 5:
  633. sample_rate = SAMPLING_RATE_88P2KHZ;
  634. break;
  635. case 6:
  636. sample_rate = SAMPLING_RATE_96KHZ;
  637. break;
  638. case 7:
  639. sample_rate = SAMPLING_RATE_176P4KHZ;
  640. break;
  641. case 8:
  642. sample_rate = SAMPLING_RATE_192KHZ;
  643. break;
  644. case 9:
  645. sample_rate = SAMPLING_RATE_352P8KHZ;
  646. break;
  647. case 10:
  648. sample_rate = SAMPLING_RATE_384KHZ;
  649. break;
  650. default:
  651. sample_rate = SAMPLING_RATE_48KHZ;
  652. break;
  653. }
  654. return sample_rate;
  655. }
  656. static int slim_get_bit_format_val(int bit_format)
  657. {
  658. int val = 0;
  659. switch (bit_format) {
  660. case SNDRV_PCM_FORMAT_S32_LE:
  661. val = 3;
  662. break;
  663. case SNDRV_PCM_FORMAT_S24_3LE:
  664. val = 2;
  665. break;
  666. case SNDRV_PCM_FORMAT_S24_LE:
  667. val = 1;
  668. break;
  669. case SNDRV_PCM_FORMAT_S16_LE:
  670. default:
  671. val = 0;
  672. break;
  673. }
  674. return val;
  675. }
  676. static int slim_get_bit_format(int val)
  677. {
  678. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  679. switch (val) {
  680. case 0:
  681. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  682. break;
  683. case 1:
  684. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  685. break;
  686. case 2:
  687. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  688. break;
  689. case 3:
  690. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  691. break;
  692. default:
  693. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  694. break;
  695. }
  696. return bit_fmt;
  697. }
  698. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  699. {
  700. int port_id = 0;
  701. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  702. port_id = SLIM_RX_0;
  703. } else if (strnstr(kcontrol->id.name,
  704. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  705. port_id = SLIM_RX_2;
  706. } else if (strnstr(kcontrol->id.name,
  707. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  708. port_id = SLIM_RX_5;
  709. } else if (strnstr(kcontrol->id.name,
  710. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  711. port_id = SLIM_RX_6;
  712. } else if (strnstr(kcontrol->id.name,
  713. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  714. port_id = SLIM_TX_0;
  715. } else if (strnstr(kcontrol->id.name,
  716. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  717. port_id = SLIM_TX_1;
  718. } else {
  719. pr_err("%s: unsupported channel: %s",
  720. __func__, kcontrol->id.name);
  721. return -EINVAL;
  722. }
  723. return port_id;
  724. }
  725. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  726. struct snd_ctl_elem_value *ucontrol)
  727. {
  728. int ch_num = slim_get_port_idx(kcontrol);
  729. if (ch_num < 0)
  730. return ch_num;
  731. ucontrol->value.enumerated.item[0] =
  732. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  733. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  734. ch_num, slim_rx_cfg[ch_num].sample_rate,
  735. ucontrol->value.enumerated.item[0]);
  736. return 0;
  737. }
  738. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  739. struct snd_ctl_elem_value *ucontrol)
  740. {
  741. int ch_num = slim_get_port_idx(kcontrol);
  742. if (ch_num < 0)
  743. return ch_num;
  744. slim_rx_cfg[ch_num].sample_rate =
  745. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  746. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  747. ch_num, slim_rx_cfg[ch_num].sample_rate,
  748. ucontrol->value.enumerated.item[0]);
  749. return 0;
  750. }
  751. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  752. struct snd_ctl_elem_value *ucontrol)
  753. {
  754. int ch_num = slim_get_port_idx(kcontrol);
  755. if (ch_num < 0)
  756. return ch_num;
  757. ucontrol->value.enumerated.item[0] =
  758. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  759. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  760. ch_num, slim_tx_cfg[ch_num].sample_rate,
  761. ucontrol->value.enumerated.item[0]);
  762. return 0;
  763. }
  764. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  765. struct snd_ctl_elem_value *ucontrol)
  766. {
  767. int sample_rate = 0;
  768. int ch_num = slim_get_port_idx(kcontrol);
  769. if (ch_num < 0)
  770. return ch_num;
  771. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  772. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  773. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  774. __func__, sample_rate);
  775. return -EINVAL;
  776. }
  777. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  778. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  779. ch_num, slim_tx_cfg[ch_num].sample_rate,
  780. ucontrol->value.enumerated.item[0]);
  781. return 0;
  782. }
  783. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  784. struct snd_ctl_elem_value *ucontrol)
  785. {
  786. int ch_num = slim_get_port_idx(kcontrol);
  787. if (ch_num < 0)
  788. return ch_num;
  789. ucontrol->value.enumerated.item[0] =
  790. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  791. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  792. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  793. ucontrol->value.enumerated.item[0]);
  794. return 0;
  795. }
  796. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  797. struct snd_ctl_elem_value *ucontrol)
  798. {
  799. int ch_num = slim_get_port_idx(kcontrol);
  800. if (ch_num < 0)
  801. return ch_num;
  802. slim_rx_cfg[ch_num].bit_format =
  803. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  804. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  805. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  806. ucontrol->value.enumerated.item[0]);
  807. return 0;
  808. }
  809. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  810. struct snd_ctl_elem_value *ucontrol)
  811. {
  812. int ch_num = slim_get_port_idx(kcontrol);
  813. if (ch_num < 0)
  814. return ch_num;
  815. ucontrol->value.enumerated.item[0] =
  816. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  817. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  818. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  819. ucontrol->value.enumerated.item[0]);
  820. return 0;
  821. }
  822. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  823. struct snd_ctl_elem_value *ucontrol)
  824. {
  825. int ch_num = slim_get_port_idx(kcontrol);
  826. if (ch_num < 0)
  827. return ch_num;
  828. slim_tx_cfg[ch_num].bit_format =
  829. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  830. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  831. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  832. ucontrol->value.enumerated.item[0]);
  833. return 0;
  834. }
  835. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  836. struct snd_ctl_elem_value *ucontrol)
  837. {
  838. int ch_num = slim_get_port_idx(kcontrol);
  839. if (ch_num < 0)
  840. return ch_num;
  841. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  842. ch_num, slim_rx_cfg[ch_num].channels);
  843. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  844. return 0;
  845. }
  846. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  847. struct snd_ctl_elem_value *ucontrol)
  848. {
  849. int ch_num = slim_get_port_idx(kcontrol);
  850. if (ch_num < 0)
  851. return ch_num;
  852. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  853. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  854. ch_num, slim_rx_cfg[ch_num].channels);
  855. return 1;
  856. }
  857. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  858. struct snd_ctl_elem_value *ucontrol)
  859. {
  860. int ch_num = slim_get_port_idx(kcontrol);
  861. if (ch_num < 0)
  862. return ch_num;
  863. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  864. ch_num, slim_tx_cfg[ch_num].channels);
  865. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  866. return 0;
  867. }
  868. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  869. struct snd_ctl_elem_value *ucontrol)
  870. {
  871. int ch_num = slim_get_port_idx(kcontrol);
  872. if (ch_num < 0)
  873. return ch_num;
  874. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  875. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  876. ch_num, slim_tx_cfg[ch_num].channels);
  877. return 1;
  878. }
  879. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  880. struct snd_ctl_elem_value *ucontrol)
  881. {
  882. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  883. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  884. ucontrol->value.integer.value[0]);
  885. return 0;
  886. }
  887. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  888. struct snd_ctl_elem_value *ucontrol)
  889. {
  890. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  891. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  892. return 1;
  893. }
  894. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  895. struct snd_ctl_elem_value *ucontrol)
  896. {
  897. /*
  898. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  899. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  900. * value.
  901. */
  902. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  903. case SAMPLING_RATE_96KHZ:
  904. ucontrol->value.integer.value[0] = 5;
  905. break;
  906. case SAMPLING_RATE_88P2KHZ:
  907. ucontrol->value.integer.value[0] = 4;
  908. break;
  909. case SAMPLING_RATE_48KHZ:
  910. ucontrol->value.integer.value[0] = 3;
  911. break;
  912. case SAMPLING_RATE_44P1KHZ:
  913. ucontrol->value.integer.value[0] = 2;
  914. break;
  915. case SAMPLING_RATE_16KHZ:
  916. ucontrol->value.integer.value[0] = 1;
  917. break;
  918. case SAMPLING_RATE_8KHZ:
  919. default:
  920. ucontrol->value.integer.value[0] = 0;
  921. break;
  922. }
  923. pr_debug("%s: sample rate = %d", __func__,
  924. slim_rx_cfg[SLIM_RX_7].sample_rate);
  925. return 0;
  926. }
  927. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  928. struct snd_ctl_elem_value *ucontrol)
  929. {
  930. switch (ucontrol->value.integer.value[0]) {
  931. case 1:
  932. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  933. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  934. break;
  935. case 2:
  936. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  937. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  938. break;
  939. case 3:
  940. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  941. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  942. break;
  943. case 4:
  944. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  945. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  946. break;
  947. case 5:
  948. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  949. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  950. break;
  951. case 0:
  952. default:
  953. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  954. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  955. break;
  956. }
  957. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  958. __func__,
  959. slim_rx_cfg[SLIM_RX_7].sample_rate,
  960. slim_tx_cfg[SLIM_TX_7].sample_rate,
  961. ucontrol->value.enumerated.item[0]);
  962. return 0;
  963. }
  964. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  965. {
  966. int idx = 0;
  967. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  968. sizeof("WSA_CDC_DMA_RX_0")))
  969. idx = WSA_CDC_DMA_RX_0;
  970. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  971. sizeof("WSA_CDC_DMA_RX_0")))
  972. idx = WSA_CDC_DMA_RX_1;
  973. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  974. sizeof("WSA_CDC_DMA_TX_0")))
  975. idx = WSA_CDC_DMA_TX_0;
  976. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  977. sizeof("WSA_CDC_DMA_TX_1")))
  978. idx = WSA_CDC_DMA_TX_1;
  979. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  980. sizeof("WSA_CDC_DMA_TX_2")))
  981. idx = WSA_CDC_DMA_TX_2;
  982. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  983. sizeof("VA_CDC_DMA_TX_0")))
  984. idx = VA_CDC_DMA_TX_0;
  985. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  986. sizeof("VA_CDC_DMA_TX_1")))
  987. idx = VA_CDC_DMA_TX_1;
  988. else {
  989. pr_err("%s: unsupported port: %s\n",
  990. __func__, kcontrol->id.name);
  991. return -EINVAL;
  992. }
  993. return idx;
  994. }
  995. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. int ch_num = cdc_dma_get_port_idx(kcontrol);
  999. if (ch_num < 0)
  1000. return ch_num;
  1001. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1002. cdc_dma_rx_cfg[ch_num].channels - 1);
  1003. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1004. return 0;
  1005. }
  1006. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1007. struct snd_ctl_elem_value *ucontrol)
  1008. {
  1009. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1010. if (ch_num < 0)
  1011. return ch_num;
  1012. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1013. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1014. cdc_dma_rx_cfg[ch_num].channels);
  1015. return 1;
  1016. }
  1017. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1018. struct snd_ctl_elem_value *ucontrol)
  1019. {
  1020. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1021. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1022. case SNDRV_PCM_FORMAT_S32_LE:
  1023. ucontrol->value.integer.value[0] = 3;
  1024. break;
  1025. case SNDRV_PCM_FORMAT_S24_3LE:
  1026. ucontrol->value.integer.value[0] = 2;
  1027. break;
  1028. case SNDRV_PCM_FORMAT_S24_LE:
  1029. ucontrol->value.integer.value[0] = 1;
  1030. break;
  1031. case SNDRV_PCM_FORMAT_S16_LE:
  1032. default:
  1033. ucontrol->value.integer.value[0] = 0;
  1034. break;
  1035. }
  1036. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1037. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1038. ucontrol->value.integer.value[0]);
  1039. return 0;
  1040. }
  1041. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1042. struct snd_ctl_elem_value *ucontrol)
  1043. {
  1044. int rc = 0;
  1045. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1046. switch (ucontrol->value.integer.value[0]) {
  1047. case 3:
  1048. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1049. break;
  1050. case 2:
  1051. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1052. break;
  1053. case 1:
  1054. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1055. break;
  1056. case 0:
  1057. default:
  1058. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1059. break;
  1060. }
  1061. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1062. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1063. ucontrol->value.integer.value[0]);
  1064. return rc;
  1065. }
  1066. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1067. {
  1068. int sample_rate_val = 0;
  1069. switch (sample_rate) {
  1070. case SAMPLING_RATE_8KHZ:
  1071. sample_rate_val = 0;
  1072. break;
  1073. case SAMPLING_RATE_16KHZ:
  1074. sample_rate_val = 1;
  1075. break;
  1076. case SAMPLING_RATE_32KHZ:
  1077. sample_rate_val = 2;
  1078. break;
  1079. case SAMPLING_RATE_44P1KHZ:
  1080. sample_rate_val = 3;
  1081. break;
  1082. case SAMPLING_RATE_48KHZ:
  1083. sample_rate_val = 4;
  1084. break;
  1085. case SAMPLING_RATE_88P2KHZ:
  1086. sample_rate_val = 5;
  1087. break;
  1088. case SAMPLING_RATE_96KHZ:
  1089. sample_rate_val = 6;
  1090. break;
  1091. case SAMPLING_RATE_176P4KHZ:
  1092. sample_rate_val = 7;
  1093. break;
  1094. case SAMPLING_RATE_192KHZ:
  1095. sample_rate_val = 8;
  1096. break;
  1097. case SAMPLING_RATE_352P8KHZ:
  1098. sample_rate_val = 9;
  1099. break;
  1100. case SAMPLING_RATE_384KHZ:
  1101. sample_rate_val = 10;
  1102. break;
  1103. default:
  1104. sample_rate_val = 4;
  1105. break;
  1106. }
  1107. return sample_rate_val;
  1108. }
  1109. static int cdc_dma_get_sample_rate(int value)
  1110. {
  1111. int sample_rate = 0;
  1112. switch (value) {
  1113. case 0:
  1114. sample_rate = SAMPLING_RATE_8KHZ;
  1115. break;
  1116. case 1:
  1117. sample_rate = SAMPLING_RATE_16KHZ;
  1118. break;
  1119. case 2:
  1120. sample_rate = SAMPLING_RATE_32KHZ;
  1121. break;
  1122. case 3:
  1123. sample_rate = SAMPLING_RATE_44P1KHZ;
  1124. break;
  1125. case 4:
  1126. sample_rate = SAMPLING_RATE_48KHZ;
  1127. break;
  1128. case 5:
  1129. sample_rate = SAMPLING_RATE_88P2KHZ;
  1130. break;
  1131. case 6:
  1132. sample_rate = SAMPLING_RATE_96KHZ;
  1133. break;
  1134. case 7:
  1135. sample_rate = SAMPLING_RATE_176P4KHZ;
  1136. break;
  1137. case 8:
  1138. sample_rate = SAMPLING_RATE_192KHZ;
  1139. break;
  1140. case 9:
  1141. sample_rate = SAMPLING_RATE_352P8KHZ;
  1142. break;
  1143. case 10:
  1144. sample_rate = SAMPLING_RATE_384KHZ;
  1145. break;
  1146. default:
  1147. sample_rate = SAMPLING_RATE_48KHZ;
  1148. break;
  1149. }
  1150. return sample_rate;
  1151. }
  1152. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1153. struct snd_ctl_elem_value *ucontrol)
  1154. {
  1155. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1156. if (ch_num < 0)
  1157. return ch_num;
  1158. ucontrol->value.enumerated.item[0] =
  1159. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1160. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1161. cdc_dma_rx_cfg[ch_num].sample_rate);
  1162. return 0;
  1163. }
  1164. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1165. struct snd_ctl_elem_value *ucontrol)
  1166. {
  1167. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1168. if (ch_num < 0)
  1169. return ch_num;
  1170. cdc_dma_rx_cfg[ch_num].sample_rate =
  1171. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1172. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1173. __func__, ucontrol->value.enumerated.item[0],
  1174. cdc_dma_rx_cfg[ch_num].sample_rate);
  1175. return 0;
  1176. }
  1177. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1178. struct snd_ctl_elem_value *ucontrol)
  1179. {
  1180. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1181. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1182. cdc_dma_tx_cfg[ch_num].channels);
  1183. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1184. return 0;
  1185. }
  1186. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1187. struct snd_ctl_elem_value *ucontrol)
  1188. {
  1189. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1190. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1191. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1192. cdc_dma_tx_cfg[ch_num].channels);
  1193. return 1;
  1194. }
  1195. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1196. struct snd_ctl_elem_value *ucontrol)
  1197. {
  1198. int sample_rate_val;
  1199. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1200. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1201. case SAMPLING_RATE_384KHZ:
  1202. sample_rate_val = 12;
  1203. break;
  1204. case SAMPLING_RATE_352P8KHZ:
  1205. sample_rate_val = 11;
  1206. break;
  1207. case SAMPLING_RATE_192KHZ:
  1208. sample_rate_val = 10;
  1209. break;
  1210. case SAMPLING_RATE_176P4KHZ:
  1211. sample_rate_val = 9;
  1212. break;
  1213. case SAMPLING_RATE_96KHZ:
  1214. sample_rate_val = 8;
  1215. break;
  1216. case SAMPLING_RATE_88P2KHZ:
  1217. sample_rate_val = 7;
  1218. break;
  1219. case SAMPLING_RATE_48KHZ:
  1220. sample_rate_val = 6;
  1221. break;
  1222. case SAMPLING_RATE_44P1KHZ:
  1223. sample_rate_val = 5;
  1224. break;
  1225. case SAMPLING_RATE_32KHZ:
  1226. sample_rate_val = 4;
  1227. break;
  1228. case SAMPLING_RATE_22P05KHZ:
  1229. sample_rate_val = 3;
  1230. break;
  1231. case SAMPLING_RATE_16KHZ:
  1232. sample_rate_val = 2;
  1233. break;
  1234. case SAMPLING_RATE_11P025KHZ:
  1235. sample_rate_val = 1;
  1236. break;
  1237. case SAMPLING_RATE_8KHZ:
  1238. sample_rate_val = 0;
  1239. break;
  1240. default:
  1241. sample_rate_val = 6;
  1242. break;
  1243. }
  1244. ucontrol->value.integer.value[0] = sample_rate_val;
  1245. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1246. cdc_dma_tx_cfg[ch_num].sample_rate);
  1247. return 0;
  1248. }
  1249. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1250. struct snd_ctl_elem_value *ucontrol)
  1251. {
  1252. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1253. switch (ucontrol->value.integer.value[0]) {
  1254. case 12:
  1255. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1256. break;
  1257. case 11:
  1258. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1259. break;
  1260. case 10:
  1261. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1262. break;
  1263. case 9:
  1264. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1265. break;
  1266. case 8:
  1267. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1268. break;
  1269. case 7:
  1270. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1271. break;
  1272. case 6:
  1273. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1274. break;
  1275. case 5:
  1276. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1277. break;
  1278. case 4:
  1279. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1280. break;
  1281. case 3:
  1282. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1283. break;
  1284. case 2:
  1285. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1286. break;
  1287. case 1:
  1288. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1289. break;
  1290. case 0:
  1291. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1292. break;
  1293. default:
  1294. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1295. break;
  1296. }
  1297. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1298. __func__, ucontrol->value.integer.value[0],
  1299. cdc_dma_tx_cfg[ch_num].sample_rate);
  1300. return 0;
  1301. }
  1302. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1303. struct snd_ctl_elem_value *ucontrol)
  1304. {
  1305. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1306. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1307. case SNDRV_PCM_FORMAT_S32_LE:
  1308. ucontrol->value.integer.value[0] = 3;
  1309. break;
  1310. case SNDRV_PCM_FORMAT_S24_3LE:
  1311. ucontrol->value.integer.value[0] = 2;
  1312. break;
  1313. case SNDRV_PCM_FORMAT_S24_LE:
  1314. ucontrol->value.integer.value[0] = 1;
  1315. break;
  1316. case SNDRV_PCM_FORMAT_S16_LE:
  1317. default:
  1318. ucontrol->value.integer.value[0] = 0;
  1319. break;
  1320. }
  1321. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1322. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1323. ucontrol->value.integer.value[0]);
  1324. return 0;
  1325. }
  1326. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1327. struct snd_ctl_elem_value *ucontrol)
  1328. {
  1329. int rc = 0;
  1330. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1331. switch (ucontrol->value.integer.value[0]) {
  1332. case 3:
  1333. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1334. break;
  1335. case 2:
  1336. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1337. break;
  1338. case 1:
  1339. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1340. break;
  1341. case 0:
  1342. default:
  1343. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1344. break;
  1345. }
  1346. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1347. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1348. ucontrol->value.integer.value[0]);
  1349. return rc;
  1350. }
  1351. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1352. struct snd_ctl_elem_value *ucontrol)
  1353. {
  1354. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1355. usb_rx_cfg.channels);
  1356. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1357. return 0;
  1358. }
  1359. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1360. struct snd_ctl_elem_value *ucontrol)
  1361. {
  1362. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1363. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1364. return 1;
  1365. }
  1366. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1367. struct snd_ctl_elem_value *ucontrol)
  1368. {
  1369. int sample_rate_val;
  1370. switch (usb_rx_cfg.sample_rate) {
  1371. case SAMPLING_RATE_384KHZ:
  1372. sample_rate_val = 12;
  1373. break;
  1374. case SAMPLING_RATE_352P8KHZ:
  1375. sample_rate_val = 11;
  1376. break;
  1377. case SAMPLING_RATE_192KHZ:
  1378. sample_rate_val = 10;
  1379. break;
  1380. case SAMPLING_RATE_176P4KHZ:
  1381. sample_rate_val = 9;
  1382. break;
  1383. case SAMPLING_RATE_96KHZ:
  1384. sample_rate_val = 8;
  1385. break;
  1386. case SAMPLING_RATE_88P2KHZ:
  1387. sample_rate_val = 7;
  1388. break;
  1389. case SAMPLING_RATE_48KHZ:
  1390. sample_rate_val = 6;
  1391. break;
  1392. case SAMPLING_RATE_44P1KHZ:
  1393. sample_rate_val = 5;
  1394. break;
  1395. case SAMPLING_RATE_32KHZ:
  1396. sample_rate_val = 4;
  1397. break;
  1398. case SAMPLING_RATE_22P05KHZ:
  1399. sample_rate_val = 3;
  1400. break;
  1401. case SAMPLING_RATE_16KHZ:
  1402. sample_rate_val = 2;
  1403. break;
  1404. case SAMPLING_RATE_11P025KHZ:
  1405. sample_rate_val = 1;
  1406. break;
  1407. case SAMPLING_RATE_8KHZ:
  1408. default:
  1409. sample_rate_val = 0;
  1410. break;
  1411. }
  1412. ucontrol->value.integer.value[0] = sample_rate_val;
  1413. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1414. usb_rx_cfg.sample_rate);
  1415. return 0;
  1416. }
  1417. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1418. struct snd_ctl_elem_value *ucontrol)
  1419. {
  1420. switch (ucontrol->value.integer.value[0]) {
  1421. case 12:
  1422. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1423. break;
  1424. case 11:
  1425. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1426. break;
  1427. case 10:
  1428. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1429. break;
  1430. case 9:
  1431. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1432. break;
  1433. case 8:
  1434. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1435. break;
  1436. case 7:
  1437. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1438. break;
  1439. case 6:
  1440. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1441. break;
  1442. case 5:
  1443. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1444. break;
  1445. case 4:
  1446. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1447. break;
  1448. case 3:
  1449. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1450. break;
  1451. case 2:
  1452. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1453. break;
  1454. case 1:
  1455. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1456. break;
  1457. case 0:
  1458. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1459. break;
  1460. default:
  1461. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1462. break;
  1463. }
  1464. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1465. __func__, ucontrol->value.integer.value[0],
  1466. usb_rx_cfg.sample_rate);
  1467. return 0;
  1468. }
  1469. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1470. struct snd_ctl_elem_value *ucontrol)
  1471. {
  1472. switch (usb_rx_cfg.bit_format) {
  1473. case SNDRV_PCM_FORMAT_S32_LE:
  1474. ucontrol->value.integer.value[0] = 3;
  1475. break;
  1476. case SNDRV_PCM_FORMAT_S24_3LE:
  1477. ucontrol->value.integer.value[0] = 2;
  1478. break;
  1479. case SNDRV_PCM_FORMAT_S24_LE:
  1480. ucontrol->value.integer.value[0] = 1;
  1481. break;
  1482. case SNDRV_PCM_FORMAT_S16_LE:
  1483. default:
  1484. ucontrol->value.integer.value[0] = 0;
  1485. break;
  1486. }
  1487. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1488. __func__, usb_rx_cfg.bit_format,
  1489. ucontrol->value.integer.value[0]);
  1490. return 0;
  1491. }
  1492. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1493. struct snd_ctl_elem_value *ucontrol)
  1494. {
  1495. int rc = 0;
  1496. switch (ucontrol->value.integer.value[0]) {
  1497. case 3:
  1498. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1499. break;
  1500. case 2:
  1501. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1502. break;
  1503. case 1:
  1504. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1505. break;
  1506. case 0:
  1507. default:
  1508. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1509. break;
  1510. }
  1511. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1512. __func__, usb_rx_cfg.bit_format,
  1513. ucontrol->value.integer.value[0]);
  1514. return rc;
  1515. }
  1516. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1517. struct snd_ctl_elem_value *ucontrol)
  1518. {
  1519. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1520. usb_tx_cfg.channels);
  1521. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1522. return 0;
  1523. }
  1524. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1525. struct snd_ctl_elem_value *ucontrol)
  1526. {
  1527. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1528. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1529. return 1;
  1530. }
  1531. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. int sample_rate_val;
  1535. switch (usb_tx_cfg.sample_rate) {
  1536. case SAMPLING_RATE_384KHZ:
  1537. sample_rate_val = 12;
  1538. break;
  1539. case SAMPLING_RATE_352P8KHZ:
  1540. sample_rate_val = 11;
  1541. break;
  1542. case SAMPLING_RATE_192KHZ:
  1543. sample_rate_val = 10;
  1544. break;
  1545. case SAMPLING_RATE_176P4KHZ:
  1546. sample_rate_val = 9;
  1547. break;
  1548. case SAMPLING_RATE_96KHZ:
  1549. sample_rate_val = 8;
  1550. break;
  1551. case SAMPLING_RATE_88P2KHZ:
  1552. sample_rate_val = 7;
  1553. break;
  1554. case SAMPLING_RATE_48KHZ:
  1555. sample_rate_val = 6;
  1556. break;
  1557. case SAMPLING_RATE_44P1KHZ:
  1558. sample_rate_val = 5;
  1559. break;
  1560. case SAMPLING_RATE_32KHZ:
  1561. sample_rate_val = 4;
  1562. break;
  1563. case SAMPLING_RATE_22P05KHZ:
  1564. sample_rate_val = 3;
  1565. break;
  1566. case SAMPLING_RATE_16KHZ:
  1567. sample_rate_val = 2;
  1568. break;
  1569. case SAMPLING_RATE_11P025KHZ:
  1570. sample_rate_val = 1;
  1571. break;
  1572. case SAMPLING_RATE_8KHZ:
  1573. sample_rate_val = 0;
  1574. break;
  1575. default:
  1576. sample_rate_val = 6;
  1577. break;
  1578. }
  1579. ucontrol->value.integer.value[0] = sample_rate_val;
  1580. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1581. usb_tx_cfg.sample_rate);
  1582. return 0;
  1583. }
  1584. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1585. struct snd_ctl_elem_value *ucontrol)
  1586. {
  1587. switch (ucontrol->value.integer.value[0]) {
  1588. case 12:
  1589. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1590. break;
  1591. case 11:
  1592. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1593. break;
  1594. case 10:
  1595. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1596. break;
  1597. case 9:
  1598. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1599. break;
  1600. case 8:
  1601. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1602. break;
  1603. case 7:
  1604. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1605. break;
  1606. case 6:
  1607. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1608. break;
  1609. case 5:
  1610. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1611. break;
  1612. case 4:
  1613. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1614. break;
  1615. case 3:
  1616. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1617. break;
  1618. case 2:
  1619. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1620. break;
  1621. case 1:
  1622. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1623. break;
  1624. case 0:
  1625. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1626. break;
  1627. default:
  1628. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1629. break;
  1630. }
  1631. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1632. __func__, ucontrol->value.integer.value[0],
  1633. usb_tx_cfg.sample_rate);
  1634. return 0;
  1635. }
  1636. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1637. struct snd_ctl_elem_value *ucontrol)
  1638. {
  1639. switch (usb_tx_cfg.bit_format) {
  1640. case SNDRV_PCM_FORMAT_S32_LE:
  1641. ucontrol->value.integer.value[0] = 3;
  1642. break;
  1643. case SNDRV_PCM_FORMAT_S24_3LE:
  1644. ucontrol->value.integer.value[0] = 2;
  1645. break;
  1646. case SNDRV_PCM_FORMAT_S24_LE:
  1647. ucontrol->value.integer.value[0] = 1;
  1648. break;
  1649. case SNDRV_PCM_FORMAT_S16_LE:
  1650. default:
  1651. ucontrol->value.integer.value[0] = 0;
  1652. break;
  1653. }
  1654. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1655. __func__, usb_tx_cfg.bit_format,
  1656. ucontrol->value.integer.value[0]);
  1657. return 0;
  1658. }
  1659. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1660. struct snd_ctl_elem_value *ucontrol)
  1661. {
  1662. int rc = 0;
  1663. switch (ucontrol->value.integer.value[0]) {
  1664. case 3:
  1665. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1666. break;
  1667. case 2:
  1668. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1669. break;
  1670. case 1:
  1671. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1672. break;
  1673. case 0:
  1674. default:
  1675. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1676. break;
  1677. }
  1678. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1679. __func__, usb_tx_cfg.bit_format,
  1680. ucontrol->value.integer.value[0]);
  1681. return rc;
  1682. }
  1683. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1684. struct snd_ctl_elem_value *ucontrol)
  1685. {
  1686. pr_debug("%s: proxy_rx channels = %d\n",
  1687. __func__, proxy_rx_cfg.channels);
  1688. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1689. return 0;
  1690. }
  1691. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1692. struct snd_ctl_elem_value *ucontrol)
  1693. {
  1694. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1695. pr_debug("%s: proxy_rx channels = %d\n",
  1696. __func__, proxy_rx_cfg.channels);
  1697. return 1;
  1698. }
  1699. static int tdm_get_sample_rate(int value)
  1700. {
  1701. int sample_rate = 0;
  1702. switch (value) {
  1703. case 0:
  1704. sample_rate = SAMPLING_RATE_8KHZ;
  1705. break;
  1706. case 1:
  1707. sample_rate = SAMPLING_RATE_16KHZ;
  1708. break;
  1709. case 2:
  1710. sample_rate = SAMPLING_RATE_32KHZ;
  1711. break;
  1712. case 3:
  1713. sample_rate = SAMPLING_RATE_48KHZ;
  1714. break;
  1715. case 4:
  1716. sample_rate = SAMPLING_RATE_176P4KHZ;
  1717. break;
  1718. case 5:
  1719. sample_rate = SAMPLING_RATE_352P8KHZ;
  1720. break;
  1721. default:
  1722. sample_rate = SAMPLING_RATE_48KHZ;
  1723. break;
  1724. }
  1725. return sample_rate;
  1726. }
  1727. static int aux_pcm_get_sample_rate(int value)
  1728. {
  1729. int sample_rate;
  1730. switch (value) {
  1731. case 1:
  1732. sample_rate = SAMPLING_RATE_16KHZ;
  1733. break;
  1734. case 0:
  1735. default:
  1736. sample_rate = SAMPLING_RATE_8KHZ;
  1737. break;
  1738. }
  1739. return sample_rate;
  1740. }
  1741. static int tdm_get_sample_rate_val(int sample_rate)
  1742. {
  1743. int sample_rate_val = 0;
  1744. switch (sample_rate) {
  1745. case SAMPLING_RATE_8KHZ:
  1746. sample_rate_val = 0;
  1747. break;
  1748. case SAMPLING_RATE_16KHZ:
  1749. sample_rate_val = 1;
  1750. break;
  1751. case SAMPLING_RATE_32KHZ:
  1752. sample_rate_val = 2;
  1753. break;
  1754. case SAMPLING_RATE_48KHZ:
  1755. sample_rate_val = 3;
  1756. break;
  1757. case SAMPLING_RATE_176P4KHZ:
  1758. sample_rate_val = 4;
  1759. break;
  1760. case SAMPLING_RATE_352P8KHZ:
  1761. sample_rate_val = 5;
  1762. break;
  1763. default:
  1764. sample_rate_val = 3;
  1765. break;
  1766. }
  1767. return sample_rate_val;
  1768. }
  1769. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1770. {
  1771. int sample_rate_val;
  1772. switch (sample_rate) {
  1773. case SAMPLING_RATE_16KHZ:
  1774. sample_rate_val = 1;
  1775. break;
  1776. case SAMPLING_RATE_8KHZ:
  1777. default:
  1778. sample_rate_val = 0;
  1779. break;
  1780. }
  1781. return sample_rate_val;
  1782. }
  1783. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1784. struct tdm_port *port)
  1785. {
  1786. if (port) {
  1787. if (strnstr(kcontrol->id.name, "PRI",
  1788. sizeof(kcontrol->id.name))) {
  1789. port->mode = TDM_PRI;
  1790. } else if (strnstr(kcontrol->id.name, "SEC",
  1791. sizeof(kcontrol->id.name))) {
  1792. port->mode = TDM_SEC;
  1793. } else if (strnstr(kcontrol->id.name, "TERT",
  1794. sizeof(kcontrol->id.name))) {
  1795. port->mode = TDM_TERT;
  1796. } else if (strnstr(kcontrol->id.name, "QUAT",
  1797. sizeof(kcontrol->id.name))) {
  1798. port->mode = TDM_QUAT;
  1799. } else if (strnstr(kcontrol->id.name, "QUIN",
  1800. sizeof(kcontrol->id.name))) {
  1801. port->mode = TDM_QUIN;
  1802. } else {
  1803. pr_err("%s: unsupported mode in: %s",
  1804. __func__, kcontrol->id.name);
  1805. return -EINVAL;
  1806. }
  1807. if (strnstr(kcontrol->id.name, "RX_0",
  1808. sizeof(kcontrol->id.name)) ||
  1809. strnstr(kcontrol->id.name, "TX_0",
  1810. sizeof(kcontrol->id.name))) {
  1811. port->channel = TDM_0;
  1812. } else if (strnstr(kcontrol->id.name, "RX_1",
  1813. sizeof(kcontrol->id.name)) ||
  1814. strnstr(kcontrol->id.name, "TX_1",
  1815. sizeof(kcontrol->id.name))) {
  1816. port->channel = TDM_1;
  1817. } else if (strnstr(kcontrol->id.name, "RX_2",
  1818. sizeof(kcontrol->id.name)) ||
  1819. strnstr(kcontrol->id.name, "TX_2",
  1820. sizeof(kcontrol->id.name))) {
  1821. port->channel = TDM_2;
  1822. } else if (strnstr(kcontrol->id.name, "RX_3",
  1823. sizeof(kcontrol->id.name)) ||
  1824. strnstr(kcontrol->id.name, "TX_3",
  1825. sizeof(kcontrol->id.name))) {
  1826. port->channel = TDM_3;
  1827. } else if (strnstr(kcontrol->id.name, "RX_4",
  1828. sizeof(kcontrol->id.name)) ||
  1829. strnstr(kcontrol->id.name, "TX_4",
  1830. sizeof(kcontrol->id.name))) {
  1831. port->channel = TDM_4;
  1832. } else if (strnstr(kcontrol->id.name, "RX_5",
  1833. sizeof(kcontrol->id.name)) ||
  1834. strnstr(kcontrol->id.name, "TX_5",
  1835. sizeof(kcontrol->id.name))) {
  1836. port->channel = TDM_5;
  1837. } else if (strnstr(kcontrol->id.name, "RX_6",
  1838. sizeof(kcontrol->id.name)) ||
  1839. strnstr(kcontrol->id.name, "TX_6",
  1840. sizeof(kcontrol->id.name))) {
  1841. port->channel = TDM_6;
  1842. } else if (strnstr(kcontrol->id.name, "RX_7",
  1843. sizeof(kcontrol->id.name)) ||
  1844. strnstr(kcontrol->id.name, "TX_7",
  1845. sizeof(kcontrol->id.name))) {
  1846. port->channel = TDM_7;
  1847. } else {
  1848. pr_err("%s: unsupported channel in: %s",
  1849. __func__, kcontrol->id.name);
  1850. return -EINVAL;
  1851. }
  1852. } else
  1853. return -EINVAL;
  1854. return 0;
  1855. }
  1856. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1857. struct snd_ctl_elem_value *ucontrol)
  1858. {
  1859. struct tdm_port port;
  1860. int ret = tdm_get_port_idx(kcontrol, &port);
  1861. if (ret) {
  1862. pr_err("%s: unsupported control: %s",
  1863. __func__, kcontrol->id.name);
  1864. } else {
  1865. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1866. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1867. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1868. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1869. ucontrol->value.enumerated.item[0]);
  1870. }
  1871. return ret;
  1872. }
  1873. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1874. struct snd_ctl_elem_value *ucontrol)
  1875. {
  1876. struct tdm_port port;
  1877. int ret = tdm_get_port_idx(kcontrol, &port);
  1878. if (ret) {
  1879. pr_err("%s: unsupported control: %s",
  1880. __func__, kcontrol->id.name);
  1881. } else {
  1882. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1883. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1884. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1885. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1886. ucontrol->value.enumerated.item[0]);
  1887. }
  1888. return ret;
  1889. }
  1890. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1891. struct snd_ctl_elem_value *ucontrol)
  1892. {
  1893. struct tdm_port port;
  1894. int ret = tdm_get_port_idx(kcontrol, &port);
  1895. if (ret) {
  1896. pr_err("%s: unsupported control: %s",
  1897. __func__, kcontrol->id.name);
  1898. } else {
  1899. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1900. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1901. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1902. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1903. ucontrol->value.enumerated.item[0]);
  1904. }
  1905. return ret;
  1906. }
  1907. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1908. struct snd_ctl_elem_value *ucontrol)
  1909. {
  1910. struct tdm_port port;
  1911. int ret = tdm_get_port_idx(kcontrol, &port);
  1912. if (ret) {
  1913. pr_err("%s: unsupported control: %s",
  1914. __func__, kcontrol->id.name);
  1915. } else {
  1916. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1917. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1918. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1919. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1920. ucontrol->value.enumerated.item[0]);
  1921. }
  1922. return ret;
  1923. }
  1924. static int tdm_get_format(int value)
  1925. {
  1926. int format = 0;
  1927. switch (value) {
  1928. case 0:
  1929. format = SNDRV_PCM_FORMAT_S16_LE;
  1930. break;
  1931. case 1:
  1932. format = SNDRV_PCM_FORMAT_S24_LE;
  1933. break;
  1934. case 2:
  1935. format = SNDRV_PCM_FORMAT_S32_LE;
  1936. break;
  1937. default:
  1938. format = SNDRV_PCM_FORMAT_S16_LE;
  1939. break;
  1940. }
  1941. return format;
  1942. }
  1943. static int tdm_get_format_val(int format)
  1944. {
  1945. int value = 0;
  1946. switch (format) {
  1947. case SNDRV_PCM_FORMAT_S16_LE:
  1948. value = 0;
  1949. break;
  1950. case SNDRV_PCM_FORMAT_S24_LE:
  1951. value = 1;
  1952. break;
  1953. case SNDRV_PCM_FORMAT_S32_LE:
  1954. value = 2;
  1955. break;
  1956. default:
  1957. value = 0;
  1958. break;
  1959. }
  1960. return value;
  1961. }
  1962. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1963. struct snd_ctl_elem_value *ucontrol)
  1964. {
  1965. struct tdm_port port;
  1966. int ret = tdm_get_port_idx(kcontrol, &port);
  1967. if (ret) {
  1968. pr_err("%s: unsupported control: %s",
  1969. __func__, kcontrol->id.name);
  1970. } else {
  1971. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1972. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1973. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1974. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1975. ucontrol->value.enumerated.item[0]);
  1976. }
  1977. return ret;
  1978. }
  1979. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1980. struct snd_ctl_elem_value *ucontrol)
  1981. {
  1982. struct tdm_port port;
  1983. int ret = tdm_get_port_idx(kcontrol, &port);
  1984. if (ret) {
  1985. pr_err("%s: unsupported control: %s",
  1986. __func__, kcontrol->id.name);
  1987. } else {
  1988. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1989. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1990. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1991. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1992. ucontrol->value.enumerated.item[0]);
  1993. }
  1994. return ret;
  1995. }
  1996. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1997. struct snd_ctl_elem_value *ucontrol)
  1998. {
  1999. struct tdm_port port;
  2000. int ret = tdm_get_port_idx(kcontrol, &port);
  2001. if (ret) {
  2002. pr_err("%s: unsupported control: %s",
  2003. __func__, kcontrol->id.name);
  2004. } else {
  2005. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2006. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2007. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2008. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2009. ucontrol->value.enumerated.item[0]);
  2010. }
  2011. return ret;
  2012. }
  2013. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2014. struct snd_ctl_elem_value *ucontrol)
  2015. {
  2016. struct tdm_port port;
  2017. int ret = tdm_get_port_idx(kcontrol, &port);
  2018. if (ret) {
  2019. pr_err("%s: unsupported control: %s",
  2020. __func__, kcontrol->id.name);
  2021. } else {
  2022. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2023. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2024. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2025. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2026. ucontrol->value.enumerated.item[0]);
  2027. }
  2028. return ret;
  2029. }
  2030. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2031. struct snd_ctl_elem_value *ucontrol)
  2032. {
  2033. struct tdm_port port;
  2034. int ret = tdm_get_port_idx(kcontrol, &port);
  2035. if (ret) {
  2036. pr_err("%s: unsupported control: %s",
  2037. __func__, kcontrol->id.name);
  2038. } else {
  2039. ucontrol->value.enumerated.item[0] =
  2040. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2041. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2042. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2043. ucontrol->value.enumerated.item[0]);
  2044. }
  2045. return ret;
  2046. }
  2047. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2048. struct snd_ctl_elem_value *ucontrol)
  2049. {
  2050. struct tdm_port port;
  2051. int ret = tdm_get_port_idx(kcontrol, &port);
  2052. if (ret) {
  2053. pr_err("%s: unsupported control: %s",
  2054. __func__, kcontrol->id.name);
  2055. } else {
  2056. tdm_rx_cfg[port.mode][port.channel].channels =
  2057. ucontrol->value.enumerated.item[0] + 1;
  2058. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2059. tdm_rx_cfg[port.mode][port.channel].channels,
  2060. ucontrol->value.enumerated.item[0] + 1);
  2061. }
  2062. return ret;
  2063. }
  2064. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2065. struct snd_ctl_elem_value *ucontrol)
  2066. {
  2067. struct tdm_port port;
  2068. int ret = tdm_get_port_idx(kcontrol, &port);
  2069. if (ret) {
  2070. pr_err("%s: unsupported control: %s",
  2071. __func__, kcontrol->id.name);
  2072. } else {
  2073. ucontrol->value.enumerated.item[0] =
  2074. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2075. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2076. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2077. ucontrol->value.enumerated.item[0]);
  2078. }
  2079. return ret;
  2080. }
  2081. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2082. struct snd_ctl_elem_value *ucontrol)
  2083. {
  2084. struct tdm_port port;
  2085. int ret = tdm_get_port_idx(kcontrol, &port);
  2086. if (ret) {
  2087. pr_err("%s: unsupported control: %s",
  2088. __func__, kcontrol->id.name);
  2089. } else {
  2090. tdm_tx_cfg[port.mode][port.channel].channels =
  2091. ucontrol->value.enumerated.item[0] + 1;
  2092. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2093. tdm_tx_cfg[port.mode][port.channel].channels,
  2094. ucontrol->value.enumerated.item[0] + 1);
  2095. }
  2096. return ret;
  2097. }
  2098. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2099. {
  2100. int idx;
  2101. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2102. sizeof("PRIM_AUX_PCM")))
  2103. idx = PRIM_AUX_PCM;
  2104. else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2105. sizeof("SEC_AUX_PCM")))
  2106. idx = SEC_AUX_PCM;
  2107. else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2108. sizeof("TERT_AUX_PCM")))
  2109. idx = TERT_AUX_PCM;
  2110. else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2111. sizeof("QUAT_AUX_PCM")))
  2112. idx = QUAT_AUX_PCM;
  2113. else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2114. sizeof("QUIN_AUX_PCM")))
  2115. idx = QUIN_AUX_PCM;
  2116. else {
  2117. pr_err("%s: unsupported port: %s",
  2118. __func__, kcontrol->id.name);
  2119. idx = -EINVAL;
  2120. }
  2121. return idx;
  2122. }
  2123. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2124. struct snd_ctl_elem_value *ucontrol)
  2125. {
  2126. int idx = aux_pcm_get_port_idx(kcontrol);
  2127. if (idx < 0)
  2128. return idx;
  2129. aux_pcm_rx_cfg[idx].sample_rate =
  2130. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2131. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2132. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2133. ucontrol->value.enumerated.item[0]);
  2134. return 0;
  2135. }
  2136. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2137. struct snd_ctl_elem_value *ucontrol)
  2138. {
  2139. int idx = aux_pcm_get_port_idx(kcontrol);
  2140. if (idx < 0)
  2141. return idx;
  2142. ucontrol->value.enumerated.item[0] =
  2143. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2144. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2145. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2146. ucontrol->value.enumerated.item[0]);
  2147. return 0;
  2148. }
  2149. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2150. struct snd_ctl_elem_value *ucontrol)
  2151. {
  2152. int idx = aux_pcm_get_port_idx(kcontrol);
  2153. if (idx < 0)
  2154. return idx;
  2155. aux_pcm_tx_cfg[idx].sample_rate =
  2156. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2157. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2158. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2159. ucontrol->value.enumerated.item[0]);
  2160. return 0;
  2161. }
  2162. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2163. struct snd_ctl_elem_value *ucontrol)
  2164. {
  2165. int idx = aux_pcm_get_port_idx(kcontrol);
  2166. if (idx < 0)
  2167. return idx;
  2168. ucontrol->value.enumerated.item[0] =
  2169. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2170. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2171. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2172. ucontrol->value.enumerated.item[0]);
  2173. return 0;
  2174. }
  2175. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2176. {
  2177. int idx;
  2178. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2179. sizeof("PRIM_MI2S_RX")))
  2180. idx = PRIM_MI2S;
  2181. else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2182. sizeof("SEC_MI2S_RX")))
  2183. idx = SEC_MI2S;
  2184. else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2185. sizeof("TERT_MI2S_RX")))
  2186. idx = TERT_MI2S;
  2187. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2188. sizeof("QUAT_MI2S_RX")))
  2189. idx = QUAT_MI2S;
  2190. else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2191. sizeof("QUIN_MI2S_RX")))
  2192. idx = QUIN_MI2S;
  2193. else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2194. sizeof("PRIM_MI2S_TX")))
  2195. idx = PRIM_MI2S;
  2196. else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2197. sizeof("SEC_MI2S_TX")))
  2198. idx = SEC_MI2S;
  2199. else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2200. sizeof("TERT_MI2S_TX")))
  2201. idx = TERT_MI2S;
  2202. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2203. sizeof("QUAT_MI2S_TX")))
  2204. idx = QUAT_MI2S;
  2205. else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2206. sizeof("QUIN_MI2S_TX")))
  2207. idx = QUIN_MI2S;
  2208. else {
  2209. pr_err("%s: unsupported channel: %s",
  2210. __func__, kcontrol->id.name);
  2211. idx = -EINVAL;
  2212. }
  2213. return idx;
  2214. }
  2215. static int mi2s_get_sample_rate_val(int sample_rate)
  2216. {
  2217. int sample_rate_val;
  2218. switch (sample_rate) {
  2219. case SAMPLING_RATE_8KHZ:
  2220. sample_rate_val = 0;
  2221. break;
  2222. case SAMPLING_RATE_11P025KHZ:
  2223. sample_rate_val = 1;
  2224. break;
  2225. case SAMPLING_RATE_16KHZ:
  2226. sample_rate_val = 2;
  2227. break;
  2228. case SAMPLING_RATE_22P05KHZ:
  2229. sample_rate_val = 3;
  2230. break;
  2231. case SAMPLING_RATE_32KHZ:
  2232. sample_rate_val = 4;
  2233. break;
  2234. case SAMPLING_RATE_44P1KHZ:
  2235. sample_rate_val = 5;
  2236. break;
  2237. case SAMPLING_RATE_48KHZ:
  2238. sample_rate_val = 6;
  2239. break;
  2240. case SAMPLING_RATE_96KHZ:
  2241. sample_rate_val = 7;
  2242. break;
  2243. case SAMPLING_RATE_192KHZ:
  2244. sample_rate_val = 8;
  2245. break;
  2246. default:
  2247. sample_rate_val = 6;
  2248. break;
  2249. }
  2250. return sample_rate_val;
  2251. }
  2252. static int mi2s_get_sample_rate(int value)
  2253. {
  2254. int sample_rate;
  2255. switch (value) {
  2256. case 0:
  2257. sample_rate = SAMPLING_RATE_8KHZ;
  2258. break;
  2259. case 1:
  2260. sample_rate = SAMPLING_RATE_11P025KHZ;
  2261. break;
  2262. case 2:
  2263. sample_rate = SAMPLING_RATE_16KHZ;
  2264. break;
  2265. case 3:
  2266. sample_rate = SAMPLING_RATE_22P05KHZ;
  2267. break;
  2268. case 4:
  2269. sample_rate = SAMPLING_RATE_32KHZ;
  2270. break;
  2271. case 5:
  2272. sample_rate = SAMPLING_RATE_44P1KHZ;
  2273. break;
  2274. case 6:
  2275. sample_rate = SAMPLING_RATE_48KHZ;
  2276. break;
  2277. case 7:
  2278. sample_rate = SAMPLING_RATE_96KHZ;
  2279. break;
  2280. case 8:
  2281. sample_rate = SAMPLING_RATE_192KHZ;
  2282. break;
  2283. default:
  2284. sample_rate = SAMPLING_RATE_48KHZ;
  2285. break;
  2286. }
  2287. return sample_rate;
  2288. }
  2289. static int mi2s_auxpcm_get_format(int value)
  2290. {
  2291. int format;
  2292. switch (value) {
  2293. case 0:
  2294. format = SNDRV_PCM_FORMAT_S16_LE;
  2295. break;
  2296. case 1:
  2297. format = SNDRV_PCM_FORMAT_S24_LE;
  2298. break;
  2299. case 2:
  2300. format = SNDRV_PCM_FORMAT_S24_3LE;
  2301. break;
  2302. case 3:
  2303. format = SNDRV_PCM_FORMAT_S32_LE;
  2304. break;
  2305. default:
  2306. format = SNDRV_PCM_FORMAT_S16_LE;
  2307. break;
  2308. }
  2309. return format;
  2310. }
  2311. static int mi2s_auxpcm_get_format_value(int format)
  2312. {
  2313. int value;
  2314. switch (format) {
  2315. case SNDRV_PCM_FORMAT_S16_LE:
  2316. value = 0;
  2317. break;
  2318. case SNDRV_PCM_FORMAT_S24_LE:
  2319. value = 1;
  2320. break;
  2321. case SNDRV_PCM_FORMAT_S24_3LE:
  2322. value = 2;
  2323. break;
  2324. case SNDRV_PCM_FORMAT_S32_LE:
  2325. value = 3;
  2326. break;
  2327. default:
  2328. value = 0;
  2329. break;
  2330. }
  2331. return value;
  2332. }
  2333. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2334. struct snd_ctl_elem_value *ucontrol)
  2335. {
  2336. int idx = mi2s_get_port_idx(kcontrol);
  2337. if (idx < 0)
  2338. return idx;
  2339. mi2s_rx_cfg[idx].sample_rate =
  2340. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2341. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2342. idx, mi2s_rx_cfg[idx].sample_rate,
  2343. ucontrol->value.enumerated.item[0]);
  2344. return 0;
  2345. }
  2346. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2347. struct snd_ctl_elem_value *ucontrol)
  2348. {
  2349. int idx = mi2s_get_port_idx(kcontrol);
  2350. if (idx < 0)
  2351. return idx;
  2352. ucontrol->value.enumerated.item[0] =
  2353. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2354. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2355. idx, mi2s_rx_cfg[idx].sample_rate,
  2356. ucontrol->value.enumerated.item[0]);
  2357. return 0;
  2358. }
  2359. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2360. struct snd_ctl_elem_value *ucontrol)
  2361. {
  2362. int idx = mi2s_get_port_idx(kcontrol);
  2363. if (idx < 0)
  2364. return idx;
  2365. mi2s_tx_cfg[idx].sample_rate =
  2366. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2367. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2368. idx, mi2s_tx_cfg[idx].sample_rate,
  2369. ucontrol->value.enumerated.item[0]);
  2370. return 0;
  2371. }
  2372. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2373. struct snd_ctl_elem_value *ucontrol)
  2374. {
  2375. int idx = mi2s_get_port_idx(kcontrol);
  2376. if (idx < 0)
  2377. return idx;
  2378. ucontrol->value.enumerated.item[0] =
  2379. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2380. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2381. idx, mi2s_tx_cfg[idx].sample_rate,
  2382. ucontrol->value.enumerated.item[0]);
  2383. return 0;
  2384. }
  2385. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2386. struct snd_ctl_elem_value *ucontrol)
  2387. {
  2388. int idx = mi2s_get_port_idx(kcontrol);
  2389. if (idx < 0)
  2390. return idx;
  2391. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2392. idx, mi2s_rx_cfg[idx].channels);
  2393. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2394. return 0;
  2395. }
  2396. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2397. struct snd_ctl_elem_value *ucontrol)
  2398. {
  2399. int idx = mi2s_get_port_idx(kcontrol);
  2400. if (idx < 0)
  2401. return idx;
  2402. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2403. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2404. idx, mi2s_rx_cfg[idx].channels);
  2405. return 1;
  2406. }
  2407. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2408. struct snd_ctl_elem_value *ucontrol)
  2409. {
  2410. int idx = mi2s_get_port_idx(kcontrol);
  2411. if (idx < 0)
  2412. return idx;
  2413. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2414. idx, mi2s_tx_cfg[idx].channels);
  2415. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2416. return 0;
  2417. }
  2418. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2419. struct snd_ctl_elem_value *ucontrol)
  2420. {
  2421. int idx = mi2s_get_port_idx(kcontrol);
  2422. if (idx < 0)
  2423. return idx;
  2424. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2425. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2426. idx, mi2s_tx_cfg[idx].channels);
  2427. return 1;
  2428. }
  2429. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2430. struct snd_ctl_elem_value *ucontrol)
  2431. {
  2432. int idx = mi2s_get_port_idx(kcontrol);
  2433. if (idx < 0)
  2434. return idx;
  2435. ucontrol->value.enumerated.item[0] =
  2436. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2437. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2438. idx, mi2s_rx_cfg[idx].bit_format,
  2439. ucontrol->value.enumerated.item[0]);
  2440. return 0;
  2441. }
  2442. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2443. struct snd_ctl_elem_value *ucontrol)
  2444. {
  2445. int idx = mi2s_get_port_idx(kcontrol);
  2446. if (idx < 0)
  2447. return idx;
  2448. mi2s_rx_cfg[idx].bit_format =
  2449. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2450. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2451. idx, mi2s_rx_cfg[idx].bit_format,
  2452. ucontrol->value.enumerated.item[0]);
  2453. return 0;
  2454. }
  2455. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2456. struct snd_ctl_elem_value *ucontrol)
  2457. {
  2458. int idx = mi2s_get_port_idx(kcontrol);
  2459. if (idx < 0)
  2460. return idx;
  2461. ucontrol->value.enumerated.item[0] =
  2462. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2463. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2464. idx, mi2s_tx_cfg[idx].bit_format,
  2465. ucontrol->value.enumerated.item[0]);
  2466. return 0;
  2467. }
  2468. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2469. struct snd_ctl_elem_value *ucontrol)
  2470. {
  2471. int idx = mi2s_get_port_idx(kcontrol);
  2472. if (idx < 0)
  2473. return idx;
  2474. mi2s_tx_cfg[idx].bit_format =
  2475. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2476. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2477. idx, mi2s_tx_cfg[idx].bit_format,
  2478. ucontrol->value.enumerated.item[0]);
  2479. return 0;
  2480. }
  2481. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2482. struct snd_ctl_elem_value *ucontrol)
  2483. {
  2484. int idx = aux_pcm_get_port_idx(kcontrol);
  2485. if (idx < 0)
  2486. return idx;
  2487. ucontrol->value.enumerated.item[0] =
  2488. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2489. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2490. idx, aux_pcm_rx_cfg[idx].bit_format,
  2491. ucontrol->value.enumerated.item[0]);
  2492. return 0;
  2493. }
  2494. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2495. struct snd_ctl_elem_value *ucontrol)
  2496. {
  2497. int idx = aux_pcm_get_port_idx(kcontrol);
  2498. if (idx < 0)
  2499. return idx;
  2500. aux_pcm_rx_cfg[idx].bit_format =
  2501. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2502. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2503. idx, aux_pcm_rx_cfg[idx].bit_format,
  2504. ucontrol->value.enumerated.item[0]);
  2505. return 0;
  2506. }
  2507. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2508. struct snd_ctl_elem_value *ucontrol)
  2509. {
  2510. int idx = aux_pcm_get_port_idx(kcontrol);
  2511. if (idx < 0)
  2512. return idx;
  2513. ucontrol->value.enumerated.item[0] =
  2514. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2515. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2516. idx, aux_pcm_tx_cfg[idx].bit_format,
  2517. ucontrol->value.enumerated.item[0]);
  2518. return 0;
  2519. }
  2520. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2521. struct snd_ctl_elem_value *ucontrol)
  2522. {
  2523. int idx = aux_pcm_get_port_idx(kcontrol);
  2524. if (idx < 0)
  2525. return idx;
  2526. aux_pcm_tx_cfg[idx].bit_format =
  2527. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2528. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2529. idx, aux_pcm_tx_cfg[idx].bit_format,
  2530. ucontrol->value.enumerated.item[0]);
  2531. return 0;
  2532. }
  2533. static const struct snd_kcontrol_new msm_snd_sb_controls[] = {
  2534. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2535. slim_rx_ch_get, slim_rx_ch_put),
  2536. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2537. slim_rx_ch_get, slim_rx_ch_put),
  2538. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2539. slim_tx_ch_get, slim_tx_ch_put),
  2540. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2541. slim_tx_ch_get, slim_tx_ch_put),
  2542. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2543. slim_rx_ch_get, slim_rx_ch_put),
  2544. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2545. slim_rx_ch_get, slim_rx_ch_put),
  2546. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2547. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2548. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2549. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2550. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2551. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2552. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2553. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2554. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2555. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2556. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2557. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2558. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2559. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2560. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2561. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2562. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2563. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2564. };
  2565. static const struct snd_kcontrol_new msm_snd_va_controls[] = {
  2566. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2567. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2568. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2569. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2570. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2571. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2572. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2573. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2574. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2575. va_cdc_dma_tx_0_sample_rate,
  2576. cdc_dma_tx_sample_rate_get,
  2577. cdc_dma_tx_sample_rate_put),
  2578. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2579. va_cdc_dma_tx_1_sample_rate,
  2580. cdc_dma_tx_sample_rate_get,
  2581. cdc_dma_tx_sample_rate_put),
  2582. };
  2583. static const struct snd_kcontrol_new msm_snd_wsa_controls[] = {
  2584. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2585. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2586. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2587. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2588. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2589. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2590. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2591. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2592. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2593. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2594. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2595. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2596. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2597. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2598. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2599. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2600. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2601. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2602. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2603. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2604. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2605. wsa_cdc_dma_rx_0_sample_rate,
  2606. cdc_dma_rx_sample_rate_get,
  2607. cdc_dma_rx_sample_rate_put),
  2608. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2609. wsa_cdc_dma_rx_1_sample_rate,
  2610. cdc_dma_rx_sample_rate_get,
  2611. cdc_dma_rx_sample_rate_put),
  2612. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2613. wsa_cdc_dma_tx_0_sample_rate,
  2614. cdc_dma_tx_sample_rate_get,
  2615. cdc_dma_tx_sample_rate_put),
  2616. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2617. wsa_cdc_dma_tx_1_sample_rate,
  2618. cdc_dma_tx_sample_rate_get,
  2619. cdc_dma_tx_sample_rate_put),
  2620. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2621. wsa_cdc_dma_tx_2_sample_rate,
  2622. cdc_dma_tx_sample_rate_get,
  2623. cdc_dma_tx_sample_rate_put),
  2624. };
  2625. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2626. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2627. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2628. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2629. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2630. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2631. proxy_rx_ch_get, proxy_rx_ch_put),
  2632. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2633. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2634. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2635. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2636. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2637. msm_bt_sample_rate_get,
  2638. msm_bt_sample_rate_put),
  2639. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2640. usb_audio_rx_sample_rate_get,
  2641. usb_audio_rx_sample_rate_put),
  2642. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2643. usb_audio_tx_sample_rate_get,
  2644. usb_audio_tx_sample_rate_put),
  2645. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2646. tdm_rx_sample_rate_get,
  2647. tdm_rx_sample_rate_put),
  2648. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2649. tdm_tx_sample_rate_get,
  2650. tdm_tx_sample_rate_put),
  2651. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2652. tdm_rx_format_get,
  2653. tdm_rx_format_put),
  2654. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2655. tdm_tx_format_get,
  2656. tdm_tx_format_put),
  2657. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2658. tdm_rx_ch_get,
  2659. tdm_rx_ch_put),
  2660. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2661. tdm_tx_ch_get,
  2662. tdm_tx_ch_put),
  2663. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2664. tdm_rx_sample_rate_get,
  2665. tdm_rx_sample_rate_put),
  2666. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2667. tdm_tx_sample_rate_get,
  2668. tdm_tx_sample_rate_put),
  2669. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2670. tdm_rx_format_get,
  2671. tdm_rx_format_put),
  2672. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2673. tdm_tx_format_get,
  2674. tdm_tx_format_put),
  2675. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2676. tdm_rx_ch_get,
  2677. tdm_rx_ch_put),
  2678. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2679. tdm_tx_ch_get,
  2680. tdm_tx_ch_put),
  2681. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2682. tdm_rx_sample_rate_get,
  2683. tdm_rx_sample_rate_put),
  2684. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2685. tdm_tx_sample_rate_get,
  2686. tdm_tx_sample_rate_put),
  2687. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2688. tdm_rx_format_get,
  2689. tdm_rx_format_put),
  2690. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2691. tdm_tx_format_get,
  2692. tdm_tx_format_put),
  2693. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2694. tdm_rx_ch_get,
  2695. tdm_rx_ch_put),
  2696. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2697. tdm_tx_ch_get,
  2698. tdm_tx_ch_put),
  2699. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2700. tdm_rx_sample_rate_get,
  2701. tdm_rx_sample_rate_put),
  2702. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2703. tdm_tx_sample_rate_get,
  2704. tdm_tx_sample_rate_put),
  2705. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  2706. tdm_rx_format_get,
  2707. tdm_rx_format_put),
  2708. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  2709. tdm_tx_format_get,
  2710. tdm_tx_format_put),
  2711. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  2712. tdm_rx_ch_get,
  2713. tdm_rx_ch_put),
  2714. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  2715. tdm_tx_ch_get,
  2716. tdm_tx_ch_put),
  2717. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2718. tdm_rx_sample_rate_get,
  2719. tdm_rx_sample_rate_put),
  2720. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2721. tdm_tx_sample_rate_get,
  2722. tdm_tx_sample_rate_put),
  2723. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  2724. tdm_rx_format_get,
  2725. tdm_rx_format_put),
  2726. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  2727. tdm_tx_format_get,
  2728. tdm_tx_format_put),
  2729. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  2730. tdm_rx_ch_get,
  2731. tdm_rx_ch_put),
  2732. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  2733. tdm_tx_ch_get,
  2734. tdm_tx_ch_put),
  2735. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2736. aux_pcm_rx_sample_rate_get,
  2737. aux_pcm_rx_sample_rate_put),
  2738. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2739. aux_pcm_rx_sample_rate_get,
  2740. aux_pcm_rx_sample_rate_put),
  2741. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2742. aux_pcm_rx_sample_rate_get,
  2743. aux_pcm_rx_sample_rate_put),
  2744. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  2745. aux_pcm_rx_sample_rate_get,
  2746. aux_pcm_rx_sample_rate_put),
  2747. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  2748. aux_pcm_rx_sample_rate_get,
  2749. aux_pcm_rx_sample_rate_put),
  2750. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2751. aux_pcm_tx_sample_rate_get,
  2752. aux_pcm_tx_sample_rate_put),
  2753. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2754. aux_pcm_tx_sample_rate_get,
  2755. aux_pcm_tx_sample_rate_put),
  2756. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2757. aux_pcm_tx_sample_rate_get,
  2758. aux_pcm_tx_sample_rate_put),
  2759. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  2760. aux_pcm_tx_sample_rate_get,
  2761. aux_pcm_tx_sample_rate_put),
  2762. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  2763. aux_pcm_tx_sample_rate_get,
  2764. aux_pcm_tx_sample_rate_put),
  2765. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2766. mi2s_rx_sample_rate_get,
  2767. mi2s_rx_sample_rate_put),
  2768. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2769. mi2s_rx_sample_rate_get,
  2770. mi2s_rx_sample_rate_put),
  2771. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2772. mi2s_rx_sample_rate_get,
  2773. mi2s_rx_sample_rate_put),
  2774. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  2775. mi2s_rx_sample_rate_get,
  2776. mi2s_rx_sample_rate_put),
  2777. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  2778. mi2s_rx_sample_rate_get,
  2779. mi2s_rx_sample_rate_put),
  2780. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2781. mi2s_tx_sample_rate_get,
  2782. mi2s_tx_sample_rate_put),
  2783. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2784. mi2s_tx_sample_rate_get,
  2785. mi2s_tx_sample_rate_put),
  2786. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2787. mi2s_tx_sample_rate_get,
  2788. mi2s_tx_sample_rate_put),
  2789. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  2790. mi2s_tx_sample_rate_get,
  2791. mi2s_tx_sample_rate_put),
  2792. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  2793. mi2s_tx_sample_rate_get,
  2794. mi2s_tx_sample_rate_put),
  2795. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2796. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2797. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2798. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2799. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2800. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2801. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2802. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2803. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2804. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2805. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2806. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2807. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  2808. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2809. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  2810. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2811. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  2812. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2813. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  2814. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2815. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2816. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2817. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2818. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2819. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2820. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2821. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2822. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2823. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2824. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2825. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2826. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2827. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  2828. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2829. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  2830. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2831. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  2832. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2833. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  2834. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2835. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2836. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2837. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2838. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2839. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2840. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2841. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2842. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2843. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2844. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2845. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2846. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2847. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2848. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2849. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2850. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2851. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  2852. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2853. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  2854. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2855. SOC_SINGLE_MULTI_EXT("VAD CFG", SND_SOC_NOPM, 0, 1000, 0, 3, NULL,
  2856. msm_snd_vad_cfg_put),
  2857. };
  2858. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  2859. int enable, bool dapm)
  2860. {
  2861. int ret = 0;
  2862. if (!strcmp(dev_name(codec->dev), "tasha_codec")) {
  2863. ret = tasha_cdc_mclk_enable(codec, enable, dapm);
  2864. } else {
  2865. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  2866. __func__);
  2867. ret = -EINVAL;
  2868. }
  2869. return ret;
  2870. }
  2871. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  2872. int enable, bool dapm)
  2873. {
  2874. int ret = 0;
  2875. if (!strcmp(dev_name(codec->dev), "tasha_codec")) {
  2876. ret = tasha_cdc_mclk_tx_enable(codec, enable, dapm);
  2877. } else {
  2878. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  2879. __func__);
  2880. ret = -EINVAL;
  2881. }
  2882. return ret;
  2883. }
  2884. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  2885. struct snd_kcontrol *kcontrol, int event)
  2886. {
  2887. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2888. pr_debug("%s: event = %d\n", __func__, event);
  2889. switch (event) {
  2890. case SND_SOC_DAPM_PRE_PMU:
  2891. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  2892. case SND_SOC_DAPM_POST_PMD:
  2893. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  2894. }
  2895. return 0;
  2896. }
  2897. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  2898. struct snd_kcontrol *kcontrol, int event)
  2899. {
  2900. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2901. pr_debug("%s: event = %d\n", __func__, event);
  2902. switch (event) {
  2903. case SND_SOC_DAPM_PRE_PMU:
  2904. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  2905. case SND_SOC_DAPM_POST_PMD:
  2906. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  2907. }
  2908. return 0;
  2909. }
  2910. static const struct snd_soc_dapm_widget msm_dapm_widgets[] = {
  2911. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  2912. msm_mclk_event,
  2913. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2914. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  2915. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2916. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  2917. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  2918. };
  2919. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  2920. struct snd_kcontrol *kcontrol, int event)
  2921. {
  2922. struct msm_asoc_mach_data *pdata = NULL;
  2923. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  2924. int ret = 0;
  2925. uint32_t dmic_idx;
  2926. int *dmic_gpio_cnt;
  2927. struct device_node *dmic_gpio;
  2928. char *wname;
  2929. wname = strpbrk(w->name, "01234567");
  2930. if (!wname) {
  2931. dev_err(codec->dev, "%s: widget not found\n", __func__);
  2932. return -EINVAL;
  2933. }
  2934. ret = kstrtouint(wname, 10, &dmic_idx);
  2935. if (ret < 0) {
  2936. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  2937. __func__);
  2938. return -EINVAL;
  2939. }
  2940. pdata = snd_soc_card_get_drvdata(codec->component.card);
  2941. switch (dmic_idx) {
  2942. case 0:
  2943. case 1:
  2944. dmic_gpio_cnt = &pdata->dmic_01_gpio_cnt;
  2945. dmic_gpio = pdata->dmic_01_gpio_p;
  2946. break;
  2947. case 2:
  2948. case 3:
  2949. dmic_gpio_cnt = &pdata->dmic_23_gpio_cnt;
  2950. dmic_gpio = pdata->dmic_23_gpio_p;
  2951. break;
  2952. case 4:
  2953. case 5:
  2954. dmic_gpio_cnt = &pdata->dmic_45_gpio_cnt;
  2955. dmic_gpio = pdata->dmic_45_gpio_p;
  2956. break;
  2957. case 6:
  2958. case 7:
  2959. dmic_gpio_cnt = &pdata->dmic_67_gpio_cnt;
  2960. dmic_gpio = pdata->dmic_67_gpio_p;
  2961. break;
  2962. default:
  2963. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  2964. __func__);
  2965. return -EINVAL;
  2966. }
  2967. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  2968. __func__, event, dmic_idx, *dmic_gpio_cnt);
  2969. switch (event) {
  2970. case SND_SOC_DAPM_PRE_PMU:
  2971. (*dmic_gpio_cnt)++;
  2972. if (*dmic_gpio_cnt == 1) {
  2973. ret = msm_cdc_pinctrl_select_active_state(
  2974. dmic_gpio);
  2975. if (ret < 0) {
  2976. dev_err(codec->dev, "%s: gpio set cannot be activated %sd\n",
  2977. __func__, "dmic_gpio");
  2978. return ret;
  2979. }
  2980. }
  2981. break;
  2982. case SND_SOC_DAPM_POST_PMD:
  2983. (*dmic_gpio_cnt)--;
  2984. if (*dmic_gpio_cnt == 0) {
  2985. ret = msm_cdc_pinctrl_select_sleep_state(
  2986. dmic_gpio);
  2987. if (ret < 0) {
  2988. dev_err(codec->dev, "%s: gpio set cannot be de-activated %sd\n",
  2989. __func__, "dmic_gpio");
  2990. return ret;
  2991. }
  2992. }
  2993. break;
  2994. default:
  2995. dev_err(codec->dev, "%s: invalid DAPM event %d\n",
  2996. __func__, event);
  2997. return -EINVAL;
  2998. }
  2999. return 0;
  3000. }
  3001. static const struct snd_soc_dapm_widget msm_va_dapm_widgets[] = {
  3002. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3003. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3004. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3005. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3006. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3007. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3008. SND_SOC_DAPM_MIC("Digital Mic6", msm_dmic_event),
  3009. SND_SOC_DAPM_MIC("Digital Mic7", msm_dmic_event),
  3010. };
  3011. static const struct snd_soc_dapm_widget msm_wsa_dapm_widgets[] = {
  3012. };
  3013. static inline int param_is_mask(int p)
  3014. {
  3015. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3016. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3017. }
  3018. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3019. int n)
  3020. {
  3021. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3022. }
  3023. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3024. unsigned int bit)
  3025. {
  3026. if (bit >= SNDRV_MASK_MAX)
  3027. return;
  3028. if (param_is_mask(n)) {
  3029. struct snd_mask *m = param_to_mask(p, n);
  3030. m->bits[0] = 0;
  3031. m->bits[1] = 0;
  3032. m->bits[bit >> 5] |= (1 << (bit & 31));
  3033. }
  3034. }
  3035. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3036. {
  3037. int ch_id = 0;
  3038. switch (be_id) {
  3039. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3040. ch_id = SLIM_RX_0;
  3041. break;
  3042. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3043. ch_id = SLIM_RX_1;
  3044. break;
  3045. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3046. ch_id = SLIM_RX_2;
  3047. break;
  3048. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3049. ch_id = SLIM_RX_3;
  3050. break;
  3051. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3052. ch_id = SLIM_RX_4;
  3053. break;
  3054. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3055. ch_id = SLIM_RX_6;
  3056. break;
  3057. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3058. ch_id = SLIM_TX_0;
  3059. break;
  3060. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3061. ch_id = SLIM_TX_3;
  3062. break;
  3063. default:
  3064. ch_id = SLIM_RX_0;
  3065. break;
  3066. }
  3067. return ch_id;
  3068. }
  3069. static int msm_vad_get_portid_from_beid(int32_t be_id, int *port_id)
  3070. {
  3071. *port_id = 0xFFFF;
  3072. switch (be_id) {
  3073. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3074. *port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  3075. break;
  3076. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3077. *port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  3078. break;
  3079. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3080. *port_id = AFE_PORT_ID_QUINARY_TDM_TX;
  3081. break;
  3082. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3083. *port_id = AFE_PORT_ID_QUINARY_PCM_TX;
  3084. break;
  3085. default:
  3086. return -EINVAL;
  3087. }
  3088. return 0;
  3089. }
  3090. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3091. {
  3092. int idx = 0;
  3093. switch (be_id) {
  3094. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3095. idx = WSA_CDC_DMA_RX_0;
  3096. break;
  3097. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3098. idx = WSA_CDC_DMA_TX_0;
  3099. break;
  3100. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3101. idx = WSA_CDC_DMA_RX_1;
  3102. break;
  3103. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3104. idx = WSA_CDC_DMA_TX_1;
  3105. break;
  3106. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3107. idx = WSA_CDC_DMA_TX_2;
  3108. break;
  3109. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3110. idx = VA_CDC_DMA_TX_0;
  3111. break;
  3112. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3113. idx = VA_CDC_DMA_TX_1;
  3114. break;
  3115. default:
  3116. idx = VA_CDC_DMA_TX_0;
  3117. break;
  3118. }
  3119. return idx;
  3120. }
  3121. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3122. struct snd_pcm_hw_params *params)
  3123. {
  3124. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3125. struct snd_interval *rate = hw_param_interval(params,
  3126. SNDRV_PCM_HW_PARAM_RATE);
  3127. struct snd_interval *channels = hw_param_interval(params,
  3128. SNDRV_PCM_HW_PARAM_CHANNELS);
  3129. int rc = 0;
  3130. int idx;
  3131. void *config = NULL;
  3132. struct snd_soc_codec *codec = NULL;
  3133. pr_debug("%s: format = %d, rate = %d\n",
  3134. __func__, params_format(params), params_rate(params));
  3135. switch (dai_link->id) {
  3136. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3137. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3138. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3139. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3140. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3141. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3142. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3143. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3144. slim_rx_cfg[idx].bit_format);
  3145. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3146. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3147. break;
  3148. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3149. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3150. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3151. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3152. slim_tx_cfg[idx].bit_format);
  3153. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3154. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3155. break;
  3156. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3157. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3158. slim_tx_cfg[1].bit_format);
  3159. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3160. channels->min = channels->max = slim_tx_cfg[1].channels;
  3161. break;
  3162. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3163. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3164. SNDRV_PCM_FORMAT_S32_LE);
  3165. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3166. channels->min = channels->max = msm_vi_feed_tx_ch;
  3167. break;
  3168. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3169. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3170. slim_rx_cfg[5].bit_format);
  3171. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3172. channels->min = channels->max = slim_rx_cfg[5].channels;
  3173. break;
  3174. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3175. codec = rtd->codec;
  3176. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3177. channels->min = channels->max = 1;
  3178. config = msm_codec_fn.get_afe_config_fn(codec,
  3179. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3180. if (config) {
  3181. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3182. config, SLIMBUS_5_TX);
  3183. if (rc)
  3184. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3185. __func__, rc);
  3186. }
  3187. break;
  3188. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3189. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3190. slim_rx_cfg[SLIM_RX_7].bit_format);
  3191. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3192. channels->min = channels->max =
  3193. slim_rx_cfg[SLIM_RX_7].channels;
  3194. break;
  3195. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3196. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3197. channels->min = channels->max =
  3198. slim_tx_cfg[SLIM_TX_7].channels;
  3199. break;
  3200. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3201. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3202. channels->min = channels->max =
  3203. slim_tx_cfg[SLIM_TX_8].channels;
  3204. break;
  3205. case MSM_BACKEND_DAI_USB_RX:
  3206. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3207. usb_rx_cfg.bit_format);
  3208. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3209. channels->min = channels->max = usb_rx_cfg.channels;
  3210. break;
  3211. case MSM_BACKEND_DAI_USB_TX:
  3212. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3213. usb_tx_cfg.bit_format);
  3214. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3215. channels->min = channels->max = usb_tx_cfg.channels;
  3216. break;
  3217. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3218. channels->min = channels->max = proxy_rx_cfg.channels;
  3219. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3220. break;
  3221. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3222. channels->min = channels->max =
  3223. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3224. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3225. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3226. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3227. break;
  3228. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3229. channels->min = channels->max =
  3230. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3231. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3232. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3233. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3234. break;
  3235. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3236. channels->min = channels->max =
  3237. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3238. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3239. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3240. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3241. break;
  3242. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3243. channels->min = channels->max =
  3244. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3245. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3246. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3247. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3248. break;
  3249. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3250. channels->min = channels->max =
  3251. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3252. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3253. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3254. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3255. break;
  3256. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3257. channels->min = channels->max =
  3258. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3259. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3260. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3261. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3262. break;
  3263. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3264. channels->min = channels->max =
  3265. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3266. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3267. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3268. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3269. break;
  3270. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3271. channels->min = channels->max =
  3272. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3273. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3274. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3275. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3276. break;
  3277. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3278. channels->min = channels->max =
  3279. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3280. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3281. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3282. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3283. break;
  3284. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3285. channels->min = channels->max =
  3286. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3287. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3288. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3289. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3290. break;
  3291. case MSM_BACKEND_DAI_AUXPCM_RX:
  3292. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3293. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3294. rate->min = rate->max =
  3295. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3296. channels->min = channels->max =
  3297. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3298. break;
  3299. case MSM_BACKEND_DAI_AUXPCM_TX:
  3300. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3301. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3302. rate->min = rate->max =
  3303. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3304. channels->min = channels->max =
  3305. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3306. break;
  3307. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3308. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3309. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3310. rate->min = rate->max =
  3311. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3312. channels->min = channels->max =
  3313. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3314. break;
  3315. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3316. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3317. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3318. rate->min = rate->max =
  3319. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3320. channels->min = channels->max =
  3321. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3322. break;
  3323. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3324. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3325. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3326. rate->min = rate->max =
  3327. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3328. channels->min = channels->max =
  3329. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3330. break;
  3331. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3332. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3333. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3334. rate->min = rate->max =
  3335. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3336. channels->min = channels->max =
  3337. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3338. break;
  3339. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3340. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3341. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3342. rate->min = rate->max =
  3343. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3344. channels->min = channels->max =
  3345. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3346. break;
  3347. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3348. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3349. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3350. rate->min = rate->max =
  3351. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3352. channels->min = channels->max =
  3353. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3354. break;
  3355. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3356. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3357. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3358. rate->min = rate->max =
  3359. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3360. channels->min = channels->max =
  3361. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3362. break;
  3363. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3364. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3365. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3366. rate->min = rate->max =
  3367. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3368. channels->min = channels->max =
  3369. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3370. break;
  3371. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3372. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3373. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3374. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3375. channels->min = channels->max =
  3376. mi2s_rx_cfg[PRIM_MI2S].channels;
  3377. break;
  3378. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3379. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3380. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3381. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3382. channels->min = channels->max =
  3383. mi2s_tx_cfg[PRIM_MI2S].channels;
  3384. break;
  3385. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3386. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3387. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3388. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3389. channels->min = channels->max =
  3390. mi2s_rx_cfg[SEC_MI2S].channels;
  3391. break;
  3392. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3393. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3394. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3395. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3396. channels->min = channels->max =
  3397. mi2s_tx_cfg[SEC_MI2S].channels;
  3398. break;
  3399. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3400. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3401. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3402. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3403. channels->min = channels->max =
  3404. mi2s_rx_cfg[TERT_MI2S].channels;
  3405. break;
  3406. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3407. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3408. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3409. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3410. channels->min = channels->max =
  3411. mi2s_tx_cfg[TERT_MI2S].channels;
  3412. break;
  3413. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3414. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3415. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3416. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3417. channels->min = channels->max =
  3418. mi2s_rx_cfg[QUAT_MI2S].channels;
  3419. break;
  3420. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3421. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3422. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3423. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3424. channels->min = channels->max =
  3425. mi2s_tx_cfg[QUAT_MI2S].channels;
  3426. break;
  3427. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3428. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3429. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3430. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3431. channels->min = channels->max =
  3432. mi2s_rx_cfg[QUIN_MI2S].channels;
  3433. break;
  3434. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3435. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3436. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3437. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3438. channels->min = channels->max =
  3439. mi2s_tx_cfg[QUIN_MI2S].channels;
  3440. break;
  3441. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3442. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3443. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3444. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3445. cdc_dma_rx_cfg[idx].bit_format);
  3446. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3447. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3448. break;
  3449. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3450. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3451. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3452. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3453. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3454. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3455. cdc_dma_tx_cfg[idx].bit_format);
  3456. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3457. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3458. break;
  3459. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3460. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3461. SNDRV_PCM_FORMAT_S32_LE);
  3462. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3463. channels->min = channels->max = msm_vi_feed_tx_ch;
  3464. break;
  3465. default:
  3466. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3467. break;
  3468. }
  3469. return rc;
  3470. }
  3471. static int msm_afe_set_config(struct snd_soc_codec *codec)
  3472. {
  3473. int ret = 0;
  3474. void *config_data = NULL;
  3475. if (!msm_codec_fn.get_afe_config_fn) {
  3476. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  3477. __func__);
  3478. return -EINVAL;
  3479. }
  3480. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3481. AFE_CDC_REGISTERS_CONFIG);
  3482. if (config_data) {
  3483. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  3484. if (ret) {
  3485. dev_err(codec->dev,
  3486. "%s: Failed to set codec registers config %d\n",
  3487. __func__, ret);
  3488. return ret;
  3489. }
  3490. }
  3491. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3492. AFE_CDC_REGISTER_PAGE_CONFIG);
  3493. if (config_data) {
  3494. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  3495. 0);
  3496. if (ret)
  3497. dev_err(codec->dev,
  3498. "%s: Failed to set cdc register page config\n",
  3499. __func__);
  3500. }
  3501. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3502. AFE_SLIMBUS_SLAVE_CONFIG);
  3503. if (config_data) {
  3504. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  3505. if (ret) {
  3506. dev_err(codec->dev,
  3507. "%s: Failed to set slimbus slave config %d\n",
  3508. __func__, ret);
  3509. return ret;
  3510. }
  3511. }
  3512. return 0;
  3513. }
  3514. static void msm_afe_clear_config(void)
  3515. {
  3516. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  3517. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  3518. }
  3519. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  3520. struct snd_card *card)
  3521. {
  3522. int ret = 0;
  3523. unsigned long timeout;
  3524. int adsp_ready = 0;
  3525. bool snd_card_online = 0;
  3526. timeout = jiffies +
  3527. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  3528. do {
  3529. if (!snd_card_online) {
  3530. snd_card_online = snd_card_is_online_state(card);
  3531. pr_debug("%s: Sound card is %s\n", __func__,
  3532. snd_card_online ? "Online" : "Offline");
  3533. }
  3534. if (!adsp_ready) {
  3535. adsp_ready = q6core_is_adsp_ready();
  3536. pr_debug("%s: ADSP Audio is %s\n", __func__,
  3537. adsp_ready ? "ready" : "not ready");
  3538. }
  3539. if (snd_card_online && adsp_ready)
  3540. break;
  3541. /*
  3542. * Sound card/ADSP will be coming up after subsystem restart and
  3543. * it might not be fully up when the control reaches
  3544. * here. So, wait for 50msec before checking ADSP state
  3545. */
  3546. msleep(50);
  3547. } while (time_after(timeout, jiffies));
  3548. if (!snd_card_online || !adsp_ready) {
  3549. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  3550. __func__,
  3551. snd_card_online ? "Online" : "Offline",
  3552. adsp_ready ? "ready" : "not ready");
  3553. ret = -ETIMEDOUT;
  3554. goto err;
  3555. }
  3556. ret = msm_afe_set_config(codec);
  3557. if (ret)
  3558. pr_err("%s: Failed to set AFE config. err %d\n",
  3559. __func__, ret);
  3560. return 0;
  3561. err:
  3562. return ret;
  3563. }
  3564. static int qcs405_notifier_service_cb(struct notifier_block *this,
  3565. unsigned long opcode, void *ptr)
  3566. {
  3567. int ret;
  3568. struct snd_soc_card *card = NULL;
  3569. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  3570. struct snd_soc_pcm_runtime *rtd;
  3571. struct snd_soc_codec *codec;
  3572. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  3573. switch (opcode) {
  3574. case AUDIO_NOTIFIER_SERVICE_DOWN:
  3575. /*
  3576. * Use flag to ignore initial boot notifications
  3577. * On initial boot msm_adsp_power_up_config is
  3578. * called on init. There is no need to clear
  3579. * and set the config again on initial boot.
  3580. */
  3581. if (is_initial_boot)
  3582. break;
  3583. msm_afe_clear_config();
  3584. break;
  3585. case AUDIO_NOTIFIER_SERVICE_UP:
  3586. if (is_initial_boot) {
  3587. is_initial_boot = false;
  3588. break;
  3589. }
  3590. if (!spdev)
  3591. return -EINVAL;
  3592. card = platform_get_drvdata(spdev);
  3593. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  3594. if (!rtd) {
  3595. dev_err(card->dev,
  3596. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  3597. __func__, be_dl_name);
  3598. ret = -EINVAL;
  3599. goto err;
  3600. }
  3601. codec = rtd->codec;
  3602. ret = msm_adsp_power_up_config(codec, card->snd_card);
  3603. if (ret < 0) {
  3604. dev_err(card->dev,
  3605. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  3606. __func__, ret);
  3607. goto err;
  3608. }
  3609. break;
  3610. default:
  3611. break;
  3612. }
  3613. err:
  3614. return NOTIFY_OK;
  3615. }
  3616. static struct notifier_block service_nb = {
  3617. .notifier_call = qcs405_notifier_service_cb,
  3618. .priority = -INT_MAX,
  3619. };
  3620. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3621. {
  3622. int ret = 0;
  3623. void *config_data;
  3624. struct snd_soc_codec *codec = rtd->codec;
  3625. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3626. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3627. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3628. struct snd_card *card;
  3629. struct snd_info_entry *entry;
  3630. struct msm_asoc_mach_data *pdata =
  3631. snd_soc_card_get_drvdata(rtd->card);
  3632. /*
  3633. * Codec SLIMBUS configuration
  3634. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  3635. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  3636. * TX14, TX15, TX16
  3637. */
  3638. unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
  3639. 151, 152, 153, 154, 155, 156};
  3640. unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
  3641. 134, 135, 136, 137, 138, 139,
  3642. 140, 141, 142, 143};
  3643. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  3644. rtd->pmdown_time = 0;
  3645. ret = snd_soc_add_codec_controls(codec, msm_snd_sb_controls,
  3646. ARRAY_SIZE(msm_snd_sb_controls));
  3647. if (ret < 0) {
  3648. pr_err("%s: add_codec_controls failed, err %d\n",
  3649. __func__, ret);
  3650. return ret;
  3651. }
  3652. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
  3653. ARRAY_SIZE(msm_dapm_widgets));
  3654. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  3655. ARRAY_SIZE(wcd_audio_paths));
  3656. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  3657. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  3658. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3659. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3660. snd_soc_dapm_sync(dapm);
  3661. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3662. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3663. msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
  3664. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  3665. if (ret) {
  3666. dev_err(codec->dev, "%s: Failed to set AFE config %d\n",
  3667. __func__, ret);
  3668. goto err;
  3669. }
  3670. config_data = msm_codec_fn.get_afe_config_fn(codec,
  3671. AFE_AANC_VERSION);
  3672. if (config_data) {
  3673. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  3674. if (ret) {
  3675. dev_err(codec->dev, "%s: Failed to set aanc version %d\n",
  3676. __func__, ret);
  3677. goto err;
  3678. }
  3679. }
  3680. card = rtd->card->snd_card;
  3681. entry = snd_info_create_subdir(card->module, "codecs",
  3682. card->proc_root);
  3683. if (!entry) {
  3684. pr_debug("%s: Cannot create codecs module entry\n",
  3685. __func__);
  3686. ret = 0;
  3687. goto err;
  3688. }
  3689. pdata->codec_root = entry;
  3690. tasha_codec_info_create_codec_entry(pdata->codec_root, codec);
  3691. codec_reg_done = true;
  3692. return 0;
  3693. err:
  3694. return ret;
  3695. }
  3696. static int msm_va_cdc_dma_init(struct snd_soc_pcm_runtime *rtd)
  3697. {
  3698. int ret = 0;
  3699. struct snd_soc_codec *codec = rtd->codec;
  3700. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3701. ret = snd_soc_add_codec_controls(codec, msm_snd_va_controls,
  3702. ARRAY_SIZE(msm_snd_va_controls));
  3703. if (ret < 0) {
  3704. dev_err(codec->dev, "%s: add_codec_controls for va failed, err %d\n",
  3705. __func__, ret);
  3706. return ret;
  3707. }
  3708. snd_soc_dapm_new_controls(dapm, msm_va_dapm_widgets,
  3709. ARRAY_SIZE(msm_va_dapm_widgets));
  3710. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3711. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3712. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3713. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3714. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  3715. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  3716. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
  3717. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
  3718. snd_soc_dapm_sync(dapm);
  3719. return ret;
  3720. }
  3721. static int msm_wsa_cdc_dma_init(struct snd_soc_pcm_runtime *rtd)
  3722. {
  3723. int ret = 0;
  3724. struct snd_soc_codec *codec = rtd->codec;
  3725. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  3726. ret = snd_soc_add_codec_controls(codec, msm_snd_wsa_controls,
  3727. ARRAY_SIZE(msm_snd_wsa_controls));
  3728. if (ret < 0) {
  3729. dev_err(codec->dev, "%s: add_codec_controls for va failed, err %d\n",
  3730. __func__, ret);
  3731. return ret;
  3732. }
  3733. snd_soc_dapm_new_controls(dapm, msm_wsa_dapm_widgets,
  3734. ARRAY_SIZE(msm_wsa_dapm_widgets));
  3735. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3736. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3737. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3738. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3739. snd_soc_dapm_sync(dapm);
  3740. return ret;
  3741. }
  3742. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3743. {
  3744. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3745. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  3746. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3747. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3748. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3749. }
  3750. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  3751. struct snd_pcm_hw_params *params)
  3752. {
  3753. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3754. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3755. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3756. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3757. int ret = 0;
  3758. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3759. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3760. u32 user_set_tx_ch = 0;
  3761. u32 rx_ch_count;
  3762. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3763. ret = snd_soc_dai_get_channel_map(codec_dai,
  3764. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3765. if (ret < 0) {
  3766. pr_err("%s: failed to get codec chan map, err:%d\n",
  3767. __func__, ret);
  3768. goto err;
  3769. }
  3770. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  3771. pr_debug("%s: rx_5_ch=%d\n", __func__,
  3772. slim_rx_cfg[5].channels);
  3773. rx_ch_count = slim_rx_cfg[5].channels;
  3774. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  3775. pr_debug("%s: rx_2_ch=%d\n", __func__,
  3776. slim_rx_cfg[2].channels);
  3777. rx_ch_count = slim_rx_cfg[2].channels;
  3778. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  3779. pr_debug("%s: rx_6_ch=%d\n", __func__,
  3780. slim_rx_cfg[6].channels);
  3781. rx_ch_count = slim_rx_cfg[6].channels;
  3782. } else {
  3783. pr_debug("%s: rx_0_ch=%d\n", __func__,
  3784. slim_rx_cfg[0].channels);
  3785. rx_ch_count = slim_rx_cfg[0].channels;
  3786. }
  3787. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3788. rx_ch_count, rx_ch);
  3789. if (ret < 0) {
  3790. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3791. __func__, ret);
  3792. goto err;
  3793. }
  3794. } else {
  3795. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  3796. codec_dai->name, codec_dai->id, user_set_tx_ch);
  3797. ret = snd_soc_dai_get_channel_map(codec_dai,
  3798. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3799. if (ret < 0) {
  3800. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3801. __func__, ret);
  3802. goto err;
  3803. }
  3804. /* For <codec>_tx1 case */
  3805. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  3806. user_set_tx_ch = slim_tx_cfg[0].channels;
  3807. /* For <codec>_tx3 case */
  3808. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  3809. user_set_tx_ch = slim_tx_cfg[1].channels;
  3810. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  3811. user_set_tx_ch = msm_vi_feed_tx_ch;
  3812. else
  3813. user_set_tx_ch = tx_ch_cnt;
  3814. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  3815. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  3816. tx_ch_cnt, dai_link->id);
  3817. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3818. user_set_tx_ch, tx_ch, 0, 0);
  3819. if (ret < 0)
  3820. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3821. __func__, ret);
  3822. }
  3823. err:
  3824. return ret;
  3825. }
  3826. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3827. struct snd_pcm_hw_params *params)
  3828. {
  3829. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3830. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3831. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3832. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3833. int ret = 0;
  3834. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3835. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3836. u32 user_set_tx_ch = 0;
  3837. u32 user_set_rx_ch = 0;
  3838. u32 ch_id;
  3839. ret = snd_soc_dai_get_channel_map(codec_dai,
  3840. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3841. &rx_ch_cdc_dma);
  3842. if (ret < 0) {
  3843. pr_err("%s: failed to get codec chan map, err:%d\n",
  3844. __func__, ret);
  3845. goto err;
  3846. }
  3847. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3848. switch (dai_link->id) {
  3849. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3850. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3851. {
  3852. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3853. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3854. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3855. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3856. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3857. user_set_rx_ch, &rx_ch_cdc_dma);
  3858. if (ret < 0) {
  3859. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3860. __func__, ret);
  3861. goto err;
  3862. }
  3863. }
  3864. break;
  3865. }
  3866. } else {
  3867. switch (dai_link->id) {
  3868. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3869. {
  3870. user_set_tx_ch = msm_vi_feed_tx_ch;
  3871. }
  3872. break;
  3873. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3874. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3875. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3876. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3877. {
  3878. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3879. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3880. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3881. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3882. }
  3883. break;
  3884. }
  3885. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3886. &tx_ch_cdc_dma, 0, 0);
  3887. if (ret < 0) {
  3888. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3889. __func__, ret);
  3890. goto err;
  3891. }
  3892. }
  3893. err:
  3894. return ret;
  3895. }
  3896. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  3897. struct snd_pcm_hw_params *params)
  3898. {
  3899. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3900. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3901. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3902. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  3903. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  3904. unsigned int num_tx_ch = 0;
  3905. unsigned int num_rx_ch = 0;
  3906. int ret = 0;
  3907. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3908. num_rx_ch = params_channels(params);
  3909. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  3910. codec_dai->name, codec_dai->id, num_rx_ch);
  3911. ret = snd_soc_dai_get_channel_map(codec_dai,
  3912. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3913. if (ret < 0) {
  3914. pr_err("%s: failed to get codec chan map, err:%d\n",
  3915. __func__, ret);
  3916. goto err;
  3917. }
  3918. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3919. num_rx_ch, rx_ch);
  3920. if (ret < 0) {
  3921. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3922. __func__, ret);
  3923. goto err;
  3924. }
  3925. } else {
  3926. num_tx_ch = params_channels(params);
  3927. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  3928. codec_dai->name, codec_dai->id, num_tx_ch);
  3929. ret = snd_soc_dai_get_channel_map(codec_dai,
  3930. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3931. if (ret < 0) {
  3932. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  3933. __func__, ret);
  3934. goto err;
  3935. }
  3936. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3937. num_tx_ch, tx_ch, 0, 0);
  3938. if (ret < 0) {
  3939. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  3940. __func__, ret);
  3941. goto err;
  3942. }
  3943. }
  3944. err:
  3945. return ret;
  3946. }
  3947. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3948. struct snd_pcm_hw_params *params)
  3949. {
  3950. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3951. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3952. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3953. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3954. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3955. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3956. int ret;
  3957. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3958. codec_dai->name, codec_dai->id);
  3959. ret = snd_soc_dai_get_channel_map(codec_dai,
  3960. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3961. if (ret) {
  3962. dev_err(rtd->dev,
  3963. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3964. __func__, ret);
  3965. goto err;
  3966. }
  3967. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3968. __func__, tx_ch_cnt, dai_link->id);
  3969. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3970. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3971. if (ret)
  3972. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3973. __func__, ret);
  3974. err:
  3975. return ret;
  3976. }
  3977. static int msm_get_port_id(int be_id)
  3978. {
  3979. int afe_port_id;
  3980. switch (be_id) {
  3981. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3982. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  3983. break;
  3984. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3985. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  3986. break;
  3987. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3988. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  3989. break;
  3990. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3991. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  3992. break;
  3993. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3994. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  3995. break;
  3996. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3997. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  3998. break;
  3999. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4000. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4001. break;
  4002. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4003. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4004. break;
  4005. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4006. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4007. break;
  4008. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4009. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4010. break;
  4011. default:
  4012. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4013. afe_port_id = -EINVAL;
  4014. }
  4015. return afe_port_id;
  4016. }
  4017. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4018. {
  4019. u32 bit_per_sample;
  4020. switch (bit_format) {
  4021. case SNDRV_PCM_FORMAT_S32_LE:
  4022. case SNDRV_PCM_FORMAT_S24_3LE:
  4023. case SNDRV_PCM_FORMAT_S24_LE:
  4024. bit_per_sample = 32;
  4025. break;
  4026. case SNDRV_PCM_FORMAT_S16_LE:
  4027. default:
  4028. bit_per_sample = 16;
  4029. break;
  4030. }
  4031. return bit_per_sample;
  4032. }
  4033. static void update_mi2s_clk_val(int dai_id, int stream)
  4034. {
  4035. u32 bit_per_sample;
  4036. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4037. bit_per_sample =
  4038. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4039. mi2s_clk[dai_id].clk_freq_in_hz =
  4040. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4041. } else {
  4042. bit_per_sample =
  4043. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4044. mi2s_clk[dai_id].clk_freq_in_hz =
  4045. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4046. }
  4047. }
  4048. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4049. {
  4050. int ret = 0;
  4051. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4052. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4053. int port_id = 0;
  4054. int index = cpu_dai->id;
  4055. port_id = msm_get_port_id(rtd->dai_link->id);
  4056. if (port_id < 0) {
  4057. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4058. ret = port_id;
  4059. goto err;
  4060. }
  4061. if (enable) {
  4062. update_mi2s_clk_val(index, substream->stream);
  4063. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4064. mi2s_clk[index].clk_freq_in_hz);
  4065. }
  4066. mi2s_clk[index].enable = enable;
  4067. ret = afe_set_lpass_clock_v2(port_id,
  4068. &mi2s_clk[index]);
  4069. if (ret < 0) {
  4070. dev_err(rtd->card->dev,
  4071. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4072. __func__, port_id, ret);
  4073. goto err;
  4074. }
  4075. err:
  4076. return ret;
  4077. }
  4078. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4079. enum pinctrl_pin_state new_state)
  4080. {
  4081. int ret = 0;
  4082. int curr_state = 0;
  4083. if (pinctrl_info == NULL) {
  4084. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4085. ret = -EINVAL;
  4086. goto err;
  4087. }
  4088. if (pinctrl_info->pinctrl == NULL) {
  4089. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4090. ret = -EINVAL;
  4091. goto err;
  4092. }
  4093. curr_state = pinctrl_info->curr_state;
  4094. pinctrl_info->curr_state = new_state;
  4095. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4096. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4097. if (curr_state == pinctrl_info->curr_state) {
  4098. pr_debug("%s: Already in same state\n", __func__);
  4099. goto err;
  4100. }
  4101. if (curr_state != STATE_DISABLE &&
  4102. pinctrl_info->curr_state != STATE_DISABLE) {
  4103. pr_debug("%s: state already active cannot switch\n", __func__);
  4104. ret = -EIO;
  4105. goto err;
  4106. }
  4107. switch (pinctrl_info->curr_state) {
  4108. case STATE_MI2S_ACTIVE:
  4109. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4110. pinctrl_info->mi2s_active);
  4111. if (ret) {
  4112. pr_err("%s: MI2S state select failed with %d\n",
  4113. __func__, ret);
  4114. ret = -EIO;
  4115. goto err;
  4116. }
  4117. break;
  4118. case STATE_TDM_ACTIVE:
  4119. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4120. pinctrl_info->tdm_active);
  4121. if (ret) {
  4122. pr_err("%s: TDM state select failed with %d\n",
  4123. __func__, ret);
  4124. ret = -EIO;
  4125. goto err;
  4126. }
  4127. break;
  4128. case STATE_DISABLE:
  4129. if (curr_state == STATE_MI2S_ACTIVE) {
  4130. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4131. pinctrl_info->mi2s_disable);
  4132. } else {
  4133. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4134. pinctrl_info->tdm_disable);
  4135. }
  4136. if (ret) {
  4137. pr_err("%s: state disable failed with %d\n",
  4138. __func__, ret);
  4139. ret = -EIO;
  4140. goto err;
  4141. }
  4142. break;
  4143. default:
  4144. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4145. return -EINVAL;
  4146. }
  4147. err:
  4148. return ret;
  4149. }
  4150. static void msm_release_pinctrl(struct platform_device *pdev)
  4151. {
  4152. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4153. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4154. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4155. if (pinctrl_info->pinctrl) {
  4156. devm_pinctrl_put(pinctrl_info->pinctrl);
  4157. pinctrl_info->pinctrl = NULL;
  4158. }
  4159. }
  4160. static int msm_get_pinctrl(struct platform_device *pdev)
  4161. {
  4162. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4163. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4164. struct msm_pinctrl_info *pinctrl_info = NULL;
  4165. struct pinctrl *pinctrl;
  4166. int ret;
  4167. pinctrl_info = &pdata->pinctrl_info;
  4168. if (pinctrl_info == NULL) {
  4169. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4170. return -EINVAL;
  4171. }
  4172. pinctrl = devm_pinctrl_get(&pdev->dev);
  4173. if (IS_ERR_OR_NULL(pinctrl)) {
  4174. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4175. return -EINVAL;
  4176. }
  4177. pinctrl_info->pinctrl = pinctrl;
  4178. /* get all the states handles from Device Tree */
  4179. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4180. "quat-mi2s-sleep");
  4181. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4182. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4183. goto err;
  4184. }
  4185. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4186. "quat-mi2s-active");
  4187. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4188. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4189. goto err;
  4190. }
  4191. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4192. "quat-tdm-sleep");
  4193. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4194. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4195. goto err;
  4196. }
  4197. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4198. "quat-tdm-active");
  4199. if (IS_ERR(pinctrl_info->tdm_active)) {
  4200. pr_err("%s: could not get tdm_active pinstate\n",
  4201. __func__);
  4202. goto err;
  4203. }
  4204. /* Reset the TLMM pins to a default state */
  4205. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4206. pinctrl_info->mi2s_disable);
  4207. if (ret != 0) {
  4208. pr_err("%s: Disable TLMM pins failed with %d\n",
  4209. __func__, ret);
  4210. ret = -EIO;
  4211. goto err;
  4212. }
  4213. pinctrl_info->curr_state = STATE_DISABLE;
  4214. return 0;
  4215. err:
  4216. devm_pinctrl_put(pinctrl);
  4217. pinctrl_info->pinctrl = NULL;
  4218. return -EINVAL;
  4219. }
  4220. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4221. struct snd_pcm_hw_params *params)
  4222. {
  4223. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4224. struct snd_interval *rate = hw_param_interval(params,
  4225. SNDRV_PCM_HW_PARAM_RATE);
  4226. struct snd_interval *channels = hw_param_interval(params,
  4227. SNDRV_PCM_HW_PARAM_CHANNELS);
  4228. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4229. channels->min = channels->max =
  4230. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4231. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4232. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4233. rate->min = rate->max =
  4234. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4235. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4236. channels->min = channels->max =
  4237. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4238. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4239. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4240. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4241. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4242. channels->min = channels->max =
  4243. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4244. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4245. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4246. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4247. } else {
  4248. pr_err("%s: dai id 0x%x not supported\n",
  4249. __func__, cpu_dai->id);
  4250. return -EINVAL;
  4251. }
  4252. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4253. __func__, cpu_dai->id, channels->max, rate->max,
  4254. params_format(params));
  4255. return 0;
  4256. }
  4257. static int qcs405_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4258. struct snd_pcm_hw_params *params)
  4259. {
  4260. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4261. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4262. int ret = 0;
  4263. int slot_width = 32;
  4264. int channels, slots;
  4265. unsigned int slot_mask, rate, clk_freq;
  4266. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4267. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4268. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4269. switch (cpu_dai->id) {
  4270. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4271. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4272. break;
  4273. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4274. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4275. break;
  4276. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4277. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4278. break;
  4279. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4280. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4281. break;
  4282. case AFE_PORT_ID_QUINARY_TDM_RX:
  4283. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4284. break;
  4285. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4286. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4287. break;
  4288. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4289. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4290. break;
  4291. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4292. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4293. break;
  4294. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4295. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4296. break;
  4297. case AFE_PORT_ID_QUINARY_TDM_TX:
  4298. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4299. break;
  4300. default:
  4301. pr_err("%s: dai id 0x%x not supported\n",
  4302. __func__, cpu_dai->id);
  4303. return -EINVAL;
  4304. }
  4305. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4306. /*2 slot config - bits 0 and 1 set for the first two slots */
  4307. slot_mask = 0x0000FFFF >> (16-slots);
  4308. channels = slots;
  4309. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4310. __func__, slot_width, slots);
  4311. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4312. slots, slot_width);
  4313. if (ret < 0) {
  4314. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4315. __func__, ret);
  4316. goto end;
  4317. }
  4318. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4319. 0, NULL, channels, slot_offset);
  4320. if (ret < 0) {
  4321. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4322. __func__, ret);
  4323. goto end;
  4324. }
  4325. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4326. /*2 slot config - bits 0 and 1 set for the first two slots */
  4327. slot_mask = 0x0000FFFF >> (16-slots);
  4328. channels = slots;
  4329. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4330. __func__, slot_width, slots);
  4331. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4332. slots, slot_width);
  4333. if (ret < 0) {
  4334. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4335. __func__, ret);
  4336. goto end;
  4337. }
  4338. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4339. channels, slot_offset, 0, NULL);
  4340. if (ret < 0) {
  4341. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4342. __func__, ret);
  4343. goto end;
  4344. }
  4345. } else {
  4346. ret = -EINVAL;
  4347. pr_err("%s: invalid use case, err:%d\n",
  4348. __func__, ret);
  4349. goto end;
  4350. }
  4351. rate = params_rate(params);
  4352. clk_freq = rate * slot_width * slots;
  4353. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4354. if (ret < 0)
  4355. pr_err("%s: failed to set tdm clk, err:%d\n",
  4356. __func__, ret);
  4357. end:
  4358. return ret;
  4359. }
  4360. static int qcs405_tdm_snd_startup(struct snd_pcm_substream *substream)
  4361. {
  4362. int ret = 0;
  4363. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4364. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4365. struct snd_soc_card *card = rtd->card;
  4366. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4367. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4368. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4369. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4370. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4371. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  4372. if (ret)
  4373. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4374. __func__, ret);
  4375. }
  4376. return ret;
  4377. }
  4378. static void qcs405_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4379. {
  4380. int ret = 0;
  4381. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4382. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4383. struct snd_soc_card *card = rtd->card;
  4384. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4385. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4386. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4387. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  4388. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  4389. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  4390. if (ret)
  4391. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  4392. __func__, ret);
  4393. }
  4394. }
  4395. static struct snd_soc_ops qcs405_tdm_be_ops = {
  4396. .hw_params = qcs405_tdm_snd_hw_params,
  4397. .startup = qcs405_tdm_snd_startup,
  4398. .shutdown = qcs405_tdm_snd_shutdown
  4399. };
  4400. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  4401. {
  4402. cpumask_t mask;
  4403. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  4404. pm_qos_remove_request(&substream->latency_pm_qos_req);
  4405. cpumask_clear(&mask);
  4406. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  4407. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  4408. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  4409. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  4410. pm_qos_add_request(&substream->latency_pm_qos_req,
  4411. PM_QOS_CPU_DMA_LATENCY,
  4412. MSM_LL_QOS_VALUE);
  4413. return 0;
  4414. }
  4415. static struct snd_soc_ops msm_fe_qos_ops = {
  4416. .prepare = msm_fe_qos_prepare,
  4417. };
  4418. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  4419. {
  4420. int ret = 0;
  4421. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4422. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4423. int index = cpu_dai->id;
  4424. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  4425. struct snd_soc_card *card = rtd->card;
  4426. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4427. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4428. int ret_pinctrl = 0;
  4429. dev_dbg(rtd->card->dev,
  4430. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  4431. __func__, substream->name, substream->stream,
  4432. cpu_dai->name, cpu_dai->id);
  4433. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  4434. ret = -EINVAL;
  4435. dev_err(rtd->card->dev,
  4436. "%s: CPU DAI id (%d) out of range\n",
  4437. __func__, cpu_dai->id);
  4438. goto err;
  4439. }
  4440. /*
  4441. * Mutex protection in case the same MI2S
  4442. * interface using for both TX and RX so
  4443. * that the same clock won't be enable twice.
  4444. */
  4445. mutex_lock(&mi2s_intf_conf[index].lock);
  4446. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  4447. /* Check if msm needs to provide the clock to the interface */
  4448. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  4449. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  4450. fmt = SND_SOC_DAIFMT_CBM_CFM;
  4451. }
  4452. ret = msm_mi2s_set_sclk(substream, true);
  4453. if (ret < 0) {
  4454. dev_err(rtd->card->dev,
  4455. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  4456. __func__, ret);
  4457. goto clean_up;
  4458. }
  4459. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  4460. if (ret < 0) {
  4461. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  4462. __func__, index, ret);
  4463. goto clk_off;
  4464. }
  4465. if (index == QUAT_MI2S) {
  4466. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  4467. STATE_MI2S_ACTIVE);
  4468. if (ret_pinctrl)
  4469. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  4470. __func__, ret_pinctrl);
  4471. }
  4472. }
  4473. clk_off:
  4474. if (ret < 0)
  4475. msm_mi2s_set_sclk(substream, false);
  4476. clean_up:
  4477. if (ret < 0)
  4478. mi2s_intf_conf[index].ref_cnt--;
  4479. mutex_unlock(&mi2s_intf_conf[index].lock);
  4480. err:
  4481. return ret;
  4482. }
  4483. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  4484. {
  4485. int ret;
  4486. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4487. int index = rtd->cpu_dai->id;
  4488. struct snd_soc_card *card = rtd->card;
  4489. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4490. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  4491. int ret_pinctrl = 0;
  4492. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  4493. substream->name, substream->stream);
  4494. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  4495. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  4496. return;
  4497. }
  4498. mutex_lock(&mi2s_intf_conf[index].lock);
  4499. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  4500. ret = msm_mi2s_set_sclk(substream, false);
  4501. if (ret < 0)
  4502. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  4503. __func__, index, ret);
  4504. if (index == QUAT_MI2S) {
  4505. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  4506. STATE_DISABLE);
  4507. if (ret_pinctrl)
  4508. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  4509. __func__, ret_pinctrl);
  4510. }
  4511. }
  4512. mutex_unlock(&mi2s_intf_conf[index].lock);
  4513. }
  4514. static struct snd_soc_ops msm_mi2s_be_ops = {
  4515. .startup = msm_mi2s_snd_startup,
  4516. .shutdown = msm_mi2s_snd_shutdown,
  4517. };
  4518. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  4519. .hw_params = msm_snd_cdc_dma_hw_params,
  4520. };
  4521. static struct snd_soc_ops msm_be_ops = {
  4522. .hw_params = msm_snd_hw_params,
  4523. };
  4524. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  4525. .hw_params = msm_slimbus_2_hw_params,
  4526. };
  4527. static struct snd_soc_ops msm_wcn_ops = {
  4528. .hw_params = msm_wcn_hw_params,
  4529. };
  4530. /* Digital audio interface glue - connects codec <---> CPU */
  4531. static struct snd_soc_dai_link msm_common_dai_links[] = {
  4532. /* FrontEnd DAI Links */
  4533. {
  4534. .name = MSM_DAILINK_NAME(Media1),
  4535. .stream_name = "MultiMedia1",
  4536. .cpu_dai_name = "MultiMedia1",
  4537. .platform_name = "msm-pcm-dsp.0",
  4538. .dynamic = 1,
  4539. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4540. .dpcm_playback = 1,
  4541. .dpcm_capture = 1,
  4542. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4543. SND_SOC_DPCM_TRIGGER_POST},
  4544. .codec_dai_name = "snd-soc-dummy-dai",
  4545. .codec_name = "snd-soc-dummy",
  4546. .ignore_suspend = 1,
  4547. /* this dainlink has playback support */
  4548. .ignore_pmdown_time = 1,
  4549. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4550. },
  4551. {
  4552. .name = MSM_DAILINK_NAME(Media2),
  4553. .stream_name = "MultiMedia2",
  4554. .cpu_dai_name = "MultiMedia2",
  4555. .platform_name = "msm-pcm-dsp.0",
  4556. .dynamic = 1,
  4557. .dpcm_playback = 1,
  4558. .dpcm_capture = 1,
  4559. .codec_dai_name = "snd-soc-dummy-dai",
  4560. .codec_name = "snd-soc-dummy",
  4561. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4562. SND_SOC_DPCM_TRIGGER_POST},
  4563. .ignore_suspend = 1,
  4564. /* this dainlink has playback support */
  4565. .ignore_pmdown_time = 1,
  4566. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  4567. },
  4568. {
  4569. .name = "VoiceMMode1",
  4570. .stream_name = "VoiceMMode1",
  4571. .cpu_dai_name = "VoiceMMode1",
  4572. .platform_name = "msm-pcm-voice",
  4573. .dynamic = 1,
  4574. .dpcm_playback = 1,
  4575. .dpcm_capture = 1,
  4576. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4577. SND_SOC_DPCM_TRIGGER_POST},
  4578. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4579. .ignore_suspend = 1,
  4580. .ignore_pmdown_time = 1,
  4581. .codec_dai_name = "snd-soc-dummy-dai",
  4582. .codec_name = "snd-soc-dummy",
  4583. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  4584. },
  4585. {
  4586. .name = "MSM VoIP",
  4587. .stream_name = "VoIP",
  4588. .cpu_dai_name = "VoIP",
  4589. .platform_name = "msm-voip-dsp",
  4590. .dynamic = 1,
  4591. .dpcm_playback = 1,
  4592. .dpcm_capture = 1,
  4593. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4594. SND_SOC_DPCM_TRIGGER_POST},
  4595. .codec_dai_name = "snd-soc-dummy-dai",
  4596. .codec_name = "snd-soc-dummy",
  4597. .ignore_suspend = 1,
  4598. /* this dainlink has playback support */
  4599. .ignore_pmdown_time = 1,
  4600. .id = MSM_FRONTEND_DAI_VOIP,
  4601. },
  4602. {
  4603. .name = MSM_DAILINK_NAME(ULL),
  4604. .stream_name = "MultiMedia3",
  4605. .cpu_dai_name = "MultiMedia3",
  4606. .platform_name = "msm-pcm-dsp.2",
  4607. .dynamic = 1,
  4608. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4609. .dpcm_playback = 1,
  4610. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4611. SND_SOC_DPCM_TRIGGER_POST},
  4612. .codec_dai_name = "snd-soc-dummy-dai",
  4613. .codec_name = "snd-soc-dummy",
  4614. .ignore_suspend = 1,
  4615. /* this dainlink has playback support */
  4616. .ignore_pmdown_time = 1,
  4617. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  4618. },
  4619. /* Hostless PCM purpose */
  4620. {
  4621. .name = "SLIMBUS_0 Hostless",
  4622. .stream_name = "SLIMBUS_0 Hostless",
  4623. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  4624. .platform_name = "msm-pcm-hostless",
  4625. .dynamic = 1,
  4626. .dpcm_playback = 1,
  4627. .dpcm_capture = 1,
  4628. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4629. SND_SOC_DPCM_TRIGGER_POST},
  4630. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4631. .ignore_suspend = 1,
  4632. /* this dailink has playback support */
  4633. .ignore_pmdown_time = 1,
  4634. .codec_dai_name = "snd-soc-dummy-dai",
  4635. .codec_name = "snd-soc-dummy",
  4636. },
  4637. {
  4638. .name = "MSM AFE-PCM RX",
  4639. .stream_name = "AFE-PROXY RX",
  4640. .cpu_dai_name = "msm-dai-q6-dev.241",
  4641. .codec_name = "msm-stub-codec.1",
  4642. .codec_dai_name = "msm-stub-rx",
  4643. .platform_name = "msm-pcm-afe",
  4644. .dpcm_playback = 1,
  4645. .ignore_suspend = 1,
  4646. /* this dainlink has playback support */
  4647. .ignore_pmdown_time = 1,
  4648. },
  4649. {
  4650. .name = "MSM AFE-PCM TX",
  4651. .stream_name = "AFE-PROXY TX",
  4652. .cpu_dai_name = "msm-dai-q6-dev.240",
  4653. .codec_name = "msm-stub-codec.1",
  4654. .codec_dai_name = "msm-stub-tx",
  4655. .platform_name = "msm-pcm-afe",
  4656. .dpcm_capture = 1,
  4657. .ignore_suspend = 1,
  4658. },
  4659. {
  4660. .name = MSM_DAILINK_NAME(Compress1),
  4661. .stream_name = "Compress1",
  4662. .cpu_dai_name = "MultiMedia4",
  4663. .platform_name = "msm-compress-dsp",
  4664. .dynamic = 1,
  4665. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4666. .dpcm_playback = 1,
  4667. .dpcm_capture = 1,
  4668. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4669. SND_SOC_DPCM_TRIGGER_POST},
  4670. .codec_dai_name = "snd-soc-dummy-dai",
  4671. .codec_name = "snd-soc-dummy",
  4672. .ignore_suspend = 1,
  4673. .ignore_pmdown_time = 1,
  4674. /* this dainlink has playback support */
  4675. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4676. },
  4677. {
  4678. .name = "AUXPCM Hostless",
  4679. .stream_name = "AUXPCM Hostless",
  4680. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4681. .platform_name = "msm-pcm-hostless",
  4682. .dynamic = 1,
  4683. .dpcm_playback = 1,
  4684. .dpcm_capture = 1,
  4685. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4686. SND_SOC_DPCM_TRIGGER_POST},
  4687. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4688. .ignore_suspend = 1,
  4689. /* this dainlink has playback support */
  4690. .ignore_pmdown_time = 1,
  4691. .codec_dai_name = "snd-soc-dummy-dai",
  4692. .codec_name = "snd-soc-dummy",
  4693. },
  4694. {
  4695. .name = "SLIMBUS_1 Hostless",
  4696. .stream_name = "SLIMBUS_1 Hostless",
  4697. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  4698. .platform_name = "msm-pcm-hostless",
  4699. .dynamic = 1,
  4700. .dpcm_playback = 1,
  4701. .dpcm_capture = 1,
  4702. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4703. SND_SOC_DPCM_TRIGGER_POST},
  4704. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4705. .ignore_suspend = 1,
  4706. /* this dailink has playback support */
  4707. .ignore_pmdown_time = 1,
  4708. .codec_dai_name = "snd-soc-dummy-dai",
  4709. .codec_name = "snd-soc-dummy",
  4710. },
  4711. {
  4712. .name = "SLIMBUS_3 Hostless",
  4713. .stream_name = "SLIMBUS_3 Hostless",
  4714. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  4715. .platform_name = "msm-pcm-hostless",
  4716. .dynamic = 1,
  4717. .dpcm_playback = 1,
  4718. .dpcm_capture = 1,
  4719. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4720. SND_SOC_DPCM_TRIGGER_POST},
  4721. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4722. .ignore_suspend = 1,
  4723. /* this dailink has playback support */
  4724. .ignore_pmdown_time = 1,
  4725. .codec_dai_name = "snd-soc-dummy-dai",
  4726. .codec_name = "snd-soc-dummy",
  4727. },
  4728. {
  4729. .name = "SLIMBUS_4 Hostless",
  4730. .stream_name = "SLIMBUS_4 Hostless",
  4731. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  4732. .platform_name = "msm-pcm-hostless",
  4733. .dynamic = 1,
  4734. .dpcm_playback = 1,
  4735. .dpcm_capture = 1,
  4736. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4737. SND_SOC_DPCM_TRIGGER_POST},
  4738. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4739. .ignore_suspend = 1,
  4740. /* this dailink has playback support */
  4741. .ignore_pmdown_time = 1,
  4742. .codec_dai_name = "snd-soc-dummy-dai",
  4743. .codec_name = "snd-soc-dummy",
  4744. },
  4745. {
  4746. .name = MSM_DAILINK_NAME(LowLatency),
  4747. .stream_name = "MultiMedia5",
  4748. .cpu_dai_name = "MultiMedia5",
  4749. .platform_name = "msm-pcm-dsp.1",
  4750. .dynamic = 1,
  4751. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4752. .dpcm_playback = 1,
  4753. .dpcm_capture = 1,
  4754. .codec_dai_name = "snd-soc-dummy-dai",
  4755. .codec_name = "snd-soc-dummy",
  4756. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4757. SND_SOC_DPCM_TRIGGER_POST},
  4758. .ignore_suspend = 1,
  4759. /* this dainlink has playback support */
  4760. .ignore_pmdown_time = 1,
  4761. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4762. .ops = &msm_fe_qos_ops,
  4763. },
  4764. {
  4765. .name = "Listen 1 Audio Service",
  4766. .stream_name = "Listen 1 Audio Service",
  4767. .cpu_dai_name = "LSM1",
  4768. .platform_name = "msm-lsm-client",
  4769. .dynamic = 1,
  4770. .dpcm_capture = 1,
  4771. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4772. SND_SOC_DPCM_TRIGGER_POST },
  4773. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4774. .ignore_suspend = 1,
  4775. .codec_dai_name = "snd-soc-dummy-dai",
  4776. .codec_name = "snd-soc-dummy",
  4777. .id = MSM_FRONTEND_DAI_LSM1,
  4778. },
  4779. /* Multiple Tunnel instances */
  4780. {
  4781. .name = MSM_DAILINK_NAME(Compress2),
  4782. .stream_name = "Compress2",
  4783. .cpu_dai_name = "MultiMedia7",
  4784. .platform_name = "msm-compress-dsp",
  4785. .dynamic = 1,
  4786. .dpcm_playback = 1,
  4787. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4788. SND_SOC_DPCM_TRIGGER_POST},
  4789. .codec_dai_name = "snd-soc-dummy-dai",
  4790. .codec_name = "snd-soc-dummy",
  4791. .ignore_suspend = 1,
  4792. .ignore_pmdown_time = 1,
  4793. /* this dainlink has playback support */
  4794. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4795. },
  4796. {
  4797. .name = MSM_DAILINK_NAME(MultiMedia10),
  4798. .stream_name = "MultiMedia10",
  4799. .cpu_dai_name = "MultiMedia10",
  4800. .platform_name = "msm-pcm-dsp.1",
  4801. .dynamic = 1,
  4802. .dpcm_playback = 1,
  4803. .dpcm_capture = 1,
  4804. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4805. SND_SOC_DPCM_TRIGGER_POST},
  4806. .codec_dai_name = "snd-soc-dummy-dai",
  4807. .codec_name = "snd-soc-dummy",
  4808. .ignore_suspend = 1,
  4809. .ignore_pmdown_time = 1,
  4810. /* this dainlink has playback support */
  4811. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4812. },
  4813. {
  4814. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4815. .stream_name = "MM_NOIRQ",
  4816. .cpu_dai_name = "MultiMedia8",
  4817. .platform_name = "msm-pcm-dsp-noirq",
  4818. .dynamic = 1,
  4819. .dpcm_playback = 1,
  4820. .dpcm_capture = 1,
  4821. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4822. SND_SOC_DPCM_TRIGGER_POST},
  4823. .codec_dai_name = "snd-soc-dummy-dai",
  4824. .codec_name = "snd-soc-dummy",
  4825. .ignore_suspend = 1,
  4826. .ignore_pmdown_time = 1,
  4827. /* this dainlink has playback support */
  4828. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4829. .ops = &msm_fe_qos_ops,
  4830. },
  4831. /* HDMI Hostless */
  4832. {
  4833. .name = "HDMI_RX_HOSTLESS",
  4834. .stream_name = "HDMI_RX_HOSTLESS",
  4835. .cpu_dai_name = "HDMI_HOSTLESS",
  4836. .platform_name = "msm-pcm-hostless",
  4837. .dynamic = 1,
  4838. .dpcm_playback = 1,
  4839. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4840. SND_SOC_DPCM_TRIGGER_POST},
  4841. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4842. .ignore_suspend = 1,
  4843. .ignore_pmdown_time = 1,
  4844. .codec_dai_name = "snd-soc-dummy-dai",
  4845. .codec_name = "snd-soc-dummy",
  4846. },
  4847. {
  4848. .name = "VoiceMMode2",
  4849. .stream_name = "VoiceMMode2",
  4850. .cpu_dai_name = "VoiceMMode2",
  4851. .platform_name = "msm-pcm-voice",
  4852. .dynamic = 1,
  4853. .dpcm_playback = 1,
  4854. .dpcm_capture = 1,
  4855. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4856. SND_SOC_DPCM_TRIGGER_POST},
  4857. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4858. .ignore_suspend = 1,
  4859. .ignore_pmdown_time = 1,
  4860. .codec_dai_name = "snd-soc-dummy-dai",
  4861. .codec_name = "snd-soc-dummy",
  4862. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4863. },
  4864. /* LSM FE */
  4865. {
  4866. .name = "Listen 2 Audio Service",
  4867. .stream_name = "Listen 2 Audio Service",
  4868. .cpu_dai_name = "LSM2",
  4869. .platform_name = "msm-lsm-client",
  4870. .dynamic = 1,
  4871. .dpcm_capture = 1,
  4872. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4873. SND_SOC_DPCM_TRIGGER_POST },
  4874. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4875. .ignore_suspend = 1,
  4876. .codec_dai_name = "snd-soc-dummy-dai",
  4877. .codec_name = "snd-soc-dummy",
  4878. .id = MSM_FRONTEND_DAI_LSM2,
  4879. },
  4880. {
  4881. .name = "Listen 3 Audio Service",
  4882. .stream_name = "Listen 3 Audio Service",
  4883. .cpu_dai_name = "LSM3",
  4884. .platform_name = "msm-lsm-client",
  4885. .dynamic = 1,
  4886. .dpcm_capture = 1,
  4887. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4888. SND_SOC_DPCM_TRIGGER_POST },
  4889. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4890. .ignore_suspend = 1,
  4891. .codec_dai_name = "snd-soc-dummy-dai",
  4892. .codec_name = "snd-soc-dummy",
  4893. .id = MSM_FRONTEND_DAI_LSM3,
  4894. },
  4895. {
  4896. .name = "Listen 4 Audio Service",
  4897. .stream_name = "Listen 4 Audio Service",
  4898. .cpu_dai_name = "LSM4",
  4899. .platform_name = "msm-lsm-client",
  4900. .dynamic = 1,
  4901. .dpcm_capture = 1,
  4902. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4903. SND_SOC_DPCM_TRIGGER_POST },
  4904. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4905. .ignore_suspend = 1,
  4906. .codec_dai_name = "snd-soc-dummy-dai",
  4907. .codec_name = "snd-soc-dummy",
  4908. .id = MSM_FRONTEND_DAI_LSM4,
  4909. },
  4910. {
  4911. .name = "Listen 5 Audio Service",
  4912. .stream_name = "Listen 5 Audio Service",
  4913. .cpu_dai_name = "LSM5",
  4914. .platform_name = "msm-lsm-client",
  4915. .dynamic = 1,
  4916. .dpcm_capture = 1,
  4917. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4918. SND_SOC_DPCM_TRIGGER_POST },
  4919. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4920. .ignore_suspend = 1,
  4921. .codec_dai_name = "snd-soc-dummy-dai",
  4922. .codec_name = "snd-soc-dummy",
  4923. .id = MSM_FRONTEND_DAI_LSM5,
  4924. },
  4925. {
  4926. .name = "Listen 6 Audio Service",
  4927. .stream_name = "Listen 6 Audio Service",
  4928. .cpu_dai_name = "LSM6",
  4929. .platform_name = "msm-lsm-client",
  4930. .dynamic = 1,
  4931. .dpcm_capture = 1,
  4932. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4933. SND_SOC_DPCM_TRIGGER_POST },
  4934. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4935. .ignore_suspend = 1,
  4936. .codec_dai_name = "snd-soc-dummy-dai",
  4937. .codec_name = "snd-soc-dummy",
  4938. .id = MSM_FRONTEND_DAI_LSM6,
  4939. },
  4940. {
  4941. .name = "Listen 7 Audio Service",
  4942. .stream_name = "Listen 7 Audio Service",
  4943. .cpu_dai_name = "LSM7",
  4944. .platform_name = "msm-lsm-client",
  4945. .dynamic = 1,
  4946. .dpcm_capture = 1,
  4947. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4948. SND_SOC_DPCM_TRIGGER_POST },
  4949. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4950. .ignore_suspend = 1,
  4951. .codec_dai_name = "snd-soc-dummy-dai",
  4952. .codec_name = "snd-soc-dummy",
  4953. .id = MSM_FRONTEND_DAI_LSM7,
  4954. },
  4955. {
  4956. .name = "Listen 8 Audio Service",
  4957. .stream_name = "Listen 8 Audio Service",
  4958. .cpu_dai_name = "LSM8",
  4959. .platform_name = "msm-lsm-client",
  4960. .dynamic = 1,
  4961. .dpcm_capture = 1,
  4962. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4963. SND_SOC_DPCM_TRIGGER_POST },
  4964. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4965. .ignore_suspend = 1,
  4966. .codec_dai_name = "snd-soc-dummy-dai",
  4967. .codec_name = "snd-soc-dummy",
  4968. .id = MSM_FRONTEND_DAI_LSM8,
  4969. },
  4970. {
  4971. .name = MSM_DAILINK_NAME(Media9),
  4972. .stream_name = "MultiMedia9",
  4973. .cpu_dai_name = "MultiMedia9",
  4974. .platform_name = "msm-pcm-dsp.0",
  4975. .dynamic = 1,
  4976. .dpcm_playback = 1,
  4977. .dpcm_capture = 1,
  4978. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4979. SND_SOC_DPCM_TRIGGER_POST},
  4980. .codec_dai_name = "snd-soc-dummy-dai",
  4981. .codec_name = "snd-soc-dummy",
  4982. .ignore_suspend = 1,
  4983. /* this dainlink has playback support */
  4984. .ignore_pmdown_time = 1,
  4985. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4986. },
  4987. {
  4988. .name = MSM_DAILINK_NAME(Compress4),
  4989. .stream_name = "Compress4",
  4990. .cpu_dai_name = "MultiMedia11",
  4991. .platform_name = "msm-compress-dsp",
  4992. .dynamic = 1,
  4993. .dpcm_playback = 1,
  4994. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4995. SND_SOC_DPCM_TRIGGER_POST},
  4996. .codec_dai_name = "snd-soc-dummy-dai",
  4997. .codec_name = "snd-soc-dummy",
  4998. .ignore_suspend = 1,
  4999. .ignore_pmdown_time = 1,
  5000. /* this dainlink has playback support */
  5001. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5002. },
  5003. {
  5004. .name = MSM_DAILINK_NAME(Compress5),
  5005. .stream_name = "Compress5",
  5006. .cpu_dai_name = "MultiMedia12",
  5007. .platform_name = "msm-compress-dsp",
  5008. .dynamic = 1,
  5009. .dpcm_playback = 1,
  5010. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5011. SND_SOC_DPCM_TRIGGER_POST},
  5012. .codec_dai_name = "snd-soc-dummy-dai",
  5013. .codec_name = "snd-soc-dummy",
  5014. .ignore_suspend = 1,
  5015. .ignore_pmdown_time = 1,
  5016. /* this dainlink has playback support */
  5017. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5018. },
  5019. {
  5020. .name = MSM_DAILINK_NAME(Compress6),
  5021. .stream_name = "Compress6",
  5022. .cpu_dai_name = "MultiMedia13",
  5023. .platform_name = "msm-compress-dsp",
  5024. .dynamic = 1,
  5025. .dpcm_playback = 1,
  5026. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5027. SND_SOC_DPCM_TRIGGER_POST},
  5028. .codec_dai_name = "snd-soc-dummy-dai",
  5029. .codec_name = "snd-soc-dummy",
  5030. .ignore_suspend = 1,
  5031. .ignore_pmdown_time = 1,
  5032. /* this dainlink has playback support */
  5033. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5034. },
  5035. {
  5036. .name = MSM_DAILINK_NAME(Compress7),
  5037. .stream_name = "Compress7",
  5038. .cpu_dai_name = "MultiMedia14",
  5039. .platform_name = "msm-compress-dsp",
  5040. .dynamic = 1,
  5041. .dpcm_playback = 1,
  5042. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5043. SND_SOC_DPCM_TRIGGER_POST},
  5044. .codec_dai_name = "snd-soc-dummy-dai",
  5045. .codec_name = "snd-soc-dummy",
  5046. .ignore_suspend = 1,
  5047. .ignore_pmdown_time = 1,
  5048. /* this dainlink has playback support */
  5049. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5050. },
  5051. {
  5052. .name = MSM_DAILINK_NAME(Compress8),
  5053. .stream_name = "Compress8",
  5054. .cpu_dai_name = "MultiMedia15",
  5055. .platform_name = "msm-compress-dsp",
  5056. .dynamic = 1,
  5057. .dpcm_playback = 1,
  5058. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5059. SND_SOC_DPCM_TRIGGER_POST},
  5060. .codec_dai_name = "snd-soc-dummy-dai",
  5061. .codec_name = "snd-soc-dummy",
  5062. .ignore_suspend = 1,
  5063. .ignore_pmdown_time = 1,
  5064. /* this dainlink has playback support */
  5065. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5066. },
  5067. {
  5068. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5069. .stream_name = "MM_NOIRQ_2",
  5070. .cpu_dai_name = "MultiMedia16",
  5071. .platform_name = "msm-pcm-dsp-noirq",
  5072. .dynamic = 1,
  5073. .dpcm_playback = 1,
  5074. .dpcm_capture = 1,
  5075. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5076. SND_SOC_DPCM_TRIGGER_POST},
  5077. .codec_dai_name = "snd-soc-dummy-dai",
  5078. .codec_name = "snd-soc-dummy",
  5079. .ignore_suspend = 1,
  5080. .ignore_pmdown_time = 1,
  5081. /* this dainlink has playback support */
  5082. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5083. },
  5084. {
  5085. .name = "SLIMBUS_8 Hostless",
  5086. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5087. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5088. .platform_name = "msm-pcm-hostless",
  5089. .dynamic = 1,
  5090. .dpcm_capture = 1,
  5091. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5092. SND_SOC_DPCM_TRIGGER_POST},
  5093. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5094. .ignore_suspend = 1,
  5095. .codec_dai_name = "snd-soc-dummy-dai",
  5096. .codec_name = "snd-soc-dummy",
  5097. },
  5098. };
  5099. static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
  5100. /* Ultrasound RX DAI Link */
  5101. {
  5102. .name = "SLIMBUS_2 Hostless Playback",
  5103. .stream_name = "SLIMBUS_2 Hostless Playback",
  5104. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5105. .platform_name = "msm-pcm-hostless",
  5106. .codec_name = "tasha_codec",
  5107. .codec_dai_name = "tasha_rx2",
  5108. .ignore_suspend = 1,
  5109. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5110. .ops = &msm_slimbus_2_be_ops,
  5111. },
  5112. /* Ultrasound TX DAI Link */
  5113. {
  5114. .name = "SLIMBUS_2 Hostless Capture",
  5115. .stream_name = "SLIMBUS_2 Hostless Capture",
  5116. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5117. .platform_name = "msm-pcm-hostless",
  5118. .codec_name = "tasha_codec",
  5119. .codec_dai_name = "tasha_tx2",
  5120. .ignore_suspend = 1,
  5121. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5122. .ops = &msm_slimbus_2_be_ops,
  5123. },
  5124. {
  5125. .name = "SLIMBUS_6 Hostless Playback",
  5126. .stream_name = "SLIMBUS_6 Hostless",
  5127. .cpu_dai_name = "SLIMBUS6_HOSTLESS",
  5128. .platform_name = "msm-pcm-hostless",
  5129. .dynamic = 1,
  5130. .dpcm_playback = 1,
  5131. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5132. SND_SOC_DPCM_TRIGGER_POST},
  5133. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5134. .ignore_suspend = 1,
  5135. /* this dailink has playback support */
  5136. .ignore_pmdown_time = 1,
  5137. .codec_dai_name = "snd-soc-dummy-dai",
  5138. .codec_name = "snd-soc-dummy",
  5139. },
  5140. };
  5141. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5142. {
  5143. .name = MSM_DAILINK_NAME(ASM Loopback),
  5144. .stream_name = "MultiMedia6",
  5145. .cpu_dai_name = "MultiMedia6",
  5146. .platform_name = "msm-pcm-loopback",
  5147. .dynamic = 1,
  5148. .dpcm_playback = 1,
  5149. .dpcm_capture = 1,
  5150. .codec_dai_name = "snd-soc-dummy-dai",
  5151. .codec_name = "snd-soc-dummy",
  5152. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5153. SND_SOC_DPCM_TRIGGER_POST},
  5154. .ignore_suspend = 1,
  5155. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5156. .ignore_pmdown_time = 1,
  5157. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5158. },
  5159. {
  5160. .name = "USB Audio Hostless",
  5161. .stream_name = "USB Audio Hostless",
  5162. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5163. .platform_name = "msm-pcm-hostless",
  5164. .dynamic = 1,
  5165. .dpcm_playback = 1,
  5166. .dpcm_capture = 1,
  5167. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5168. SND_SOC_DPCM_TRIGGER_POST},
  5169. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5170. .ignore_suspend = 1,
  5171. .ignore_pmdown_time = 1,
  5172. .codec_dai_name = "snd-soc-dummy-dai",
  5173. .codec_name = "snd-soc-dummy",
  5174. },
  5175. {
  5176. .name = "SLIMBUS_7 Hostless",
  5177. .stream_name = "SLIMBUS_7 Hostless",
  5178. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5179. .platform_name = "msm-pcm-hostless",
  5180. .dynamic = 1,
  5181. .dpcm_capture = 1,
  5182. .dpcm_playback = 1,
  5183. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5184. SND_SOC_DPCM_TRIGGER_POST},
  5185. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5186. .ignore_suspend = 1,
  5187. .ignore_pmdown_time = 1,
  5188. .codec_dai_name = "snd-soc-dummy-dai",
  5189. .codec_name = "snd-soc-dummy",
  5190. },
  5191. };
  5192. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5193. /* Backend AFE DAI Links */
  5194. {
  5195. .name = LPASS_BE_AFE_PCM_RX,
  5196. .stream_name = "AFE Playback",
  5197. .cpu_dai_name = "msm-dai-q6-dev.224",
  5198. .platform_name = "msm-pcm-routing",
  5199. .codec_name = "msm-stub-codec.1",
  5200. .codec_dai_name = "msm-stub-rx",
  5201. .no_pcm = 1,
  5202. .dpcm_playback = 1,
  5203. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5204. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5205. /* this dainlink has playback support */
  5206. .ignore_pmdown_time = 1,
  5207. .ignore_suspend = 1,
  5208. },
  5209. {
  5210. .name = LPASS_BE_AFE_PCM_TX,
  5211. .stream_name = "AFE Capture",
  5212. .cpu_dai_name = "msm-dai-q6-dev.225",
  5213. .platform_name = "msm-pcm-routing",
  5214. .codec_name = "msm-stub-codec.1",
  5215. .codec_dai_name = "msm-stub-tx",
  5216. .no_pcm = 1,
  5217. .dpcm_capture = 1,
  5218. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5219. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5220. .ignore_suspend = 1,
  5221. },
  5222. /* Incall Record Uplink BACK END DAI Link */
  5223. {
  5224. .name = LPASS_BE_INCALL_RECORD_TX,
  5225. .stream_name = "Voice Uplink Capture",
  5226. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5227. .platform_name = "msm-pcm-routing",
  5228. .codec_name = "msm-stub-codec.1",
  5229. .codec_dai_name = "msm-stub-tx",
  5230. .no_pcm = 1,
  5231. .dpcm_capture = 1,
  5232. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5233. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5234. .ignore_suspend = 1,
  5235. },
  5236. /* Incall Record Downlink BACK END DAI Link */
  5237. {
  5238. .name = LPASS_BE_INCALL_RECORD_RX,
  5239. .stream_name = "Voice Downlink Capture",
  5240. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5241. .platform_name = "msm-pcm-routing",
  5242. .codec_name = "msm-stub-codec.1",
  5243. .codec_dai_name = "msm-stub-tx",
  5244. .no_pcm = 1,
  5245. .dpcm_capture = 1,
  5246. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5247. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5248. .ignore_suspend = 1,
  5249. },
  5250. /* Incall Music BACK END DAI Link */
  5251. {
  5252. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5253. .stream_name = "Voice Farend Playback",
  5254. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5255. .platform_name = "msm-pcm-routing",
  5256. .codec_name = "msm-stub-codec.1",
  5257. .codec_dai_name = "msm-stub-rx",
  5258. .no_pcm = 1,
  5259. .dpcm_playback = 1,
  5260. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5261. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5262. .ignore_suspend = 1,
  5263. .ignore_pmdown_time = 1,
  5264. },
  5265. /* Incall Music 2 BACK END DAI Link */
  5266. {
  5267. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5268. .stream_name = "Voice2 Farend Playback",
  5269. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5270. .platform_name = "msm-pcm-routing",
  5271. .codec_name = "msm-stub-codec.1",
  5272. .codec_dai_name = "msm-stub-rx",
  5273. .no_pcm = 1,
  5274. .dpcm_playback = 1,
  5275. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5276. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5277. .ignore_suspend = 1,
  5278. .ignore_pmdown_time = 1,
  5279. },
  5280. {
  5281. .name = LPASS_BE_USB_AUDIO_RX,
  5282. .stream_name = "USB Audio Playback",
  5283. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5284. .platform_name = "msm-pcm-routing",
  5285. .codec_name = "msm-stub-codec.1",
  5286. .codec_dai_name = "msm-stub-rx",
  5287. .no_pcm = 1,
  5288. .dpcm_playback = 1,
  5289. .id = MSM_BACKEND_DAI_USB_RX,
  5290. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5291. .ignore_pmdown_time = 1,
  5292. .ignore_suspend = 1,
  5293. },
  5294. {
  5295. .name = LPASS_BE_USB_AUDIO_TX,
  5296. .stream_name = "USB Audio Capture",
  5297. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5298. .platform_name = "msm-pcm-routing",
  5299. .codec_name = "msm-stub-codec.1",
  5300. .codec_dai_name = "msm-stub-tx",
  5301. .no_pcm = 1,
  5302. .dpcm_capture = 1,
  5303. .id = MSM_BACKEND_DAI_USB_TX,
  5304. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5305. .ignore_suspend = 1,
  5306. },
  5307. {
  5308. .name = LPASS_BE_PRI_TDM_RX_0,
  5309. .stream_name = "Primary TDM0 Playback",
  5310. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5311. .platform_name = "msm-pcm-routing",
  5312. .codec_name = "msm-stub-codec.1",
  5313. .codec_dai_name = "msm-stub-rx",
  5314. .no_pcm = 1,
  5315. .dpcm_playback = 1,
  5316. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5317. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5318. .ops = &qcs405_tdm_be_ops,
  5319. .ignore_suspend = 1,
  5320. .ignore_pmdown_time = 1,
  5321. },
  5322. {
  5323. .name = LPASS_BE_PRI_TDM_TX_0,
  5324. .stream_name = "Primary TDM0 Capture",
  5325. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5326. .platform_name = "msm-pcm-routing",
  5327. .codec_name = "msm-stub-codec.1",
  5328. .codec_dai_name = "msm-stub-tx",
  5329. .no_pcm = 1,
  5330. .dpcm_capture = 1,
  5331. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5332. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5333. .ops = &qcs405_tdm_be_ops,
  5334. .ignore_suspend = 1,
  5335. },
  5336. {
  5337. .name = LPASS_BE_SEC_TDM_RX_0,
  5338. .stream_name = "Secondary TDM0 Playback",
  5339. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5340. .platform_name = "msm-pcm-routing",
  5341. .codec_name = "msm-stub-codec.1",
  5342. .codec_dai_name = "msm-stub-rx",
  5343. .no_pcm = 1,
  5344. .dpcm_playback = 1,
  5345. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5346. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5347. .ops = &qcs405_tdm_be_ops,
  5348. .ignore_suspend = 1,
  5349. .ignore_pmdown_time = 1,
  5350. },
  5351. {
  5352. .name = LPASS_BE_SEC_TDM_TX_0,
  5353. .stream_name = "Secondary TDM0 Capture",
  5354. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5355. .platform_name = "msm-pcm-routing",
  5356. .codec_name = "msm-stub-codec.1",
  5357. .codec_dai_name = "msm-stub-tx",
  5358. .no_pcm = 1,
  5359. .dpcm_capture = 1,
  5360. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5361. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5362. .ops = &qcs405_tdm_be_ops,
  5363. .ignore_suspend = 1,
  5364. },
  5365. {
  5366. .name = LPASS_BE_TERT_TDM_RX_0,
  5367. .stream_name = "Tertiary TDM0 Playback",
  5368. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5369. .platform_name = "msm-pcm-routing",
  5370. .codec_name = "msm-stub-codec.1",
  5371. .codec_dai_name = "msm-stub-rx",
  5372. .no_pcm = 1,
  5373. .dpcm_playback = 1,
  5374. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5375. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5376. .ops = &qcs405_tdm_be_ops,
  5377. .ignore_suspend = 1,
  5378. .ignore_pmdown_time = 1,
  5379. },
  5380. {
  5381. .name = LPASS_BE_TERT_TDM_TX_0,
  5382. .stream_name = "Tertiary TDM0 Capture",
  5383. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  5384. .platform_name = "msm-pcm-routing",
  5385. .codec_name = "msm-stub-codec.1",
  5386. .codec_dai_name = "msm-stub-tx",
  5387. .no_pcm = 1,
  5388. .dpcm_capture = 1,
  5389. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  5390. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5391. .ops = &qcs405_tdm_be_ops,
  5392. .ignore_suspend = 1,
  5393. },
  5394. {
  5395. .name = LPASS_BE_QUAT_TDM_RX_0,
  5396. .stream_name = "Quaternary TDM0 Playback",
  5397. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  5398. .platform_name = "msm-pcm-routing",
  5399. .codec_name = "msm-stub-codec.1",
  5400. .codec_dai_name = "msm-stub-rx",
  5401. .no_pcm = 1,
  5402. .dpcm_playback = 1,
  5403. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  5404. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  5405. .ops = &qcs405_tdm_be_ops,
  5406. .ignore_suspend = 1,
  5407. .ignore_pmdown_time = 1,
  5408. },
  5409. {
  5410. .name = LPASS_BE_QUAT_TDM_TX_0,
  5411. .stream_name = "Quaternary TDM0 Capture",
  5412. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  5413. .platform_name = "msm-pcm-routing",
  5414. .codec_name = "msm-stub-codec.1",
  5415. .codec_dai_name = "msm-stub-tx",
  5416. .no_pcm = 1,
  5417. .dpcm_capture = 1,
  5418. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  5419. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5420. .ops = &qcs405_tdm_be_ops,
  5421. .ignore_suspend = 1,
  5422. },
  5423. };
  5424. static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
  5425. {
  5426. .name = LPASS_BE_SLIMBUS_0_RX,
  5427. .stream_name = "Slimbus Playback",
  5428. .cpu_dai_name = "msm-dai-q6-dev.16384",
  5429. .platform_name = "msm-pcm-routing",
  5430. .codec_name = "tasha_codec",
  5431. .codec_dai_name = "tasha_rx1",
  5432. .no_pcm = 1,
  5433. .dpcm_playback = 1,
  5434. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  5435. .init = &msm_audrx_init,
  5436. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5437. /* this dainlink has playback support */
  5438. .ignore_pmdown_time = 1,
  5439. .ignore_suspend = 1,
  5440. .ops = &msm_be_ops,
  5441. },
  5442. {
  5443. .name = LPASS_BE_SLIMBUS_0_TX,
  5444. .stream_name = "Slimbus Capture",
  5445. .cpu_dai_name = "msm-dai-q6-dev.16385",
  5446. .platform_name = "msm-pcm-routing",
  5447. .codec_name = "tasha_codec",
  5448. .codec_dai_name = "tasha_tx1",
  5449. .no_pcm = 1,
  5450. .dpcm_capture = 1,
  5451. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  5452. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5453. .ignore_suspend = 1,
  5454. .ops = &msm_be_ops,
  5455. },
  5456. {
  5457. .name = LPASS_BE_SLIMBUS_1_RX,
  5458. .stream_name = "Slimbus1 Playback",
  5459. .cpu_dai_name = "msm-dai-q6-dev.16386",
  5460. .platform_name = "msm-pcm-routing",
  5461. .codec_name = "tasha_codec",
  5462. .codec_dai_name = "tasha_rx1",
  5463. .no_pcm = 1,
  5464. .dpcm_playback = 1,
  5465. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  5466. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5467. .ops = &msm_be_ops,
  5468. /* dai link has playback support */
  5469. .ignore_pmdown_time = 1,
  5470. .ignore_suspend = 1,
  5471. },
  5472. {
  5473. .name = LPASS_BE_SLIMBUS_1_TX,
  5474. .stream_name = "Slimbus1 Capture",
  5475. .cpu_dai_name = "msm-dai-q6-dev.16387",
  5476. .platform_name = "msm-pcm-routing",
  5477. .codec_name = "tasha_codec",
  5478. .codec_dai_name = "tasha_tx3",
  5479. .no_pcm = 1,
  5480. .dpcm_capture = 1,
  5481. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  5482. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5483. .ops = &msm_be_ops,
  5484. .ignore_suspend = 1,
  5485. },
  5486. {
  5487. .name = LPASS_BE_SLIMBUS_2_RX,
  5488. .stream_name = "Slimbus2 Playback",
  5489. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5490. .platform_name = "msm-pcm-routing",
  5491. .codec_name = "tasha_codec",
  5492. .codec_dai_name = "tasha_rx2",
  5493. .no_pcm = 1,
  5494. .dpcm_playback = 1,
  5495. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  5496. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5497. .ops = &msm_be_ops,
  5498. .ignore_pmdown_time = 1,
  5499. .ignore_suspend = 1,
  5500. },
  5501. {
  5502. .name = LPASS_BE_SLIMBUS_3_RX,
  5503. .stream_name = "Slimbus3 Playback",
  5504. .cpu_dai_name = "msm-dai-q6-dev.16390",
  5505. .platform_name = "msm-pcm-routing",
  5506. .codec_name = "tasha_codec",
  5507. .codec_dai_name = "tasha_rx1",
  5508. .no_pcm = 1,
  5509. .dpcm_playback = 1,
  5510. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  5511. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5512. .ops = &msm_be_ops,
  5513. /* dai link has playback support */
  5514. .ignore_pmdown_time = 1,
  5515. .ignore_suspend = 1,
  5516. },
  5517. {
  5518. .name = LPASS_BE_SLIMBUS_3_TX,
  5519. .stream_name = "Slimbus3 Capture",
  5520. .cpu_dai_name = "msm-dai-q6-dev.16391",
  5521. .platform_name = "msm-pcm-routing",
  5522. .codec_name = "tasha_codec",
  5523. .codec_dai_name = "tasha_tx1",
  5524. .no_pcm = 1,
  5525. .dpcm_capture = 1,
  5526. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  5527. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5528. .ops = &msm_be_ops,
  5529. .ignore_suspend = 1,
  5530. },
  5531. {
  5532. .name = LPASS_BE_SLIMBUS_4_RX,
  5533. .stream_name = "Slimbus4 Playback",
  5534. .cpu_dai_name = "msm-dai-q6-dev.16392",
  5535. .platform_name = "msm-pcm-routing",
  5536. .codec_name = "tasha_codec",
  5537. .codec_dai_name = "tasha_rx1",
  5538. .no_pcm = 1,
  5539. .dpcm_playback = 1,
  5540. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  5541. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5542. .ops = &msm_be_ops,
  5543. /* dai link has playback support */
  5544. .ignore_pmdown_time = 1,
  5545. .ignore_suspend = 1,
  5546. },
  5547. {
  5548. .name = LPASS_BE_SLIMBUS_5_RX,
  5549. .stream_name = "Slimbus5 Playback",
  5550. .cpu_dai_name = "msm-dai-q6-dev.16394",
  5551. .platform_name = "msm-pcm-routing",
  5552. .codec_name = "tasha_codec",
  5553. .codec_dai_name = "tasha_rx3",
  5554. .no_pcm = 1,
  5555. .dpcm_playback = 1,
  5556. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  5557. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5558. .ops = &msm_be_ops,
  5559. /* dai link has playback support */
  5560. .ignore_pmdown_time = 1,
  5561. .ignore_suspend = 1,
  5562. },
  5563. {
  5564. .name = LPASS_BE_SLIMBUS_6_RX,
  5565. .stream_name = "Slimbus6 Playback",
  5566. .cpu_dai_name = "msm-dai-q6-dev.16396",
  5567. .platform_name = "msm-pcm-routing",
  5568. .codec_name = "tasha_codec",
  5569. .codec_dai_name = "tasha_rx4",
  5570. .no_pcm = 1,
  5571. .dpcm_playback = 1,
  5572. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  5573. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5574. .ops = &msm_be_ops,
  5575. /* dai link has playback support */
  5576. .ignore_pmdown_time = 1,
  5577. .ignore_suspend = 1,
  5578. },
  5579. /* Slimbus VI Recording */
  5580. {
  5581. .name = LPASS_BE_SLIMBUS_TX_VI,
  5582. .stream_name = "Slimbus4 Capture",
  5583. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5584. .platform_name = "msm-pcm-routing",
  5585. .codec_name = "tasha_codec",
  5586. .codec_dai_name = "tasha_vifeedback",
  5587. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5588. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5589. .ops = &msm_be_ops,
  5590. .ignore_suspend = 1,
  5591. .no_pcm = 1,
  5592. .dpcm_capture = 1,
  5593. .ignore_pmdown_time = 1,
  5594. },
  5595. };
  5596. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  5597. {
  5598. .name = LPASS_BE_SLIMBUS_7_RX,
  5599. .stream_name = "Slimbus7 Playback",
  5600. .cpu_dai_name = "msm-dai-q6-dev.16398",
  5601. .platform_name = "msm-pcm-routing",
  5602. .codec_name = "btfmslim_slave",
  5603. /* BT codec driver determines capabilities based on
  5604. * dai name, bt codecdai name should always contains
  5605. * supported usecase information
  5606. */
  5607. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  5608. .no_pcm = 1,
  5609. .dpcm_playback = 1,
  5610. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  5611. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5612. .ops = &msm_wcn_ops,
  5613. /* dai link has playback support */
  5614. .ignore_pmdown_time = 1,
  5615. .ignore_suspend = 1,
  5616. },
  5617. {
  5618. .name = LPASS_BE_SLIMBUS_7_TX,
  5619. .stream_name = "Slimbus7 Capture",
  5620. .cpu_dai_name = "msm-dai-q6-dev.16399",
  5621. .platform_name = "msm-pcm-routing",
  5622. .codec_name = "btfmslim_slave",
  5623. .codec_dai_name = "btfm_bt_sco_slim_tx",
  5624. .no_pcm = 1,
  5625. .dpcm_capture = 1,
  5626. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  5627. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5628. .ops = &msm_wcn_ops,
  5629. .ignore_suspend = 1,
  5630. },
  5631. {
  5632. .name = LPASS_BE_SLIMBUS_8_TX,
  5633. .stream_name = "Slimbus8 Capture",
  5634. .cpu_dai_name = "msm-dai-q6-dev.16401",
  5635. .platform_name = "msm-pcm-routing",
  5636. .codec_name = "btfmslim_slave",
  5637. .codec_dai_name = "btfm_fm_slim_tx",
  5638. .no_pcm = 1,
  5639. .dpcm_capture = 1,
  5640. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  5641. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5642. .init = &msm_wcn_init,
  5643. .ops = &msm_wcn_ops,
  5644. .ignore_suspend = 1,
  5645. },
  5646. };
  5647. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  5648. {
  5649. .name = LPASS_BE_PRI_MI2S_RX,
  5650. .stream_name = "Primary MI2S Playback",
  5651. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  5652. .platform_name = "msm-pcm-routing",
  5653. .codec_name = "msm-stub-codec.1",
  5654. .codec_dai_name = "msm-stub-rx",
  5655. .no_pcm = 1,
  5656. .dpcm_playback = 1,
  5657. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  5658. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5659. .ops = &msm_mi2s_be_ops,
  5660. .ignore_suspend = 1,
  5661. .ignore_pmdown_time = 1,
  5662. },
  5663. {
  5664. .name = LPASS_BE_PRI_MI2S_TX,
  5665. .stream_name = "Primary MI2S Capture",
  5666. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  5667. .platform_name = "msm-pcm-routing",
  5668. .codec_name = "msm-stub-codec.1",
  5669. .codec_dai_name = "msm-stub-tx",
  5670. .no_pcm = 1,
  5671. .dpcm_capture = 1,
  5672. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  5673. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5674. .ops = &msm_mi2s_be_ops,
  5675. .ignore_suspend = 1,
  5676. },
  5677. {
  5678. .name = LPASS_BE_SEC_MI2S_RX,
  5679. .stream_name = "Secondary MI2S Playback",
  5680. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  5681. .platform_name = "msm-pcm-routing",
  5682. .codec_name = "msm-stub-codec.1",
  5683. .codec_dai_name = "msm-stub-rx",
  5684. .no_pcm = 1,
  5685. .dpcm_playback = 1,
  5686. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  5687. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5688. .ops = &msm_mi2s_be_ops,
  5689. .ignore_suspend = 1,
  5690. .ignore_pmdown_time = 1,
  5691. },
  5692. {
  5693. .name = LPASS_BE_SEC_MI2S_TX,
  5694. .stream_name = "Secondary MI2S Capture",
  5695. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  5696. .platform_name = "msm-pcm-routing",
  5697. .codec_name = "msm-stub-codec.1",
  5698. .codec_dai_name = "msm-stub-tx",
  5699. .no_pcm = 1,
  5700. .dpcm_capture = 1,
  5701. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  5702. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5703. .ops = &msm_mi2s_be_ops,
  5704. .ignore_suspend = 1,
  5705. },
  5706. {
  5707. .name = LPASS_BE_TERT_MI2S_RX,
  5708. .stream_name = "Tertiary MI2S Playback",
  5709. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5710. .platform_name = "msm-pcm-routing",
  5711. .codec_name = "msm-stub-codec.1",
  5712. .codec_dai_name = "msm-stub-rx",
  5713. .no_pcm = 1,
  5714. .dpcm_playback = 1,
  5715. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  5716. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5717. .ops = &msm_mi2s_be_ops,
  5718. .ignore_suspend = 1,
  5719. .ignore_pmdown_time = 1,
  5720. },
  5721. {
  5722. .name = LPASS_BE_TERT_MI2S_TX,
  5723. .stream_name = "Tertiary MI2S Capture",
  5724. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  5725. .platform_name = "msm-pcm-routing",
  5726. .codec_name = "msm-stub-codec.1",
  5727. .codec_dai_name = "msm-stub-tx",
  5728. .no_pcm = 1,
  5729. .dpcm_capture = 1,
  5730. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  5731. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5732. .ops = &msm_mi2s_be_ops,
  5733. .ignore_suspend = 1,
  5734. },
  5735. {
  5736. .name = LPASS_BE_QUAT_MI2S_RX,
  5737. .stream_name = "Quaternary MI2S Playback",
  5738. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5739. .platform_name = "msm-pcm-routing",
  5740. .codec_name = "msm-stub-codec.1",
  5741. .codec_dai_name = "msm-stub-rx",
  5742. .no_pcm = 1,
  5743. .dpcm_playback = 1,
  5744. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  5745. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5746. .ops = &msm_mi2s_be_ops,
  5747. .ignore_suspend = 1,
  5748. .ignore_pmdown_time = 1,
  5749. },
  5750. {
  5751. .name = LPASS_BE_QUAT_MI2S_TX,
  5752. .stream_name = "Quaternary MI2S Capture",
  5753. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5754. .platform_name = "msm-pcm-routing",
  5755. .codec_name = "msm-stub-codec.1",
  5756. .codec_dai_name = "msm-stub-tx",
  5757. .no_pcm = 1,
  5758. .dpcm_capture = 1,
  5759. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  5760. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5761. .ops = &msm_mi2s_be_ops,
  5762. .ignore_suspend = 1,
  5763. },
  5764. {
  5765. .name = LPASS_BE_QUIN_MI2S_RX,
  5766. .stream_name = "Quinary MI2S Playback",
  5767. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  5768. .platform_name = "msm-pcm-routing",
  5769. .codec_name = "msm-stub-codec.1",
  5770. .codec_dai_name = "msm-stub-rx",
  5771. .no_pcm = 1,
  5772. .dpcm_playback = 1,
  5773. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  5774. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5775. .ops = &msm_mi2s_be_ops,
  5776. .ignore_suspend = 1,
  5777. .ignore_pmdown_time = 1,
  5778. },
  5779. {
  5780. .name = LPASS_BE_QUIN_MI2S_TX,
  5781. .stream_name = "Quinary MI2S Capture",
  5782. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  5783. .platform_name = "msm-pcm-routing",
  5784. .codec_name = "msm-stub-codec.1",
  5785. .codec_dai_name = "msm-stub-tx",
  5786. .no_pcm = 1,
  5787. .dpcm_capture = 1,
  5788. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  5789. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5790. .ops = &msm_mi2s_be_ops,
  5791. .ignore_suspend = 1,
  5792. },
  5793. };
  5794. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  5795. /* Primary AUX PCM Backend DAI Links */
  5796. {
  5797. .name = LPASS_BE_AUXPCM_RX,
  5798. .stream_name = "AUX PCM Playback",
  5799. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5800. .platform_name = "msm-pcm-routing",
  5801. .codec_name = "msm-stub-codec.1",
  5802. .codec_dai_name = "msm-stub-rx",
  5803. .no_pcm = 1,
  5804. .dpcm_playback = 1,
  5805. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5806. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5807. .ignore_pmdown_time = 1,
  5808. .ignore_suspend = 1,
  5809. },
  5810. {
  5811. .name = LPASS_BE_AUXPCM_TX,
  5812. .stream_name = "AUX PCM Capture",
  5813. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5814. .platform_name = "msm-pcm-routing",
  5815. .codec_name = "msm-stub-codec.1",
  5816. .codec_dai_name = "msm-stub-tx",
  5817. .no_pcm = 1,
  5818. .dpcm_capture = 1,
  5819. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5820. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5821. .ignore_suspend = 1,
  5822. },
  5823. /* Secondary AUX PCM Backend DAI Links */
  5824. {
  5825. .name = LPASS_BE_SEC_AUXPCM_RX,
  5826. .stream_name = "Sec AUX PCM Playback",
  5827. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5828. .platform_name = "msm-pcm-routing",
  5829. .codec_name = "msm-stub-codec.1",
  5830. .codec_dai_name = "msm-stub-rx",
  5831. .no_pcm = 1,
  5832. .dpcm_playback = 1,
  5833. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  5834. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5835. .ignore_pmdown_time = 1,
  5836. .ignore_suspend = 1,
  5837. },
  5838. {
  5839. .name = LPASS_BE_SEC_AUXPCM_TX,
  5840. .stream_name = "Sec AUX PCM Capture",
  5841. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5842. .platform_name = "msm-pcm-routing",
  5843. .codec_name = "msm-stub-codec.1",
  5844. .codec_dai_name = "msm-stub-tx",
  5845. .no_pcm = 1,
  5846. .dpcm_capture = 1,
  5847. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  5848. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5849. .ignore_suspend = 1,
  5850. },
  5851. /* Tertiary AUX PCM Backend DAI Links */
  5852. {
  5853. .name = LPASS_BE_TERT_AUXPCM_RX,
  5854. .stream_name = "Tert AUX PCM Playback",
  5855. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5856. .platform_name = "msm-pcm-routing",
  5857. .codec_name = "msm-stub-codec.1",
  5858. .codec_dai_name = "msm-stub-rx",
  5859. .no_pcm = 1,
  5860. .dpcm_playback = 1,
  5861. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5862. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5863. .ignore_suspend = 1,
  5864. },
  5865. {
  5866. .name = LPASS_BE_TERT_AUXPCM_TX,
  5867. .stream_name = "Tert AUX PCM Capture",
  5868. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5869. .platform_name = "msm-pcm-routing",
  5870. .codec_name = "msm-stub-codec.1",
  5871. .codec_dai_name = "msm-stub-tx",
  5872. .no_pcm = 1,
  5873. .dpcm_capture = 1,
  5874. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5875. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5876. .ignore_suspend = 1,
  5877. },
  5878. /* Quaternary AUX PCM Backend DAI Links */
  5879. {
  5880. .name = LPASS_BE_QUAT_AUXPCM_RX,
  5881. .stream_name = "Quat AUX PCM Playback",
  5882. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5883. .platform_name = "msm-pcm-routing",
  5884. .codec_name = "msm-stub-codec.1",
  5885. .codec_dai_name = "msm-stub-rx",
  5886. .no_pcm = 1,
  5887. .dpcm_playback = 1,
  5888. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  5889. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5890. .ignore_pmdown_time = 1,
  5891. .ignore_suspend = 1,
  5892. },
  5893. {
  5894. .name = LPASS_BE_QUAT_AUXPCM_TX,
  5895. .stream_name = "Quat AUX PCM Capture",
  5896. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5897. .platform_name = "msm-pcm-routing",
  5898. .codec_name = "msm-stub-codec.1",
  5899. .codec_dai_name = "msm-stub-tx",
  5900. .no_pcm = 1,
  5901. .dpcm_capture = 1,
  5902. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  5903. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5904. .ignore_suspend = 1,
  5905. },
  5906. /* Quinary AUX PCM Backend DAI Links */
  5907. {
  5908. .name = LPASS_BE_QUIN_AUXPCM_RX,
  5909. .stream_name = "Quin AUX PCM Playback",
  5910. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  5911. .platform_name = "msm-pcm-routing",
  5912. .codec_name = "msm-stub-codec.1",
  5913. .codec_dai_name = "msm-stub-rx",
  5914. .no_pcm = 1,
  5915. .dpcm_playback = 1,
  5916. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  5917. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5918. .ignore_pmdown_time = 1,
  5919. .ignore_suspend = 1,
  5920. },
  5921. {
  5922. .name = LPASS_BE_QUIN_AUXPCM_TX,
  5923. .stream_name = "Quin AUX PCM Capture",
  5924. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  5925. .platform_name = "msm-pcm-routing",
  5926. .codec_name = "msm-stub-codec.1",
  5927. .codec_dai_name = "msm-stub-tx",
  5928. .no_pcm = 1,
  5929. .dpcm_capture = 1,
  5930. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  5931. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5932. .ignore_suspend = 1,
  5933. },
  5934. };
  5935. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  5936. /* WSA CDC DMA Backend DAI Links */
  5937. {
  5938. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  5939. .stream_name = "WSA CDC DMA0 Playback",
  5940. .cpu_dai_name = "msm-dai-cdc-dma.45056",
  5941. .platform_name = "msm-pcm-routing",
  5942. .codec_name = "bolero_codec",
  5943. .codec_dai_name = "wsa_macro_rx1",
  5944. .no_pcm = 1,
  5945. .dpcm_playback = 1,
  5946. .init = &msm_wsa_cdc_dma_init,
  5947. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  5948. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5949. .ignore_pmdown_time = 1,
  5950. .ignore_suspend = 1,
  5951. .ops = &msm_cdc_dma_be_ops,
  5952. },
  5953. {
  5954. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5955. .stream_name = "WSA CDC DMA0 Capture",
  5956. .cpu_dai_name = "msm-dai-cdc-dma.45057",
  5957. .platform_name = "msm-pcm-hostless",
  5958. .codec_name = "bolero_codec",
  5959. .codec_dai_name = "wsa_macro_vifeedback",
  5960. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5961. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5962. .ignore_suspend = 1,
  5963. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5964. .ops = &msm_cdc_dma_be_ops,
  5965. },
  5966. {
  5967. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  5968. .stream_name = "WSA CDC DMA1 Playback",
  5969. .cpu_dai_name = "msm-dai-cdc-dma.45058",
  5970. .platform_name = "msm-pcm-routing",
  5971. .codec_name = "bolero_codec",
  5972. .codec_dai_name = "wsa_macro_rx_mix",
  5973. .no_pcm = 1,
  5974. .dpcm_playback = 1,
  5975. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  5976. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5977. .ignore_pmdown_time = 1,
  5978. .ignore_suspend = 1,
  5979. .ops = &msm_cdc_dma_be_ops,
  5980. },
  5981. {
  5982. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  5983. .stream_name = "WSA CDC DMA1 Capture",
  5984. .cpu_dai_name = "msm-dai-cdc-dma.45059",
  5985. .platform_name = "msm-pcm-routing",
  5986. .codec_name = "bolero_codec",
  5987. .codec_dai_name = "wsa_macro_echo",
  5988. .no_pcm = 1,
  5989. .dpcm_capture = 1,
  5990. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  5991. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5992. .ignore_suspend = 1,
  5993. .ops = &msm_cdc_dma_be_ops,
  5994. },
  5995. {
  5996. .name = LPASS_BE_WSA_CDC_DMA_TX_2,
  5997. .stream_name = "WSA CDC DMA2 Capture",
  5998. .cpu_dai_name = "msm-dai-cdc-dma.45061",
  5999. .platform_name = "msm-pcm-routing",
  6000. .codec_name = "bolero_codec",
  6001. .codec_dai_name = "msm-stub-tx",
  6002. .no_pcm = 1,
  6003. .dpcm_capture = 1,
  6004. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2,
  6005. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6006. .ignore_suspend = 1,
  6007. .ops = &msm_cdc_dma_be_ops,
  6008. },
  6009. };
  6010. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  6011. {
  6012. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  6013. .stream_name = "VA CDC DMA0 Capture",
  6014. .cpu_dai_name = "msm-dai-cdc-dma.49153",
  6015. .platform_name = "msm-pcm-routing",
  6016. .codec_name = "bolero_codec",
  6017. .codec_dai_name = "va_macro_tx1",
  6018. .no_pcm = 1,
  6019. .dpcm_capture = 1,
  6020. .init = &msm_va_cdc_dma_init,
  6021. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  6022. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6023. .ignore_suspend = 1,
  6024. .ops = &msm_cdc_dma_be_ops,
  6025. },
  6026. {
  6027. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  6028. .stream_name = "VA CDC DMA1 Capture",
  6029. .cpu_dai_name = "msm-dai-cdc-dma.49155",
  6030. .platform_name = "msm-pcm-routing",
  6031. .codec_name = "bolero_codec",
  6032. .codec_dai_name = "va_macro_tx2",
  6033. .no_pcm = 1,
  6034. .dpcm_capture = 1,
  6035. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  6036. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6037. .ignore_suspend = 1,
  6038. .ops = &msm_cdc_dma_be_ops,
  6039. },
  6040. };
  6041. static struct snd_soc_dai_link msm_qcs405_dai_links[
  6042. ARRAY_SIZE(msm_common_dai_links) +
  6043. ARRAY_SIZE(msm_tasha_fe_dai_links) +
  6044. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6045. ARRAY_SIZE(msm_common_be_dai_links) +
  6046. ARRAY_SIZE(msm_tasha_be_dai_links) +
  6047. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6048. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6049. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6050. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  6051. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links)];
  6052. static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
  6053. {
  6054. int ret = 0;
  6055. ret = audio_notifier_register("qcs405", AUDIO_NOTIFIER_ADSP_DOMAIN,
  6056. &service_nb);
  6057. if (ret < 0)
  6058. pr_err("%s: Audio notifier register failed ret = %d\n",
  6059. __func__, ret);
  6060. return ret;
  6061. }
  6062. static int msm_snd_vad_cfg_put(struct snd_kcontrol *kcontrol,
  6063. struct snd_ctl_elem_value *ucontrol)
  6064. {
  6065. int ret = 0;
  6066. int port_id;
  6067. uint32_t vad_enable = ucontrol->value.integer.value[0];
  6068. uint32_t preroll_config = ucontrol->value.integer.value[1];
  6069. uint32_t vad_intf = ucontrol->value.integer.value[2];
  6070. if ((preroll_config < 0) || (preroll_config > 1000) ||
  6071. (vad_enable < 0) || (vad_enable > 1) ||
  6072. (vad_intf > MSM_BACKEND_DAI_MAX)) {
  6073. pr_err("%s: Invalid arguments\n", __func__);
  6074. ret = -EINVAL;
  6075. goto done;
  6076. }
  6077. pr_debug("%s: vad_enable=%d preroll_config=%d vad_intf=%d\n", __func__,
  6078. vad_enable, preroll_config, vad_intf);
  6079. ret = msm_vad_get_portid_from_beid(vad_intf, &port_id);
  6080. if (ret) {
  6081. pr_err("%s: Invalid vad interface\n", __func__);
  6082. goto done;
  6083. }
  6084. afe_set_vad_cfg(vad_enable, preroll_config, port_id);
  6085. done:
  6086. return ret;
  6087. }
  6088. static int msm_snd_card_codec_late_probe(struct snd_soc_card *card)
  6089. {
  6090. int ret = 0;
  6091. uint32_t tasha_codec = 0;
  6092. ret = afe_cal_init_hwdep(card);
  6093. if (ret) {
  6094. dev_err(card->dev, "afe cal hwdep init failed (%d)\n", ret);
  6095. ret = 0;
  6096. }
  6097. /* tasha late probe when it is present */
  6098. ret = of_property_read_u32(card->dev->of_node, "qcom,tasha-codec",
  6099. &tasha_codec);
  6100. if (ret) {
  6101. dev_err(card->dev, "%s: No DT match tasha codec\n", __func__);
  6102. ret = 0;
  6103. } else {
  6104. if (tasha_codec) {
  6105. ret = msm_snd_card_tasha_late_probe(card);
  6106. if (ret)
  6107. dev_err(card->dev, "%s: tasha late probe err\n",
  6108. __func__);
  6109. }
  6110. }
  6111. return ret;
  6112. }
  6113. struct snd_soc_card snd_soc_card_qcs405_msm = {
  6114. .name = "qcs405-snd-card",
  6115. .controls = msm_snd_controls,
  6116. .num_controls = ARRAY_SIZE(msm_snd_controls),
  6117. .late_probe = msm_snd_card_codec_late_probe,
  6118. };
  6119. static int msm_populate_dai_link_component_of_node(
  6120. struct snd_soc_card *card)
  6121. {
  6122. int i, index, ret = 0;
  6123. struct device *cdev = card->dev;
  6124. struct snd_soc_dai_link *dai_link = card->dai_link;
  6125. struct device_node *np;
  6126. if (!cdev) {
  6127. pr_err("%s: Sound card device memory NULL\n", __func__);
  6128. return -ENODEV;
  6129. }
  6130. for (i = 0; i < card->num_links; i++) {
  6131. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6132. continue;
  6133. /* populate platform_of_node for snd card dai links */
  6134. if (dai_link[i].platform_name &&
  6135. !dai_link[i].platform_of_node) {
  6136. index = of_property_match_string(cdev->of_node,
  6137. "asoc-platform-names",
  6138. dai_link[i].platform_name);
  6139. if (index < 0) {
  6140. pr_err("%s: No match found for platform name: %s\n",
  6141. __func__, dai_link[i].platform_name);
  6142. ret = index;
  6143. goto err;
  6144. }
  6145. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6146. index);
  6147. if (!np) {
  6148. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6149. __func__, dai_link[i].platform_name,
  6150. index);
  6151. ret = -ENODEV;
  6152. goto err;
  6153. }
  6154. dai_link[i].platform_of_node = np;
  6155. dai_link[i].platform_name = NULL;
  6156. }
  6157. /* populate cpu_of_node for snd card dai links */
  6158. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6159. index = of_property_match_string(cdev->of_node,
  6160. "asoc-cpu-names",
  6161. dai_link[i].cpu_dai_name);
  6162. if (index >= 0) {
  6163. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6164. index);
  6165. if (!np) {
  6166. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6167. __func__,
  6168. dai_link[i].cpu_dai_name);
  6169. ret = -ENODEV;
  6170. goto err;
  6171. }
  6172. dai_link[i].cpu_of_node = np;
  6173. dai_link[i].cpu_dai_name = NULL;
  6174. }
  6175. }
  6176. /* populate codec_of_node for snd card dai links */
  6177. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6178. index = of_property_match_string(cdev->of_node,
  6179. "asoc-codec-names",
  6180. dai_link[i].codec_name);
  6181. if (index < 0)
  6182. continue;
  6183. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6184. index);
  6185. if (!np) {
  6186. pr_err("%s: retrieving phandle for codec %s failed\n",
  6187. __func__, dai_link[i].codec_name);
  6188. ret = -ENODEV;
  6189. goto err;
  6190. }
  6191. dai_link[i].codec_of_node = np;
  6192. dai_link[i].codec_name = NULL;
  6193. }
  6194. }
  6195. err:
  6196. return ret;
  6197. }
  6198. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6199. {
  6200. return 0;
  6201. }
  6202. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6203. struct snd_pcm_hw_params *params)
  6204. {
  6205. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6206. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6207. int ret = 0;
  6208. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6209. 151};
  6210. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6211. 134, 135, 136, 137, 138, 139,
  6212. 140, 141, 142, 143};
  6213. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6214. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6215. slim_rx_cfg[SLIM_RX_0].channels,
  6216. rx_ch);
  6217. if (ret < 0)
  6218. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6219. __func__, ret);
  6220. } else {
  6221. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6222. slim_tx_cfg[SLIM_TX_0].channels,
  6223. tx_ch, 0, 0);
  6224. if (ret < 0)
  6225. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6226. __func__, ret);
  6227. }
  6228. return ret;
  6229. }
  6230. static struct snd_soc_ops msm_stub_be_ops = {
  6231. .hw_params = msm_snd_stub_hw_params,
  6232. };
  6233. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6234. /* FrontEnd DAI Links */
  6235. {
  6236. .name = "MSMSTUB Media1",
  6237. .stream_name = "MultiMedia1",
  6238. .cpu_dai_name = "MultiMedia1",
  6239. .platform_name = "msm-pcm-dsp.0",
  6240. .dynamic = 1,
  6241. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6242. .dpcm_playback = 1,
  6243. .dpcm_capture = 1,
  6244. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6245. SND_SOC_DPCM_TRIGGER_POST},
  6246. .codec_dai_name = "snd-soc-dummy-dai",
  6247. .codec_name = "snd-soc-dummy",
  6248. .ignore_suspend = 1,
  6249. /* this dainlink has playback support */
  6250. .ignore_pmdown_time = 1,
  6251. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6252. },
  6253. };
  6254. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6255. /* Backend DAI Links */
  6256. {
  6257. .name = LPASS_BE_SLIMBUS_0_RX,
  6258. .stream_name = "Slimbus Playback",
  6259. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6260. .platform_name = "msm-pcm-routing",
  6261. .codec_name = "msm-stub-codec.1",
  6262. .codec_dai_name = "msm-stub-rx",
  6263. .no_pcm = 1,
  6264. .dpcm_playback = 1,
  6265. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6266. .init = &msm_audrx_stub_init,
  6267. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6268. .ignore_pmdown_time = 1, /* dai link has playback support */
  6269. .ignore_suspend = 1,
  6270. .ops = &msm_stub_be_ops,
  6271. },
  6272. {
  6273. .name = LPASS_BE_SLIMBUS_0_TX,
  6274. .stream_name = "Slimbus Capture",
  6275. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6276. .platform_name = "msm-pcm-routing",
  6277. .codec_name = "msm-stub-codec.1",
  6278. .codec_dai_name = "msm-stub-tx",
  6279. .no_pcm = 1,
  6280. .dpcm_capture = 1,
  6281. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6282. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6283. .ignore_suspend = 1,
  6284. .ops = &msm_stub_be_ops,
  6285. },
  6286. };
  6287. static struct snd_soc_dai_link msm_stub_dai_links[
  6288. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6289. ARRAY_SIZE(msm_stub_be_dai_links)];
  6290. struct snd_soc_card snd_soc_card_stub_msm = {
  6291. .name = "qcs405-stub-snd-card",
  6292. };
  6293. static const struct of_device_id qcs405_asoc_machine_of_match[] = {
  6294. { .compatible = "qcom,qcs405-asoc-snd",
  6295. .data = "codec"},
  6296. { .compatible = "qcom,qcs405-asoc-snd-stub",
  6297. .data = "stub_codec"},
  6298. {},
  6299. };
  6300. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6301. {
  6302. struct snd_soc_card *card = NULL;
  6303. struct snd_soc_dai_link *dailink;
  6304. int total_links = 0;
  6305. uint32_t tasha_codec = 0, auxpcm_audio_intf = 0;
  6306. uint32_t va_bolero_codec = 0, wsa_bolero_codec = 0, mi2s_audio_intf = 0;
  6307. const struct of_device_id *match;
  6308. int rc = 0;
  6309. match = of_match_node(qcs405_asoc_machine_of_match, dev->of_node);
  6310. if (!match) {
  6311. dev_err(dev, "%s: No DT match found for sound card\n",
  6312. __func__);
  6313. return NULL;
  6314. }
  6315. if (!strcmp(match->data, "codec")) {
  6316. card = &snd_soc_card_qcs405_msm;
  6317. memcpy(msm_qcs405_dai_links + total_links,
  6318. msm_common_dai_links,
  6319. sizeof(msm_common_dai_links));
  6320. total_links += ARRAY_SIZE(msm_common_dai_links);
  6321. rc = of_property_read_u32(dev->of_node, "qcom,tasha-codec",
  6322. &tasha_codec);
  6323. if (rc) {
  6324. dev_dbg(dev, "%s: No DT match tasha codec\n",
  6325. __func__);
  6326. } else {
  6327. if (tasha_codec) {
  6328. dev_dbg(dev, "%s(): Tasha codec is present\n",
  6329. __func__);
  6330. memcpy(msm_qcs405_dai_links + total_links,
  6331. msm_tasha_fe_dai_links,
  6332. sizeof(msm_tasha_fe_dai_links));
  6333. total_links +=
  6334. ARRAY_SIZE(msm_tasha_fe_dai_links);
  6335. }
  6336. }
  6337. memcpy(msm_qcs405_dai_links + total_links,
  6338. msm_common_misc_fe_dai_links,
  6339. sizeof(msm_common_misc_fe_dai_links));
  6340. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  6341. memcpy(msm_qcs405_dai_links + total_links,
  6342. msm_common_be_dai_links,
  6343. sizeof(msm_common_be_dai_links));
  6344. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  6345. if (tasha_codec) {
  6346. memcpy(msm_qcs405_dai_links + total_links,
  6347. msm_tasha_be_dai_links,
  6348. sizeof(msm_tasha_be_dai_links));
  6349. total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
  6350. }
  6351. rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
  6352. &va_bolero_codec);
  6353. if (rc) {
  6354. dev_dbg(dev, "%s: No DT match VA Macro codec\n",
  6355. __func__);
  6356. } else {
  6357. if (va_bolero_codec) {
  6358. dev_dbg(dev, "%s(): VA macro in bolero codec present\n",
  6359. __func__);
  6360. memcpy(msm_qcs405_dai_links + total_links,
  6361. msm_va_cdc_dma_be_dai_links,
  6362. sizeof(msm_va_cdc_dma_be_dai_links));
  6363. total_links +=
  6364. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  6365. }
  6366. }
  6367. rc = of_property_read_u32(dev->of_node, "qcom,wsa-bolero-codec",
  6368. &wsa_bolero_codec);
  6369. if (rc) {
  6370. dev_dbg(dev, "%s: No DT match WSA Macro codec\n",
  6371. __func__);
  6372. } else {
  6373. if (wsa_bolero_codec) {
  6374. dev_dbg(dev, "%s(): WSAmacro in bolero codec present\n",
  6375. __func__);
  6376. memcpy(msm_qcs405_dai_links + total_links,
  6377. msm_wsa_cdc_dma_be_dai_links,
  6378. sizeof(msm_wsa_cdc_dma_be_dai_links));
  6379. total_links +=
  6380. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  6381. }
  6382. }
  6383. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  6384. &mi2s_audio_intf);
  6385. if (rc) {
  6386. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  6387. __func__);
  6388. } else {
  6389. if (mi2s_audio_intf) {
  6390. memcpy(msm_qcs405_dai_links + total_links,
  6391. msm_mi2s_be_dai_links,
  6392. sizeof(msm_mi2s_be_dai_links));
  6393. total_links +=
  6394. ARRAY_SIZE(msm_mi2s_be_dai_links);
  6395. }
  6396. }
  6397. rc = of_property_read_u32(dev->of_node,
  6398. "qcom,auxpcm-audio-intf",
  6399. &auxpcm_audio_intf);
  6400. if (rc) {
  6401. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  6402. __func__);
  6403. } else {
  6404. if (auxpcm_audio_intf) {
  6405. memcpy(msm_qcs405_dai_links + total_links,
  6406. msm_auxpcm_be_dai_links,
  6407. sizeof(msm_auxpcm_be_dai_links));
  6408. total_links +=
  6409. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  6410. }
  6411. }
  6412. dailink = msm_qcs405_dai_links;
  6413. } else if (!strcmp(match->data, "stub_codec")) {
  6414. card = &snd_soc_card_stub_msm;
  6415. memcpy(msm_stub_dai_links + total_links,
  6416. msm_stub_fe_dai_links,
  6417. sizeof(msm_stub_fe_dai_links));
  6418. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  6419. memcpy(msm_stub_dai_links + total_links,
  6420. msm_stub_be_dai_links,
  6421. sizeof(msm_stub_be_dai_links));
  6422. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  6423. dailink = msm_stub_dai_links;
  6424. }
  6425. if (card) {
  6426. card->dai_link = dailink;
  6427. card->num_links = total_links;
  6428. }
  6429. return card;
  6430. }
  6431. static int msm_wsa881x_init(struct snd_soc_component *component)
  6432. {
  6433. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  6434. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  6435. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  6436. SPKR_L_BOOST, SPKR_L_VI};
  6437. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  6438. SPKR_R_BOOST, SPKR_R_VI};
  6439. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  6440. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  6441. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  6442. struct msm_asoc_mach_data *pdata;
  6443. struct snd_soc_dapm_context *dapm;
  6444. int ret = 0;
  6445. if (!codec) {
  6446. pr_err("%s codec is NULL\n", __func__);
  6447. return -EINVAL;
  6448. }
  6449. dapm = snd_soc_codec_get_dapm(codec);
  6450. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  6451. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  6452. __func__, codec->component.name);
  6453. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  6454. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  6455. &ch_rate[0], &spkleft_port_types[0]);
  6456. if (dapm->component) {
  6457. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  6458. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  6459. }
  6460. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  6461. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  6462. __func__, codec->component.name);
  6463. wsa881x_set_channel_map(codec, &spkright_ports[0],
  6464. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  6465. &ch_rate[0], &spkright_port_types[0]);
  6466. if (dapm->component) {
  6467. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  6468. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  6469. }
  6470. } else {
  6471. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  6472. codec->component.name);
  6473. ret = -EINVAL;
  6474. goto err;
  6475. }
  6476. pdata = snd_soc_card_get_drvdata(component->card);
  6477. if (pdata && pdata->codec_root)
  6478. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  6479. codec);
  6480. err:
  6481. return ret;
  6482. }
  6483. static int msm_init_wsa_dev(struct platform_device *pdev,
  6484. struct snd_soc_card *card)
  6485. {
  6486. struct device_node *wsa_of_node;
  6487. u32 wsa_max_devs;
  6488. u32 wsa_dev_cnt;
  6489. int i;
  6490. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  6491. const char *wsa_auxdev_name_prefix[1];
  6492. char *dev_name_str = NULL;
  6493. int found = 0;
  6494. int ret = 0;
  6495. /* Get maximum WSA device count for this platform */
  6496. ret = of_property_read_u32(pdev->dev.of_node,
  6497. "qcom,wsa-max-devs", &wsa_max_devs);
  6498. if (ret) {
  6499. dev_info(&pdev->dev,
  6500. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  6501. __func__, pdev->dev.of_node->full_name, ret);
  6502. card->num_aux_devs = 0;
  6503. return 0;
  6504. }
  6505. if (wsa_max_devs == 0) {
  6506. dev_warn(&pdev->dev,
  6507. "%s: Max WSA devices is 0 for this target?\n",
  6508. __func__);
  6509. card->num_aux_devs = 0;
  6510. return 0;
  6511. }
  6512. /* Get count of WSA device phandles for this platform */
  6513. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  6514. "qcom,wsa-devs", NULL);
  6515. if (wsa_dev_cnt == -ENOENT) {
  6516. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  6517. __func__);
  6518. goto err;
  6519. } else if (wsa_dev_cnt <= 0) {
  6520. dev_err(&pdev->dev,
  6521. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  6522. __func__, wsa_dev_cnt);
  6523. ret = -EINVAL;
  6524. goto err;
  6525. }
  6526. /*
  6527. * Expect total phandles count to be NOT less than maximum possible
  6528. * WSA count. However, if it is less, then assign same value to
  6529. * max count as well.
  6530. */
  6531. if (wsa_dev_cnt < wsa_max_devs) {
  6532. dev_dbg(&pdev->dev,
  6533. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  6534. __func__, wsa_max_devs, wsa_dev_cnt);
  6535. wsa_max_devs = wsa_dev_cnt;
  6536. }
  6537. /* Make sure prefix string passed for each WSA device */
  6538. ret = of_property_count_strings(pdev->dev.of_node,
  6539. "qcom,wsa-aux-dev-prefix");
  6540. if (ret != wsa_dev_cnt) {
  6541. dev_err(&pdev->dev,
  6542. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  6543. __func__, wsa_dev_cnt, ret);
  6544. ret = -EINVAL;
  6545. goto err;
  6546. }
  6547. /*
  6548. * Alloc mem to store phandle and index info of WSA device, if already
  6549. * registered with ALSA core
  6550. */
  6551. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  6552. sizeof(struct msm_wsa881x_dev_info),
  6553. GFP_KERNEL);
  6554. if (!wsa881x_dev_info) {
  6555. ret = -ENOMEM;
  6556. goto err;
  6557. }
  6558. /*
  6559. * search and check whether all WSA devices are already
  6560. * registered with ALSA core or not. If found a node, store
  6561. * the node and the index in a local array of struct for later
  6562. * use.
  6563. */
  6564. for (i = 0; i < wsa_dev_cnt; i++) {
  6565. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  6566. "qcom,wsa-devs", i);
  6567. if (unlikely(!wsa_of_node)) {
  6568. /* we should not be here */
  6569. dev_err(&pdev->dev,
  6570. "%s: wsa dev node is not present\n",
  6571. __func__);
  6572. ret = -EINVAL;
  6573. goto err_free_dev_info;
  6574. }
  6575. if (soc_find_component(wsa_of_node, NULL)) {
  6576. /* WSA device registered with ALSA core */
  6577. wsa881x_dev_info[found].of_node = wsa_of_node;
  6578. wsa881x_dev_info[found].index = i;
  6579. found++;
  6580. if (found == wsa_max_devs)
  6581. break;
  6582. }
  6583. }
  6584. if (found < wsa_max_devs) {
  6585. dev_dbg(&pdev->dev,
  6586. "%s: failed to find %d components. Found only %d\n",
  6587. __func__, wsa_max_devs, found);
  6588. return -EPROBE_DEFER;
  6589. }
  6590. dev_info(&pdev->dev,
  6591. "%s: found %d wsa881x devices registered with ALSA core\n",
  6592. __func__, found);
  6593. card->num_aux_devs = wsa_max_devs;
  6594. card->num_configs = wsa_max_devs;
  6595. /* Alloc array of AUX devs struct */
  6596. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6597. sizeof(struct snd_soc_aux_dev),
  6598. GFP_KERNEL);
  6599. if (!msm_aux_dev) {
  6600. ret = -ENOMEM;
  6601. goto err_free_dev_info;
  6602. }
  6603. /* Alloc array of codec conf struct */
  6604. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  6605. sizeof(struct snd_soc_codec_conf),
  6606. GFP_KERNEL);
  6607. if (!msm_codec_conf) {
  6608. ret = -ENOMEM;
  6609. goto err_free_aux_dev;
  6610. }
  6611. for (i = 0; i < card->num_aux_devs; i++) {
  6612. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  6613. GFP_KERNEL);
  6614. if (!dev_name_str) {
  6615. ret = -ENOMEM;
  6616. goto err_free_cdc_conf;
  6617. }
  6618. ret = of_property_read_string_index(pdev->dev.of_node,
  6619. "qcom,wsa-aux-dev-prefix",
  6620. wsa881x_dev_info[i].index,
  6621. wsa_auxdev_name_prefix);
  6622. if (ret) {
  6623. dev_err(&pdev->dev,
  6624. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  6625. __func__, ret);
  6626. ret = -EINVAL;
  6627. goto err_free_dev_name_str;
  6628. }
  6629. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  6630. msm_aux_dev[i].name = dev_name_str;
  6631. msm_aux_dev[i].codec_name = NULL;
  6632. msm_aux_dev[i].codec_of_node =
  6633. wsa881x_dev_info[i].of_node;
  6634. msm_aux_dev[i].init = msm_wsa881x_init;
  6635. msm_codec_conf[i].dev_name = NULL;
  6636. msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
  6637. msm_codec_conf[i].of_node =
  6638. wsa881x_dev_info[i].of_node;
  6639. }
  6640. card->codec_conf = msm_codec_conf;
  6641. card->aux_dev = msm_aux_dev;
  6642. return 0;
  6643. err_free_dev_name_str:
  6644. devm_kfree(&pdev->dev, dev_name_str);
  6645. err_free_cdc_conf:
  6646. devm_kfree(&pdev->dev, msm_codec_conf);
  6647. err_free_aux_dev:
  6648. devm_kfree(&pdev->dev, msm_aux_dev);
  6649. err_free_dev_info:
  6650. devm_kfree(&pdev->dev, wsa881x_dev_info);
  6651. err:
  6652. return ret;
  6653. }
  6654. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  6655. {
  6656. int count;
  6657. u32 mi2s_master_slave[MI2S_MAX];
  6658. int ret;
  6659. for (count = 0; count < MI2S_MAX; count++) {
  6660. mutex_init(&mi2s_intf_conf[count].lock);
  6661. mi2s_intf_conf[count].ref_cnt = 0;
  6662. }
  6663. ret = of_property_read_u32_array(pdev->dev.of_node,
  6664. "qcom,msm-mi2s-master",
  6665. mi2s_master_slave, MI2S_MAX);
  6666. if (ret) {
  6667. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  6668. __func__);
  6669. } else {
  6670. for (count = 0; count < MI2S_MAX; count++) {
  6671. mi2s_intf_conf[count].msm_is_mi2s_master =
  6672. mi2s_master_slave[count];
  6673. }
  6674. }
  6675. }
  6676. static void msm_i2s_auxpcm_deinit(void)
  6677. {
  6678. int count;
  6679. for (count = 0; count < MI2S_MAX; count++) {
  6680. mutex_destroy(&mi2s_intf_conf[count].lock);
  6681. mi2s_intf_conf[count].ref_cnt = 0;
  6682. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  6683. }
  6684. }
  6685. static int msm_asoc_machine_probe(struct platform_device *pdev)
  6686. {
  6687. struct snd_soc_card *card;
  6688. struct msm_asoc_mach_data *pdata;
  6689. int ret;
  6690. if (!pdev->dev.of_node) {
  6691. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  6692. return -EINVAL;
  6693. }
  6694. pdata = devm_kzalloc(&pdev->dev,
  6695. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6696. if (!pdata)
  6697. return -ENOMEM;
  6698. card = populate_snd_card_dailinks(&pdev->dev);
  6699. if (!card) {
  6700. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6701. ret = -EINVAL;
  6702. goto err;
  6703. }
  6704. card->dev = &pdev->dev;
  6705. platform_set_drvdata(pdev, card);
  6706. snd_soc_card_set_drvdata(card, pdata);
  6707. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6708. if (ret) {
  6709. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  6710. ret);
  6711. goto err;
  6712. }
  6713. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6714. if (ret) {
  6715. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  6716. ret);
  6717. goto err;
  6718. }
  6719. ret = msm_populate_dai_link_component_of_node(card);
  6720. if (ret) {
  6721. ret = -EPROBE_DEFER;
  6722. goto err;
  6723. }
  6724. ret = msm_init_wsa_dev(pdev, card);
  6725. if (ret)
  6726. goto err;
  6727. pdata->dmic_01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6728. "qcom,cdc-dmic01-gpios",
  6729. 0);
  6730. pdata->dmic_23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6731. "qcom,cdc-dmic23-gpios",
  6732. 0);
  6733. pdata->dmic_45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6734. "qcom,cdc-dmic45-gpios",
  6735. 0);
  6736. pdata->dmic_67_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6737. "qcom,cdc-dmic67-gpios",
  6738. 0);
  6739. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6740. if (ret == -EPROBE_DEFER) {
  6741. if (codec_reg_done)
  6742. ret = -EINVAL;
  6743. goto err;
  6744. } else if (ret) {
  6745. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  6746. ret);
  6747. goto err;
  6748. }
  6749. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  6750. spdev = pdev;
  6751. /* Parse pinctrl info from devicetree */
  6752. ret = msm_get_pinctrl(pdev);
  6753. if (!ret) {
  6754. pr_debug("%s: pinctrl parsing successful\n", __func__);
  6755. } else {
  6756. dev_dbg(&pdev->dev,
  6757. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  6758. __func__, ret);
  6759. ret = 0;
  6760. }
  6761. msm_i2s_auxpcm_init(pdev);
  6762. is_initial_boot = true;
  6763. return 0;
  6764. err:
  6765. msm_release_pinctrl(pdev);
  6766. return ret;
  6767. }
  6768. static int msm_asoc_machine_remove(struct platform_device *pdev)
  6769. {
  6770. audio_notifier_deregister("qcs405");
  6771. msm_i2s_auxpcm_deinit();
  6772. msm_release_pinctrl(pdev);
  6773. return 0;
  6774. }
  6775. static struct platform_driver qcs405_asoc_machine_driver = {
  6776. .driver = {
  6777. .name = DRV_NAME,
  6778. .owner = THIS_MODULE,
  6779. .pm = &snd_soc_pm_ops,
  6780. .of_match_table = qcs405_asoc_machine_of_match,
  6781. },
  6782. .probe = msm_asoc_machine_probe,
  6783. .remove = msm_asoc_machine_remove,
  6784. };
  6785. module_platform_driver(qcs405_asoc_machine_driver);
  6786. MODULE_DESCRIPTION("ALSA SoC QCS405 Machine driver");
  6787. MODULE_LICENSE("GPL v2");
  6788. MODULE_ALIAS("platform:" DRV_NAME);
  6789. MODULE_DEVICE_TABLE(of, qcs405_asoc_machine_of_match);