q6core.c 23 KB

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  1. /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/types.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mutex.h>
  18. #include <linux/sched.h>
  19. #include <linux/slab.h>
  20. #include <dsp/q6core.h>
  21. #include <dsp/audio_cal_utils.h>
  22. #include <ipc/apr.h>
  23. #define TIMEOUT_MS 1000
  24. /*
  25. * AVS bring up in the modem is optimitized for the new
  26. * Sub System Restart design and 100 milliseconds timeout
  27. * is sufficient to make sure the Q6 will be ready.
  28. */
  29. #define Q6_READY_TIMEOUT_MS 100
  30. enum {
  31. META_CAL,
  32. CUST_TOP_CAL,
  33. CORE_MAX_CAL
  34. };
  35. struct q6core_str {
  36. struct apr_svc *core_handle_q;
  37. wait_queue_head_t bus_bw_req_wait;
  38. wait_queue_head_t cmd_req_wait;
  39. u32 bus_bw_resp_received;
  40. enum cmd_flags {
  41. FLAG_NONE,
  42. FLAG_CMDRSP_LICENSE_RESULT
  43. } cmd_resp_received_flag;
  44. struct mutex cmd_lock;
  45. union {
  46. struct avcs_cmdrsp_get_license_validation_result
  47. cmdrsp_license_result;
  48. } cmd_resp_payload;
  49. u32 param;
  50. struct cal_type_data *cal_data[CORE_MAX_CAL];
  51. uint32_t mem_map_cal_handle;
  52. int32_t adsp_status;
  53. };
  54. static struct q6core_str q6core_lcl;
  55. struct generic_get_data_ {
  56. int valid;
  57. int size_in_ints;
  58. int ints[];
  59. };
  60. static struct generic_get_data_ *generic_get_data;
  61. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  62. {
  63. uint32_t *payload1;
  64. if (data == NULL) {
  65. pr_err("%s: data argument is null\n", __func__);
  66. return -EINVAL;
  67. }
  68. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  69. __func__,
  70. data->payload_size, data->opcode);
  71. switch (data->opcode) {
  72. case APR_BASIC_RSP_RESULT:{
  73. if (data->payload_size == 0) {
  74. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  75. __func__);
  76. return 0;
  77. }
  78. payload1 = data->payload;
  79. switch (payload1[0]) {
  80. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  81. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  82. __func__, payload1[1]);
  83. q6core_lcl.bus_bw_resp_received = 1;
  84. wake_up(&q6core_lcl.bus_bw_req_wait);
  85. break;
  86. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  87. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  88. __func__, payload1[1]);
  89. q6core_lcl.bus_bw_resp_received = 1;
  90. wake_up(&q6core_lcl.bus_bw_req_wait);
  91. break;
  92. case AVCS_CMD_REGISTER_TOPOLOGIES:
  93. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  94. __func__, payload1[1]);
  95. /* -ADSP status to match Linux error standard */
  96. q6core_lcl.adsp_status = -payload1[1];
  97. q6core_lcl.bus_bw_resp_received = 1;
  98. wake_up(&q6core_lcl.bus_bw_req_wait);
  99. break;
  100. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  101. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  102. __func__, payload1[1]);
  103. q6core_lcl.bus_bw_resp_received = 1;
  104. wake_up(&q6core_lcl.bus_bw_req_wait);
  105. break;
  106. default:
  107. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  108. __func__,
  109. payload1[0], payload1[1], data->opcode);
  110. break;
  111. }
  112. break;
  113. }
  114. case RESET_EVENTS:{
  115. pr_debug("%s: Reset event received in Core service\n",
  116. __func__);
  117. apr_reset(q6core_lcl.core_handle_q);
  118. q6core_lcl.core_handle_q = NULL;
  119. break;
  120. }
  121. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  122. payload1 = data->payload;
  123. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  124. __func__, payload1[0]);
  125. q6core_lcl.mem_map_cal_handle = payload1[0];
  126. q6core_lcl.bus_bw_resp_received = 1;
  127. wake_up(&q6core_lcl.bus_bw_req_wait);
  128. break;
  129. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  130. payload1 = data->payload;
  131. q6core_lcl.param = payload1[0];
  132. pr_debug("%s: Received ADSP get state response 0x%x\n",
  133. __func__, q6core_lcl.param);
  134. /* ensure .param is updated prior to .bus_bw_resp_received */
  135. wmb();
  136. q6core_lcl.bus_bw_resp_received = 1;
  137. wake_up(&q6core_lcl.bus_bw_req_wait);
  138. break;
  139. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  140. payload1 = data->payload;
  141. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  142. __func__, payload1[0]);
  143. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  144. = payload1[0];
  145. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  146. wake_up(&q6core_lcl.cmd_req_wait);
  147. break;
  148. default:
  149. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  150. __func__, data->opcode);
  151. if (generic_get_data) {
  152. generic_get_data->valid = 1;
  153. generic_get_data->size_in_ints =
  154. data->payload_size/sizeof(int);
  155. pr_debug("callback size = %i\n",
  156. data->payload_size);
  157. memcpy(generic_get_data->ints, data->payload,
  158. data->payload_size);
  159. q6core_lcl.bus_bw_resp_received = 1;
  160. wake_up(&q6core_lcl.bus_bw_req_wait);
  161. break;
  162. }
  163. break;
  164. }
  165. return 0;
  166. }
  167. void ocm_core_open(void)
  168. {
  169. if (q6core_lcl.core_handle_q == NULL)
  170. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  171. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  172. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  173. if (q6core_lcl.core_handle_q == NULL)
  174. pr_err("%s: Unable to register CORE\n", __func__);
  175. }
  176. struct cal_block_data *cal_utils_get_cal_block_by_key(
  177. struct cal_type_data *cal_type, uint32_t key)
  178. {
  179. struct list_head *ptr, *next;
  180. struct cal_block_data *cal_block = NULL;
  181. struct audio_cal_info_metainfo *metainfo;
  182. list_for_each_safe(ptr, next,
  183. &cal_type->cal_blocks) {
  184. cal_block = list_entry(ptr,
  185. struct cal_block_data, list);
  186. metainfo = (struct audio_cal_info_metainfo *)
  187. cal_block->cal_info;
  188. if (metainfo->nKey != key) {
  189. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  190. __func__, metainfo->nKey, key);
  191. } else {
  192. pr_debug("%s: metainfo key match found", __func__);
  193. return cal_block;
  194. }
  195. }
  196. return NULL;
  197. }
  198. int32_t core_set_license(uint32_t key, uint32_t module_id)
  199. {
  200. struct avcs_cmd_set_license *cmd_setl = NULL;
  201. struct cal_block_data *cal_block = NULL;
  202. int rc = 0, packet_size = 0;
  203. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  204. mutex_lock(&(q6core_lcl.cmd_lock));
  205. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  206. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  207. rc = -EINVAL;
  208. goto cmd_unlock;
  209. }
  210. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  211. cal_block = cal_utils_get_cal_block_by_key(
  212. q6core_lcl.cal_data[META_CAL], key);
  213. if (cal_block == NULL ||
  214. cal_block->cal_data.kvaddr == NULL ||
  215. cal_block->cal_data.size <= 0) {
  216. pr_err("%s: Invalid cal block to send", __func__);
  217. rc = -EINVAL;
  218. goto cal_data_unlock;
  219. }
  220. packet_size = sizeof(struct avcs_cmd_set_license) +
  221. cal_block->cal_data.size;
  222. /*round up total packet_size to next 4 byte boundary*/
  223. packet_size = ((packet_size + 0x3)>>2)<<2;
  224. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  225. if (cmd_setl == NULL) {
  226. rc = -ENOMEM;
  227. goto cal_data_unlock;
  228. }
  229. ocm_core_open();
  230. if (q6core_lcl.core_handle_q == NULL) {
  231. pr_err("%s: apr registration for CORE failed\n", __func__);
  232. rc = -ENODEV;
  233. goto fail_cmd;
  234. }
  235. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  236. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  237. cmd_setl->hdr.pkt_size = packet_size;
  238. cmd_setl->hdr.src_port = 0;
  239. cmd_setl->hdr.dest_port = 0;
  240. cmd_setl->hdr.token = 0;
  241. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  242. cmd_setl->id = module_id;
  243. cmd_setl->overwrite = 1;
  244. cmd_setl->size = cal_block->cal_data.size;
  245. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  246. cal_block->cal_data.kvaddr,
  247. cal_block->cal_data.size);
  248. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  249. __func__, cmd_setl->hdr.opcode,
  250. cmd_setl->id, cmd_setl->size);
  251. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  252. if (rc < 0)
  253. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  254. __func__, cmd_setl->hdr.opcode, rc);
  255. fail_cmd:
  256. kfree(cmd_setl);
  257. cal_data_unlock:
  258. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  259. cmd_unlock:
  260. mutex_unlock(&(q6core_lcl.cmd_lock));
  261. return rc;
  262. }
  263. int32_t core_get_license_status(uint32_t module_id)
  264. {
  265. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  266. int ret = 0;
  267. pr_debug("%s: module_id 0x%x", __func__, module_id);
  268. mutex_lock(&(q6core_lcl.cmd_lock));
  269. ocm_core_open();
  270. if (q6core_lcl.core_handle_q == NULL) {
  271. pr_err("%s: apr registration for CORE failed\n", __func__);
  272. ret = -ENODEV;
  273. goto fail_cmd;
  274. }
  275. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  276. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  277. get_lvr_cmd.hdr.pkt_size =
  278. sizeof(struct avcs_cmd_get_license_validation_result);
  279. get_lvr_cmd.hdr.src_port = 0;
  280. get_lvr_cmd.hdr.dest_port = 0;
  281. get_lvr_cmd.hdr.token = 0;
  282. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  283. get_lvr_cmd.id = module_id;
  284. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  285. if (ret < 0) {
  286. pr_err("%s: license_validation request failed, err %d\n",
  287. __func__, ret);
  288. ret = -EREMOTE;
  289. goto fail_cmd;
  290. }
  291. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  292. mutex_unlock(&(q6core_lcl.cmd_lock));
  293. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  294. (q6core_lcl.cmd_resp_received_flag ==
  295. FLAG_CMDRSP_LICENSE_RESULT),
  296. msecs_to_jiffies(TIMEOUT_MS));
  297. mutex_lock(&(q6core_lcl.cmd_lock));
  298. if (!ret) {
  299. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  300. __func__);
  301. ret = -ETIME;
  302. goto fail_cmd;
  303. }
  304. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  305. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  306. fail_cmd:
  307. mutex_unlock(&(q6core_lcl.cmd_lock));
  308. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  309. __func__, ret, module_id);
  310. return ret;
  311. }
  312. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  313. {
  314. struct adsp_dolby_manufacturer_id payload;
  315. int rc = 0;
  316. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  317. mutex_lock(&(q6core_lcl.cmd_lock));
  318. ocm_core_open();
  319. if (q6core_lcl.core_handle_q) {
  320. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  321. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  322. payload.hdr.pkt_size =
  323. sizeof(struct adsp_dolby_manufacturer_id);
  324. payload.hdr.src_port = 0;
  325. payload.hdr.dest_port = 0;
  326. payload.hdr.token = 0;
  327. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  328. payload.manufacturer_id = manufacturer_id;
  329. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  330. __func__,
  331. payload.hdr.opcode, payload.manufacturer_id);
  332. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  333. (uint32_t *)&payload);
  334. if (rc < 0)
  335. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  336. __func__, payload.hdr.opcode, rc);
  337. }
  338. mutex_unlock(&(q6core_lcl.cmd_lock));
  339. return rc;
  340. }
  341. /**
  342. * q6core_is_adsp_ready - check adsp ready status
  343. *
  344. * Returns true if adsp is ready otherwise returns false
  345. */
  346. bool q6core_is_adsp_ready(void)
  347. {
  348. int rc = 0;
  349. bool ret = false;
  350. struct apr_hdr hdr;
  351. pr_debug("%s: enter\n", __func__);
  352. memset(&hdr, 0, sizeof(hdr));
  353. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  354. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  355. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  356. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  357. mutex_lock(&(q6core_lcl.cmd_lock));
  358. ocm_core_open();
  359. if (q6core_lcl.core_handle_q) {
  360. q6core_lcl.bus_bw_resp_received = 0;
  361. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  362. if (rc < 0) {
  363. pr_err("%s: Get ADSP state APR packet send event %d\n",
  364. __func__, rc);
  365. goto bail;
  366. }
  367. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  368. (q6core_lcl.bus_bw_resp_received == 1),
  369. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  370. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  371. /* ensure to read updated param by callback thread */
  372. rmb();
  373. ret = !!q6core_lcl.param;
  374. }
  375. }
  376. bail:
  377. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  378. mutex_unlock(&(q6core_lcl.cmd_lock));
  379. return ret;
  380. }
  381. EXPORT_SYMBOL(q6core_is_adsp_ready);
  382. static int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  383. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  384. {
  385. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  386. struct avs_shared_map_region_payload *mregions = NULL;
  387. void *mmap_region_cmd = NULL;
  388. void *payload = NULL;
  389. int ret = 0;
  390. int i = 0;
  391. int cmd_size = 0;
  392. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  393. + sizeof(struct avs_shared_map_region_payload)
  394. * bufcnt;
  395. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  396. if (mmap_region_cmd == NULL)
  397. return -ENOMEM;
  398. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  399. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  400. APR_HDR_LEN(APR_HDR_SIZE),
  401. APR_PKT_VER);
  402. mmap_regions->hdr.pkt_size = cmd_size;
  403. mmap_regions->hdr.src_port = 0;
  404. mmap_regions->hdr.dest_port = 0;
  405. mmap_regions->hdr.token = 0;
  406. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  407. mmap_regions->mem_pool_id = ADSP_MEMORY_MAP_SHMEM8_4K_POOL & 0x00ff;
  408. mmap_regions->num_regions = bufcnt & 0x00ff;
  409. mmap_regions->property_flag = 0x00;
  410. payload = ((u8 *) mmap_region_cmd +
  411. sizeof(struct avs_cmd_shared_mem_map_regions));
  412. mregions = (struct avs_shared_map_region_payload *)payload;
  413. for (i = 0; i < bufcnt; i++) {
  414. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  415. mregions->shm_addr_msw =
  416. msm_audio_populate_upper_32_bits(buf_add[i]);
  417. mregions->mem_size_bytes = bufsz[i];
  418. ++mregions;
  419. }
  420. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  421. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  422. *map_handle = 0;
  423. q6core_lcl.bus_bw_resp_received = 0;
  424. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  425. mmap_regions);
  426. if (ret < 0) {
  427. pr_err("%s: mmap regions failed %d\n",
  428. __func__, ret);
  429. ret = -EINVAL;
  430. goto done;
  431. }
  432. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  433. (q6core_lcl.bus_bw_resp_received == 1),
  434. msecs_to_jiffies(TIMEOUT_MS));
  435. if (!ret) {
  436. pr_err("%s: timeout. waited for memory map\n", __func__);
  437. ret = -ETIME;
  438. goto done;
  439. }
  440. *map_handle = q6core_lcl.mem_map_cal_handle;
  441. done:
  442. kfree(mmap_region_cmd);
  443. return ret;
  444. }
  445. static int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  446. {
  447. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  448. int ret = 0;
  449. memset(&unmap_regions, 0, sizeof(unmap_regions));
  450. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  451. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  452. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  453. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  454. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  455. unmap_regions.hdr.src_port = 0;
  456. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  457. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  458. unmap_regions.hdr.dest_port = 0;
  459. unmap_regions.hdr.token = 0;
  460. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  461. unmap_regions.mem_map_handle = mem_map_handle;
  462. q6core_lcl.bus_bw_resp_received = 0;
  463. pr_debug("%s: unmap regions map handle %d\n",
  464. __func__, mem_map_handle);
  465. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  466. &unmap_regions);
  467. if (ret < 0) {
  468. pr_err("%s: unmap regions failed %d\n",
  469. __func__, ret);
  470. ret = -EINVAL;
  471. goto done;
  472. }
  473. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  474. (q6core_lcl.bus_bw_resp_received == 1),
  475. msecs_to_jiffies(TIMEOUT_MS));
  476. if (!ret) {
  477. pr_err("%s: timeout. waited for memory_unmap\n",
  478. __func__);
  479. ret = -ETIME;
  480. goto done;
  481. }
  482. done:
  483. return ret;
  484. }
  485. static int q6core_dereg_all_custom_topologies(void)
  486. {
  487. int ret = 0;
  488. struct avcs_cmd_deregister_topologies dereg_top;
  489. memset(&dereg_top, 0, sizeof(dereg_top));
  490. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  491. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  492. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  493. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  494. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  495. dereg_top.hdr.src_port = 0;
  496. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  497. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  498. dereg_top.hdr.dest_port = 0;
  499. dereg_top.hdr.token = 0;
  500. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  501. dereg_top.payload_addr_lsw = 0;
  502. dereg_top.payload_addr_msw = 0;
  503. dereg_top.mem_map_handle = 0;
  504. dereg_top.payload_size = 0;
  505. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  506. q6core_lcl.bus_bw_resp_received = 0;
  507. pr_debug("%s: Deregister topologies mode %d\n",
  508. __func__, dereg_top.mode);
  509. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  510. if (ret < 0) {
  511. pr_err("%s: Deregister topologies failed %d\n",
  512. __func__, ret);
  513. goto done;
  514. }
  515. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  516. (q6core_lcl.bus_bw_resp_received == 1),
  517. msecs_to_jiffies(TIMEOUT_MS));
  518. if (!ret) {
  519. pr_err("%s: wait_event timeout for Deregister topologies\n",
  520. __func__);
  521. goto done;
  522. }
  523. done:
  524. return ret;
  525. }
  526. static int q6core_send_custom_topologies(void)
  527. {
  528. int ret = 0;
  529. int ret2 = 0;
  530. struct cal_block_data *cal_block = NULL;
  531. struct avcs_cmd_register_topologies reg_top;
  532. if (!q6core_is_adsp_ready()) {
  533. pr_err("%s: ADSP is not ready!\n", __func__);
  534. return -ENODEV;
  535. }
  536. memset(&reg_top, 0, sizeof(reg_top));
  537. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  538. mutex_lock(&q6core_lcl.cmd_lock);
  539. cal_block = cal_utils_get_only_cal_block(
  540. q6core_lcl.cal_data[CUST_TOP_CAL]);
  541. if (cal_block == NULL) {
  542. pr_debug("%s: cal block is NULL!\n", __func__);
  543. goto unlock;
  544. }
  545. if (cal_block->cal_data.size <= 0) {
  546. pr_debug("%s: cal size is %zd not sending\n",
  547. __func__, cal_block->cal_data.size);
  548. goto unlock;
  549. }
  550. q6core_dereg_all_custom_topologies();
  551. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr, 0,
  552. (uint32_t *)&cal_block->map_data.map_size, 1,
  553. &cal_block->map_data.q6map_handle);
  554. if (!ret) {
  555. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  556. goto unlock;
  557. }
  558. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  559. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  560. reg_top.hdr.pkt_size = sizeof(reg_top);
  561. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  562. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  563. reg_top.hdr.src_port = 0;
  564. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  565. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  566. reg_top.hdr.dest_port = 0;
  567. reg_top.hdr.token = 0;
  568. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  569. reg_top.payload_addr_lsw =
  570. lower_32_bits(cal_block->cal_data.paddr);
  571. reg_top.payload_addr_msw =
  572. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  573. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  574. reg_top.payload_size = cal_block->cal_data.size;
  575. q6core_lcl.adsp_status = 0;
  576. q6core_lcl.bus_bw_resp_received = 0;
  577. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  578. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  579. cal_block->map_data.q6map_handle);
  580. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  581. if (ret < 0) {
  582. pr_err("%s: Register topologies failed %d\n",
  583. __func__, ret);
  584. goto unmap;
  585. }
  586. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  587. (q6core_lcl.bus_bw_resp_received == 1),
  588. msecs_to_jiffies(TIMEOUT_MS));
  589. if (!ret) {
  590. pr_err("%s: wait_event timeout for Register topologies\n",
  591. __func__);
  592. goto unmap;
  593. }
  594. if (q6core_lcl.adsp_status < 0)
  595. ret = q6core_lcl.adsp_status;
  596. unmap:
  597. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  598. if (!ret2) {
  599. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  600. __func__, cal_block->map_data.q6map_handle);
  601. ret = ret2;
  602. goto unlock;
  603. }
  604. unlock:
  605. mutex_unlock(&q6core_lcl.cmd_lock);
  606. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  607. return ret;
  608. }
  609. static int get_cal_type_index(int32_t cal_type)
  610. {
  611. int ret = -EINVAL;
  612. switch (cal_type) {
  613. case AUDIO_CORE_METAINFO_CAL_TYPE:
  614. ret = META_CAL;
  615. break;
  616. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  617. ret = CUST_TOP_CAL;
  618. break;
  619. default:
  620. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  621. }
  622. return ret;
  623. }
  624. static int q6core_alloc_cal(int32_t cal_type,
  625. size_t data_size, void *data)
  626. {
  627. int ret = 0;
  628. int cal_index;
  629. cal_index = get_cal_type_index(cal_type);
  630. if (cal_index < 0) {
  631. pr_err("%s: could not get cal index %d!\n",
  632. __func__, cal_index);
  633. ret = -EINVAL;
  634. goto done;
  635. }
  636. ret = cal_utils_alloc_cal(data_size, data,
  637. q6core_lcl.cal_data[cal_index], 0, NULL);
  638. if (ret < 0) {
  639. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  640. __func__, ret, cal_type);
  641. goto done;
  642. }
  643. done:
  644. return ret;
  645. }
  646. static int q6core_dealloc_cal(int32_t cal_type,
  647. size_t data_size, void *data)
  648. {
  649. int ret = 0;
  650. int cal_index;
  651. cal_index = get_cal_type_index(cal_type);
  652. if (cal_index < 0) {
  653. pr_err("%s: could not get cal index %d!\n",
  654. __func__, cal_index);
  655. ret = -EINVAL;
  656. goto done;
  657. }
  658. ret = cal_utils_dealloc_cal(data_size, data,
  659. q6core_lcl.cal_data[cal_index]);
  660. if (ret < 0) {
  661. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  662. __func__, ret, cal_type);
  663. goto done;
  664. }
  665. done:
  666. return ret;
  667. }
  668. static int q6core_set_cal(int32_t cal_type,
  669. size_t data_size, void *data)
  670. {
  671. int ret = 0;
  672. int cal_index;
  673. cal_index = get_cal_type_index(cal_type);
  674. if (cal_index < 0) {
  675. pr_err("%s: could not get cal index %d!\n",
  676. __func__, cal_index);
  677. ret = -EINVAL;
  678. goto done;
  679. }
  680. ret = cal_utils_set_cal(data_size, data,
  681. q6core_lcl.cal_data[cal_index], 0, NULL);
  682. if (ret < 0) {
  683. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  684. __func__, ret, cal_type);
  685. goto done;
  686. }
  687. if (cal_index == CUST_TOP_CAL)
  688. ret = q6core_send_custom_topologies();
  689. done:
  690. return ret;
  691. }
  692. static void q6core_delete_cal_data(void)
  693. {
  694. pr_debug("%s:\n", __func__);
  695. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  696. }
  697. static int q6core_init_cal_data(void)
  698. {
  699. int ret = 0;
  700. struct cal_type_info cal_type_info[] = {
  701. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  702. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  703. q6core_set_cal, NULL, NULL} },
  704. {NULL, NULL, cal_utils_match_buf_num} },
  705. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  706. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  707. q6core_set_cal, NULL, NULL} },
  708. {NULL, NULL, cal_utils_match_buf_num} }
  709. };
  710. pr_debug("%s:\n", __func__);
  711. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  712. q6core_lcl.cal_data, cal_type_info);
  713. if (ret < 0) {
  714. pr_err("%s: could not create cal type!\n",
  715. __func__);
  716. goto err;
  717. }
  718. return ret;
  719. err:
  720. q6core_delete_cal_data();
  721. return ret;
  722. }
  723. static int __init core_init(void)
  724. {
  725. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  726. q6core_lcl.bus_bw_resp_received = 0;
  727. q6core_lcl.core_handle_q = NULL;
  728. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  729. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  730. mutex_init(&q6core_lcl.cmd_lock);
  731. q6core_lcl.mem_map_cal_handle = 0;
  732. q6core_lcl.adsp_status = 0;
  733. q6core_init_cal_data();
  734. return 0;
  735. }
  736. module_init(core_init);
  737. static void __exit core_exit(void)
  738. {
  739. mutex_destroy(&q6core_lcl.cmd_lock);
  740. q6core_delete_cal_data();
  741. }
  742. module_exit(core_exit);
  743. MODULE_DESCRIPTION("ADSP core driver");
  744. MODULE_LICENSE("GPL v2");