hal_be_generic_api.h 75 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_GENERIC_API_H_
  20. #define _HAL_BE_GENERIC_API_H_
  21. #include <hal_be_hw_headers.h>
  22. #include "hal_be_tx.h"
  23. #include "hal_be_reo.h"
  24. #include <hal_api_mon.h>
  25. #include <hal_generic_api.h>
  26. #include <hal_be_api_mon.h>
  27. /**
  28. * Debug macro to print the TLV header tag
  29. */
  30. #define SHOW_DEFINED(x) do {} while (0)
  31. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(CONFIG_SAWF)
  32. static inline void
  33. hal_tx_comp_get_buffer_timestamp_be(void *desc,
  34. struct hal_tx_completion_status *ts)
  35. {
  36. ts->buffer_timestamp = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  37. BUFFER_TIMESTAMP);
  38. }
  39. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY || CONFIG_SAWF */
  40. static inline void
  41. hal_tx_comp_get_buffer_timestamp_be(void *desc,
  42. struct hal_tx_completion_status *ts)
  43. {
  44. }
  45. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY || CONFIG_SAWF */
  46. /**
  47. * hal_tx_comp_get_status() - TQM Release reason
  48. * @hal_desc: completion ring Tx status
  49. *
  50. * This function will parse the WBM completion descriptor and populate in
  51. * HAL structure
  52. *
  53. * Return: none
  54. */
  55. static inline void
  56. hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
  57. struct hal_soc *hal)
  58. {
  59. uint8_t rate_stats_valid = 0;
  60. uint32_t rate_stats = 0;
  61. struct hal_tx_completion_status *ts =
  62. (struct hal_tx_completion_status *)ts1;
  63. ts->ppdu_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  64. TQM_STATUS_NUMBER);
  65. ts->ack_frame_rssi = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  66. ACK_FRAME_RSSI);
  67. ts->first_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  68. FIRST_MSDU);
  69. ts->last_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  70. LAST_MSDU);
  71. #if 0
  72. // TODO - This has to be calculated form first and last msdu
  73. ts->msdu_part_of_amsdu = HAL_TX_DESC_GET(desc,
  74. WBM2SW_COMPLETION_RING_TX,
  75. MSDU_PART_OF_AMSDU);
  76. #endif
  77. ts->peer_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  78. SW_PEER_ID);
  79. ts->tid = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX, TID);
  80. ts->transmit_cnt = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  81. TRANSMIT_COUNT);
  82. rate_stats = HAL_TX_DESC_GET(desc, HAL_TX_COMP, TX_RATE_STATS);
  83. rate_stats_valid = HAL_TX_MS(TX_RATE_STATS_INFO,
  84. TX_RATE_STATS_INFO_VALID, rate_stats);
  85. ts->valid = rate_stats_valid;
  86. if (rate_stats_valid) {
  87. ts->bw = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_BW,
  88. rate_stats);
  89. ts->pkt_type = HAL_TX_MS(TX_RATE_STATS_INFO,
  90. TRANSMIT_PKT_TYPE, rate_stats);
  91. ts->stbc = HAL_TX_MS(TX_RATE_STATS_INFO,
  92. TRANSMIT_STBC, rate_stats);
  93. ts->ldpc = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_LDPC,
  94. rate_stats);
  95. ts->sgi = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_SGI,
  96. rate_stats);
  97. ts->mcs = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_MCS,
  98. rate_stats);
  99. ts->ofdma = HAL_TX_MS(TX_RATE_STATS_INFO, OFDMA_TRANSMISSION,
  100. rate_stats);
  101. ts->tones_in_ru = HAL_TX_MS(TX_RATE_STATS_INFO, TONES_IN_RU,
  102. rate_stats);
  103. }
  104. ts->release_src = hal_tx_comp_get_buffer_source_generic_be(desc);
  105. ts->status = hal_tx_comp_get_release_reason(
  106. desc,
  107. hal_soc_to_hal_soc_handle(hal));
  108. ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
  109. TX_RATE_STATS_INFO_TX_RATE_STATS);
  110. hal_tx_comp_get_buffer_timestamp_be(desc, ts);
  111. }
  112. /**
  113. * hal_tx_set_pcp_tid_map_generic_be() - Configure default PCP to TID map table
  114. * @soc: HAL SoC context
  115. * @map: PCP-TID mapping table
  116. *
  117. * PCP are mapped to 8 TID values using TID values programmed
  118. * in one set of mapping registers PCP_TID_MAP_<0 to 6>
  119. * The mapping register has TID mapping for 8 PCP values
  120. *
  121. * Return: none
  122. */
  123. static void hal_tx_set_pcp_tid_map_generic_be(struct hal_soc *soc, uint8_t *map)
  124. {
  125. uint32_t addr, value;
  126. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  127. MAC_TCL_REG_REG_BASE);
  128. value = (map[0] |
  129. (map[1] << HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT) |
  130. (map[2] << HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT) |
  131. (map[3] << HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT) |
  132. (map[4] << HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT) |
  133. (map[5] << HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT) |
  134. (map[6] << HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT) |
  135. (map[7] << HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT));
  136. HAL_REG_WRITE(soc, addr, (value & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  137. }
  138. /**
  139. * hal_tx_update_pcp_tid_generic_be() - Update the pcp tid map table with
  140. * value received from user-space
  141. * @soc: HAL SoC context
  142. * @pcp: pcp value
  143. * @tid : tid value
  144. *
  145. * Return: void
  146. */
  147. static void
  148. hal_tx_update_pcp_tid_generic_be(struct hal_soc *soc,
  149. uint8_t pcp, uint8_t tid)
  150. {
  151. uint32_t addr, value, regval;
  152. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  153. MAC_TCL_REG_REG_BASE);
  154. value = (uint32_t)tid << (HAL_TX_BITS_PER_TID * pcp);
  155. /* Read back previous PCP TID config and update
  156. * with new config.
  157. */
  158. regval = HAL_REG_READ(soc, addr);
  159. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * pcp));
  160. regval |= value;
  161. HAL_REG_WRITE(soc, addr,
  162. (regval & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  163. }
  164. /**
  165. * hal_tx_update_tidmap_prty_generic_be() - Update the tid map priority
  166. * @soc: HAL SoC context
  167. * @val: priority value
  168. *
  169. * Return: void
  170. */
  171. static
  172. void hal_tx_update_tidmap_prty_generic_be(struct hal_soc *soc, uint8_t value)
  173. {
  174. uint32_t addr;
  175. addr = HWIO_TCL_R0_TID_MAP_PRTY_ADDR(
  176. MAC_TCL_REG_REG_BASE);
  177. HAL_REG_WRITE(soc, addr,
  178. (value & HWIO_TCL_R0_TID_MAP_PRTY_RMSK));
  179. }
  180. /**
  181. * hal_rx_get_tlv_size_generic_be() - Get rx packet tlv size
  182. * @rx_pkt_tlv_size: TLV size for regular RX packets
  183. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  184. *
  185. * Return: size of rx pkt tlv before the actual data
  186. */
  187. static void hal_rx_get_tlv_size_generic_be(uint16_t *rx_pkt_tlv_size,
  188. uint16_t *rx_mon_pkt_tlv_size)
  189. {
  190. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  191. /* For now mon pkt tlv is same as rx pkt tlv */
  192. *rx_mon_pkt_tlv_size = RX_PKT_TLVS_LEN;
  193. }
  194. /**
  195. * hal_rx_flow_get_tuple_info_be() - Setup a flow search entry in HW FST
  196. * @fst: Pointer to the Rx Flow Search Table
  197. * @hal_hash: HAL 5 tuple hash
  198. * @tuple_info: 5-tuple info of the flow returned to the caller
  199. *
  200. * Return: Success/Failure
  201. */
  202. static void *
  203. hal_rx_flow_get_tuple_info_be(uint8_t *rx_fst, uint32_t hal_hash,
  204. uint8_t *flow_tuple_info)
  205. {
  206. struct hal_rx_fst *fst = (struct hal_rx_fst *)rx_fst;
  207. void *hal_fse = NULL;
  208. struct hal_flow_tuple_info *tuple_info
  209. = (struct hal_flow_tuple_info *)flow_tuple_info;
  210. hal_fse = (uint8_t *)fst->base_vaddr +
  211. (hal_hash * HAL_RX_FST_ENTRY_SIZE);
  212. if (!hal_fse || !tuple_info)
  213. return NULL;
  214. if (!HAL_GET_FLD(hal_fse, RX_FLOW_SEARCH_ENTRY, VALID))
  215. return NULL;
  216. tuple_info->src_ip_127_96 =
  217. qdf_ntohl(HAL_GET_FLD(hal_fse,
  218. RX_FLOW_SEARCH_ENTRY,
  219. SRC_IP_127_96));
  220. tuple_info->src_ip_95_64 =
  221. qdf_ntohl(HAL_GET_FLD(hal_fse,
  222. RX_FLOW_SEARCH_ENTRY,
  223. SRC_IP_95_64));
  224. tuple_info->src_ip_63_32 =
  225. qdf_ntohl(HAL_GET_FLD(hal_fse,
  226. RX_FLOW_SEARCH_ENTRY,
  227. SRC_IP_63_32));
  228. tuple_info->src_ip_31_0 =
  229. qdf_ntohl(HAL_GET_FLD(hal_fse,
  230. RX_FLOW_SEARCH_ENTRY,
  231. SRC_IP_31_0));
  232. tuple_info->dest_ip_127_96 =
  233. qdf_ntohl(HAL_GET_FLD(hal_fse,
  234. RX_FLOW_SEARCH_ENTRY,
  235. DEST_IP_127_96));
  236. tuple_info->dest_ip_95_64 =
  237. qdf_ntohl(HAL_GET_FLD(hal_fse,
  238. RX_FLOW_SEARCH_ENTRY,
  239. DEST_IP_95_64));
  240. tuple_info->dest_ip_63_32 =
  241. qdf_ntohl(HAL_GET_FLD(hal_fse,
  242. RX_FLOW_SEARCH_ENTRY,
  243. DEST_IP_63_32));
  244. tuple_info->dest_ip_31_0 =
  245. qdf_ntohl(HAL_GET_FLD(hal_fse,
  246. RX_FLOW_SEARCH_ENTRY,
  247. DEST_IP_31_0));
  248. tuple_info->dest_port = HAL_GET_FLD(hal_fse,
  249. RX_FLOW_SEARCH_ENTRY,
  250. DEST_PORT);
  251. tuple_info->src_port = HAL_GET_FLD(hal_fse,
  252. RX_FLOW_SEARCH_ENTRY,
  253. SRC_PORT);
  254. tuple_info->l4_protocol = HAL_GET_FLD(hal_fse,
  255. RX_FLOW_SEARCH_ENTRY,
  256. L4_PROTOCOL);
  257. return hal_fse;
  258. }
  259. /**
  260. * hal_rx_flow_delete_entry_be() - Setup a flow search entry in HW FST
  261. * @fst: Pointer to the Rx Flow Search Table
  262. * @hal_rx_fse: Pointer to the Rx Flow that is to be deleted from the FST
  263. *
  264. * Return: Success/Failure
  265. */
  266. static QDF_STATUS
  267. hal_rx_flow_delete_entry_be(uint8_t *rx_fst, void *hal_rx_fse)
  268. {
  269. uint8_t *fse = (uint8_t *)hal_rx_fse;
  270. if (!HAL_GET_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID))
  271. return QDF_STATUS_E_NOENT;
  272. HAL_CLR_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID);
  273. return QDF_STATUS_SUCCESS;
  274. }
  275. /**
  276. * hal_rx_fst_get_fse_size_be() - Retrieve the size of each entry in Rx FST
  277. *
  278. * Return: size of each entry/flow in Rx FST
  279. */
  280. static inline uint32_t
  281. hal_rx_fst_get_fse_size_be(void)
  282. {
  283. return HAL_RX_FST_ENTRY_SIZE;
  284. }
  285. /*
  286. * TX MONITOR
  287. */
  288. #ifdef QCA_MONITOR_2_0_SUPPORT
  289. /**
  290. * hal_txmon_get_buffer_addr_generic_be() - api to get buffer address
  291. * @tx_tlv: pointer to TLV header
  292. * @status: hal mon buffer address status
  293. *
  294. * Return: Address to qdf_frag_t
  295. */
  296. static inline qdf_frag_t
  297. hal_txmon_get_buffer_addr_generic_be(void *tx_tlv,
  298. struct hal_mon_buf_addr_status *status)
  299. {
  300. struct mon_buffer_addr *hal_buffer_addr =
  301. (struct mon_buffer_addr *)((uint8_t *)tx_tlv +
  302. HAL_RX_TLV64_HDR_SIZE);
  303. qdf_frag_t buf_addr = NULL;
  304. buf_addr = (qdf_frag_t)(uintptr_t)((hal_buffer_addr->buffer_virt_addr_31_0 |
  305. ((unsigned long long)hal_buffer_addr->buffer_virt_addr_63_32 <<
  306. 32)));
  307. /* qdf_frag_t is derived from buffer address tlv */
  308. if (qdf_unlikely(status)) {
  309. qdf_mem_copy(status,
  310. (uint8_t *)tx_tlv + HAL_RX_TLV64_HDR_SIZE,
  311. sizeof(struct hal_mon_buf_addr_status));
  312. /* update hal_mon_buf_addr_status */
  313. }
  314. return buf_addr;
  315. }
  316. #if defined(TX_MONITOR_WORD_MASK)
  317. /**
  318. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  319. *
  320. * @tx_tlv: pointer to tx_fes_setup tlv header
  321. *
  322. * Return: number of users
  323. */
  324. static inline uint8_t
  325. hal_txmon_get_num_users(void *tx_tlv)
  326. {
  327. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  328. return tx_fes_setup->number_of_users;
  329. }
  330. /**
  331. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  332. *
  333. * @tx_tlv: pointer to tx_fes_setup tlv header
  334. * @ppdu_info: pointer to hal_tx_ppdu_info
  335. *
  336. * Return: void
  337. */
  338. static inline void
  339. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  340. struct hal_tx_ppdu_info *tx_ppdu_info)
  341. {
  342. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  343. tx_ppdu_info->num_users = tx_fes_setup->number_of_users;
  344. if (tx_ppdu_info->num_users == 0)
  345. tx_ppdu_info->num_users = 1;
  346. tx_ppdu_info->ppdu_id = tx_fes_setup->schedule_id;
  347. }
  348. /**
  349. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  350. *
  351. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  352. * @data_status_info: pointer to data hal_tx_status_info
  353. * @prot_status_info: pointer to protection hal_tx_status_info
  354. *
  355. * Return: void
  356. */
  357. static inline void
  358. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  359. struct hal_tx_status_info *data_status_info,
  360. struct hal_tx_status_info *prot_status_info)
  361. {
  362. }
  363. /**
  364. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  365. *
  366. * @tx_tlv: pointer to peer_entry tlv header
  367. * @user_id: user_id
  368. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  369. * @tx_status_info: pointer to hal_tx_status_info
  370. *
  371. * Return: void
  372. */
  373. static inline void
  374. hal_txmon_parse_peer_entry(void *tx_tlv,
  375. uint8_t user_id,
  376. struct hal_tx_ppdu_info *tx_ppdu_info,
  377. struct hal_tx_status_info *tx_status_info)
  378. {
  379. }
  380. /**
  381. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  382. *
  383. * @tx_tlv: pointer to queue exten tlv header
  384. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  385. *
  386. * Return: void
  387. */
  388. static inline void
  389. hal_txmon_parse_queue_exten(void *tx_tlv,
  390. struct hal_tx_ppdu_info *tx_ppdu_info)
  391. {
  392. }
  393. /**
  394. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  395. *
  396. * @tx_tlv: pointer to mpdu start tlv header
  397. * @user_id: user id
  398. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  399. *
  400. * Return: void
  401. */
  402. static inline void
  403. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  404. struct hal_tx_ppdu_info *tx_ppdu_info)
  405. {
  406. }
  407. #else
  408. /**
  409. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  410. *
  411. * @tx_tlv: pointer to tx_fes_setup tlv header
  412. *
  413. * Return: number of users
  414. */
  415. static inline uint8_t
  416. hal_txmon_get_num_users(void *tx_tlv)
  417. {
  418. uint8_t num_users = HAL_TX_DESC_GET_64(tx_tlv,
  419. TX_FES_SETUP, NUMBER_OF_USERS);
  420. return num_users;
  421. }
  422. /**
  423. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  424. *
  425. * @tx_tlv: pointer to tx_fes_setup tlv header
  426. * @ppdu_info: pointer to hal_tx_ppdu_info
  427. *
  428. * Return: void
  429. */
  430. static inline void
  431. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  432. struct hal_tx_ppdu_info *tx_ppdu_info)
  433. {
  434. uint32_t num_users = 0;
  435. uint32_t ppdu_id = 0;
  436. num_users = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, NUMBER_OF_USERS);
  437. ppdu_id = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, SCHEDULE_ID);
  438. if (num_users == 0)
  439. num_users = 1;
  440. tx_ppdu_info->num_users = num_users;
  441. tx_ppdu_info->ppdu_id = ppdu_id;
  442. }
  443. /**
  444. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  445. *
  446. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  447. * @data_status_info: pointer to data hal_tx_status_info
  448. * @prot_status_info: pointer to protection hal_tx_status_info
  449. *
  450. * Return: void
  451. */
  452. static inline void
  453. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  454. struct hal_tx_status_info *data_status_info,
  455. struct hal_tx_status_info *prot_status_info)
  456. {
  457. prot_status_info->protection_addr =
  458. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  459. USE_ADDRESS_FIELDS_FOR_PROTECTION);
  460. /* protection frame address 1 */
  461. *(uint32_t *)&prot_status_info->addr1[0] =
  462. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  463. PROTECTION_FRAME_AD1_31_0);
  464. *(uint32_t *)&prot_status_info->addr1[4] =
  465. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  466. PROTECTION_FRAME_AD1_47_32);
  467. /* protection frame address 2 */
  468. *(uint32_t *)&prot_status_info->addr2[0] =
  469. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  470. PROTECTION_FRAME_AD2_15_0);
  471. *(uint32_t *)&prot_status_info->addr2[2] =
  472. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  473. PROTECTION_FRAME_AD2_47_16);
  474. /* protection frame address 3 */
  475. *(uint32_t *)&prot_status_info->addr3[0] =
  476. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  477. PROTECTION_FRAME_AD3_31_0);
  478. *(uint32_t *)&prot_status_info->addr3[4] =
  479. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  480. PROTECTION_FRAME_AD3_47_32);
  481. /* protection frame address 4 */
  482. *(uint32_t *)&prot_status_info->addr4[0] =
  483. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  484. PROTECTION_FRAME_AD4_15_0);
  485. *(uint32_t *)&prot_status_info->addr4[2] =
  486. HAL_TX_DESC_GET_64(tx_tlv, PCU_PPDU_SETUP_INIT,
  487. PROTECTION_FRAME_AD4_47_16);
  488. }
  489. /**
  490. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  491. *
  492. * @tx_tlv: pointer to peer_entry tlv header
  493. * @user_id: user_id
  494. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  495. * @tx_status_info: pointer to hal_tx_status_info
  496. *
  497. * Return: void
  498. */
  499. static inline void
  500. hal_txmon_parse_peer_entry(void *tx_tlv,
  501. uint8_t user_id,
  502. struct hal_tx_ppdu_info *tx_ppdu_info,
  503. struct hal_tx_status_info *tx_status_info)
  504. {
  505. *(uint32_t *)&tx_status_info->addr1[0] =
  506. HAL_TX_DESC_GET_64(tx_tlv, TX_PEER_ENTRY, MAC_ADDR_A_31_0);
  507. *(uint32_t *)&tx_status_info->addr1[4] =
  508. HAL_TX_DESC_GET_64(tx_tlv, TX_PEER_ENTRY, MAC_ADDR_A_47_32);
  509. *(uint32_t *)&tx_status_info->addr2[0] =
  510. HAL_TX_DESC_GET_64(tx_tlv, TX_PEER_ENTRY, MAC_ADDR_B_15_0);
  511. *(uint32_t *)&tx_status_info->addr2[2] =
  512. HAL_TX_DESC_GET_64(tx_tlv, TX_PEER_ENTRY, MAC_ADDR_B_47_16);
  513. TXMON_HAL_USER(tx_ppdu_info, user_id, sw_peer_id) =
  514. HAL_TX_DESC_GET_64(tx_tlv, TX_PEER_ENTRY, SW_PEER_ID);
  515. }
  516. /**
  517. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  518. *
  519. * @tx_tlv: pointer to queue exten tlv header
  520. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  521. *
  522. * Return: void
  523. */
  524. static inline void
  525. hal_txmon_parse_queue_exten(void *tx_tlv,
  526. struct hal_tx_ppdu_info *tx_ppdu_info)
  527. {
  528. TXMON_HAL_STATUS(tx_ppdu_info, frame_control) =
  529. HAL_TX_DESC_GET_64(tx_tlv, TX_QUEUE_EXTENSION,
  530. FRAME_CTL);
  531. TXMON_HAL_STATUS(tx_ppdu_info, frame_control_info_valid) = true;
  532. }
  533. /**
  534. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  535. *
  536. * @tx_tlv: pointer to mpdu start tlv header
  537. * @user_id: user id
  538. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  539. *
  540. * Return: void
  541. */
  542. static inline void
  543. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  544. struct hal_tx_ppdu_info *tx_ppdu_info)
  545. {
  546. TXMON_HAL_USER(tx_ppdu_info, user_id,
  547. start_seq) = HAL_TX_DESC_GET_64(tx_tlv, TX_MPDU_START,
  548. MPDU_SEQUENCE_NUMBER);
  549. TXMON_HAL(tx_ppdu_info, cur_usr_idx) = user_id;
  550. }
  551. #endif
  552. /**
  553. * hal_txmon_status_get_num_users_generic_be() - api to get num users
  554. * from start of fes window
  555. *
  556. * @tx_tlv_hdr: pointer to TLV header
  557. * @num_users: reference to number of user
  558. *
  559. * Return: status
  560. */
  561. static inline uint32_t
  562. hal_txmon_status_get_num_users_generic_be(void *tx_tlv_hdr, uint8_t *num_users)
  563. {
  564. uint32_t tlv_tag, user_id, tlv_len;
  565. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  566. void *tx_tlv;
  567. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(tx_tlv_hdr);
  568. user_id = HAL_RX_GET_USER_TLV32_USERID(tx_tlv_hdr);
  569. tlv_len = HAL_RX_GET_USER_TLV32_LEN(tx_tlv_hdr);
  570. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  571. /* window starts with either initiator or response */
  572. switch (tlv_tag) {
  573. case WIFITX_FES_SETUP_E:
  574. {
  575. *num_users = hal_txmon_get_num_users(tx_tlv);
  576. if (*num_users == 0)
  577. *num_users = 1;
  578. tlv_status = HAL_MON_TX_FES_SETUP;
  579. break;
  580. }
  581. case WIFIRX_RESPONSE_REQUIRED_INFO_E:
  582. {
  583. *num_users = HAL_TX_DESC_GET_64(tx_tlv,
  584. RX_RESPONSE_REQUIRED_INFO,
  585. RESPONSE_STA_COUNT);
  586. if (*num_users == 0)
  587. *num_users = 1;
  588. tlv_status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  589. break;
  590. }
  591. };
  592. return tlv_status;
  593. }
  594. /**
  595. * hal_txmon_free_status_buffer() - api to free status buffer
  596. * @pdev_handle: DP_PDEV handle
  597. * @status_frag: qdf_frag_t buffer
  598. * @end_offset: end offset within buffer that has valid data
  599. *
  600. * Return status
  601. */
  602. static inline QDF_STATUS
  603. hal_txmon_status_free_buffer_generic_be(qdf_frag_t status_frag,
  604. uint32_t end_offset)
  605. {
  606. uint32_t tlv_tag, tlv_len;
  607. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  608. uint8_t *tx_tlv;
  609. uint8_t *tx_tlv_start;
  610. qdf_frag_t frag_buf = NULL;
  611. QDF_STATUS status = QDF_STATUS_E_ABORTED;
  612. tx_tlv = (uint8_t *)status_frag;
  613. tx_tlv_start = tx_tlv;
  614. /* parse tlv and populate tx_ppdu_info */
  615. do {
  616. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv);
  617. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv);
  618. if (((tx_tlv - tx_tlv_start) + tlv_len) > end_offset)
  619. return QDF_STATUS_E_ABORTED;
  620. if (tlv_tag == WIFIMON_BUFFER_ADDR_E) {
  621. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv,
  622. NULL);
  623. if (frag_buf)
  624. qdf_frag_free(frag_buf);
  625. frag_buf = NULL;
  626. }
  627. if (WIFITX_FES_STATUS_END_E == tlv_tag ||
  628. WIFIRESPONSE_END_STATUS_E == tlv_tag ||
  629. WIFIDUMMY_E == tlv_tag) {
  630. status = QDF_STATUS_SUCCESS;
  631. break;
  632. }
  633. /* need api definition for hal_tx_status_get_next_tlv */
  634. tx_tlv = hal_tx_status_get_next_tlv(tx_tlv);
  635. if ((tx_tlv - tx_tlv_start) >= end_offset)
  636. break;
  637. } while (tlv_status == HAL_MON_TX_STATUS_PPDU_NOT_DONE);
  638. return status;
  639. }
  640. /**
  641. * hal_tx_get_ppdu_info() - api to get tx ppdu info
  642. * @pdev_handle: DP_PDEV handle
  643. * @prot_ppdu_info: populate dp_ppdu_info protection
  644. * @tx_data_ppdu_info: populate dp_ppdu_info data
  645. * @tlv_tag: Tag
  646. *
  647. * Return: dp_tx_ppdu_info pointer
  648. */
  649. static inline void *
  650. hal_tx_get_ppdu_info(void *data_info, void *prot_info, uint32_t tlv_tag)
  651. {
  652. struct hal_tx_ppdu_info *prot_ppdu_info = prot_info;
  653. switch (tlv_tag) {
  654. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  655. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  656. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  657. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  658. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  659. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  660. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  661. case WIFITX_DATA_E:/* DOWNSTREAM */
  662. case WIFIMON_BUFFER_ADDR_E:/* DOWNSTREAM */
  663. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  664. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  665. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  666. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  667. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  668. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  669. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  670. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  671. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  672. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  673. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  674. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  675. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  676. case WIFITX_FES_STATUS_START_PPDU_E:/* UPSTREAM */
  677. {
  678. return data_info;
  679. }
  680. }
  681. /*
  682. * check current prot_tlv_status is start protection
  683. * check current tlv_tag is either start protection or end protection
  684. */
  685. if (TXMON_HAL(prot_ppdu_info,
  686. prot_tlv_status) == WIFITX_FES_STATUS_START_PROT_E) {
  687. return prot_info;
  688. } else if (tlv_tag == WIFITX_FES_STATUS_PROT_E ||
  689. tlv_tag == WIFITX_FES_STATUS_START_PROT_E) {
  690. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  691. return prot_info;
  692. } else {
  693. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  694. return data_info;
  695. }
  696. return data_info;
  697. }
  698. /**
  699. * hal_txmon_status_parse_tlv_generic_be() - api to parse status tlv.
  700. * @data_ppdu_info: hal_txmon data ppdu info
  701. * @prot_ppdu_info: hal_txmon prot ppdu info
  702. * @data_status_info: pointer to data status info
  703. * @prot_status_info: pointer to prot status info
  704. * @tx_tlv_hdr: fragment of tx_tlv_hdr
  705. * @status_frag: qdf_frag_t buffer
  706. *
  707. * Return: status
  708. */
  709. static inline uint32_t
  710. hal_txmon_status_parse_tlv_generic_be(void *data_ppdu_info,
  711. void *prot_ppdu_info,
  712. void *data_status_info,
  713. void *prot_status_info,
  714. void *tx_tlv_hdr,
  715. qdf_frag_t status_frag)
  716. {
  717. struct hal_tx_ppdu_info *ppdu_info;
  718. struct hal_tx_status_info *tx_status_info;
  719. uint32_t tlv_tag, user_id, tlv_len;
  720. qdf_frag_t frag_buf = NULL;
  721. uint32_t status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  722. void *tx_tlv;
  723. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv_hdr);
  724. /* user_id start with 1, decrement by 1 to start from 0 */
  725. user_id = HAL_RX_GET_USER_TLV64_USERID(tx_tlv_hdr) - 1;
  726. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv_hdr);
  727. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  728. /* parse tlv and populate tx_ppdu_info */
  729. ppdu_info = hal_tx_get_ppdu_info(data_ppdu_info,
  730. prot_ppdu_info, tlv_tag);
  731. tx_status_info = (ppdu_info->is_data ? data_status_info :
  732. prot_status_info);
  733. user_id = user_id > ppdu_info->num_users ? 0 : ppdu_info->num_users;
  734. switch (tlv_tag) {
  735. /* start of initiator FES window */
  736. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  737. {
  738. /* initiator PPDU window start */
  739. hal_txmon_parse_tx_fes_setup(tx_tlv, ppdu_info);
  740. status = HAL_MON_TX_FES_SETUP;
  741. SHOW_DEFINED(WIFITX_FES_SETUP_E);
  742. break;
  743. }
  744. /* end of initiator FES window */
  745. case WIFITX_FES_STATUS_END_E:/* UPSTREAM */
  746. {
  747. /* initiator PPDU window end */
  748. uint32_t ppdu_timestamp_start = 0;
  749. uint32_t ppdu_timestamp_end = 0;
  750. uint8_t response_type = 0;
  751. uint8_t r2r_end_status_follow = 0;
  752. status = HAL_MON_TX_FES_STATUS_END;
  753. ppdu_timestamp_start =
  754. HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  755. START_OF_FRAME_TIMESTAMP_15_0) |
  756. (HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  757. START_OF_FRAME_TIMESTAMP_31_16) <<
  758. HAL_TX_LSB(TX_FES_STATUS_END,
  759. START_OF_FRAME_TIMESTAMP_31_16));
  760. ppdu_timestamp_end =
  761. HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  762. END_OF_FRAME_TIMESTAMP_15_0) |
  763. (HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  764. END_OF_FRAME_TIMESTAMP_31_16) <<
  765. HAL_TX_LSB(TX_FES_STATUS_END,
  766. END_OF_FRAME_TIMESTAMP_31_16));
  767. response_type = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  768. RESPONSE_TYPE);
  769. /*
  770. * r2r end status follow to inform whether to look for
  771. * rx_response_required_info
  772. */
  773. r2r_end_status_follow =
  774. HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_END,
  775. R2R_END_STATUS_TO_FOLLOW);
  776. TXMON_STATUS_INFO(tx_status_info,
  777. response_type) = response_type;
  778. TXMON_STATUS_INFO(tx_status_info,
  779. r2r_to_follow) = r2r_end_status_follow;
  780. /* update phy timestamp to ppdu timestamp */
  781. TXMON_HAL_STATUS(ppdu_info,
  782. ppdu_timestamp) = ppdu_timestamp_start;
  783. SHOW_DEFINED(WIFITX_FES_STATUS_END_E);
  784. break;
  785. }
  786. /* response window open */
  787. case WIFIRX_RESPONSE_REQUIRED_INFO_E:/* UPSTREAM */
  788. {
  789. /* response PPDU window start */
  790. uint32_t ppdu_id = 0;
  791. uint8_t reception_type = 0;
  792. uint8_t response_sta_count = 0;
  793. status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  794. ppdu_id = HAL_TX_DESC_GET_64(tx_tlv,
  795. RX_RESPONSE_REQUIRED_INFO,
  796. PHY_PPDU_ID);
  797. reception_type =
  798. HAL_TX_DESC_GET_64(tx_tlv, RX_RESPONSE_REQUIRED_INFO,
  799. SU_OR_UPLINK_MU_RECEPTION);
  800. response_sta_count =
  801. HAL_TX_DESC_GET_64(tx_tlv, RX_RESPONSE_REQUIRED_INFO,
  802. RESPONSE_STA_COUNT);
  803. /* get mac address */
  804. *(uint32_t *)&tx_status_info->addr1[0] =
  805. HAL_TX_DESC_GET_64(tx_tlv,
  806. RX_RESPONSE_REQUIRED_INFO,
  807. ADDR1_31_0);
  808. *(uint32_t *)&tx_status_info->addr1[4] =
  809. HAL_TX_DESC_GET_64(tx_tlv,
  810. RX_RESPONSE_REQUIRED_INFO,
  811. ADDR1_47_32);
  812. *(uint32_t *)&tx_status_info->addr2[0] =
  813. HAL_TX_DESC_GET_64(tx_tlv,
  814. RX_RESPONSE_REQUIRED_INFO,
  815. ADDR2_15_0);
  816. *(uint32_t *)&tx_status_info->addr2[2] =
  817. HAL_TX_DESC_GET_64(tx_tlv,
  818. RX_RESPONSE_REQUIRED_INFO,
  819. ADDR2_47_16);
  820. TXMON_HAL(ppdu_info, ppdu_id) = ppdu_id;
  821. TXMON_HAL_STATUS(ppdu_info, ppdu_id) = ppdu_id;
  822. if (response_sta_count == 0)
  823. response_sta_count = 1;
  824. TXMON_HAL(ppdu_info, num_users) = response_sta_count;
  825. if (reception_type)
  826. TXMON_STATUS_INFO(tx_status_info,
  827. transmission_type) =
  828. TXMON_SU_TRANSMISSION;
  829. else
  830. TXMON_STATUS_INFO(tx_status_info,
  831. transmission_type) =
  832. TXMON_MU_TRANSMISSION;
  833. SHOW_DEFINED(WIFIRX_RESPONSE_REQUIRED_INFO_E);
  834. break;
  835. }
  836. /* Response window close */
  837. case WIFIRESPONSE_END_STATUS_E:/* UPSTREAM */
  838. {
  839. /* response PPDU window end */
  840. uint8_t generated_response = 0;
  841. uint32_t bandwidth = 0;
  842. uint32_t ppdu_timestamp_start = 0;
  843. uint32_t ppdu_timestamp_end = 0;
  844. status = HAL_MON_RESPONSE_END_STATUS_INFO;
  845. generated_response = HAL_TX_DESC_GET_64(tx_tlv,
  846. RESPONSE_END_STATUS,
  847. GENERATED_RESPONSE);
  848. bandwidth = HAL_TX_DESC_GET_64(tx_tlv, RESPONSE_END_STATUS,
  849. COEX_BASED_TX_BW);
  850. /* 32 bits TSF */
  851. ppdu_timestamp_start =
  852. (HAL_TX_DESC_GET_64(tx_tlv, RESPONSE_END_STATUS,
  853. START_OF_FRAME_TIMESTAMP_15_0) |
  854. (HAL_TX_DESC_GET_64(tx_tlv, RESPONSE_END_STATUS,
  855. START_OF_FRAME_TIMESTAMP_31_16) <<
  856. 16));
  857. ppdu_timestamp_end =
  858. (HAL_TX_DESC_GET_64(tx_tlv, RESPONSE_END_STATUS,
  859. END_OF_FRAME_TIMESTAMP_15_0) |
  860. (HAL_TX_DESC_GET_64(tx_tlv, RESPONSE_END_STATUS,
  861. END_OF_FRAME_TIMESTAMP_31_16) <<
  862. 16));
  863. TXMON_HAL_STATUS(ppdu_info, bw) = bandwidth;
  864. /* update phy timestamp to ppdu timestamp */
  865. TXMON_HAL_STATUS(ppdu_info,
  866. ppdu_timestamp) = ppdu_timestamp_start;
  867. TXMON_STATUS_INFO(tx_status_info,
  868. generated_response) = generated_response;
  869. SHOW_DEFINED(WIFIRESPONSE_END_STATUS_E);
  870. break;
  871. }
  872. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  873. {
  874. SHOW_DEFINED(WIFITX_FLUSH_E);
  875. break;
  876. }
  877. /* Downstream tlv */
  878. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  879. {
  880. hal_txmon_parse_pcu_ppdu_setup_init(tx_tlv, data_status_info,
  881. prot_status_info);
  882. status = HAL_MON_TX_PCU_PPDU_SETUP_INIT;
  883. SHOW_DEFINED(WIFIPCU_PPDU_SETUP_INIT_E);
  884. break;
  885. }
  886. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  887. {
  888. hal_txmon_parse_peer_entry(tx_tlv, user_id,
  889. ppdu_info, tx_status_info);
  890. SHOW_DEFINED(WIFITX_PEER_ENTRY_E);
  891. break;
  892. }
  893. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  894. {
  895. status = HAL_MON_TX_QUEUE_EXTENSION;
  896. hal_txmon_parse_queue_exten(tx_tlv, ppdu_info);
  897. SHOW_DEFINED(WIFITX_QUEUE_EXTENSION_E);
  898. break;
  899. }
  900. /* payload and data frame handling */
  901. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  902. {
  903. hal_txmon_parse_mpdu_start(tx_tlv, user_id, ppdu_info);
  904. status = HAL_MON_TX_MPDU_START;
  905. SHOW_DEFINED(WIFITX_MPDU_START_E);
  906. break;
  907. }
  908. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  909. {
  910. /* compacted */
  911. /* we expect frame to be 802.11 frame type */
  912. status = HAL_MON_TX_MSDU_START;
  913. SHOW_DEFINED(WIFITX_MSDU_START_E);
  914. break;
  915. }
  916. case WIFITX_DATA_E:/* DOWNSTREAM */
  917. {
  918. status = HAL_MON_TX_DATA;
  919. /*
  920. * TODO: do we need a conversion api to convert
  921. * user_id from hw to get host user_index
  922. */
  923. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  924. TXMON_STATUS_INFO(tx_status_info,
  925. buffer) = (void *)status_frag;
  926. TXMON_STATUS_INFO(tx_status_info,
  927. offset) = ((void *)tx_tlv -
  928. (void *)status_frag);
  929. TXMON_STATUS_INFO(tx_status_info,
  930. length) = tlv_len;
  931. /*
  932. * reference of the status buffer will be held in
  933. * dp_tx_update_ppdu_info_status()
  934. */
  935. status = HAL_MON_TX_DATA;
  936. SHOW_DEFINED(WIFITX_DATA_E);
  937. break;
  938. }
  939. case WIFIMON_BUFFER_ADDR_E:/* DOWNSTREAM */
  940. {
  941. struct hal_mon_buf_addr_status buf_status = {0};
  942. status = HAL_MON_TX_BUFFER_ADDR;
  943. /*
  944. * TODO: do we need a conversion api to convert
  945. * user_id from hw to get host user_index
  946. */
  947. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  948. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv,
  949. &buf_status);
  950. TXMON_STATUS_INFO(tx_status_info,
  951. buffer) = (void *)frag_buf;
  952. TXMON_STATUS_INFO(tx_status_info, offset) = 0;
  953. TXMON_STATUS_INFO(tx_status_info,
  954. length) = buf_status.dma_length;
  955. SHOW_DEFINED(WIFIMON_BUFFER_ADDR_E);
  956. break;
  957. }
  958. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  959. {
  960. /* no tlv content */
  961. SHOW_DEFINED(WIFITX_MPDU_END_E);
  962. break;
  963. }
  964. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  965. {
  966. /* no tlv content */
  967. SHOW_DEFINED(WIFITX_MSDU_END_E);
  968. break;
  969. }
  970. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  971. {
  972. /* no tlv content */
  973. SHOW_DEFINED(WIFITX_LAST_MPDU_FETCHED_E);
  974. break;
  975. }
  976. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  977. {
  978. /* no tlv content */
  979. SHOW_DEFINED(WIFITX_LAST_MPDU_END_E);
  980. break;
  981. }
  982. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  983. {
  984. /*
  985. * transmitting power
  986. * minimum transmitting power
  987. * desired nss
  988. * tx chain mask
  989. * desired bw
  990. * duration of transmit and response
  991. *
  992. * since most of the field we are deriving from other tlv
  993. * we don't need to enable this in our tlv.
  994. */
  995. SHOW_DEFINED(WIFICOEX_TX_REQ_E);
  996. break;
  997. }
  998. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  999. {
  1000. /* user tlv */
  1001. /*
  1002. * All Tx monitor will have 802.11 hdr
  1003. * we don't need to enable this TLV
  1004. */
  1005. SHOW_DEFINED(WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E);
  1006. break;
  1007. }
  1008. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  1009. {
  1010. /*
  1011. * no tlv content
  1012. *
  1013. * TLV that indicates to TXPCU that preamble phase for the NDP
  1014. * frame transmission is now over
  1015. */
  1016. SHOW_DEFINED(WIFINDP_PREAMBLE_DONE_E);
  1017. break;
  1018. }
  1019. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  1020. {
  1021. /*
  1022. * no tlv content
  1023. *
  1024. * TLV indicates to the SCH that all timing critical TLV
  1025. * has been passed on to the transmit path
  1026. */
  1027. SHOW_DEFINED(WIFISCH_CRITICAL_TLV_REFERENCE_E);
  1028. break;
  1029. }
  1030. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  1031. {
  1032. /*
  1033. * Loopback specific setup info - not needed for Tx monitor
  1034. */
  1035. SHOW_DEFINED(WIFITX_LOOPBACK_SETUP_E);
  1036. break;
  1037. }
  1038. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  1039. {
  1040. /*
  1041. * no tlv content
  1042. *
  1043. * TLV indicates that other modules besides the scheduler can
  1044. * now also start generating TLV's
  1045. * prevent colliding or generating TLV's out of order
  1046. */
  1047. SHOW_DEFINED(WIFITX_FES_SETUP_COMPLETE_E);
  1048. break;
  1049. }
  1050. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  1051. {
  1052. /*
  1053. * no tlv content
  1054. *
  1055. * TLV indicates to SCH that a burst of MPDU info will
  1056. * start to come in over the TLV
  1057. */
  1058. SHOW_DEFINED(WIFITQM_MPDU_GLOBAL_START_E);
  1059. break;
  1060. }
  1061. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  1062. {
  1063. SHOW_DEFINED(WIFITX_WUR_DATA_E);
  1064. break;
  1065. }
  1066. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  1067. {
  1068. /*
  1069. * no tlv content
  1070. *
  1071. * TLV indicates END of all TLV's within the scheduler TLV
  1072. */
  1073. SHOW_DEFINED(WIFISCHEDULER_END_E);
  1074. break;
  1075. }
  1076. /* Upstream tlv */
  1077. case WIFIPDG_TX_REQ_E:
  1078. {
  1079. SHOW_DEFINED(WIFIPDG_TX_REQ_E);
  1080. break;
  1081. }
  1082. case WIFITX_FES_STATUS_START_E:
  1083. {
  1084. /*
  1085. * TLV indicating that first transmission on the medium
  1086. */
  1087. uint8_t medium_prot_type = 0;
  1088. status = HAL_MON_TX_FES_STATUS_START;
  1089. medium_prot_type = HAL_TX_DESC_GET_64(tx_tlv,
  1090. TX_FES_STATUS_START,
  1091. MEDIUM_PROT_TYPE);
  1092. ppdu_info = (struct hal_tx_ppdu_info *)prot_ppdu_info;
  1093. /* update what type of medium protection frame */
  1094. TXMON_STATUS_INFO(tx_status_info,
  1095. medium_prot_type) = medium_prot_type;
  1096. SHOW_DEFINED(WIFITX_FES_STATUS_START_E);
  1097. break;
  1098. }
  1099. case WIFITX_FES_STATUS_PROT_E:
  1100. {
  1101. uint32_t start_timestamp = 0;
  1102. uint32_t end_timestamp = 0;
  1103. /*
  1104. * generated by TXPCU to indicate the result of having
  1105. * received of the expected protection frame
  1106. */
  1107. status = HAL_MON_TX_FES_STATUS_PROT;
  1108. start_timestamp =
  1109. HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_PROT,
  1110. START_OF_FRAME_TIMESTAMP_15_0);
  1111. start_timestamp |=
  1112. (HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_PROT,
  1113. START_OF_FRAME_TIMESTAMP_31_16) <<
  1114. 15);
  1115. end_timestamp = HAL_TX_DESC_GET_64(tx_tlv,
  1116. TX_FES_STATUS_PROT,
  1117. END_OF_FRAME_TIMESTAMP_15_0);
  1118. end_timestamp |=
  1119. HAL_TX_DESC_GET_64(tx_tlv, TX_FES_STATUS_PROT,
  1120. END_OF_FRAME_TIMESTAMP_31_16) << 15;
  1121. /* ppdu timestamp as phy timestamp */
  1122. TXMON_HAL_STATUS(ppdu_info,
  1123. ppdu_timestamp) = start_timestamp;
  1124. SHOW_DEFINED(WIFITX_FES_STATUS_PROT_E);
  1125. break;
  1126. }
  1127. case WIFITX_FES_STATUS_START_PROT_E:
  1128. {
  1129. uint64_t tsft_64;
  1130. uint32_t response_type;
  1131. status = HAL_MON_TX_FES_STATUS_START_PROT;
  1132. TXMON_HAL(ppdu_info, prot_tlv_status) = tlv_tag;
  1133. /* timestamp */
  1134. tsft_64 = HAL_TX_DESC_GET_64(tx_tlv,
  1135. TX_FES_STATUS_START_PROT,
  1136. PROT_TIMESTAMP_LOWER_32);
  1137. tsft_64 |= (HAL_TX_DESC_GET_64(tx_tlv,
  1138. TX_FES_STATUS_START_PROT,
  1139. PROT_TIMESTAMP_UPPER_32) << 32);
  1140. response_type = HAL_TX_DESC_GET_64(tx_tlv,
  1141. TX_FES_STATUS_START_PROT,
  1142. RESPONSE_TYPE);
  1143. TXMON_STATUS_INFO(tx_status_info,
  1144. response_type) = response_type;
  1145. TXMON_HAL_STATUS(ppdu_info, tsft) = tsft_64;
  1146. SHOW_DEFINED(WIFITX_FES_STATUS_START_PROT_E);
  1147. break;
  1148. }
  1149. case WIFIPROT_TX_END_E:
  1150. {
  1151. /*
  1152. * no tlv content
  1153. *
  1154. * generated by TXPCU the moment that protection frame
  1155. * transmission has finished on the medium
  1156. */
  1157. SHOW_DEFINED(WIFIPROT_TX_END_E);
  1158. break;
  1159. }
  1160. case WIFITX_FES_STATUS_START_PPDU_E:
  1161. {
  1162. uint64_t tsft_64;
  1163. uint8_t ndp_frame;
  1164. status = HAL_MON_TX_FES_STATUS_START_PPDU;
  1165. tsft_64 = HAL_TX_DESC_GET_64(tx_tlv,
  1166. TX_FES_STATUS_START_PPDU,
  1167. PPDU_TIMESTAMP_LOWER_32);
  1168. tsft_64 |= (HAL_TX_DESC_GET_64(tx_tlv,
  1169. TX_FES_STATUS_START_PPDU,
  1170. PPDU_TIMESTAMP_UPPER_32) << 32);
  1171. ndp_frame = HAL_TX_DESC_GET_64(tx_tlv,
  1172. TX_FES_STATUS_START_PPDU,
  1173. NDP_FRAME);
  1174. TXMON_STATUS_INFO(tx_status_info, ndp_frame) = ndp_frame;
  1175. TXMON_HAL_STATUS(ppdu_info, tsft) = tsft_64;
  1176. SHOW_DEFINED(WIFITX_FES_STATUS_START_PPDU_E);
  1177. break;
  1178. }
  1179. case WIFITX_FES_STATUS_USER_PPDU_E:
  1180. {
  1181. /* user tlv */
  1182. uint16_t duration;
  1183. uint8_t transmitted_tid;
  1184. duration = HAL_TX_DESC_GET_64(tx_tlv,
  1185. TX_FES_STATUS_USER_PPDU,
  1186. DURATION);
  1187. transmitted_tid = HAL_TX_DESC_GET_64(tx_tlv,
  1188. TX_FES_STATUS_USER_PPDU,
  1189. TRANSMITTED_TID);
  1190. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  1191. TXMON_HAL_USER(ppdu_info, user_id, tid) = transmitted_tid;
  1192. TXMON_HAL_USER(ppdu_info, user_id, duration) = duration;
  1193. status = HAL_MON_TX_FES_STATUS_USER_PPDU;
  1194. SHOW_DEFINED(WIFITX_FES_STATUS_USER_PPDU_E);
  1195. break;
  1196. }
  1197. case WIFIPPDU_TX_END_E:
  1198. {
  1199. /*
  1200. * no tlv content
  1201. *
  1202. * generated by TXPCU the moment that PPDU transmission has
  1203. * finished on the medium
  1204. */
  1205. SHOW_DEFINED(WIFIPPDU_TX_END_E);
  1206. break;
  1207. }
  1208. case WIFITX_FES_STATUS_USER_RESPONSE_E:
  1209. {
  1210. /*
  1211. * TLV contains the FES transmit result of the each
  1212. * of the MAC users. TLV are forwarded to HWSCH
  1213. */
  1214. SHOW_DEFINED(WIFITX_FES_STATUS_USER_RESPONSE_E);
  1215. break;
  1216. }
  1217. case WIFITX_FES_STATUS_ACK_OR_BA_E:
  1218. {
  1219. /* user tlv */
  1220. /*
  1221. * TLV generated by RXPCU and provide information related to
  1222. * the received BA or ACK frame
  1223. */
  1224. SHOW_DEFINED(WIFITX_FES_STATUS_ACK_OR_BA_E);
  1225. break;
  1226. }
  1227. case WIFITX_FES_STATUS_1K_BA_E:
  1228. {
  1229. /* user tlv */
  1230. /*
  1231. * TLV generated by RXPCU and providing information related
  1232. * to the received BA frame in case of 512/1024 bitmaps
  1233. */
  1234. SHOW_DEFINED(WIFITX_FES_STATUS_1K_BA_E);
  1235. break;
  1236. }
  1237. case WIFIRECEIVED_RESPONSE_USER_7_0_E:
  1238. {
  1239. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_7_0_E);
  1240. break;
  1241. }
  1242. case WIFIRECEIVED_RESPONSE_USER_15_8_E:
  1243. {
  1244. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_15_8_E);
  1245. break;
  1246. }
  1247. case WIFIRECEIVED_RESPONSE_USER_23_16_E:
  1248. {
  1249. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_23_16_E);
  1250. break;
  1251. }
  1252. case WIFIRECEIVED_RESPONSE_USER_31_24_E:
  1253. {
  1254. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_31_24_E);
  1255. break;
  1256. }
  1257. case WIFIRECEIVED_RESPONSE_USER_36_32_E:
  1258. {
  1259. /*
  1260. * RXPCU generates this TLV when it receives a response frame
  1261. * that TXPCU pre-announced it was waiting for and in
  1262. * RXPCU_SETUP TLV, TLV generated before the
  1263. * RECEIVED_RESPONSE_INFO TLV.
  1264. *
  1265. * received info user fields are there which is not needed
  1266. * for TX monitor
  1267. */
  1268. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_36_32_E);
  1269. break;
  1270. }
  1271. case WIFITXPCU_BUFFER_STATUS_E:
  1272. {
  1273. SHOW_DEFINED(WIFITXPCU_BUFFER_STATUS_E);
  1274. break;
  1275. }
  1276. case WIFITXPCU_USER_BUFFER_STATUS_E:
  1277. {
  1278. /*
  1279. * WIFITXPCU_USER_BUFFER_STATUS_E - user tlv
  1280. * for TX monitor we aren't interested in this tlv
  1281. */
  1282. SHOW_DEFINED(WIFITXPCU_USER_BUFFER_STATUS_E);
  1283. break;
  1284. }
  1285. case WIFITXDMA_STOP_REQUEST_E:
  1286. {
  1287. /*
  1288. * no tlv content
  1289. *
  1290. * TLV is destined to TXDMA and informs TXDMA to stop
  1291. * pushing data into the transmit path.
  1292. */
  1293. SHOW_DEFINED(WIFITXDMA_STOP_REQUEST_E);
  1294. break;
  1295. }
  1296. case WIFITX_CBF_INFO_E:
  1297. {
  1298. /*
  1299. * After NDPA + NDP is received, RXPCU sends the TX_CBF_INFO to
  1300. * TXPCU to respond the CBF frame
  1301. *
  1302. * compressed beamforming pkt doesn't has mac header
  1303. * Tx monitor not interested in this pkt.
  1304. */
  1305. SHOW_DEFINED(WIFITX_CBF_INFO_E);
  1306. break;
  1307. }
  1308. case WIFITX_MPDU_COUNT_TRANSFER_END_E:
  1309. {
  1310. /*
  1311. * no tlv content
  1312. *
  1313. * TLV indicates that TXPCU has finished generating the
  1314. * TQM_UPDATE_TX_MPDU_COUNT TLV for all users
  1315. */
  1316. SHOW_DEFINED(WIFITX_MPDU_COUNT_TRANSFER_END_E);
  1317. break;
  1318. }
  1319. case WIFIPDG_RESPONSE_E:
  1320. {
  1321. /*
  1322. * most of the feilds are already covered in
  1323. * other TLV
  1324. * This is generated by TX_PCU to PDG to calculate
  1325. * all the PHY header info.
  1326. *
  1327. * some useful fields like min transmit power,
  1328. * rate used for transmitting packet is present.
  1329. */
  1330. SHOW_DEFINED(WIFIPDG_RESPONSE_E);
  1331. break;
  1332. }
  1333. case WIFIPDG_TRIG_RESPONSE_E:
  1334. {
  1335. /* no tlv content */
  1336. SHOW_DEFINED(WIFIPDG_TRIG_RESPONSE_E);
  1337. break;
  1338. }
  1339. case WIFIRECEIVED_TRIGGER_INFO_E:
  1340. {
  1341. /*
  1342. * TLV generated by RXPCU to inform the scheduler that
  1343. * a trigger frame has been received
  1344. */
  1345. SHOW_DEFINED(WIFIRECEIVED_TRIGGER_INFO_E);
  1346. break;
  1347. }
  1348. case WIFIOFDMA_TRIGGER_DETAILS_E:
  1349. {
  1350. SHOW_DEFINED(WIFIOFDMA_TRIGGER_DETAILS_E);
  1351. break;
  1352. }
  1353. case WIFIRX_FRAME_BITMAP_ACK_E:
  1354. {
  1355. /* user tlv */
  1356. status = HAL_MON_RX_FRAME_BITMAP_ACK;
  1357. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_ACK_E);
  1358. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  1359. TXMON_STATUS_INFO(tx_status_info, no_bitmap_avail) =
  1360. HAL_TX_DESC_GET_64(tx_tlv,
  1361. RX_FRAME_BITMAP_ACK,
  1362. NO_BITMAP_AVAILABLE);
  1363. TXMON_STATUS_INFO(tx_status_info, explicit_ack) =
  1364. HAL_TX_DESC_GET_64(tx_tlv,
  1365. RX_FRAME_BITMAP_ACK,
  1366. EXPLICIT_ACK);
  1367. /*
  1368. * get mac address, since address is received frame
  1369. * change the order and store it
  1370. */
  1371. *(uint32_t *)&tx_status_info->addr2[0] =
  1372. HAL_TX_DESC_GET_64(tx_tlv,
  1373. RX_FRAME_BITMAP_ACK,
  1374. ADDR1_31_0);
  1375. *(uint32_t *)&tx_status_info->addr2[4] =
  1376. HAL_TX_DESC_GET_64(tx_tlv,
  1377. RX_FRAME_BITMAP_ACK,
  1378. ADDR1_47_32);
  1379. *(uint32_t *)&tx_status_info->addr1[0] =
  1380. HAL_TX_DESC_GET_64(tx_tlv,
  1381. RX_FRAME_BITMAP_ACK,
  1382. ADDR2_15_0);
  1383. *(uint32_t *)&tx_status_info->addr1[2] =
  1384. HAL_TX_DESC_GET_64(tx_tlv,
  1385. RX_FRAME_BITMAP_ACK,
  1386. ADDR2_47_16);
  1387. TXMON_STATUS_INFO(tx_status_info, explicit_ack_type) =
  1388. HAL_TX_DESC_GET_64(tx_tlv, RX_FRAME_BITMAP_ACK,
  1389. EXPLICT_ACK_TYPE);
  1390. TXMON_HAL_USER(ppdu_info, user_id, tid) =
  1391. HAL_TX_DESC_GET_64(tx_tlv,
  1392. RX_FRAME_BITMAP_ACK,
  1393. BA_TID);
  1394. TXMON_HAL_USER(ppdu_info, user_id, aid) =
  1395. HAL_TX_DESC_GET_64(tx_tlv,
  1396. RX_FRAME_BITMAP_ACK,
  1397. STA_FULL_AID);
  1398. TXMON_HAL_USER(ppdu_info, user_id, start_seq) =
  1399. HAL_TX_DESC_GET_64(tx_tlv,
  1400. RX_FRAME_BITMAP_ACK,
  1401. BA_TS_SEQ);
  1402. TXMON_HAL_USER(ppdu_info, user_id, ba_control) =
  1403. HAL_TX_DESC_GET_64(tx_tlv,
  1404. RX_FRAME_BITMAP_ACK,
  1405. BA_TS_CTRL);
  1406. TXMON_HAL_USER(ppdu_info, user_id, ba_bitmap_sz) =
  1407. HAL_TX_DESC_GET_64(tx_tlv,
  1408. RX_FRAME_BITMAP_ACK,
  1409. BA_BITMAP_SIZE);
  1410. /* ba bitmap */
  1411. qdf_mem_copy(TXMON_HAL_USER(ppdu_info, user_id, ba_bitmap),
  1412. &HAL_SET_FLD_OFFSET_64(tx_tlv,
  1413. RX_FRAME_BITMAP_ACK,
  1414. BA_TS_BITMAP_31_0, 0), 32);
  1415. break;
  1416. }
  1417. case WIFIRX_FRAME_1K_BITMAP_ACK_E:
  1418. {
  1419. /* user tlv */
  1420. status = HAL_MON_RX_FRAME_BITMAP_BLOCK_ACK_1K;
  1421. SHOW_DEFINED(WIFIRX_FRAME_1K_BITMAP_ACK_E);
  1422. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  1423. TXMON_HAL_USER(ppdu_info, user_id, ba_bitmap_sz) =
  1424. (4 + HAL_TX_DESC_GET_64(tx_tlv, RX_FRAME_1K_BITMAP_ACK,
  1425. BA_BITMAP_SIZE));
  1426. TXMON_HAL_USER(ppdu_info, user_id, tid) =
  1427. HAL_TX_DESC_GET_64(tx_tlv,
  1428. RX_FRAME_1K_BITMAP_ACK,
  1429. BA_TID);
  1430. TXMON_HAL_USER(ppdu_info, user_id, aid) =
  1431. HAL_TX_DESC_GET_64(tx_tlv,
  1432. RX_FRAME_1K_BITMAP_ACK,
  1433. STA_FULL_AID);
  1434. /* get mac address */
  1435. *(uint32_t *)&tx_status_info->addr1[0] =
  1436. HAL_TX_DESC_GET_64(tx_tlv,
  1437. RX_FRAME_1K_BITMAP_ACK,
  1438. ADDR1_31_0);
  1439. *(uint32_t *)&tx_status_info->addr1[4] =
  1440. HAL_TX_DESC_GET_64(tx_tlv,
  1441. RX_FRAME_1K_BITMAP_ACK,
  1442. ADDR1_47_32);
  1443. *(uint32_t *)&tx_status_info->addr2[0] =
  1444. HAL_TX_DESC_GET_64(tx_tlv,
  1445. RX_FRAME_1K_BITMAP_ACK,
  1446. ADDR2_15_0);
  1447. *(uint32_t *)&tx_status_info->addr2[2] =
  1448. HAL_TX_DESC_GET_64(tx_tlv,
  1449. RX_FRAME_1K_BITMAP_ACK,
  1450. ADDR2_47_16);
  1451. TXMON_HAL_USER(ppdu_info, user_id, start_seq) =
  1452. HAL_TX_DESC_GET_64(tx_tlv,
  1453. RX_FRAME_1K_BITMAP_ACK,
  1454. BA_TS_SEQ);
  1455. TXMON_HAL_USER(ppdu_info, user_id, ba_control) =
  1456. HAL_TX_DESC_GET_64(tx_tlv,
  1457. RX_FRAME_1K_BITMAP_ACK,
  1458. BA_TS_CTRL);
  1459. /* memcpy ba bitmap */
  1460. qdf_mem_copy(TXMON_HAL_USER(ppdu_info, user_id, ba_bitmap),
  1461. tx_tlv +
  1462. HAL_TX_DESC_OFFSET_GET_64(tx_tlv,
  1463. RX_FRAME_1K_BITMAP_ACK,
  1464. BA_TS_BITMAP_31_0, 0),
  1465. 4 << TXMON_HAL_USER(ppdu_info,
  1466. user_id, ba_bitmap_sz));
  1467. break;
  1468. }
  1469. case WIFIRESPONSE_START_STATUS_E:
  1470. {
  1471. /*
  1472. * TLV indicates which HW response the TXPCU
  1473. * started generating
  1474. *
  1475. * HW generated frames like
  1476. * ACK frame - handled
  1477. * CTS frame - handled
  1478. * BA frame - handled
  1479. * MBA frame - handled
  1480. * CBF frame - no frame header
  1481. * Trigger response - TODO
  1482. * NDP LMR - no frame header
  1483. */
  1484. SHOW_DEFINED(WIFIRESPONSE_START_STATUS_E);
  1485. break;
  1486. }
  1487. case WIFIRX_START_PARAM_E:
  1488. {
  1489. /*
  1490. * RXPCU send this TLV after PHY RX detected a frame
  1491. * in the medium
  1492. *
  1493. * TX monitor not interested in this TLV
  1494. */
  1495. SHOW_DEFINED(WIFIRX_START_PARAM_E);
  1496. break;
  1497. }
  1498. case WIFIRXPCU_EARLY_RX_INDICATION_E:
  1499. {
  1500. /*
  1501. * early indication of pkt type and mcs rate
  1502. * already captured in other tlv
  1503. */
  1504. SHOW_DEFINED(WIFIRXPCU_EARLY_RX_INDICATION_E);
  1505. break;
  1506. }
  1507. case WIFIRX_PM_INFO_E:
  1508. {
  1509. SHOW_DEFINED(WIFIRX_PM_INFO_E);
  1510. break;
  1511. }
  1512. /* Active window */
  1513. case WIFITX_FLUSH_REQ_E:
  1514. {
  1515. SHOW_DEFINED(WIFITX_FLUSH_REQ_E);
  1516. break;
  1517. }
  1518. case WIFICOEX_TX_STATUS_E:
  1519. {
  1520. /* duration are retrieved from coex tx status */
  1521. uint16_t duration;
  1522. uint8_t status_reason;
  1523. status = HAL_MON_COEX_TX_STATUS;
  1524. duration = HAL_TX_DESC_GET_64(tx_tlv,
  1525. COEX_TX_STATUS,
  1526. CURRENT_TX_DURATION);
  1527. status_reason = HAL_TX_DESC_GET_64(tx_tlv,
  1528. COEX_TX_STATUS,
  1529. TX_STATUS_REASON);
  1530. /* update duration */
  1531. if (status_reason == COEX_FES_TX_START ||
  1532. status_reason == COEX_RESPONSE_TX_START)
  1533. TXMON_HAL_USER(ppdu_info, user_id, duration) = duration;
  1534. SHOW_DEFINED(WIFICOEX_TX_STATUS_E);
  1535. break;
  1536. }
  1537. case WIFIR2R_STATUS_END_E:
  1538. {
  1539. SHOW_DEFINED(WIFIR2R_STATUS_END_E);
  1540. break;
  1541. }
  1542. case WIFIRX_PREAMBLE_E:
  1543. {
  1544. SHOW_DEFINED(WIFIRX_PREAMBLE_E);
  1545. break;
  1546. }
  1547. case WIFIMACTX_SERVICE_E:
  1548. {
  1549. SHOW_DEFINED(WIFIMACTX_SERVICE_E);
  1550. break;
  1551. }
  1552. case WIFIMACTX_U_SIG_EHT_SU_MU_E:
  1553. {
  1554. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_SU_MU_E);
  1555. break;
  1556. }
  1557. case WIFIMACTX_U_SIG_EHT_TB_E:
  1558. {
  1559. /* TODO: no radiotap info available */
  1560. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_TB_E);
  1561. break;
  1562. }
  1563. case WIFIMACTX_EHT_SIG_USR_OFDMA_E:
  1564. {
  1565. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_OFDMA_E);
  1566. break;
  1567. }
  1568. case WIFIMACTX_EHT_SIG_USR_MU_MIMO_E:
  1569. {
  1570. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_MU_MIMO_E);
  1571. break;
  1572. }
  1573. case WIFIMACTX_EHT_SIG_USR_SU_E:
  1574. {
  1575. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_SU_E);
  1576. /* TODO: no radiotap info available */
  1577. break;
  1578. }
  1579. case WIFIMACTX_HE_SIG_A_SU_E:
  1580. {
  1581. uint8_t mcs_of_sig_b = 0;
  1582. uint8_t dcm_of_sig_b = 0;
  1583. uint8_t sig_a_bw = 0;
  1584. uint16_t he_mu_flag_1 = 0;
  1585. uint16_t he_mu_flag_2 = 0;
  1586. status = HAL_MON_MACTX_HE_SIG_A_SU;
  1587. mcs_of_sig_b = HAL_TX_DESC_GET_64(tx_tlv,
  1588. MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS,
  1589. TRANSMIT_MCS);
  1590. dcm_of_sig_b = HAL_TX_DESC_GET_64(tx_tlv,
  1591. MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS,
  1592. DCM);
  1593. sig_a_bw = HAL_TX_DESC_GET_64(tx_tlv,
  1594. MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS,
  1595. TRANSMIT_BW);
  1596. he_mu_flag_1 |= QDF_MON_STATUS_SIG_B_MCS_KNOWN |
  1597. QDF_MON_STATUS_SIG_B_DCM_KNOWN |
  1598. QDF_MON_STATUS_CHANNEL_2_CENTER_26_RU_KNOWN |
  1599. QDF_MON_STATUS_CHANNEL_1_RU_KNOWN |
  1600. QDF_MON_STATUS_CHANNEL_2_RU_KNOWN |
  1601. QDF_MON_STATUS_CHANNEL_1_CENTER_26_RU_KNOWN;
  1602. /* MCS */
  1603. he_mu_flag_1 |= mcs_of_sig_b <<
  1604. QDF_MON_STATUS_SIG_B_MCS_SHIFT;
  1605. /* DCM */
  1606. he_mu_flag_1 |= dcm_of_sig_b <<
  1607. QDF_MON_STATUS_SIG_B_DCM_SHIFT;
  1608. /* bandwidth */
  1609. he_mu_flag_2 |= QDF_MON_STATUS_SIG_A_BANDWIDTH_KNOWN;
  1610. he_mu_flag_2 |= sig_a_bw <<
  1611. QDF_MON_STATUS_SIG_A_BANDWIDTH_SHIFT;
  1612. TXMON_HAL_STATUS(ppdu_info, he_flags1) = he_mu_flag_1;
  1613. TXMON_HAL_STATUS(ppdu_info, he_flags2) = he_mu_flag_2;
  1614. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_SU_E);
  1615. break;
  1616. }
  1617. case WIFIMACTX_HE_SIG_A_MU_DL_E:
  1618. {
  1619. uint8_t mcs_of_sig_b = 0;
  1620. uint8_t dcm_of_sig_b = 0;
  1621. uint8_t sig_a_bw = 0;
  1622. uint8_t num_sig_b_symb = 0;
  1623. uint8_t comp_mode_sig_b = 0;
  1624. uint8_t punc_bw = 0;
  1625. uint16_t he_mu_flag_1 = 0;
  1626. uint16_t he_mu_flag_2 = 0;
  1627. status = HAL_MON_MACTX_HE_SIG_A_MU_DL;
  1628. mcs_of_sig_b = HAL_TX_DESC_GET_64(tx_tlv,
  1629. MACTX_HE_SIG_A_MU_DL_MACTX_HE_SIG_A_MU_DL_INFO_DETAILS,
  1630. MCS_OF_SIG_B);
  1631. dcm_of_sig_b = HAL_TX_DESC_GET_64(tx_tlv,
  1632. MACTX_HE_SIG_A_MU_DL_MACTX_HE_SIG_A_MU_DL_INFO_DETAILS,
  1633. DCM_OF_SIG_B);
  1634. sig_a_bw = HAL_TX_DESC_GET_64(tx_tlv,
  1635. MACTX_HE_SIG_A_MU_DL_MACTX_HE_SIG_A_MU_DL_INFO_DETAILS,
  1636. TRANSMIT_BW);
  1637. num_sig_b_symb = HAL_TX_DESC_GET_64(tx_tlv,
  1638. MACTX_HE_SIG_A_MU_DL_MACTX_HE_SIG_A_MU_DL_INFO_DETAILS,
  1639. NUM_SIG_B_SYMBOLS);
  1640. comp_mode_sig_b = HAL_TX_DESC_GET_64(tx_tlv,
  1641. MACTX_HE_SIG_A_MU_DL_MACTX_HE_SIG_A_MU_DL_INFO_DETAILS,
  1642. COMP_MODE_SIG_B);
  1643. he_mu_flag_1 |= QDF_MON_STATUS_SIG_B_MCS_KNOWN |
  1644. QDF_MON_STATUS_SIG_B_DCM_KNOWN |
  1645. QDF_MON_STATUS_SIG_B_SYM_NUM_KNOWN |
  1646. QDF_MON_STATUS_CHANNEL_2_CENTER_26_RU_KNOWN |
  1647. QDF_MON_STATUS_CHANNEL_1_RU_KNOWN |
  1648. QDF_MON_STATUS_CHANNEL_2_RU_KNOWN |
  1649. QDF_MON_STATUS_CHANNEL_1_CENTER_26_RU_KNOWN |
  1650. QDF_MON_STATUS_SIG_B_COMPRESSION_FLAG_1_KNOWN |
  1651. QDF_MON_STATUS_SIG_B_SYMBOL_USER_KNOWN;
  1652. /* MCS */
  1653. he_mu_flag_1 |= mcs_of_sig_b <<
  1654. QDF_MON_STATUS_SIG_B_MCS_SHIFT;
  1655. /* DCM */
  1656. he_mu_flag_1 |= dcm_of_sig_b <<
  1657. QDF_MON_STATUS_SIG_B_DCM_SHIFT;
  1658. /* Compression */
  1659. he_mu_flag_2 |= comp_mode_sig_b <<
  1660. QDF_MON_STATUS_SIG_B_COMPRESSION_FLAG_2_SHIFT;
  1661. /* bandwidth */
  1662. he_mu_flag_2 |= QDF_MON_STATUS_SIG_A_BANDWIDTH_KNOWN;
  1663. he_mu_flag_2 |= sig_a_bw <<
  1664. QDF_MON_STATUS_SIG_A_BANDWIDTH_SHIFT;
  1665. he_mu_flag_2 |= comp_mode_sig_b <<
  1666. QDF_MON_STATUS_SIG_B_COMPRESSION_FLAG_2_SHIFT;
  1667. /* number of symbol */
  1668. he_mu_flag_2 |= num_sig_b_symb <<
  1669. QDF_MON_STATUS_NUM_SIG_B_SYMBOLS_SHIFT;
  1670. /* puncture bw */
  1671. he_mu_flag_2 |= QDF_MON_STATUS_SIG_A_PUNC_BANDWIDTH_KNOWN;
  1672. punc_bw = sig_a_bw;
  1673. he_mu_flag_2 |=
  1674. punc_bw << QDF_MON_STATUS_SIG_A_PUNC_BANDWIDTH_SHIFT;
  1675. /* copy per user info to all user */
  1676. TXMON_HAL_STATUS(ppdu_info, he_mu_flags) = 1;
  1677. TXMON_HAL_STATUS(ppdu_info, he_flags1) = he_mu_flag_1;
  1678. TXMON_HAL_STATUS(ppdu_info, he_flags2) = he_mu_flag_2;
  1679. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_DL_E);
  1680. break;
  1681. }
  1682. case WIFIMACTX_HE_SIG_A_MU_UL_E:
  1683. {
  1684. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_UL_E);
  1685. break;
  1686. }
  1687. case WIFIMACTX_HE_SIG_B1_MU_E:
  1688. {
  1689. status = HAL_MON_MACTX_HE_SIG_B1_MU;
  1690. SHOW_DEFINED(WIFIMACTX_HE_SIG_B1_MU_E);
  1691. break;
  1692. }
  1693. case WIFIMACTX_HE_SIG_B2_MU_E:
  1694. {
  1695. /* user tlv */
  1696. uint16_t sta_id = 0;
  1697. uint16_t sta_spatial_config = 0;
  1698. uint8_t sta_mcs = 0;
  1699. uint8_t coding = 0;
  1700. uint8_t nss = 0;
  1701. uint8_t user_order = 0;
  1702. status = HAL_MON_MACTX_HE_SIG_B2_MU;
  1703. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  1704. sta_id = HAL_TX_DESC_GET_64(tx_tlv,
  1705. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1706. STA_ID);
  1707. sta_spatial_config = HAL_TX_DESC_GET_64(tx_tlv,
  1708. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1709. STA_SPATIAL_CONFIG);
  1710. sta_mcs = HAL_TX_DESC_GET_64(tx_tlv,
  1711. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1712. STA_MCS);
  1713. coding = HAL_TX_DESC_GET_64(tx_tlv,
  1714. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1715. STA_CODING);
  1716. nss = HAL_TX_DESC_GET_64(tx_tlv,
  1717. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1718. NSTS);
  1719. user_order = HAL_TX_DESC_GET_64(tx_tlv,
  1720. MACTX_HE_SIG_B2_MU_MACTX_HE_SIG_B2_MU_INFO_DETAILS,
  1721. USER_ORDER);
  1722. /* HE data 1 */
  1723. TXMON_HAL_USER(ppdu_info, user_id, he_data1) |=
  1724. QDF_MON_STATUS_HE_MCS_KNOWN |
  1725. QDF_MON_STATUS_HE_CODING_KNOWN;
  1726. /* HE data 2 */
  1727. /* HE data 3 */
  1728. TXMON_HAL_USER(ppdu_info, user_id, mcs) = sta_mcs;
  1729. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |=
  1730. sta_mcs << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
  1731. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |=
  1732. coding << QDF_MON_STATUS_CODING_SHIFT;
  1733. /* HE data 4 */
  1734. TXMON_HAL_USER(ppdu_info, user_id, he_data4) |=
  1735. sta_id << QDF_MON_STATUS_STA_ID_SHIFT;
  1736. /* HE data 5 */
  1737. /* HE data 6 */
  1738. TXMON_HAL_USER(ppdu_info, user_id, nss) = nss;
  1739. TXMON_HAL_USER(ppdu_info, user_id, he_data6) |= nss;
  1740. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_MU_E);
  1741. break;
  1742. }
  1743. case WIFIMACTX_HE_SIG_B2_OFDMA_E:
  1744. {
  1745. /* user tlv */
  1746. uint8_t *he_sig_b2_ofdma_info = NULL;
  1747. uint16_t sta_id = 0;
  1748. uint8_t nss = 0;
  1749. uint8_t txbf = 0;
  1750. uint8_t sta_mcs = 0;
  1751. uint8_t sta_dcm = 0;
  1752. uint8_t coding = 0;
  1753. uint8_t user_order = 0;
  1754. status = HAL_MON_MACTX_HE_SIG_B2_OFDMA;
  1755. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  1756. he_sig_b2_ofdma_info = (uint8_t *)tx_tlv +
  1757. HAL_OFFSET(MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1758. STA_ID);
  1759. sta_id = HAL_TX_DESC_GET_64(tx_tlv,
  1760. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1761. STA_ID);
  1762. nss = HAL_TX_DESC_GET_64(tx_tlv,
  1763. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1764. NSTS);
  1765. txbf = HAL_TX_DESC_GET_64(tx_tlv,
  1766. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1767. TXBF);
  1768. sta_mcs = HAL_TX_DESC_GET_64(tx_tlv,
  1769. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1770. STA_MCS);
  1771. sta_dcm = HAL_TX_DESC_GET_64(tx_tlv,
  1772. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1773. STA_DCM);
  1774. coding = HAL_TX_DESC_GET_64(tx_tlv,
  1775. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1776. STA_CODING);
  1777. user_order = HAL_TX_DESC_GET_64(tx_tlv,
  1778. MACTX_HE_SIG_B2_OFDMA_MACTX_HE_SIG_B2_OFDMA_INFO_DETAILS,
  1779. USER_ORDER);
  1780. /* HE data 1 */
  1781. TXMON_HAL_USER(ppdu_info, user_id, he_data1) |=
  1782. QDF_MON_STATUS_HE_MCS_KNOWN |
  1783. QDF_MON_STATUS_HE_CODING_KNOWN |
  1784. QDF_MON_STATUS_HE_DCM_KNOWN;
  1785. /* HE data 2 */
  1786. TXMON_HAL_USER(ppdu_info, user_id, he_data2) |=
  1787. QDF_MON_STATUS_TXBF_KNOWN;
  1788. /* HE data 3 */
  1789. TXMON_HAL_USER(ppdu_info, user_id, mcs) = sta_mcs;
  1790. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |=
  1791. sta_mcs << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
  1792. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |=
  1793. sta_dcm << QDF_MON_STATUS_DCM_SHIFT;
  1794. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |=
  1795. coding << QDF_MON_STATUS_CODING_SHIFT;
  1796. /* HE data 4 */
  1797. TXMON_HAL_USER(ppdu_info, user_id, he_data4) |=
  1798. sta_id << QDF_MON_STATUS_STA_ID_SHIFT;
  1799. /* HE data 5 */
  1800. TXMON_HAL_USER(ppdu_info, user_id, he_data5) |=
  1801. txbf << QDF_MON_STATUS_TXBF_SHIFT;
  1802. /* HE data 6 */
  1803. TXMON_HAL_USER(ppdu_info, user_id, nss) = nss;
  1804. TXMON_HAL_USER(ppdu_info, user_id, he_data6) |= nss;
  1805. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_OFDMA_E);
  1806. break;
  1807. }
  1808. case WIFIMACTX_L_SIG_A_E:
  1809. {
  1810. uint8_t *l_sig_a_info = NULL;
  1811. uint8_t rate = 0;
  1812. status = HAL_MON_MACTX_L_SIG_A;
  1813. l_sig_a_info = (uint8_t *)tx_tlv +
  1814. HAL_OFFSET(MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS,
  1815. RATE);
  1816. rate = HAL_TX_DESC_GET_64(tx_tlv,
  1817. MACTX_L_SIG_A_MACTX_L_SIG_A_INFO_DETAILS,
  1818. RATE);
  1819. switch (rate) {
  1820. case 8:
  1821. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_0MCS;
  1822. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS0;
  1823. break;
  1824. case 9:
  1825. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_1MCS;
  1826. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS1;
  1827. break;
  1828. case 10:
  1829. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_2MCS;
  1830. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS2;
  1831. break;
  1832. case 11:
  1833. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_3MCS;
  1834. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS3;
  1835. break;
  1836. case 12:
  1837. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_4MCS;
  1838. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS4;
  1839. break;
  1840. case 13:
  1841. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_5MCS;
  1842. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS5;
  1843. break;
  1844. case 14:
  1845. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_6MCS;
  1846. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS6;
  1847. break;
  1848. case 15:
  1849. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11A_RATE_7MCS;
  1850. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS7;
  1851. break;
  1852. default:
  1853. break;
  1854. }
  1855. TXMON_HAL_STATUS(ppdu_info, ofdm_flag) = 1;
  1856. TXMON_HAL_STATUS(ppdu_info, reception_type) = HAL_RX_TYPE_SU;
  1857. TXMON_HAL_STATUS(ppdu_info, l_sig_a_info) = *l_sig_a_info;
  1858. SHOW_DEFINED(WIFIMACTX_L_SIG_A_E);
  1859. break;
  1860. }
  1861. case WIFIMACTX_L_SIG_B_E:
  1862. {
  1863. uint8_t *l_sig_b_info = NULL;
  1864. uint8_t rate = 0;
  1865. status = HAL_MON_MACTX_L_SIG_B;
  1866. l_sig_b_info = (uint8_t *)tx_tlv +
  1867. HAL_OFFSET(MACTX_L_SIG_B_MACTX_L_SIG_B_INFO_DETAILS,
  1868. RATE);
  1869. rate = HAL_TX_DESC_GET_64(tx_tlv,
  1870. MACTX_L_SIG_B_MACTX_L_SIG_B_INFO_DETAILS,
  1871. RATE);
  1872. switch (rate) {
  1873. case 1:
  1874. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_3MCS;
  1875. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS3;
  1876. break;
  1877. case 2:
  1878. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_2MCS;
  1879. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS2;
  1880. break;
  1881. case 3:
  1882. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_1MCS;
  1883. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS1;
  1884. break;
  1885. case 4:
  1886. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_0MCS;
  1887. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS0;
  1888. break;
  1889. case 5:
  1890. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_6MCS;
  1891. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS6;
  1892. break;
  1893. case 6:
  1894. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_5MCS;
  1895. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS5;
  1896. break;
  1897. case 7:
  1898. TXMON_HAL_STATUS(ppdu_info, rate) = HAL_11B_RATE_4MCS;
  1899. TXMON_HAL_STATUS(ppdu_info, mcs) = HAL_LEGACY_MCS4;
  1900. break;
  1901. default:
  1902. break;
  1903. }
  1904. TXMON_HAL_STATUS(ppdu_info, cck_flag) = 1;
  1905. TXMON_HAL_STATUS(ppdu_info, reception_type) = HAL_RX_TYPE_SU;
  1906. TXMON_HAL_STATUS(ppdu_info, l_sig_b_info) = *l_sig_b_info;
  1907. SHOW_DEFINED(WIFIMACTX_L_SIG_B_E);
  1908. break;
  1909. }
  1910. case WIFIMACTX_HT_SIG_E:
  1911. {
  1912. uint8_t mcs = 0;
  1913. uint8_t bw = 0;
  1914. uint8_t is_stbc = 0;
  1915. uint8_t coding = 0;
  1916. uint8_t gi = 0;
  1917. status = HAL_MON_MACTX_HT_SIG;
  1918. mcs = HAL_TX_DESC_GET_64(tx_tlv, HT_SIG_INFO, MCS);
  1919. bw = HAL_TX_DESC_GET_64(tx_tlv, HT_SIG_INFO, CBW);
  1920. is_stbc = HAL_TX_DESC_GET_64(tx_tlv, HT_SIG_INFO, STBC);
  1921. coding = HAL_TX_DESC_GET_64(tx_tlv, HT_SIG_INFO, FEC_CODING);
  1922. gi = HAL_TX_DESC_GET_64(tx_tlv, HT_SIG_INFO, SHORT_GI);
  1923. TXMON_HAL_STATUS(ppdu_info, ldpc) =
  1924. (coding == HAL_SU_MU_CODING_LDPC) ? 1 : 0;
  1925. TXMON_HAL_STATUS(ppdu_info, ht_mcs) = mcs;
  1926. TXMON_HAL_STATUS(ppdu_info, bw) = bw;
  1927. TXMON_HAL_STATUS(ppdu_info, sgi) = gi;
  1928. TXMON_HAL_STATUS(ppdu_info, is_stbc) = is_stbc;
  1929. TXMON_HAL_STATUS(ppdu_info, reception_type) = HAL_RX_TYPE_SU;
  1930. SHOW_DEFINED(WIFIMACTX_HT_SIG_E);
  1931. break;
  1932. }
  1933. case WIFIMACTX_VHT_SIG_A_E:
  1934. {
  1935. uint8_t bandwidth = 0;
  1936. uint8_t is_stbc = 0;
  1937. uint8_t group_id = 0;
  1938. uint32_t nss_comb = 0;
  1939. uint8_t nss_su = 0;
  1940. uint8_t nss_mu[4] = {0};
  1941. uint8_t sgi = 0;
  1942. uint8_t coding = 0;
  1943. uint8_t mcs = 0;
  1944. uint8_t beamformed = 0;
  1945. uint8_t partial_aid = 0;
  1946. status = HAL_MON_MACTX_VHT_SIG_A;
  1947. bandwidth = HAL_TX_DESC_GET_64(tx_tlv,
  1948. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1949. BANDWIDTH);
  1950. is_stbc = HAL_TX_DESC_GET_64(tx_tlv,
  1951. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1952. STBC);
  1953. group_id = HAL_TX_DESC_GET_64(tx_tlv,
  1954. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1955. GROUP_ID);
  1956. /* nss_comb is su nss, MU nss and partial AID */
  1957. nss_comb = HAL_TX_DESC_GET_64(tx_tlv,
  1958. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1959. N_STS);
  1960. /* if it is SU */
  1961. nss_su = nss_comb & 0x7;
  1962. /* partial aid - applicable only for SU */
  1963. partial_aid = (nss_comb >> 3) & 0x1F;
  1964. /* if it is MU */
  1965. nss_mu[0] = nss_comb & 0x7;
  1966. nss_mu[1] = (nss_comb >> 3) & 0x7;
  1967. nss_mu[2] = (nss_comb >> 6) & 0x7;
  1968. nss_mu[3] = (nss_comb >> 9) & 0x7;
  1969. sgi = HAL_TX_DESC_GET_64(tx_tlv,
  1970. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1971. GI_SETTING);
  1972. coding = HAL_TX_DESC_GET_64(tx_tlv,
  1973. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1974. SU_MU_CODING);
  1975. mcs = HAL_TX_DESC_GET_64(tx_tlv,
  1976. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1977. MCS);
  1978. beamformed = HAL_TX_DESC_GET_64(tx_tlv,
  1979. MACTX_VHT_SIG_A_MACTX_VHT_SIG_A_INFO_DETAILS,
  1980. BEAMFORMED);
  1981. TXMON_HAL_STATUS(ppdu_info, ldpc) =
  1982. (coding == HAL_SU_MU_CODING_LDPC) ? 1 : 0;
  1983. TXMON_STATUS_INFO(tx_status_info, sw_frame_group_id) = group_id;
  1984. TXMON_HAL_STATUS(ppdu_info, sgi) = sgi;
  1985. TXMON_HAL_STATUS(ppdu_info, is_stbc) = is_stbc;
  1986. TXMON_HAL_STATUS(ppdu_info, bw) = bandwidth;
  1987. TXMON_HAL_STATUS(ppdu_info, beamformed) = beamformed;
  1988. if (group_id == 0 || group_id == 63) {
  1989. TXMON_HAL_STATUS(ppdu_info, reception_type) =
  1990. HAL_RX_TYPE_SU;
  1991. TXMON_HAL_STATUS(ppdu_info, mcs) = mcs;
  1992. TXMON_HAL_STATUS(ppdu_info, nss) =
  1993. nss_su & VHT_SIG_SU_NSS_MASK;
  1994. } else {
  1995. TXMON_HAL_STATUS(ppdu_info, reception_type) =
  1996. HAL_RX_TYPE_MU_MIMO;
  1997. TXMON_HAL_USER(ppdu_info, user_id, mcs) = mcs;
  1998. TXMON_HAL_USER(ppdu_info, user_id, nss) =
  1999. nss_su & VHT_SIG_SU_NSS_MASK;
  2000. }
  2001. /* TODO: loop over multiple user */
  2002. TXMON_HAL_USER(ppdu_info, user_id,
  2003. vht_flag_values2) = bandwidth;
  2004. TXMON_HAL_USER(ppdu_info, user_id,
  2005. vht_flag_values3[0]) = (mcs << 4) | nss_su;
  2006. TXMON_HAL_USER(ppdu_info, user_id,
  2007. vht_flag_values3[1]) = (mcs << 4) | nss_mu[1];
  2008. TXMON_HAL_USER(ppdu_info, user_id,
  2009. vht_flag_values3[2]) = (mcs << 4) | nss_mu[2];
  2010. TXMON_HAL_USER(ppdu_info, user_id,
  2011. vht_flag_values3[3]) = (mcs << 4) | nss_mu[3];
  2012. TXMON_HAL_USER(ppdu_info, user_id,
  2013. vht_flag_values4) = coding;
  2014. TXMON_HAL_USER(ppdu_info, user_id,
  2015. vht_flag_values5) = group_id;
  2016. TXMON_HAL_USER(ppdu_info, user_id,
  2017. vht_flag_values6) = partial_aid;
  2018. SHOW_DEFINED(WIFIMACTX_VHT_SIG_A_E);
  2019. break;
  2020. }
  2021. case WIFIMACTX_VHT_SIG_B_MU160_E:
  2022. {
  2023. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU160_E);
  2024. break;
  2025. }
  2026. case WIFIMACTX_VHT_SIG_B_MU80_E:
  2027. {
  2028. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU80_E);
  2029. break;
  2030. }
  2031. case WIFIMACTX_VHT_SIG_B_MU40_E:
  2032. {
  2033. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU40_E);
  2034. break;
  2035. }
  2036. case WIFIMACTX_VHT_SIG_B_MU20_E:
  2037. {
  2038. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU20_E);
  2039. break;
  2040. }
  2041. case WIFIMACTX_VHT_SIG_B_SU160_E:
  2042. {
  2043. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU160_E);
  2044. break;
  2045. }
  2046. case WIFIMACTX_VHT_SIG_B_SU80_E:
  2047. {
  2048. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU80_E);
  2049. break;
  2050. }
  2051. case WIFIMACTX_VHT_SIG_B_SU40_E:
  2052. {
  2053. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU40_E);
  2054. break;
  2055. }
  2056. case WIFIMACTX_VHT_SIG_B_SU20_E:
  2057. {
  2058. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU20_E);
  2059. break;
  2060. }
  2061. case WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E:
  2062. {
  2063. SHOW_DEFINED(WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E);
  2064. break;
  2065. }
  2066. case WIFIMACTX_USER_DESC_PER_USER_E:
  2067. {
  2068. uint32_t psdu_length = 0;
  2069. uint8_t ru_start_index = 0;
  2070. uint8_t ru_size = 0;
  2071. uint8_t nss = 0;
  2072. uint8_t mcs = 0;
  2073. uint8_t dcm = 0;
  2074. uint8_t fec_type = 0;
  2075. uint8_t is_ldpc_extra_symb = 0;
  2076. uint32_t he_data1 = 0;
  2077. uint32_t he_data2 = 0;
  2078. uint32_t he_data3 = 0;
  2079. uint32_t he_data4 = 0;
  2080. uint32_t he_data5 = 0;
  2081. uint32_t he_data6 = 0;
  2082. status = HAL_MON_MACTX_USER_DESC_PER_USER;
  2083. TXMON_HAL(ppdu_info, cur_usr_idx) = user_id;
  2084. psdu_length = HAL_TX_DESC_GET_64(tx_tlv,
  2085. MACTX_USER_DESC_PER_USER,
  2086. PSDU_LENGTH);
  2087. ru_start_index = HAL_TX_DESC_GET_64(tx_tlv,
  2088. MACTX_USER_DESC_PER_USER,
  2089. RU_START_INDEX);
  2090. ru_size = HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER,
  2091. RU_SIZE);
  2092. nss = HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER, NSS);
  2093. mcs = HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER, MCS);
  2094. dcm = HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER, DCM);
  2095. fec_type = HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER,
  2096. FEC_TYPE);
  2097. is_ldpc_extra_symb =
  2098. HAL_TX_DESC_GET_64(tx_tlv, MACTX_USER_DESC_PER_USER,
  2099. LDPC_EXTRA_SYMBOL);
  2100. if (!TXMON_HAL_STATUS(ppdu_info, he_flags))
  2101. break;
  2102. /* update */
  2103. /* MCS */
  2104. he_data1 |= QDF_MON_STATUS_HE_MCS_KNOWN;
  2105. he_data3 |= (mcs << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT);
  2106. /* DCM */
  2107. he_data1 |= QDF_MON_STATUS_HE_DCM_KNOWN;
  2108. he_data3 |= (dcm << QDF_MON_STATUS_DCM_SHIFT);
  2109. /* LDPC EXTRA SYMB */
  2110. he_data1 |= QDF_MON_STATUS_HE_LDPC_EXTRA_SYMBOL_KNOWN;
  2111. he_data3 |= (is_ldpc_extra_symb <<
  2112. QDF_MON_STATUS_LDPC_EXTRA_SYMBOL_SHIFT);
  2113. /* RU offset and RU */
  2114. he_data1 |= QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN;
  2115. he_data2 |= QDF_MON_STATUS_RU_ALLOCATION_OFFSET_KNOWN;
  2116. he_data2 |= (ru_start_index <<
  2117. QDF_MON_STATUS_RU_ALLOCATION_SHIFT);
  2118. /* Data BW and RU allocation */
  2119. he_data1 |= QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN;
  2120. he_data5 |= ru_size << 2;
  2121. TXMON_HAL_USER(ppdu_info, user_id, mcs) = mcs;
  2122. /* update stack variable to ppdu_info */
  2123. TXMON_HAL_USER(ppdu_info, user_id, he_data1) |= he_data1;
  2124. TXMON_HAL_USER(ppdu_info, user_id, he_data2) |= he_data2;
  2125. TXMON_HAL_USER(ppdu_info, user_id, he_data3) |= he_data3;
  2126. TXMON_HAL_USER(ppdu_info, user_id, he_data4) |= he_data4;
  2127. TXMON_HAL_USER(ppdu_info, user_id, he_data5) |= he_data5;
  2128. TXMON_HAL_USER(ppdu_info, user_id, he_data6) |= he_data6;
  2129. SHOW_DEFINED(WIFIMACTX_USER_DESC_PER_USER_E);
  2130. break;
  2131. }
  2132. case WIFIMACTX_USER_DESC_COMMON_E:
  2133. {
  2134. SHOW_DEFINED(WIFIMACTX_USER_DESC_COMMON_E);
  2135. break;
  2136. }
  2137. case WIFIMACTX_PHY_DESC_E:
  2138. {
  2139. uint32_t bf_type = 0;
  2140. /* pkt_type - preamble type */
  2141. uint32_t pkt_type = 0;
  2142. uint8_t bandwidth = 0;
  2143. uint8_t mcs = 0;
  2144. uint8_t is_stbc = 0;
  2145. uint8_t nss = 0;
  2146. uint8_t is_triggered = 0;
  2147. uint8_t gi = 0;
  2148. uint8_t he_ppdu_subtype = 0;
  2149. uint32_t ltf_size = 0;
  2150. uint32_t ru_start = 0;
  2151. uint32_t he_data1 = 0;
  2152. uint32_t he_data2 = 0;
  2153. uint32_t he_data3 = 0;
  2154. uint32_t he_data4 = 0;
  2155. uint32_t he_data5 = 0;
  2156. uint32_t he_data6 = 0;
  2157. uint16_t he_mu_flag_1 = 0;
  2158. uint16_t he_mu_flag_2 = 0;
  2159. uint8_t i = 0;
  2160. status = HAL_MON_MACTX_PHY_DESC;
  2161. bf_type = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, BF_TYPE);
  2162. pkt_type = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, PKT_TYPE);
  2163. mcs = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, MCS);
  2164. is_stbc = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, STBC);
  2165. is_triggered = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2166. TRIGGERED);
  2167. if (!is_triggered) {
  2168. nss = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2169. HEAVY_CLIP_NSS);
  2170. bandwidth = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2171. BANDWIDTH);
  2172. } else {
  2173. nss = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, NSS);
  2174. /*
  2175. * is_triggered, bw is minimum of AP pkt bw
  2176. * or STA bw
  2177. */
  2178. bandwidth = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2179. AP_PKT_BW);
  2180. if (pkt_type == TXMON_PKT_TYPE_11AX ||
  2181. pkt_type == TXMON_PKT_TYPE_11BE)
  2182. ru_start =
  2183. HAL_TX_DESC_GET_64(tx_tlv,
  2184. MACTX_PHY_DESC,
  2185. RU_SIZE_UPDATED_V2);
  2186. }
  2187. gi = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2188. CP_SETTING);
  2189. ltf_size = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC, LTF_SIZE);
  2190. he_ppdu_subtype = HAL_TX_DESC_GET_64(tx_tlv, MACTX_PHY_DESC,
  2191. HE_PPDU_SUBTYPE);
  2192. TXMON_HAL_STATUS(ppdu_info, beamformed) = bf_type;
  2193. TXMON_HAL_STATUS(ppdu_info, preamble_type) = pkt_type;
  2194. TXMON_HAL_STATUS(ppdu_info, mcs) = mcs;
  2195. TXMON_HAL_STATUS(ppdu_info, ltf_size) = ltf_size;
  2196. TXMON_HAL_STATUS(ppdu_info, nss) = nss;
  2197. TXMON_HAL_STATUS(ppdu_info, is_stbc) = is_stbc;
  2198. TXMON_HAL_STATUS(ppdu_info, bw) = bandwidth;
  2199. switch (ppdu_info->rx_status.preamble_type) {
  2200. case TXMON_PKT_TYPE_11N_MM:
  2201. TXMON_HAL_STATUS(ppdu_info, ht_flags) = 1;
  2202. TXMON_HAL_STATUS(ppdu_info,
  2203. rtap_flags) |= HT_SGI_PRESENT;
  2204. break;
  2205. case TXMON_PKT_TYPE_11AC:
  2206. TXMON_HAL_STATUS(ppdu_info, vht_flags) = 1;
  2207. break;
  2208. case TXMON_PKT_TYPE_11AX:
  2209. TXMON_HAL_STATUS(ppdu_info, he_flags) = 1;
  2210. break;
  2211. default:
  2212. break;
  2213. }
  2214. if (!TXMON_HAL_STATUS(ppdu_info, he_flags))
  2215. break;
  2216. /* update he flags */
  2217. /* PPDU FORMAT */
  2218. switch (he_ppdu_subtype) {
  2219. case TXMON_HE_SUBTYPE_SU:
  2220. TXMON_HAL_STATUS(ppdu_info, he_data1) |=
  2221. QDF_MON_STATUS_HE_SU_FORMAT_TYPE;
  2222. break;
  2223. case TXMON_HE_SUBTYPE_TRIG:
  2224. TXMON_HAL_STATUS(ppdu_info, he_data1) |=
  2225. QDF_MON_STATUS_HE_TRIG_FORMAT_TYPE;
  2226. break;
  2227. case TXMON_HE_SUBTYPE_MU:
  2228. TXMON_HAL_STATUS(ppdu_info, he_data1) |=
  2229. QDF_MON_STATUS_HE_MU_FORMAT_TYPE;
  2230. break;
  2231. case TXMON_HE_SUBTYPE_EXT_SU:
  2232. TXMON_HAL_STATUS(ppdu_info, he_data1) |=
  2233. QDF_MON_STATUS_HE_EXT_SU_FORMAT_TYPE;
  2234. break;
  2235. };
  2236. /* BEAM CHANGE */
  2237. he_data1 |= QDF_MON_STATUS_HE_BEAM_CHANGE_KNOWN;
  2238. if (ppdu_info->rx_status.beamformed) {
  2239. he_data1 |= QDF_MON_STATUS_TXBF_KNOWN;
  2240. he_data5 |= (1 << QDF_MON_STATUS_TXBF_SHIFT);
  2241. he_data3 |= (1 << QDF_MON_STATUS_BEAM_CHANGE_SHIFT);
  2242. }
  2243. /* UL/DL known */
  2244. he_data1 |= QDF_MON_STATUS_HE_DL_UL_KNOWN;
  2245. he_data3 |= (1 << QDF_MON_STATUS_DL_UL_SHIFT);
  2246. /* MCS */
  2247. he_data1 |= QDF_MON_STATUS_HE_MCS_KNOWN;
  2248. he_data3 |= (mcs << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT);
  2249. /* STBC */
  2250. he_data1 |= QDF_MON_STATUS_HE_STBC_KNOWN;
  2251. he_data3 |= (is_stbc << QDF_MON_STATUS_STBC_SHIFT);
  2252. /* GI */
  2253. he_data2 |= QDF_MON_STATUS_HE_GI_KNOWN;
  2254. he_data5 |= (gi << QDF_MON_STATUS_GI_SHIFT);
  2255. /* NSS */
  2256. he_data6 |= (nss << QDF_MON_STATUS_HE_DATA_6_NSS_SHIFT);
  2257. /* Data BW and RU allocation */
  2258. he_data1 |= QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN;
  2259. he_data5 |= bandwidth;
  2260. /* update stack variable to ppdu_info */
  2261. TXMON_HAL_STATUS(ppdu_info, he_data1) |= he_data1;
  2262. TXMON_HAL_STATUS(ppdu_info, he_data2) |= he_data2;
  2263. TXMON_HAL_STATUS(ppdu_info, he_data3) |= he_data3;
  2264. TXMON_HAL_STATUS(ppdu_info, he_data4) |= he_data4;
  2265. TXMON_HAL_STATUS(ppdu_info, he_data5) |= he_data5;
  2266. TXMON_HAL_STATUS(ppdu_info, he_data6) |= he_data6;
  2267. for (i = 0; i < TXMON_HAL(ppdu_info, num_users); i++) {
  2268. TXMON_HAL_USER(ppdu_info, i, he_data1) |= he_data1;
  2269. TXMON_HAL_USER(ppdu_info, i, he_data2) |= he_data2;
  2270. TXMON_HAL_USER(ppdu_info, i, he_data3) |= he_data3;
  2271. TXMON_HAL_USER(ppdu_info, i, he_data4) |= he_data4;
  2272. TXMON_HAL_USER(ppdu_info, i, he_data5) |= he_data5;
  2273. TXMON_HAL_USER(ppdu_info, i, he_data6) |= he_data6;
  2274. TXMON_HAL_USER(ppdu_info, i, he_flags1) = he_mu_flag_1;
  2275. TXMON_HAL_USER(ppdu_info, i, he_flags2) = he_mu_flag_2;
  2276. }
  2277. SHOW_DEFINED(WIFIMACTX_PHY_DESC_E);
  2278. break;
  2279. }
  2280. case WIFICOEX_RX_STATUS_E:
  2281. {
  2282. SHOW_DEFINED(WIFICOEX_RX_STATUS_E);
  2283. break;
  2284. }
  2285. case WIFIRX_PPDU_ACK_REPORT_E:
  2286. {
  2287. SHOW_DEFINED(WIFIRX_PPDU_ACK_REPORT_E);
  2288. break;
  2289. }
  2290. case WIFIRX_PPDU_NO_ACK_REPORT_E:
  2291. {
  2292. SHOW_DEFINED(WIFIRX_PPDU_NO_ACK_REPORT_E);
  2293. break;
  2294. }
  2295. case WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E:
  2296. {
  2297. SHOW_DEFINED(WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E);
  2298. break;
  2299. }
  2300. case WIFITXPCU_PHYTX_DEBUG32_E:
  2301. {
  2302. SHOW_DEFINED(WIFITXPCU_PHYTX_DEBUG32_E);
  2303. break;
  2304. }
  2305. case WIFITXPCU_PREAMBLE_DONE_E:
  2306. {
  2307. SHOW_DEFINED(WIFITXPCU_PREAMBLE_DONE_E);
  2308. break;
  2309. }
  2310. case WIFIRX_PHY_SLEEP_E:
  2311. {
  2312. SHOW_DEFINED(WIFIRX_PHY_SLEEP_E);
  2313. break;
  2314. }
  2315. case WIFIRX_FRAME_BITMAP_REQ_E:
  2316. {
  2317. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_REQ_E);
  2318. break;
  2319. }
  2320. case WIFIRXPCU_TX_SETUP_CLEAR_E:
  2321. {
  2322. SHOW_DEFINED(WIFIRXPCU_TX_SETUP_CLEAR_E);
  2323. break;
  2324. }
  2325. case WIFIRX_TRIG_INFO_E:
  2326. {
  2327. SHOW_DEFINED(WIFIRX_TRIG_INFO_E);
  2328. break;
  2329. }
  2330. case WIFIEXPECTED_RESPONSE_E:
  2331. {
  2332. SHOW_DEFINED(WIFIEXPECTED_RESPONSE_E);
  2333. break;
  2334. }
  2335. case WIFITRIGGER_RESPONSE_TX_DONE_E:
  2336. {
  2337. SHOW_DEFINED(WIFITRIGGER_RESPONSE_TX_DONE_E);
  2338. break;
  2339. }
  2340. }
  2341. return status;
  2342. }
  2343. #endif /* QCA_MONITOR_2_0_SUPPORT */
  2344. #ifdef REO_SHARED_QREF_TABLE_EN
  2345. static void hal_reo_shared_qaddr_cache_clear_be(hal_soc_handle_t hal_soc_hdl)
  2346. {
  2347. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  2348. uint32_t reg_val = 0;
  2349. /* Set Qdesc clear bit to erase REO internal storage for Qdesc pointers
  2350. * of 37 peer/tids
  2351. */
  2352. reg_val = HAL_REG_READ(hal, HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE));
  2353. reg_val |= HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1);
  2354. HAL_REG_WRITE(hal,
  2355. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  2356. reg_val);
  2357. /* Clear Qdesc clear bit to erase REO internal storage for Qdesc pointers
  2358. * of 37 peer/tids
  2359. */
  2360. reg_val &= ~(HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1));
  2361. HAL_REG_WRITE(hal,
  2362. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  2363. reg_val);
  2364. hal_verbose_debug("hal_soc: %pK :Setting CLEAR_DESC_ARRAY field of"
  2365. "WCSS_UMAC_REO_R0_QDESC_ADDR_READ and resetting back"
  2366. "to erase stale entries in reo storage: regval:%x", hal, reg_val);
  2367. }
  2368. /* hal_reo_shared_qaddr_write(): Write REO tid queue addr
  2369. * LUT shared by SW and HW at the index given by peer id
  2370. * and tid.
  2371. *
  2372. * @hal_soc: hal soc pointer
  2373. * @reo_qref_addr: pointer to index pointed to be peer_id
  2374. * and tid
  2375. * @tid: tid queue number
  2376. * @hw_qdesc_paddr: reo queue addr
  2377. */
  2378. static void hal_reo_shared_qaddr_write_be(hal_soc_handle_t hal_soc_hdl,
  2379. uint16_t peer_id,
  2380. int tid,
  2381. qdf_dma_addr_t hw_qdesc_paddr)
  2382. {
  2383. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  2384. struct rx_reo_queue_reference *reo_qref;
  2385. uint32_t peer_tid_idx;
  2386. /* Plug hw_desc_addr in Host reo queue reference table */
  2387. if (HAL_PEER_ID_IS_MLO(peer_id)) {
  2388. peer_tid_idx = ((peer_id - HAL_ML_PEER_ID_START) *
  2389. DP_MAX_TIDS) + tid;
  2390. reo_qref = (struct rx_reo_queue_reference *)
  2391. &hal->reo_qref.mlo_reo_qref_table_vaddr[peer_tid_idx];
  2392. } else {
  2393. peer_tid_idx = (peer_id * DP_MAX_TIDS) + tid;
  2394. reo_qref = (struct rx_reo_queue_reference *)
  2395. &hal->reo_qref.non_mlo_reo_qref_table_vaddr[peer_tid_idx];
  2396. }
  2397. reo_qref->rx_reo_queue_desc_addr_31_0 =
  2398. hw_qdesc_paddr & 0xffffffff;
  2399. reo_qref->rx_reo_queue_desc_addr_39_32 =
  2400. (hw_qdesc_paddr & 0xff00000000) >> 32;
  2401. if (hw_qdesc_paddr != 0)
  2402. reo_qref->receive_queue_number = tid;
  2403. else
  2404. reo_qref->receive_queue_number = 0;
  2405. hal_reo_shared_qaddr_cache_clear_be(hal_soc_hdl);
  2406. hal_verbose_debug("hw_qdesc_paddr: %pK, tid: %d, reo_qref:%pK,"
  2407. "rx_reo_queue_desc_addr_31_0: %x,"
  2408. "rx_reo_queue_desc_addr_39_32: %x",
  2409. (void *)hw_qdesc_paddr, tid, reo_qref,
  2410. reo_qref->rx_reo_queue_desc_addr_31_0,
  2411. reo_qref->rx_reo_queue_desc_addr_39_32);
  2412. }
  2413. /**
  2414. * hal_reo_shared_qaddr_setup() - Allocate MLO and Non MLO reo queue
  2415. * reference table shared between SW and HW and initialize in Qdesc Base0
  2416. * base1 registers provided by HW.
  2417. *
  2418. * @hal_soc: HAL Soc handle
  2419. *
  2420. * Return: None
  2421. */
  2422. static void hal_reo_shared_qaddr_setup_be(hal_soc_handle_t hal_soc_hdl)
  2423. {
  2424. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  2425. hal->reo_qref.reo_qref_table_en = 1;
  2426. hal->reo_qref.mlo_reo_qref_table_vaddr =
  2427. (uint64_t *)qdf_mem_alloc_consistent(
  2428. hal->qdf_dev, hal->qdf_dev->dev,
  2429. REO_QUEUE_REF_ML_TABLE_SIZE,
  2430. &hal->reo_qref.mlo_reo_qref_table_paddr);
  2431. hal->reo_qref.non_mlo_reo_qref_table_vaddr =
  2432. (uint64_t *)qdf_mem_alloc_consistent(
  2433. hal->qdf_dev, hal->qdf_dev->dev,
  2434. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  2435. &hal->reo_qref.non_mlo_reo_qref_table_paddr);
  2436. hal_verbose_debug("MLO table start paddr:%pK,"
  2437. "Non-MLO table start paddr:%pK,"
  2438. "MLO table start vaddr: %pK,"
  2439. "Non MLO table start vaddr: %pK",
  2440. (void *)hal->reo_qref.mlo_reo_qref_table_paddr,
  2441. (void *)hal->reo_qref.non_mlo_reo_qref_table_paddr,
  2442. hal->reo_qref.mlo_reo_qref_table_vaddr,
  2443. hal->reo_qref.non_mlo_reo_qref_table_vaddr);
  2444. }
  2445. /**
  2446. * hal_reo_shared_qaddr_init() - Zero out REO qref LUT and
  2447. * write start addr of MLO and Non MLO table in HW
  2448. *
  2449. * @hal_soc: HAL Soc handle
  2450. *
  2451. * Return: None
  2452. */
  2453. static void hal_reo_shared_qaddr_init_be(hal_soc_handle_t hal_soc_hdl)
  2454. {
  2455. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  2456. qdf_mem_zero(hal->reo_qref.mlo_reo_qref_table_vaddr,
  2457. REO_QUEUE_REF_ML_TABLE_SIZE);
  2458. qdf_mem_zero(hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  2459. REO_QUEUE_REF_NON_ML_TABLE_SIZE);
  2460. /* LUT_BASE0 and BASE1 registers expect upper 32bits of LUT base address
  2461. * and lower 8 bits to be 0. Shift the physical address by 8 to plug
  2462. * upper 32bits only
  2463. */
  2464. HAL_REG_WRITE(hal,
  2465. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  2466. hal->reo_qref.non_mlo_reo_qref_table_paddr >> 8);
  2467. HAL_REG_WRITE(hal,
  2468. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  2469. hal->reo_qref.mlo_reo_qref_table_paddr >> 8);
  2470. HAL_REG_WRITE(hal,
  2471. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  2472. HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, LUT_FEATURE_ENABLE,
  2473. 1));
  2474. HAL_REG_WRITE(hal,
  2475. HWIO_REO_R0_QDESC_MAX_SW_PEER_ID_ADDR(REO_REG_REG_BASE),
  2476. HAL_MS(HWIO_REO_R0_QDESC, MAX_SW_PEER_ID_MAX_SUPPORTED,
  2477. 0x1fff));
  2478. }
  2479. /**
  2480. * hal_reo_shared_qaddr_detach() - Free MLO and Non MLO reo queue
  2481. * reference table shared between SW and HW
  2482. *
  2483. * @hal_soc: HAL Soc handle
  2484. *
  2485. * Return: None
  2486. */
  2487. static void hal_reo_shared_qaddr_detach_be(hal_soc_handle_t hal_soc_hdl)
  2488. {
  2489. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  2490. HAL_REG_WRITE(hal,
  2491. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  2492. 0);
  2493. HAL_REG_WRITE(hal,
  2494. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  2495. 0);
  2496. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  2497. REO_QUEUE_REF_ML_TABLE_SIZE,
  2498. hal->reo_qref.mlo_reo_qref_table_vaddr,
  2499. hal->reo_qref.mlo_reo_qref_table_paddr, 0);
  2500. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  2501. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  2502. hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  2503. hal->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  2504. }
  2505. #endif
  2506. #endif /* _HAL_BE_GENERIC_API_H_ */