sde_rsc.c 52 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "[sde_rsc:%s:%d]: " fmt, __func__, __LINE__
  7. #include <linux/kernel.h>
  8. #include <linux/debugfs.h>
  9. #include <linux/of.h>
  10. #include <linux/string.h>
  11. #include <linux/of_address.h>
  12. #include <linux/component.h>
  13. #include <linux/slab.h>
  14. #include <linux/mutex.h>
  15. #include <linux/of_platform.h>
  16. #include <linux/delay.h>
  17. #include <linux/uaccess.h>
  18. #include <linux/module.h>
  19. #include <soc/qcom/rpmh.h>
  20. #include "msm_drv.h"
  21. #include "sde_rsc_priv.h"
  22. #include "sde_dbg.h"
  23. #include "sde_trace.h"
  24. #define SDE_RSC_DRV_DBG_NAME "sde_rsc_drv"
  25. #define SDE_RSC_WRAPPER_DBG_NAME "sde_rsc_wrapper"
  26. #define SINGLE_TCS_EXECUTION_TIME_V1 1064000
  27. #define SINGLE_TCS_EXECUTION_TIME_V2 930000
  28. #define SINGLE_TCS_EXECUTION_TIME_V3 930000
  29. #define SINGLE_TCS_EXECUTION_TIME_V4 930000
  30. #define SINGLE_TCS_EXECUTION_TIME_V5 650000
  31. #define RSC_MODE_INSTRUCTION_TIME 100
  32. #define RSC_MODE_THRESHOLD_OVERHEAD 2700
  33. /**
  34. * rsc_min_threshold will be set to MIN_THRESHOLD_OVERHEAD_TIME which
  35. * takes into account back off time + overhead from RSC/RSC_WRAPPER. The
  36. * overhead buffer time is required to be greater than 14. Program it
  37. * with a higher value (3.3 ms), so it has sufficient time to complete
  38. * the sequence in rare cases.
  39. */
  40. #define MIN_THRESHOLD_OVERHEAD_TIME 64
  41. #define DEFAULT_PANEL_FPS 60
  42. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  43. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  44. #define DEFAULT_PANEL_PREFILL_LINES 25
  45. #define DEFAULT_PANEL_VTOTAL (480 + DEFAULT_PANEL_PREFILL_LINES)
  46. #define TICKS_IN_NANO_SECOND 1000000000
  47. #define MAX_BUFFER_SIZE 256
  48. #define CMD_MODE_SWITCH_SUCCESS 0xFFFF
  49. #define VID_MODE_SWITCH_SUCCESS 0xFFFE
  50. #define CLK_MODE_SWITCH_SUCCESS 0xFFFD
  51. #define STATE_UPDATE_NOT_ALLOWED 0xFFFC
  52. /* Primary panel worst case VSYNC expected to be no less than 30fps */
  53. #define PRIMARY_VBLANK_WORST_CASE_MS 34
  54. #define DEFAULT_PANEL_MIN_V_PREFILL 35
  55. /* add 10ms constant for low fps cases and use default timeout for existing cases */
  56. #define RSC_VSYNC_TIMEOUT_MS(x) ((x && x->cmd_config.fps < 30) ? \
  57. ((1000 / x->cmd_config.fps) + 10) : PRIMARY_VBLANK_WORST_CASE_MS)
  58. static struct sde_rsc_priv *rsc_prv_list[MAX_RSC_COUNT];
  59. static struct device *rpmh_dev[MAX_RSC_COUNT];
  60. /**
  61. * sde_rsc_client_create() - create the client for sde rsc.
  62. * Different displays like DSI, HDMI, DP, WB, etc should call this
  63. * api to register their vote for rpmh. They still need to vote for
  64. * power handle to get the clocks.
  65. * @rsc_index: A client will be created on this RSC. As of now only
  66. * SDE_RSC_INDEX is valid rsc index.
  67. * @name: Caller needs to provide some valid string to identify
  68. * the client. "primary", "dp", "hdmi" are suggested name.
  69. * @is_primary: Caller needs to provide information if client is primary
  70. * or not. Primary client votes will be redirected to
  71. * display rsc.
  72. * @vsync_source: This parameter is only valid for primary display. It provides
  73. * vsync source information
  74. *
  75. * Return: client node pointer.
  76. */
  77. struct sde_rsc_client *sde_rsc_client_create(u32 rsc_index, char *client_name,
  78. enum sde_rsc_client_type client_type, u32 vsync_source)
  79. {
  80. struct sde_rsc_client *client;
  81. struct sde_rsc_priv *rsc;
  82. static int id;
  83. if (!client_name) {
  84. pr_err("client name is null- not supported\n");
  85. return ERR_PTR(-EINVAL);
  86. } else if (rsc_index >= MAX_RSC_COUNT) {
  87. pr_err("invalid rsc index\n");
  88. return ERR_PTR(-EINVAL);
  89. } else if (!rsc_prv_list[rsc_index]) {
  90. pr_debug("rsc not probed yet or not available\n");
  91. return NULL;
  92. }
  93. rsc = rsc_prv_list[rsc_index];
  94. client = kzalloc(sizeof(struct sde_rsc_client), GFP_KERNEL);
  95. if (!client)
  96. return ERR_PTR(-ENOMEM);
  97. mutex_lock(&rsc->client_lock);
  98. strlcpy(client->name, client_name, MAX_RSC_CLIENT_NAME_LEN);
  99. client->current_state = SDE_RSC_IDLE_STATE;
  100. client->rsc_index = rsc_index;
  101. client->id = id;
  102. client->client_type = client_type;
  103. if (client->client_type == SDE_RSC_PRIMARY_DISP_CLIENT) {
  104. rsc->primary_client = client;
  105. rsc->vsync_source = vsync_source;
  106. }
  107. pr_debug("client %s rsc index:%d client_type:%d\n", client_name,
  108. rsc_index, client->client_type);
  109. list_add(&client->list, &rsc->client_list);
  110. id++;
  111. mutex_unlock(&rsc->client_lock);
  112. return client;
  113. }
  114. EXPORT_SYMBOL(sde_rsc_client_create);
  115. /**
  116. * sde_rsc_client_destroy() - Destroy the sde rsc client.
  117. *
  118. * @client: Client pointer provided by sde_rsc_client_create().
  119. *
  120. * Return: none
  121. */
  122. void sde_rsc_client_destroy(struct sde_rsc_client *client)
  123. {
  124. struct sde_rsc_priv *rsc;
  125. enum sde_rsc_state state;
  126. if (!client) {
  127. pr_debug("invalid client\n");
  128. goto end;
  129. } else if (client->rsc_index >= MAX_RSC_COUNT) {
  130. pr_err("invalid rsc index\n");
  131. goto end;
  132. }
  133. pr_debug("client %s destroyed\n", client->name);
  134. rsc = rsc_prv_list[client->rsc_index];
  135. if (!rsc)
  136. goto end;
  137. mutex_lock(&rsc->client_lock);
  138. state = client->current_state;
  139. mutex_unlock(&rsc->client_lock);
  140. if (state != SDE_RSC_IDLE_STATE) {
  141. int wait_vblank_crtc_id;
  142. sde_rsc_client_state_update(client, SDE_RSC_IDLE_STATE, NULL,
  143. SDE_RSC_INVALID_CRTC_ID, &wait_vblank_crtc_id);
  144. /* if vblank wait required at shutdown, use a simple sleep */
  145. if (wait_vblank_crtc_id != SDE_RSC_INVALID_CRTC_ID) {
  146. pr_err("unexpected sleep required on crtc %d at rsc client destroy\n",
  147. wait_vblank_crtc_id);
  148. SDE_EVT32(client->id, state, rsc->current_state,
  149. client->crtc_id, wait_vblank_crtc_id,
  150. SDE_EVTLOG_ERROR);
  151. msleep(RSC_VSYNC_TIMEOUT_MS(rsc));
  152. }
  153. }
  154. mutex_lock(&rsc->client_lock);
  155. list_del_init(&client->list);
  156. mutex_unlock(&rsc->client_lock);
  157. kfree(client);
  158. end:
  159. return;
  160. }
  161. EXPORT_SYMBOL(sde_rsc_client_destroy);
  162. struct sde_rsc_event *sde_rsc_register_event(int rsc_index, uint32_t event_type,
  163. void (*cb_func)(uint32_t event_type, void *usr), void *usr)
  164. {
  165. struct sde_rsc_event *evt;
  166. struct sde_rsc_priv *rsc;
  167. if (rsc_index >= MAX_RSC_COUNT) {
  168. pr_err("invalid rsc index:%d\n", rsc_index);
  169. return ERR_PTR(-EINVAL);
  170. } else if (!rsc_prv_list[rsc_index]) {
  171. pr_err("rsc idx:%d not probed yet or not available\n",
  172. rsc_index);
  173. return ERR_PTR(-EINVAL);
  174. } else if (!cb_func || !event_type) {
  175. pr_err("no event or cb func\n");
  176. return ERR_PTR(-EINVAL);
  177. }
  178. rsc = rsc_prv_list[rsc_index];
  179. evt = kzalloc(sizeof(struct sde_rsc_event), GFP_KERNEL);
  180. if (!evt)
  181. return ERR_PTR(-ENOMEM);
  182. evt->event_type = event_type;
  183. evt->rsc_index = rsc_index;
  184. evt->usr = usr;
  185. evt->cb_func = cb_func;
  186. pr_debug("event register type:%d rsc index:%d\n",
  187. event_type, rsc_index);
  188. mutex_lock(&rsc->client_lock);
  189. list_add(&evt->list, &rsc->event_list);
  190. mutex_unlock(&rsc->client_lock);
  191. return evt;
  192. }
  193. EXPORT_SYMBOL(sde_rsc_register_event);
  194. void sde_rsc_unregister_event(struct sde_rsc_event *event)
  195. {
  196. struct sde_rsc_priv *rsc;
  197. if (!event) {
  198. pr_debug("invalid event client\n");
  199. goto end;
  200. } else if (event->rsc_index >= MAX_RSC_COUNT) {
  201. pr_err("invalid rsc index\n");
  202. goto end;
  203. }
  204. pr_debug("event client destroyed\n");
  205. rsc = rsc_prv_list[event->rsc_index];
  206. if (!rsc)
  207. goto end;
  208. mutex_lock(&rsc->client_lock);
  209. list_del_init(&event->list);
  210. mutex_unlock(&rsc->client_lock);
  211. kfree(event);
  212. end:
  213. return;
  214. }
  215. EXPORT_SYMBOL(sde_rsc_unregister_event);
  216. bool is_sde_rsc_available(int rsc_index)
  217. {
  218. if (rsc_index >= MAX_RSC_COUNT) {
  219. pr_err("invalid rsc index:%d\n", rsc_index);
  220. return false;
  221. } else if (!rsc_prv_list[rsc_index]) {
  222. pr_debug("rsc idx:%d not probed yet or not available\n",
  223. rsc_index);
  224. return false;
  225. }
  226. return true;
  227. }
  228. EXPORT_SYMBOL(is_sde_rsc_available);
  229. enum sde_rsc_state get_sde_rsc_current_state(int rsc_index)
  230. {
  231. struct sde_rsc_priv *rsc;
  232. if (rsc_index >= MAX_RSC_COUNT) {
  233. pr_err("invalid rsc index:%d\n", rsc_index);
  234. return SDE_RSC_IDLE_STATE;
  235. } else if (!rsc_prv_list[rsc_index]) {
  236. pr_err("rsc idx:%d not probed yet or not available\n",
  237. rsc_index);
  238. return SDE_RSC_IDLE_STATE;
  239. }
  240. rsc = rsc_prv_list[rsc_index];
  241. return rsc->current_state;
  242. }
  243. EXPORT_SYMBOL(get_sde_rsc_current_state);
  244. static u32 sde_rsc_timer_calculate(struct sde_rsc_priv *rsc,
  245. struct sde_rsc_cmd_config *cmd_config, enum sde_rsc_state state)
  246. {
  247. const u32 cxo_period_ns = 52;
  248. u64 rsc_backoff_time_ns = rsc->backoff_time_ns;
  249. u64 rsc_mode_threshold_time_ns = rsc->mode_threshold_time_ns;
  250. u64 rsc_time_slot_0_ns = rsc->time_slot_0_ns;
  251. u64 rsc_time_slot_1_ns;
  252. const u64 pdc_jitter = 20; /* 20% more */
  253. u64 frame_time_ns, frame_jitter;
  254. u64 line_time_ns, prefill_time_ns;
  255. u64 pdc_backoff_time_ns;
  256. s64 total;
  257. int ret = 0;
  258. u32 default_prefill_lines;
  259. if (cmd_config)
  260. memcpy(&rsc->cmd_config, cmd_config, sizeof(*cmd_config));
  261. /* calculate for 640x480 60 fps resolution by default */
  262. if (!rsc->cmd_config.fps)
  263. rsc->cmd_config.fps = DEFAULT_PANEL_FPS;
  264. if (!rsc->cmd_config.jitter_numer)
  265. rsc->cmd_config.jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  266. if (!rsc->cmd_config.jitter_denom)
  267. rsc->cmd_config.jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  268. if (!rsc->cmd_config.vtotal)
  269. rsc->cmd_config.vtotal = DEFAULT_PANEL_VTOTAL;
  270. default_prefill_lines = (rsc->cmd_config.fps *
  271. DEFAULT_PANEL_MIN_V_PREFILL) / DEFAULT_PANEL_FPS;
  272. if (!rsc->cmd_config.prefill_lines)
  273. rsc->cmd_config.prefill_lines = default_prefill_lines;
  274. pr_debug("frame fps:%d jitter_numer:%d jitter_denom:%d vtotal:%d prefill lines:%d\n",
  275. rsc->cmd_config.fps, rsc->cmd_config.jitter_numer,
  276. rsc->cmd_config.jitter_denom, rsc->cmd_config.vtotal,
  277. rsc->cmd_config.prefill_lines);
  278. /* 1 nano second */
  279. frame_time_ns = TICKS_IN_NANO_SECOND;
  280. frame_time_ns = div_u64(frame_time_ns, rsc->cmd_config.fps);
  281. frame_jitter = frame_time_ns * rsc->cmd_config.jitter_numer;
  282. frame_jitter = div_u64(frame_jitter, rsc->cmd_config.jitter_denom);
  283. /* convert it to percentage */
  284. frame_jitter = div_u64(frame_jitter, 100);
  285. line_time_ns = frame_time_ns;
  286. line_time_ns = div_u64(line_time_ns, rsc->cmd_config.vtotal);
  287. prefill_time_ns = line_time_ns * rsc->cmd_config.prefill_lines;
  288. total = frame_time_ns - frame_jitter - prefill_time_ns;
  289. if (total < 0) {
  290. pr_err("invalid total time period time:%llu jiter_time:%llu blanking time:%llu\n",
  291. frame_time_ns, frame_jitter, prefill_time_ns);
  292. total = 0;
  293. }
  294. total = div_u64(total, cxo_period_ns);
  295. rsc->timer_config.static_wakeup_time_ns = total;
  296. pr_debug("frame time:%llu frame jiter_time:%llu\n",
  297. frame_time_ns, frame_jitter);
  298. pr_debug("line time:%llu prefill time ps:%llu\n",
  299. line_time_ns, prefill_time_ns);
  300. pr_debug("static wakeup time:%lld cxo:%u\n", total, cxo_period_ns);
  301. pdc_backoff_time_ns = rsc_backoff_time_ns;
  302. rsc_backoff_time_ns = div_u64(rsc_backoff_time_ns, cxo_period_ns);
  303. rsc->timer_config.rsc_backoff_time_ns = (u32) rsc_backoff_time_ns;
  304. pdc_backoff_time_ns *= pdc_jitter;
  305. pdc_backoff_time_ns = div_u64(pdc_backoff_time_ns, 100);
  306. rsc->timer_config.pdc_backoff_time_ns = (u32) pdc_backoff_time_ns;
  307. rsc_mode_threshold_time_ns =
  308. div_u64(rsc_mode_threshold_time_ns, cxo_period_ns);
  309. rsc->timer_config.rsc_mode_threshold_time_ns
  310. = (u32) rsc_mode_threshold_time_ns;
  311. /* time_slot_0 for mode0 latency */
  312. rsc_time_slot_0_ns = div_u64(rsc_time_slot_0_ns, cxo_period_ns);
  313. rsc->timer_config.rsc_time_slot_0_ns = (u32) rsc_time_slot_0_ns;
  314. /* time_slot_1 for mode1 latency - 1 fps */
  315. rsc_time_slot_1_ns = div_u64(TICKS_IN_NANO_SECOND, cxo_period_ns);
  316. rsc->timer_config.rsc_time_slot_1_ns = (u32) rsc_time_slot_1_ns;
  317. /* mode 2 is infinite */
  318. rsc->timer_config.rsc_time_slot_2_ns = 0xFFFFFFFF;
  319. rsc->timer_config.min_threshold_time_ns = MIN_THRESHOLD_OVERHEAD_TIME;
  320. rsc->timer_config.bwi_threshold_time_ns =
  321. rsc->timer_config.rsc_time_slot_0_ns;
  322. /* timer update should be called with client call */
  323. if (cmd_config && rsc->hw_ops.timer_update) {
  324. ret = rsc->hw_ops.timer_update(rsc);
  325. if (ret)
  326. pr_err("sde rsc: hw timer update failed ret:%d\n", ret);
  327. /* rsc init should be called during rsc probe - one time only */
  328. } else if (rsc->hw_ops.init) {
  329. ret = rsc->hw_ops.init(rsc);
  330. if (ret)
  331. pr_err("sde rsc: hw init failed ret:%d\n", ret);
  332. }
  333. return ret;
  334. }
  335. static int sde_rsc_resource_disable(struct sde_rsc_priv *rsc)
  336. {
  337. struct sde_power_handle *phandle;
  338. struct dss_module_power *mp;
  339. if (!rsc) {
  340. pr_err("invalid drv data\n");
  341. return -EINVAL;
  342. }
  343. if (atomic_read(&rsc->resource_refcount) == 0) {
  344. pr_err("%pS: invalid rsc resource disable call\n",
  345. __builtin_return_address(0));
  346. return -EINVAL;
  347. }
  348. if (atomic_dec_return(&rsc->resource_refcount) != 0)
  349. return 0;
  350. phandle = &rsc->phandle;
  351. mp = &phandle->mp;
  352. msm_dss_enable_clk(mp->clk_config, mp->num_clk, false);
  353. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, false);
  354. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, false);
  355. return 0;
  356. }
  357. static int sde_rsc_resource_enable(struct sde_rsc_priv *rsc)
  358. {
  359. struct sde_power_handle *phandle;
  360. struct dss_module_power *mp;
  361. int rc = 0;
  362. if (!rsc) {
  363. pr_err("invalid drv data\n");
  364. return -EINVAL;
  365. }
  366. if (atomic_inc_return(&rsc->resource_refcount) != 1)
  367. return 0;
  368. phandle = &rsc->phandle;
  369. mp = &phandle->mp;
  370. rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, true);
  371. if (rc) {
  372. pr_err("failed to enable vregs rc=%d\n", rc);
  373. goto end;
  374. }
  375. rc = sde_power_scale_reg_bus(phandle, VOTE_INDEX_LOW, false);
  376. if (rc) {
  377. pr_err("failed to set reg bus vote rc=%d\n", rc);
  378. goto reg_bus_hdl_err;
  379. }
  380. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, true);
  381. if (rc) {
  382. pr_err("clock enable failed rc:%d\n", rc);
  383. goto clk_err;
  384. }
  385. return rc;
  386. clk_err:
  387. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, false);
  388. reg_bus_hdl_err:
  389. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, false);
  390. end:
  391. atomic_dec(&rsc->resource_refcount);
  392. return rc;
  393. }
  394. static int sde_rsc_switch_to_cmd(struct sde_rsc_priv *rsc,
  395. struct sde_rsc_cmd_config *config,
  396. struct sde_rsc_client *caller_client,
  397. int *wait_vblank_crtc_id)
  398. {
  399. struct sde_rsc_client *client;
  400. int rc = STATE_UPDATE_NOT_ALLOWED;
  401. if (!rsc->primary_client) {
  402. pr_err("primary client not available for cmd state switch\n");
  403. rc = -EINVAL;
  404. goto end;
  405. } else if (caller_client != rsc->primary_client) {
  406. pr_err("primary client state:%d not cmd state request\n",
  407. rsc->primary_client->current_state);
  408. rc = -EINVAL;
  409. goto end;
  410. }
  411. /* update timers - might not be available at next switch */
  412. if (config)
  413. sde_rsc_timer_calculate(rsc, config, SDE_RSC_CMD_STATE);
  414. /**
  415. * rsc clients can still send config at any time. If a config is
  416. * received during cmd_state then vsync_wait will execute with the logic
  417. * below. If a config is received when rsc is in AMC mode; A mode
  418. * switch will do the vsync wait. updated checks still support all cases
  419. * for dynamic mode switch and inline rotation.
  420. */
  421. if (rsc->current_state == SDE_RSC_CMD_STATE) {
  422. rc = 0;
  423. if (config && rsc->version < SDE_RSC_REV_3)
  424. goto vsync_wait;
  425. else
  426. goto end;
  427. }
  428. /* any non-primary clk state client blocks the cmd state switch */
  429. list_for_each_entry(client, &rsc->client_list, list)
  430. if (client->current_state == SDE_RSC_CLK_STATE &&
  431. client->client_type == SDE_RSC_EXTERNAL_DISP_CLIENT)
  432. goto end;
  433. if (rsc->hw_ops.state_update) {
  434. rc = rsc->hw_ops.state_update(rsc, SDE_RSC_CMD_STATE);
  435. if (!rc)
  436. rpmh_mode_solver_set(rsc->rpmh_dev, true);
  437. }
  438. /* vsync wait not needed during VID->CMD switch (rev 4+ HW only) */
  439. if (rsc->current_state == SDE_RSC_VID_STATE &&
  440. rsc->version >= SDE_RSC_REV_4) {
  441. rc = 0;
  442. goto end;
  443. }
  444. vsync_wait:
  445. /* indicate wait for vsync for vid to cmd state switch & cfg update */
  446. if (!rc && (rsc->current_state == SDE_RSC_VID_STATE ||
  447. rsc->current_state == SDE_RSC_CMD_STATE)) {
  448. rsc->post_poms = true;
  449. /* clear VSYNC timestamp for indication when update completes */
  450. if (rsc->hw_ops.hw_vsync)
  451. rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL, 0, 0);
  452. if (!wait_vblank_crtc_id) {
  453. pr_err("invalid crtc id wait pointer, client %d\n",
  454. caller_client->id);
  455. SDE_EVT32(caller_client->id, rsc->current_state,
  456. caller_client->crtc_id,
  457. wait_vblank_crtc_id, SDE_EVTLOG_ERROR);
  458. msleep(RSC_VSYNC_TIMEOUT_MS(rsc));
  459. } else {
  460. *wait_vblank_crtc_id = rsc->primary_client->crtc_id;
  461. }
  462. }
  463. end:
  464. return rc;
  465. }
  466. static int sde_rsc_switch_to_clk(struct sde_rsc_priv *rsc,
  467. int *wait_vblank_crtc_id)
  468. {
  469. struct sde_rsc_client *client;
  470. int rc = STATE_UPDATE_NOT_ALLOWED;
  471. bool multi_display_active = false;
  472. bool vid_display_active = false, cmd_display_active = false;
  473. list_for_each_entry(client, &rsc->client_list, list) {
  474. if (client->current_state == SDE_RSC_CLK_STATE &&
  475. client->client_type == SDE_RSC_EXTERNAL_DISP_CLIENT)
  476. multi_display_active = true;
  477. else if (client->current_state == SDE_RSC_VID_STATE)
  478. vid_display_active = true;
  479. else if (client->current_state == SDE_RSC_CMD_STATE)
  480. cmd_display_active = true;
  481. }
  482. pr_debug("multi_display:%d vid_display:%d cmd_display:%d\n",
  483. multi_display_active, vid_display_active, cmd_display_active);
  484. if (!multi_display_active && (vid_display_active || cmd_display_active))
  485. goto end;
  486. if (rsc->hw_ops.state_update) {
  487. rc = rsc->hw_ops.state_update(rsc, SDE_RSC_CLK_STATE);
  488. if (!rc)
  489. rpmh_mode_solver_set(rsc->rpmh_dev, false);
  490. }
  491. /* indicate wait for vsync for cmd/vid to clk state switch */
  492. if (!rc && rsc->primary_client &&
  493. (rsc->current_state == SDE_RSC_CMD_STATE ||
  494. rsc->current_state == SDE_RSC_VID_STATE)) {
  495. /* clear VSYNC timestamp for indication when update completes */
  496. if (rsc->hw_ops.hw_vsync)
  497. rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL, 0, 0);
  498. if (!wait_vblank_crtc_id) {
  499. pr_err("invalid crtc id wait pointer provided\n");
  500. msleep(RSC_VSYNC_TIMEOUT_MS(rsc));
  501. } else {
  502. *wait_vblank_crtc_id = rsc->primary_client->crtc_id;
  503. /* increase refcount, so we wait for the next vsync */
  504. atomic_inc(&rsc->rsc_vsync_wait);
  505. SDE_EVT32(atomic_read(&rsc->rsc_vsync_wait));
  506. }
  507. } else if (atomic_read(&rsc->rsc_vsync_wait)) {
  508. SDE_EVT32(rsc->primary_client, rsc->current_state,
  509. atomic_read(&rsc->rsc_vsync_wait));
  510. /* Wait for the vsync, if the refcount is set */
  511. rc = wait_event_timeout(rsc->rsc_vsync_waitq,
  512. atomic_read(&rsc->rsc_vsync_wait) == 0,
  513. msecs_to_jiffies(RSC_VSYNC_TIMEOUT_MS(rsc) * 2));
  514. if (!rc) {
  515. pr_err("Timeout waiting for vsync\n");
  516. rc = -ETIMEDOUT;
  517. SDE_EVT32(atomic_read(&rsc->rsc_vsync_wait), rc,
  518. SDE_EVTLOG_ERROR);
  519. } else {
  520. SDE_EVT32(atomic_read(&rsc->rsc_vsync_wait), rc);
  521. rc = 0;
  522. }
  523. }
  524. end:
  525. return rc;
  526. }
  527. static int sde_rsc_switch_to_vid(struct sde_rsc_priv *rsc,
  528. struct sde_rsc_cmd_config *config,
  529. struct sde_rsc_client *caller_client,
  530. int *wait_vblank_crtc_id)
  531. {
  532. struct sde_rsc_client *client;
  533. int rc = STATE_UPDATE_NOT_ALLOWED;
  534. if (!rsc->primary_client) {
  535. pr_err("primary client not available for vid state switch\n");
  536. rc = -EINVAL;
  537. goto end;
  538. } else if (caller_client != rsc->primary_client) {
  539. pr_err("primary client state:%d not vid state request\n",
  540. rsc->primary_client->current_state);
  541. rc = -EINVAL;
  542. goto end;
  543. }
  544. /* update timers - might not be available at next switch */
  545. if (config)
  546. sde_rsc_timer_calculate(rsc, config, SDE_RSC_VID_STATE);
  547. /**
  548. * rsc clients can still send config at any time. If a config is
  549. * received during vid_state then vsync_wait will execute with the logic
  550. * below.
  551. */
  552. if (rsc->current_state == SDE_RSC_VID_STATE) {
  553. rc = 0;
  554. if (config && rsc->version < SDE_RSC_REV_3)
  555. goto vsync_wait;
  556. else
  557. goto end;
  558. }
  559. /* any non-primary clk state client blocks the vid state switch */
  560. list_for_each_entry(client, &rsc->client_list, list)
  561. if (client->current_state == SDE_RSC_CLK_STATE &&
  562. client->client_type == SDE_RSC_EXTERNAL_DISP_CLIENT)
  563. goto end;
  564. if (rsc->hw_ops.state_update) {
  565. rc = rsc->hw_ops.state_update(rsc, SDE_RSC_VID_STATE);
  566. if (!rc)
  567. rpmh_mode_solver_set(rsc->rpmh_dev,
  568. rsc->version >= SDE_RSC_REV_3);
  569. }
  570. /* vsync wait not needed during CMD->VID switch (rev 4+ HW only) */
  571. if (rsc->current_state == SDE_RSC_CMD_STATE &&
  572. rsc->version >= SDE_RSC_REV_4) {
  573. rc = 0;
  574. goto end;
  575. }
  576. vsync_wait:
  577. /* indicate wait for vsync for vid to cmd state switch & cfg update */
  578. if (!rc && (rsc->current_state == SDE_RSC_VID_STATE ||
  579. rsc->current_state == SDE_RSC_CMD_STATE)) {
  580. rsc->post_poms = true;
  581. /* clear VSYNC timestamp for indication when update completes */
  582. if (rsc->hw_ops.hw_vsync)
  583. rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL, 0, 0);
  584. if (!wait_vblank_crtc_id) {
  585. pr_err("invalid crtc id wait pointer, client %d\n",
  586. caller_client->id);
  587. SDE_EVT32(caller_client->id, rsc->current_state,
  588. caller_client->crtc_id,
  589. wait_vblank_crtc_id, SDE_EVTLOG_ERROR);
  590. msleep(RSC_VSYNC_TIMEOUT_MS(rsc));
  591. } else {
  592. *wait_vblank_crtc_id = rsc->primary_client->crtc_id;
  593. }
  594. }
  595. end:
  596. return rc;
  597. }
  598. static int sde_rsc_switch_to_idle(struct sde_rsc_priv *rsc,
  599. struct sde_rsc_cmd_config *config,
  600. struct sde_rsc_client *caller_client,
  601. int *wait_vblank_crtc_id)
  602. {
  603. struct sde_rsc_client *client;
  604. int rc = STATE_UPDATE_NOT_ALLOWED;
  605. bool clk_client_active = false, multi_display_active = false;
  606. bool vid_display_active = false, cmd_display_active = false;
  607. /*
  608. * following code needs to run the loop through each
  609. * client because they might be in different order
  610. * sorting is not possible; only preference is available
  611. */
  612. list_for_each_entry(client, &rsc->client_list, list) {
  613. if (client->current_state == SDE_RSC_CLK_STATE &&
  614. client->client_type == SDE_RSC_EXTERNAL_DISP_CLIENT)
  615. multi_display_active = true;
  616. else if (client->current_state == SDE_RSC_CLK_STATE &&
  617. client->client_type == SDE_RSC_CLK_CLIENT)
  618. clk_client_active = true;
  619. else if (client->current_state == SDE_RSC_VID_STATE)
  620. vid_display_active = true;
  621. else if (client->current_state == SDE_RSC_CMD_STATE)
  622. cmd_display_active = true;
  623. pr_debug("client state:%d type:%d\n",
  624. client->current_state, client->client_type);
  625. }
  626. pr_debug("multi_display:%d clk_client:%d vid_display:%d cmd_display:%d\n",
  627. multi_display_active, clk_client_active, vid_display_active,
  628. cmd_display_active);
  629. if (vid_display_active && !multi_display_active) {
  630. rc = sde_rsc_switch_to_vid(rsc, NULL, rsc->primary_client,
  631. wait_vblank_crtc_id);
  632. if (!rc)
  633. rc = VID_MODE_SWITCH_SUCCESS;
  634. } else if (cmd_display_active && !multi_display_active) {
  635. rc = sde_rsc_switch_to_cmd(rsc, NULL, rsc->primary_client,
  636. wait_vblank_crtc_id);
  637. if (!rc)
  638. rc = CMD_MODE_SWITCH_SUCCESS;
  639. } else if (clk_client_active) {
  640. rc = sde_rsc_switch_to_clk(rsc, wait_vblank_crtc_id);
  641. if (!rc)
  642. rc = CLK_MODE_SWITCH_SUCCESS;
  643. } else if (rsc->hw_ops.state_update) {
  644. rc = rsc->hw_ops.state_update(rsc, SDE_RSC_IDLE_STATE);
  645. rsc->post_poms = false;
  646. if (!rc)
  647. rpmh_mode_solver_set(rsc->rpmh_dev, true);
  648. }
  649. return rc;
  650. }
  651. /**
  652. * sde_rsc_client_get_vsync_refcount() - returns the status of the vsync
  653. * refcount, to signal if the client needs to reset the refcounting logic
  654. * @client: Client pointer provided by sde_rsc_client_create().
  655. *
  656. * Return: value of the vsync refcount.
  657. */
  658. int sde_rsc_client_get_vsync_refcount(
  659. struct sde_rsc_client *caller_client)
  660. {
  661. struct sde_rsc_priv *rsc;
  662. if (!caller_client) {
  663. pr_err("invalid client for rsc state update\n");
  664. return -EINVAL;
  665. } else if (caller_client->rsc_index >= MAX_RSC_COUNT) {
  666. pr_err("invalid rsc index\n");
  667. return -EINVAL;
  668. }
  669. rsc = rsc_prv_list[caller_client->rsc_index];
  670. if (!rsc)
  671. return 0;
  672. return atomic_read(&rsc->rsc_vsync_wait);
  673. }
  674. /**
  675. * sde_rsc_client_reset_vsync_refcount() - reduces the refcounting
  676. * logic that waits for the vsync.
  677. * @client: Client pointer provided by sde_rsc_client_create().
  678. *
  679. * Return: zero if refcount was already zero.
  680. */
  681. int sde_rsc_client_reset_vsync_refcount(
  682. struct sde_rsc_client *caller_client)
  683. {
  684. struct sde_rsc_priv *rsc;
  685. int ret;
  686. if (!caller_client) {
  687. pr_err("invalid client for rsc state update\n");
  688. return -EINVAL;
  689. } else if (caller_client->rsc_index >= MAX_RSC_COUNT) {
  690. pr_err("invalid rsc index\n");
  691. return -EINVAL;
  692. }
  693. rsc = rsc_prv_list[caller_client->rsc_index];
  694. if (!rsc)
  695. return 0;
  696. ret = atomic_add_unless(&rsc->rsc_vsync_wait, -1, 0);
  697. wake_up_all(&rsc->rsc_vsync_waitq);
  698. SDE_EVT32(atomic_read(&rsc->rsc_vsync_wait));
  699. return ret;
  700. }
  701. /**
  702. * sde_rsc_client_is_state_update_complete() - check if state update is complete
  703. * RSC state transition is not complete until HW receives VBLANK signal. This
  704. * function checks RSC HW to determine whether that signal has been received.
  705. * @client: Client pointer provided by sde_rsc_client_create().
  706. *
  707. * Return: true if the state update has completed.
  708. */
  709. bool sde_rsc_client_is_state_update_complete(
  710. struct sde_rsc_client *caller_client)
  711. {
  712. struct sde_rsc_priv *rsc;
  713. u32 vsync_timestamp0 = 0;
  714. if (!caller_client) {
  715. pr_err("invalid client for rsc state update\n");
  716. return false;
  717. } else if (caller_client->rsc_index >= MAX_RSC_COUNT) {
  718. pr_err("invalid rsc index\n");
  719. return false;
  720. }
  721. rsc = rsc_prv_list[caller_client->rsc_index];
  722. if (!rsc)
  723. return false;
  724. /**
  725. * state updates clear VSYNC timestamp, check if a new one arrived.
  726. * use VSYNC mode 0 (CMD TE) always for this, per HW recommendation.
  727. */
  728. if (rsc->hw_ops.hw_vsync)
  729. vsync_timestamp0 = rsc->hw_ops.hw_vsync(rsc, VSYNC_READ_VSYNC0,
  730. NULL, 0, 0);
  731. return vsync_timestamp0 != 0;
  732. }
  733. /**
  734. * sde_rsc_client_state_update() - rsc client state update
  735. * Video mode, cmd mode and clk state are suppoed as modes. A client need to
  736. * set this property during panel config time. A switching client can set the
  737. * property to change the state
  738. *
  739. * @client: Client pointer provided by sde_rsc_client_create().
  740. * @state: Client state - video/cmd
  741. * @config: fps, vtotal, porches, etc configuration for command mode
  742. * panel
  743. * @crtc_id: current client's crtc id
  744. * @wait_vblank_crtc_id: Output parameter. If set to non-zero, rsc hw
  745. * state update requires a wait for one vblank on
  746. * the primary crtc. In that case, this output
  747. * param will be set to the crtc on which to wait.
  748. * If SDE_RSC_INVALID_CRTC_ID, no wait necessary
  749. *
  750. * Return: error code.
  751. */
  752. int sde_rsc_client_state_update(struct sde_rsc_client *caller_client,
  753. enum sde_rsc_state state,
  754. struct sde_rsc_cmd_config *config, int crtc_id,
  755. int *wait_vblank_crtc_id)
  756. {
  757. int rc = 0;
  758. struct sde_rsc_priv *rsc;
  759. if (!caller_client) {
  760. pr_err("invalid client for rsc state update\n");
  761. return -EINVAL;
  762. } else if (caller_client->rsc_index >= MAX_RSC_COUNT) {
  763. pr_err("invalid rsc index\n");
  764. return -EINVAL;
  765. }
  766. rsc = rsc_prv_list[caller_client->rsc_index];
  767. if (!rsc)
  768. return -EINVAL;
  769. if (wait_vblank_crtc_id)
  770. *wait_vblank_crtc_id = SDE_RSC_INVALID_CRTC_ID;
  771. mutex_lock(&rsc->client_lock);
  772. SDE_EVT32_VERBOSE(caller_client->id, caller_client->current_state,
  773. state, rsc->current_state, SDE_EVTLOG_FUNC_ENTRY);
  774. pr_debug("%pS: rsc state:%d request client:%s state:%d\n",
  775. __builtin_return_address(0), rsc->current_state,
  776. caller_client->name, state);
  777. if ((state == SDE_RSC_VID_STATE) && (rsc->version >= SDE_RSC_REV_3))
  778. state = SDE_RSC_CLK_STATE;
  779. /**
  780. * This can only happen if splash is active or qsync is enabled.
  781. * In both cases timers need to be updated for when a transition to
  782. * solver occurs. Update timers now as config might not be available
  783. * at next switch. Updates for cmd/vid are handled when switching to
  784. * those states.
  785. */
  786. if (config && (state == SDE_RSC_CLK_STATE) &&
  787. (caller_client == rsc->primary_client))
  788. sde_rsc_timer_calculate(rsc, config, state);
  789. caller_client->crtc_id = crtc_id;
  790. caller_client->current_state = state;
  791. if ((rsc->current_state == state) && !config) {
  792. SDE_EVT32(caller_client->id, caller_client->current_state,
  793. state, rsc->current_state, SDE_EVTLOG_FUNC_CASE3);
  794. goto end;
  795. }
  796. if (rsc->current_state == SDE_RSC_IDLE_STATE)
  797. sde_rsc_resource_enable(rsc);
  798. switch (state) {
  799. case SDE_RSC_IDLE_STATE:
  800. rc = sde_rsc_switch_to_idle(rsc, NULL, rsc->primary_client,
  801. wait_vblank_crtc_id);
  802. if (rc == CMD_MODE_SWITCH_SUCCESS) {
  803. state = SDE_RSC_CMD_STATE;
  804. rc = 0;
  805. } else if (rc == VID_MODE_SWITCH_SUCCESS) {
  806. state = SDE_RSC_VID_STATE;
  807. rc = 0;
  808. } else if (rc == CLK_MODE_SWITCH_SUCCESS) {
  809. state = SDE_RSC_CLK_STATE;
  810. rc = 0;
  811. }
  812. break;
  813. case SDE_RSC_CMD_STATE:
  814. rc = sde_rsc_switch_to_cmd(rsc, config, caller_client,
  815. wait_vblank_crtc_id);
  816. break;
  817. case SDE_RSC_VID_STATE:
  818. rc = sde_rsc_switch_to_vid(rsc, config, caller_client,
  819. wait_vblank_crtc_id);
  820. break;
  821. case SDE_RSC_CLK_STATE:
  822. rc = sde_rsc_switch_to_clk(rsc, wait_vblank_crtc_id);
  823. break;
  824. default:
  825. pr_err("invalid state handling %d\n", state);
  826. break;
  827. }
  828. if (rc == STATE_UPDATE_NOT_ALLOWED) {
  829. rc = 0;
  830. SDE_EVT32(caller_client->id, caller_client->current_state,
  831. state, rsc->current_state, rc, SDE_EVTLOG_FUNC_CASE1);
  832. goto clk_disable;
  833. } else if (rc) {
  834. pr_debug("state:%d update failed rc:%d\n", state, rc);
  835. SDE_EVT32(caller_client->id, caller_client->current_state,
  836. state, rsc->current_state, rc, SDE_EVTLOG_FUNC_CASE2);
  837. goto clk_disable;
  838. }
  839. pr_debug("state switch successfully complete: %d\n", state);
  840. SDE_ATRACE_INT("rsc_state", state);
  841. SDE_EVT32(caller_client->id, caller_client->current_state,
  842. state, rsc->current_state, SDE_EVTLOG_FUNC_EXIT);
  843. rsc->current_state = state;
  844. rsc->update_tcs_content = true;
  845. clk_disable:
  846. if (rsc->current_state == SDE_RSC_IDLE_STATE)
  847. sde_rsc_resource_disable(rsc);
  848. end:
  849. mutex_unlock(&rsc->client_lock);
  850. return rc;
  851. }
  852. EXPORT_SYMBOL(sde_rsc_client_state_update);
  853. /**
  854. * sde_rsc_client_vote() - ab/ib vote from rsc client
  855. *
  856. * @client: Client pointer provided by sde_rsc_client_create().
  857. * @bus_id: data bus for which to be voted
  858. * @ab: aggregated bandwidth vote from client.
  859. * @ib: instant bandwidth vote from client.
  860. *
  861. * Return: error code.
  862. */
  863. int sde_rsc_client_vote(struct sde_rsc_client *caller_client,
  864. u32 bus_id, u64 ab_vote, u64 ib_vote)
  865. {
  866. int rsc_index;
  867. struct sde_rsc_priv *rsc;
  868. if (caller_client && caller_client->rsc_index >= MAX_RSC_COUNT) {
  869. pr_err("invalid rsc client or client index\n");
  870. return -EINVAL;
  871. }
  872. rsc_index = caller_client ? caller_client->rsc_index : SDE_RSC_INDEX;
  873. rsc = rsc_prv_list[rsc_index];
  874. if (!rsc || bus_id >= SDE_POWER_HANDLE_DBUS_ID_MAX)
  875. return -EINVAL;
  876. pr_debug("client:%s ab:%llu ib:%llu\n",
  877. caller_client ? caller_client->name : "unknown",
  878. ab_vote, ib_vote);
  879. mutex_lock(&rsc->client_lock);
  880. rsc->bw_config.new_ab_vote[bus_id] = ab_vote;
  881. rsc->bw_config.new_ib_vote[bus_id] = ib_vote;
  882. mutex_unlock(&rsc->client_lock);
  883. return 0;
  884. }
  885. EXPORT_SYMBOL(sde_rsc_client_vote);
  886. int sde_rsc_client_trigger_vote(struct sde_rsc_client *caller_client,
  887. bool delta_vote)
  888. {
  889. int rc = 0, rsc_index, i;
  890. struct sde_rsc_priv *rsc;
  891. if (caller_client && caller_client->rsc_index >= MAX_RSC_COUNT) {
  892. pr_err("invalid rsc index\n");
  893. return -EINVAL;
  894. }
  895. rsc_index = caller_client ? caller_client->rsc_index : SDE_RSC_INDEX;
  896. rsc = rsc_prv_list[rsc_index];
  897. if (!rsc)
  898. return -EINVAL;
  899. if (rsc->bwi_update == BW_NO_CHANGE && !delta_vote && rsc->version >= SDE_RSC_REV_5)
  900. return 0;
  901. pr_debug("client:%s trigger bw delta vote:%d\n",
  902. caller_client ? caller_client->name : "unknown", delta_vote);
  903. mutex_lock(&rsc->client_lock);
  904. if (!delta_vote && !rsc->update_tcs_content &&
  905. (rsc->current_state == SDE_RSC_CLK_STATE))
  906. goto end;
  907. rsc->bwi_update = BW_HIGH_TO_LOW;
  908. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX && delta_vote; i++) {
  909. if (rsc->bw_config.new_ab_vote[i] > rsc->bw_config.ab_vote[i] ||
  910. rsc->bw_config.new_ib_vote[i] > rsc->bw_config.ib_vote[i])
  911. rsc->bwi_update = BW_LOW_TO_HIGH;
  912. rsc->bw_config.ab_vote[i] = rsc->bw_config.new_ab_vote[i];
  913. rsc->bw_config.ib_vote[i] = rsc->bw_config.new_ib_vote[i];
  914. }
  915. rc = sde_rsc_resource_enable(rsc);
  916. if (rc < 0)
  917. goto end;
  918. if (delta_vote) {
  919. if (rsc->hw_ops.tcs_wait) {
  920. rc = rsc->hw_ops.tcs_wait(rsc);
  921. if (rc) {
  922. pr_err("tcs is still busy; can't send command\n");
  923. if (rsc->hw_ops.tcs_use_ok)
  924. rsc->hw_ops.tcs_use_ok(rsc);
  925. goto tcs_wait_failed;
  926. }
  927. }
  928. rpmh_invalidate(rsc->rpmh_dev);
  929. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  930. sde_power_data_bus_set_quota(&rsc->phandle,
  931. i, rsc->bw_config.ab_vote[i],
  932. rsc->bw_config.ib_vote[i]);
  933. rpmh_write_sleep_and_wake(rsc->rpmh_dev);
  934. }
  935. if (rsc->version >= SDE_RSC_REV_5 && !delta_vote)
  936. rsc->bwi_update = BW_NO_CHANGE;
  937. if (rsc->hw_ops.bwi_status &&
  938. (rsc->current_state == SDE_RSC_CMD_STATE ||
  939. rsc->current_state == SDE_RSC_VID_STATE))
  940. rsc->hw_ops.bwi_status(rsc);
  941. else if (rsc->hw_ops.tcs_use_ok)
  942. rsc->hw_ops.tcs_use_ok(rsc);
  943. rsc->update_tcs_content = false;
  944. tcs_wait_failed:
  945. sde_rsc_resource_disable(rsc);
  946. end:
  947. mutex_unlock(&rsc->client_lock);
  948. return rc;
  949. }
  950. EXPORT_SYMBOL(sde_rsc_client_trigger_vote);
  951. #if defined(CONFIG_DEBUG_FS)
  952. void sde_rsc_debug_dump(u32 mux_sel)
  953. {
  954. struct sde_rsc_priv *rsc;
  955. rsc = rsc_prv_list[SDE_RSC_INDEX];
  956. if (!rsc)
  957. return;
  958. /* this must be called with rsc clocks enabled */
  959. if (rsc->hw_ops.debug_dump)
  960. rsc->hw_ops.debug_dump(rsc, mux_sel);
  961. }
  962. static int _sde_debugfs_status_show(struct seq_file *s, void *data)
  963. {
  964. struct sde_rsc_priv *rsc;
  965. struct sde_rsc_client *client;
  966. int ret;
  967. if (!s || !s->private)
  968. return -EINVAL;
  969. rsc = s->private;
  970. mutex_lock(&rsc->client_lock);
  971. seq_printf(s, "rsc current state:%d\n", rsc->current_state);
  972. seq_printf(s, "wraper backoff time(ns):%d\n",
  973. rsc->timer_config.static_wakeup_time_ns);
  974. seq_printf(s, "rsc backoff time(ns):%d\n",
  975. rsc->timer_config.rsc_backoff_time_ns);
  976. seq_printf(s, "pdc backoff time(ns):%d\n",
  977. rsc->timer_config.pdc_backoff_time_ns);
  978. seq_printf(s, "rsc mode threshold time(ns):%d\n",
  979. rsc->timer_config.rsc_mode_threshold_time_ns);
  980. seq_printf(s, "rsc time slot 0(ns):%d\n",
  981. rsc->timer_config.rsc_time_slot_0_ns);
  982. seq_printf(s, "rsc time slot 1(ns):%d\n",
  983. rsc->timer_config.rsc_time_slot_1_ns);
  984. seq_printf(s, "frame fps:%d jitter_numer:%d jitter_denom:%d vtotal:%d prefill lines:%d\n",
  985. rsc->cmd_config.fps, rsc->cmd_config.jitter_numer,
  986. rsc->cmd_config.jitter_denom,
  987. rsc->cmd_config.vtotal, rsc->cmd_config.prefill_lines);
  988. seq_puts(s, "\n");
  989. list_for_each_entry(client, &rsc->client_list, list)
  990. seq_printf(s, "\t client:%s state:%d\n",
  991. client->name, client->current_state);
  992. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  993. pr_debug("debug node is not supported during idle state\n");
  994. seq_puts(s, "hw state is not supported during idle pc\n");
  995. goto end;
  996. }
  997. if (rsc->hw_ops.debug_show) {
  998. ret = rsc->hw_ops.debug_show(s, rsc);
  999. if (ret)
  1000. pr_err("sde rsc: hw debug failed ret:%d\n", ret);
  1001. }
  1002. end:
  1003. mutex_unlock(&rsc->client_lock);
  1004. return 0;
  1005. }
  1006. static int _sde_debugfs_status_open(struct inode *inode, struct file *file)
  1007. {
  1008. return single_open(file, _sde_debugfs_status_show, inode->i_private);
  1009. }
  1010. static int _sde_debugfs_counters_show(struct seq_file *s, void *data)
  1011. {
  1012. struct sde_rsc_priv *rsc = s->private;
  1013. u32 counters[NUM_RSC_PROFILING_COUNTERS];
  1014. int i, ret;
  1015. if (!rsc)
  1016. return -EINVAL;
  1017. if (!rsc->hw_ops.get_counters) {
  1018. seq_puts(s, "counters are not supported on this target\n");
  1019. return 0;
  1020. }
  1021. memset(counters, 0, sizeof(counters));
  1022. mutex_lock(&rsc->client_lock);
  1023. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1024. pr_debug("counters are not supported during idle state\n");
  1025. seq_puts(s, "no access to counters during idle pc\n");
  1026. goto end;
  1027. }
  1028. ret = rsc->hw_ops.get_counters(rsc, counters);
  1029. if (ret) {
  1030. pr_err("sde rsc: get_counters failed ret:%d\n", ret);
  1031. seq_puts(s, "failed to retrieve counts!\n");
  1032. goto end;
  1033. }
  1034. seq_puts(s, "rsc profiling counters:\n");
  1035. for (i = 0; i < NUM_RSC_PROFILING_COUNTERS; ++i)
  1036. seq_printf(s, "\tmode[%d] = 0x%08x:\n", i, counters[i]);
  1037. end:
  1038. mutex_unlock(&rsc->client_lock);
  1039. return 0;
  1040. }
  1041. static int _sde_debugfs_counters_open(struct inode *inode, struct file *file)
  1042. {
  1043. return single_open(file, _sde_debugfs_counters_show, inode->i_private);
  1044. }
  1045. static int _sde_debugfs_generic_noseek_open(struct inode *inode,
  1046. struct file *file)
  1047. {
  1048. /* non-seekable */
  1049. file->private_data = inode->i_private;
  1050. return nonseekable_open(inode, file);
  1051. }
  1052. static ssize_t _sde_debugfs_profiling_read(struct file *file, char __user *buf,
  1053. size_t count, loff_t *ppos)
  1054. {
  1055. struct sde_rsc_priv *rsc = file->private_data;
  1056. size_t max_size = min_t(size_t, count, MAX_BUFFER_SIZE);
  1057. char buffer[MAX_BUFFER_SIZE];
  1058. int blen = 0;
  1059. if (*ppos || !rsc)
  1060. return 0;
  1061. if (!rsc->hw_ops.setup_counters) {
  1062. blen += scnprintf(&buffer[blen], max_size - blen,
  1063. "counters are not supported on this target\n");
  1064. goto end;
  1065. }
  1066. mutex_lock(&rsc->client_lock);
  1067. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1068. pr_debug("counters are not supported during idle state\n");
  1069. blen += scnprintf(&buffer[blen], max_size - blen,
  1070. "no access to counters during idle pc\n");
  1071. goto unlock;
  1072. }
  1073. blen += scnprintf(&buffer[blen], max_size - blen,
  1074. "%s\n", rsc->profiling_en ? "Y" : "N");
  1075. unlock:
  1076. mutex_unlock(&rsc->client_lock);
  1077. end:
  1078. if (copy_to_user(buf, buffer, blen))
  1079. return -EFAULT;
  1080. *ppos += blen;
  1081. return blen;
  1082. }
  1083. static ssize_t _sde_debugfs_profiling_write(struct file *file,
  1084. const char __user *p, size_t count, loff_t *ppos)
  1085. {
  1086. struct sde_rsc_priv *rsc = file->private_data;
  1087. bool input_valid, input_value;
  1088. char *input;
  1089. int rc;
  1090. if (!rsc || !rsc->hw_ops.setup_counters || !count ||
  1091. count > MAX_COUNT_SIZE_SUPPORTED)
  1092. return 0;
  1093. input = kmalloc(count + 1, GFP_KERNEL);
  1094. if (!input)
  1095. return -ENOMEM;
  1096. if (copy_from_user(input, p, count)) {
  1097. kfree(input);
  1098. return -EFAULT;
  1099. }
  1100. input[count] = '\0';
  1101. switch (input[0]) {
  1102. case 'y':
  1103. case 'Y':
  1104. case '1':
  1105. input_valid = true;
  1106. input_value = true;
  1107. break;
  1108. case 'n':
  1109. case 'N':
  1110. case '0':
  1111. input_valid = true;
  1112. input_value = false;
  1113. break;
  1114. default:
  1115. input_valid = false;
  1116. count = 0;
  1117. break;
  1118. }
  1119. mutex_lock(&rsc->client_lock);
  1120. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1121. pr_debug("debug node is not supported during idle state\n");
  1122. count = 0;
  1123. goto end;
  1124. }
  1125. pr_debug("input %s, profiling_en: %d\n",
  1126. input_valid ? "valid" : "invalid", rsc->profiling_en);
  1127. if (input_valid) {
  1128. rsc->profiling_en = input_value;
  1129. rc = rsc->hw_ops.setup_counters(rsc, rsc->profiling_en);
  1130. if (rc)
  1131. pr_err("setup_counters failed, rc:%d\n", rc);
  1132. }
  1133. end:
  1134. mutex_unlock(&rsc->client_lock);
  1135. kfree(input);
  1136. return count;
  1137. }
  1138. static ssize_t _sde_debugfs_mode_ctrl_read(struct file *file, char __user *buf,
  1139. size_t count, loff_t *ppos)
  1140. {
  1141. struct sde_rsc_priv *rsc = file->private_data;
  1142. char buffer[MAX_BUFFER_SIZE];
  1143. int blen = 0;
  1144. size_t max_size = min_t(size_t, count, MAX_BUFFER_SIZE);
  1145. if (*ppos || !rsc || !rsc->hw_ops.mode_ctrl)
  1146. return 0;
  1147. mutex_lock(&rsc->client_lock);
  1148. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1149. pr_debug("debug node is not supported during idle state\n");
  1150. blen = scnprintf(buffer, max_size,
  1151. "hw state is not supported during idle pc\n");
  1152. goto end;
  1153. }
  1154. blen = rsc->hw_ops.mode_ctrl(rsc, MODE_READ, buffer, max_size, 0);
  1155. end:
  1156. mutex_unlock(&rsc->client_lock);
  1157. if (blen <= 0)
  1158. return 0;
  1159. if (blen > count) {
  1160. blen = count;
  1161. buffer[count - 1] = '\0';
  1162. }
  1163. if (copy_to_user(buf, buffer, blen))
  1164. return -EFAULT;
  1165. *ppos += blen;
  1166. return blen;
  1167. }
  1168. static ssize_t _sde_debugfs_mode_ctrl_write(struct file *file,
  1169. const char __user *p, size_t count, loff_t *ppos)
  1170. {
  1171. struct sde_rsc_priv *rsc = file->private_data;
  1172. char *input;
  1173. u32 mode_state = 0;
  1174. int rc;
  1175. if (!rsc || !rsc->hw_ops.mode_ctrl || !count ||
  1176. count > MAX_COUNT_SIZE_SUPPORTED)
  1177. return 0;
  1178. input = kmalloc(count + 1, GFP_KERNEL);
  1179. if (!input)
  1180. return -ENOMEM;
  1181. if (copy_from_user(input, p, count)) {
  1182. kfree(input);
  1183. return -EFAULT;
  1184. }
  1185. input[count] = '\0';
  1186. rc = kstrtoint(input, 0, &mode_state);
  1187. if (rc) {
  1188. pr_err("mode_state: int conversion failed rc:%d\n", rc);
  1189. goto end;
  1190. }
  1191. pr_debug("mode_state: %d\n", mode_state);
  1192. mode_state &= 0x7;
  1193. if (mode_state != ALL_MODES_DISABLED &&
  1194. mode_state != ALL_MODES_ENABLED &&
  1195. mode_state != ONLY_MODE_0_ENABLED &&
  1196. mode_state != ONLY_MODE_0_1_ENABLED) {
  1197. pr_err("invalid mode:%d combination\n", mode_state);
  1198. goto end;
  1199. }
  1200. mutex_lock(&rsc->client_lock);
  1201. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1202. pr_debug("debug node is not supported during idle state\n");
  1203. goto state_check;
  1204. }
  1205. rsc->hw_ops.mode_ctrl(rsc, MODE_UPDATE, NULL, 0, mode_state);
  1206. state_check:
  1207. mutex_unlock(&rsc->client_lock);
  1208. end:
  1209. kfree(input);
  1210. return count;
  1211. }
  1212. static ssize_t _sde_debugfs_vsync_mode_read(struct file *file, char __user *buf,
  1213. size_t count, loff_t *ppos)
  1214. {
  1215. struct sde_rsc_priv *rsc = file->private_data;
  1216. char buffer[MAX_BUFFER_SIZE];
  1217. int blen = 0;
  1218. size_t max_size = min_t(size_t, count, MAX_BUFFER_SIZE);
  1219. if (*ppos || !rsc || !rsc->hw_ops.hw_vsync)
  1220. return 0;
  1221. mutex_lock(&rsc->client_lock);
  1222. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1223. pr_debug("debug node is not supported during idle state\n");
  1224. blen = scnprintf(buffer, max_size,
  1225. "hw state is not supported during idle pc\n");
  1226. goto end;
  1227. }
  1228. blen = rsc->hw_ops.hw_vsync(rsc, VSYNC_READ, buffer, max_size, 0);
  1229. end:
  1230. mutex_unlock(&rsc->client_lock);
  1231. if (blen <= 0)
  1232. return 0;
  1233. if (blen > count) {
  1234. blen = count;
  1235. buffer[count - 1] = '\0';
  1236. }
  1237. if (copy_to_user(buf, buffer, blen))
  1238. return -EFAULT;
  1239. *ppos += blen;
  1240. return blen;
  1241. }
  1242. static ssize_t _sde_debugfs_vsync_mode_write(struct file *file,
  1243. const char __user *p, size_t count, loff_t *ppos)
  1244. {
  1245. struct sde_rsc_priv *rsc = file->private_data;
  1246. char *input;
  1247. u32 vsync_state = 0;
  1248. int rc;
  1249. if (!rsc || !rsc->hw_ops.hw_vsync || !count ||
  1250. count > MAX_COUNT_SIZE_SUPPORTED)
  1251. return 0;
  1252. input = kmalloc(count + 1, GFP_KERNEL);
  1253. if (!input)
  1254. return -ENOMEM;
  1255. if (copy_from_user(input, p, count)) {
  1256. kfree(input);
  1257. return -EFAULT;
  1258. }
  1259. input[count] = '\0';
  1260. rc = kstrtoint(input, 0, &vsync_state);
  1261. if (rc) {
  1262. pr_err("vsync_state: int conversion failed rc:%d\n", rc);
  1263. goto end;
  1264. }
  1265. pr_debug("vsync_state: %d\n", vsync_state);
  1266. vsync_state &= 0x7;
  1267. mutex_lock(&rsc->client_lock);
  1268. if (rsc->current_state == SDE_RSC_IDLE_STATE) {
  1269. pr_debug("debug node is not supported during idle state\n");
  1270. goto state_check;
  1271. }
  1272. if (vsync_state)
  1273. rsc->hw_ops.hw_vsync(rsc, VSYNC_ENABLE, NULL,
  1274. 0, vsync_state - 1);
  1275. else
  1276. rsc->hw_ops.hw_vsync(rsc, VSYNC_DISABLE, NULL, 0, 0);
  1277. state_check:
  1278. mutex_unlock(&rsc->client_lock);
  1279. end:
  1280. kfree(input);
  1281. return count;
  1282. }
  1283. static const struct file_operations debugfs_status_fops = {
  1284. .open = _sde_debugfs_status_open,
  1285. .read = seq_read,
  1286. .llseek = seq_lseek,
  1287. .release = single_release,
  1288. };
  1289. static const struct file_operations mode_control_fops = {
  1290. .open = _sde_debugfs_generic_noseek_open,
  1291. .read = _sde_debugfs_mode_ctrl_read,
  1292. .write = _sde_debugfs_mode_ctrl_write,
  1293. };
  1294. static const struct file_operations vsync_status_fops = {
  1295. .open = _sde_debugfs_generic_noseek_open,
  1296. .read = _sde_debugfs_vsync_mode_read,
  1297. .write = _sde_debugfs_vsync_mode_write,
  1298. };
  1299. static const struct file_operations profiling_enable_fops = {
  1300. .open = _sde_debugfs_generic_noseek_open,
  1301. .read = _sde_debugfs_profiling_read,
  1302. .write = _sde_debugfs_profiling_write,
  1303. };
  1304. static const struct file_operations profiling_counts_fops = {
  1305. .open = _sde_debugfs_counters_open,
  1306. .read = seq_read,
  1307. .llseek = seq_lseek,
  1308. .release = single_release,
  1309. };
  1310. static void _sde_rsc_init_debugfs(struct sde_rsc_priv *rsc, char *name)
  1311. {
  1312. rsc->debugfs_root = debugfs_create_dir(name, NULL);
  1313. if (!rsc->debugfs_root)
  1314. return;
  1315. /* don't error check these */
  1316. debugfs_create_file("status", 0400, rsc->debugfs_root, rsc,
  1317. &debugfs_status_fops);
  1318. debugfs_create_file("mode_control", 0600, rsc->debugfs_root, rsc,
  1319. &mode_control_fops);
  1320. debugfs_create_file("vsync_mode", 0600, rsc->debugfs_root, rsc,
  1321. &vsync_status_fops);
  1322. if (rsc->profiling_supp) {
  1323. debugfs_create_file("profiling_en", 0600, rsc->debugfs_root,
  1324. rsc, &profiling_enable_fops);
  1325. debugfs_create_file("profiling_counts", 0400,
  1326. rsc->debugfs_root, rsc,
  1327. &profiling_counts_fops);
  1328. }
  1329. debugfs_create_x32("debug_mode", 0600, rsc->debugfs_root,
  1330. &rsc->debug_mode);
  1331. }
  1332. #else
  1333. static void _sde_rsc_init_debugfs(struct sde_rsc_priv *rsc, char *name)
  1334. {
  1335. }
  1336. #endif /* defined(CONFIG_DEBUG_FS) */
  1337. static void sde_rsc_deinit(struct platform_device *pdev,
  1338. struct sde_rsc_priv *rsc)
  1339. {
  1340. if (!rsc)
  1341. return;
  1342. sde_rsc_resource_disable(rsc);
  1343. if (rsc->sw_fs_enabled)
  1344. regulator_disable(rsc->fs);
  1345. if (rsc->fs)
  1346. devm_regulator_put(rsc->fs);
  1347. if (rsc->wrapper_io.base)
  1348. msm_dss_iounmap(&rsc->wrapper_io);
  1349. if (rsc->drv_io.base)
  1350. msm_dss_iounmap(&rsc->drv_io);
  1351. sde_power_resource_deinit(pdev, &rsc->phandle);
  1352. debugfs_remove_recursive(rsc->debugfs_root);
  1353. kfree(rsc);
  1354. }
  1355. /**
  1356. * sde_rsc_get_io_resources - collect register ranges for the device to
  1357. * perform access control on TUI transition
  1358. * @io_res: io resource list
  1359. * @data: payload data provided during msm_register_vm_event
  1360. * Returns: zero on success
  1361. */
  1362. static int sde_rsc_get_io_resources(struct msm_io_res *io_res, void *data)
  1363. {
  1364. int rc = 0;
  1365. struct sde_rsc_priv *rsc = (struct sde_rsc_priv *)data;
  1366. struct platform_device *pdev = to_platform_device(rsc->dev);
  1367. rc = msm_dss_get_io_mem(pdev, &io_res->mem);
  1368. if (rc) {
  1369. pr_err("failed to get rsc io mem, rc = %d\n", rc);
  1370. return rc;
  1371. }
  1372. return 0;
  1373. }
  1374. /**
  1375. * sde_rsc_bind - bind rsc device with controlling device
  1376. * @dev: Pointer to base of platform device
  1377. * @master: Pointer to container of drm device
  1378. * @data: Pointer to private data
  1379. * Returns: Zero on success
  1380. */
  1381. static int sde_rsc_bind(struct device *dev,
  1382. struct device *master,
  1383. void *data)
  1384. {
  1385. struct sde_rsc_priv *rsc;
  1386. struct drm_device *drm;
  1387. struct platform_device *pdev = to_platform_device(dev);
  1388. struct msm_vm_ops vm_event_ops = {
  1389. .vm_get_io_resources = sde_rsc_get_io_resources,
  1390. };
  1391. if (!dev || !pdev || !master) {
  1392. pr_err("invalid param(s), dev %pK, pdev %pK, master %pK\n",
  1393. dev, pdev, master);
  1394. return -EINVAL;
  1395. }
  1396. drm = dev_get_drvdata(master);
  1397. rsc = platform_get_drvdata(pdev);
  1398. if (!drm || !rsc) {
  1399. pr_err("invalid param(s), drm %pK, rsc %pK\n",
  1400. drm, rsc);
  1401. return -EINVAL;
  1402. }
  1403. sde_dbg_reg_register_base(SDE_RSC_DRV_DBG_NAME, rsc->drv_io.base,
  1404. rsc->drv_io.len, msm_get_phys_addr(pdev, "drv"), SDE_DBG_RSC);
  1405. sde_dbg_reg_register_base(SDE_RSC_WRAPPER_DBG_NAME, rsc->wrapper_io.base,
  1406. rsc->wrapper_io.len, msm_get_phys_addr(pdev, "wrapper"), SDE_DBG_RSC);
  1407. msm_register_vm_event(master, dev, &vm_event_ops, (void *)rsc);
  1408. return 0;
  1409. }
  1410. /**
  1411. * sde_rsc_unbind - unbind rsc from controlling device
  1412. * @dev: Pointer to base of platform device
  1413. * @master: Pointer to container of drm device
  1414. * @data: Pointer to private data
  1415. */
  1416. static void sde_rsc_unbind(struct device *dev,
  1417. struct device *master, void *data)
  1418. {
  1419. struct sde_rsc_priv *rsc;
  1420. struct platform_device *pdev = to_platform_device(dev);
  1421. if (!dev || !pdev) {
  1422. pr_err("invalid param(s)\n");
  1423. return;
  1424. }
  1425. rsc = platform_get_drvdata(pdev);
  1426. if (!rsc) {
  1427. pr_err("invalid display rsc\n");
  1428. return;
  1429. }
  1430. msm_unregister_vm_event(master, dev);
  1431. }
  1432. static const struct component_ops sde_rsc_comp_ops = {
  1433. .bind = sde_rsc_bind,
  1434. .unbind = sde_rsc_unbind,
  1435. };
  1436. static int sde_rsc_probe(struct platform_device *pdev)
  1437. {
  1438. int ret;
  1439. struct sde_rsc_priv *rsc;
  1440. static int counter;
  1441. char name[MAX_RSC_CLIENT_NAME_LEN];
  1442. if (counter >= MAX_RSC_COUNT) {
  1443. pr_err("sde rsc supports probe till MAX_RSC_COUNT=%d devices\n",
  1444. MAX_RSC_COUNT);
  1445. return -EINVAL;
  1446. }
  1447. rsc = kzalloc(sizeof(*rsc), GFP_KERNEL);
  1448. if (!rsc) {
  1449. ret = -ENOMEM;
  1450. goto rsc_alloc_fail;
  1451. }
  1452. platform_set_drvdata(pdev, rsc);
  1453. rsc->dev = &pdev->dev;
  1454. of_property_read_u32(pdev->dev.of_node, "qcom,sde-rsc-version",
  1455. &rsc->version);
  1456. switch (rsc->version) {
  1457. case SDE_RSC_REV_1:
  1458. rsc->single_tcs_execution_time = SINGLE_TCS_EXECUTION_TIME_V1;
  1459. break;
  1460. case SDE_RSC_REV_2:
  1461. rsc->single_tcs_execution_time = SINGLE_TCS_EXECUTION_TIME_V2;
  1462. break;
  1463. case SDE_RSC_REV_3:
  1464. rsc->single_tcs_execution_time = SINGLE_TCS_EXECUTION_TIME_V3;
  1465. break;
  1466. case SDE_RSC_REV_4:
  1467. rsc->single_tcs_execution_time = SINGLE_TCS_EXECUTION_TIME_V4;
  1468. break;
  1469. case SDE_RSC_REV_5:
  1470. default:
  1471. rsc->single_tcs_execution_time = SINGLE_TCS_EXECUTION_TIME_V5;
  1472. break;
  1473. }
  1474. if (rsc->version >= SDE_RSC_REV_3) {
  1475. rsc->time_slot_0_ns = rsc->single_tcs_execution_time
  1476. + RSC_MODE_INSTRUCTION_TIME;
  1477. rsc->backoff_time_ns = RSC_MODE_INSTRUCTION_TIME;
  1478. rsc->mode_threshold_time_ns = rsc->time_slot_0_ns;
  1479. } else {
  1480. rsc->time_slot_0_ns = (rsc->single_tcs_execution_time * 2)
  1481. + RSC_MODE_INSTRUCTION_TIME;
  1482. rsc->backoff_time_ns = rsc->single_tcs_execution_time
  1483. + RSC_MODE_INSTRUCTION_TIME;
  1484. rsc->mode_threshold_time_ns = rsc->backoff_time_ns
  1485. + RSC_MODE_THRESHOLD_OVERHEAD;
  1486. }
  1487. if (rsc->version >= SDE_RSC_REV_4)
  1488. rsc->profiling_supp = true;
  1489. ret = sde_power_resource_init(pdev, &rsc->phandle);
  1490. if (ret) {
  1491. pr_err("sde rsc:power resource init failed ret:%d\n", ret);
  1492. goto sde_rsc_fail;
  1493. }
  1494. rsc->rpmh_dev = rpmh_dev[SDE_RSC_INDEX + counter];
  1495. if (IS_ERR_OR_NULL(rsc->rpmh_dev)) {
  1496. ret = !rsc->rpmh_dev ? -EINVAL : PTR_ERR(rsc->rpmh_dev);
  1497. rsc->rpmh_dev = NULL;
  1498. pr_err("rpmh device node is not available ret:%d\n", ret);
  1499. goto sde_rsc_fail;
  1500. }
  1501. ret = msm_dss_ioremap_byname(pdev, &rsc->wrapper_io, "wrapper");
  1502. if (ret) {
  1503. pr_err("sde rsc: wrapper io data mapping failed ret=%d\n", ret);
  1504. goto sde_rsc_fail;
  1505. }
  1506. ret = msm_dss_ioremap_byname(pdev, &rsc->drv_io, "drv");
  1507. if (ret) {
  1508. pr_err("sde rsc: drv io data mapping failed ret:%d\n", ret);
  1509. goto sde_rsc_fail;
  1510. }
  1511. rsc->fs = devm_regulator_get(&pdev->dev, "vdd");
  1512. if (IS_ERR_OR_NULL(rsc->fs)) {
  1513. rsc->fs = NULL;
  1514. pr_err("unable to get regulator\n");
  1515. goto sde_rsc_fail;
  1516. }
  1517. if (rsc->version >= SDE_RSC_REV_3)
  1518. ret = sde_rsc_hw_register_v3(rsc);
  1519. else
  1520. ret = sde_rsc_hw_register(rsc);
  1521. if (ret) {
  1522. pr_err("sde rsc: hw register failed ret:%d\n", ret);
  1523. goto sde_rsc_fail;
  1524. }
  1525. ret = regulator_enable(rsc->fs);
  1526. if (ret) {
  1527. pr_err("sde rsc: fs on failed ret:%d\n", ret);
  1528. goto sde_rsc_fail;
  1529. }
  1530. rsc->sw_fs_enabled = true;
  1531. ret = sde_rsc_resource_enable(rsc);
  1532. if (ret < 0) {
  1533. pr_err("failed to enable sde rsc power resources rc:%d\n", ret);
  1534. goto sde_rsc_fail;
  1535. }
  1536. if (sde_rsc_timer_calculate(rsc, NULL, SDE_RSC_IDLE_STATE))
  1537. goto sde_rsc_fail;
  1538. sde_rsc_resource_disable(rsc);
  1539. INIT_LIST_HEAD(&rsc->client_list);
  1540. INIT_LIST_HEAD(&rsc->event_list);
  1541. mutex_init(&rsc->client_lock);
  1542. init_waitqueue_head(&rsc->rsc_vsync_waitq);
  1543. atomic_set(&rsc->resource_refcount, 0);
  1544. pr_info("sde rsc index:%d probed successfully\n",
  1545. SDE_RSC_INDEX + counter);
  1546. rsc_prv_list[SDE_RSC_INDEX + counter] = rsc;
  1547. snprintf(name, MAX_RSC_CLIENT_NAME_LEN, "%s%d", "sde_rsc", counter);
  1548. _sde_rsc_init_debugfs(rsc, name);
  1549. counter++;
  1550. ret = component_add(&pdev->dev, &sde_rsc_comp_ops);
  1551. if (ret)
  1552. pr_debug("component add failed, ret=%d\n", ret);
  1553. ret = 0;
  1554. return ret;
  1555. sde_rsc_fail:
  1556. sde_rsc_deinit(pdev, rsc);
  1557. rsc_alloc_fail:
  1558. return ret;
  1559. }
  1560. static int sde_rsc_remove(struct platform_device *pdev)
  1561. {
  1562. struct sde_rsc_priv *rsc = platform_get_drvdata(pdev);
  1563. sde_rsc_deinit(pdev, rsc);
  1564. return 0;
  1565. }
  1566. static int sde_rsc_rpmh_probe(struct platform_device *pdev)
  1567. {
  1568. int ret = 0;
  1569. uint32_t index = 0;
  1570. ret = of_property_read_u32(pdev->dev.of_node, "cell-index", &index);
  1571. if (ret) {
  1572. pr_err("unable to find sde rsc cell index\n");
  1573. return ret;
  1574. } else if (index >= MAX_RSC_COUNT) {
  1575. pr_err("invalid cell index for sde rsc:%d\n", index);
  1576. return -EINVAL;
  1577. }
  1578. rpmh_dev[index] = &pdev->dev;
  1579. return 0;
  1580. }
  1581. int sde_rsc_rpmh_remove(struct platform_device *pdev)
  1582. {
  1583. int i;
  1584. for (i = 0; i < MAX_RSC_COUNT; i++)
  1585. rpmh_dev[i] = NULL;
  1586. return 0;
  1587. }
  1588. static const struct of_device_id dt_match[] = {
  1589. { .compatible = "qcom,sde-rsc"},
  1590. {},
  1591. };
  1592. static struct platform_driver sde_rsc_platform_driver = {
  1593. .probe = sde_rsc_probe,
  1594. .remove = sde_rsc_remove,
  1595. .driver = {
  1596. .name = "sde_rsc",
  1597. .of_match_table = dt_match,
  1598. .suppress_bind_attrs = true,
  1599. },
  1600. };
  1601. static const struct of_device_id sde_rsc_rpmh_match[] = {
  1602. {.compatible = "qcom,sde-rsc-rpmh"},
  1603. {},
  1604. };
  1605. static struct platform_driver sde_rsc_rpmh_driver = {
  1606. .probe = sde_rsc_rpmh_probe,
  1607. .remove = sde_rsc_rpmh_remove,
  1608. .driver = {
  1609. .name = "sde_rsc_rpmh",
  1610. .of_match_table = sde_rsc_rpmh_match,
  1611. },
  1612. };
  1613. void __init sde_rsc_register(void)
  1614. {
  1615. platform_driver_register(&sde_rsc_platform_driver);
  1616. }
  1617. void __exit sde_rsc_unregister(void)
  1618. {
  1619. platform_driver_unregister(&sde_rsc_platform_driver);
  1620. }
  1621. void __init sde_rsc_rpmh_register(void)
  1622. {
  1623. platform_driver_register(&sde_rsc_rpmh_driver);
  1624. }