dp_rx_mon_status.c 64 KB

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  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline
  35. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  36. uint32_t mac_id,
  37. struct dp_srng *dp_rxdma_srng,
  38. struct rx_desc_pool *rx_desc_pool,
  39. uint32_t num_req_buffers,
  40. union dp_rx_desc_list_elem_t **desc_list,
  41. union dp_rx_desc_list_elem_t **tail,
  42. uint8_t owner);
  43. static inline void
  44. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  45. struct hal_rx_ppdu_info *ppdu_info,
  46. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  47. #ifndef QCA_SUPPORT_FULL_MON
  48. /**
  49. * dp_rx_mon_process () - Core brain processing for monitor mode
  50. *
  51. * This API processes monitor destination ring followed by monitor status ring
  52. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  53. *
  54. * @soc: datapath soc context
  55. * @int_ctx: interrupt context
  56. * @mac_id: mac_id on which interrupt is received
  57. * @quota: Number of status ring entry that can be serviced in one shot.
  58. *
  59. * @Return: Number of reaped status ring entries
  60. */
  61. static inline uint32_t
  62. dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  63. uint32_t mac_id, uint32_t quota)
  64. {
  65. return quota;
  66. }
  67. #endif
  68. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  69. #include "dp_rx_mon_feature.h"
  70. #else
  71. static QDF_STATUS
  72. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  73. struct hal_rx_ppdu_info *ppdu_info)
  74. {
  75. return QDF_STATUS_SUCCESS;
  76. }
  77. static void
  78. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  79. qdf_nbuf_t status_nbuf,
  80. struct hal_rx_ppdu_info *ppdu_info,
  81. bool *nbuf_used)
  82. {
  83. }
  84. #endif
  85. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  86. #include "dp_rx_mon_feature.h"
  87. #else
  88. static QDF_STATUS
  89. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  90. struct dp_pdev *pdev,
  91. struct hal_rx_ppdu_info *ppdu_info)
  92. {
  93. return QDF_STATUS_SUCCESS;
  94. }
  95. #endif
  96. #ifdef FEATURE_PERPKT_INFO
  97. static inline void
  98. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  99. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  100. {
  101. uint8_t chain, bw;
  102. int8_t rssi;
  103. for (chain = 0; chain < SS_COUNT; chain++) {
  104. for (bw = 0; bw < MAX_BW; bw++) {
  105. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  106. if (rssi != DP_RSSI_INVAL)
  107. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  108. else
  109. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  110. }
  111. }
  112. }
  113. /*
  114. * dp_rx_populate_su_evm_details() - Populate su evm info
  115. * @ppdu_info: ppdu info structure from ppdu ring
  116. * @cdp_rx_ppdu: rx ppdu indication structure
  117. */
  118. static inline void
  119. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  120. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  121. {
  122. uint8_t pilot_evm;
  123. uint8_t nss_count;
  124. uint8_t pilot_count;
  125. nss_count = ppdu_info->evm_info.nss_count;
  126. pilot_count = ppdu_info->evm_info.pilot_count;
  127. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  128. qdf_err("pilot evm count is more than expected");
  129. return;
  130. }
  131. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  132. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  133. /* Populate evm for pilot_evm = nss_count*pilot_count */
  134. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  135. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  136. ppdu_info->evm_info.pilot_evm[pilot_evm];
  137. }
  138. }
  139. /**
  140. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  141. * @pdev: pdev ctx
  142. * @rx_user_status: mon rx user status
  143. *
  144. * Return: bool
  145. */
  146. static inline bool
  147. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  148. struct mon_rx_user_status *rx_user_status)
  149. {
  150. uint32_t ru_size;
  151. bool is_data;
  152. ru_size = rx_user_status->ofdma_ru_size;
  153. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  154. DP_STATS_INC(pdev,
  155. ul_ofdma.data_rx_ru_size[ru_size], 1);
  156. is_data = true;
  157. } else {
  158. DP_STATS_INC(pdev,
  159. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  160. is_data = false;
  161. }
  162. return is_data;
  163. }
  164. /**
  165. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  166. * @pdev: pdev ctx
  167. * @ppdu_info: ppdu info structure from ppdu ring
  168. * @cdp_rx_ppdu: Rx PPDU indication structure
  169. *
  170. * Return: none
  171. */
  172. static inline void
  173. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  174. struct hal_rx_ppdu_info *ppdu_info,
  175. struct cdp_rx_indication_ppdu
  176. *cdp_rx_ppdu)
  177. {
  178. struct dp_peer *peer;
  179. struct dp_soc *soc = pdev->soc;
  180. struct dp_ast_entry *ast_entry;
  181. uint32_t ast_index;
  182. int i;
  183. struct mon_rx_user_status *rx_user_status;
  184. struct mon_rx_user_info *rx_user_info;
  185. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  186. int ru_size;
  187. bool is_data = false;
  188. uint32_t num_users;
  189. num_users = ppdu_info->com_info.num_users;
  190. for (i = 0; i < num_users; i++) {
  191. if (i > OFDMA_NUM_USERS)
  192. return;
  193. rx_user_status = &ppdu_info->rx_user_status[i];
  194. rx_user_info = &ppdu_info->rx_user_info[i];
  195. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  196. ast_index = rx_user_status->ast_index;
  197. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  198. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  199. continue;
  200. }
  201. ast_entry = soc->ast_table[ast_index];
  202. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  203. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  204. continue;
  205. }
  206. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  207. DP_MOD_ID_RX_PPDU_STATS);
  208. if (!peer) {
  209. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  210. continue;
  211. }
  212. rx_stats_peruser->first_data_seq_ctrl =
  213. rx_user_status->first_data_seq_ctrl;
  214. rx_stats_peruser->frame_control_info_valid =
  215. rx_user_status->frame_control_info_valid;
  216. rx_stats_peruser->frame_control =
  217. rx_user_status->frame_control;
  218. rx_stats_peruser->qos_control_info_valid =
  219. rx_user_info->qos_control_info_valid;
  220. rx_stats_peruser->qos_control =
  221. rx_user_info->qos_control;
  222. rx_stats_peruser->tcp_msdu_count =
  223. rx_user_status->tcp_msdu_count;
  224. rx_stats_peruser->udp_msdu_count =
  225. rx_user_status->udp_msdu_count;
  226. rx_stats_peruser->other_msdu_count =
  227. rx_user_status->other_msdu_count;
  228. rx_stats_peruser->num_msdu =
  229. rx_stats_peruser->tcp_msdu_count +
  230. rx_stats_peruser->udp_msdu_count +
  231. rx_stats_peruser->other_msdu_count;
  232. rx_stats_peruser->preamble_type =
  233. rx_user_status->preamble_type;
  234. rx_stats_peruser->mpdu_cnt_fcs_ok =
  235. rx_user_status->mpdu_cnt_fcs_ok;
  236. rx_stats_peruser->mpdu_cnt_fcs_err =
  237. rx_user_status->mpdu_cnt_fcs_err;
  238. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  239. &rx_user_status->mpdu_fcs_ok_bitmap,
  240. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  241. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  242. rx_stats_peruser->mpdu_ok_byte_count =
  243. rx_user_status->mpdu_ok_byte_count;
  244. rx_stats_peruser->mpdu_err_byte_count =
  245. rx_user_status->mpdu_err_byte_count;
  246. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  247. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  248. rx_stats_peruser->retries =
  249. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  250. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  251. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  252. rx_stats_peruser->is_ampdu = 1;
  253. else
  254. rx_stats_peruser->is_ampdu = 0;
  255. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  256. qdf_mem_copy(rx_stats_peruser->mac_addr,
  257. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  258. rx_stats_peruser->peer_id = peer->peer_id;
  259. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  260. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  261. rx_stats_peruser->mu_ul_info_valid = 0;
  262. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  263. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  264. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  265. if (rx_user_status->mu_ul_info_valid) {
  266. rx_stats_peruser->nss = rx_user_status->nss;
  267. rx_stats_peruser->mcs = rx_user_status->mcs;
  268. rx_stats_peruser->mu_ul_info_valid =
  269. rx_user_status->mu_ul_info_valid;
  270. rx_stats_peruser->ofdma_ru_start_index =
  271. rx_user_status->ofdma_ru_start_index;
  272. rx_stats_peruser->ofdma_ru_width =
  273. rx_user_status->ofdma_ru_width;
  274. rx_stats_peruser->user_index = i;
  275. ru_size = rx_user_status->ofdma_ru_size;
  276. /*
  277. * max RU size will be equal to
  278. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  279. */
  280. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  281. dp_err("invalid ru_size %d\n",
  282. ru_size);
  283. return;
  284. }
  285. is_data = dp_rx_inc_rusize_cnt(pdev,
  286. rx_user_status);
  287. }
  288. if (is_data) {
  289. /* counter to get number of MU OFDMA */
  290. pdev->stats.ul_ofdma.data_rx_ppdu++;
  291. pdev->stats.ul_ofdma.data_users[num_users]++;
  292. }
  293. }
  294. }
  295. }
  296. /**
  297. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  298. * @pdev: pdev ctx
  299. * @ppdu_info: ppdu info structure from ppdu ring
  300. * @cdp_rx_ppdu: Rx PPDU indication structure
  301. *
  302. * Return: none
  303. */
  304. static inline void
  305. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  306. struct hal_rx_ppdu_info *ppdu_info,
  307. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  308. {
  309. struct dp_peer *peer;
  310. struct dp_soc *soc = pdev->soc;
  311. struct dp_ast_entry *ast_entry;
  312. uint32_t ast_index;
  313. uint32_t i;
  314. cdp_rx_ppdu->first_data_seq_ctrl =
  315. ppdu_info->rx_status.first_data_seq_ctrl;
  316. cdp_rx_ppdu->frame_ctrl =
  317. ppdu_info->rx_status.frame_control;
  318. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  319. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  320. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  321. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  322. /* num mpdu is consolidated and added together in num user loop */
  323. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  324. /* num msdu is consolidated and added together in num user loop */
  325. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  326. cdp_rx_ppdu->udp_msdu_count +
  327. cdp_rx_ppdu->other_msdu_count);
  328. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  329. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  330. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  331. cdp_rx_ppdu->is_ampdu = 1;
  332. else
  333. cdp_rx_ppdu->is_ampdu = 0;
  334. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  335. ast_index = ppdu_info->rx_status.ast_index;
  336. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  337. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  338. cdp_rx_ppdu->num_users = 0;
  339. goto end;
  340. }
  341. ast_entry = soc->ast_table[ast_index];
  342. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  343. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  344. cdp_rx_ppdu->num_users = 0;
  345. goto end;
  346. }
  347. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  348. DP_MOD_ID_RX_PPDU_STATS);
  349. if (!peer) {
  350. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  351. cdp_rx_ppdu->num_users = 0;
  352. goto end;
  353. }
  354. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  355. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  356. cdp_rx_ppdu->peer_id = peer->peer_id;
  357. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  358. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  359. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  360. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  361. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  362. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  363. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  364. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  365. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  366. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  367. else
  368. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  369. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  370. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  371. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  372. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  373. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  374. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  375. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  376. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  377. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  378. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  379. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  380. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  381. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  382. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  383. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  384. for (i = 0; i < MAX_CHAIN; i++)
  385. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  386. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  387. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  388. cdp_rx_ppdu->num_mpdu = 0;
  389. cdp_rx_ppdu->num_msdu = 0;
  390. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  391. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  392. return;
  393. end:
  394. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  395. }
  396. #else
  397. static inline void
  398. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  399. struct hal_rx_ppdu_info *ppdu_info,
  400. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  401. {
  402. }
  403. #endif
  404. /**
  405. * dp_rx_stats_update() - Update per-peer statistics
  406. * @soc: Datapath SOC handle
  407. * @peer: Datapath peer handle
  408. * @ppdu: PPDU Descriptor
  409. *
  410. * Return: None
  411. */
  412. #ifdef FEATURE_PERPKT_INFO
  413. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  414. struct cdp_rx_indication_ppdu *ppdu,
  415. uint32_t user)
  416. {
  417. uint32_t ratekbps = 0;
  418. uint32_t ppdu_rx_rate = 0;
  419. uint32_t nss = 0;
  420. uint8_t mcs = 0;
  421. uint32_t rix;
  422. uint16_t ratecode;
  423. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  424. if (!peer || !ppdu)
  425. return;
  426. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  427. ppdu_user = &ppdu->user[user];
  428. if (ppdu_user->nss == 0)
  429. nss = 0;
  430. else
  431. nss = ppdu_user->nss - 1;
  432. mcs = ppdu_user->mcs;
  433. } else {
  434. if (ppdu->u.nss == 0)
  435. nss = 0;
  436. else
  437. nss = ppdu->u.nss - 1;
  438. mcs = ppdu->u.mcs;
  439. }
  440. ratekbps = dp_getrateindex(ppdu->u.gi,
  441. mcs,
  442. nss,
  443. ppdu->u.preamble,
  444. ppdu->u.bw,
  445. &rix,
  446. &ratecode);
  447. if (!ratekbps)
  448. return;
  449. ppdu->rix = rix;
  450. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  451. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  452. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  453. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  454. ppdu->rx_ratekbps = ratekbps;
  455. ppdu->rx_ratecode = ratecode;
  456. if (peer->vdev)
  457. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  458. }
  459. static void dp_rx_stats_update(struct dp_pdev *pdev,
  460. struct cdp_rx_indication_ppdu *ppdu)
  461. {
  462. struct dp_soc *soc = NULL;
  463. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  464. uint16_t num_msdu;
  465. uint8_t pkt_bw_offset;
  466. struct dp_peer *peer;
  467. struct cdp_rx_stats_ppdu_user *ppdu_user;
  468. uint32_t i;
  469. enum cdp_mu_packet_type mu_pkt_type;
  470. if (pdev)
  471. soc = pdev->soc;
  472. else
  473. return;
  474. if (!soc || soc->process_rx_status)
  475. return;
  476. preamble = ppdu->u.preamble;
  477. ppdu_type = ppdu->u.ppdu_type;
  478. for (i = 0; i < ppdu->num_users && i < CDP_MU_MAX_USERS; i++) {
  479. peer = NULL;
  480. ppdu_user = &ppdu->user[i];
  481. peer = dp_peer_get_ref_by_id(soc, ppdu_user->peer_id,
  482. DP_MOD_ID_RX_PPDU_STATS);
  483. if (!peer)
  484. peer = pdev->invalid_peer;
  485. if (ppdu_type == HAL_RX_TYPE_SU) {
  486. mcs = ppdu->u.mcs;
  487. nss = ppdu->u.nss;
  488. } else {
  489. mcs = ppdu_user->mcs;
  490. nss = ppdu_user->nss;
  491. }
  492. num_msdu = ppdu_user->num_msdu;
  493. switch (ppdu->u.bw) {
  494. case CMN_BW_20MHZ:
  495. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  496. break;
  497. case CMN_BW_40MHZ:
  498. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  499. break;
  500. case CMN_BW_80MHZ:
  501. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  502. break;
  503. case CMN_BW_160MHZ:
  504. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  505. break;
  506. default:
  507. pkt_bw_offset = 0;
  508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  509. "Invalid BW index = %d", ppdu->u.bw);
  510. }
  511. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  512. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  513. peer->stats.rx.avg_rssi =
  514. CDP_RSSI_IN(peer->stats.rx.rssi);
  515. else
  516. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  517. peer->stats.rx.rssi);
  518. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  519. nss = 1;
  520. if (ppdu_type == HAL_RX_TYPE_SU) {
  521. if (nss) {
  522. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  523. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  524. }
  525. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  526. ppdu_user->mpdu_cnt_fcs_ok);
  527. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  528. ppdu_user->mpdu_cnt_fcs_err);
  529. }
  530. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  531. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  532. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  533. mu_pkt_type = RX_TYPE_MU_MIMO;
  534. else
  535. mu_pkt_type = RX_TYPE_MU_OFDMA;
  536. if (nss) {
  537. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  538. DP_STATS_INC(peer,
  539. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  540. 1);
  541. }
  542. DP_STATS_INC(peer,
  543. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  544. ppdu_user->mpdu_cnt_fcs_ok);
  545. DP_STATS_INC(peer,
  546. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  547. ppdu_user->mpdu_cnt_fcs_err);
  548. }
  549. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  550. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  551. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  552. num_msdu);
  553. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  554. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  555. ppdu_user->is_ampdu);
  556. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  557. !(ppdu_user->is_ampdu));
  558. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  559. DP_STATS_INCC(peer,
  560. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  561. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  562. DP_STATS_INCC(peer,
  563. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  564. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  565. DP_STATS_INCC(peer,
  566. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  567. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  568. DP_STATS_INCC(peer,
  569. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  570. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  571. DP_STATS_INCC(peer,
  572. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  573. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  574. DP_STATS_INCC(peer,
  575. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  576. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  577. DP_STATS_INCC(peer,
  578. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  579. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  580. DP_STATS_INCC(peer,
  581. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  582. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  583. DP_STATS_INCC(peer,
  584. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  585. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  586. DP_STATS_INCC(peer,
  587. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  588. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  589. DP_STATS_INCC(peer,
  590. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  591. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  592. (ppdu_type == HAL_RX_TYPE_SU)));
  593. DP_STATS_INCC(peer,
  594. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  595. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  596. (ppdu_type == HAL_RX_TYPE_SU)));
  597. DP_STATS_INCC(peer,
  598. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  599. 1, ((mcs >= (MAX_MCS - 1)) &&
  600. (preamble == DOT11_AX) &&
  601. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  602. DP_STATS_INCC(peer,
  603. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  604. 1, ((mcs < (MAX_MCS - 1)) &&
  605. (preamble == DOT11_AX) &&
  606. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  607. DP_STATS_INCC(peer,
  608. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  609. 1, ((mcs >= (MAX_MCS - 1)) &&
  610. (preamble == DOT11_AX) &&
  611. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  612. DP_STATS_INCC(peer,
  613. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  614. 1, ((mcs < (MAX_MCS - 1)) &&
  615. (preamble == DOT11_AX) &&
  616. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  617. /*
  618. * If invalid TID, it could be a non-qos frame, hence do not
  619. * update any AC counters
  620. */
  621. ac = TID_TO_WME_AC(ppdu_user->tid);
  622. if (ppdu->tid != HAL_TID_INVALID)
  623. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  624. dp_peer_stats_notify(pdev, peer);
  625. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  626. dp_peer_qos_stats_notify(pdev, ppdu_user);
  627. if (peer == pdev->invalid_peer)
  628. continue;
  629. if (dp_is_subtype_data(ppdu->frame_ctrl))
  630. dp_rx_rate_stats_update(peer, ppdu, i);
  631. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  632. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  633. &peer->stats, ppdu->peer_id,
  634. UPDATE_PEER_STATS, pdev->pdev_id);
  635. #endif
  636. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  637. }
  638. }
  639. #endif
  640. /**
  641. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  642. * @soc: core txrx main context
  643. * @pdev: pdev structure
  644. * @ppdu_info: structure for rx ppdu ring
  645. * @nbuf: QDF nbuf
  646. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  647. * @deliver_frame: flag to deliver wdi event
  648. *
  649. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  650. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  651. */
  652. #ifdef FEATURE_PERPKT_INFO
  653. static inline QDF_STATUS
  654. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  655. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  656. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  657. {
  658. uint16_t size = 0;
  659. struct ieee80211_frame *wh;
  660. uint32_t *nbuf_data;
  661. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  662. return QDF_STATUS_SUCCESS;
  663. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  664. if (pdev->mcopy_mode == M_COPY) {
  665. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  666. return QDF_STATUS_SUCCESS;
  667. }
  668. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  669. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  670. qdf_nbuf_data(nbuf));
  671. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  672. return QDF_STATUS_SUCCESS;
  673. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  674. IEEE80211_FC0_TYPE_MGT) ||
  675. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  676. IEEE80211_FC0_TYPE_CTL)) {
  677. return QDF_STATUS_SUCCESS;
  678. }
  679. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  680. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  681. /* only retain RX MSDU payload in the skb */
  682. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  683. if (deliver_frame) {
  684. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  685. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  686. nbuf, HTT_INVALID_PEER,
  687. WDI_NO_VAL, pdev->pdev_id);
  688. }
  689. return QDF_STATUS_E_ALREADY;
  690. }
  691. #else
  692. static inline QDF_STATUS
  693. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  694. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  695. uint8_t fcs_ok_cnt, bool deliver_frame)
  696. {
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. #endif
  700. /**
  701. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  702. * status buffer if MPDU end tlv is received in different buffer
  703. * @soc: core txrx main context
  704. * @pdev: pdev structure
  705. * @ppdu_info: structure for rx ppdu ring
  706. * @status_nbuf: QDF nbuf
  707. *
  708. * Return: void
  709. */
  710. #ifdef FEATURE_PERPKT_INFO
  711. static inline void
  712. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  713. struct hal_rx_ppdu_info *ppdu_info,
  714. qdf_nbuf_t status_nbuf)
  715. {
  716. QDF_STATUS mcopy_status;
  717. qdf_nbuf_t nbuf_clone = NULL;
  718. /* If the MPDU end tlv and RX header are received in different buffers,
  719. * process the RX header based on fcs status.
  720. */
  721. if (pdev->mcopy_status_nbuf) {
  722. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  723. if (pdev->mcopy_mode == M_COPY) {
  724. if (pdev->m_copy_id.rx_ppdu_id ==
  725. ppdu_info->com_info.ppdu_id)
  726. goto end1;
  727. }
  728. if (ppdu_info->is_fcs_passed) {
  729. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  730. if (!nbuf_clone) {
  731. QDF_TRACE(QDF_MODULE_ID_TXRX,
  732. QDF_TRACE_LEVEL_ERROR,
  733. "Failed to clone nbuf",
  734. __func__, __LINE__);
  735. goto end1;
  736. }
  737. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  738. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  739. nbuf_clone,
  740. HTT_INVALID_PEER,
  741. WDI_NO_VAL, pdev->pdev_id);
  742. ppdu_info->is_fcs_passed = false;
  743. }
  744. end1:
  745. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  746. pdev->mcopy_status_nbuf = NULL;
  747. }
  748. /* If the MPDU end tlv and RX header are received in different buffers,
  749. * preserve the RX header as the fcs status will be received in MPDU
  750. * end tlv in next buffer. So, cache the buffer to be processd in next
  751. * iteration
  752. */
  753. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  754. ppdu_info->com_info.mpdu_cnt) {
  755. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  756. if (pdev->mcopy_status_nbuf) {
  757. mcopy_status = dp_rx_handle_mcopy_mode(
  758. soc, pdev,
  759. ppdu_info,
  760. pdev->mcopy_status_nbuf,
  761. ppdu_info->fcs_ok_cnt,
  762. false);
  763. if (mcopy_status == QDF_STATUS_SUCCESS) {
  764. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  765. pdev->mcopy_status_nbuf = NULL;
  766. }
  767. }
  768. }
  769. }
  770. #else
  771. static inline void
  772. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  773. struct hal_rx_ppdu_info *ppdu_info,
  774. qdf_nbuf_t status_nbuf)
  775. {
  776. }
  777. #endif
  778. /**
  779. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  780. * @ppdu_info: structure for rx ppdu ring
  781. * @tlv_status: processed TLV status
  782. *
  783. * Return: void
  784. */
  785. #ifdef FEATURE_PERPKT_INFO
  786. static inline void
  787. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  788. struct hal_rx_ppdu_info *ppdu_info,
  789. uint32_t tlv_status)
  790. {
  791. if (!pdev->mcopy_mode)
  792. return;
  793. /* The fcs status is received in MPDU end tlv. If the RX header
  794. * and its MPDU end tlv are received in different status buffer then
  795. * to process that header ppdu_info->is_fcs_passed is used.
  796. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  797. * will be 0 at the time of receiving MPDU end tlv and we update the
  798. * is_fcs_passed flag based on ppdu_info->fcs_err.
  799. */
  800. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  801. return;
  802. if (!ppdu_info->fcs_err) {
  803. if (ppdu_info->fcs_ok_cnt >
  804. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  805. dp_err("No. of MPDUs(%d) per status buff exceeded",
  806. ppdu_info->fcs_ok_cnt);
  807. return;
  808. }
  809. if (ppdu_info->com_info.mpdu_cnt)
  810. ppdu_info->fcs_ok_cnt++;
  811. else
  812. ppdu_info->is_fcs_passed = true;
  813. } else {
  814. if (ppdu_info->com_info.mpdu_cnt)
  815. ppdu_info->fcs_err_cnt++;
  816. else
  817. ppdu_info->is_fcs_passed = false;
  818. }
  819. }
  820. #else
  821. static inline void
  822. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  823. struct hal_rx_ppdu_info *ppdu_info,
  824. uint32_t tlv_status)
  825. {
  826. }
  827. #endif
  828. #ifdef FEATURE_PERPKT_INFO
  829. static inline void
  830. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  831. struct hal_rx_ppdu_info *ppdu_info,
  832. uint32_t tlv_status,
  833. qdf_nbuf_t status_nbuf)
  834. {
  835. QDF_STATUS mcopy_status;
  836. qdf_nbuf_t nbuf_clone = NULL;
  837. uint8_t fcs_ok_mpdu_cnt = 0;
  838. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  839. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  840. goto end;
  841. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  842. goto end;
  843. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  844. if (pdev->mcopy_mode == M_COPY)
  845. ppdu_info->fcs_ok_cnt = 1;
  846. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  847. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  848. if (!nbuf_clone) {
  849. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  850. "Failed to clone nbuf",
  851. __func__, __LINE__);
  852. goto end;
  853. }
  854. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  855. ppdu_info,
  856. nbuf_clone,
  857. fcs_ok_mpdu_cnt,
  858. true);
  859. if (mcopy_status == QDF_STATUS_SUCCESS)
  860. qdf_nbuf_free(nbuf_clone);
  861. fcs_ok_mpdu_cnt++;
  862. }
  863. end:
  864. qdf_nbuf_free(status_nbuf);
  865. ppdu_info->fcs_ok_cnt = 0;
  866. ppdu_info->fcs_err_cnt = 0;
  867. ppdu_info->com_info.mpdu_cnt = 0;
  868. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  869. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  870. * sizeof(struct hal_rx_msdu_payload_info));
  871. }
  872. #else
  873. static inline void
  874. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  875. struct hal_rx_ppdu_info *ppdu_info,
  876. uint32_t tlv_status,
  877. qdf_nbuf_t status_nbuf)
  878. {
  879. }
  880. #endif
  881. /**
  882. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  883. * @soc: Datapath SOC handle
  884. * @pdev: Datapath PDEV handle
  885. * @ppdu_info: Structure for rx ppdu info
  886. * @nbuf: Qdf nbuf abstraction for linux skb
  887. *
  888. * Return: 0 on success, 1 on failure
  889. */
  890. static inline int
  891. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  892. struct hal_rx_ppdu_info *ppdu_info,
  893. qdf_nbuf_t nbuf)
  894. {
  895. uint8_t size = 0;
  896. if (!pdev->monitor_vdev) {
  897. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  898. "[%s]:[%d] Monitor vdev is NULL !!",
  899. __func__, __LINE__);
  900. return 1;
  901. }
  902. if (!ppdu_info->msdu_info.first_msdu_payload) {
  903. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  904. "[%s]:[%d] First msdu payload not present",
  905. __func__, __LINE__);
  906. return 1;
  907. }
  908. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  909. size = (ppdu_info->msdu_info.first_msdu_payload -
  910. qdf_nbuf_data(nbuf)) + 4;
  911. ppdu_info->msdu_info.first_msdu_payload = NULL;
  912. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  913. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  914. "[%s]:[%d] No header present",
  915. __func__, __LINE__);
  916. return 1;
  917. }
  918. /* Only retain RX MSDU payload in the skb */
  919. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  920. ppdu_info->msdu_info.payload_len);
  921. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  922. qdf_nbuf_headroom(nbuf))) {
  923. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  924. return 1;
  925. }
  926. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  927. nbuf, NULL);
  928. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  929. return 0;
  930. }
  931. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  932. /*
  933. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  934. * the PPDU received, this will be used for correlation of CFR data captured
  935. * for an UL-MU-PPDU
  936. * @pdev: pdev ctx
  937. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  938. * @cdp_rx_ppdu: Rx PPDU indication structure
  939. *
  940. * Return: none
  941. */
  942. static inline void
  943. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  944. struct hal_rx_ppdu_info *ppdu_info,
  945. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  946. {
  947. struct dp_peer *peer;
  948. struct dp_soc *soc = pdev->soc;
  949. struct dp_ast_entry *ast_entry;
  950. struct mon_rx_user_status *rx_user_status;
  951. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  952. uint32_t num_users;
  953. int user_id;
  954. uint32_t ast_index;
  955. qdf_spin_lock_bh(&soc->ast_lock);
  956. num_users = ppdu_info->com_info.num_users;
  957. for (user_id = 0; user_id < num_users; user_id++) {
  958. if (user_id > OFDMA_NUM_USERS) {
  959. qdf_spin_unlock_bh(&soc->ast_lock);
  960. return;
  961. }
  962. rx_user_status = &ppdu_info->rx_user_status[user_id];
  963. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  964. ast_index = rx_user_status->ast_index;
  965. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  966. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  967. continue;
  968. }
  969. ast_entry = soc->ast_table[ast_index];
  970. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  971. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  972. continue;
  973. }
  974. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  975. DP_MOD_ID_RX_PPDU_STATS);
  976. if (!peer) {
  977. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  978. continue;
  979. }
  980. qdf_mem_copy(rx_stats_peruser->mac_addr,
  981. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  982. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  983. }
  984. qdf_spin_unlock_bh(&soc->ast_lock);
  985. }
  986. /*
  987. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  988. * info
  989. * @pdev: pdev ctx
  990. * @ppdu_info: ppdu info structure from ppdu ring
  991. * @cdp_rx_ppdu : Rx PPDU indication structure
  992. *
  993. * Return: none
  994. */
  995. static inline void
  996. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  997. struct hal_rx_ppdu_info *ppdu_info,
  998. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  999. {
  1000. int chain;
  1001. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  1002. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  1003. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  1004. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  1005. for (chain = 0; chain < MAX_CHAIN; chain++)
  1006. cdp_rx_ppdu->per_chain_rssi[chain] =
  1007. ppdu_info->rx_status.rssi[chain];
  1008. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1009. }
  1010. /**
  1011. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  1012. * @pdev: pdev ctx
  1013. *
  1014. * Return: True or False
  1015. */
  1016. static inline bool
  1017. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1018. {
  1019. return pdev->cfr_rcc_mode;
  1020. }
  1021. /*
  1022. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  1023. * @pdev: pdev ctx
  1024. * @ppdu_info: ppdu info structure from ppdu ring
  1025. * @cdp_rx_ppdu: Rx PPDU indication structure
  1026. *
  1027. * Return: none
  1028. */
  1029. static inline void
  1030. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1031. struct hal_rx_ppdu_info *ppdu_info,
  1032. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1033. {
  1034. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1035. if (!dp_cfr_rcc_mode_status(pdev))
  1036. return;
  1037. cfr_info = &cdp_rx_ppdu->cfr_info;
  1038. cfr_info->bb_captured_channel
  1039. = ppdu_info->cfr_info.bb_captured_channel;
  1040. cfr_info->bb_captured_timeout
  1041. = ppdu_info->cfr_info.bb_captured_timeout;
  1042. cfr_info->bb_captured_reason
  1043. = ppdu_info->cfr_info.bb_captured_reason;
  1044. cfr_info->rx_location_info_valid
  1045. = ppdu_info->cfr_info.rx_location_info_valid;
  1046. cfr_info->chan_capture_status
  1047. = ppdu_info->cfr_info.chan_capture_status;
  1048. cfr_info->rtt_che_buffer_pointer_high8
  1049. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1050. cfr_info->rtt_che_buffer_pointer_low32
  1051. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1052. }
  1053. /**
  1054. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1055. * @pdev: pdev structure
  1056. * @ppdu_info: structure for rx ppdu ring
  1057. *
  1058. * Return: none
  1059. */
  1060. static inline void
  1061. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1062. struct hal_rx_ppdu_info *ppdu_info)
  1063. {
  1064. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1065. DP_STATS_INC(pdev,
  1066. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1067. if (cfr->rx_location_info_valid) {
  1068. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1069. if (cfr->bb_captured_channel) {
  1070. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1071. DP_STATS_INC(pdev,
  1072. rcc.reason_cnt[cfr->bb_captured_reason],
  1073. 1);
  1074. } else if (cfr->bb_captured_timeout) {
  1075. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1076. DP_STATS_INC(pdev,
  1077. rcc.reason_cnt[cfr->bb_captured_reason],
  1078. 1);
  1079. }
  1080. }
  1081. }
  1082. /*
  1083. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1084. * @soc: core txrx main context
  1085. * @pdev: pdev ctx
  1086. * @ppdu_info: ppdu info structure from ppdu ring
  1087. *
  1088. * Return: none
  1089. */
  1090. static inline void
  1091. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1092. struct hal_rx_ppdu_info *ppdu_info)
  1093. {
  1094. qdf_nbuf_t ppdu_nbuf;
  1095. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1096. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1097. if (!ppdu_info->cfr_info.bb_captured_channel)
  1098. return;
  1099. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1100. sizeof(struct cdp_rx_indication_ppdu),
  1101. 0,
  1102. 0,
  1103. FALSE);
  1104. if (ppdu_nbuf) {
  1105. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1106. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1107. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1108. qdf_nbuf_put_tail(ppdu_nbuf,
  1109. sizeof(struct cdp_rx_indication_ppdu));
  1110. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1111. ppdu_nbuf, HTT_INVALID_PEER,
  1112. WDI_NO_VAL, pdev->pdev_id);
  1113. }
  1114. }
  1115. /**
  1116. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1117. * non-associated stations
  1118. * @pdev: pdev ctx
  1119. * @ppdu_info: ppdu info structure from ppdu ring
  1120. * @cdp_rx_ppdu: Rx PPDU indication structure
  1121. *
  1122. * Return: none
  1123. */
  1124. static inline void
  1125. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1126. struct hal_rx_ppdu_info *ppdu_info,
  1127. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1128. {
  1129. if (!dp_cfr_rcc_mode_status(pdev))
  1130. return;
  1131. if (ppdu_info->cfr_info.bb_captured_channel)
  1132. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1133. }
  1134. /**
  1135. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1136. * @ppdu_info: structure for rx ppdu ring
  1137. *
  1138. * Return: Success/ Failure
  1139. */
  1140. static inline QDF_STATUS
  1141. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1142. struct hal_rx_ppdu_info *ppdu_info)
  1143. {
  1144. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1145. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1146. if (dp_cfr_rcc_mode_status(pdev)) {
  1147. if (cfr->bb_captured_channel)
  1148. status = QDF_STATUS_SUCCESS;
  1149. }
  1150. return status;
  1151. }
  1152. #else
  1153. static inline void
  1154. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1155. struct hal_rx_ppdu_info *ppdu_info,
  1156. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1157. {
  1158. }
  1159. static inline void
  1160. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1161. struct hal_rx_ppdu_info *ppdu_info,
  1162. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1163. {
  1164. }
  1165. static inline void
  1166. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1167. struct hal_rx_ppdu_info *ppdu_info,
  1168. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1169. {
  1170. }
  1171. static inline void
  1172. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1173. struct hal_rx_ppdu_info *ppdu_info)
  1174. {
  1175. }
  1176. static inline void
  1177. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1178. struct hal_rx_ppdu_info *ppdu_info,
  1179. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1180. {
  1181. }
  1182. static inline void
  1183. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1184. struct hal_rx_ppdu_info *ppdu_info)
  1185. {
  1186. }
  1187. static inline QDF_STATUS
  1188. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1189. struct hal_rx_ppdu_info *ppdu_info)
  1190. {
  1191. return QDF_STATUS_E_NOSUPPORT;
  1192. }
  1193. static inline bool
  1194. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1195. {
  1196. return false;
  1197. }
  1198. #endif
  1199. /**
  1200. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1201. * @soc: core txrx main context
  1202. * @pdev: pdev strcuture
  1203. * @ppdu_info: structure for rx ppdu ring
  1204. *
  1205. * Return: none
  1206. */
  1207. #ifdef FEATURE_PERPKT_INFO
  1208. static inline void
  1209. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1210. struct hal_rx_ppdu_info *ppdu_info)
  1211. {
  1212. qdf_nbuf_t ppdu_nbuf;
  1213. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1214. /*
  1215. * Do not allocate if fcs error,
  1216. * ast idx invalid / fctl invalid
  1217. *
  1218. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1219. */
  1220. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1221. return;
  1222. if (ppdu_info->nac_info.fc_valid &&
  1223. ppdu_info->nac_info.to_ds_flag &&
  1224. ppdu_info->nac_info.mac_addr2_valid) {
  1225. struct dp_neighbour_peer *peer = NULL;
  1226. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1227. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1228. if (pdev->neighbour_peers_added) {
  1229. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1230. neighbour_peer_list_elem) {
  1231. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1232. &ppdu_info->nac_info.mac_addr2,
  1233. QDF_MAC_ADDR_SIZE)) {
  1234. peer->rssi = rssi;
  1235. break;
  1236. }
  1237. }
  1238. }
  1239. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1240. }
  1241. /* need not generate wdi event when mcopy, cfr rcc mode and
  1242. * enhanced stats are not enabled
  1243. */
  1244. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1245. !dp_cfr_rcc_mode_status(pdev))
  1246. return;
  1247. if (dp_cfr_rcc_mode_status(pdev))
  1248. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1249. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1250. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1251. if (!(pdev->mcopy_mode ||
  1252. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1253. QDF_STATUS_SUCCESS)))
  1254. return;
  1255. }
  1256. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1257. sizeof(struct cdp_rx_indication_ppdu),
  1258. 0, 0, FALSE);
  1259. if (ppdu_nbuf) {
  1260. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1261. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1262. dp_rx_populate_cdp_indication_ppdu(pdev,
  1263. ppdu_info, cdp_rx_ppdu);
  1264. if (!qdf_nbuf_put_tail(ppdu_nbuf,
  1265. sizeof(struct cdp_rx_indication_ppdu)))
  1266. return;
  1267. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1268. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1269. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1270. soc, ppdu_nbuf,
  1271. cdp_rx_ppdu->peer_id,
  1272. WDI_NO_VAL, pdev->pdev_id);
  1273. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1274. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1275. ppdu_nbuf, HTT_INVALID_PEER,
  1276. WDI_NO_VAL, pdev->pdev_id);
  1277. } else {
  1278. qdf_nbuf_free(ppdu_nbuf);
  1279. }
  1280. }
  1281. }
  1282. #else
  1283. static inline void
  1284. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1285. struct hal_rx_ppdu_info *ppdu_info)
  1286. {
  1287. }
  1288. #endif
  1289. /**
  1290. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1291. * filtering enabled
  1292. * @soc: core txrx main context
  1293. * @ppdu_info: Structure for rx ppdu info
  1294. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1295. * @pdev_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1296. *
  1297. * Return: none
  1298. */
  1299. static inline void
  1300. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1301. struct hal_rx_ppdu_info *ppdu_info,
  1302. qdf_nbuf_t status_nbuf, uint32_t pdev_id)
  1303. {
  1304. struct dp_peer *peer;
  1305. struct dp_ast_entry *ast_entry;
  1306. uint32_t ast_index;
  1307. ast_index = ppdu_info->rx_status.ast_index;
  1308. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1309. ast_entry = soc->ast_table[ast_index];
  1310. if (ast_entry) {
  1311. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1312. DP_MOD_ID_RX_PPDU_STATS);
  1313. if (peer) {
  1314. if ((peer->peer_id != HTT_INVALID_PEER) &&
  1315. (peer->peer_based_pktlog_filter)) {
  1316. dp_wdi_event_handler(
  1317. WDI_EVENT_RX_DESC, soc,
  1318. status_nbuf,
  1319. peer->peer_id,
  1320. WDI_NO_VAL, pdev_id);
  1321. }
  1322. dp_peer_unref_delete(peer,
  1323. DP_MOD_ID_RX_PPDU_STATS);
  1324. }
  1325. }
  1326. }
  1327. }
  1328. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1329. static inline void
  1330. dp_rx_ul_ofdma_ru_size_to_width(
  1331. uint32_t ru_size,
  1332. uint32_t *ru_width)
  1333. {
  1334. uint32_t width;
  1335. width = 0;
  1336. switch (ru_size) {
  1337. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1338. width = 1;
  1339. break;
  1340. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1341. width = 2;
  1342. break;
  1343. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1344. width = 4;
  1345. break;
  1346. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1347. width = 9;
  1348. break;
  1349. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1350. width = 18;
  1351. break;
  1352. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1353. width = 37;
  1354. break;
  1355. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1356. width = 74;
  1357. break;
  1358. default:
  1359. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1360. "RU size to width convert err");
  1361. break;
  1362. }
  1363. *ru_width = width;
  1364. }
  1365. static inline void
  1366. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1367. {
  1368. struct mon_rx_user_status *mon_rx_user_status;
  1369. uint32_t num_users;
  1370. uint32_t i;
  1371. uint32_t mu_ul_user_v0_word0;
  1372. uint32_t mu_ul_user_v0_word1;
  1373. uint32_t ru_width;
  1374. uint32_t ru_size;
  1375. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1376. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1377. return;
  1378. num_users = ppdu_info->com_info.num_users;
  1379. if (num_users > HAL_MAX_UL_MU_USERS)
  1380. num_users = HAL_MAX_UL_MU_USERS;
  1381. for (i = 0; i < num_users; i++) {
  1382. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1383. mu_ul_user_v0_word0 =
  1384. mon_rx_user_status->mu_ul_user_v0_word0;
  1385. mu_ul_user_v0_word1 =
  1386. mon_rx_user_status->mu_ul_user_v0_word1;
  1387. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1388. mu_ul_user_v0_word0) &&
  1389. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1390. mu_ul_user_v0_word0)) {
  1391. mon_rx_user_status->mcs =
  1392. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1393. mu_ul_user_v0_word1);
  1394. mon_rx_user_status->nss =
  1395. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1396. mu_ul_user_v0_word1) + 1;
  1397. mon_rx_user_status->mu_ul_info_valid = 1;
  1398. mon_rx_user_status->ofdma_ru_start_index =
  1399. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1400. mu_ul_user_v0_word1);
  1401. ru_size =
  1402. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1403. mu_ul_user_v0_word1);
  1404. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1405. mon_rx_user_status->ofdma_ru_width = ru_width;
  1406. mon_rx_user_status->ofdma_ru_size = ru_size;
  1407. }
  1408. }
  1409. }
  1410. #else
  1411. static inline void
  1412. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1413. {
  1414. }
  1415. #endif
  1416. /**
  1417. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1418. * buffer on Rx status Queue posted by status SRNG processing.
  1419. * @soc: core txrx main context
  1420. * @int_ctx: interrupt context
  1421. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1422. * @quota: amount of work which can be done
  1423. *
  1424. * Return: none
  1425. */
  1426. static inline void
  1427. dp_rx_mon_status_process_tlv(struct dp_soc *soc, struct dp_intr *int_ctx,
  1428. uint32_t mac_id, uint32_t quota)
  1429. {
  1430. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1431. struct hal_rx_ppdu_info *ppdu_info;
  1432. qdf_nbuf_t status_nbuf;
  1433. uint8_t *rx_tlv;
  1434. uint8_t *rx_tlv_start;
  1435. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1436. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1437. struct cdp_pdev_mon_stats *rx_mon_stats;
  1438. int smart_mesh_status;
  1439. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1440. bool nbuf_used;
  1441. uint32_t rx_enh_capture_mode;
  1442. if (!pdev) {
  1443. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1444. "pdev is null for mac_id = %d", mac_id);
  1445. return;
  1446. }
  1447. ppdu_info = &pdev->ppdu_info;
  1448. rx_mon_stats = &pdev->rx_mon_stats;
  1449. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1450. return;
  1451. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1452. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1453. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1454. rx_tlv = qdf_nbuf_data(status_nbuf);
  1455. rx_tlv_start = rx_tlv;
  1456. nbuf_used = false;
  1457. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1458. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1459. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1460. do {
  1461. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1462. ppdu_info, pdev->soc->hal_soc,
  1463. status_nbuf);
  1464. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1465. rx_mon_stats);
  1466. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1467. status_nbuf, ppdu_info,
  1468. &nbuf_used);
  1469. dp_rx_mcopy_process_ppdu_info(pdev,
  1470. ppdu_info,
  1471. tlv_status);
  1472. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1473. if ((rx_tlv - rx_tlv_start) >=
  1474. RX_MON_STATUS_BUF_SIZE)
  1475. break;
  1476. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1477. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1478. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1479. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1480. }
  1481. if (pdev->dp_peer_based_pktlog) {
  1482. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1483. status_nbuf,
  1484. pdev->pdev_id);
  1485. } else {
  1486. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1487. pktlog_mode = WDI_EVENT_RX_DESC;
  1488. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1489. pktlog_mode = WDI_EVENT_LITE_RX;
  1490. if (pktlog_mode != WDI_NO_VAL)
  1491. dp_wdi_event_handler(pktlog_mode, soc,
  1492. status_nbuf,
  1493. HTT_INVALID_PEER,
  1494. WDI_NO_VAL, pdev->pdev_id);
  1495. }
  1496. /* smart monitor vap and m_copy cannot co-exist */
  1497. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1498. && pdev->monitor_vdev) {
  1499. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1500. pdev, ppdu_info, status_nbuf);
  1501. if (smart_mesh_status)
  1502. qdf_nbuf_free(status_nbuf);
  1503. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1504. dp_rx_process_mcopy_mode(soc, pdev,
  1505. ppdu_info, tlv_status,
  1506. status_nbuf);
  1507. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1508. if (!nbuf_used)
  1509. qdf_nbuf_free(status_nbuf);
  1510. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1511. enh_log_status =
  1512. dp_rx_handle_enh_capture(soc,
  1513. pdev, ppdu_info);
  1514. } else {
  1515. qdf_nbuf_free(status_nbuf);
  1516. }
  1517. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1518. dp_rx_mon_deliver_non_std(soc, mac_id);
  1519. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1520. rx_mon_stats->status_ppdu_done++;
  1521. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1522. if (pdev->tx_capture_enabled
  1523. != CDP_TX_ENH_CAPTURE_DISABLED)
  1524. dp_send_ack_frame_to_stack(soc, pdev,
  1525. ppdu_info);
  1526. if (pdev->enhanced_stats_en ||
  1527. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1528. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1529. else if (dp_cfr_rcc_mode_status(pdev))
  1530. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1531. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1532. /*
  1533. * if chan_num is not fetched correctly from ppdu RX TLV,
  1534. * get it from pdev saved.
  1535. */
  1536. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1537. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1538. /*
  1539. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1540. * get it from pdev saved.
  1541. */
  1542. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1543. pdev->ppdu_info.rx_status.chan_freq =
  1544. pdev->mon_chan_freq;
  1545. }
  1546. if (!soc->full_mon_mode)
  1547. dp_rx_mon_dest_process(soc, int_ctx, mac_id,
  1548. quota);
  1549. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1550. }
  1551. }
  1552. return;
  1553. }
  1554. /*
  1555. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1556. * @soc: core txrx main context
  1557. * @pdev: core txrx pdev context
  1558. *
  1559. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1560. * until retry times reaches max threshold or succeeded.
  1561. *
  1562. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1563. */
  1564. static inline qdf_nbuf_t
  1565. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1566. {
  1567. uint8_t *buf;
  1568. int32_t nbuf_retry_count;
  1569. QDF_STATUS ret;
  1570. qdf_nbuf_t nbuf = NULL;
  1571. for (nbuf_retry_count = 0; nbuf_retry_count <
  1572. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1573. nbuf_retry_count++) {
  1574. /* Allocate a new skb using alloc_skb */
  1575. nbuf = qdf_nbuf_alloc_no_recycler(RX_MON_STATUS_BUF_SIZE,
  1576. RX_BUFFER_RESERVATION,
  1577. RX_DATA_BUFFER_ALIGNMENT);
  1578. if (!nbuf) {
  1579. DP_STATS_INC(pdev, replenish.nbuf_alloc_fail, 1);
  1580. continue;
  1581. }
  1582. buf = qdf_nbuf_data(nbuf);
  1583. memset(buf, 0, RX_MON_STATUS_BUF_SIZE);
  1584. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  1585. QDF_DMA_FROM_DEVICE,
  1586. RX_MON_STATUS_BUF_SIZE);
  1587. /* nbuf map failed */
  1588. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1589. qdf_nbuf_free(nbuf);
  1590. DP_STATS_INC(pdev, replenish.map_err, 1);
  1591. continue;
  1592. }
  1593. /* qdf_nbuf alloc and map succeeded */
  1594. break;
  1595. }
  1596. /* qdf_nbuf still alloc or map failed */
  1597. if (qdf_unlikely(nbuf_retry_count >=
  1598. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1599. return NULL;
  1600. return nbuf;
  1601. }
  1602. /*
  1603. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1604. * post the status ring buffer to Rx status Queue for later
  1605. * processing when status ring is filled with status TLV.
  1606. * Allocate a new buffer to status ring if the filled buffer
  1607. * is posted.
  1608. * @soc: core txrx main context
  1609. * @int_ctx: interrupt context
  1610. * @mac_id: mac_id which is one of 3 mac_ids
  1611. * @quota: No. of ring entry that can be serviced in one shot.
  1612. * Return: uint32_t: No. of ring entry that is processed.
  1613. */
  1614. static inline uint32_t
  1615. dp_rx_mon_status_srng_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1616. uint32_t mac_id, uint32_t quota)
  1617. {
  1618. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1619. hal_soc_handle_t hal_soc;
  1620. void *mon_status_srng;
  1621. void *rxdma_mon_status_ring_entry;
  1622. QDF_STATUS status;
  1623. uint32_t work_done = 0;
  1624. if (!pdev) {
  1625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1626. "pdev is null for mac_id = %d", mac_id);
  1627. return work_done;
  1628. }
  1629. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1630. qdf_assert(mon_status_srng);
  1631. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1632. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1633. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1634. __func__, __LINE__, mon_status_srng);
  1635. return work_done;
  1636. }
  1637. hal_soc = soc->hal_soc;
  1638. qdf_assert(hal_soc);
  1639. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_status_srng)))
  1640. goto done;
  1641. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1642. * BUFFER_ADDR_INFO STRUCT
  1643. */
  1644. while (qdf_likely((rxdma_mon_status_ring_entry =
  1645. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1646. && quota--)) {
  1647. uint32_t rx_buf_cookie;
  1648. qdf_nbuf_t status_nbuf;
  1649. struct dp_rx_desc *rx_desc;
  1650. uint8_t *status_buf;
  1651. qdf_dma_addr_t paddr;
  1652. uint64_t buf_addr;
  1653. struct rx_desc_pool *rx_desc_pool;
  1654. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1655. buf_addr =
  1656. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1657. rxdma_mon_status_ring_entry) |
  1658. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1659. rxdma_mon_status_ring_entry)) << 32));
  1660. if (qdf_likely(buf_addr)) {
  1661. rx_buf_cookie =
  1662. HAL_RX_BUF_COOKIE_GET(
  1663. rxdma_mon_status_ring_entry);
  1664. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1665. rx_buf_cookie);
  1666. qdf_assert(rx_desc);
  1667. status_nbuf = rx_desc->nbuf;
  1668. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1669. QDF_DMA_FROM_DEVICE);
  1670. status_buf = qdf_nbuf_data(status_nbuf);
  1671. status = hal_get_rx_status_done(status_buf);
  1672. if (status != QDF_STATUS_SUCCESS) {
  1673. uint32_t hp, tp;
  1674. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1675. &tp, &hp);
  1676. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1677. hp, tp);
  1678. pdev->rx_mon_stats.tlv_tag_status_err++;
  1679. /* RxDMA status done bit might not be set even
  1680. * though tp is moved by HW.
  1681. * So Hold on to current entry on
  1682. * monitor status ring
  1683. */
  1684. /* If done status is missing, hold onto status
  1685. * ring until status is done for this status
  1686. * ring buffer.
  1687. * Keep HP in mon_status_ring unchanged,
  1688. * and break from here.
  1689. * Check status for same buffer for next time
  1690. * dp_rx_mon_status_srng_process
  1691. */
  1692. break;
  1693. }
  1694. qdf_nbuf_set_pktlen(status_nbuf,
  1695. RX_MON_STATUS_BUF_SIZE);
  1696. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1697. QDF_DMA_FROM_DEVICE,
  1698. rx_desc_pool->buf_size);
  1699. /* Put the status_nbuf to queue */
  1700. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1701. } else {
  1702. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1703. union dp_rx_desc_list_elem_t *tail = NULL;
  1704. uint32_t num_alloc_desc;
  1705. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1706. rx_desc_pool,
  1707. 1,
  1708. &desc_list,
  1709. &tail);
  1710. /*
  1711. * No free descriptors available
  1712. */
  1713. if (qdf_unlikely(num_alloc_desc == 0)) {
  1714. work_done++;
  1715. break;
  1716. }
  1717. rx_desc = &desc_list->rx_desc;
  1718. }
  1719. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1720. /*
  1721. * qdf_nbuf alloc or map failed,
  1722. * free the dp rx desc to free list,
  1723. * fill in NULL dma address at current HP entry,
  1724. * keep HP in mon_status_ring unchanged,
  1725. * wait next time dp_rx_mon_status_srng_process
  1726. * to fill in buffer at current HP.
  1727. */
  1728. if (qdf_unlikely(!status_nbuf)) {
  1729. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1730. union dp_rx_desc_list_elem_t *tail = NULL;
  1731. struct rx_desc_pool *rx_desc_pool;
  1732. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1733. dp_info_rl("fail to allocate or map qdf_nbuf");
  1734. dp_rx_add_to_free_desc_list(&desc_list,
  1735. &tail, rx_desc);
  1736. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1737. &tail, mac_id, rx_desc_pool);
  1738. hal_rxdma_buff_addr_info_set(
  1739. rxdma_mon_status_ring_entry,
  1740. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1741. work_done++;
  1742. break;
  1743. }
  1744. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1745. rx_desc->nbuf = status_nbuf;
  1746. rx_desc->in_use = 1;
  1747. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1748. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1749. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1750. work_done++;
  1751. }
  1752. done:
  1753. dp_srng_access_end(int_ctx, soc, mon_status_srng);
  1754. return work_done;
  1755. }
  1756. uint32_t
  1757. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1758. uint32_t mac_id, uint32_t quota)
  1759. {
  1760. uint32_t work_done;
  1761. work_done = dp_rx_mon_status_srng_process(soc, int_ctx, mac_id, quota);
  1762. quota -= work_done;
  1763. dp_rx_mon_status_process_tlv(soc, int_ctx, mac_id, quota);
  1764. return work_done;
  1765. }
  1766. #ifndef DISABLE_MON_CONFIG
  1767. uint32_t
  1768. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1769. uint32_t mac_id, uint32_t quota)
  1770. {
  1771. if (qdf_unlikely(soc->full_mon_mode))
  1772. return dp_rx_mon_process(soc, int_ctx, mac_id, quota);
  1773. return dp_rx_mon_status_process(soc, int_ctx, mac_id, quota);
  1774. }
  1775. #else
  1776. uint32_t
  1777. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1778. uint32_t mac_id, uint32_t quota)
  1779. {
  1780. return 0;
  1781. }
  1782. #endif
  1783. QDF_STATUS
  1784. dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1785. {
  1786. uint8_t pdev_id = pdev->pdev_id;
  1787. struct dp_soc *soc = pdev->soc;
  1788. struct dp_srng *mon_status_ring;
  1789. uint32_t num_entries;
  1790. struct rx_desc_pool *rx_desc_pool;
  1791. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1792. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1793. union dp_rx_desc_list_elem_t *tail = NULL;
  1794. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1795. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1796. num_entries = mon_status_ring->num_entries;
  1797. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1798. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1799. pdev_id, num_entries);
  1800. return dp_rx_mon_status_buffers_replenish(soc, mac_id, mon_status_ring,
  1801. rx_desc_pool, num_entries,
  1802. &desc_list, &tail,
  1803. HAL_RX_BUF_RBM_SW3_BM);
  1804. }
  1805. QDF_STATUS
  1806. dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1807. {
  1808. uint8_t pdev_id = pdev->pdev_id;
  1809. struct dp_soc *soc = pdev->soc;
  1810. struct dp_srng *mon_status_ring;
  1811. uint32_t num_entries;
  1812. struct rx_desc_pool *rx_desc_pool;
  1813. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1814. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1815. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1816. num_entries = mon_status_ring->num_entries;
  1817. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1818. dp_debug("Mon RX Desc Pool[%d] entries=%u", pdev_id, num_entries);
  1819. return dp_rx_desc_pool_alloc(soc, num_entries + 1, rx_desc_pool);
  1820. }
  1821. void
  1822. dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev, uint32_t mac_id)
  1823. {
  1824. uint32_t i;
  1825. uint8_t pdev_id = pdev->pdev_id;
  1826. struct dp_soc *soc = pdev->soc;
  1827. struct dp_srng *mon_status_ring;
  1828. uint32_t num_entries;
  1829. struct rx_desc_pool *rx_desc_pool;
  1830. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1831. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1832. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1833. num_entries = mon_status_ring->num_entries;
  1834. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1835. dp_debug("Mon RX Desc status Pool[%d] init entries=%u",
  1836. pdev_id, num_entries);
  1837. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1838. rx_desc_pool->buf_size = RX_MON_STATUS_BUF_SIZE;
  1839. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1840. /* Disable frag processing flag */
  1841. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  1842. dp_rx_desc_pool_init(soc, mac_id, num_entries + 1, rx_desc_pool);
  1843. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1844. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1845. qdf_mem_zero(&pdev->ppdu_info, sizeof(pdev->ppdu_info));
  1846. /*
  1847. * Set last_ppdu_id to HAL_INVALID_PPDU_ID in order to avoid ppdu_id
  1848. * match with '0' ppdu_id from monitor status ring
  1849. */
  1850. pdev->ppdu_info.com_info.last_ppdu_id = HAL_INVALID_PPDU_ID;
  1851. qdf_mem_zero(&pdev->rx_mon_stats, sizeof(pdev->rx_mon_stats));
  1852. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1853. &pdev->rx_mon_stats);
  1854. for (i = 0; i < MAX_MU_USERS; i++) {
  1855. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1856. pdev->is_mpdu_hdr[i] = true;
  1857. }
  1858. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1859. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1860. }
  1861. void
  1862. dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev, uint32_t mac_id) {
  1863. uint8_t pdev_id = pdev->pdev_id;
  1864. struct dp_soc *soc = pdev->soc;
  1865. struct rx_desc_pool *rx_desc_pool;
  1866. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1867. dp_debug("Mon RX Desc status Pool[%d] deinit", pdev_id);
  1868. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  1869. }
  1870. void
  1871. dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev, uint32_t mac_id) {
  1872. uint8_t pdev_id = pdev->pdev_id;
  1873. struct dp_soc *soc = pdev->soc;
  1874. struct rx_desc_pool *rx_desc_pool;
  1875. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1876. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1877. dp_rx_desc_pool_free(soc, rx_desc_pool);
  1878. }
  1879. void
  1880. dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id)
  1881. {
  1882. uint8_t pdev_id = pdev->pdev_id;
  1883. struct dp_soc *soc = pdev->soc;
  1884. struct rx_desc_pool *rx_desc_pool;
  1885. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1886. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1887. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1888. }
  1889. /*
  1890. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1891. * rx nbufs called during dp rx
  1892. * monitor status ring initialization
  1893. *
  1894. * @soc: core txrx main context
  1895. * @mac_id: mac_id which is one of 3 mac_ids
  1896. * @dp_rxdma_srng: dp monitor status circular ring
  1897. * @rx_desc_pool; Pointer to Rx descriptor pool
  1898. * @num_req_buffers: number of buffer to be replenished
  1899. * @desc_list: list of descs if called from dp rx monitor status
  1900. * process or NULL during dp rx initialization or
  1901. * out of buffer interrupt
  1902. * @tail: tail of descs list
  1903. * @owner: who owns the nbuf (host, NSS etc...)
  1904. * Return: return success or failure
  1905. */
  1906. static inline
  1907. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1908. uint32_t mac_id,
  1909. struct dp_srng *dp_rxdma_srng,
  1910. struct rx_desc_pool *rx_desc_pool,
  1911. uint32_t num_req_buffers,
  1912. union dp_rx_desc_list_elem_t **desc_list,
  1913. union dp_rx_desc_list_elem_t **tail,
  1914. uint8_t owner)
  1915. {
  1916. uint32_t num_alloc_desc;
  1917. uint16_t num_desc_to_free = 0;
  1918. uint32_t num_entries_avail;
  1919. uint32_t count = 0;
  1920. int sync_hw_ptr = 1;
  1921. qdf_dma_addr_t paddr;
  1922. qdf_nbuf_t rx_netbuf;
  1923. void *rxdma_ring_entry;
  1924. union dp_rx_desc_list_elem_t *next;
  1925. void *rxdma_srng;
  1926. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1927. if (!dp_pdev) {
  1928. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1929. "pdev is null for mac_id = %d", mac_id);
  1930. return QDF_STATUS_E_FAILURE;
  1931. }
  1932. rxdma_srng = dp_rxdma_srng->hal_srng;
  1933. qdf_assert(rxdma_srng);
  1934. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1935. "[%s][%d] requested %d buffers for replenish",
  1936. __func__, __LINE__, num_req_buffers);
  1937. /*
  1938. * if desc_list is NULL, allocate the descs from freelist
  1939. */
  1940. if (!(*desc_list)) {
  1941. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1942. rx_desc_pool,
  1943. num_req_buffers,
  1944. desc_list,
  1945. tail);
  1946. if (!num_alloc_desc) {
  1947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1948. "[%s][%d] no free rx_descs in freelist",
  1949. __func__, __LINE__);
  1950. return QDF_STATUS_E_NOMEM;
  1951. }
  1952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1953. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1954. num_alloc_desc);
  1955. num_req_buffers = num_alloc_desc;
  1956. }
  1957. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1958. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1959. rxdma_srng, sync_hw_ptr);
  1960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1961. "[%s][%d] no of available entries in rxdma ring: %d",
  1962. __func__, __LINE__, num_entries_avail);
  1963. if (num_entries_avail < num_req_buffers) {
  1964. num_desc_to_free = num_req_buffers - num_entries_avail;
  1965. num_req_buffers = num_entries_avail;
  1966. }
  1967. while (count <= num_req_buffers) {
  1968. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1969. /*
  1970. * qdf_nbuf alloc or map failed,
  1971. * keep HP in mon_status_ring unchanged,
  1972. * wait dp_rx_mon_status_srng_process
  1973. * to fill in buffer at current HP.
  1974. */
  1975. if (qdf_unlikely(!rx_netbuf)) {
  1976. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1977. "%s: qdf_nbuf allocate or map fail, count %d",
  1978. __func__, count);
  1979. break;
  1980. }
  1981. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1982. next = (*desc_list)->next;
  1983. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  1984. dp_soc->hal_soc,
  1985. rxdma_srng);
  1986. if (qdf_unlikely(!rxdma_ring_entry)) {
  1987. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1988. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1989. __func__, __LINE__, count);
  1990. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  1991. QDF_DMA_FROM_DEVICE,
  1992. rx_desc_pool->buf_size);
  1993. qdf_nbuf_free(rx_netbuf);
  1994. break;
  1995. }
  1996. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1997. (*desc_list)->rx_desc.in_use = 1;
  1998. count++;
  1999. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2000. (*desc_list)->rx_desc.cookie, owner);
  2001. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2002. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  2003. paddr=%pK",
  2004. __func__, __LINE__, &(*desc_list)->rx_desc,
  2005. (*desc_list)->rx_desc.cookie, rx_netbuf,
  2006. (void *)paddr);
  2007. *desc_list = next;
  2008. }
  2009. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2010. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2011. "successfully replenished %d buffers", num_req_buffers);
  2012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2013. "%d rx desc added back to free list", num_desc_to_free);
  2014. /*
  2015. * add any available free desc back to the free list
  2016. */
  2017. if (*desc_list) {
  2018. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  2019. mac_id, rx_desc_pool);
  2020. }
  2021. return QDF_STATUS_SUCCESS;
  2022. }