dp_main.c 71 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <hal_api.h>
  22. #include <hif.h>
  23. #include <htt.h>
  24. #include <wdi_event.h>
  25. #include <queue.h>
  26. #include "dp_htt.h"
  27. #include "dp_types.h"
  28. #include "dp_internal.h"
  29. #include "dp_tx.h"
  30. #include "dp_rx.h"
  31. #include <cdp_txrx_handle.h>
  32. #include <wlan_cfg.h>
  33. #include "cdp_txrx_cmn_struct.h"
  34. #include <qdf_util.h>
  35. #define DP_INTR_POLL_TIMER_MS 100
  36. #define DP_MCS_LENGTH (6*MAX_MCS)
  37. #define DP_NSS_LENGTH (6*SS_COUNT)
  38. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  39. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET)
  40. /**
  41. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  42. */
  43. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  44. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  45. {
  46. void *hal_soc = soc->hal_soc;
  47. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  48. /* TODO: See if we should get align size from hal */
  49. uint32_t ring_base_align = 8;
  50. struct hal_srng_params ring_params;
  51. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  52. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  53. srng->hal_srng = NULL;
  54. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  55. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  56. soc->osdev, soc->osdev->dev, srng->alloc_size,
  57. &(srng->base_paddr_unaligned));
  58. if (!srng->base_vaddr_unaligned) {
  59. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  60. FL("alloc failed - ring_type: %d, ring_num %d"),
  61. ring_type, ring_num);
  62. return QDF_STATUS_E_NOMEM;
  63. }
  64. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  65. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  66. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  67. ((unsigned long)(ring_params.ring_base_vaddr) -
  68. (unsigned long)srng->base_vaddr_unaligned);
  69. ring_params.num_entries = num_entries;
  70. /* TODO: Check MSI support and get MSI settings from HIF layer */
  71. ring_params.msi_data = 0;
  72. ring_params.msi_addr = 0;
  73. /* TODO: Setup interrupt timer and batch counter thresholds for
  74. * interrupt mitigation based on ring type
  75. */
  76. ring_params.intr_timer_thres_us = 8;
  77. ring_params.intr_batch_cntr_thres_entries = 1;
  78. /* TODO: Currently hal layer takes care of endianness related settings.
  79. * See if these settings need to passed from DP layer
  80. */
  81. ring_params.flags = 0;
  82. /* Enable low threshold interrupts for rx buffer rings (regular and
  83. * monitor buffer rings.
  84. * TODO: See if this is required for any other ring
  85. */
  86. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  87. /* TODO: Setting low threshold to 1/8th of ring size
  88. * see if this needs to be configurable
  89. */
  90. ring_params.low_threshold = num_entries >> 3;
  91. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  92. }
  93. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  94. mac_id, &ring_params);
  95. return 0;
  96. }
  97. /**
  98. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  99. * Any buffers allocated and attached to ring entries are expected to be freed
  100. * before calling this function.
  101. */
  102. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  103. int ring_type, int ring_num)
  104. {
  105. if (!srng->hal_srng) {
  106. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  107. FL("Ring type: %d, num:%d not setup"),
  108. ring_type, ring_num);
  109. return;
  110. }
  111. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  112. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  113. srng->alloc_size,
  114. srng->base_vaddr_unaligned,
  115. srng->base_paddr_unaligned, 0);
  116. }
  117. /* TODO: Need this interface from HIF */
  118. void *hif_get_hal_handle(void *hif_handle);
  119. /*
  120. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  121. * @dp_ctx: DP SOC handle
  122. * @budget: Number of frames/descriptors that can be processed in one shot
  123. *
  124. * Return: remaining budget/quota for the soc device
  125. */
  126. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  127. {
  128. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  129. struct dp_soc *soc = int_ctx->soc;
  130. int ring = 0;
  131. uint32_t work_done = 0;
  132. uint32_t budget = dp_budget;
  133. uint8_t tx_mask = int_ctx->tx_ring_mask;
  134. uint8_t rx_mask = int_ctx->rx_ring_mask;
  135. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  136. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  137. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  138. /* Process Tx completion interrupts first to return back buffers */
  139. if (tx_mask) {
  140. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  141. if (tx_mask & (1 << ring)) {
  142. work_done =
  143. dp_tx_comp_handler(soc, ring, budget);
  144. budget -= work_done;
  145. if (work_done)
  146. QDF_TRACE(QDF_MODULE_ID_DP,
  147. QDF_TRACE_LEVEL_INFO,
  148. "tx mask 0x%x ring %d,"
  149. "budget %d",
  150. tx_mask, ring, budget);
  151. if (budget <= 0)
  152. goto budget_done;
  153. }
  154. }
  155. }
  156. /* Process REO Exception ring interrupt */
  157. if (rx_err_mask) {
  158. work_done = dp_rx_err_process(soc,
  159. soc->reo_exception_ring.hal_srng, budget);
  160. budget -= work_done;
  161. if (work_done)
  162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  163. "REO Exception Ring: work_done %d budget %d",
  164. work_done, budget);
  165. if (budget <= 0) {
  166. goto budget_done;
  167. }
  168. }
  169. /* Process Rx WBM release ring interrupt */
  170. if (rx_wbm_rel_mask) {
  171. work_done = dp_rx_wbm_err_process(soc,
  172. soc->rx_rel_ring.hal_srng, budget);
  173. budget -= work_done;
  174. if (work_done)
  175. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  176. "WBM Release Ring: work_done %d budget %d",
  177. work_done, budget);
  178. if (budget <= 0) {
  179. goto budget_done;
  180. }
  181. }
  182. /* Process Rx interrupts */
  183. if (rx_mask) {
  184. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  185. if (rx_mask & (1 << ring)) {
  186. work_done =
  187. dp_rx_process(soc,
  188. soc->reo_dest_ring[ring].hal_srng,
  189. budget);
  190. budget -= work_done;
  191. if (work_done)
  192. QDF_TRACE(QDF_MODULE_ID_DP,
  193. QDF_TRACE_LEVEL_INFO,
  194. "rx mask 0x%x ring %d,"
  195. "budget %d",
  196. tx_mask, ring, budget);
  197. if (budget <= 0)
  198. goto budget_done;
  199. }
  200. }
  201. }
  202. if (reo_status_mask)
  203. dp_reo_status_ring_handler(soc);
  204. budget_done:
  205. return dp_budget - budget;
  206. }
  207. /* dp_interrupt_timer()- timer poll for interrupts
  208. *
  209. * @arg: SoC Handle
  210. *
  211. * Return:
  212. *
  213. */
  214. #ifdef DP_INTR_POLL_BASED
  215. static void dp_interrupt_timer(void *arg)
  216. {
  217. struct dp_soc *soc = (struct dp_soc *) arg;
  218. int i;
  219. if (qdf_atomic_read(&soc->cmn_init_done)) {
  220. for (i = 0;
  221. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  222. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  223. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  224. }
  225. }
  226. /*
  227. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  228. * @txrx_soc: DP SOC handle
  229. *
  230. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  231. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  232. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  233. *
  234. * Return: 0 for success. nonzero for failure.
  235. */
  236. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  237. {
  238. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  239. int i;
  240. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  241. soc->intr_ctx[i].tx_ring_mask = 0xF;
  242. soc->intr_ctx[i].rx_ring_mask = 0xF;
  243. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  244. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  245. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  246. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  247. soc->intr_ctx[i].soc = soc;
  248. }
  249. qdf_timer_init(soc->osdev, &soc->int_timer,
  250. dp_interrupt_timer, (void *)soc,
  251. QDF_TIMER_TYPE_WAKE_APPS);
  252. return QDF_STATUS_SUCCESS;
  253. }
  254. /*
  255. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  256. * @txrx_soc: DP SOC handle
  257. *
  258. * Return: void
  259. */
  260. static void dp_soc_interrupt_detach(void *txrx_soc)
  261. {
  262. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  263. qdf_timer_stop(&soc->int_timer);
  264. qdf_timer_free(&soc->int_timer);
  265. }
  266. #else
  267. /*
  268. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  269. * @txrx_soc: DP SOC handle
  270. *
  271. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  272. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  273. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  274. *
  275. * Return: 0 for success. nonzero for failure.
  276. */
  277. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  278. {
  279. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  280. int i = 0;
  281. int num_irq = 0;
  282. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  283. int j = 0;
  284. int ret = 0;
  285. /* Map of IRQ ids registered with one interrupt context */
  286. int irq_id_map[HIF_MAX_GRP_IRQ];
  287. int tx_mask =
  288. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  289. int rx_mask =
  290. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  291. int rx_mon_mask =
  292. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  293. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  294. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  295. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  296. soc->intr_ctx[i].soc = soc;
  297. num_irq = 0;
  298. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  299. if (tx_mask & (1 << j)) {
  300. irq_id_map[num_irq++] =
  301. (wbm2host_tx_completions_ring1 - j);
  302. }
  303. if (rx_mask & (1 << j)) {
  304. irq_id_map[num_irq++] =
  305. (reo2host_destination_ring1 - j);
  306. }
  307. if (rx_mon_mask & (1 << j)) {
  308. irq_id_map[num_irq++] =
  309. (rxdma2host_monitor_destination_mac1
  310. - j);
  311. }
  312. }
  313. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  314. num_irq, irq_id_map,
  315. dp_service_srngs,
  316. &soc->intr_ctx[i]);
  317. if (ret) {
  318. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  319. FL("failed, ret = %d"), ret);
  320. return QDF_STATUS_E_FAILURE;
  321. }
  322. }
  323. return QDF_STATUS_SUCCESS;
  324. }
  325. /*
  326. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  327. * @txrx_soc: DP SOC handle
  328. *
  329. * Return: void
  330. */
  331. static void dp_soc_interrupt_detach(void *txrx_soc)
  332. {
  333. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  334. int i;
  335. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  336. soc->intr_ctx[i].tx_ring_mask = 0;
  337. soc->intr_ctx[i].rx_ring_mask = 0;
  338. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  339. }
  340. }
  341. #endif
  342. #define AVG_MAX_MPDUS_PER_TID 128
  343. #define AVG_TIDS_PER_CLIENT 2
  344. #define AVG_FLOWS_PER_TID 2
  345. #define AVG_MSDUS_PER_FLOW 128
  346. #define AVG_MSDUS_PER_MPDU 4
  347. /*
  348. * Allocate and setup link descriptor pool that will be used by HW for
  349. * various link and queue descriptors and managed by WBM
  350. */
  351. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  352. {
  353. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  354. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  355. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  356. uint32_t num_mpdus_per_link_desc =
  357. hal_num_mpdus_per_link_desc(soc->hal_soc);
  358. uint32_t num_msdus_per_link_desc =
  359. hal_num_msdus_per_link_desc(soc->hal_soc);
  360. uint32_t num_mpdu_links_per_queue_desc =
  361. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  362. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  363. uint32_t total_link_descs, total_mem_size;
  364. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  365. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  366. uint32_t num_link_desc_banks;
  367. uint32_t last_bank_size = 0;
  368. uint32_t entry_size, num_entries;
  369. int i;
  370. /* Only Tx queue descriptors are allocated from common link descriptor
  371. * pool Rx queue descriptors are not included in this because (REO queue
  372. * extension descriptors) they are expected to be allocated contiguously
  373. * with REO queue descriptors
  374. */
  375. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  376. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  377. num_mpdu_queue_descs = num_mpdu_link_descs /
  378. num_mpdu_links_per_queue_desc;
  379. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  380. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  381. num_msdus_per_link_desc;
  382. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  383. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  384. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  385. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  386. /* Round up to power of 2 */
  387. total_link_descs = 1;
  388. while (total_link_descs < num_entries)
  389. total_link_descs <<= 1;
  390. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  391. FL("total_link_descs: %u, link_desc_size: %d"),
  392. total_link_descs, link_desc_size);
  393. total_mem_size = total_link_descs * link_desc_size;
  394. total_mem_size += link_desc_align;
  395. if (total_mem_size <= max_alloc_size) {
  396. num_link_desc_banks = 0;
  397. last_bank_size = total_mem_size;
  398. } else {
  399. num_link_desc_banks = (total_mem_size) /
  400. (max_alloc_size - link_desc_align);
  401. last_bank_size = total_mem_size %
  402. (max_alloc_size - link_desc_align);
  403. }
  404. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  405. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  406. total_mem_size, num_link_desc_banks);
  407. for (i = 0; i < num_link_desc_banks; i++) {
  408. soc->link_desc_banks[i].base_vaddr_unaligned =
  409. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  410. max_alloc_size,
  411. &(soc->link_desc_banks[i].base_paddr_unaligned));
  412. soc->link_desc_banks[i].size = max_alloc_size;
  413. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  414. soc->link_desc_banks[i].base_vaddr_unaligned) +
  415. ((unsigned long)(
  416. soc->link_desc_banks[i].base_vaddr_unaligned) %
  417. link_desc_align));
  418. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  419. soc->link_desc_banks[i].base_paddr_unaligned) +
  420. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  421. (unsigned long)(
  422. soc->link_desc_banks[i].base_vaddr_unaligned));
  423. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  424. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  425. FL("Link descriptor memory alloc failed"));
  426. goto fail;
  427. }
  428. }
  429. if (last_bank_size) {
  430. /* Allocate last bank in case total memory required is not exact
  431. * multiple of max_alloc_size
  432. */
  433. soc->link_desc_banks[i].base_vaddr_unaligned =
  434. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  435. last_bank_size,
  436. &(soc->link_desc_banks[i].base_paddr_unaligned));
  437. soc->link_desc_banks[i].size = last_bank_size;
  438. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  439. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  440. ((unsigned long)(
  441. soc->link_desc_banks[i].base_vaddr_unaligned) %
  442. link_desc_align));
  443. soc->link_desc_banks[i].base_paddr =
  444. (unsigned long)(
  445. soc->link_desc_banks[i].base_paddr_unaligned) +
  446. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  447. (unsigned long)(
  448. soc->link_desc_banks[i].base_vaddr_unaligned));
  449. }
  450. /* Allocate and setup link descriptor idle list for HW internal use */
  451. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  452. total_mem_size = entry_size * total_link_descs;
  453. if (total_mem_size <= max_alloc_size) {
  454. void *desc;
  455. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  456. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  457. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  458. FL("Link desc idle ring setup failed"));
  459. goto fail;
  460. }
  461. hal_srng_access_start_unlocked(soc->hal_soc,
  462. soc->wbm_idle_link_ring.hal_srng);
  463. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  464. soc->link_desc_banks[i].base_paddr; i++) {
  465. uint32_t num_entries = (soc->link_desc_banks[i].size -
  466. (unsigned long)(
  467. soc->link_desc_banks[i].base_vaddr) -
  468. (unsigned long)(
  469. soc->link_desc_banks[i].base_vaddr_unaligned))
  470. / link_desc_size;
  471. unsigned long paddr = (unsigned long)(
  472. soc->link_desc_banks[i].base_paddr);
  473. while (num_entries && (desc = hal_srng_src_get_next(
  474. soc->hal_soc,
  475. soc->wbm_idle_link_ring.hal_srng))) {
  476. hal_set_link_desc_addr(desc, i, paddr);
  477. num_entries--;
  478. paddr += link_desc_size;
  479. }
  480. }
  481. hal_srng_access_end_unlocked(soc->hal_soc,
  482. soc->wbm_idle_link_ring.hal_srng);
  483. } else {
  484. uint32_t num_scatter_bufs;
  485. uint32_t num_entries_per_buf;
  486. uint32_t rem_entries;
  487. uint8_t *scatter_buf_ptr;
  488. uint16_t scatter_buf_num;
  489. soc->wbm_idle_scatter_buf_size =
  490. hal_idle_list_scatter_buf_size(soc->hal_soc);
  491. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  492. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  493. num_scatter_bufs = (total_mem_size /
  494. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  495. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  496. for (i = 0; i < num_scatter_bufs; i++) {
  497. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  498. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  499. soc->wbm_idle_scatter_buf_size,
  500. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  501. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  502. QDF_TRACE(QDF_MODULE_ID_DP,
  503. QDF_TRACE_LEVEL_ERROR,
  504. FL("Scatter list memory alloc failed"));
  505. goto fail;
  506. }
  507. }
  508. /* Populate idle list scatter buffers with link descriptor
  509. * pointers
  510. */
  511. scatter_buf_num = 0;
  512. scatter_buf_ptr = (uint8_t *)(
  513. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  514. rem_entries = num_entries_per_buf;
  515. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  516. soc->link_desc_banks[i].base_paddr; i++) {
  517. uint32_t num_link_descs =
  518. (soc->link_desc_banks[i].size -
  519. (unsigned long)(
  520. soc->link_desc_banks[i].base_vaddr) -
  521. (unsigned long)(
  522. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  523. link_desc_size;
  524. unsigned long paddr = (unsigned long)(
  525. soc->link_desc_banks[i].base_paddr);
  526. void *desc = NULL;
  527. while (num_link_descs && (desc =
  528. hal_srng_src_get_next(soc->hal_soc,
  529. soc->wbm_idle_link_ring.hal_srng))) {
  530. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  531. i, paddr);
  532. num_link_descs--;
  533. paddr += link_desc_size;
  534. if (rem_entries) {
  535. rem_entries--;
  536. scatter_buf_ptr += link_desc_size;
  537. } else {
  538. rem_entries = num_entries_per_buf;
  539. scatter_buf_num++;
  540. scatter_buf_ptr = (uint8_t *)(
  541. soc->wbm_idle_scatter_buf_base_vaddr[
  542. scatter_buf_num]);
  543. }
  544. }
  545. }
  546. /* Setup link descriptor idle list in HW */
  547. hal_setup_link_idle_list(soc->hal_soc,
  548. soc->wbm_idle_scatter_buf_base_paddr,
  549. soc->wbm_idle_scatter_buf_base_vaddr,
  550. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  551. (uint32_t)(scatter_buf_ptr -
  552. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  553. scatter_buf_num])));
  554. }
  555. return 0;
  556. fail:
  557. if (soc->wbm_idle_link_ring.hal_srng) {
  558. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  559. WBM_IDLE_LINK, 0);
  560. }
  561. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  562. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  563. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  564. soc->wbm_idle_scatter_buf_size,
  565. soc->wbm_idle_scatter_buf_base_vaddr[i],
  566. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  567. }
  568. }
  569. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  570. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  571. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  572. soc->link_desc_banks[i].size,
  573. soc->link_desc_banks[i].base_vaddr_unaligned,
  574. soc->link_desc_banks[i].base_paddr_unaligned,
  575. 0);
  576. }
  577. }
  578. return QDF_STATUS_E_FAILURE;
  579. }
  580. #ifdef notused
  581. /*
  582. * Free link descriptor pool that was setup HW
  583. */
  584. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  585. {
  586. int i;
  587. if (soc->wbm_idle_link_ring.hal_srng) {
  588. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  589. WBM_IDLE_LINK, 0);
  590. }
  591. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  592. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  593. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  594. soc->wbm_idle_scatter_buf_size,
  595. soc->wbm_idle_scatter_buf_base_vaddr[i],
  596. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  597. }
  598. }
  599. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  600. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  601. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  602. soc->link_desc_banks[i].size,
  603. soc->link_desc_banks[i].base_vaddr_unaligned,
  604. soc->link_desc_banks[i].base_paddr_unaligned,
  605. 0);
  606. }
  607. }
  608. }
  609. #endif /* notused */
  610. /* TODO: Following should be configurable */
  611. #define WBM_RELEASE_RING_SIZE 64
  612. #define TCL_DATA_RING_SIZE 512
  613. #define TX_COMP_RING_SIZE 1024
  614. #define TCL_CMD_RING_SIZE 32
  615. #define TCL_STATUS_RING_SIZE 32
  616. #define REO_DST_RING_SIZE 2048
  617. #define REO_REINJECT_RING_SIZE 32
  618. #define RX_RELEASE_RING_SIZE 1024
  619. #define REO_EXCEPTION_RING_SIZE 128
  620. #define REO_CMD_RING_SIZE 32
  621. #define REO_STATUS_RING_SIZE 32
  622. #define RXDMA_BUF_RING_SIZE 1024
  623. #define RXDMA_REFILL_RING_SIZE 2048
  624. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  625. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  626. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  627. /*
  628. * dp_soc_cmn_setup() - Common SoC level initializion
  629. * @soc: Datapath SOC handle
  630. *
  631. * This is an internal function used to setup common SOC data structures,
  632. * to be called from PDEV attach after receiving HW mode capabilities from FW
  633. */
  634. static int dp_soc_cmn_setup(struct dp_soc *soc)
  635. {
  636. int i;
  637. struct hal_reo_params reo_params;
  638. if (qdf_atomic_read(&soc->cmn_init_done))
  639. return 0;
  640. if (dp_peer_find_attach(soc))
  641. goto fail0;
  642. if (dp_hw_link_desc_pool_setup(soc))
  643. goto fail1;
  644. /* Setup SRNG rings */
  645. /* Common rings */
  646. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  647. WBM_RELEASE_RING_SIZE)) {
  648. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  649. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  650. goto fail1;
  651. }
  652. soc->num_tcl_data_rings = 0;
  653. /* Tx data rings */
  654. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  655. soc->num_tcl_data_rings =
  656. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  657. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  658. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  659. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  660. QDF_TRACE(QDF_MODULE_ID_DP,
  661. QDF_TRACE_LEVEL_ERROR,
  662. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  663. goto fail1;
  664. }
  665. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  666. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  667. QDF_TRACE(QDF_MODULE_ID_DP,
  668. QDF_TRACE_LEVEL_ERROR,
  669. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  670. goto fail1;
  671. }
  672. }
  673. } else {
  674. /* This will be incremented during per pdev ring setup */
  675. soc->num_tcl_data_rings = 0;
  676. }
  677. if (dp_tx_soc_attach(soc)) {
  678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  679. FL("dp_tx_soc_attach failed"));
  680. goto fail1;
  681. }
  682. /* TCL command and status rings */
  683. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  684. TCL_CMD_RING_SIZE)) {
  685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  686. FL("dp_srng_setup failed for tcl_cmd_ring"));
  687. goto fail1;
  688. }
  689. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  690. TCL_STATUS_RING_SIZE)) {
  691. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  692. FL("dp_srng_setup failed for tcl_status_ring"));
  693. goto fail1;
  694. }
  695. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  696. * descriptors
  697. */
  698. /* Rx data rings */
  699. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  700. soc->num_reo_dest_rings =
  701. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  702. QDF_TRACE(QDF_MODULE_ID_DP,
  703. QDF_TRACE_LEVEL_ERROR,
  704. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  705. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  706. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  707. i, 0, REO_DST_RING_SIZE)) {
  708. QDF_TRACE(QDF_MODULE_ID_DP,
  709. QDF_TRACE_LEVEL_ERROR,
  710. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  711. goto fail1;
  712. }
  713. }
  714. } else {
  715. /* This will be incremented during per pdev ring setup */
  716. soc->num_reo_dest_rings = 0;
  717. }
  718. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  719. /* REO reinjection ring */
  720. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  721. REO_REINJECT_RING_SIZE)) {
  722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  723. FL("dp_srng_setup failed for reo_reinject_ring"));
  724. goto fail1;
  725. }
  726. /* Rx release ring */
  727. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  728. RX_RELEASE_RING_SIZE)) {
  729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  730. FL("dp_srng_setup failed for rx_rel_ring"));
  731. goto fail1;
  732. }
  733. /* Rx exception ring */
  734. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  735. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  737. FL("dp_srng_setup failed for reo_exception_ring"));
  738. goto fail1;
  739. }
  740. /* REO command and status rings */
  741. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  742. REO_CMD_RING_SIZE)) {
  743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  744. FL("dp_srng_setup failed for reo_cmd_ring"));
  745. goto fail1;
  746. }
  747. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  748. TAILQ_INIT(&soc->rx.reo_cmd_list);
  749. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  750. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  751. REO_STATUS_RING_SIZE)) {
  752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  753. FL("dp_srng_setup failed for reo_status_ring"));
  754. goto fail1;
  755. }
  756. dp_soc_interrupt_attach(soc);
  757. /* Setup HW REO */
  758. qdf_mem_zero(&reo_params, sizeof(reo_params));
  759. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  760. reo_params.rx_hash_enabled = true;
  761. hal_reo_setup(soc->hal_soc, &reo_params);
  762. qdf_atomic_set(&soc->cmn_init_done, 1);
  763. return 0;
  764. fail1:
  765. /*
  766. * Cleanup will be done as part of soc_detach, which will
  767. * be called on pdev attach failure
  768. */
  769. fail0:
  770. return QDF_STATUS_E_FAILURE;
  771. }
  772. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  773. static void dp_lro_hash_setup(struct dp_soc *soc)
  774. {
  775. struct cdp_lro_hash_config lro_hash;
  776. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  777. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  779. FL("LRO disabled RX hash disabled"));
  780. return;
  781. }
  782. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  783. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  784. lro_hash.lro_enable = 1;
  785. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  786. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  787. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  788. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  789. }
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  791. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  792. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  793. LRO_IPV4_SEED_ARR_SZ));
  794. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  795. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  796. LRO_IPV6_SEED_ARR_SZ));
  797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  798. "lro_hash: lro_enable: 0x%x"
  799. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  800. lro_hash.lro_enable, lro_hash.tcp_flag,
  801. lro_hash.tcp_flag_mask);
  802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  803. FL("lro_hash: toeplitz_hash_ipv4:"));
  804. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  805. QDF_TRACE_LEVEL_ERROR,
  806. (void *)lro_hash.toeplitz_hash_ipv4,
  807. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  808. LRO_IPV4_SEED_ARR_SZ));
  809. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  810. FL("lro_hash: toeplitz_hash_ipv6:"));
  811. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  812. QDF_TRACE_LEVEL_ERROR,
  813. (void *)lro_hash.toeplitz_hash_ipv6,
  814. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  815. LRO_IPV6_SEED_ARR_SZ));
  816. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  817. if (soc->cdp_soc.ol_ops->lro_hash_config)
  818. (void)soc->cdp_soc.ol_ops->lro_hash_config
  819. (soc->osif_soc, &lro_hash);
  820. }
  821. /*
  822. * dp_rxdma_ring_setup() - configure the RX DMA rings
  823. * @soc: data path SoC handle
  824. * @pdev: Physical device handle
  825. *
  826. * Return: 0 - success, > 0 - failure
  827. */
  828. #ifdef QCA_HOST2FW_RXBUF_RING
  829. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  830. struct dp_pdev *pdev)
  831. {
  832. int max_mac_rings =
  833. wlan_cfg_get_num_mac_rings
  834. (pdev->wlan_cfg_ctx);
  835. int i;
  836. for (i = 0; i < max_mac_rings; i++) {
  837. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  838. "%s: pdev_id %d mac_id %d\n",
  839. __func__, pdev->pdev_id, i);
  840. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  841. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  842. QDF_TRACE(QDF_MODULE_ID_DP,
  843. QDF_TRACE_LEVEL_ERROR,
  844. FL("failed rx mac ring setup"));
  845. return QDF_STATUS_E_FAILURE;
  846. }
  847. }
  848. return QDF_STATUS_SUCCESS;
  849. }
  850. #else
  851. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  852. struct dp_pdev *pdev)
  853. {
  854. return QDF_STATUS_SUCCESS;
  855. }
  856. #endif
  857. /*
  858. * dp_pdev_attach_wifi3() - attach txrx pdev
  859. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  860. * @txrx_soc: Datapath SOC handle
  861. * @htc_handle: HTC handle for host-target interface
  862. * @qdf_osdev: QDF OS device
  863. * @pdev_id: PDEV ID
  864. *
  865. * Return: DP PDEV handle on success, NULL on failure
  866. */
  867. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  868. struct cdp_cfg *ctrl_pdev,
  869. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  870. {
  871. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  872. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  873. if (!pdev) {
  874. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  875. FL("DP PDEV memory allocation failed"));
  876. goto fail0;
  877. }
  878. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  879. if (!pdev->wlan_cfg_ctx) {
  880. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  881. FL("pdev cfg_attach failed"));
  882. qdf_mem_free(pdev);
  883. goto fail0;
  884. }
  885. pdev->soc = soc;
  886. pdev->osif_pdev = ctrl_pdev;
  887. pdev->pdev_id = pdev_id;
  888. soc->pdev_list[pdev_id] = pdev;
  889. TAILQ_INIT(&pdev->vdev_list);
  890. pdev->vdev_count = 0;
  891. if (dp_soc_cmn_setup(soc)) {
  892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  893. FL("dp_soc_cmn_setup failed"));
  894. goto fail1;
  895. }
  896. /* Setup per PDEV TCL rings if configured */
  897. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  898. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  899. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  900. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  901. FL("dp_srng_setup failed for tcl_data_ring"));
  902. goto fail1;
  903. }
  904. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  905. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  906. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  907. FL("dp_srng_setup failed for tx_comp_ring"));
  908. goto fail1;
  909. }
  910. soc->num_tcl_data_rings++;
  911. }
  912. /* Tx specific init */
  913. if (dp_tx_pdev_attach(pdev)) {
  914. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  915. FL("dp_tx_pdev_attach failed"));
  916. goto fail1;
  917. }
  918. /* Setup per PDEV REO rings if configured */
  919. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  920. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  921. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  922. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  923. FL("dp_srng_setup failed for reo_dest_ringn"));
  924. goto fail1;
  925. }
  926. soc->num_reo_dest_rings++;
  927. }
  928. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  929. RXDMA_REFILL_RING_SIZE)) {
  930. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  931. FL("dp_srng_setup failed rx refill ring"));
  932. goto fail1;
  933. }
  934. if (dp_rxdma_ring_setup(soc, pdev)) {
  935. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  936. FL("RXDMA ring config failed"));
  937. goto fail1;
  938. }
  939. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  940. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  942. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  943. goto fail1;
  944. }
  945. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  946. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  948. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  949. goto fail1;
  950. }
  951. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  952. RXDMA_MONITOR_STATUS, 0, pdev_id,
  953. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  955. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  956. goto fail1;
  957. }
  958. /* Rx specific init */
  959. if (dp_rx_pdev_attach(pdev)) {
  960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  961. FL("dp_rx_pdev_attach failed "));
  962. goto fail0;
  963. }
  964. DP_STATS_INIT(pdev);
  965. #ifndef CONFIG_WIN
  966. /* MCL */
  967. dp_local_peer_id_pool_init(pdev);
  968. #endif
  969. dp_lro_hash_setup(soc);
  970. return (struct cdp_pdev *)pdev;
  971. fail1:
  972. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  973. fail0:
  974. return NULL;
  975. }
  976. /*
  977. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  978. * @soc: data path SoC handle
  979. * @pdev: Physical device handle
  980. *
  981. * Return: void
  982. */
  983. #ifdef QCA_HOST2FW_RXBUF_RING
  984. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  985. struct dp_pdev *pdev)
  986. {
  987. int max_mac_rings =
  988. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  989. int i;
  990. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  991. max_mac_rings : MAX_RX_MAC_RINGS;
  992. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  993. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  994. RXDMA_BUF, 1);
  995. }
  996. #else
  997. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  998. struct dp_pdev *pdev)
  999. {
  1000. }
  1001. #endif
  1002. /*
  1003. * dp_pdev_detach_wifi3() - detach txrx pdev
  1004. * @txrx_pdev: Datapath PDEV handle
  1005. * @force: Force detach
  1006. *
  1007. */
  1008. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1009. {
  1010. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1011. struct dp_soc *soc = pdev->soc;
  1012. dp_tx_pdev_detach(pdev);
  1013. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1014. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1015. TCL_DATA, pdev->pdev_id);
  1016. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1017. WBM2SW_RELEASE, pdev->pdev_id);
  1018. }
  1019. dp_rx_pdev_detach(pdev);
  1020. /* Setup per PDEV REO rings if configured */
  1021. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1022. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1023. REO_DST, pdev->pdev_id);
  1024. }
  1025. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1026. dp_rxdma_ring_cleanup(soc, pdev);
  1027. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1028. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1029. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1030. RXDMA_MONITOR_STATUS, 0);
  1031. soc->pdev_list[pdev->pdev_id] = NULL;
  1032. qdf_mem_free(pdev);
  1033. }
  1034. /*
  1035. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1036. * @soc: DP SOC handle
  1037. */
  1038. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1039. {
  1040. struct reo_desc_list_node *desc;
  1041. struct dp_rx_tid *rx_tid;
  1042. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1043. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1044. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1045. rx_tid = &desc->rx_tid;
  1046. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1047. rx_tid->hw_qdesc_alloc_size,
  1048. rx_tid->hw_qdesc_vaddr_unaligned,
  1049. rx_tid->hw_qdesc_paddr_unaligned, 0);
  1050. qdf_mem_free(desc);
  1051. }
  1052. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1053. qdf_list_destroy(&soc->reo_desc_freelist);
  1054. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1055. }
  1056. /*
  1057. * dp_soc_detach_wifi3() - Detach txrx SOC
  1058. * @txrx_soc: DP SOC handle
  1059. *
  1060. */
  1061. static void dp_soc_detach_wifi3(void *txrx_soc)
  1062. {
  1063. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1064. int i;
  1065. qdf_atomic_set(&soc->cmn_init_done, 0);
  1066. dp_soc_interrupt_detach(soc);
  1067. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1068. if (soc->pdev_list[i])
  1069. dp_pdev_detach_wifi3(
  1070. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1071. }
  1072. dp_peer_find_detach(soc);
  1073. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1074. * SW descriptors
  1075. */
  1076. /* Free the ring memories */
  1077. /* Common rings */
  1078. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1079. /* Tx data rings */
  1080. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1081. dp_tx_soc_detach(soc);
  1082. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1083. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1084. TCL_DATA, i);
  1085. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1086. WBM2SW_RELEASE, i);
  1087. }
  1088. }
  1089. /* TCL command and status rings */
  1090. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1091. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1092. /* Rx data rings */
  1093. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1094. soc->num_reo_dest_rings =
  1095. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1096. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1097. /* TODO: Get number of rings and ring sizes
  1098. * from wlan_cfg
  1099. */
  1100. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1101. REO_DST, i);
  1102. }
  1103. }
  1104. /* REO reinjection ring */
  1105. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1106. /* Rx release ring */
  1107. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1108. /* Rx exception ring */
  1109. /* TODO: Better to store ring_type and ring_num in
  1110. * dp_srng during setup
  1111. */
  1112. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1113. /* REO command and status rings */
  1114. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1115. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1116. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1117. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1118. htt_soc_detach(soc->htt_handle);
  1119. dp_reo_desc_freelist_destroy(soc);
  1120. }
  1121. /*
  1122. * dp_rxdma_ring_config() - configure the RX DMA rings
  1123. *
  1124. * This function is used to configure the MAC rings.
  1125. * On MCL host provides buffers in Host2FW ring
  1126. * FW refills (copies) buffers to the ring and updates
  1127. * ring_idx in register
  1128. *
  1129. * @soc: data path SoC handle
  1130. * @pdev: Physical device handle
  1131. *
  1132. * Return: void
  1133. */
  1134. #ifdef QCA_HOST2FW_RXBUF_RING
  1135. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1136. {
  1137. int i;
  1138. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1139. struct dp_pdev *pdev = soc->pdev_list[i];
  1140. if (pdev) {
  1141. int mac_id = 0;
  1142. int j;
  1143. int max_mac_rings =
  1144. wlan_cfg_get_num_mac_rings
  1145. (pdev->wlan_cfg_ctx);
  1146. htt_srng_setup(soc->htt_handle, 0,
  1147. pdev->rx_refill_buf_ring.hal_srng,
  1148. RXDMA_BUF);
  1149. if (!soc->cdp_soc.ol_ops->
  1150. is_hw_dbs_2x2_capable()) {
  1151. max_mac_rings = 1;
  1152. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1153. QDF_TRACE_LEVEL_ERROR,
  1154. FL("DBS enabled, max_mac_rings %d\n"),
  1155. max_mac_rings);
  1156. } else {
  1157. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1158. QDF_TRACE_LEVEL_ERROR,
  1159. FL("DBS disabled max_mac_rings %d\n"),
  1160. max_mac_rings);
  1161. }
  1162. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1163. FL("pdev_id %d max_mac_rings %d\n"),
  1164. pdev->pdev_id, max_mac_rings);
  1165. for (j = 0; j < max_mac_rings; j++) {
  1166. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1167. QDF_TRACE_LEVEL_ERROR,
  1168. FL("mac_id %d\n"), mac_id);
  1169. htt_srng_setup(soc->htt_handle, mac_id,
  1170. pdev->rx_mac_buf_ring[j]
  1171. .hal_srng,
  1172. RXDMA_BUF);
  1173. mac_id++;
  1174. }
  1175. }
  1176. }
  1177. }
  1178. #else
  1179. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1180. {
  1181. int i;
  1182. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1183. struct dp_pdev *pdev = soc->pdev_list[i];
  1184. if (pdev) {
  1185. htt_srng_setup(soc->htt_handle, i,
  1186. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1187. }
  1188. }
  1189. }
  1190. #endif
  1191. /*
  1192. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1193. * @txrx_soc: Datapath SOC handle
  1194. */
  1195. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1196. {
  1197. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1198. htt_soc_attach_target(soc->htt_handle);
  1199. dp_rxdma_ring_config(soc);
  1200. DP_STATS_INIT(soc);
  1201. return 0;
  1202. }
  1203. /*
  1204. * dp_vdev_attach_wifi3() - attach txrx vdev
  1205. * @txrx_pdev: Datapath PDEV handle
  1206. * @vdev_mac_addr: MAC address of the virtual interface
  1207. * @vdev_id: VDEV Id
  1208. * @wlan_op_mode: VDEV operating mode
  1209. *
  1210. * Return: DP VDEV handle on success, NULL on failure
  1211. */
  1212. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1213. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1214. {
  1215. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1216. struct dp_soc *soc = pdev->soc;
  1217. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1218. if (!vdev) {
  1219. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1220. FL("DP VDEV memory allocation failed"));
  1221. goto fail0;
  1222. }
  1223. vdev->pdev = pdev;
  1224. vdev->vdev_id = vdev_id;
  1225. vdev->opmode = op_mode;
  1226. vdev->osdev = soc->osdev;
  1227. vdev->osif_rx = NULL;
  1228. vdev->osif_rsim_rx_decap = NULL;
  1229. vdev->osif_rx_mon = NULL;
  1230. vdev->osif_tx_free_ext = NULL;
  1231. vdev->osif_vdev = NULL;
  1232. vdev->delete.pending = 0;
  1233. vdev->safemode = 0;
  1234. vdev->drop_unenc = 1;
  1235. #ifdef notyet
  1236. vdev->filters_num = 0;
  1237. #endif
  1238. qdf_mem_copy(
  1239. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1240. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1241. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1242. /* TODO: Initialize default HTT meta data that will be used in
  1243. * TCL descriptors for packets transmitted from this VDEV
  1244. */
  1245. TAILQ_INIT(&vdev->peer_list);
  1246. /* add this vdev into the pdev's list */
  1247. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1248. pdev->vdev_count++;
  1249. dp_tx_vdev_attach(vdev);
  1250. #ifdef DP_INTR_POLL_BASED
  1251. if (pdev->vdev_count == 1)
  1252. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1253. #endif
  1254. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1255. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1256. return (struct cdp_vdev *)vdev;
  1257. fail0:
  1258. return NULL;
  1259. }
  1260. /**
  1261. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1262. * @vdev: Datapath VDEV handle
  1263. * @osif_vdev: OSIF vdev handle
  1264. * @txrx_ops: Tx and Rx operations
  1265. *
  1266. * Return: DP VDEV handle on success, NULL on failure
  1267. */
  1268. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1269. void *osif_vdev,
  1270. struct ol_txrx_ops *txrx_ops)
  1271. {
  1272. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1273. vdev->osif_vdev = osif_vdev;
  1274. vdev->osif_rx = txrx_ops->rx.rx;
  1275. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1276. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1277. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1278. #ifdef notyet
  1279. #if ATH_SUPPORT_WAPI
  1280. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1281. #endif
  1282. #if UMAC_SUPPORT_PROXY_ARP
  1283. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1284. #endif
  1285. #endif
  1286. /* TODO: Enable the following once Tx code is integrated */
  1287. txrx_ops->tx.tx = dp_tx_send;
  1288. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1289. "DP Vdev Register success");
  1290. }
  1291. /*
  1292. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1293. * @txrx_vdev: Datapath VDEV handle
  1294. * @callback: Callback OL_IF on completion of detach
  1295. * @cb_context: Callback context
  1296. *
  1297. */
  1298. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1299. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1300. {
  1301. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1302. struct dp_pdev *pdev = vdev->pdev;
  1303. struct dp_soc *soc = pdev->soc;
  1304. /* preconditions */
  1305. qdf_assert(vdev);
  1306. /* remove the vdev from its parent pdev's list */
  1307. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1308. /*
  1309. * Use peer_ref_mutex while accessing peer_list, in case
  1310. * a peer is in the process of being removed from the list.
  1311. */
  1312. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1313. /* check that the vdev has no peers allocated */
  1314. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1315. /* debug print - will be removed later */
  1316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1317. FL("not deleting vdev object %p (%pM)"
  1318. "until deletion finishes for all its peers"),
  1319. vdev, vdev->mac_addr.raw);
  1320. /* indicate that the vdev needs to be deleted */
  1321. vdev->delete.pending = 1;
  1322. vdev->delete.callback = callback;
  1323. vdev->delete.context = cb_context;
  1324. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1325. return;
  1326. }
  1327. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1328. dp_tx_vdev_detach(vdev);
  1329. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1330. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1331. qdf_mem_free(vdev);
  1332. if (callback)
  1333. callback(cb_context);
  1334. }
  1335. /*
  1336. * dp_peer_create_wifi3() - attach txrx peer
  1337. * @txrx_vdev: Datapath VDEV handle
  1338. * @peer_mac_addr: Peer MAC address
  1339. *
  1340. * Return: DP peeer handle on success, NULL on failure
  1341. */
  1342. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1343. uint8_t *peer_mac_addr)
  1344. {
  1345. struct dp_peer *peer;
  1346. int i;
  1347. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1348. struct dp_pdev *pdev;
  1349. struct dp_soc *soc;
  1350. /* preconditions */
  1351. qdf_assert(vdev);
  1352. qdf_assert(peer_mac_addr);
  1353. pdev = vdev->pdev;
  1354. soc = pdev->soc;
  1355. #ifdef notyet
  1356. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1357. soc->mempool_ol_ath_peer);
  1358. #else
  1359. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1360. #endif
  1361. if (!peer)
  1362. return NULL; /* failure */
  1363. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1364. qdf_spinlock_create(&peer->peer_info_lock);
  1365. /* store provided params */
  1366. peer->vdev = vdev;
  1367. qdf_mem_copy(
  1368. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1369. /* TODO: See of rx_opt_proc is really required */
  1370. peer->rx_opt_proc = soc->rx_opt_proc;
  1371. /* initialize the peer_id */
  1372. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1373. peer->peer_ids[i] = HTT_INVALID_PEER;
  1374. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1375. qdf_atomic_init(&peer->ref_cnt);
  1376. /* keep one reference for attach */
  1377. qdf_atomic_inc(&peer->ref_cnt);
  1378. /* add this peer into the vdev's list */
  1379. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1380. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1381. /* TODO: See if hash based search is required */
  1382. dp_peer_find_hash_add(soc, peer);
  1383. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1384. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1385. vdev, peer, peer->mac_addr.raw,
  1386. qdf_atomic_read(&peer->ref_cnt));
  1387. /*
  1388. * For every peer MAp message search and set if bss_peer
  1389. */
  1390. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1391. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1392. "vdev bss_peer!!!!");
  1393. peer->bss_peer = 1;
  1394. vdev->vap_bss_peer = peer;
  1395. }
  1396. #ifndef CONFIG_WIN
  1397. dp_local_peer_id_alloc(pdev, peer);
  1398. #endif
  1399. return (void *)peer;
  1400. }
  1401. /*
  1402. * dp_peer_setup_wifi3() - initialize the peer
  1403. * @vdev_hdl: virtual device object
  1404. * @peer: Peer object
  1405. *
  1406. * Return: void
  1407. */
  1408. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1409. {
  1410. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1411. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1412. struct dp_pdev *pdev;
  1413. struct dp_soc *soc;
  1414. bool hash_based = 0;
  1415. /* preconditions */
  1416. qdf_assert(vdev);
  1417. qdf_assert(peer);
  1418. pdev = vdev->pdev;
  1419. soc = pdev->soc;
  1420. dp_peer_rx_init(pdev, peer);
  1421. peer->last_assoc_rcvd = 0;
  1422. peer->last_disassoc_rcvd = 0;
  1423. peer->last_deauth_rcvd = 0;
  1424. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1425. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1426. FL("hash based steering %d\n"), hash_based);
  1427. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1428. /* TODO: Check the destination ring number to be passed to FW */
  1429. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1430. pdev->osif_pdev, peer->mac_addr.raw,
  1431. peer->vdev->vdev_id, hash_based, 1);
  1432. }
  1433. return;
  1434. }
  1435. /*
  1436. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1437. * @vdev_handle: virtual device object
  1438. * @htt_pkt_type: type of pkt
  1439. *
  1440. * Return: void
  1441. */
  1442. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1443. enum htt_cmn_pkt_type val)
  1444. {
  1445. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1446. vdev->tx_encap_type = val;
  1447. }
  1448. /*
  1449. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1450. * @vdev_handle: virtual device object
  1451. * @htt_pkt_type: type of pkt
  1452. *
  1453. * Return: void
  1454. */
  1455. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1456. enum htt_cmn_pkt_type val)
  1457. {
  1458. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1459. vdev->rx_decap_type = val;
  1460. }
  1461. /*
  1462. * dp_peer_authorize() - authorize txrx peer
  1463. * @peer_handle: Datapath peer handle
  1464. * @authorize
  1465. *
  1466. */
  1467. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1468. {
  1469. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1470. struct dp_soc *soc;
  1471. if (peer != NULL) {
  1472. soc = peer->vdev->pdev->soc;
  1473. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1474. peer->authorize = authorize ? 1 : 0;
  1475. #ifdef notyet /* ATH_BAND_STEERING */
  1476. peer->peer_bs_inact_flag = 0;
  1477. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1478. #endif
  1479. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1480. }
  1481. }
  1482. /*
  1483. * dp_peer_unref_delete() - unref and delete peer
  1484. * @peer_handle: Datapath peer handle
  1485. *
  1486. */
  1487. void dp_peer_unref_delete(void *peer_handle)
  1488. {
  1489. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1490. struct dp_vdev *vdev = peer->vdev;
  1491. struct dp_soc *soc = vdev->pdev->soc;
  1492. struct dp_peer *tmppeer;
  1493. int found = 0;
  1494. uint16_t peer_id;
  1495. /*
  1496. * Hold the lock all the way from checking if the peer ref count
  1497. * is zero until the peer references are removed from the hash
  1498. * table and vdev list (if the peer ref count is zero).
  1499. * This protects against a new HL tx operation starting to use the
  1500. * peer object just after this function concludes it's done being used.
  1501. * Furthermore, the lock needs to be held while checking whether the
  1502. * vdev's list of peers is empty, to make sure that list is not modified
  1503. * concurrently with the empty check.
  1504. */
  1505. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1506. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1507. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1508. peer, qdf_atomic_read(&peer->ref_cnt));
  1509. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1510. peer_id = peer->peer_ids[0];
  1511. /*
  1512. * Make sure that the reference to the peer in
  1513. * peer object map is removed
  1514. */
  1515. if (peer_id != HTT_INVALID_PEER)
  1516. soc->peer_id_to_obj_map[peer_id] = NULL;
  1517. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1518. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1519. /* remove the reference to the peer from the hash table */
  1520. dp_peer_find_hash_remove(soc, peer);
  1521. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1522. if (tmppeer == peer) {
  1523. found = 1;
  1524. break;
  1525. }
  1526. }
  1527. if (found) {
  1528. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1529. peer_list_elem);
  1530. } else {
  1531. /*Ignoring the remove operation as peer not found*/
  1532. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1533. "peer %p not found in vdev (%p)->peer_list:%p",
  1534. peer, vdev, &peer->vdev->peer_list);
  1535. }
  1536. /* cleanup the peer data */
  1537. dp_peer_cleanup(vdev, peer);
  1538. /* check whether the parent vdev has no peers left */
  1539. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1540. /*
  1541. * Now that there are no references to the peer, we can
  1542. * release the peer reference lock.
  1543. */
  1544. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1545. /*
  1546. * Check if the parent vdev was waiting for its peers
  1547. * to be deleted, in order for it to be deleted too.
  1548. */
  1549. if (vdev->delete.pending) {
  1550. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1551. vdev->delete.callback;
  1552. void *vdev_delete_context =
  1553. vdev->delete.context;
  1554. QDF_TRACE(QDF_MODULE_ID_DP,
  1555. QDF_TRACE_LEVEL_INFO_HIGH,
  1556. FL("deleting vdev object %p (%pM)"
  1557. " - its last peer is done"),
  1558. vdev, vdev->mac_addr.raw);
  1559. /* all peers are gone, go ahead and delete it */
  1560. qdf_mem_free(vdev);
  1561. if (vdev_delete_cb)
  1562. vdev_delete_cb(vdev_delete_context);
  1563. }
  1564. } else {
  1565. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1566. }
  1567. #ifdef notyet
  1568. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1569. #else
  1570. qdf_mem_free(peer);
  1571. #endif
  1572. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1573. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc,
  1574. vdev->vdev_id, peer->mac_addr.raw);
  1575. }
  1576. } else {
  1577. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1578. }
  1579. }
  1580. /*
  1581. * dp_peer_detach_wifi3() – Detach txrx peer
  1582. * @peer_handle: Datapath peer handle
  1583. *
  1584. */
  1585. static void dp_peer_delete_wifi3(void *peer_handle)
  1586. {
  1587. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1588. /* redirect the peer's rx delivery function to point to a
  1589. * discard func
  1590. */
  1591. peer->rx_opt_proc = dp_rx_discard;
  1592. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1593. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1594. #ifndef CONFIG_WIN
  1595. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1596. #endif
  1597. qdf_spinlock_destroy(&peer->peer_info_lock);
  1598. /*
  1599. * Remove the reference added during peer_attach.
  1600. * The peer will still be left allocated until the
  1601. * PEER_UNMAP message arrives to remove the other
  1602. * reference, added by the PEER_MAP message.
  1603. */
  1604. dp_peer_unref_delete(peer_handle);
  1605. }
  1606. /*
  1607. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1608. * @peer_handle: Datapath peer handle
  1609. *
  1610. */
  1611. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1612. {
  1613. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1614. return vdev->mac_addr.raw;
  1615. }
  1616. /*
  1617. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1618. * @peer_handle: Datapath peer handle
  1619. *
  1620. */
  1621. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1622. uint8_t vdev_id)
  1623. {
  1624. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1625. struct dp_vdev *vdev = NULL;
  1626. if (qdf_unlikely(!pdev))
  1627. return NULL;
  1628. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1629. if (vdev->vdev_id == vdev_id)
  1630. break;
  1631. }
  1632. return (struct cdp_vdev *)vdev;
  1633. }
  1634. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1635. {
  1636. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1637. return vdev->opmode;
  1638. }
  1639. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1640. {
  1641. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1642. struct dp_pdev *pdev = vdev->pdev;
  1643. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1644. }
  1645. #ifdef MESH_MODE_SUPPORT
  1646. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  1647. {
  1648. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1650. FL("val %d"), val);
  1651. vdev->mesh_vdev = val;
  1652. }
  1653. /*
  1654. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  1655. * @vdev_hdl: virtual device object
  1656. * @val: value to be set
  1657. *
  1658. * Return: void
  1659. */
  1660. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  1661. {
  1662. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1664. FL("val %d"), val);
  1665. vdev->mesh_rx_filter = val;
  1666. }
  1667. #endif
  1668. static struct cdp_cmn_ops dp_ops_cmn = {
  1669. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1670. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1671. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1672. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1673. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1674. .txrx_peer_create = dp_peer_create_wifi3,
  1675. .txrx_peer_setup = dp_peer_setup_wifi3,
  1676. .txrx_peer_teardown = NULL,
  1677. .txrx_peer_delete = dp_peer_delete_wifi3,
  1678. .txrx_vdev_register = dp_vdev_register_wifi3,
  1679. .txrx_soc_detach = dp_soc_detach_wifi3,
  1680. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1681. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1682. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1683. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  1684. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  1685. .delba_process = dp_delba_process_wifi3,
  1686. /* TODO: Add other functions */
  1687. };
  1688. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1689. .txrx_peer_authorize = dp_peer_authorize,
  1690. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  1691. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  1692. #ifdef MESH_MODE_SUPPORT
  1693. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  1694. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  1695. #endif
  1696. /* TODO: Add other functions */
  1697. };
  1698. static struct cdp_me_ops dp_ops_me = {
  1699. /* TODO */
  1700. };
  1701. static struct cdp_mon_ops dp_ops_mon = {
  1702. /* TODO */
  1703. };
  1704. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1705. .txrx_host_stats_get = dp_print_host_stats,
  1706. /* TODO */
  1707. };
  1708. static struct cdp_wds_ops dp_ops_wds = {
  1709. /* TODO */
  1710. };
  1711. static struct cdp_raw_ops dp_ops_raw = {
  1712. /* TODO */
  1713. };
  1714. #ifdef CONFIG_WIN
  1715. static struct cdp_pflow_ops dp_ops_pflow = {
  1716. /* TODO */
  1717. };
  1718. #endif /* CONFIG_WIN */
  1719. #ifndef CONFIG_WIN
  1720. static struct cdp_misc_ops dp_ops_misc = {
  1721. .get_opmode = dp_get_opmode,
  1722. };
  1723. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1724. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1725. };
  1726. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1727. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1728. };
  1729. static struct cdp_ipa_ops dp_ops_ipa = {
  1730. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1731. };
  1732. static struct cdp_lro_ops dp_ops_lro = {
  1733. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1734. };
  1735. /**
  1736. * dp_dummy_bus_suspend() - dummy bus suspend op
  1737. *
  1738. * FIXME - This is a placeholder for the actual logic!
  1739. *
  1740. * Return: QDF_STATUS_SUCCESS
  1741. */
  1742. inline QDF_STATUS dp_dummy_bus_suspend(void)
  1743. {
  1744. return QDF_STATUS_SUCCESS;
  1745. }
  1746. /**
  1747. * dp_dummy_bus_resume() - dummy bus resume
  1748. *
  1749. * FIXME - This is a placeholder for the actual logic!
  1750. *
  1751. * Return: QDF_STATUS_SUCCESS
  1752. */
  1753. inline QDF_STATUS dp_dummy_bus_resume(void)
  1754. {
  1755. return QDF_STATUS_SUCCESS;
  1756. }
  1757. static struct cdp_bus_ops dp_ops_bus = {
  1758. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1759. .bus_suspend = dp_dummy_bus_suspend,
  1760. .bus_resume = dp_dummy_bus_resume
  1761. };
  1762. static struct cdp_ocb_ops dp_ops_ocb = {
  1763. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1764. };
  1765. static struct cdp_throttle_ops dp_ops_throttle = {
  1766. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1767. };
  1768. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1769. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1770. };
  1771. static struct cdp_cfg_ops dp_ops_cfg = {
  1772. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1773. };
  1774. static struct cdp_peer_ops dp_ops_peer = {
  1775. .register_peer = dp_register_peer,
  1776. .clear_peer = dp_clear_peer,
  1777. .find_peer_by_addr = dp_find_peer_by_addr,
  1778. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1779. .local_peer_id = dp_local_peer_id,
  1780. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1781. .peer_state_update = dp_peer_state_update,
  1782. .get_vdevid = dp_get_vdevid,
  1783. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1784. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1785. .get_peer_state = dp_get_peer_state,
  1786. .last_assoc_received = dp_get_last_assoc_received,
  1787. .last_disassoc_received = dp_get_last_disassoc_received,
  1788. .last_deauth_received = dp_get_last_deauth_received,
  1789. };
  1790. #endif
  1791. static struct cdp_ops dp_txrx_ops = {
  1792. .cmn_drv_ops = &dp_ops_cmn,
  1793. .ctrl_ops = &dp_ops_ctrl,
  1794. .me_ops = &dp_ops_me,
  1795. .mon_ops = &dp_ops_mon,
  1796. .host_stats_ops = &dp_ops_host_stats,
  1797. .wds_ops = &dp_ops_wds,
  1798. .raw_ops = &dp_ops_raw,
  1799. #ifdef CONFIG_WIN
  1800. .pflow_ops = &dp_ops_pflow,
  1801. #endif /* CONFIG_WIN */
  1802. #ifndef CONFIG_WIN
  1803. .misc_ops = &dp_ops_misc,
  1804. .cfg_ops = &dp_ops_cfg,
  1805. .flowctl_ops = &dp_ops_flowctl,
  1806. .l_flowctl_ops = &dp_ops_l_flowctl,
  1807. .ipa_ops = &dp_ops_ipa,
  1808. .lro_ops = &dp_ops_lro,
  1809. .bus_ops = &dp_ops_bus,
  1810. .ocb_ops = &dp_ops_ocb,
  1811. .peer_ops = &dp_ops_peer,
  1812. .throttle_ops = &dp_ops_throttle,
  1813. .mob_stats_ops = &dp_ops_mob_stats,
  1814. #endif
  1815. };
  1816. /*
  1817. * dp_soc_attach_wifi3() - Attach txrx SOC
  1818. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1819. * @htc_handle: Opaque HTC handle
  1820. * @hif_handle: Opaque HIF handle
  1821. * @qdf_osdev: QDF device
  1822. *
  1823. * Return: DP SOC handle on success, NULL on failure
  1824. */
  1825. /*
  1826. * Local prototype added to temporarily address warning caused by
  1827. * -Wmissing-prototypes. A more correct solution, namely to expose
  1828. * a prototype in an appropriate header file, will come later.
  1829. */
  1830. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1831. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1832. struct ol_if_ops *ol_ops);
  1833. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1834. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1835. struct ol_if_ops *ol_ops)
  1836. {
  1837. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1838. if (!soc) {
  1839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1840. FL("DP SOC memory allocation failed"));
  1841. goto fail0;
  1842. }
  1843. soc->cdp_soc.ops = &dp_txrx_ops;
  1844. soc->cdp_soc.ol_ops = ol_ops;
  1845. soc->osif_soc = osif_soc;
  1846. soc->osdev = qdf_osdev;
  1847. soc->hif_handle = hif_handle;
  1848. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1849. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1850. soc->hal_soc, qdf_osdev);
  1851. if (!soc->htt_handle) {
  1852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1853. FL("HTT attach failed"));
  1854. goto fail1;
  1855. }
  1856. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1857. if (!soc->wlan_cfg_ctx) {
  1858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1859. FL("wlan_cfg_soc_attach failed"));
  1860. goto fail2;
  1861. }
  1862. qdf_spinlock_create(&soc->peer_ref_mutex);
  1863. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1864. goto fail2;
  1865. }
  1866. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  1867. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  1868. return (void *)soc;
  1869. fail2:
  1870. htt_soc_detach(soc->htt_handle);
  1871. fail1:
  1872. qdf_mem_free(soc);
  1873. fail0:
  1874. return NULL;
  1875. }
  1876. /*
  1877. * dp_print_host_stats()- Function to print the stats aggregated at host
  1878. * @vdev_handle: DP_VDEV handle
  1879. * @req: ol_txrx_stats_req
  1880. * @type: host stats type
  1881. *
  1882. * Available Stat types
  1883. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  1884. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  1885. * TXRX_TX_HOST_STATS: Print Tx Stats
  1886. * TXRX_RX_HOST_STATS: Print Rx Stats
  1887. * TXRX_CLEAR_STATS: Clear the stats
  1888. *
  1889. * Return: 0 on success
  1890. */
  1891. int
  1892. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  1893. enum cdp_host_txrx_stats type)
  1894. {
  1895. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1896. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1897. switch (type) {
  1898. case TXRX_RX_RATE_STATS:
  1899. dp_print_rx_rates(vdev);
  1900. break;
  1901. case TXRX_TX_RATE_STATS:
  1902. dp_print_tx_rates(vdev);
  1903. break;
  1904. case TXRX_TX_HOST_STATS:
  1905. dp_print_pdev_tx_stats(pdev);
  1906. dp_print_soc_tx_stats(pdev->soc);
  1907. break;
  1908. case TXRX_RX_HOST_STATS:
  1909. dp_print_pdev_rx_stats(pdev);
  1910. dp_print_soc_rx_stats(pdev->soc);
  1911. break;
  1912. case TXRX_CLEAR_STATS:
  1913. dp_txrx_host_stats_clr(vdev);
  1914. break;
  1915. default:
  1916. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1917. "Wrong Input For TxRx Host Stats");
  1918. break;
  1919. }
  1920. return 0;
  1921. }
  1922. /*
  1923. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  1924. * @pdev: DP_PDEV Handle
  1925. *
  1926. * Return:void
  1927. */
  1928. void
  1929. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  1930. {
  1931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1932. "\n WLAN Tx Stats\n");
  1933. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1934. " Received From Stack\n");
  1935. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1936. " Total Packets Received: %d ",
  1937. pdev->stats.tx.rcvd.num);
  1938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1939. " Bytes Sent: %d ",
  1940. pdev->stats.tx.rcvd.bytes);
  1941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1942. " Processed\n");
  1943. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1944. " Msdu Processed: %d ", pdev->stats.tx.processed.num);
  1945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1946. " Bytes Processed: %d ",
  1947. pdev->stats.tx.processed.bytes);
  1948. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1949. " Completions\n");
  1950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1951. " Msdu Sent: %d ", pdev->stats.tx.comp.comp_pkt.num);
  1952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1953. " Bytes Sent: %d ",
  1954. pdev->stats.tx.comp.comp_pkt.bytes);
  1955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1956. " Freed\n");
  1957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1958. " Msdus Freed: %d ", pdev->stats.tx.freed.num);
  1959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1960. " Bytes Freed: %d ", pdev->stats.tx.freed.bytes);
  1961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1962. " Dropped\n");
  1963. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1964. " Total Packets Dropped: %d ",
  1965. pdev->stats.tx.dropped.dropped_pkt.num);
  1966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1967. " Bytes Dropped: %d ",
  1968. pdev->stats.tx.dropped.dropped_pkt.bytes);
  1969. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1970. " Dma_map_error: %d ",
  1971. pdev->stats.tx.dropped.dma_map_error);
  1972. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1973. " Ring Full: %d ", pdev->stats.tx.dropped.ring_full);
  1974. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1975. " Fw Discard: %d ",
  1976. pdev->stats.tx.dropped.fw_discard);
  1977. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1978. " Fw Discard Retired: %d ",
  1979. pdev->stats.tx.dropped.fw_discard_retired);
  1980. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1981. " Firmware Discard Untransmitted: %d ",
  1982. pdev->stats.tx.dropped.firmware_discard_untransmitted);
  1983. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1984. " Mpdu Age Out: %d ",
  1985. pdev->stats.tx.dropped.mpdu_age_out);
  1986. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1987. " Firmware Discard Reason1: %d ",
  1988. pdev->stats.tx.dropped.firmware_discard_reason1);
  1989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1990. " Firmware Discard Reason2: %d ",
  1991. pdev->stats.tx.dropped.firmware_discard_reason2);
  1992. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1993. " Firmware Discard Reason3: %d ",
  1994. pdev->stats.tx.dropped.firmware_discard_reason3);
  1995. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1996. " Scatter Gather\n");
  1997. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1998. " Total Packets: %d ", pdev->stats.tx.sg.sg_pkt.num);
  1999. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2000. " Total Bytes: %d ", pdev->stats.tx.sg.sg_pkt.bytes);
  2001. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2002. " Dropped By Host: %d ",
  2003. pdev->stats.tx.sg.dropped_host);
  2004. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2005. " Dropped By Target: %d ",
  2006. pdev->stats.tx.sg.dropped_target);
  2007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2008. " Tso\n");
  2009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2010. " Number of Segments: %d ",
  2011. pdev->stats.tx.tso.num_seg);
  2012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2013. " Number Packets: %d ",
  2014. pdev->stats.tx.tso.tso_pkt.num);
  2015. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2016. " Total Bytes: %d ",
  2017. pdev->stats.tx.tso.tso_pkt.bytes);
  2018. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2019. " Dropped By Host: %d ",
  2020. pdev->stats.tx.tso.dropped_host);
  2021. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2022. " Mcast Enhancement\n");
  2023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2024. " Dropped: Map Errors: %d ",
  2025. pdev->stats.tx.mcast_en.dropped_map_error);
  2026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2027. " Dropped: Self Mac: %d ",
  2028. pdev->stats.tx.mcast_en.dropped_self_mac);
  2029. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2030. " Dropped: Send Fail: %d ",
  2031. pdev->stats.tx.mcast_en.dropped_send_fail);
  2032. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2033. " Total Unicast sent: %d ",
  2034. pdev->stats.tx.mcast_en.ucast);
  2035. }
  2036. /*
  2037. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2038. * @pdev: DP_PDEV Handle
  2039. *
  2040. * Return: void
  2041. */
  2042. void
  2043. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2044. {
  2045. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2046. "\n WLAN Rx Stats\n");
  2047. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2048. " Received From HW (Reo Dest Ring)\n");
  2049. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2050. " Total Packets Received: %d ",
  2051. pdev->stats.rx.rcvd_reo.num);
  2052. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2053. " Bytes Sent: %d ", pdev->stats.rx.rcvd_reo.bytes);
  2054. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2055. " Replenished\n");
  2056. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2057. " Total Packets Replenished: %d ",
  2058. pdev->stats.rx.replenished.num);
  2059. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2060. " Bytes Sent: %d ", pdev->stats.rx.replenished.bytes);
  2061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2062. " Buffers Added To Freelist: %d ",
  2063. pdev->stats.rx.buf_freelist);
  2064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2065. " Dropped\n");
  2066. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2067. " Total Packets With No Peer: %d ",
  2068. pdev->stats.rx.dropped.no_peer.num);
  2069. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2070. " Bytes Sent With No Peer: %d ",
  2071. pdev->stats.rx.dropped.no_peer.bytes);
  2072. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2073. " Total Packets With Msdu Not Done: %d ",
  2074. pdev->stats.rx.dropped.msdu_not_done.num);
  2075. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2076. " Bytes Sent With Msdu Not Done: %d ",
  2077. pdev->stats.rx.dropped.msdu_not_done.bytes);
  2078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2079. " Sent To Stack\n");
  2080. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2081. " Packets Sent To Stack: %d ",
  2082. pdev->stats.rx.to_stack.num);
  2083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2084. " Bytes Sent To Stack: %d ",
  2085. pdev->stats.rx.to_stack.bytes);
  2086. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2087. " Errors\n");
  2088. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2089. " Rxdma Ring Unititalized: %d",
  2090. pdev->stats.rx.err.rxdma_unitialized);
  2091. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2092. " Desc Alloc Failed: %d",
  2093. pdev->stats.rx.err.desc_alloc_fail);
  2094. }
  2095. /*
  2096. * dp_print_soc_tx_stats(): Print SOC level stats
  2097. * @soc DP_SOC Handle
  2098. *
  2099. * Return: void
  2100. */
  2101. void
  2102. dp_print_soc_tx_stats(struct dp_soc *soc)
  2103. {
  2104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2105. "\n SOC Tx Stats\n");
  2106. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2107. " Tx Descriptors In Use: %d ",
  2108. soc->stats.tx.desc_in_use);
  2109. }
  2110. /*
  2111. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2112. * @soc: DP_SOC Handle
  2113. *
  2114. * Return:void
  2115. */
  2116. void
  2117. dp_print_soc_rx_stats(struct dp_soc *soc)
  2118. {
  2119. uint32_t i;
  2120. char reo_error[DP_REO_ERR_LENGTH];
  2121. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2122. uint8_t index = 0;
  2123. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2124. "\n SOC Rx Stats\n");
  2125. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2126. " Errors\n");
  2127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2128. " Invalid RBM: %d ", soc->stats.rx.err.invalid_rbm);
  2129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2130. " Invalid Vdev: %d ", soc->stats.rx.err.invalid_vdev);
  2131. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2132. " Invalid Pdev: %d ", soc->stats.rx.err.invalid_pdev);
  2133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2134. " HAL Ring Access Fail: %d ",
  2135. soc->stats.rx.err.hal_ring_access_fail);
  2136. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2137. index += qdf_snprint(&rxdma_error[index],
  2138. DP_RXDMA_ERR_LENGTH - index,
  2139. " %d,", soc->stats.rx.err.rxdma_error[i]);
  2140. }
  2141. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2142. " RXDMA Error (0-31):%s", rxdma_error);
  2143. index = 0;
  2144. for (i = 0; i <= HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET; i++) {
  2145. index += qdf_snprint(&reo_error[index],
  2146. DP_REO_ERR_LENGTH - index,
  2147. " %d,", soc->stats.rx.err.reo_error[i]);
  2148. }
  2149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2150. " REO Error(0-14):%s", reo_error);
  2151. }
  2152. /*
  2153. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2154. * @vdev: DP_VDEV handle
  2155. *
  2156. * Return:void
  2157. */
  2158. void
  2159. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2160. {
  2161. DP_STATS_CLR(vdev->pdev);
  2162. DP_STATS_CLR(vdev->pdev->soc);
  2163. }
  2164. /*
  2165. * dp_print_rx_rates(): Print Rx rate stats
  2166. * @vdev: DP_VDEV handle
  2167. *
  2168. * Return:void
  2169. */
  2170. void
  2171. dp_print_rx_rates(struct dp_vdev *vdev)
  2172. {
  2173. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2174. uint8_t i;
  2175. uint8_t index = 0;
  2176. char mcs[DP_MCS_LENGTH];
  2177. char nss[DP_NSS_LENGTH];
  2178. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2179. "\n Rx Rate Info\n");
  2180. for (i = 0; i < MAX_MCS; i++) {
  2181. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2182. " %d,", pdev->stats.rx.mcs_count[i]);
  2183. }
  2184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2185. " MCS(0-11):%s", mcs);
  2186. index = 0;
  2187. for (i = 0; i < SS_COUNT; i++) {
  2188. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2189. " %d,", pdev->stats.rx.nss[i]);
  2190. }
  2191. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2192. " NSS(0-7):%s", nss);
  2193. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2194. "SGI: 0.8us:%d, 0.4us:%d, 1.6us:%d, 3.2us:%d,",
  2195. pdev->stats.rx.sgi_count[0],
  2196. pdev->stats.rx.sgi_count[1],
  2197. pdev->stats.rx.sgi_count[2],
  2198. pdev->stats.rx.sgi_count[3]);
  2199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2200. "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2201. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2202. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2204. "Reception Type:"
  2205. " SU:%d,"
  2206. " MU_MIMO:%d,"
  2207. " MU_OFDMA:%d,"
  2208. " MU_OFDMA_MIMO:%d",
  2209. pdev->stats.rx.reception_type[0],
  2210. pdev->stats.rx.reception_type[1],
  2211. pdev->stats.rx.reception_type[2],
  2212. pdev->stats.rx.reception_type[3]);
  2213. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2214. " Aggregation\n");
  2215. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2216. " Number of Msdu's Part of Ampdu: %d ",
  2217. pdev->stats.rx.ampdu_cnt);
  2218. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2219. " Number of Msdu's With No Mpdu Level Aggregation : %d",
  2220. pdev->stats.rx.non_ampdu_cnt);
  2221. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2222. " Number of Msdu's Part of Amsdu: %d",
  2223. pdev->stats.rx.amsdu_cnt);
  2224. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2225. " Number of Msdu's With No Msdu Level Aggregation: %d",
  2226. pdev->stats.rx.non_amsdu_cnt);
  2227. }
  2228. /*
  2229. * dp_print_tx_rates(): Print tx rates
  2230. * @vdev: DP_VDEV handle
  2231. *
  2232. * Return:void
  2233. */
  2234. void
  2235. dp_print_tx_rates(struct dp_vdev *vdev)
  2236. {
  2237. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2238. uint8_t i;
  2239. char mcs[DP_MCS_LENGTH];
  2240. uint8_t index = 0;
  2241. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2242. "\n Tx Rate Info\n");
  2243. for (i = 0; i < MAX_MCS; i++) {
  2244. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2245. " %d ", pdev->stats.tx.comp.mcs_count[i]);
  2246. }
  2247. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2248. " MCS(0-11):%s", mcs);
  2249. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2250. " MCS Invalid: %d ",
  2251. pdev->stats.tx.comp.mcs_count[MAX_MCS]);
  2252. }