main.c 125 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #ifdef SLATE_MODULE_ENABLED
  47. #include <linux/soc/qcom/slatecom_interface.h>
  48. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  49. #include <uapi/linux/slatecom_interface.h>
  50. #endif
  51. #include "main.h"
  52. #include "qmi.h"
  53. #include "debug.h"
  54. #include "power.h"
  55. #include "genl.h"
  56. #define MAX_PROP_SIZE 32
  57. #define NUM_LOG_PAGES 10
  58. #define NUM_LOG_LONG_PAGES 4
  59. #define ICNSS_MAGIC 0x5abc5abc
  60. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  61. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  62. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  63. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  64. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  65. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  66. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  67. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  68. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  69. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  70. #define ICNSS_MAX_PROBE_CNT 2
  71. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  72. #define PROBE_TIMEOUT 15000
  73. #define SMP2P_SOC_WAKE_TIMEOUT 500
  74. #ifdef CONFIG_ICNSS2_DEBUG
  75. static unsigned long qmi_timeout = 3000;
  76. module_param(qmi_timeout, ulong, 0600);
  77. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  78. #else
  79. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  80. #endif
  81. #define ICNSS_RECOVERY_TIMEOUT 60000
  82. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  83. #define ICNSS_CAL_TIMEOUT 40000
  84. static struct icnss_priv *penv;
  85. static struct work_struct wpss_loader;
  86. static struct work_struct wpss_ssr_work;
  87. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  88. #define ICNSS_EVENT_PENDING 2989
  89. #define ICNSS_EVENT_SYNC BIT(0)
  90. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  91. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  92. ICNSS_EVENT_SYNC)
  93. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  95. #define SMP2P_GET_MAX_RETRY 4
  96. #define SMP2P_GET_RETRY_DELAY_MS 500
  97. #define RAMDUMP_NUM_DEVICES 256
  98. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  99. #define WLAN_EN_TEMP_THRESHOLD 5000
  100. #define WLAN_EN_DELAY 500
  101. #define ICNSS_RPROC_LEN 10
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  141. priv->device_id == ADRASTEA_DEVICE_ID)
  142. icnss_wpss_unload(priv);
  143. return count;
  144. }
  145. static struct kobj_attribute icnss_sysfs_attribute =
  146. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  147. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  148. {
  149. if (atomic_inc_return(&priv->pm_count) != 1)
  150. return;
  151. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_stay_awake(&priv->pdev->dev);
  154. priv->stats.pm_stay_awake++;
  155. }
  156. static void icnss_pm_relax(struct icnss_priv *priv)
  157. {
  158. int r = atomic_dec_return(&priv->pm_count);
  159. WARN_ON(r < 0);
  160. if (r != 0)
  161. return;
  162. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  163. atomic_read(&priv->pm_count));
  164. pm_relax(&priv->pdev->dev);
  165. priv->stats.pm_relax++;
  166. }
  167. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  168. {
  169. switch (type) {
  170. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  171. return "SERVER_ARRIVE";
  172. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  173. return "SERVER_EXIT";
  174. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  175. return "FW_READY";
  176. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  177. return "REGISTER_DRIVER";
  178. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  179. return "UNREGISTER_DRIVER";
  180. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  181. return "PD_SERVICE_DOWN";
  182. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  183. return "FW_EARLY_CRASH_IND";
  184. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  185. return "IDLE_SHUTDOWN";
  186. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  187. return "IDLE_RESTART";
  188. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  189. return "FW_INIT_DONE";
  190. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  191. return "QDSS_TRACE_REQ_MEM";
  192. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  193. return "QDSS_TRACE_SAVE";
  194. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  195. return "QDSS_TRACE_FREE";
  196. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  197. return "M3_DUMP_UPLOAD";
  198. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  199. return "QDSS_TRACE_REQ_DATA";
  200. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  201. return "SUBSYS_RESTART_LEVEL";
  202. case ICNSS_DRIVER_EVENT_MAX:
  203. return "EVENT_MAX";
  204. }
  205. return "UNKNOWN";
  206. };
  207. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  208. {
  209. switch (type) {
  210. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  211. return "SOC_WAKE_REQUEST";
  212. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  213. return "SOC_WAKE_RELEASE";
  214. case ICNSS_SOC_WAKE_EVENT_MAX:
  215. return "SOC_EVENT_MAX";
  216. }
  217. return "UNKNOWN";
  218. };
  219. int icnss_driver_event_post(struct icnss_priv *priv,
  220. enum icnss_driver_event_type type,
  221. u32 flags, void *data)
  222. {
  223. struct icnss_driver_event *event;
  224. unsigned long irq_flags;
  225. int gfp = GFP_KERNEL;
  226. int ret = 0;
  227. if (!priv)
  228. return -ENODEV;
  229. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  230. icnss_driver_event_to_str(type), type, current->comm,
  231. flags, priv->state);
  232. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  233. icnss_pr_err("Invalid Event type: %d, can't post", type);
  234. return -EINVAL;
  235. }
  236. if (in_interrupt() || irqs_disabled())
  237. gfp = GFP_ATOMIC;
  238. event = kzalloc(sizeof(*event), gfp);
  239. if (event == NULL)
  240. return -ENOMEM;
  241. icnss_pm_stay_awake(priv);
  242. event->type = type;
  243. event->data = data;
  244. init_completion(&event->complete);
  245. event->ret = ICNSS_EVENT_PENDING;
  246. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  247. spin_lock_irqsave(&priv->event_lock, irq_flags);
  248. list_add_tail(&event->list, &priv->event_list);
  249. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  250. priv->stats.events[type].posted++;
  251. queue_work(priv->event_wq, &priv->event_work);
  252. if (!(flags & ICNSS_EVENT_SYNC))
  253. goto out;
  254. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  255. wait_for_completion(&event->complete);
  256. else
  257. ret = wait_for_completion_interruptible(&event->complete);
  258. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  259. icnss_driver_event_to_str(type), type, priv->state, ret,
  260. event->ret);
  261. spin_lock_irqsave(&priv->event_lock, irq_flags);
  262. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  263. event->sync = false;
  264. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  265. ret = -EINTR;
  266. goto out;
  267. }
  268. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  269. ret = event->ret;
  270. kfree(event);
  271. out:
  272. icnss_pm_relax(priv);
  273. return ret;
  274. }
  275. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  276. enum icnss_soc_wake_event_type type,
  277. u32 flags, void *data)
  278. {
  279. struct icnss_soc_wake_event *event;
  280. unsigned long irq_flags;
  281. int gfp = GFP_KERNEL;
  282. int ret = 0;
  283. if (!priv)
  284. return -ENODEV;
  285. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  286. icnss_soc_wake_event_to_str(type),
  287. type, current->comm, flags, priv->state);
  288. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  289. icnss_pr_err("Invalid Event type: %d, can't post", type);
  290. return -EINVAL;
  291. }
  292. if (in_interrupt() || irqs_disabled())
  293. gfp = GFP_ATOMIC;
  294. event = kzalloc(sizeof(*event), gfp);
  295. if (!event)
  296. return -ENOMEM;
  297. icnss_pm_stay_awake(priv);
  298. event->type = type;
  299. event->data = data;
  300. init_completion(&event->complete);
  301. event->ret = ICNSS_EVENT_PENDING;
  302. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  303. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  304. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  305. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  306. priv->stats.soc_wake_events[type].posted++;
  307. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  308. if (!(flags & ICNSS_EVENT_SYNC))
  309. goto out;
  310. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  311. wait_for_completion(&event->complete);
  312. else
  313. ret = wait_for_completion_interruptible(&event->complete);
  314. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  315. icnss_soc_wake_event_to_str(type),
  316. type, priv->state, ret, event->ret);
  317. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  318. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  319. event->sync = false;
  320. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  321. ret = -EINTR;
  322. goto out;
  323. }
  324. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  325. ret = event->ret;
  326. kfree(event);
  327. out:
  328. icnss_pm_relax(priv);
  329. return ret;
  330. }
  331. bool icnss_is_fw_ready(void)
  332. {
  333. if (!penv)
  334. return false;
  335. else
  336. return test_bit(ICNSS_FW_READY, &penv->state);
  337. }
  338. EXPORT_SYMBOL(icnss_is_fw_ready);
  339. void icnss_block_shutdown(bool status)
  340. {
  341. if (!penv)
  342. return;
  343. if (status) {
  344. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  345. reinit_completion(&penv->unblock_shutdown);
  346. } else {
  347. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  348. complete(&penv->unblock_shutdown);
  349. }
  350. }
  351. EXPORT_SYMBOL(icnss_block_shutdown);
  352. bool icnss_is_fw_down(void)
  353. {
  354. struct icnss_priv *priv = icnss_get_plat_priv();
  355. if (!priv)
  356. return false;
  357. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  358. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  359. test_bit(ICNSS_REJUVENATE, &priv->state);
  360. }
  361. EXPORT_SYMBOL(icnss_is_fw_down);
  362. unsigned long icnss_get_device_config(void)
  363. {
  364. struct icnss_priv *priv = icnss_get_plat_priv();
  365. if (!priv)
  366. return 0;
  367. return priv->device_config;
  368. }
  369. EXPORT_SYMBOL(icnss_get_device_config);
  370. bool icnss_is_rejuvenate(void)
  371. {
  372. if (!penv)
  373. return false;
  374. else
  375. return test_bit(ICNSS_REJUVENATE, &penv->state);
  376. }
  377. EXPORT_SYMBOL(icnss_is_rejuvenate);
  378. bool icnss_is_pdr(void)
  379. {
  380. if (!penv)
  381. return false;
  382. else
  383. return test_bit(ICNSS_PDR, &penv->state);
  384. }
  385. EXPORT_SYMBOL(icnss_is_pdr);
  386. static int icnss_send_smp2p(struct icnss_priv *priv,
  387. enum icnss_smp2p_msg_id msg_id,
  388. enum smp2p_out_entry smp2p_entry)
  389. {
  390. unsigned int value = 0;
  391. int ret;
  392. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  393. return -EINVAL;
  394. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  395. if (msg_id == ICNSS_RESET_MSG) {
  396. priv->smp2p_info[smp2p_entry].seq = 0;
  397. ret = qcom_smem_state_update_bits(
  398. priv->smp2p_info[smp2p_entry].smem_state,
  399. ICNSS_SMEM_VALUE_MASK,
  400. 0);
  401. if (ret)
  402. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  403. ret, icnss_smp2p_str[smp2p_entry]);
  404. return ret;
  405. }
  406. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  407. !test_bit(ICNSS_FW_READY, &priv->state)) {
  408. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  409. priv->state);
  410. return -EINVAL;
  411. }
  412. value |= priv->smp2p_info[smp2p_entry].seq++;
  413. value <<= ICNSS_SMEM_SEQ_NO_POS;
  414. value |= msg_id;
  415. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  416. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  417. reinit_completion(&penv->smp2p_soc_wake_wait);
  418. ret = qcom_smem_state_update_bits(
  419. priv->smp2p_info[smp2p_entry].smem_state,
  420. ICNSS_SMEM_VALUE_MASK,
  421. value);
  422. if (ret) {
  423. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  424. icnss_smp2p_str[smp2p_entry]);
  425. } else {
  426. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  427. msg_id == ICNSS_SOC_WAKE_REL) {
  428. if (!wait_for_completion_timeout(
  429. &priv->smp2p_soc_wake_wait,
  430. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  431. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  432. icnss_smp2p_str[smp2p_entry]);
  433. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  434. ICNSS_ASSERT(0);
  435. }
  436. }
  437. }
  438. return ret;
  439. }
  440. bool icnss_is_low_power(void)
  441. {
  442. if (!penv)
  443. return false;
  444. else
  445. return test_bit(ICNSS_LOW_POWER, &penv->state);
  446. }
  447. EXPORT_SYMBOL(icnss_is_low_power);
  448. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  449. {
  450. struct icnss_priv *priv = ctx;
  451. if (priv)
  452. priv->force_err_fatal = true;
  453. icnss_pr_err("Received force error fatal request from FW\n");
  454. return IRQ_HANDLED;
  455. }
  456. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  457. {
  458. struct icnss_priv *priv = ctx;
  459. struct icnss_uevent_fw_down_data fw_down_data = {0};
  460. icnss_pr_err("Received early crash indication from FW\n");
  461. if (priv) {
  462. if (priv->wpss_self_recovery_enabled)
  463. mod_timer(&priv->wpss_ssr_timer,
  464. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  465. set_bit(ICNSS_FW_DOWN, &priv->state);
  466. icnss_ignore_fw_timeout(true);
  467. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  468. clear_bit(ICNSS_FW_READY, &priv->state);
  469. fw_down_data.crashed = true;
  470. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  471. &fw_down_data);
  472. }
  473. }
  474. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  475. 0, NULL);
  476. return IRQ_HANDLED;
  477. }
  478. static void register_fw_error_notifications(struct device *dev)
  479. {
  480. struct icnss_priv *priv = dev_get_drvdata(dev);
  481. struct device_node *dev_node;
  482. int irq = 0, ret = 0;
  483. if (!priv)
  484. return;
  485. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  486. if (!dev_node) {
  487. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  488. return;
  489. }
  490. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  491. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  492. ret = irq = of_irq_get_byname(dev_node,
  493. "qcom,smp2p-force-fatal-error");
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  496. irq);
  497. return;
  498. }
  499. }
  500. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  501. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  502. "wlanfw-err", priv);
  503. if (ret < 0) {
  504. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  505. irq, ret);
  506. return;
  507. }
  508. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  509. priv->fw_error_fatal_irq = irq;
  510. }
  511. static void register_early_crash_notifications(struct device *dev)
  512. {
  513. struct icnss_priv *priv = dev_get_drvdata(dev);
  514. struct device_node *dev_node;
  515. int irq = 0, ret = 0;
  516. if (!priv)
  517. return;
  518. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  519. if (!dev_node) {
  520. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  521. return;
  522. }
  523. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  524. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  525. ret = irq = of_irq_get_byname(dev_node,
  526. "qcom,smp2p-early-crash-ind");
  527. if (ret < 0) {
  528. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  529. irq);
  530. return;
  531. }
  532. }
  533. ret = devm_request_threaded_irq(dev, irq, NULL,
  534. fw_crash_indication_handler,
  535. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  536. "wlanfw-early-crash-ind", priv);
  537. if (ret < 0) {
  538. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  539. irq, ret);
  540. return;
  541. }
  542. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  543. priv->fw_early_crash_irq = irq;
  544. }
  545. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  546. {
  547. struct thermal_zone_device *thermal_dev;
  548. const char *tsens;
  549. int ret;
  550. ret = of_property_read_string(priv->pdev->dev.of_node,
  551. "tsens",
  552. &tsens);
  553. if (ret)
  554. return ret;
  555. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  556. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  557. if (IS_ERR(thermal_dev)) {
  558. icnss_pr_err("Fail to get thermal zone. ret: %d",
  559. PTR_ERR(thermal_dev));
  560. return PTR_ERR(thermal_dev);
  561. }
  562. ret = thermal_zone_get_temp(thermal_dev, temp);
  563. if (ret)
  564. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  565. return ret;
  566. }
  567. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  568. {
  569. struct icnss_priv *priv = ctx;
  570. if (priv)
  571. complete(&priv->smp2p_soc_wake_wait);
  572. return IRQ_HANDLED;
  573. }
  574. static void register_soc_wake_notif(struct device *dev)
  575. {
  576. struct icnss_priv *priv = dev_get_drvdata(dev);
  577. struct device_node *dev_node;
  578. int irq = 0, ret = 0;
  579. if (!priv)
  580. return;
  581. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  582. if (!dev_node) {
  583. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  584. return;
  585. }
  586. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  587. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  588. ret = irq = of_irq_get_byname(dev_node,
  589. "qcom,smp2p-soc-wake-ack");
  590. if (ret < 0) {
  591. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  592. irq);
  593. return;
  594. }
  595. }
  596. ret = devm_request_threaded_irq(dev, irq, NULL,
  597. fw_soc_wake_ack_handler,
  598. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  599. IRQF_TRIGGER_FALLING,
  600. "wlanfw-soc-wake-ack", priv);
  601. if (ret < 0) {
  602. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  603. irq, ret);
  604. return;
  605. }
  606. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  607. priv->fw_soc_wake_ack_irq = irq;
  608. }
  609. int icnss_call_driver_uevent(struct icnss_priv *priv,
  610. enum icnss_uevent uevent, void *data)
  611. {
  612. struct icnss_uevent_data uevent_data;
  613. if (!priv->ops || !priv->ops->uevent)
  614. return 0;
  615. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  616. priv->state, uevent);
  617. uevent_data.uevent = uevent;
  618. uevent_data.data = data;
  619. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  620. }
  621. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  622. {
  623. int i;
  624. int ret = 0;
  625. ret = icnss_qmi_get_dms_mac(priv);
  626. if (ret == 0 && priv->dms.mac_valid)
  627. goto qmi_send;
  628. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  629. * Thus assert on failure to get MAC from DMS even after retries
  630. */
  631. if (priv->use_nv_mac) {
  632. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  633. if (priv->dms.mac_valid)
  634. break;
  635. ret = icnss_qmi_get_dms_mac(priv);
  636. if (ret != -EAGAIN)
  637. break;
  638. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  639. }
  640. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  641. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  642. ICNSS_ASSERT(0);
  643. return -EINVAL;
  644. }
  645. }
  646. qmi_send:
  647. if (priv->dms.mac_valid)
  648. ret =
  649. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  650. ARRAY_SIZE(priv->dms.mac));
  651. return ret;
  652. }
  653. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  654. enum smp2p_out_entry smp2p_entry)
  655. {
  656. int retry = 0;
  657. int error;
  658. if (priv->smp2p_info[smp2p_entry].smem_state)
  659. return;
  660. retry:
  661. priv->smp2p_info[smp2p_entry].smem_state =
  662. qcom_smem_state_get(&priv->pdev->dev,
  663. icnss_smp2p_str[smp2p_entry],
  664. &priv->smp2p_info[smp2p_entry].smem_bit);
  665. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  666. if (retry++ < SMP2P_GET_MAX_RETRY) {
  667. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  668. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  669. error, icnss_smp2p_str[smp2p_entry]);
  670. msleep(SMP2P_GET_RETRY_DELAY_MS);
  671. goto retry;
  672. }
  673. ICNSS_ASSERT(0);
  674. return;
  675. }
  676. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  677. }
  678. static inline
  679. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  680. {
  681. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  682. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  683. } else {
  684. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  685. }
  686. }
  687. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  688. {
  689. switch (val) {
  690. case WLAN_RF_SLATE:
  691. return WLFW_WLAN_RF_SLATE_V01;
  692. case WLAN_RF_APACHE:
  693. return WLFW_WLAN_RF_APACHE_V01;
  694. default:
  695. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  696. }
  697. }
  698. #ifdef SLATE_MODULE_ENABLED
  699. static void icnss_send_wlan_boot_init(void)
  700. {
  701. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  702. icnss_pr_info("sent wlan boot init command\n");
  703. }
  704. static void icnss_send_wlan_boot_complete(void)
  705. {
  706. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  707. icnss_pr_info("sent wlan boot complete command\n");
  708. }
  709. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  710. {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  718. return -EINVAL;
  719. icnss_send_wlan_boot_init();
  720. return 0;
  721. }
  722. #else
  723. static void icnss_send_wlan_boot_complete(void)
  724. {
  725. }
  726. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  727. {
  728. return 0;
  729. }
  730. #endif
  731. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  732. void *data)
  733. {
  734. int ret = 0;
  735. int temp = 0;
  736. bool ignore_assert = false;
  737. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  738. if (!priv)
  739. return -ENODEV;
  740. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  741. clear_bit(ICNSS_FW_DOWN, &priv->state);
  742. clear_bit(ICNSS_FW_READY, &priv->state);
  743. if (priv->is_slate_rfa) {
  744. ret = icnss_wait_for_slate_complete(priv);
  745. if (ret == -EINVAL) {
  746. icnss_pr_err("Slate complete failed\n");
  747. return ret;
  748. }
  749. }
  750. icnss_ignore_fw_timeout(false);
  751. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  752. icnss_pr_err("QMI Server already in Connected State\n");
  753. ICNSS_ASSERT(0);
  754. }
  755. ret = icnss_connect_to_fw_server(priv, data);
  756. if (ret)
  757. goto fail;
  758. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  759. ret = wlfw_ind_register_send_sync_msg(priv);
  760. if (ret < 0) {
  761. if (ret == -EALREADY) {
  762. ret = 0;
  763. goto qmi_registered;
  764. }
  765. ignore_assert = true;
  766. goto fail;
  767. }
  768. if (priv->is_rf_subtype_valid) {
  769. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  770. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  771. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  772. if (ret < 0)
  773. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  774. ret);
  775. } else {
  776. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  777. priv->rf_subtype);
  778. }
  779. }
  780. if (priv->device_id == WCN6750_DEVICE_ID ||
  781. priv->device_id == WCN6450_DEVICE_ID) {
  782. if (!icnss_get_temperature(priv, &temp)) {
  783. icnss_pr_dbg("Temperature: %d\n", temp);
  784. if (temp < WLAN_EN_TEMP_THRESHOLD)
  785. icnss_set_wlan_en_delay(priv);
  786. }
  787. ret = wlfw_host_cap_send_sync(priv);
  788. if (ret < 0)
  789. goto fail;
  790. }
  791. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  792. if (!priv->msa_va) {
  793. icnss_pr_err("Invalid MSA address\n");
  794. ret = -EINVAL;
  795. goto fail;
  796. }
  797. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  798. if (ret < 0) {
  799. ignore_assert = true;
  800. goto fail;
  801. }
  802. ret = wlfw_msa_ready_send_sync_msg(priv);
  803. if (ret < 0) {
  804. ignore_assert = true;
  805. goto fail;
  806. }
  807. }
  808. if (priv->device_id == WCN6450_DEVICE_ID)
  809. icnss_hw_power_off(priv);
  810. ret = wlfw_cap_send_sync_msg(priv);
  811. if (ret < 0) {
  812. ignore_assert = true;
  813. goto fail;
  814. }
  815. ret = icnss_hw_power_on(priv);
  816. if (ret)
  817. goto fail;
  818. if (priv->device_id == WCN6750_DEVICE_ID ||
  819. priv->device_id == WCN6450_DEVICE_ID) {
  820. ret = wlfw_device_info_send_msg(priv);
  821. if (ret < 0) {
  822. ignore_assert = true;
  823. goto device_info_failure;
  824. }
  825. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  826. priv->mem_base_pa,
  827. priv->mem_base_size);
  828. if (!priv->mem_base_va) {
  829. icnss_pr_err("Ioremap failed for bar address\n");
  830. goto device_info_failure;
  831. }
  832. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  833. &priv->mem_base_pa,
  834. priv->mem_base_va);
  835. if (priv->mhi_state_info_pa)
  836. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  837. priv->mhi_state_info_pa,
  838. PAGE_SIZE);
  839. if (!priv->mhi_state_info_va)
  840. icnss_pr_err("Ioremap failed for MHI info address\n");
  841. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  842. &priv->mhi_state_info_pa,
  843. priv->mhi_state_info_va);
  844. }
  845. if (priv->bdf_download_support) {
  846. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  847. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  848. priv->ctrl_params.bdf_type);
  849. if (ret < 0)
  850. goto device_info_failure;
  851. }
  852. if (priv->device_id == WCN6450_DEVICE_ID) {
  853. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  854. if (ret < 0)
  855. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  856. ret);
  857. }
  858. if (priv->device_id == WCN6750_DEVICE_ID ||
  859. priv->device_id == WCN6450_DEVICE_ID) {
  860. if (!priv->fw_soc_wake_ack_irq)
  861. register_soc_wake_notif(&priv->pdev->dev);
  862. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  863. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  864. }
  865. if (priv->wpss_supported)
  866. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  867. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  868. if (priv->bdf_download_support) {
  869. ret = wlfw_cal_report_req(priv);
  870. if (ret < 0)
  871. goto device_info_failure;
  872. }
  873. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  874. dynamic_feature_mask);
  875. }
  876. if (!priv->fw_error_fatal_irq)
  877. register_fw_error_notifications(&priv->pdev->dev);
  878. if (!priv->fw_early_crash_irq)
  879. register_early_crash_notifications(&priv->pdev->dev);
  880. if (priv->psf_supported)
  881. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  882. return ret;
  883. device_info_failure:
  884. icnss_hw_power_off(priv);
  885. fail:
  886. ICNSS_ASSERT(ignore_assert);
  887. qmi_registered:
  888. return ret;
  889. }
  890. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  891. {
  892. if (!priv)
  893. return -ENODEV;
  894. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  895. icnss_clear_server(priv);
  896. if (priv->psf_supported)
  897. priv->last_updated_voltage = 0;
  898. return 0;
  899. }
  900. static int icnss_call_driver_probe(struct icnss_priv *priv)
  901. {
  902. int ret = 0;
  903. int probe_cnt = 0;
  904. if (!priv->ops || !priv->ops->probe)
  905. return 0;
  906. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  907. return -EINVAL;
  908. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  909. icnss_hw_power_on(priv);
  910. icnss_block_shutdown(true);
  911. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  912. ret = priv->ops->probe(&priv->pdev->dev);
  913. probe_cnt++;
  914. if (ret != -EPROBE_DEFER)
  915. break;
  916. }
  917. if (ret < 0) {
  918. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  919. ret, priv->state, probe_cnt);
  920. icnss_block_shutdown(false);
  921. goto out;
  922. }
  923. icnss_block_shutdown(false);
  924. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  925. return 0;
  926. out:
  927. icnss_hw_power_off(priv);
  928. return ret;
  929. }
  930. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  931. {
  932. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  933. goto out;
  934. if (!priv->ops || !priv->ops->shutdown)
  935. goto out;
  936. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  937. goto out;
  938. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  939. priv->ops->shutdown(&priv->pdev->dev);
  940. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  941. out:
  942. return 0;
  943. }
  944. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  945. {
  946. int ret = 0;
  947. icnss_pm_relax(priv);
  948. icnss_call_driver_shutdown(priv);
  949. clear_bit(ICNSS_PDR, &priv->state);
  950. clear_bit(ICNSS_REJUVENATE, &priv->state);
  951. clear_bit(ICNSS_PD_RESTART, &priv->state);
  952. clear_bit(ICNSS_LOW_POWER, &priv->state);
  953. priv->early_crash_ind = false;
  954. priv->is_ssr = false;
  955. if (!priv->ops || !priv->ops->reinit)
  956. goto out;
  957. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  958. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  959. priv->state);
  960. goto out;
  961. }
  962. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  963. goto call_probe;
  964. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  965. icnss_hw_power_on(priv);
  966. icnss_block_shutdown(true);
  967. ret = priv->ops->reinit(&priv->pdev->dev);
  968. if (ret < 0) {
  969. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  970. ret, priv->state);
  971. if (!priv->allow_recursive_recovery)
  972. ICNSS_ASSERT(false);
  973. icnss_block_shutdown(false);
  974. goto out_power_off;
  975. }
  976. icnss_block_shutdown(false);
  977. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  978. return 0;
  979. call_probe:
  980. return icnss_call_driver_probe(priv);
  981. out_power_off:
  982. icnss_hw_power_off(priv);
  983. out:
  984. return ret;
  985. }
  986. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  987. {
  988. int ret = 0;
  989. if (!priv)
  990. return -ENODEV;
  991. del_timer(&priv->recovery_timer);
  992. set_bit(ICNSS_FW_READY, &priv->state);
  993. clear_bit(ICNSS_MODE_ON, &priv->state);
  994. atomic_set(&priv->soc_wake_ref_count, 0);
  995. if (priv->device_id == WCN6750_DEVICE_ID ||
  996. priv->device_id == WCN6450_DEVICE_ID)
  997. icnss_free_qdss_mem(priv);
  998. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  999. icnss_hw_power_off(priv);
  1000. if (!priv->pdev) {
  1001. icnss_pr_err("Device is not ready\n");
  1002. ret = -ENODEV;
  1003. goto out;
  1004. }
  1005. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1006. icnss_send_wlan_boot_complete();
  1007. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1008. ret = icnss_pd_restart_complete(priv);
  1009. } else {
  1010. if (priv->wpss_supported)
  1011. icnss_setup_dms_mac(priv);
  1012. ret = icnss_call_driver_probe(priv);
  1013. }
  1014. icnss_vreg_unvote(priv);
  1015. out:
  1016. return ret;
  1017. }
  1018. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1019. {
  1020. int ret = 0;
  1021. if (!priv)
  1022. return -ENODEV;
  1023. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1024. if (priv->device_id == WCN6750_DEVICE_ID) {
  1025. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1026. if (ret < 0)
  1027. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1028. ret);
  1029. }
  1030. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1031. mod_timer(&priv->recovery_timer,
  1032. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1033. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1034. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1035. } else {
  1036. icnss_driver_event_fw_ready_ind(priv, NULL);
  1037. }
  1038. return ret;
  1039. }
  1040. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1041. {
  1042. struct platform_device *pdev = priv->pdev;
  1043. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1044. int i, j;
  1045. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1046. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1047. qdss_mem[i].va =
  1048. dma_alloc_coherent(&pdev->dev,
  1049. qdss_mem[i].size,
  1050. &qdss_mem[i].pa,
  1051. GFP_KERNEL);
  1052. if (!qdss_mem[i].va) {
  1053. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1054. qdss_mem[i].size,
  1055. qdss_mem[i].type, i);
  1056. break;
  1057. }
  1058. }
  1059. }
  1060. /* Best-effort allocation for QDSS trace */
  1061. if (i < priv->qdss_mem_seg_len) {
  1062. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1063. qdss_mem[j].type = 0;
  1064. qdss_mem[j].size = 0;
  1065. }
  1066. priv->qdss_mem_seg_len = i;
  1067. }
  1068. return 0;
  1069. }
  1070. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1071. {
  1072. struct platform_device *pdev = priv->pdev;
  1073. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1074. int i;
  1075. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1076. if (qdss_mem[i].va && qdss_mem[i].size) {
  1077. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1078. &qdss_mem[i].pa, qdss_mem[i].size,
  1079. qdss_mem[i].type);
  1080. dma_free_coherent(&pdev->dev,
  1081. qdss_mem[i].size, qdss_mem[i].va,
  1082. qdss_mem[i].pa);
  1083. qdss_mem[i].va = NULL;
  1084. qdss_mem[i].pa = 0;
  1085. qdss_mem[i].size = 0;
  1086. qdss_mem[i].type = 0;
  1087. }
  1088. }
  1089. priv->qdss_mem_seg_len = 0;
  1090. }
  1091. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1092. {
  1093. int ret = 0;
  1094. ret = icnss_alloc_qdss_mem(priv);
  1095. if (ret < 0)
  1096. return ret;
  1097. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1098. }
  1099. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1100. u64 pa, u32 size, int *seg_id)
  1101. {
  1102. int i = 0;
  1103. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1104. u64 offset = 0;
  1105. void *va = NULL;
  1106. u64 local_pa;
  1107. u32 local_size;
  1108. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1109. local_pa = (u64)qdss_mem[i].pa;
  1110. local_size = (u32)qdss_mem[i].size;
  1111. if (pa == local_pa && size <= local_size) {
  1112. va = qdss_mem[i].va;
  1113. break;
  1114. }
  1115. if (pa > local_pa &&
  1116. pa < local_pa + local_size &&
  1117. pa + size <= local_pa + local_size) {
  1118. offset = pa - local_pa;
  1119. va = qdss_mem[i].va + offset;
  1120. break;
  1121. }
  1122. }
  1123. *seg_id = i;
  1124. return va;
  1125. }
  1126. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1127. void *data)
  1128. {
  1129. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1130. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1131. int ret = 0;
  1132. int i;
  1133. void *va = NULL;
  1134. u64 pa;
  1135. u32 size;
  1136. int seg_id = 0;
  1137. if (!priv->qdss_mem_seg_len) {
  1138. icnss_pr_err("Memory for QDSS trace is not available\n");
  1139. return -ENOMEM;
  1140. }
  1141. if (event_data->mem_seg_len == 0) {
  1142. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1143. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1144. ICNSS_GENL_MSG_TYPE_QDSS,
  1145. event_data->file_name,
  1146. qdss_mem[i].size);
  1147. if (ret < 0) {
  1148. icnss_pr_err("Fail to save QDSS data: %d\n",
  1149. ret);
  1150. break;
  1151. }
  1152. }
  1153. } else {
  1154. for (i = 0; i < event_data->mem_seg_len; i++) {
  1155. pa = event_data->mem_seg[i].addr;
  1156. size = event_data->mem_seg[i].size;
  1157. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1158. size, &seg_id);
  1159. if (!va) {
  1160. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1161. &pa);
  1162. ret = -EINVAL;
  1163. break;
  1164. }
  1165. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1166. event_data->file_name, size);
  1167. if (ret < 0) {
  1168. icnss_pr_err("Fail to save QDSS data: %d\n",
  1169. ret);
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. kfree(data);
  1175. return ret;
  1176. }
  1177. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1178. {
  1179. int dec, c = atomic_read(v);
  1180. do {
  1181. dec = c - 1;
  1182. if (unlikely(dec < 1))
  1183. break;
  1184. } while (!atomic_try_cmpxchg(v, &c, dec));
  1185. return dec;
  1186. }
  1187. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1188. void *data)
  1189. {
  1190. int ret = 0;
  1191. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1192. if (!priv)
  1193. return -ENODEV;
  1194. if (!data)
  1195. return -EINVAL;
  1196. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1197. event_data->total_size);
  1198. kfree(data);
  1199. return ret;
  1200. }
  1201. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1202. {
  1203. int ret = 0;
  1204. if (!priv)
  1205. return -ENODEV;
  1206. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1207. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1208. atomic_read(&priv->soc_wake_ref_count));
  1209. return 0;
  1210. }
  1211. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1212. ICNSS_SMP2P_OUT_SOC_WAKE);
  1213. if (!ret)
  1214. atomic_inc(&priv->soc_wake_ref_count);
  1215. return ret;
  1216. }
  1217. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1218. {
  1219. int ret = 0;
  1220. if (!priv)
  1221. return -ENODEV;
  1222. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1223. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1224. priv->soc_wake_ref_count);
  1225. return 0;
  1226. }
  1227. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1228. ICNSS_SMP2P_OUT_SOC_WAKE);
  1229. return ret;
  1230. }
  1231. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1232. void *data)
  1233. {
  1234. int ret = 0;
  1235. int probe_cnt = 0;
  1236. if (priv->ops)
  1237. return -EEXIST;
  1238. priv->ops = data;
  1239. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1240. set_bit(ICNSS_FW_READY, &priv->state);
  1241. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1242. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1243. priv->state);
  1244. return -ENODEV;
  1245. }
  1246. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1247. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1248. priv->state);
  1249. goto out;
  1250. }
  1251. ret = icnss_hw_power_on(priv);
  1252. if (ret)
  1253. goto out;
  1254. icnss_block_shutdown(true);
  1255. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1256. ret = priv->ops->probe(&priv->pdev->dev);
  1257. probe_cnt++;
  1258. if (ret != -EPROBE_DEFER)
  1259. break;
  1260. }
  1261. if (ret) {
  1262. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1263. ret, priv->state, probe_cnt);
  1264. icnss_block_shutdown(false);
  1265. goto power_off;
  1266. }
  1267. icnss_block_shutdown(false);
  1268. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1269. return 0;
  1270. power_off:
  1271. icnss_hw_power_off(priv);
  1272. out:
  1273. return ret;
  1274. }
  1275. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1276. void *data)
  1277. {
  1278. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1279. priv->ops = NULL;
  1280. goto out;
  1281. }
  1282. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1283. icnss_block_shutdown(true);
  1284. if (priv->ops)
  1285. priv->ops->remove(&priv->pdev->dev);
  1286. icnss_block_shutdown(false);
  1287. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1288. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1289. priv->ops = NULL;
  1290. icnss_hw_power_off(priv);
  1291. out:
  1292. return 0;
  1293. }
  1294. static int icnss_fw_crashed(struct icnss_priv *priv,
  1295. struct icnss_event_pd_service_down_data *event_data)
  1296. {
  1297. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1298. set_bit(ICNSS_PD_RESTART, &priv->state);
  1299. clear_bit(ICNSS_FW_READY, &priv->state);
  1300. icnss_pm_stay_awake(priv);
  1301. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1302. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1303. if (event_data && event_data->fw_rejuvenate)
  1304. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1305. return 0;
  1306. }
  1307. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1308. struct icnss_uevent_hang_data *hang_data)
  1309. {
  1310. if (!priv->hang_event_data_va)
  1311. return -EINVAL;
  1312. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1313. priv->hang_event_data_len,
  1314. GFP_ATOMIC);
  1315. if (!priv->hang_event_data)
  1316. return -ENOMEM;
  1317. // Update the hang event params
  1318. hang_data->hang_event_data = priv->hang_event_data;
  1319. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1320. return 0;
  1321. }
  1322. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1323. {
  1324. struct icnss_uevent_hang_data hang_data = {0};
  1325. int ret = 0xFF;
  1326. if (priv->early_crash_ind) {
  1327. ret = icnss_update_hang_event_data(priv, &hang_data);
  1328. if (ret)
  1329. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1330. }
  1331. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1332. &hang_data);
  1333. if (!ret) {
  1334. kfree(priv->hang_event_data);
  1335. priv->hang_event_data = NULL;
  1336. }
  1337. return 0;
  1338. }
  1339. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1340. void *data)
  1341. {
  1342. struct icnss_event_pd_service_down_data *event_data = data;
  1343. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1344. icnss_ignore_fw_timeout(false);
  1345. goto out;
  1346. }
  1347. if (priv->force_err_fatal)
  1348. ICNSS_ASSERT(0);
  1349. if (priv->device_id == WCN6750_DEVICE_ID ||
  1350. priv->device_id == WCN6450_DEVICE_ID) {
  1351. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1352. ICNSS_SMP2P_OUT_SOC_WAKE);
  1353. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1354. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1355. }
  1356. if (priv->wpss_supported)
  1357. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1358. ICNSS_SMP2P_OUT_POWER_SAVE);
  1359. icnss_send_hang_event_data(priv);
  1360. if (priv->early_crash_ind) {
  1361. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1362. event_data->crashed, priv->state);
  1363. goto out;
  1364. }
  1365. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1366. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1367. event_data->crashed, priv->state);
  1368. if (!priv->allow_recursive_recovery)
  1369. ICNSS_ASSERT(0);
  1370. goto out;
  1371. }
  1372. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1373. icnss_fw_crashed(priv, event_data);
  1374. out:
  1375. kfree(data);
  1376. return 0;
  1377. }
  1378. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1379. void *data)
  1380. {
  1381. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1382. icnss_ignore_fw_timeout(false);
  1383. goto out;
  1384. }
  1385. priv->early_crash_ind = true;
  1386. icnss_fw_crashed(priv, NULL);
  1387. out:
  1388. kfree(data);
  1389. return 0;
  1390. }
  1391. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1392. void *data)
  1393. {
  1394. int ret = 0;
  1395. if (!priv->ops || !priv->ops->idle_shutdown)
  1396. return 0;
  1397. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1398. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1399. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1400. ret = -EBUSY;
  1401. } else {
  1402. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1403. priv->state);
  1404. icnss_block_shutdown(true);
  1405. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1406. icnss_block_shutdown(false);
  1407. }
  1408. return ret;
  1409. }
  1410. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1411. void *data)
  1412. {
  1413. int ret = 0;
  1414. if (!priv->ops || !priv->ops->idle_restart)
  1415. return 0;
  1416. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1417. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1418. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1419. ret = -EBUSY;
  1420. } else {
  1421. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1422. priv->state);
  1423. icnss_block_shutdown(true);
  1424. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1425. icnss_block_shutdown(false);
  1426. }
  1427. return ret;
  1428. }
  1429. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1430. {
  1431. icnss_free_qdss_mem(priv);
  1432. return 0;
  1433. }
  1434. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1435. void *data)
  1436. {
  1437. struct icnss_m3_upload_segments_req_data *event_data = data;
  1438. struct qcom_dump_segment segment;
  1439. int i, status = 0, ret = 0;
  1440. struct list_head head;
  1441. if (!dump_enabled()) {
  1442. icnss_pr_info("Dump collection is not enabled\n");
  1443. return ret;
  1444. }
  1445. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1446. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1447. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1448. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1449. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1450. return ret;
  1451. INIT_LIST_HEAD(&head);
  1452. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1453. memset(&segment, 0, sizeof(segment));
  1454. segment.va = devm_ioremap(&priv->pdev->dev,
  1455. event_data->m3_segment[i].addr,
  1456. event_data->m3_segment[i].size);
  1457. if (!segment.va) {
  1458. icnss_pr_err("Failed to ioremap M3 Dump region");
  1459. ret = -ENOMEM;
  1460. goto send_resp;
  1461. }
  1462. segment.size = event_data->m3_segment[i].size;
  1463. list_add(&segment.node, &head);
  1464. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1465. event_data->m3_segment[i].name);
  1466. switch (event_data->m3_segment[i].type) {
  1467. case QMI_M3_SEGMENT_PHYAREG_V01:
  1468. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1469. break;
  1470. case QMI_M3_SEGMENT_PHYDBG_V01:
  1471. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1472. break;
  1473. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1474. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1475. break;
  1476. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1477. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1478. break;
  1479. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1480. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1481. break;
  1482. default:
  1483. icnss_pr_err("Invalid Segment type: %d",
  1484. event_data->m3_segment[i].type);
  1485. }
  1486. if (ret) {
  1487. status = ret;
  1488. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1489. event_data->m3_segment[i].name, ret);
  1490. }
  1491. list_del(&segment.node);
  1492. }
  1493. send_resp:
  1494. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1495. status);
  1496. return ret;
  1497. }
  1498. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1499. {
  1500. int ret = 0;
  1501. struct icnss_subsys_restart_level_data *event_data = data;
  1502. if (!priv)
  1503. return -ENODEV;
  1504. if (!data)
  1505. return -EINVAL;
  1506. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1507. kfree(data);
  1508. return ret;
  1509. }
  1510. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1511. {
  1512. int ret;
  1513. struct icnss_priv *priv = icnss_get_plat_priv();
  1514. rproc_shutdown(priv->rproc);
  1515. ret = rproc_boot(priv->rproc);
  1516. if (ret) {
  1517. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1518. rproc_put(priv->rproc);
  1519. }
  1520. }
  1521. static void icnss_driver_event_work(struct work_struct *work)
  1522. {
  1523. struct icnss_priv *priv =
  1524. container_of(work, struct icnss_priv, event_work);
  1525. struct icnss_driver_event *event;
  1526. unsigned long flags;
  1527. int ret;
  1528. icnss_pm_stay_awake(priv);
  1529. spin_lock_irqsave(&priv->event_lock, flags);
  1530. while (!list_empty(&priv->event_list)) {
  1531. event = list_first_entry(&priv->event_list,
  1532. struct icnss_driver_event, list);
  1533. list_del(&event->list);
  1534. spin_unlock_irqrestore(&priv->event_lock, flags);
  1535. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1536. icnss_driver_event_to_str(event->type),
  1537. event->sync ? "-sync" : "", event->type,
  1538. priv->state);
  1539. switch (event->type) {
  1540. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1541. ret = icnss_driver_event_server_arrive(priv,
  1542. event->data);
  1543. break;
  1544. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1545. ret = icnss_driver_event_server_exit(priv);
  1546. break;
  1547. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1548. ret = icnss_driver_event_fw_ready_ind(priv,
  1549. event->data);
  1550. break;
  1551. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1552. ret = icnss_driver_event_register_driver(priv,
  1553. event->data);
  1554. break;
  1555. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1556. ret = icnss_driver_event_unregister_driver(priv,
  1557. event->data);
  1558. break;
  1559. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1560. ret = icnss_driver_event_pd_service_down(priv,
  1561. event->data);
  1562. break;
  1563. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1564. ret = icnss_driver_event_early_crash_ind(priv,
  1565. event->data);
  1566. break;
  1567. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1568. ret = icnss_driver_event_idle_shutdown(priv,
  1569. event->data);
  1570. break;
  1571. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1572. ret = icnss_driver_event_idle_restart(priv,
  1573. event->data);
  1574. break;
  1575. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1576. ret = icnss_driver_event_fw_init_done(priv,
  1577. event->data);
  1578. break;
  1579. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1580. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1581. break;
  1582. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1583. ret = icnss_qdss_trace_save_hdlr(priv,
  1584. event->data);
  1585. break;
  1586. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1587. ret = icnss_qdss_trace_free_hdlr(priv);
  1588. break;
  1589. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1590. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1591. break;
  1592. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1593. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1594. event->data);
  1595. break;
  1596. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1597. ret = icnss_subsys_restart_level(priv, event->data);
  1598. break;
  1599. default:
  1600. icnss_pr_err("Invalid Event type: %d", event->type);
  1601. kfree(event);
  1602. continue;
  1603. }
  1604. priv->stats.events[event->type].processed++;
  1605. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1606. icnss_driver_event_to_str(event->type),
  1607. event->sync ? "-sync" : "", event->type, ret,
  1608. priv->state);
  1609. spin_lock_irqsave(&priv->event_lock, flags);
  1610. if (event->sync) {
  1611. event->ret = ret;
  1612. complete(&event->complete);
  1613. continue;
  1614. }
  1615. spin_unlock_irqrestore(&priv->event_lock, flags);
  1616. kfree(event);
  1617. spin_lock_irqsave(&priv->event_lock, flags);
  1618. }
  1619. spin_unlock_irqrestore(&priv->event_lock, flags);
  1620. icnss_pm_relax(priv);
  1621. }
  1622. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1623. {
  1624. struct icnss_priv *priv =
  1625. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1626. struct icnss_soc_wake_event *event;
  1627. unsigned long flags;
  1628. int ret;
  1629. icnss_pm_stay_awake(priv);
  1630. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1631. while (!list_empty(&priv->soc_wake_msg_list)) {
  1632. event = list_first_entry(&priv->soc_wake_msg_list,
  1633. struct icnss_soc_wake_event, list);
  1634. list_del(&event->list);
  1635. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1636. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1637. icnss_soc_wake_event_to_str(event->type),
  1638. event->sync ? "-sync" : "", event->type,
  1639. priv->state);
  1640. switch (event->type) {
  1641. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1642. ret = icnss_event_soc_wake_request(priv,
  1643. event->data);
  1644. break;
  1645. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1646. ret = icnss_event_soc_wake_release(priv,
  1647. event->data);
  1648. break;
  1649. default:
  1650. icnss_pr_err("Invalid Event type: %d", event->type);
  1651. kfree(event);
  1652. continue;
  1653. }
  1654. priv->stats.soc_wake_events[event->type].processed++;
  1655. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1656. icnss_soc_wake_event_to_str(event->type),
  1657. event->sync ? "-sync" : "", event->type, ret,
  1658. priv->state);
  1659. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1660. if (event->sync) {
  1661. event->ret = ret;
  1662. complete(&event->complete);
  1663. continue;
  1664. }
  1665. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1666. kfree(event);
  1667. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1668. }
  1669. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1670. icnss_pm_relax(priv);
  1671. }
  1672. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1673. {
  1674. int ret = 0;
  1675. struct qcom_dump_segment segment;
  1676. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1677. struct list_head head;
  1678. if (!dump_enabled()) {
  1679. icnss_pr_info("Dump collection is not enabled\n");
  1680. return ret;
  1681. }
  1682. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1683. return ret;
  1684. INIT_LIST_HEAD(&head);
  1685. memset(&segment, 0, sizeof(segment));
  1686. segment.va = priv->msa_va;
  1687. segment.size = priv->msa_mem_size;
  1688. list_add(&segment.node, &head);
  1689. if (!msa0_dump_dev->dev) {
  1690. icnss_pr_err("Created Dump Device not found\n");
  1691. return 0;
  1692. }
  1693. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1694. if (ret) {
  1695. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1696. return ret;
  1697. }
  1698. list_del(&segment.node);
  1699. return ret;
  1700. }
  1701. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1702. void *data)
  1703. {
  1704. struct qcom_ssr_notify_data *notif = data;
  1705. int ret = 0;
  1706. if (!notif->crashed) {
  1707. if (atomic_read(&priv->is_shutdown)) {
  1708. atomic_set(&priv->is_shutdown, false);
  1709. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1710. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1711. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1712. clear_bit(ICNSS_FW_READY, &priv->state);
  1713. icnss_driver_event_post(priv,
  1714. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1715. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1716. NULL);
  1717. }
  1718. }
  1719. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1720. if (!wait_for_completion_timeout(
  1721. &priv->unblock_shutdown,
  1722. msecs_to_jiffies(PROBE_TIMEOUT)))
  1723. icnss_pr_err("modem block shutdown timeout\n");
  1724. }
  1725. ret = wlfw_send_modem_shutdown_msg(priv);
  1726. if (ret < 0)
  1727. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1728. ret);
  1729. }
  1730. }
  1731. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1732. {
  1733. switch (code) {
  1734. case QCOM_SSR_BEFORE_POWERUP:
  1735. return "BEFORE_POWERUP";
  1736. case QCOM_SSR_AFTER_POWERUP:
  1737. return "AFTER_POWERUP";
  1738. case QCOM_SSR_BEFORE_SHUTDOWN:
  1739. return "BEFORE_SHUTDOWN";
  1740. case QCOM_SSR_AFTER_SHUTDOWN:
  1741. return "AFTER_SHUTDOWN";
  1742. default:
  1743. return "UNKNOWN";
  1744. }
  1745. };
  1746. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1747. unsigned long code,
  1748. void *data)
  1749. {
  1750. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1751. wpss_early_ssr_nb);
  1752. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1753. icnss_qcom_ssr_notify_state_to_str(code), code);
  1754. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1755. set_bit(ICNSS_FW_DOWN, &priv->state);
  1756. icnss_ignore_fw_timeout(true);
  1757. }
  1758. return NOTIFY_DONE;
  1759. }
  1760. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1761. unsigned long code,
  1762. void *data)
  1763. {
  1764. struct icnss_event_pd_service_down_data *event_data;
  1765. struct qcom_ssr_notify_data *notif = data;
  1766. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1767. wpss_ssr_nb);
  1768. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1769. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1770. icnss_qcom_ssr_notify_state_to_str(code), code);
  1771. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1772. icnss_pr_info("Collecting msa0 segment dump\n");
  1773. icnss_msa0_ramdump(priv);
  1774. goto out;
  1775. }
  1776. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1777. goto out;
  1778. if (priv->wpss_self_recovery_enabled)
  1779. del_timer(&priv->wpss_ssr_timer);
  1780. priv->is_ssr = true;
  1781. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1782. priv->state, notif->crashed);
  1783. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1784. icnss_update_state_send_modem_shutdown(priv, data);
  1785. set_bit(ICNSS_FW_DOWN, &priv->state);
  1786. icnss_ignore_fw_timeout(true);
  1787. if (notif->crashed)
  1788. priv->stats.recovery.root_pd_crash++;
  1789. else
  1790. priv->stats.recovery.root_pd_shutdown++;
  1791. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1792. if (event_data == NULL)
  1793. return notifier_from_errno(-ENOMEM);
  1794. event_data->crashed = notif->crashed;
  1795. fw_down_data.crashed = !!notif->crashed;
  1796. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1797. clear_bit(ICNSS_FW_READY, &priv->state);
  1798. fw_down_data.crashed = !!notif->crashed;
  1799. icnss_call_driver_uevent(priv,
  1800. ICNSS_UEVENT_FW_DOWN,
  1801. &fw_down_data);
  1802. }
  1803. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1804. ICNSS_EVENT_SYNC, event_data);
  1805. if (notif->crashed)
  1806. mod_timer(&priv->recovery_timer,
  1807. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1808. out:
  1809. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1810. return NOTIFY_OK;
  1811. }
  1812. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1813. unsigned long code,
  1814. void *data)
  1815. {
  1816. struct icnss_event_pd_service_down_data *event_data;
  1817. struct qcom_ssr_notify_data *notif = data;
  1818. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1819. modem_ssr_nb);
  1820. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1821. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1822. icnss_qcom_ssr_notify_state_to_str(code), code);
  1823. switch (code) {
  1824. case QCOM_SSR_BEFORE_SHUTDOWN:
  1825. if (priv->is_slate_rfa)
  1826. complete(&priv->slate_boot_complete);
  1827. if (!notif->crashed &&
  1828. priv->low_power_support) { /* Hibernate */
  1829. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1830. icnss_driver_event_post(
  1831. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1832. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1833. set_bit(ICNSS_LOW_POWER, &priv->state);
  1834. }
  1835. break;
  1836. case QCOM_SSR_AFTER_SHUTDOWN:
  1837. /* Collect ramdump only when there was a crash. */
  1838. if (notif->crashed) {
  1839. icnss_pr_info("Collecting msa0 segment dump\n");
  1840. icnss_msa0_ramdump(priv);
  1841. }
  1842. goto out;
  1843. default:
  1844. goto out;
  1845. }
  1846. priv->is_ssr = true;
  1847. if (notif->crashed) {
  1848. priv->stats.recovery.root_pd_crash++;
  1849. priv->root_pd_shutdown = false;
  1850. } else {
  1851. priv->stats.recovery.root_pd_shutdown++;
  1852. priv->root_pd_shutdown = true;
  1853. }
  1854. icnss_update_state_send_modem_shutdown(priv, data);
  1855. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1856. set_bit(ICNSS_FW_DOWN, &priv->state);
  1857. icnss_ignore_fw_timeout(true);
  1858. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1859. clear_bit(ICNSS_FW_READY, &priv->state);
  1860. fw_down_data.crashed = !!notif->crashed;
  1861. icnss_call_driver_uevent(priv,
  1862. ICNSS_UEVENT_FW_DOWN,
  1863. &fw_down_data);
  1864. }
  1865. goto out;
  1866. }
  1867. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1868. priv->state, notif->crashed);
  1869. set_bit(ICNSS_FW_DOWN, &priv->state);
  1870. icnss_ignore_fw_timeout(true);
  1871. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1872. if (event_data == NULL)
  1873. return notifier_from_errno(-ENOMEM);
  1874. event_data->crashed = notif->crashed;
  1875. fw_down_data.crashed = !!notif->crashed;
  1876. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1877. clear_bit(ICNSS_FW_READY, &priv->state);
  1878. fw_down_data.crashed = !!notif->crashed;
  1879. icnss_call_driver_uevent(priv,
  1880. ICNSS_UEVENT_FW_DOWN,
  1881. &fw_down_data);
  1882. }
  1883. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1884. ICNSS_EVENT_SYNC, event_data);
  1885. if (notif->crashed)
  1886. mod_timer(&priv->recovery_timer,
  1887. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1888. out:
  1889. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1890. return NOTIFY_OK;
  1891. }
  1892. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1893. {
  1894. int ret = 0;
  1895. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1896. priv->wpss_early_notify_handler =
  1897. qcom_register_early_ssr_notifier("wpss",
  1898. &priv->wpss_early_ssr_nb);
  1899. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1900. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1901. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1902. }
  1903. return ret;
  1904. }
  1905. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1906. {
  1907. int ret = 0;
  1908. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1909. /*
  1910. * Assign priority of icnss wpss notifier callback over IPA
  1911. * modem notifier callback which is 0
  1912. */
  1913. priv->wpss_ssr_nb.priority = 1;
  1914. priv->wpss_notify_handler =
  1915. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1916. if (IS_ERR(priv->wpss_notify_handler)) {
  1917. ret = PTR_ERR(priv->wpss_notify_handler);
  1918. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1919. }
  1920. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1921. return ret;
  1922. }
  1923. #ifdef SLATE_MODULE_ENABLED
  1924. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1925. unsigned long event, void *data)
  1926. {
  1927. icnss_pr_info("Received slate event 0x%x\n", event);
  1928. if (event == SLATE_STATUS) {
  1929. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1930. seb_nb);
  1931. enum boot_status status = *(enum boot_status *)data;
  1932. if (status == SLATE_READY) {
  1933. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1934. priv->state);
  1935. set_bit(ICNSS_SLATE_READY, &priv->state);
  1936. set_bit(ICNSS_SLATE_UP, &priv->state);
  1937. complete(&priv->slate_boot_complete);
  1938. }
  1939. }
  1940. return NOTIFY_OK;
  1941. }
  1942. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1943. {
  1944. int ret = 0;
  1945. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1946. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1947. &priv->seb_nb);
  1948. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1949. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1950. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1951. ret);
  1952. }
  1953. return ret;
  1954. }
  1955. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1956. {
  1957. int ret = 0;
  1958. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1959. if (ret < 0)
  1960. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1961. return ret;
  1962. }
  1963. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1964. unsigned long code,
  1965. void *data)
  1966. {
  1967. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1968. slate_ssr_nb);
  1969. int ret = 0;
  1970. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1971. if (code == QCOM_SSR_AFTER_POWERUP &&
  1972. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1973. set_bit(ICNSS_SLATE_UP, &priv->state);
  1974. complete(&priv->slate_boot_complete);
  1975. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1976. priv->state);
  1977. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1978. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1979. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1980. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1981. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1982. priv->state);
  1983. goto skip_pdr;
  1984. }
  1985. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1986. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1987. if (ret < 0) {
  1988. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1989. ret, priv->state);
  1990. goto skip_pdr;
  1991. }
  1992. }
  1993. skip_pdr:
  1994. return NOTIFY_OK;
  1995. }
  1996. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1997. {
  1998. int ret = 0;
  1999. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2000. priv->slate_notify_handler =
  2001. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2002. if (IS_ERR(priv->slate_notify_handler)) {
  2003. ret = PTR_ERR(priv->slate_notify_handler);
  2004. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2005. }
  2006. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2007. return ret;
  2008. }
  2009. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2010. {
  2011. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2012. return 0;
  2013. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2014. &priv->slate_ssr_nb);
  2015. priv->slate_notify_handler = NULL;
  2016. return 0;
  2017. }
  2018. #else
  2019. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2020. {
  2021. return 0;
  2022. }
  2023. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2024. {
  2025. return 0;
  2026. }
  2027. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2028. {
  2029. return 0;
  2030. }
  2031. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2032. {
  2033. return 0;
  2034. }
  2035. #endif
  2036. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2037. {
  2038. int ret = 0;
  2039. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2040. /*
  2041. * Assign priority of icnss modem notifier callback over IPA
  2042. * modem notifier callback which is 0
  2043. */
  2044. priv->modem_ssr_nb.priority = 1;
  2045. priv->modem_notify_handler =
  2046. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2047. if (IS_ERR(priv->modem_notify_handler)) {
  2048. ret = PTR_ERR(priv->modem_notify_handler);
  2049. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2050. }
  2051. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2052. return ret;
  2053. }
  2054. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2055. {
  2056. if (IS_ERR(priv->wpss_early_notify_handler))
  2057. return;
  2058. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2059. &priv->wpss_early_ssr_nb);
  2060. priv->wpss_early_notify_handler = NULL;
  2061. }
  2062. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2063. {
  2064. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2065. return 0;
  2066. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2067. &priv->wpss_ssr_nb);
  2068. priv->wpss_notify_handler = NULL;
  2069. return 0;
  2070. }
  2071. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2072. {
  2073. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2074. return 0;
  2075. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2076. &priv->modem_ssr_nb);
  2077. priv->modem_notify_handler = NULL;
  2078. return 0;
  2079. }
  2080. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2081. {
  2082. struct icnss_priv *priv = priv_cb;
  2083. struct icnss_event_pd_service_down_data *event_data;
  2084. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2085. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2086. if (!priv)
  2087. return;
  2088. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2089. state, priv->state);
  2090. switch (state) {
  2091. case SERVREG_SERVICE_STATE_DOWN:
  2092. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2093. if (!event_data)
  2094. return;
  2095. event_data->crashed = true;
  2096. if (!priv->is_ssr) {
  2097. set_bit(ICNSS_PDR, &penv->state);
  2098. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2099. cause = ICNSS_HOST_ERROR;
  2100. priv->stats.recovery.pdr_host_error++;
  2101. } else {
  2102. cause = ICNSS_FW_CRASH;
  2103. priv->stats.recovery.pdr_fw_crash++;
  2104. }
  2105. } else if (priv->root_pd_shutdown) {
  2106. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2107. event_data->crashed = false;
  2108. }
  2109. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2110. priv->state, icnss_pdr_cause[cause]);
  2111. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2112. set_bit(ICNSS_FW_DOWN, &priv->state);
  2113. icnss_ignore_fw_timeout(true);
  2114. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2115. clear_bit(ICNSS_FW_READY, &priv->state);
  2116. fw_down_data.crashed = event_data->crashed;
  2117. icnss_call_driver_uevent(priv,
  2118. ICNSS_UEVENT_FW_DOWN,
  2119. &fw_down_data);
  2120. }
  2121. }
  2122. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2123. if (event_data->crashed)
  2124. mod_timer(&priv->recovery_timer,
  2125. jiffies +
  2126. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2127. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2128. ICNSS_EVENT_SYNC, event_data);
  2129. break;
  2130. case SERVREG_SERVICE_STATE_UP:
  2131. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2132. break;
  2133. default:
  2134. break;
  2135. }
  2136. return;
  2137. }
  2138. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2139. {
  2140. struct pdr_handle *handle = NULL;
  2141. struct pdr_service *service = NULL;
  2142. int err = 0;
  2143. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2144. if (IS_ERR_OR_NULL(handle)) {
  2145. err = PTR_ERR(handle);
  2146. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2147. goto out;
  2148. }
  2149. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2150. if (IS_ERR_OR_NULL(service)) {
  2151. err = PTR_ERR(service);
  2152. icnss_pr_err("Failed to add lookup, err %d", err);
  2153. goto out;
  2154. }
  2155. priv->pdr_handle = handle;
  2156. priv->pdr_service = service;
  2157. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2158. icnss_pr_info("PDR registration happened");
  2159. out:
  2160. return err;
  2161. }
  2162. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2163. {
  2164. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2165. return;
  2166. pdr_handle_release(priv->pdr_handle);
  2167. }
  2168. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2169. {
  2170. int ret = 0;
  2171. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2172. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2173. ret = PTR_ERR(priv->icnss_ramdump_class);
  2174. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2175. return ret;
  2176. }
  2177. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2178. ICNSS_RAMDUMP_NAME);
  2179. if (ret < 0) {
  2180. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2181. goto fail_alloc_major;
  2182. }
  2183. return 0;
  2184. fail_alloc_major:
  2185. class_destroy(priv->icnss_ramdump_class);
  2186. return ret;
  2187. }
  2188. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2189. {
  2190. int ret = 0;
  2191. struct icnss_ramdump_info *ramdump_info;
  2192. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2193. if (!ramdump_info)
  2194. return ERR_PTR(-ENOMEM);
  2195. if (!dev_name) {
  2196. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2197. return NULL;
  2198. }
  2199. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2200. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2201. if (ramdump_info->minor < 0) {
  2202. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2203. ramdump_info->minor);
  2204. ret = -ENODEV;
  2205. goto fail_out_of_minors;
  2206. }
  2207. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2208. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2209. ramdump_info->minor),
  2210. ramdump_info, ramdump_info->name);
  2211. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2212. ret = PTR_ERR(ramdump_info->dev);
  2213. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2214. ramdump_info->name, ret);
  2215. goto fail_device_create;
  2216. }
  2217. return (void *)ramdump_info;
  2218. fail_device_create:
  2219. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2220. fail_out_of_minors:
  2221. kfree(ramdump_info);
  2222. return ERR_PTR(ret);
  2223. }
  2224. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2225. {
  2226. int ret = 0;
  2227. if (!priv || !priv->pdev) {
  2228. icnss_pr_err("Platform priv or pdev is NULL\n");
  2229. return -EINVAL;
  2230. }
  2231. ret = icnss_ramdump_devnode_init(priv);
  2232. if (ret)
  2233. return ret;
  2234. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2235. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2236. icnss_pr_err("Failed to create msa0 dump device!");
  2237. return -ENOMEM;
  2238. }
  2239. if (priv->device_id == WCN6750_DEVICE_ID ||
  2240. priv->device_id == WCN6450_DEVICE_ID) {
  2241. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2242. ICNSS_M3_SEGMENT(
  2243. ICNSS_M3_SEGMENT_PHYAREG));
  2244. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2245. !priv->m3_dump_phyareg->dev) {
  2246. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2247. return -ENOMEM;
  2248. }
  2249. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2250. ICNSS_M3_SEGMENT(
  2251. ICNSS_M3_SEGMENT_PHYA));
  2252. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2253. !priv->m3_dump_phydbg->dev) {
  2254. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2255. return -ENOMEM;
  2256. }
  2257. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2258. ICNSS_M3_SEGMENT(
  2259. ICNSS_M3_SEGMENT_WMACREG));
  2260. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2261. !priv->m3_dump_wmac0reg->dev) {
  2262. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2263. return -ENOMEM;
  2264. }
  2265. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2266. ICNSS_M3_SEGMENT(
  2267. ICNSS_M3_SEGMENT_WCSSDBG));
  2268. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2269. !priv->m3_dump_wcssdbg->dev) {
  2270. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2271. return -ENOMEM;
  2272. }
  2273. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2274. ICNSS_M3_SEGMENT(
  2275. ICNSS_M3_SEGMENT_PHYAM3));
  2276. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2277. !priv->m3_dump_phyapdmem->dev) {
  2278. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2279. return -ENOMEM;
  2280. }
  2281. }
  2282. return 0;
  2283. }
  2284. static int icnss_enable_recovery(struct icnss_priv *priv)
  2285. {
  2286. int ret;
  2287. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2288. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2289. return 0;
  2290. }
  2291. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2292. icnss_pr_dbg("SSR disabled through module parameter\n");
  2293. goto enable_pdr;
  2294. }
  2295. ret = icnss_register_ramdump_devices(priv);
  2296. if (ret)
  2297. return ret;
  2298. if (priv->wpss_supported) {
  2299. icnss_wpss_early_ssr_register_notifier(priv);
  2300. icnss_wpss_ssr_register_notifier(priv);
  2301. return 0;
  2302. }
  2303. if (!(priv->rproc_fw_download))
  2304. icnss_modem_ssr_register_notifier(priv);
  2305. if (priv->is_slate_rfa) {
  2306. icnss_slate_ssr_register_notifier(priv);
  2307. icnss_register_slate_event_notifier(priv);
  2308. }
  2309. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2310. icnss_pr_dbg("PDR disabled through module parameter\n");
  2311. return 0;
  2312. }
  2313. enable_pdr:
  2314. ret = icnss_pd_restart_enable(priv);
  2315. if (ret)
  2316. return ret;
  2317. return 0;
  2318. }
  2319. static int icnss_dev_id_match(struct icnss_priv *priv,
  2320. struct device_info *dev_info)
  2321. {
  2322. while (dev_info->device_id) {
  2323. if (priv->device_id == dev_info->device_id)
  2324. return 1;
  2325. dev_info++;
  2326. }
  2327. return 0;
  2328. }
  2329. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2330. unsigned long *thermal_state)
  2331. {
  2332. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2333. *thermal_state = icnss_tcdev->max_thermal_state;
  2334. return 0;
  2335. }
  2336. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2337. unsigned long *thermal_state)
  2338. {
  2339. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2340. *thermal_state = icnss_tcdev->curr_thermal_state;
  2341. return 0;
  2342. }
  2343. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2344. unsigned long thermal_state)
  2345. {
  2346. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2347. struct device *dev = &penv->pdev->dev;
  2348. int ret = 0;
  2349. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2350. return 0;
  2351. if (thermal_state > icnss_tcdev->max_thermal_state)
  2352. return -EINVAL;
  2353. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2354. thermal_state, icnss_tcdev->tcdev_id);
  2355. mutex_lock(&penv->tcdev_lock);
  2356. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2357. icnss_tcdev->tcdev_id);
  2358. if (!ret)
  2359. icnss_tcdev->curr_thermal_state = thermal_state;
  2360. mutex_unlock(&penv->tcdev_lock);
  2361. if (ret) {
  2362. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2363. ret, icnss_tcdev->tcdev_id);
  2364. return ret;
  2365. }
  2366. return 0;
  2367. }
  2368. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2369. .get_max_state = icnss_tcdev_get_max_state,
  2370. .get_cur_state = icnss_tcdev_get_cur_state,
  2371. .set_cur_state = icnss_tcdev_set_cur_state,
  2372. };
  2373. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2374. int tcdev_id)
  2375. {
  2376. struct icnss_priv *priv = dev_get_drvdata(dev);
  2377. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2378. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2379. struct device_node *dev_node;
  2380. int ret = 0;
  2381. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2382. if (!icnss_tcdev)
  2383. return -ENOMEM;
  2384. icnss_tcdev->tcdev_id = tcdev_id;
  2385. icnss_tcdev->max_thermal_state = max_state;
  2386. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2387. "qcom,icnss_cdev%d", tcdev_id);
  2388. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2389. if (!dev_node) {
  2390. icnss_pr_err("Failed to get cooling device node\n");
  2391. return -EINVAL;
  2392. }
  2393. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2394. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2395. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2396. dev_node,
  2397. cdev_node_name, icnss_tcdev,
  2398. &icnss_cooling_ops);
  2399. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2400. ret = PTR_ERR(icnss_tcdev->tcdev);
  2401. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2402. ret, icnss_tcdev->tcdev_id);
  2403. } else {
  2404. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2405. icnss_tcdev->tcdev_id);
  2406. list_add(&icnss_tcdev->tcdev_list,
  2407. &priv->icnss_tcdev_list);
  2408. }
  2409. } else {
  2410. icnss_pr_dbg("Cooling device registration not supported");
  2411. ret = -EOPNOTSUPP;
  2412. }
  2413. return ret;
  2414. }
  2415. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2416. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2417. {
  2418. struct icnss_priv *priv = dev_get_drvdata(dev);
  2419. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2420. while (!list_empty(&priv->icnss_tcdev_list)) {
  2421. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2422. struct icnss_thermal_cdev,
  2423. tcdev_list);
  2424. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2425. list_del(&icnss_tcdev->tcdev_list);
  2426. kfree(icnss_tcdev);
  2427. }
  2428. }
  2429. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2430. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2431. unsigned long *thermal_state,
  2432. int tcdev_id)
  2433. {
  2434. struct icnss_priv *priv = dev_get_drvdata(dev);
  2435. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2436. mutex_lock(&priv->tcdev_lock);
  2437. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2438. if (icnss_tcdev->tcdev_id != tcdev_id)
  2439. continue;
  2440. *thermal_state = icnss_tcdev->curr_thermal_state;
  2441. mutex_unlock(&priv->tcdev_lock);
  2442. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2443. icnss_tcdev->curr_thermal_state, tcdev_id);
  2444. return 0;
  2445. }
  2446. mutex_unlock(&priv->tcdev_lock);
  2447. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2448. return -EINVAL;
  2449. }
  2450. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2451. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2452. int cmd_len, void *cb_ctx,
  2453. int (*cb)(void *ctx, void *event, int event_len))
  2454. {
  2455. struct icnss_priv *priv = icnss_get_plat_priv();
  2456. int ret;
  2457. if (!priv)
  2458. return -ENODEV;
  2459. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2460. return -EINVAL;
  2461. priv->get_info_cb = cb;
  2462. priv->get_info_cb_ctx = cb_ctx;
  2463. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2464. if (ret) {
  2465. priv->get_info_cb = NULL;
  2466. priv->get_info_cb_ctx = NULL;
  2467. }
  2468. return ret;
  2469. }
  2470. EXPORT_SYMBOL(icnss_qmi_send);
  2471. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2472. struct module *owner, const char *mod_name)
  2473. {
  2474. int ret = 0;
  2475. struct icnss_priv *priv = icnss_get_plat_priv();
  2476. if (!priv || !priv->pdev) {
  2477. ret = -ENODEV;
  2478. goto out;
  2479. }
  2480. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2481. if (priv->ops) {
  2482. icnss_pr_err("Driver already registered\n");
  2483. ret = -EEXIST;
  2484. goto out;
  2485. }
  2486. if (!ops->dev_info) {
  2487. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2488. return -EINVAL;
  2489. }
  2490. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2491. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2492. ops->dev_info->name);
  2493. return -ENODEV;
  2494. }
  2495. if (!ops->probe || !ops->remove) {
  2496. ret = -EINVAL;
  2497. goto out;
  2498. }
  2499. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2500. 0, ops);
  2501. if (ret == -EINTR)
  2502. ret = 0;
  2503. out:
  2504. return ret;
  2505. }
  2506. EXPORT_SYMBOL(__icnss_register_driver);
  2507. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2508. {
  2509. int ret;
  2510. struct icnss_priv *priv = icnss_get_plat_priv();
  2511. if (!priv || !priv->pdev) {
  2512. ret = -ENODEV;
  2513. goto out;
  2514. }
  2515. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2516. if (!priv->ops) {
  2517. icnss_pr_err("Driver not registered\n");
  2518. ret = -ENOENT;
  2519. goto out;
  2520. }
  2521. ret = icnss_driver_event_post(priv,
  2522. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2523. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2524. out:
  2525. return ret;
  2526. }
  2527. EXPORT_SYMBOL(icnss_unregister_driver);
  2528. static struct icnss_msi_config msi_config_wcn6750 = {
  2529. .total_vectors = 28,
  2530. .total_users = 2,
  2531. .users = (struct icnss_msi_user[]) {
  2532. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2533. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2534. },
  2535. };
  2536. static struct icnss_msi_config msi_config_wcn6450 = {
  2537. .total_vectors = 10,
  2538. .total_users = 1,
  2539. .users = (struct icnss_msi_user[]) {
  2540. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2541. },
  2542. };
  2543. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2544. {
  2545. if (priv->device_id == WCN6750_DEVICE_ID)
  2546. priv->msi_config = &msi_config_wcn6750;
  2547. else
  2548. priv->msi_config = &msi_config_wcn6450;
  2549. return 0;
  2550. }
  2551. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2552. int *num_vectors, u32 *user_base_data,
  2553. u32 *base_vector)
  2554. {
  2555. struct icnss_priv *priv = dev_get_drvdata(dev);
  2556. struct icnss_msi_config *msi_config;
  2557. int idx;
  2558. if (!priv)
  2559. return -ENODEV;
  2560. msi_config = priv->msi_config;
  2561. if (!msi_config) {
  2562. icnss_pr_err("MSI is not supported.\n");
  2563. return -EINVAL;
  2564. }
  2565. for (idx = 0; idx < msi_config->total_users; idx++) {
  2566. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2567. *num_vectors = msi_config->users[idx].num_vectors;
  2568. *user_base_data = msi_config->users[idx].base_vector
  2569. + priv->msi_base_data;
  2570. *base_vector = msi_config->users[idx].base_vector;
  2571. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2572. user_name, *num_vectors, *user_base_data,
  2573. *base_vector);
  2574. return 0;
  2575. }
  2576. }
  2577. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2578. return -EINVAL;
  2579. }
  2580. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2581. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2582. {
  2583. struct icnss_priv *priv = dev_get_drvdata(dev);
  2584. int irq_num;
  2585. irq_num = priv->srng_irqs[vector];
  2586. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2587. irq_num, vector);
  2588. return irq_num;
  2589. }
  2590. EXPORT_SYMBOL(icnss_get_msi_irq);
  2591. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2592. u32 *msi_addr_high)
  2593. {
  2594. struct icnss_priv *priv = dev_get_drvdata(dev);
  2595. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2596. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2597. }
  2598. EXPORT_SYMBOL(icnss_get_msi_address);
  2599. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2600. irqreturn_t (*handler)(int, void *),
  2601. unsigned long flags, const char *name, void *ctx)
  2602. {
  2603. int ret = 0;
  2604. unsigned int irq;
  2605. struct ce_irq_list *irq_entry;
  2606. struct icnss_priv *priv = dev_get_drvdata(dev);
  2607. if (!priv || !priv->pdev) {
  2608. ret = -ENODEV;
  2609. goto out;
  2610. }
  2611. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2612. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2613. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2614. ret = -EINVAL;
  2615. goto out;
  2616. }
  2617. irq = priv->ce_irqs[ce_id];
  2618. irq_entry = &priv->ce_irq_list[ce_id];
  2619. if (irq_entry->handler || irq_entry->irq) {
  2620. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2621. irq, ce_id);
  2622. ret = -EEXIST;
  2623. goto out;
  2624. }
  2625. ret = request_irq(irq, handler, flags, name, ctx);
  2626. if (ret) {
  2627. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2628. irq, ce_id, ret);
  2629. goto out;
  2630. }
  2631. irq_entry->irq = irq;
  2632. irq_entry->handler = handler;
  2633. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2634. penv->stats.ce_irqs[ce_id].request++;
  2635. out:
  2636. return ret;
  2637. }
  2638. EXPORT_SYMBOL(icnss_ce_request_irq);
  2639. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2640. {
  2641. int ret = 0;
  2642. unsigned int irq;
  2643. struct ce_irq_list *irq_entry;
  2644. if (!penv || !penv->pdev || !dev) {
  2645. ret = -ENODEV;
  2646. goto out;
  2647. }
  2648. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2649. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2650. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2651. ret = -EINVAL;
  2652. goto out;
  2653. }
  2654. irq = penv->ce_irqs[ce_id];
  2655. irq_entry = &penv->ce_irq_list[ce_id];
  2656. if (!irq_entry->handler || !irq_entry->irq) {
  2657. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2658. ret = -EEXIST;
  2659. goto out;
  2660. }
  2661. free_irq(irq, ctx);
  2662. irq_entry->irq = 0;
  2663. irq_entry->handler = NULL;
  2664. penv->stats.ce_irqs[ce_id].free++;
  2665. out:
  2666. return ret;
  2667. }
  2668. EXPORT_SYMBOL(icnss_ce_free_irq);
  2669. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2670. {
  2671. unsigned int irq;
  2672. if (!penv || !penv->pdev || !dev) {
  2673. icnss_pr_err("Platform driver not initialized\n");
  2674. return;
  2675. }
  2676. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2677. penv->state);
  2678. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2679. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2680. return;
  2681. }
  2682. penv->stats.ce_irqs[ce_id].enable++;
  2683. irq = penv->ce_irqs[ce_id];
  2684. enable_irq(irq);
  2685. }
  2686. EXPORT_SYMBOL(icnss_enable_irq);
  2687. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2688. {
  2689. unsigned int irq;
  2690. if (!penv || !penv->pdev || !dev) {
  2691. icnss_pr_err("Platform driver not initialized\n");
  2692. return;
  2693. }
  2694. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2695. penv->state);
  2696. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2697. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2698. ce_id);
  2699. return;
  2700. }
  2701. irq = penv->ce_irqs[ce_id];
  2702. disable_irq(irq);
  2703. penv->stats.ce_irqs[ce_id].disable++;
  2704. }
  2705. EXPORT_SYMBOL(icnss_disable_irq);
  2706. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2707. {
  2708. char *fw_build_timestamp = NULL;
  2709. struct icnss_priv *priv = dev_get_drvdata(dev);
  2710. if (!priv) {
  2711. icnss_pr_err("Platform driver not initialized\n");
  2712. return -EINVAL;
  2713. }
  2714. info->v_addr = priv->mem_base_va;
  2715. info->p_addr = priv->mem_base_pa;
  2716. info->chip_id = priv->chip_info.chip_id;
  2717. info->chip_family = priv->chip_info.chip_family;
  2718. info->board_id = priv->board_id;
  2719. info->soc_id = priv->soc_id;
  2720. info->fw_version = priv->fw_version_info.fw_version;
  2721. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2722. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2723. strlcpy(info->fw_build_timestamp,
  2724. priv->fw_version_info.fw_build_timestamp,
  2725. WLFW_MAX_TIMESTAMP_LEN + 1);
  2726. strlcpy(info->fw_build_id, priv->fw_build_id,
  2727. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2728. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2729. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2730. info->phy_qam_cap = priv->phy_qam_cap;
  2731. return 0;
  2732. }
  2733. EXPORT_SYMBOL(icnss_get_soc_info);
  2734. int icnss_get_mhi_state(struct device *dev)
  2735. {
  2736. struct icnss_priv *priv = dev_get_drvdata(dev);
  2737. if (!priv) {
  2738. icnss_pr_err("Platform driver not initialized\n");
  2739. return -EINVAL;
  2740. }
  2741. if (!priv->mhi_state_info_va)
  2742. return -ENOMEM;
  2743. return ioread32(priv->mhi_state_info_va);
  2744. }
  2745. EXPORT_SYMBOL(icnss_get_mhi_state);
  2746. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2747. {
  2748. int ret;
  2749. struct icnss_priv *priv;
  2750. if (!dev)
  2751. return -ENODEV;
  2752. priv = dev_get_drvdata(dev);
  2753. if (!priv) {
  2754. icnss_pr_err("Platform driver not initialized\n");
  2755. return -EINVAL;
  2756. }
  2757. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2758. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2759. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2760. priv->state);
  2761. return -EINVAL;
  2762. }
  2763. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2764. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2765. if (ret)
  2766. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2767. ret, fw_log_mode);
  2768. return ret;
  2769. }
  2770. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2771. int icnss_force_wake_request(struct device *dev)
  2772. {
  2773. struct icnss_priv *priv;
  2774. if (!dev)
  2775. return -ENODEV;
  2776. priv = dev_get_drvdata(dev);
  2777. if (!priv) {
  2778. icnss_pr_err("Platform driver not initialized\n");
  2779. return -EINVAL;
  2780. }
  2781. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2782. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2783. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2784. priv->state);
  2785. return -EINVAL;
  2786. }
  2787. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2788. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2789. atomic_read(&priv->soc_wake_ref_count));
  2790. return 0;
  2791. }
  2792. icnss_pr_soc_wake("Calling SOC Wake request");
  2793. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2794. 0, NULL);
  2795. return 0;
  2796. }
  2797. EXPORT_SYMBOL(icnss_force_wake_request);
  2798. int icnss_force_wake_release(struct device *dev)
  2799. {
  2800. struct icnss_priv *priv;
  2801. if (!dev)
  2802. return -ENODEV;
  2803. priv = dev_get_drvdata(dev);
  2804. if (!priv) {
  2805. icnss_pr_err("Platform driver not initialized\n");
  2806. return -EINVAL;
  2807. }
  2808. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2809. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2810. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2811. priv->state);
  2812. return -EINVAL;
  2813. }
  2814. icnss_pr_soc_wake("Calling SOC Wake response");
  2815. if (atomic_read(&priv->soc_wake_ref_count) &&
  2816. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2817. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2818. atomic_read(&priv->soc_wake_ref_count));
  2819. return 0;
  2820. }
  2821. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2822. 0, NULL);
  2823. return 0;
  2824. }
  2825. EXPORT_SYMBOL(icnss_force_wake_release);
  2826. int icnss_is_device_awake(struct device *dev)
  2827. {
  2828. struct icnss_priv *priv = dev_get_drvdata(dev);
  2829. if (!priv) {
  2830. icnss_pr_err("Platform driver not initialized\n");
  2831. return -EINVAL;
  2832. }
  2833. return atomic_read(&priv->soc_wake_ref_count);
  2834. }
  2835. EXPORT_SYMBOL(icnss_is_device_awake);
  2836. int icnss_is_pci_ep_awake(struct device *dev)
  2837. {
  2838. struct icnss_priv *priv = dev_get_drvdata(dev);
  2839. if (!priv) {
  2840. icnss_pr_err("Platform driver not initialized\n");
  2841. return -EINVAL;
  2842. }
  2843. if (!priv->mhi_state_info_va)
  2844. return -ENOMEM;
  2845. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2846. }
  2847. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2848. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2849. uint32_t mem_type, uint32_t data_len,
  2850. uint8_t *output)
  2851. {
  2852. int ret = 0;
  2853. struct icnss_priv *priv = dev_get_drvdata(dev);
  2854. if (priv->magic != ICNSS_MAGIC) {
  2855. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2856. dev, priv, priv->magic);
  2857. return -EINVAL;
  2858. }
  2859. if (!output || data_len == 0
  2860. || data_len > WLFW_MAX_DATA_SIZE) {
  2861. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2862. output, data_len);
  2863. ret = -EINVAL;
  2864. goto out;
  2865. }
  2866. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2867. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2868. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2869. priv->state);
  2870. ret = -EINVAL;
  2871. goto out;
  2872. }
  2873. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2874. data_len, output);
  2875. out:
  2876. return ret;
  2877. }
  2878. EXPORT_SYMBOL(icnss_athdiag_read);
  2879. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2880. uint32_t mem_type, uint32_t data_len,
  2881. uint8_t *input)
  2882. {
  2883. int ret = 0;
  2884. struct icnss_priv *priv = dev_get_drvdata(dev);
  2885. if (priv->magic != ICNSS_MAGIC) {
  2886. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2887. dev, priv, priv->magic);
  2888. return -EINVAL;
  2889. }
  2890. if (!input || data_len == 0
  2891. || data_len > WLFW_MAX_DATA_SIZE) {
  2892. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2893. input, data_len);
  2894. ret = -EINVAL;
  2895. goto out;
  2896. }
  2897. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2898. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2899. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2900. priv->state);
  2901. ret = -EINVAL;
  2902. goto out;
  2903. }
  2904. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2905. data_len, input);
  2906. out:
  2907. return ret;
  2908. }
  2909. EXPORT_SYMBOL(icnss_athdiag_write);
  2910. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2911. enum icnss_driver_mode mode,
  2912. const char *host_version)
  2913. {
  2914. struct icnss_priv *priv = dev_get_drvdata(dev);
  2915. int temp = 0, ret = 0;
  2916. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2917. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2918. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2919. priv->state);
  2920. return -EINVAL;
  2921. }
  2922. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2923. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2924. priv->state);
  2925. return -EINVAL;
  2926. }
  2927. if (priv->wpss_supported &&
  2928. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2929. icnss_setup_dms_mac(priv);
  2930. if (priv->device_id == WCN6750_DEVICE_ID) {
  2931. if (!icnss_get_temperature(priv, &temp)) {
  2932. icnss_pr_dbg("Temperature: %d\n", temp);
  2933. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2934. icnss_set_wlan_en_delay(priv);
  2935. }
  2936. }
  2937. if (priv->device_id == WCN6450_DEVICE_ID)
  2938. icnss_hw_power_off(priv);
  2939. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2940. if (priv->device_id == WCN6450_DEVICE_ID)
  2941. icnss_hw_power_on(priv);
  2942. return ret;
  2943. }
  2944. EXPORT_SYMBOL(icnss_wlan_enable);
  2945. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2946. {
  2947. struct icnss_priv *priv = dev_get_drvdata(dev);
  2948. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2949. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2950. priv->state);
  2951. return 0;
  2952. }
  2953. return icnss_send_wlan_disable_to_fw(priv);
  2954. }
  2955. EXPORT_SYMBOL(icnss_wlan_disable);
  2956. bool icnss_is_qmi_disable(struct device *dev)
  2957. {
  2958. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2959. }
  2960. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2961. int icnss_get_ce_id(struct device *dev, int irq)
  2962. {
  2963. int i;
  2964. if (!penv || !penv->pdev || !dev)
  2965. return -ENODEV;
  2966. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2967. if (penv->ce_irqs[i] == irq)
  2968. return i;
  2969. }
  2970. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2971. return -EINVAL;
  2972. }
  2973. EXPORT_SYMBOL(icnss_get_ce_id);
  2974. int icnss_get_irq(struct device *dev, int ce_id)
  2975. {
  2976. int irq;
  2977. if (!penv || !penv->pdev || !dev)
  2978. return -ENODEV;
  2979. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2980. return -EINVAL;
  2981. irq = penv->ce_irqs[ce_id];
  2982. return irq;
  2983. }
  2984. EXPORT_SYMBOL(icnss_get_irq);
  2985. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2986. {
  2987. struct icnss_priv *priv = dev_get_drvdata(dev);
  2988. if (!priv) {
  2989. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2990. return NULL;
  2991. }
  2992. return priv->iommu_domain;
  2993. }
  2994. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2995. int icnss_smmu_map(struct device *dev,
  2996. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2997. {
  2998. struct icnss_priv *priv = dev_get_drvdata(dev);
  2999. int flag = IOMMU_READ | IOMMU_WRITE;
  3000. bool dma_coherent = false;
  3001. unsigned long iova;
  3002. int prop_len = 0;
  3003. size_t len;
  3004. int ret = 0;
  3005. if (!priv) {
  3006. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3007. dev, priv);
  3008. return -EINVAL;
  3009. }
  3010. if (!iova_addr) {
  3011. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3012. &paddr, size);
  3013. return -EINVAL;
  3014. }
  3015. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3016. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3017. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3018. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3019. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3020. iova,
  3021. &priv->smmu_iova_ipa_start,
  3022. priv->smmu_iova_ipa_len);
  3023. return -ENOMEM;
  3024. }
  3025. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3026. icnss_pr_dbg("dma-coherent is %s\n",
  3027. dma_coherent ? "enabled" : "disabled");
  3028. if (dma_coherent)
  3029. flag |= IOMMU_CACHE;
  3030. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3031. ret = iommu_map(priv->iommu_domain, iova,
  3032. rounddown(paddr, PAGE_SIZE), len,
  3033. flag);
  3034. if (ret) {
  3035. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3036. return ret;
  3037. }
  3038. priv->smmu_iova_ipa_current = iova + len;
  3039. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3040. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3041. return 0;
  3042. }
  3043. EXPORT_SYMBOL(icnss_smmu_map);
  3044. int icnss_smmu_unmap(struct device *dev,
  3045. uint32_t iova_addr, size_t size)
  3046. {
  3047. struct icnss_priv *priv = dev_get_drvdata(dev);
  3048. unsigned long iova;
  3049. size_t len, unmapped_len;
  3050. if (!priv) {
  3051. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3052. dev, priv);
  3053. return -EINVAL;
  3054. }
  3055. if (!iova_addr) {
  3056. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3057. size);
  3058. return -EINVAL;
  3059. }
  3060. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3061. PAGE_SIZE);
  3062. iova = rounddown(iova_addr, PAGE_SIZE);
  3063. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3064. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3065. iova,
  3066. &priv->smmu_iova_ipa_start,
  3067. priv->smmu_iova_ipa_len);
  3068. return -ENOMEM;
  3069. }
  3070. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3071. iova, len);
  3072. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3073. if (unmapped_len != len) {
  3074. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3075. return -EINVAL;
  3076. }
  3077. priv->smmu_iova_ipa_current = iova;
  3078. return 0;
  3079. }
  3080. EXPORT_SYMBOL(icnss_smmu_unmap);
  3081. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3082. {
  3083. return socinfo_get_serial_number();
  3084. }
  3085. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3086. int icnss_trigger_recovery(struct device *dev)
  3087. {
  3088. int ret = 0;
  3089. struct icnss_priv *priv = dev_get_drvdata(dev);
  3090. if (priv->magic != ICNSS_MAGIC) {
  3091. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3092. ret = -EINVAL;
  3093. goto out;
  3094. }
  3095. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3096. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3097. priv->state);
  3098. ret = -EPERM;
  3099. goto out;
  3100. }
  3101. if (priv->wpss_supported) {
  3102. icnss_pr_vdbg("Initiate Root PD restart");
  3103. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3104. ICNSS_SMP2P_OUT_POWER_SAVE);
  3105. if (!ret)
  3106. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3107. return ret;
  3108. }
  3109. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3110. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3111. priv->state);
  3112. ret = -EOPNOTSUPP;
  3113. goto out;
  3114. }
  3115. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3116. priv->state);
  3117. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3118. if (!ret)
  3119. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3120. out:
  3121. return ret;
  3122. }
  3123. EXPORT_SYMBOL(icnss_trigger_recovery);
  3124. int icnss_idle_shutdown(struct device *dev)
  3125. {
  3126. struct icnss_priv *priv = dev_get_drvdata(dev);
  3127. if (!priv) {
  3128. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3129. return -EINVAL;
  3130. }
  3131. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3132. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3133. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3134. return -EBUSY;
  3135. }
  3136. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3137. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3138. }
  3139. EXPORT_SYMBOL(icnss_idle_shutdown);
  3140. int icnss_idle_restart(struct device *dev)
  3141. {
  3142. struct icnss_priv *priv = dev_get_drvdata(dev);
  3143. if (!priv) {
  3144. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3145. return -EINVAL;
  3146. }
  3147. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3148. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3149. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3150. return -EBUSY;
  3151. }
  3152. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3153. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3154. }
  3155. EXPORT_SYMBOL(icnss_idle_restart);
  3156. int icnss_exit_power_save(struct device *dev)
  3157. {
  3158. struct icnss_priv *priv = dev_get_drvdata(dev);
  3159. icnss_pr_vdbg("Calling Exit Power Save\n");
  3160. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3161. !test_bit(ICNSS_MODE_ON, &priv->state))
  3162. return 0;
  3163. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3164. ICNSS_SMP2P_OUT_POWER_SAVE);
  3165. }
  3166. EXPORT_SYMBOL(icnss_exit_power_save);
  3167. int icnss_prevent_l1(struct device *dev)
  3168. {
  3169. struct icnss_priv *priv = dev_get_drvdata(dev);
  3170. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3171. !test_bit(ICNSS_MODE_ON, &priv->state))
  3172. return 0;
  3173. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3174. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3175. }
  3176. EXPORT_SYMBOL(icnss_prevent_l1);
  3177. void icnss_allow_l1(struct device *dev)
  3178. {
  3179. struct icnss_priv *priv = dev_get_drvdata(dev);
  3180. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3181. !test_bit(ICNSS_MODE_ON, &priv->state))
  3182. return;
  3183. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3184. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3185. }
  3186. EXPORT_SYMBOL(icnss_allow_l1);
  3187. void icnss_allow_recursive_recovery(struct device *dev)
  3188. {
  3189. struct icnss_priv *priv = dev_get_drvdata(dev);
  3190. priv->allow_recursive_recovery = true;
  3191. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3192. }
  3193. void icnss_disallow_recursive_recovery(struct device *dev)
  3194. {
  3195. struct icnss_priv *priv = dev_get_drvdata(dev);
  3196. priv->allow_recursive_recovery = false;
  3197. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3198. }
  3199. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3200. {
  3201. struct kobject *icnss_kobject;
  3202. int ret = 0;
  3203. atomic_set(&priv->is_shutdown, false);
  3204. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3205. if (!icnss_kobject) {
  3206. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3207. return -EINVAL;
  3208. }
  3209. priv->icnss_kobject = icnss_kobject;
  3210. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3211. if (ret) {
  3212. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3213. return ret;
  3214. }
  3215. return ret;
  3216. }
  3217. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3218. {
  3219. struct kobject *icnss_kobject;
  3220. icnss_kobject = priv->icnss_kobject;
  3221. if (icnss_kobject)
  3222. kobject_put(icnss_kobject);
  3223. }
  3224. static ssize_t qdss_tr_start_store(struct device *dev,
  3225. struct device_attribute *attr,
  3226. const char *buf, size_t count)
  3227. {
  3228. struct icnss_priv *priv = dev_get_drvdata(dev);
  3229. wlfw_qdss_trace_start(priv);
  3230. icnss_pr_dbg("Received QDSS start command\n");
  3231. return count;
  3232. }
  3233. static ssize_t qdss_tr_stop_store(struct device *dev,
  3234. struct device_attribute *attr,
  3235. const char *user_buf, size_t count)
  3236. {
  3237. struct icnss_priv *priv = dev_get_drvdata(dev);
  3238. u32 option = 0;
  3239. if (sscanf(user_buf, "%du", &option) != 1)
  3240. return -EINVAL;
  3241. wlfw_qdss_trace_stop(priv, option);
  3242. icnss_pr_dbg("Received QDSS stop command\n");
  3243. return count;
  3244. }
  3245. static ssize_t qdss_conf_download_store(struct device *dev,
  3246. struct device_attribute *attr,
  3247. const char *buf, size_t count)
  3248. {
  3249. struct icnss_priv *priv = dev_get_drvdata(dev);
  3250. icnss_wlfw_qdss_dnld_send_sync(priv);
  3251. icnss_pr_dbg("Received QDSS download config command\n");
  3252. return count;
  3253. }
  3254. static ssize_t hw_trc_override_store(struct device *dev,
  3255. struct device_attribute *attr,
  3256. const char *buf, size_t count)
  3257. {
  3258. struct icnss_priv *priv = dev_get_drvdata(dev);
  3259. int tmp = 0;
  3260. if (sscanf(buf, "%du", &tmp) != 1)
  3261. return -EINVAL;
  3262. priv->hw_trc_override = tmp;
  3263. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3264. return count;
  3265. }
  3266. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3267. {
  3268. struct icnss_priv *priv = icnss_get_plat_priv();
  3269. phandle rproc_phandle;
  3270. int ret;
  3271. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3272. &rproc_phandle)) {
  3273. icnss_pr_err("error reading rproc phandle\n");
  3274. return;
  3275. }
  3276. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3277. if (IS_ERR_OR_NULL(priv->rproc)) {
  3278. icnss_pr_err("rproc not found");
  3279. return;
  3280. }
  3281. ret = rproc_boot(priv->rproc);
  3282. if (ret) {
  3283. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3284. rproc_put(priv->rproc);
  3285. }
  3286. }
  3287. static ssize_t wpss_boot_store(struct device *dev,
  3288. struct device_attribute *attr,
  3289. const char *buf, size_t count)
  3290. {
  3291. struct icnss_priv *priv = dev_get_drvdata(dev);
  3292. int wpss_rproc = 0;
  3293. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3294. return count;
  3295. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3296. icnss_pr_err("Failed to read wpss rproc info");
  3297. return -EINVAL;
  3298. }
  3299. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3300. if (wpss_rproc == 1)
  3301. schedule_work(&wpss_loader);
  3302. else if (wpss_rproc == 0)
  3303. icnss_wpss_unload(priv);
  3304. return count;
  3305. }
  3306. static ssize_t wlan_en_delay_store(struct device *dev,
  3307. struct device_attribute *attr,
  3308. const char *buf, size_t count)
  3309. {
  3310. struct icnss_priv *priv = dev_get_drvdata(dev);
  3311. uint32_t wlan_en_delay = 0;
  3312. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3313. return count;
  3314. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3315. icnss_pr_err("Failed to read wlan_en_delay");
  3316. return -EINVAL;
  3317. }
  3318. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3319. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3320. return count;
  3321. }
  3322. static DEVICE_ATTR_WO(qdss_tr_start);
  3323. static DEVICE_ATTR_WO(qdss_tr_stop);
  3324. static DEVICE_ATTR_WO(qdss_conf_download);
  3325. static DEVICE_ATTR_WO(hw_trc_override);
  3326. static DEVICE_ATTR_WO(wpss_boot);
  3327. static DEVICE_ATTR_WO(wlan_en_delay);
  3328. static struct attribute *icnss_attrs[] = {
  3329. &dev_attr_qdss_tr_start.attr,
  3330. &dev_attr_qdss_tr_stop.attr,
  3331. &dev_attr_qdss_conf_download.attr,
  3332. &dev_attr_hw_trc_override.attr,
  3333. &dev_attr_wpss_boot.attr,
  3334. &dev_attr_wlan_en_delay.attr,
  3335. NULL,
  3336. };
  3337. static struct attribute_group icnss_attr_group = {
  3338. .attrs = icnss_attrs,
  3339. };
  3340. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3341. {
  3342. struct device *dev = &priv->pdev->dev;
  3343. int ret;
  3344. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3345. if (ret) {
  3346. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3347. ret);
  3348. goto out;
  3349. }
  3350. return 0;
  3351. out:
  3352. return ret;
  3353. }
  3354. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3355. {
  3356. sysfs_remove_link(kernel_kobj, "icnss");
  3357. }
  3358. static int icnss_sysfs_create(struct icnss_priv *priv)
  3359. {
  3360. int ret = 0;
  3361. ret = devm_device_add_group(&priv->pdev->dev,
  3362. &icnss_attr_group);
  3363. if (ret) {
  3364. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3365. ret);
  3366. goto out;
  3367. }
  3368. icnss_create_sysfs_link(priv);
  3369. ret = icnss_create_shutdown_sysfs(priv);
  3370. if (ret)
  3371. goto remove_icnss_group;
  3372. return 0;
  3373. remove_icnss_group:
  3374. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3375. out:
  3376. return ret;
  3377. }
  3378. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3379. {
  3380. icnss_destroy_shutdown_sysfs(priv);
  3381. icnss_remove_sysfs_link(priv);
  3382. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3383. }
  3384. static int icnss_resource_parse(struct icnss_priv *priv)
  3385. {
  3386. int ret = 0, i = 0, irq = 0;
  3387. struct platform_device *pdev = priv->pdev;
  3388. struct device *dev = &pdev->dev;
  3389. struct resource *res;
  3390. u32 int_prop;
  3391. ret = icnss_get_vreg(priv);
  3392. if (ret) {
  3393. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3394. goto out;
  3395. }
  3396. ret = icnss_get_clk(priv);
  3397. if (ret) {
  3398. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3399. goto put_vreg;
  3400. }
  3401. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3402. ret = icnss_get_psf_info(priv);
  3403. if (ret < 0)
  3404. goto out;
  3405. priv->psf_supported = true;
  3406. }
  3407. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3408. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3409. "membase");
  3410. if (!res) {
  3411. icnss_pr_err("Memory base not found in DT\n");
  3412. ret = -EINVAL;
  3413. goto put_clk;
  3414. }
  3415. priv->mem_base_pa = res->start;
  3416. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3417. resource_size(res));
  3418. if (!priv->mem_base_va) {
  3419. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3420. &priv->mem_base_pa);
  3421. ret = -EINVAL;
  3422. goto put_clk;
  3423. }
  3424. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3425. &priv->mem_base_pa,
  3426. priv->mem_base_va);
  3427. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3428. irq = platform_get_irq(pdev, i);
  3429. if (irq < 0) {
  3430. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3431. ret = -ENODEV;
  3432. goto put_clk;
  3433. } else {
  3434. priv->ce_irqs[i] = irq;
  3435. }
  3436. }
  3437. if (of_property_read_bool(pdev->dev.of_node,
  3438. "qcom,is_low_power")) {
  3439. priv->low_power_support = true;
  3440. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3441. }
  3442. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3443. &priv->rf_subtype) == 0) {
  3444. priv->is_rf_subtype_valid = true;
  3445. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3446. }
  3447. if (of_property_read_bool(pdev->dev.of_node,
  3448. "qcom,is_slate_rfa")) {
  3449. priv->is_slate_rfa = true;
  3450. icnss_pr_err("SLATE rfa is enabled\n");
  3451. }
  3452. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3453. priv->device_id == WCN6450_DEVICE_ID) {
  3454. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3455. "msi_addr");
  3456. if (!res) {
  3457. icnss_pr_err("MSI address not found in DT\n");
  3458. ret = -EINVAL;
  3459. goto put_clk;
  3460. }
  3461. priv->msi_addr_pa = res->start;
  3462. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3463. PAGE_SIZE,
  3464. DMA_FROM_DEVICE, 0);
  3465. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3466. icnss_pr_err("MSI: failed to map msi address\n");
  3467. priv->msi_addr_iova = 0;
  3468. ret = -ENOMEM;
  3469. goto put_clk;
  3470. }
  3471. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3472. &priv->msi_addr_pa,
  3473. priv->msi_addr_iova);
  3474. ret = of_property_read_u32_index(dev->of_node,
  3475. "interrupts",
  3476. 1,
  3477. &int_prop);
  3478. if (ret) {
  3479. icnss_pr_dbg("Read interrupt prop failed");
  3480. goto put_clk;
  3481. }
  3482. priv->msi_base_data = int_prop + 32;
  3483. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3484. priv->msi_base_data, int_prop);
  3485. icnss_get_msi_assignment(priv);
  3486. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3487. irq = platform_get_irq(priv->pdev, i);
  3488. if (irq < 0) {
  3489. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3490. ret = -ENODEV;
  3491. goto put_clk;
  3492. } else {
  3493. priv->srng_irqs[i] = irq;
  3494. }
  3495. }
  3496. }
  3497. return 0;
  3498. put_clk:
  3499. icnss_put_clk(priv);
  3500. put_vreg:
  3501. icnss_put_vreg(priv);
  3502. out:
  3503. return ret;
  3504. }
  3505. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3506. {
  3507. int ret = 0;
  3508. struct platform_device *pdev = priv->pdev;
  3509. struct device *dev = &pdev->dev;
  3510. struct device_node *np = NULL;
  3511. u64 prop_size = 0;
  3512. const __be32 *addrp = NULL;
  3513. np = of_parse_phandle(dev->of_node,
  3514. "qcom,wlan-msa-fixed-region", 0);
  3515. if (np) {
  3516. addrp = of_get_address(np, 0, &prop_size, NULL);
  3517. if (!addrp) {
  3518. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3519. ret = -EINVAL;
  3520. of_node_put(np);
  3521. goto out;
  3522. }
  3523. priv->msa_pa = of_translate_address(np, addrp);
  3524. if (priv->msa_pa == OF_BAD_ADDR) {
  3525. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3526. ret = -EINVAL;
  3527. of_node_put(np);
  3528. goto out;
  3529. }
  3530. of_node_put(np);
  3531. priv->msa_va = memremap(priv->msa_pa,
  3532. (unsigned long)prop_size, MEMREMAP_WT);
  3533. if (!priv->msa_va) {
  3534. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3535. &priv->msa_pa);
  3536. ret = -EINVAL;
  3537. goto out;
  3538. }
  3539. priv->msa_mem_size = prop_size;
  3540. } else {
  3541. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3542. &priv->msa_mem_size);
  3543. if (ret || priv->msa_mem_size == 0) {
  3544. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3545. priv->msa_mem_size, ret);
  3546. goto out;
  3547. }
  3548. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3549. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3550. if (!priv->msa_va) {
  3551. icnss_pr_err("DMA alloc failed for MSA\n");
  3552. ret = -ENOMEM;
  3553. goto out;
  3554. }
  3555. }
  3556. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3557. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3558. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3559. "qcom,fw-prefix");
  3560. return 0;
  3561. out:
  3562. return ret;
  3563. }
  3564. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3565. struct device *dev, unsigned long iova,
  3566. int flags, void *handler_token)
  3567. {
  3568. struct icnss_priv *priv = handler_token;
  3569. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3570. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3571. if (!priv) {
  3572. icnss_pr_err("priv is NULL\n");
  3573. return -ENODEV;
  3574. }
  3575. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3576. fw_down_data.crashed = true;
  3577. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3578. &fw_down_data);
  3579. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3580. &fw_down_data);
  3581. }
  3582. icnss_trigger_recovery(&priv->pdev->dev);
  3583. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3584. return -ENOSYS;
  3585. }
  3586. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3587. {
  3588. int ret = 0;
  3589. struct platform_device *pdev = priv->pdev;
  3590. struct device *dev = &pdev->dev;
  3591. const char *iommu_dma_type;
  3592. struct resource *res;
  3593. u32 addr_win[2];
  3594. ret = of_property_read_u32_array(dev->of_node,
  3595. "qcom,iommu-dma-addr-pool",
  3596. addr_win,
  3597. ARRAY_SIZE(addr_win));
  3598. if (ret) {
  3599. icnss_pr_err("SMMU IOVA base not found\n");
  3600. } else {
  3601. priv->smmu_iova_start = addr_win[0];
  3602. priv->smmu_iova_len = addr_win[1];
  3603. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3604. &priv->smmu_iova_start,
  3605. priv->smmu_iova_len);
  3606. priv->iommu_domain =
  3607. iommu_get_domain_for_dev(&pdev->dev);
  3608. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3609. &iommu_dma_type);
  3610. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3611. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3612. priv->smmu_s1_enable = true;
  3613. if (priv->device_id == WCN6750_DEVICE_ID ||
  3614. priv->device_id == WCN6450_DEVICE_ID)
  3615. iommu_set_fault_handler(priv->iommu_domain,
  3616. icnss_smmu_fault_handler,
  3617. priv);
  3618. }
  3619. res = platform_get_resource_byname(pdev,
  3620. IORESOURCE_MEM,
  3621. "smmu_iova_ipa");
  3622. if (!res) {
  3623. icnss_pr_err("SMMU IOVA IPA not found\n");
  3624. } else {
  3625. priv->smmu_iova_ipa_start = res->start;
  3626. priv->smmu_iova_ipa_current = res->start;
  3627. priv->smmu_iova_ipa_len = resource_size(res);
  3628. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3629. &priv->smmu_iova_ipa_start,
  3630. priv->smmu_iova_ipa_len);
  3631. }
  3632. }
  3633. return 0;
  3634. }
  3635. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3636. {
  3637. if (!priv)
  3638. return -ENODEV;
  3639. if (!priv->smmu_iova_len)
  3640. return -EINVAL;
  3641. *addr = priv->smmu_iova_start;
  3642. *size = priv->smmu_iova_len;
  3643. return 0;
  3644. }
  3645. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3646. {
  3647. if (!priv)
  3648. return -ENODEV;
  3649. if (!priv->smmu_iova_ipa_len)
  3650. return -EINVAL;
  3651. *addr = priv->smmu_iova_ipa_start;
  3652. *size = priv->smmu_iova_ipa_len;
  3653. return 0;
  3654. }
  3655. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3656. char *name)
  3657. {
  3658. if (!priv)
  3659. return;
  3660. if (!priv->use_prefix_path) {
  3661. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3662. return;
  3663. }
  3664. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3665. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3666. ADRASTEA_PATH_PREFIX "%s", name);
  3667. else if (priv->device_id == WCN6750_DEVICE_ID)
  3668. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3669. QCA6750_PATH_PREFIX "%s", name);
  3670. else if (priv->device_id == WCN6450_DEVICE_ID)
  3671. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3672. WCN6450_PATH_PREFIX "%s", name);
  3673. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3674. }
  3675. static const struct platform_device_id icnss_platform_id_table[] = {
  3676. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3677. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3678. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3679. { },
  3680. };
  3681. static const struct of_device_id icnss_dt_match[] = {
  3682. {
  3683. .compatible = "qcom,wcn6750",
  3684. .data = (void *)&icnss_platform_id_table[0]},
  3685. {
  3686. .compatible = "qcom,icnss",
  3687. .data = (void *)&icnss_platform_id_table[1]},
  3688. {
  3689. .compatible = "qcom,wcn6450",
  3690. .data = (void *)&icnss_platform_id_table[2]},
  3691. { },
  3692. };
  3693. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3694. static void icnss_init_control_params(struct icnss_priv *priv)
  3695. {
  3696. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3697. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3698. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3699. if (priv->device_id == WCN6750_DEVICE_ID ||
  3700. of_property_read_bool(priv->pdev->dev.of_node,
  3701. "wpss-support-enable"))
  3702. priv->wpss_supported = true;
  3703. if (of_property_read_bool(priv->pdev->dev.of_node,
  3704. "bdf-download-support"))
  3705. priv->bdf_download_support = true;
  3706. if (of_property_read_bool(priv->pdev->dev.of_node,
  3707. "rproc-fw-download"))
  3708. priv->rproc_fw_download = true;
  3709. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3710. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3711. }
  3712. static void icnss_read_device_configs(struct icnss_priv *priv)
  3713. {
  3714. if (of_property_read_bool(priv->pdev->dev.of_node,
  3715. "wlan-ipa-disabled")) {
  3716. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3717. }
  3718. if (of_property_read_bool(priv->pdev->dev.of_node,
  3719. "qcom,wpss-self-recovery"))
  3720. priv->wpss_self_recovery_enabled = true;
  3721. }
  3722. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3723. {
  3724. pm_runtime_get_sync(&priv->pdev->dev);
  3725. pm_runtime_forbid(&priv->pdev->dev);
  3726. pm_runtime_set_active(&priv->pdev->dev);
  3727. pm_runtime_enable(&priv->pdev->dev);
  3728. }
  3729. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3730. {
  3731. pm_runtime_disable(&priv->pdev->dev);
  3732. pm_runtime_allow(&priv->pdev->dev);
  3733. pm_runtime_put_sync(&priv->pdev->dev);
  3734. }
  3735. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3736. {
  3737. return of_property_read_bool(priv->pdev->dev.of_node,
  3738. "use-nv-mac");
  3739. }
  3740. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3741. {
  3742. struct icnss_subsys_restart_level_data *restart_level_data;
  3743. icnss_pr_info("rproc name: %s recovery disable: %d",
  3744. rproc->name, rproc->recovery_disabled);
  3745. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3746. if (!restart_level_data)
  3747. return;
  3748. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3749. if (rproc->recovery_disabled)
  3750. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3751. else
  3752. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3753. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3754. 0, restart_level_data);
  3755. }
  3756. }
  3757. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3758. static void icnss_initialize_mem_pool(unsigned long device_id)
  3759. {
  3760. cnss_initialize_prealloc_pool(device_id);
  3761. }
  3762. static void icnss_deinitialize_mem_pool(void)
  3763. {
  3764. cnss_deinitialize_prealloc_pool();
  3765. }
  3766. #else
  3767. static void icnss_initialize_mem_pool(unsigned long device_id)
  3768. {
  3769. }
  3770. static void icnss_deinitialize_mem_pool(void)
  3771. {
  3772. }
  3773. #endif
  3774. static int icnss_probe(struct platform_device *pdev)
  3775. {
  3776. int ret = 0;
  3777. struct device *dev = &pdev->dev;
  3778. struct icnss_priv *priv;
  3779. const struct of_device_id *of_id;
  3780. const struct platform_device_id *device_id;
  3781. if (dev_get_drvdata(dev)) {
  3782. icnss_pr_err("Driver is already initialized\n");
  3783. return -EEXIST;
  3784. }
  3785. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3786. if (!of_id || !of_id->data) {
  3787. icnss_pr_err("Failed to find of match device!\n");
  3788. ret = -ENODEV;
  3789. goto out_reset_drvdata;
  3790. }
  3791. device_id = of_id->data;
  3792. icnss_pr_dbg("Platform driver probe\n");
  3793. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3794. if (!priv)
  3795. return -ENOMEM;
  3796. priv->magic = ICNSS_MAGIC;
  3797. dev_set_drvdata(dev, priv);
  3798. priv->pdev = pdev;
  3799. priv->device_id = device_id->driver_data;
  3800. priv->is_chain1_supported = true;
  3801. INIT_LIST_HEAD(&priv->vreg_list);
  3802. INIT_LIST_HEAD(&priv->clk_list);
  3803. icnss_allow_recursive_recovery(dev);
  3804. icnss_initialize_mem_pool(priv->device_id);
  3805. icnss_init_control_params(priv);
  3806. icnss_read_device_configs(priv);
  3807. ret = icnss_resource_parse(priv);
  3808. if (ret)
  3809. goto out_reset_drvdata;
  3810. ret = icnss_msa_dt_parse(priv);
  3811. if (ret)
  3812. goto out_free_resources;
  3813. ret = icnss_smmu_dt_parse(priv);
  3814. if (ret)
  3815. goto out_free_resources;
  3816. spin_lock_init(&priv->event_lock);
  3817. spin_lock_init(&priv->on_off_lock);
  3818. spin_lock_init(&priv->soc_wake_msg_lock);
  3819. mutex_init(&priv->dev_lock);
  3820. mutex_init(&priv->tcdev_lock);
  3821. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3822. if (!priv->event_wq) {
  3823. icnss_pr_err("Workqueue creation failed\n");
  3824. ret = -EFAULT;
  3825. goto smmu_cleanup;
  3826. }
  3827. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3828. INIT_LIST_HEAD(&priv->event_list);
  3829. if (priv->is_slate_rfa)
  3830. init_completion(&priv->slate_boot_complete);
  3831. ret = icnss_register_fw_service(priv);
  3832. if (ret < 0) {
  3833. icnss_pr_err("fw service registration failed: %d\n", ret);
  3834. goto out_destroy_wq;
  3835. }
  3836. icnss_enable_recovery(priv);
  3837. icnss_debugfs_create(priv);
  3838. icnss_sysfs_create(priv);
  3839. ret = device_init_wakeup(&priv->pdev->dev, true);
  3840. if (ret)
  3841. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3842. ret);
  3843. icnss_set_plat_priv(priv);
  3844. init_completion(&priv->unblock_shutdown);
  3845. if (priv->device_id == WCN6750_DEVICE_ID ||
  3846. priv->device_id == WCN6450_DEVICE_ID) {
  3847. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3848. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3849. if (!priv->soc_wake_wq) {
  3850. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3851. ret = -EFAULT;
  3852. goto out_unregister_fw_service;
  3853. }
  3854. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3855. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3856. ret = icnss_genl_init();
  3857. if (ret < 0)
  3858. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3859. init_completion(&priv->smp2p_soc_wake_wait);
  3860. icnss_runtime_pm_init(priv);
  3861. icnss_aop_interface_init(priv);
  3862. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3863. priv->bdf_download_support = true;
  3864. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3865. }
  3866. if (priv->wpss_supported) {
  3867. ret = icnss_dms_init(priv);
  3868. if (ret)
  3869. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3870. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3871. icnss_pr_dbg("NV MAC feature is %s\n",
  3872. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3873. }
  3874. if (priv->wpss_supported || priv->rproc_fw_download)
  3875. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3876. timer_setup(&priv->recovery_timer,
  3877. icnss_recovery_timeout_hdlr, 0);
  3878. if (priv->wpss_self_recovery_enabled) {
  3879. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3880. timer_setup(&priv->wpss_ssr_timer,
  3881. icnss_wpss_ssr_timeout_hdlr, 0);
  3882. }
  3883. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3884. icnss_pr_info("Platform driver probed successfully\n");
  3885. return 0;
  3886. out_unregister_fw_service:
  3887. icnss_unregister_fw_service(priv);
  3888. out_destroy_wq:
  3889. destroy_workqueue(priv->event_wq);
  3890. smmu_cleanup:
  3891. priv->iommu_domain = NULL;
  3892. out_free_resources:
  3893. icnss_put_resources(priv);
  3894. out_reset_drvdata:
  3895. icnss_deinitialize_mem_pool();
  3896. dev_set_drvdata(dev, NULL);
  3897. return ret;
  3898. }
  3899. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3900. {
  3901. if (IS_ERR_OR_NULL(ramdump_info))
  3902. return;
  3903. device_unregister(ramdump_info->dev);
  3904. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3905. kfree(ramdump_info);
  3906. }
  3907. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3908. {
  3909. if (priv->batt_psy)
  3910. power_supply_put(penv->batt_psy);
  3911. if (priv->psf_supported) {
  3912. flush_workqueue(priv->soc_update_wq);
  3913. destroy_workqueue(priv->soc_update_wq);
  3914. power_supply_unreg_notifier(&priv->psf_nb);
  3915. }
  3916. }
  3917. static int icnss_remove(struct platform_device *pdev)
  3918. {
  3919. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3920. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3921. del_timer(&priv->recovery_timer);
  3922. if (priv->wpss_self_recovery_enabled)
  3923. del_timer(&priv->wpss_ssr_timer);
  3924. device_init_wakeup(&priv->pdev->dev, false);
  3925. icnss_debugfs_destroy(priv);
  3926. icnss_unregister_power_supply_notifier(penv);
  3927. icnss_sysfs_destroy(priv);
  3928. complete_all(&priv->unblock_shutdown);
  3929. if (priv->is_slate_rfa) {
  3930. complete(&priv->slate_boot_complete);
  3931. icnss_slate_ssr_unregister_notifier(priv);
  3932. icnss_unregister_slate_event_notifier(priv);
  3933. }
  3934. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3935. if (priv->wpss_supported) {
  3936. icnss_dms_deinit(priv);
  3937. icnss_wpss_early_ssr_unregister_notifier(priv);
  3938. icnss_wpss_ssr_unregister_notifier(priv);
  3939. } else {
  3940. icnss_modem_ssr_unregister_notifier(priv);
  3941. icnss_pdr_unregister_notifier(priv);
  3942. }
  3943. if (priv->device_id == WCN6750_DEVICE_ID ||
  3944. priv->device_id == WCN6450_DEVICE_ID) {
  3945. icnss_genl_exit();
  3946. icnss_runtime_pm_deinit(priv);
  3947. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3948. complete_all(&priv->smp2p_soc_wake_wait);
  3949. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3950. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3951. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3952. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3953. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3954. if (priv->soc_wake_wq)
  3955. destroy_workqueue(priv->soc_wake_wq);
  3956. icnss_aop_interface_deinit(priv);
  3957. }
  3958. class_destroy(priv->icnss_ramdump_class);
  3959. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3960. icnss_unregister_fw_service(priv);
  3961. if (priv->event_wq)
  3962. destroy_workqueue(priv->event_wq);
  3963. priv->iommu_domain = NULL;
  3964. icnss_hw_power_off(priv);
  3965. icnss_put_resources(priv);
  3966. icnss_deinitialize_mem_pool();
  3967. dev_set_drvdata(&pdev->dev, NULL);
  3968. return 0;
  3969. }
  3970. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3971. {
  3972. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3973. /* This is to handle if slate is not up and modem SSR is triggered */
  3974. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  3975. return;
  3976. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3977. ICNSS_ASSERT(0);
  3978. }
  3979. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3980. {
  3981. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3982. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3983. priv->state);
  3984. schedule_work(&wpss_ssr_work);
  3985. }
  3986. #ifdef CONFIG_PM_SLEEP
  3987. static int icnss_pm_suspend(struct device *dev)
  3988. {
  3989. struct icnss_priv *priv = dev_get_drvdata(dev);
  3990. int ret = 0;
  3991. if (priv->magic != ICNSS_MAGIC) {
  3992. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3993. dev, priv, priv->magic);
  3994. return -EINVAL;
  3995. }
  3996. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3997. if (!priv->ops || !priv->ops->pm_suspend ||
  3998. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3999. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4000. return 0;
  4001. ret = priv->ops->pm_suspend(dev);
  4002. if (ret == 0) {
  4003. if (priv->device_id == WCN6750_DEVICE_ID ||
  4004. priv->device_id == WCN6450_DEVICE_ID) {
  4005. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4006. !test_bit(ICNSS_MODE_ON, &priv->state))
  4007. return 0;
  4008. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4009. ICNSS_SMP2P_OUT_POWER_SAVE);
  4010. }
  4011. priv->stats.pm_suspend++;
  4012. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4013. } else {
  4014. priv->stats.pm_suspend_err++;
  4015. }
  4016. return ret;
  4017. }
  4018. static int icnss_pm_resume(struct device *dev)
  4019. {
  4020. struct icnss_priv *priv = dev_get_drvdata(dev);
  4021. int ret = 0;
  4022. if (priv->magic != ICNSS_MAGIC) {
  4023. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4024. dev, priv, priv->magic);
  4025. return -EINVAL;
  4026. }
  4027. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4028. if (!priv->ops || !priv->ops->pm_resume ||
  4029. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4030. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4031. goto out;
  4032. ret = priv->ops->pm_resume(dev);
  4033. out:
  4034. if (ret == 0) {
  4035. priv->stats.pm_resume++;
  4036. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4037. } else {
  4038. priv->stats.pm_resume_err++;
  4039. }
  4040. return ret;
  4041. }
  4042. static int icnss_pm_suspend_noirq(struct device *dev)
  4043. {
  4044. struct icnss_priv *priv = dev_get_drvdata(dev);
  4045. int ret = 0;
  4046. if (priv->magic != ICNSS_MAGIC) {
  4047. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4048. dev, priv, priv->magic);
  4049. return -EINVAL;
  4050. }
  4051. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4052. if (!priv->ops || !priv->ops->suspend_noirq ||
  4053. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4054. goto out;
  4055. ret = priv->ops->suspend_noirq(dev);
  4056. out:
  4057. if (ret == 0) {
  4058. priv->stats.pm_suspend_noirq++;
  4059. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4060. } else {
  4061. priv->stats.pm_suspend_noirq_err++;
  4062. }
  4063. return ret;
  4064. }
  4065. static int icnss_pm_resume_noirq(struct device *dev)
  4066. {
  4067. struct icnss_priv *priv = dev_get_drvdata(dev);
  4068. int ret = 0;
  4069. if (priv->magic != ICNSS_MAGIC) {
  4070. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4071. dev, priv, priv->magic);
  4072. return -EINVAL;
  4073. }
  4074. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4075. if (!priv->ops || !priv->ops->resume_noirq ||
  4076. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4077. goto out;
  4078. ret = priv->ops->resume_noirq(dev);
  4079. out:
  4080. if (ret == 0) {
  4081. priv->stats.pm_resume_noirq++;
  4082. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4083. } else {
  4084. priv->stats.pm_resume_noirq_err++;
  4085. }
  4086. return ret;
  4087. }
  4088. static int icnss_pm_runtime_suspend(struct device *dev)
  4089. {
  4090. struct icnss_priv *priv = dev_get_drvdata(dev);
  4091. int ret = 0;
  4092. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4093. icnss_pr_err("Ignore runtime suspend:\n");
  4094. goto out;
  4095. }
  4096. if (priv->magic != ICNSS_MAGIC) {
  4097. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4098. dev, priv, priv->magic);
  4099. return -EINVAL;
  4100. }
  4101. if (!priv->ops || !priv->ops->runtime_suspend ||
  4102. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4103. goto out;
  4104. icnss_pr_vdbg("Runtime suspend\n");
  4105. ret = priv->ops->runtime_suspend(dev);
  4106. if (!ret) {
  4107. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4108. !test_bit(ICNSS_MODE_ON, &priv->state))
  4109. return 0;
  4110. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4111. ICNSS_SMP2P_OUT_POWER_SAVE);
  4112. }
  4113. out:
  4114. return ret;
  4115. }
  4116. static int icnss_pm_runtime_resume(struct device *dev)
  4117. {
  4118. struct icnss_priv *priv = dev_get_drvdata(dev);
  4119. int ret = 0;
  4120. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4121. icnss_pr_err("Ignore runtime resume\n");
  4122. goto out;
  4123. }
  4124. if (priv->magic != ICNSS_MAGIC) {
  4125. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4126. dev, priv, priv->magic);
  4127. return -EINVAL;
  4128. }
  4129. if (!priv->ops || !priv->ops->runtime_resume ||
  4130. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4131. goto out;
  4132. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4133. ret = priv->ops->runtime_resume(dev);
  4134. out:
  4135. return ret;
  4136. }
  4137. static int icnss_pm_runtime_idle(struct device *dev)
  4138. {
  4139. struct icnss_priv *priv = dev_get_drvdata(dev);
  4140. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4141. icnss_pr_err("Ignore runtime idle\n");
  4142. goto out;
  4143. }
  4144. icnss_pr_vdbg("Runtime idle\n");
  4145. pm_request_autosuspend(dev);
  4146. out:
  4147. return -EBUSY;
  4148. }
  4149. #endif
  4150. static const struct dev_pm_ops icnss_pm_ops = {
  4151. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4152. icnss_pm_resume)
  4153. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4154. icnss_pm_resume_noirq)
  4155. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4156. icnss_pm_runtime_idle)
  4157. };
  4158. static struct platform_driver icnss_driver = {
  4159. .probe = icnss_probe,
  4160. .remove = icnss_remove,
  4161. .driver = {
  4162. .name = "icnss2",
  4163. .pm = &icnss_pm_ops,
  4164. .of_match_table = icnss_dt_match,
  4165. },
  4166. };
  4167. static int __init icnss_initialize(void)
  4168. {
  4169. icnss_debug_init();
  4170. return platform_driver_register(&icnss_driver);
  4171. }
  4172. static void __exit icnss_exit(void)
  4173. {
  4174. platform_driver_unregister(&icnss_driver);
  4175. icnss_debug_deinit();
  4176. }
  4177. module_init(icnss_initialize);
  4178. module_exit(icnss_exit);
  4179. MODULE_LICENSE("GPL v2");
  4180. MODULE_DESCRIPTION("iWCN CORE platform driver");