qmi.c 109 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. /*
  32. * Download QDSS config file based on build type. Add build type string to
  33. * file name. Download "qdss_trace_config_debug_v<n>.cfg" for debug build
  34. * and "qdss_trace_config_perf_v<n>.cfg" for perf build.
  35. */
  36. #ifdef CONFIG_CNSS2_DEBUG
  37. #define QDSS_FILE_BUILD_STR "debug_"
  38. #else
  39. #define QDSS_FILE_BUILD_STR "perf_"
  40. #endif
  41. #define HW_V1_NUMBER "v1"
  42. #define HW_V2_NUMBER "v2"
  43. #define CE_MSI_NAME "CE"
  44. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  45. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  46. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  47. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  48. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  49. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  50. #define DMS_QMI_MAX_MSG_LEN SZ_256
  51. #define MAX_SHADOW_REG_RESERVED 2
  52. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  53. MAX_SHADOW_REG_RESERVED)
  54. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  55. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  56. enum nm_modem_bit {
  57. SLEEP_CLOCK_SELECT_INTERNAL_BIT = BIT(1),
  58. HOST_CSTATE_BIT = BIT(2),
  59. };
  60. #ifdef CONFIG_CNSS2_DEBUG
  61. static bool ignore_qmi_failure;
  62. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  63. void cnss_ignore_qmi_failure(bool ignore)
  64. {
  65. ignore_qmi_failure = ignore;
  66. }
  67. #else
  68. #define CNSS_QMI_ASSERT() do { } while (0)
  69. void cnss_ignore_qmi_failure(bool ignore) { }
  70. #endif
  71. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  72. {
  73. switch (mode) {
  74. case CNSS_MISSION:
  75. return "MISSION";
  76. case CNSS_FTM:
  77. return "FTM";
  78. case CNSS_EPPING:
  79. return "EPPING";
  80. case CNSS_WALTEST:
  81. return "WALTEST";
  82. case CNSS_OFF:
  83. return "OFF";
  84. case CNSS_CCPM:
  85. return "CCPM";
  86. case CNSS_QVIT:
  87. return "QVIT";
  88. case CNSS_CALIBRATION:
  89. return "CALIBRATION";
  90. default:
  91. return "UNKNOWN";
  92. }
  93. }
  94. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  95. struct qmi_elem_info *req_ei,
  96. struct qmi_elem_info *rsp_ei,
  97. int req_id, size_t req_len,
  98. unsigned long timeout)
  99. {
  100. struct qmi_txn txn;
  101. int ret;
  102. char *err_msg;
  103. struct qmi_response_type_v01 *resp = rsp;
  104. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  105. if (ret < 0) {
  106. err_msg = "Qmi fail: fail to init txn,";
  107. goto out;
  108. }
  109. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  110. req_len, req_ei, req);
  111. if (ret < 0) {
  112. qmi_txn_cancel(&txn);
  113. err_msg = "Qmi fail: fail to send req,";
  114. goto out;
  115. }
  116. ret = qmi_txn_wait(&txn, timeout);
  117. if (ret < 0) {
  118. err_msg = "Qmi fail: wait timeout,";
  119. goto out;
  120. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  121. err_msg = "Qmi fail: request rejected,";
  122. cnss_pr_err("Qmi fail: respons with error:%d\n",
  123. resp->error);
  124. ret = -resp->result;
  125. goto out;
  126. }
  127. cnss_pr_dbg("req %x success\n", req_id);
  128. return 0;
  129. out:
  130. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  131. return ret;
  132. }
  133. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  134. {
  135. struct wlfw_ind_register_req_msg_v01 *req;
  136. struct wlfw_ind_register_resp_msg_v01 *resp;
  137. struct qmi_txn txn;
  138. int ret = 0;
  139. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  140. plat_priv->driver_state);
  141. req = kzalloc(sizeof(*req), GFP_KERNEL);
  142. if (!req)
  143. return -ENOMEM;
  144. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  145. if (!resp) {
  146. kfree(req);
  147. return -ENOMEM;
  148. }
  149. req->client_id_valid = 1;
  150. req->client_id = WLFW_CLIENT_ID;
  151. req->request_mem_enable_valid = 1;
  152. req->request_mem_enable = 1;
  153. req->fw_mem_ready_enable_valid = 1;
  154. req->fw_mem_ready_enable = 1;
  155. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  156. req->fw_init_done_enable_valid = 1;
  157. req->fw_init_done_enable = 1;
  158. req->pin_connect_result_enable_valid = 1;
  159. req->pin_connect_result_enable = 1;
  160. req->cal_done_enable_valid = 1;
  161. req->cal_done_enable = 1;
  162. req->qdss_trace_req_mem_enable_valid = 1;
  163. req->qdss_trace_req_mem_enable = 1;
  164. req->qdss_trace_save_enable_valid = 1;
  165. req->qdss_trace_save_enable = 1;
  166. req->qdss_trace_free_enable_valid = 1;
  167. req->qdss_trace_free_enable = 1;
  168. req->respond_get_info_enable_valid = 1;
  169. req->respond_get_info_enable = 1;
  170. req->wfc_call_twt_config_enable_valid = 1;
  171. req->wfc_call_twt_config_enable = 1;
  172. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  173. wlfw_ind_register_resp_msg_v01_ei, resp);
  174. if (ret < 0) {
  175. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  180. QMI_WLFW_IND_REGISTER_REQ_V01,
  181. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  182. wlfw_ind_register_req_msg_v01_ei, req);
  183. if (ret < 0) {
  184. qmi_txn_cancel(&txn);
  185. cnss_pr_err("Failed to send indication register request, err: %d\n",
  186. ret);
  187. goto out;
  188. }
  189. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  190. if (ret < 0) {
  191. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  192. ret);
  193. goto out;
  194. }
  195. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  196. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  197. resp->resp.result, resp->resp.error);
  198. ret = -resp->resp.result;
  199. goto out;
  200. }
  201. if (resp->fw_status_valid) {
  202. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  203. ret = -EALREADY;
  204. goto qmi_registered;
  205. }
  206. }
  207. kfree(req);
  208. kfree(resp);
  209. return 0;
  210. out:
  211. CNSS_QMI_ASSERT();
  212. qmi_registered:
  213. kfree(req);
  214. kfree(resp);
  215. return ret;
  216. }
  217. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  218. struct wlfw_host_cap_req_msg_v01 *req)
  219. {
  220. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  221. plat_priv->device_id == MANGO_DEVICE_ID ||
  222. plat_priv->device_id == PEACH_DEVICE_ID) {
  223. req->mlo_capable_valid = 1;
  224. req->mlo_capable = 1;
  225. req->mlo_chip_id_valid = 1;
  226. req->mlo_chip_id = 0;
  227. req->mlo_group_id_valid = 1;
  228. req->mlo_group_id = 0;
  229. req->max_mlo_peer_valid = 1;
  230. /* Max peer number generally won't change for the same device
  231. * but needs to be synced with host driver.
  232. */
  233. req->max_mlo_peer = 32;
  234. req->mlo_num_chips_valid = 1;
  235. req->mlo_num_chips = 1;
  236. req->mlo_chip_info_valid = 1;
  237. req->mlo_chip_info[0].chip_id = 0;
  238. req->mlo_chip_info[0].num_local_links = 2;
  239. req->mlo_chip_info[0].hw_link_id[0] = 0;
  240. req->mlo_chip_info[0].hw_link_id[1] = 1;
  241. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  242. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  243. }
  244. }
  245. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  246. {
  247. struct wlfw_host_cap_req_msg_v01 *req;
  248. struct wlfw_host_cap_resp_msg_v01 *resp;
  249. struct qmi_txn txn;
  250. int ret = 0;
  251. u64 iova_start = 0, iova_size = 0,
  252. iova_ipa_start = 0, iova_ipa_size = 0;
  253. u64 feature_list = 0;
  254. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  255. plat_priv->driver_state);
  256. req = kzalloc(sizeof(*req), GFP_KERNEL);
  257. if (!req)
  258. return -ENOMEM;
  259. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  260. if (!resp) {
  261. kfree(req);
  262. return -ENOMEM;
  263. }
  264. req->num_clients_valid = 1;
  265. req->num_clients = 1;
  266. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  267. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  268. if (req->wake_msi) {
  269. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  270. req->wake_msi_valid = 1;
  271. }
  272. req->bdf_support_valid = 1;
  273. req->bdf_support = 1;
  274. req->m3_support_valid = 1;
  275. req->m3_support = 1;
  276. req->m3_cache_support_valid = 1;
  277. req->m3_cache_support = 1;
  278. req->cal_done_valid = 1;
  279. req->cal_done = plat_priv->cal_done;
  280. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  281. if (plat_priv->sleep_clk) {
  282. req->nm_modem_valid = 1;
  283. /* Notify firmware about the sleep clock selection,
  284. * nm_modem_bit[1] is used for this purpose.
  285. */
  286. req->nm_modem |= SLEEP_CLOCK_SELECT_INTERNAL_BIT;
  287. }
  288. if (plat_priv->supported_link_speed) {
  289. req->pcie_link_info_valid = 1;
  290. req->pcie_link_info.pci_link_speed =
  291. plat_priv->supported_link_speed;
  292. cnss_pr_dbg("Supported link speed in Host Cap %d\n",
  293. plat_priv->supported_link_speed);
  294. }
  295. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  296. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  297. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  298. &iova_ipa_size)) {
  299. req->ddr_range_valid = 1;
  300. req->ddr_range[0].start = iova_start;
  301. req->ddr_range[0].size = iova_size + iova_ipa_size;
  302. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  303. req->ddr_range[0].start, req->ddr_range[0].size);
  304. }
  305. req->host_build_type_valid = 1;
  306. req->host_build_type = cnss_get_host_build_type();
  307. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  308. ret = cnss_get_feature_list(plat_priv, &feature_list);
  309. if (!ret) {
  310. req->feature_list_valid = 1;
  311. req->feature_list = feature_list;
  312. cnss_pr_dbg("Sending feature list 0x%llx\n",
  313. req->feature_list);
  314. }
  315. if (cnss_get_platform_name(plat_priv, req->platform_name,
  316. QMI_WLFW_MAX_PLATFORM_NAME_LEN_V01))
  317. req->platform_name_valid = 1;
  318. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  319. wlfw_host_cap_resp_msg_v01_ei, resp);
  320. if (ret < 0) {
  321. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  322. ret);
  323. goto out;
  324. }
  325. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  326. QMI_WLFW_HOST_CAP_REQ_V01,
  327. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  328. wlfw_host_cap_req_msg_v01_ei, req);
  329. if (ret < 0) {
  330. qmi_txn_cancel(&txn);
  331. cnss_pr_err("Failed to send host capability request, err: %d\n",
  332. ret);
  333. goto out;
  334. }
  335. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  336. if (ret < 0) {
  337. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  338. ret);
  339. goto out;
  340. }
  341. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  342. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  343. resp->resp.result, resp->resp.error);
  344. ret = -resp->resp.result;
  345. goto out;
  346. }
  347. kfree(req);
  348. kfree(resp);
  349. return 0;
  350. out:
  351. CNSS_QMI_ASSERT();
  352. kfree(req);
  353. kfree(resp);
  354. return ret;
  355. }
  356. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  357. {
  358. struct wlfw_respond_mem_req_msg_v01 *req;
  359. struct wlfw_respond_mem_resp_msg_v01 *resp;
  360. struct qmi_txn txn;
  361. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  362. int ret = 0, i;
  363. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  364. plat_priv->driver_state);
  365. req = kzalloc(sizeof(*req), GFP_KERNEL);
  366. if (!req)
  367. return -ENOMEM;
  368. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  369. if (!resp) {
  370. kfree(req);
  371. return -ENOMEM;
  372. }
  373. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  374. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  375. ret = -EINVAL;
  376. goto out;
  377. }
  378. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  379. for (i = 0; i < req->mem_seg_len; i++) {
  380. if (!fw_mem[i].pa || !fw_mem[i].size) {
  381. if (fw_mem[i].type == 0) {
  382. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  383. i);
  384. ret = -EINVAL;
  385. goto out;
  386. }
  387. cnss_pr_err("Memory for FW is not available for type: %u\n",
  388. fw_mem[i].type);
  389. ret = -ENOMEM;
  390. goto out;
  391. }
  392. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  393. fw_mem[i].va, &fw_mem[i].pa,
  394. fw_mem[i].size, fw_mem[i].type);
  395. req->mem_seg[i].addr = fw_mem[i].pa;
  396. req->mem_seg[i].size = fw_mem[i].size;
  397. req->mem_seg[i].type = fw_mem[i].type;
  398. }
  399. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  400. wlfw_respond_mem_resp_msg_v01_ei, resp);
  401. if (ret < 0) {
  402. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  403. ret);
  404. goto out;
  405. }
  406. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  407. QMI_WLFW_RESPOND_MEM_REQ_V01,
  408. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  409. wlfw_respond_mem_req_msg_v01_ei, req);
  410. if (ret < 0) {
  411. qmi_txn_cancel(&txn);
  412. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  413. ret);
  414. goto out;
  415. }
  416. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  417. if (ret < 0) {
  418. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  419. ret);
  420. goto out;
  421. }
  422. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  423. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  424. resp->resp.result, resp->resp.error);
  425. ret = -resp->resp.result;
  426. goto out;
  427. }
  428. kfree(req);
  429. kfree(resp);
  430. return 0;
  431. out:
  432. CNSS_QMI_ASSERT();
  433. kfree(req);
  434. kfree(resp);
  435. return ret;
  436. }
  437. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  438. {
  439. struct wlfw_cap_req_msg_v01 *req;
  440. struct wlfw_cap_resp_msg_v01 *resp;
  441. struct qmi_txn txn;
  442. char *fw_build_timestamp;
  443. int ret = 0, i;
  444. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  445. plat_priv->driver_state);
  446. req = kzalloc(sizeof(*req), GFP_KERNEL);
  447. if (!req)
  448. return -ENOMEM;
  449. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  450. if (!resp) {
  451. kfree(req);
  452. return -ENOMEM;
  453. }
  454. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  455. wlfw_cap_resp_msg_v01_ei, resp);
  456. if (ret < 0) {
  457. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  458. ret);
  459. goto out;
  460. }
  461. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  462. QMI_WLFW_CAP_REQ_V01,
  463. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  464. wlfw_cap_req_msg_v01_ei, req);
  465. if (ret < 0) {
  466. qmi_txn_cancel(&txn);
  467. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  468. ret);
  469. goto out;
  470. }
  471. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  472. if (ret < 0) {
  473. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  474. ret);
  475. goto out;
  476. }
  477. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  478. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  479. resp->resp.result, resp->resp.error);
  480. ret = -resp->resp.result;
  481. goto out;
  482. }
  483. if (resp->chip_info_valid) {
  484. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  485. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  486. }
  487. if (resp->board_info_valid)
  488. plat_priv->board_info.board_id = resp->board_info.board_id;
  489. else
  490. plat_priv->board_info.board_id = 0xFF;
  491. if (resp->soc_info_valid)
  492. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  493. if (resp->fw_version_info_valid) {
  494. plat_priv->fw_version_info.fw_version =
  495. resp->fw_version_info.fw_version;
  496. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  497. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  498. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  499. resp->fw_version_info.fw_build_timestamp,
  500. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  501. }
  502. if (resp->fw_build_id_valid) {
  503. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  504. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  505. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  506. }
  507. /* FW will send aop retention volatage for qca6490 */
  508. if (resp->voltage_mv_valid) {
  509. plat_priv->cpr_info.voltage = resp->voltage_mv;
  510. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  511. plat_priv->cpr_info.voltage);
  512. cnss_update_cpr_info(plat_priv);
  513. }
  514. if (resp->time_freq_hz_valid) {
  515. plat_priv->device_freq_hz = resp->time_freq_hz;
  516. cnss_pr_dbg("Device frequency is %d HZ\n",
  517. plat_priv->device_freq_hz);
  518. }
  519. if (resp->otp_version_valid)
  520. plat_priv->otp_version = resp->otp_version;
  521. if (resp->dev_mem_info_valid) {
  522. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  523. plat_priv->dev_mem_info[i].start =
  524. resp->dev_mem_info[i].start;
  525. plat_priv->dev_mem_info[i].size =
  526. resp->dev_mem_info[i].size;
  527. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  528. i, plat_priv->dev_mem_info[i].start,
  529. plat_priv->dev_mem_info[i].size);
  530. }
  531. }
  532. if (resp->fw_caps_valid) {
  533. plat_priv->fw_pcie_gen_switch =
  534. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  535. plat_priv->fw_aux_uc_support =
  536. !!(resp->fw_caps & QMI_WLFW_AUX_UC_SUPPORT_V01);
  537. cnss_pr_dbg("FW aux uc support capability: %d\n",
  538. plat_priv->fw_aux_uc_support);
  539. plat_priv->fw_caps = resp->fw_caps;
  540. }
  541. if (resp->hang_data_length_valid &&
  542. resp->hang_data_length &&
  543. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  544. plat_priv->hang_event_data_len = resp->hang_data_length;
  545. else
  546. plat_priv->hang_event_data_len = 0;
  547. if (resp->hang_data_addr_offset_valid)
  548. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  549. else
  550. plat_priv->hang_data_addr_offset = 0;
  551. if (resp->hwid_bitmap_valid)
  552. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  553. if (resp->ol_cpr_cfg_valid)
  554. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  555. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  556. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  557. **/
  558. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  559. if (plat_priv->board_info.board_id ==
  560. plat_priv->on_chip_pmic_board_ids[i]) {
  561. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  562. plat_priv->board_info.board_id);
  563. ret = cnss_aop_send_msg(plat_priv,
  564. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  565. if (ret < 0)
  566. cnss_pr_dbg("Failed to Send AOP Msg");
  567. break;
  568. }
  569. }
  570. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  571. plat_priv->chip_info.chip_id,
  572. plat_priv->chip_info.chip_family,
  573. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  574. plat_priv->otp_version);
  575. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  576. plat_priv->fw_version_info.fw_version,
  577. plat_priv->fw_version_info.fw_build_timestamp,
  578. plat_priv->fw_build_id,
  579. plat_priv->hwid_bitmap);
  580. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  581. plat_priv->hang_event_data_len,
  582. plat_priv->hang_data_addr_offset);
  583. kfree(req);
  584. kfree(resp);
  585. return 0;
  586. out:
  587. CNSS_QMI_ASSERT();
  588. kfree(req);
  589. kfree(resp);
  590. return ret;
  591. }
  592. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  593. {
  594. switch (bdf_type) {
  595. case CNSS_BDF_BIN:
  596. case CNSS_BDF_ELF:
  597. return "BDF";
  598. case CNSS_BDF_REGDB:
  599. return "REGDB";
  600. case CNSS_BDF_HDS:
  601. return "HDS";
  602. default:
  603. return "UNKNOWN";
  604. }
  605. }
  606. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  607. u32 bdf_type, char *filename,
  608. u32 filename_len)
  609. {
  610. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  611. int ret = 0;
  612. switch (bdf_type) {
  613. case CNSS_BDF_ELF:
  614. /* Board ID will be equal or less than 0xFF in GF mask case */
  615. if (plat_priv->board_info.board_id == 0xFF) {
  616. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  617. snprintf(filename_tmp, filename_len,
  618. ELF_BDF_FILE_NAME_GF);
  619. else
  620. snprintf(filename_tmp, filename_len,
  621. ELF_BDF_FILE_NAME);
  622. } else if (plat_priv->board_info.board_id < 0xFF) {
  623. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  624. snprintf(filename_tmp, filename_len,
  625. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  626. plat_priv->board_info.board_id);
  627. else
  628. snprintf(filename_tmp, filename_len,
  629. ELF_BDF_FILE_NAME_PREFIX "%02x",
  630. plat_priv->board_info.board_id);
  631. } else {
  632. snprintf(filename_tmp, filename_len,
  633. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  634. plat_priv->board_info.board_id >> 8 & 0xFF,
  635. plat_priv->board_info.board_id & 0xFF);
  636. }
  637. break;
  638. case CNSS_BDF_BIN:
  639. if (plat_priv->board_info.board_id == 0xFF) {
  640. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  641. snprintf(filename_tmp, filename_len,
  642. BIN_BDF_FILE_NAME_GF);
  643. else
  644. snprintf(filename_tmp, filename_len,
  645. BIN_BDF_FILE_NAME);
  646. } else if (plat_priv->board_info.board_id < 0xFF) {
  647. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  648. snprintf(filename_tmp, filename_len,
  649. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  650. plat_priv->board_info.board_id);
  651. else
  652. snprintf(filename_tmp, filename_len,
  653. BIN_BDF_FILE_NAME_PREFIX "%02x",
  654. plat_priv->board_info.board_id);
  655. } else {
  656. snprintf(filename_tmp, filename_len,
  657. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  658. plat_priv->board_info.board_id >> 8 & 0xFF,
  659. plat_priv->board_info.board_id & 0xFF);
  660. }
  661. break;
  662. case CNSS_BDF_REGDB:
  663. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  664. break;
  665. case CNSS_BDF_HDS:
  666. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  667. break;
  668. default:
  669. cnss_pr_err("Invalid BDF type: %d\n",
  670. plat_priv->ctrl_params.bdf_type);
  671. ret = -EINVAL;
  672. break;
  673. }
  674. if (!ret)
  675. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  676. return ret;
  677. }
  678. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  679. enum wlfw_ini_file_type_v01 file_type)
  680. {
  681. struct wlfw_ini_file_download_req_msg_v01 *req;
  682. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  683. struct qmi_txn txn;
  684. int ret = 0;
  685. const struct firmware *fw;
  686. char filename[INI_FILE_NAME_LEN] = {0};
  687. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  688. const u8 *temp;
  689. unsigned int remaining;
  690. bool backup_supported = false;
  691. cnss_pr_dbg("Sending QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01 message for ini_type: %d, state: 0x%lx\n",
  692. file_type, plat_priv->driver_state);
  693. req = kzalloc(sizeof(*req), GFP_KERNEL);
  694. if (!req)
  695. return -ENOMEM;
  696. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  697. if (!resp) {
  698. kfree(req);
  699. return -ENOMEM;
  700. }
  701. switch (file_type) {
  702. case WLFW_CONN_ROAM_INI_V01:
  703. snprintf(tmp_filename, sizeof(tmp_filename),
  704. CONN_ROAM_FILE_NAME);
  705. backup_supported = true;
  706. break;
  707. default:
  708. cnss_pr_err("Invalid file type: %u\n", file_type);
  709. ret = -EINVAL;
  710. goto err_req_fw;
  711. }
  712. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  713. cnss_pr_dbg("Invoke firmware_request_nowarn for %s\n", filename);
  714. /* Fetch the file */
  715. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  716. if (ret) {
  717. cnss_pr_dbg("Failed to read %s, ret: %d\n", filename, ret);
  718. if (!backup_supported)
  719. goto err_req_fw;
  720. snprintf(filename, sizeof(filename),
  721. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  722. cnss_pr_dbg("Invoke firmware_request_nowarn for %s\n",
  723. filename);
  724. ret = firmware_request_nowarn(&fw, filename,
  725. &plat_priv->plat_dev->dev);
  726. if (ret) {
  727. cnss_pr_dbg("Failed to read %s, ret: %d\n", filename,
  728. ret);
  729. goto err_req_fw;
  730. }
  731. }
  732. temp = fw->data;
  733. remaining = fw->size;
  734. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  735. remaining);
  736. while (remaining) {
  737. req->file_type_valid = 1;
  738. req->file_type = file_type;
  739. req->total_size_valid = 1;
  740. req->total_size = remaining;
  741. req->seg_id_valid = 1;
  742. req->data_valid = 1;
  743. req->end_valid = 1;
  744. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  745. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  746. } else {
  747. req->data_len = remaining;
  748. req->end = 1;
  749. }
  750. memcpy(req->data, temp, req->data_len);
  751. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  752. wlfw_ini_file_download_resp_msg_v01_ei,
  753. resp);
  754. if (ret < 0) {
  755. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  756. ret);
  757. goto err;
  758. }
  759. ret = qmi_send_request
  760. (&plat_priv->qmi_wlfw, NULL, &txn,
  761. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  762. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  763. wlfw_ini_file_download_req_msg_v01_ei, req);
  764. if (ret < 0) {
  765. qmi_txn_cancel(&txn);
  766. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  767. ret);
  768. goto err;
  769. }
  770. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  771. if (ret < 0) {
  772. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  773. ret);
  774. goto err;
  775. }
  776. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  777. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  778. resp->resp.result, resp->resp.error);
  779. ret = -resp->resp.result;
  780. goto err;
  781. }
  782. remaining -= req->data_len;
  783. temp += req->data_len;
  784. req->seg_id++;
  785. }
  786. release_firmware(fw);
  787. kfree(req);
  788. kfree(resp);
  789. return 0;
  790. err:
  791. release_firmware(fw);
  792. err_req_fw:
  793. kfree(req);
  794. kfree(resp);
  795. return ret;
  796. }
  797. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  798. u32 bdf_type)
  799. {
  800. struct wlfw_bdf_download_req_msg_v01 *req;
  801. struct wlfw_bdf_download_resp_msg_v01 *resp;
  802. struct qmi_txn txn;
  803. char filename[MAX_FIRMWARE_NAME_LEN];
  804. const struct firmware *fw_entry = NULL;
  805. const u8 *temp;
  806. unsigned int remaining;
  807. int ret = 0;
  808. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  809. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  810. req = kzalloc(sizeof(*req), GFP_KERNEL);
  811. if (!req)
  812. return -ENOMEM;
  813. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  814. if (!resp) {
  815. kfree(req);
  816. return -ENOMEM;
  817. }
  818. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  819. filename, sizeof(filename));
  820. if (ret)
  821. goto err_req_fw;
  822. cnss_pr_dbg("Invoke firmware_request_nowarn for %s\n", filename);
  823. if (bdf_type == CNSS_BDF_REGDB)
  824. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  825. filename);
  826. else
  827. ret = firmware_request_nowarn(&fw_entry, filename,
  828. &plat_priv->plat_dev->dev);
  829. if (ret) {
  830. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  831. cnss_bdf_type_to_str(bdf_type), filename, ret);
  832. goto err_req_fw;
  833. }
  834. temp = fw_entry->data;
  835. remaining = fw_entry->size;
  836. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  837. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  838. while (remaining) {
  839. req->valid = 1;
  840. req->file_id_valid = 1;
  841. req->file_id = plat_priv->board_info.board_id;
  842. req->total_size_valid = 1;
  843. req->total_size = remaining;
  844. req->seg_id_valid = 1;
  845. req->data_valid = 1;
  846. req->end_valid = 1;
  847. req->bdf_type_valid = 1;
  848. req->bdf_type = bdf_type;
  849. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  850. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  851. } else {
  852. req->data_len = remaining;
  853. req->end = 1;
  854. }
  855. memcpy(req->data, temp, req->data_len);
  856. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  857. wlfw_bdf_download_resp_msg_v01_ei, resp);
  858. if (ret < 0) {
  859. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  860. cnss_bdf_type_to_str(bdf_type), ret);
  861. goto err_send;
  862. }
  863. ret = qmi_send_request
  864. (&plat_priv->qmi_wlfw, NULL, &txn,
  865. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  866. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  867. wlfw_bdf_download_req_msg_v01_ei, req);
  868. if (ret < 0) {
  869. qmi_txn_cancel(&txn);
  870. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  871. cnss_bdf_type_to_str(bdf_type), ret);
  872. goto err_send;
  873. }
  874. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  875. if (ret < 0) {
  876. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  877. cnss_bdf_type_to_str(bdf_type), ret);
  878. goto err_send;
  879. }
  880. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  881. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  882. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  883. resp->resp.error);
  884. ret = -resp->resp.result;
  885. goto err_send;
  886. }
  887. remaining -= req->data_len;
  888. temp += req->data_len;
  889. req->seg_id++;
  890. }
  891. release_firmware(fw_entry);
  892. if (resp->host_bdf_data_valid) {
  893. /* QCA6490 enable S3E regulator for IPA configuration only */
  894. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  895. cnss_enable_int_pow_amp_vreg(plat_priv);
  896. plat_priv->cbc_file_download =
  897. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  898. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  899. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  900. plat_priv->cbc_file_download);
  901. }
  902. kfree(req);
  903. kfree(resp);
  904. return 0;
  905. err_send:
  906. release_firmware(fw_entry);
  907. err_req_fw:
  908. if (!(bdf_type == CNSS_BDF_REGDB ||
  909. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  910. ret == -EAGAIN))
  911. CNSS_QMI_ASSERT();
  912. kfree(req);
  913. kfree(resp);
  914. return ret;
  915. }
  916. int cnss_wlfw_tme_patch_dnld_send_sync(struct cnss_plat_data *plat_priv,
  917. enum wlfw_tme_lite_file_type_v01 file)
  918. {
  919. struct wlfw_tme_lite_info_req_msg_v01 *req;
  920. struct wlfw_tme_lite_info_resp_msg_v01 *resp;
  921. struct qmi_txn txn;
  922. struct cnss_fw_mem *tme_lite_mem = &plat_priv->tme_lite_mem;
  923. int ret = 0;
  924. cnss_pr_dbg("Sending TME patch information message, state: 0x%lx\n",
  925. plat_priv->driver_state);
  926. if (plat_priv->device_id != PEACH_DEVICE_ID)
  927. return 0;
  928. req = kzalloc(sizeof(*req), GFP_KERNEL);
  929. if (!req)
  930. return -ENOMEM;
  931. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  932. if (!resp) {
  933. kfree(req);
  934. return -ENOMEM;
  935. }
  936. if (!tme_lite_mem->pa || !tme_lite_mem->size) {
  937. cnss_pr_err("Memory for TME patch is not available\n");
  938. ret = -ENOMEM;
  939. goto out;
  940. }
  941. cnss_pr_dbg("TME-L patch memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  942. tme_lite_mem->va, &tme_lite_mem->pa, tme_lite_mem->size);
  943. req->tme_file = file;
  944. req->addr = plat_priv->tme_lite_mem.pa;
  945. req->size = plat_priv->tme_lite_mem.size;
  946. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  947. wlfw_tme_lite_info_resp_msg_v01_ei, resp);
  948. if (ret < 0) {
  949. cnss_pr_err("Failed to initialize txn for TME patch information request, err: %d\n",
  950. ret);
  951. goto out;
  952. }
  953. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  954. QMI_WLFW_TME_LITE_INFO_REQ_V01,
  955. WLFW_TME_LITE_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  956. wlfw_tme_lite_info_req_msg_v01_ei, req);
  957. if (ret < 0) {
  958. qmi_txn_cancel(&txn);
  959. cnss_pr_err("Failed to send TME patch information request, err: %d\n",
  960. ret);
  961. goto out;
  962. }
  963. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  964. if (ret < 0) {
  965. cnss_pr_err("Failed to wait for response of TME patch information request, err: %d\n",
  966. ret);
  967. goto out;
  968. }
  969. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  970. cnss_pr_err("TME patch information request failed, result: %d, err: %d\n",
  971. resp->resp.result, resp->resp.error);
  972. ret = -resp->resp.result;
  973. goto out;
  974. }
  975. kfree(req);
  976. kfree(resp);
  977. return 0;
  978. out:
  979. kfree(req);
  980. kfree(resp);
  981. return ret;
  982. }
  983. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  984. {
  985. struct wlfw_m3_info_req_msg_v01 *req;
  986. struct wlfw_m3_info_resp_msg_v01 *resp;
  987. struct qmi_txn txn;
  988. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  989. int ret = 0;
  990. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  991. plat_priv->driver_state);
  992. req = kzalloc(sizeof(*req), GFP_KERNEL);
  993. if (!req)
  994. return -ENOMEM;
  995. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  996. if (!resp) {
  997. kfree(req);
  998. return -ENOMEM;
  999. }
  1000. if (!m3_mem->pa || !m3_mem->size) {
  1001. cnss_pr_err("Memory for M3 is not available\n");
  1002. ret = -ENOMEM;
  1003. goto out;
  1004. }
  1005. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  1006. m3_mem->va, &m3_mem->pa, m3_mem->size);
  1007. req->addr = plat_priv->m3_mem.pa;
  1008. req->size = plat_priv->m3_mem.size;
  1009. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1010. wlfw_m3_info_resp_msg_v01_ei, resp);
  1011. if (ret < 0) {
  1012. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  1013. ret);
  1014. goto out;
  1015. }
  1016. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1017. QMI_WLFW_M3_INFO_REQ_V01,
  1018. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1019. wlfw_m3_info_req_msg_v01_ei, req);
  1020. if (ret < 0) {
  1021. qmi_txn_cancel(&txn);
  1022. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  1023. ret);
  1024. goto out;
  1025. }
  1026. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1027. if (ret < 0) {
  1028. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  1029. ret);
  1030. goto out;
  1031. }
  1032. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1033. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  1034. resp->resp.result, resp->resp.error);
  1035. ret = -resp->resp.result;
  1036. goto out;
  1037. }
  1038. kfree(req);
  1039. kfree(resp);
  1040. return 0;
  1041. out:
  1042. CNSS_QMI_ASSERT();
  1043. kfree(req);
  1044. kfree(resp);
  1045. return ret;
  1046. }
  1047. int cnss_wlfw_aux_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1048. {
  1049. struct wlfw_aux_uc_info_req_msg_v01 *req;
  1050. struct wlfw_aux_uc_info_resp_msg_v01 *resp;
  1051. struct qmi_txn txn;
  1052. struct cnss_fw_mem *aux_mem = &plat_priv->aux_mem;
  1053. int ret = 0;
  1054. cnss_pr_dbg("Sending QMI_WLFW_AUX_UC_INFO_REQ_V01 message, state: 0x%lx\n",
  1055. plat_priv->driver_state);
  1056. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1057. if (!req)
  1058. return -ENOMEM;
  1059. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1060. if (!resp) {
  1061. kfree(req);
  1062. return -ENOMEM;
  1063. }
  1064. if (!aux_mem->pa || !aux_mem->size) {
  1065. cnss_pr_err("Memory for AUX is not available\n");
  1066. ret = -ENOMEM;
  1067. goto out;
  1068. }
  1069. cnss_pr_dbg("AUX memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  1070. aux_mem->va, &aux_mem->pa, aux_mem->size);
  1071. req->addr = plat_priv->aux_mem.pa;
  1072. req->size = plat_priv->aux_mem.size;
  1073. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1074. wlfw_aux_uc_info_resp_msg_v01_ei, resp);
  1075. if (ret < 0) {
  1076. cnss_pr_err("Failed to initialize txn for QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1077. ret);
  1078. goto out;
  1079. }
  1080. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1081. QMI_WLFW_AUX_UC_INFO_REQ_V01,
  1082. WLFW_AUX_UC_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1083. wlfw_aux_uc_info_req_msg_v01_ei, req);
  1084. if (ret < 0) {
  1085. qmi_txn_cancel(&txn);
  1086. cnss_pr_err("Failed to send QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1087. ret);
  1088. goto out;
  1089. }
  1090. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1091. if (ret < 0) {
  1092. cnss_pr_err("Failed to wait for response of QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1093. ret);
  1094. goto out;
  1095. }
  1096. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1097. cnss_pr_err("QMI_WLFW_AUX_UC_INFO_REQ_V01 request failed, result: %d, err: %d\n",
  1098. resp->resp.result, resp->resp.error);
  1099. ret = -resp->resp.result;
  1100. goto out;
  1101. }
  1102. kfree(req);
  1103. kfree(resp);
  1104. return 0;
  1105. out:
  1106. CNSS_QMI_ASSERT();
  1107. kfree(req);
  1108. kfree(resp);
  1109. return ret;
  1110. }
  1111. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  1112. u8 *mac, u32 mac_len)
  1113. {
  1114. struct wlfw_mac_addr_req_msg_v01 req;
  1115. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  1116. struct qmi_txn txn;
  1117. int ret;
  1118. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  1119. return -EINVAL;
  1120. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1121. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  1122. if (ret < 0) {
  1123. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  1124. ret);
  1125. ret = -EIO;
  1126. goto out;
  1127. }
  1128. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  1129. mac, plat_priv->driver_state);
  1130. memcpy(req.mac_addr, mac, mac_len);
  1131. req.mac_addr_valid = 1;
  1132. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1133. QMI_WLFW_MAC_ADDR_REQ_V01,
  1134. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  1135. wlfw_mac_addr_req_msg_v01_ei, &req);
  1136. if (ret < 0) {
  1137. qmi_txn_cancel(&txn);
  1138. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  1139. ret = -EIO;
  1140. goto out;
  1141. }
  1142. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1143. if (ret < 0) {
  1144. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  1145. ret);
  1146. ret = -EIO;
  1147. goto out;
  1148. }
  1149. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1150. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  1151. resp.resp.result);
  1152. ret = -resp.resp.result;
  1153. }
  1154. out:
  1155. return ret;
  1156. }
  1157. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  1158. u32 total_size)
  1159. {
  1160. int ret = 0;
  1161. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  1162. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  1163. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  1164. unsigned int remaining;
  1165. struct qmi_txn txn;
  1166. cnss_pr_dbg("%s\n", __func__);
  1167. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1168. if (!req)
  1169. return -ENOMEM;
  1170. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1171. if (!resp) {
  1172. kfree(req);
  1173. return -ENOMEM;
  1174. }
  1175. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1176. if (!p_qdss_trace_data) {
  1177. ret = ENOMEM;
  1178. goto end;
  1179. }
  1180. remaining = total_size;
  1181. p_qdss_trace_data_temp = p_qdss_trace_data;
  1182. while (remaining && resp->end == 0) {
  1183. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1184. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1185. if (ret < 0) {
  1186. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1187. ret);
  1188. goto fail;
  1189. }
  1190. ret = qmi_send_request
  1191. (&plat_priv->qmi_wlfw, NULL, &txn,
  1192. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1193. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1194. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1195. if (ret < 0) {
  1196. qmi_txn_cancel(&txn);
  1197. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1198. ret);
  1199. goto fail;
  1200. }
  1201. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1202. if (ret < 0) {
  1203. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1204. ret);
  1205. goto fail;
  1206. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1207. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1208. resp->resp.result, resp->resp.error);
  1209. ret = -resp->resp.result;
  1210. goto fail;
  1211. } else {
  1212. ret = 0;
  1213. }
  1214. cnss_pr_dbg("%s: response total size %d data len %d",
  1215. __func__, resp->total_size, resp->data_len);
  1216. if ((resp->total_size_valid == 1 &&
  1217. resp->total_size == total_size) &&
  1218. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1219. (resp->data_valid == 1 &&
  1220. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1221. resp->data_len <= remaining) {
  1222. memcpy(p_qdss_trace_data_temp,
  1223. resp->data, resp->data_len);
  1224. } else {
  1225. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1226. __func__,
  1227. total_size, req->seg_id,
  1228. resp->total_size_valid,
  1229. resp->total_size,
  1230. resp->seg_id_valid,
  1231. resp->seg_id,
  1232. resp->data_valid,
  1233. resp->data_len);
  1234. ret = -1;
  1235. goto fail;
  1236. }
  1237. remaining -= resp->data_len;
  1238. p_qdss_trace_data_temp += resp->data_len;
  1239. req->seg_id++;
  1240. }
  1241. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1242. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1243. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1244. total_size);
  1245. if (ret < 0) {
  1246. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1247. ret);
  1248. ret = -1;
  1249. goto fail;
  1250. }
  1251. } else {
  1252. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1253. __func__,
  1254. remaining, resp->end_valid, resp->end);
  1255. ret = -1;
  1256. goto fail;
  1257. }
  1258. fail:
  1259. kfree(p_qdss_trace_data);
  1260. end:
  1261. kfree(req);
  1262. kfree(resp);
  1263. return ret;
  1264. }
  1265. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1266. char *filename, u32 filename_len,
  1267. bool fallback_file)
  1268. {
  1269. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1270. char *build_str = QDSS_FILE_BUILD_STR;
  1271. if (fallback_file)
  1272. build_str = "";
  1273. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1274. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1275. "_%s%s.cfg", build_str, HW_V2_NUMBER);
  1276. else
  1277. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1278. "_%s%s.cfg", build_str, HW_V1_NUMBER);
  1279. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1280. }
  1281. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1282. {
  1283. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1284. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1285. struct qmi_txn txn;
  1286. const struct firmware *fw_entry = NULL;
  1287. const u8 *temp;
  1288. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1289. unsigned int remaining;
  1290. int ret = 0;
  1291. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1292. plat_priv->driver_state);
  1293. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1294. if (!req)
  1295. return -ENOMEM;
  1296. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1297. if (!resp) {
  1298. kfree(req);
  1299. return -ENOMEM;
  1300. }
  1301. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename,
  1302. sizeof(qdss_cfg_filename), false);
  1303. cnss_pr_dbg("Invoke firmware_request_nowarn for %s\n",
  1304. qdss_cfg_filename);
  1305. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1306. qdss_cfg_filename);
  1307. if (ret) {
  1308. cnss_pr_dbg("Unable to load %s ret %d, try default file\n",
  1309. qdss_cfg_filename, ret);
  1310. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename,
  1311. sizeof(qdss_cfg_filename),
  1312. true);
  1313. cnss_pr_dbg("Invoke firmware_request_nowarn for %s\n",
  1314. qdss_cfg_filename);
  1315. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1316. qdss_cfg_filename);
  1317. if (ret) {
  1318. cnss_pr_err("Unable to load %s ret %d\n",
  1319. qdss_cfg_filename, ret);
  1320. goto err_req_fw;
  1321. }
  1322. }
  1323. temp = fw_entry->data;
  1324. remaining = fw_entry->size;
  1325. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1326. qdss_cfg_filename, remaining);
  1327. while (remaining) {
  1328. req->total_size_valid = 1;
  1329. req->total_size = remaining;
  1330. req->seg_id_valid = 1;
  1331. req->data_valid = 1;
  1332. req->end_valid = 1;
  1333. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1334. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1335. } else {
  1336. req->data_len = remaining;
  1337. req->end = 1;
  1338. }
  1339. memcpy(req->data, temp, req->data_len);
  1340. ret = qmi_txn_init
  1341. (&plat_priv->qmi_wlfw, &txn,
  1342. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1343. resp);
  1344. if (ret < 0) {
  1345. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1346. ret);
  1347. goto err_send;
  1348. }
  1349. ret = qmi_send_request
  1350. (&plat_priv->qmi_wlfw, NULL, &txn,
  1351. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1352. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1353. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1354. if (ret < 0) {
  1355. qmi_txn_cancel(&txn);
  1356. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1357. ret);
  1358. goto err_send;
  1359. }
  1360. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1361. if (ret < 0) {
  1362. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1363. ret);
  1364. goto err_send;
  1365. }
  1366. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1367. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1368. resp->resp.result, resp->resp.error);
  1369. ret = -resp->resp.result;
  1370. goto err_send;
  1371. }
  1372. remaining -= req->data_len;
  1373. temp += req->data_len;
  1374. req->seg_id++;
  1375. }
  1376. release_firmware(fw_entry);
  1377. kfree(req);
  1378. kfree(resp);
  1379. return 0;
  1380. err_send:
  1381. release_firmware(fw_entry);
  1382. err_req_fw:
  1383. kfree(req);
  1384. kfree(resp);
  1385. return ret;
  1386. }
  1387. static int wlfw_send_qdss_trace_mode_req
  1388. (struct cnss_plat_data *plat_priv,
  1389. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1390. unsigned long long option)
  1391. {
  1392. int rc = 0;
  1393. int tmp = 0;
  1394. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1395. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1396. struct qmi_txn txn;
  1397. if (!plat_priv)
  1398. return -ENODEV;
  1399. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1400. if (!req)
  1401. return -ENOMEM;
  1402. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1403. if (!resp) {
  1404. kfree(req);
  1405. return -ENOMEM;
  1406. }
  1407. req->mode_valid = 1;
  1408. req->mode = mode;
  1409. req->option_valid = 1;
  1410. req->option = option;
  1411. tmp = plat_priv->hw_trc_override;
  1412. req->hw_trc_disable_override_valid = 1;
  1413. req->hw_trc_disable_override =
  1414. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1415. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1416. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1417. __func__, mode, option, req->hw_trc_disable_override);
  1418. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1419. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1420. if (rc < 0) {
  1421. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1422. rc);
  1423. goto out;
  1424. }
  1425. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1426. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1427. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1428. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1429. if (rc < 0) {
  1430. qmi_txn_cancel(&txn);
  1431. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1432. goto out;
  1433. }
  1434. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1435. if (rc < 0) {
  1436. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1437. rc);
  1438. goto out;
  1439. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1440. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1441. resp->resp.result, resp->resp.error);
  1442. rc = -resp->resp.result;
  1443. goto out;
  1444. }
  1445. kfree(resp);
  1446. kfree(req);
  1447. return rc;
  1448. out:
  1449. kfree(resp);
  1450. kfree(req);
  1451. CNSS_QMI_ASSERT();
  1452. return rc;
  1453. }
  1454. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1455. {
  1456. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1457. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1458. }
  1459. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1460. {
  1461. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1462. option);
  1463. }
  1464. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1465. enum cnss_driver_mode mode)
  1466. {
  1467. struct wlfw_wlan_mode_req_msg_v01 *req;
  1468. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1469. struct qmi_txn txn;
  1470. int ret = 0;
  1471. if (!plat_priv)
  1472. return -ENODEV;
  1473. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1474. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1475. if (mode == CNSS_OFF &&
  1476. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1477. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1478. return 0;
  1479. }
  1480. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1481. if (!req)
  1482. return -ENOMEM;
  1483. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1484. if (!resp) {
  1485. kfree(req);
  1486. return -ENOMEM;
  1487. }
  1488. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1489. req->hw_debug_valid = 1;
  1490. req->hw_debug = 0;
  1491. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1492. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1493. if (ret < 0) {
  1494. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1495. cnss_qmi_mode_to_str(mode), mode, ret);
  1496. goto out;
  1497. }
  1498. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1499. QMI_WLFW_WLAN_MODE_REQ_V01,
  1500. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1501. wlfw_wlan_mode_req_msg_v01_ei, req);
  1502. if (ret < 0) {
  1503. qmi_txn_cancel(&txn);
  1504. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1505. cnss_qmi_mode_to_str(mode), mode, ret);
  1506. goto out;
  1507. }
  1508. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1509. if (ret < 0) {
  1510. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1511. cnss_qmi_mode_to_str(mode), mode, ret);
  1512. goto out;
  1513. }
  1514. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1515. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1516. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1517. resp->resp.error);
  1518. ret = -resp->resp.result;
  1519. goto out;
  1520. }
  1521. kfree(req);
  1522. kfree(resp);
  1523. return 0;
  1524. out:
  1525. if (mode == CNSS_OFF) {
  1526. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1527. ret = 0;
  1528. } else {
  1529. CNSS_QMI_ASSERT();
  1530. }
  1531. kfree(req);
  1532. kfree(resp);
  1533. return ret;
  1534. }
  1535. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1536. struct cnss_wlan_enable_cfg *config,
  1537. const char *host_version)
  1538. {
  1539. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1540. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1541. struct qmi_txn txn;
  1542. u32 i, ce_id, num_vectors, user_base_data, base_vector;
  1543. int ret = 0;
  1544. if (!plat_priv)
  1545. return -ENODEV;
  1546. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1547. plat_priv->driver_state);
  1548. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1549. if (!req)
  1550. return -ENOMEM;
  1551. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1552. if (!resp) {
  1553. kfree(req);
  1554. return -ENOMEM;
  1555. }
  1556. req->host_version_valid = 1;
  1557. strlcpy(req->host_version, host_version,
  1558. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1559. req->tgt_cfg_valid = 1;
  1560. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1561. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1562. else
  1563. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1564. for (i = 0; i < req->tgt_cfg_len; i++) {
  1565. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1566. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1567. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1568. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1569. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1570. }
  1571. req->svc_cfg_valid = 1;
  1572. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1573. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1574. else
  1575. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1576. for (i = 0; i < req->svc_cfg_len; i++) {
  1577. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1578. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1579. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1580. }
  1581. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1582. plat_priv->device_id != MANGO_DEVICE_ID &&
  1583. plat_priv->device_id != PEACH_DEVICE_ID) {
  1584. if (plat_priv->device_id == QCN7605_DEVICE_ID &&
  1585. config->num_shadow_reg_cfg) {
  1586. req->shadow_reg_valid = 1;
  1587. if (config->num_shadow_reg_cfg >
  1588. QMI_WLFW_MAX_NUM_SHADOW_REG_V01)
  1589. req->shadow_reg_len =
  1590. QMI_WLFW_MAX_NUM_SHADOW_REG_V01;
  1591. else
  1592. req->shadow_reg_len =
  1593. config->num_shadow_reg_cfg;
  1594. memcpy(req->shadow_reg, config->shadow_reg_cfg,
  1595. sizeof(struct wlfw_shadow_reg_cfg_s_v01) *
  1596. req->shadow_reg_len);
  1597. } else {
  1598. req->shadow_reg_v2_valid = 1;
  1599. if (config->num_shadow_reg_v2_cfg >
  1600. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1601. req->shadow_reg_v2_len =
  1602. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1603. else
  1604. req->shadow_reg_v2_len =
  1605. config->num_shadow_reg_v2_cfg;
  1606. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1607. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) *
  1608. req->shadow_reg_v2_len);
  1609. }
  1610. } else {
  1611. req->shadow_reg_v3_valid = 1;
  1612. if (config->num_shadow_reg_v3_cfg >
  1613. MAX_NUM_SHADOW_REG_V3)
  1614. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1615. else
  1616. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1617. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1618. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1619. plat_priv->num_shadow_regs_v3);
  1620. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1621. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01) *
  1622. req->shadow_reg_v3_len);
  1623. }
  1624. if (config->rri_over_ddr_cfg_valid) {
  1625. req->rri_over_ddr_cfg_valid = 1;
  1626. req->rri_over_ddr_cfg.base_addr_low =
  1627. config->rri_over_ddr_cfg.base_addr_low;
  1628. req->rri_over_ddr_cfg.base_addr_high =
  1629. config->rri_over_ddr_cfg.base_addr_high;
  1630. }
  1631. if (config->send_msi_ce) {
  1632. ret = cnss_bus_get_msi_assignment(plat_priv,
  1633. CE_MSI_NAME,
  1634. &num_vectors,
  1635. &user_base_data,
  1636. &base_vector);
  1637. if (!ret) {
  1638. req->msi_cfg_valid = 1;
  1639. req->msi_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1640. for (ce_id = 0; ce_id < QMI_WLFW_MAX_NUM_CE_V01;
  1641. ce_id++) {
  1642. req->msi_cfg[ce_id].ce_id = ce_id;
  1643. req->msi_cfg[ce_id].msi_vector =
  1644. (ce_id % num_vectors) + base_vector;
  1645. }
  1646. }
  1647. }
  1648. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1649. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1650. if (ret < 0) {
  1651. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1652. ret);
  1653. goto out;
  1654. }
  1655. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1656. QMI_WLFW_WLAN_CFG_REQ_V01,
  1657. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1658. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1659. if (ret < 0) {
  1660. qmi_txn_cancel(&txn);
  1661. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1662. ret);
  1663. goto out;
  1664. }
  1665. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1666. if (ret < 0) {
  1667. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1668. ret);
  1669. goto out;
  1670. }
  1671. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1672. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1673. resp->resp.result, resp->resp.error);
  1674. ret = -resp->resp.result;
  1675. goto out;
  1676. }
  1677. kfree(req);
  1678. kfree(resp);
  1679. return 0;
  1680. out:
  1681. CNSS_QMI_ASSERT();
  1682. kfree(req);
  1683. kfree(resp);
  1684. return ret;
  1685. }
  1686. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1687. u32 offset, u32 mem_type,
  1688. u32 data_len, u8 *data)
  1689. {
  1690. struct wlfw_athdiag_read_req_msg_v01 *req;
  1691. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1692. struct qmi_txn txn;
  1693. int ret = 0;
  1694. if (!plat_priv)
  1695. return -ENODEV;
  1696. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1697. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1698. data, data_len);
  1699. return -EINVAL;
  1700. }
  1701. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1702. plat_priv->driver_state, offset, mem_type, data_len);
  1703. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1704. if (!req)
  1705. return -ENOMEM;
  1706. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1707. if (!resp) {
  1708. kfree(req);
  1709. return -ENOMEM;
  1710. }
  1711. req->offset = offset;
  1712. req->mem_type = mem_type;
  1713. req->data_len = data_len;
  1714. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1715. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1716. if (ret < 0) {
  1717. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1718. ret);
  1719. goto out;
  1720. }
  1721. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1722. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1723. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1724. wlfw_athdiag_read_req_msg_v01_ei, req);
  1725. if (ret < 0) {
  1726. qmi_txn_cancel(&txn);
  1727. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1728. ret);
  1729. goto out;
  1730. }
  1731. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1732. if (ret < 0) {
  1733. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1734. ret);
  1735. goto out;
  1736. }
  1737. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1738. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1739. resp->resp.result, resp->resp.error);
  1740. ret = -resp->resp.result;
  1741. goto out;
  1742. }
  1743. if (!resp->data_valid || resp->data_len != data_len) {
  1744. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1745. resp->data_valid, resp->data_len);
  1746. ret = -EINVAL;
  1747. goto out;
  1748. }
  1749. memcpy(data, resp->data, resp->data_len);
  1750. kfree(req);
  1751. kfree(resp);
  1752. return 0;
  1753. out:
  1754. kfree(req);
  1755. kfree(resp);
  1756. return ret;
  1757. }
  1758. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1759. u32 offset, u32 mem_type,
  1760. u32 data_len, u8 *data)
  1761. {
  1762. struct wlfw_athdiag_write_req_msg_v01 *req;
  1763. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1764. struct qmi_txn txn;
  1765. int ret = 0;
  1766. if (!plat_priv)
  1767. return -ENODEV;
  1768. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1769. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1770. data, data_len);
  1771. return -EINVAL;
  1772. }
  1773. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1774. plat_priv->driver_state, offset, mem_type, data_len, data);
  1775. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1776. if (!req)
  1777. return -ENOMEM;
  1778. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1779. if (!resp) {
  1780. kfree(req);
  1781. return -ENOMEM;
  1782. }
  1783. req->offset = offset;
  1784. req->mem_type = mem_type;
  1785. req->data_len = data_len;
  1786. memcpy(req->data, data, data_len);
  1787. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1788. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1789. if (ret < 0) {
  1790. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1791. ret);
  1792. goto out;
  1793. }
  1794. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1795. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1796. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1797. wlfw_athdiag_write_req_msg_v01_ei, req);
  1798. if (ret < 0) {
  1799. qmi_txn_cancel(&txn);
  1800. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1801. ret);
  1802. goto out;
  1803. }
  1804. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1805. if (ret < 0) {
  1806. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1807. ret);
  1808. goto out;
  1809. }
  1810. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1811. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1812. resp->resp.result, resp->resp.error);
  1813. ret = -resp->resp.result;
  1814. goto out;
  1815. }
  1816. kfree(req);
  1817. kfree(resp);
  1818. return 0;
  1819. out:
  1820. kfree(req);
  1821. kfree(resp);
  1822. return ret;
  1823. }
  1824. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1825. u8 fw_log_mode)
  1826. {
  1827. struct wlfw_ini_req_msg_v01 *req;
  1828. struct wlfw_ini_resp_msg_v01 *resp;
  1829. struct qmi_txn txn;
  1830. int ret = 0;
  1831. if (!plat_priv)
  1832. return -ENODEV;
  1833. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1834. plat_priv->driver_state, fw_log_mode);
  1835. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1836. if (!req)
  1837. return -ENOMEM;
  1838. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1839. if (!resp) {
  1840. kfree(req);
  1841. return -ENOMEM;
  1842. }
  1843. req->enablefwlog_valid = 1;
  1844. req->enablefwlog = fw_log_mode;
  1845. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1846. wlfw_ini_resp_msg_v01_ei, resp);
  1847. if (ret < 0) {
  1848. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1849. fw_log_mode, ret);
  1850. goto out;
  1851. }
  1852. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1853. QMI_WLFW_INI_REQ_V01,
  1854. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1855. wlfw_ini_req_msg_v01_ei, req);
  1856. if (ret < 0) {
  1857. qmi_txn_cancel(&txn);
  1858. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1859. fw_log_mode, ret);
  1860. goto out;
  1861. }
  1862. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1863. if (ret < 0) {
  1864. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1865. fw_log_mode, ret);
  1866. goto out;
  1867. }
  1868. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1869. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1870. fw_log_mode, resp->resp.result, resp->resp.error);
  1871. ret = -resp->resp.result;
  1872. goto out;
  1873. }
  1874. kfree(req);
  1875. kfree(resp);
  1876. return 0;
  1877. out:
  1878. kfree(req);
  1879. kfree(resp);
  1880. return ret;
  1881. }
  1882. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1883. {
  1884. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1885. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1886. struct qmi_txn txn;
  1887. int ret = 0;
  1888. if (!plat_priv)
  1889. return -ENODEV;
  1890. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1891. !plat_priv->fw_pcie_gen_switch) {
  1892. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1893. return 0;
  1894. }
  1895. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1896. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1897. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1898. plat_priv->pcie_gen_speed;
  1899. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1900. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1901. if (ret < 0) {
  1902. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1903. ret);
  1904. goto out;
  1905. }
  1906. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1907. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1908. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1909. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1910. if (ret < 0) {
  1911. qmi_txn_cancel(&txn);
  1912. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1913. goto out;
  1914. }
  1915. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1916. if (ret < 0) {
  1917. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1918. ret);
  1919. goto out;
  1920. }
  1921. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1922. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1923. plat_priv->pcie_gen_speed, resp.resp.result,
  1924. resp.resp.error);
  1925. ret = -resp.resp.result;
  1926. }
  1927. out:
  1928. /* Reset PCIE Gen speed after one time use */
  1929. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1930. return ret;
  1931. }
  1932. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1933. {
  1934. struct wlfw_antenna_switch_req_msg_v01 *req;
  1935. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1936. struct qmi_txn txn;
  1937. int ret = 0;
  1938. if (!plat_priv)
  1939. return -ENODEV;
  1940. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1941. plat_priv->driver_state);
  1942. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1943. if (!req)
  1944. return -ENOMEM;
  1945. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1946. if (!resp) {
  1947. kfree(req);
  1948. return -ENOMEM;
  1949. }
  1950. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1951. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1952. if (ret < 0) {
  1953. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1954. ret);
  1955. goto out;
  1956. }
  1957. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1958. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1959. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1960. wlfw_antenna_switch_req_msg_v01_ei, req);
  1961. if (ret < 0) {
  1962. qmi_txn_cancel(&txn);
  1963. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1964. ret);
  1965. goto out;
  1966. }
  1967. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1968. if (ret < 0) {
  1969. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1970. ret);
  1971. goto out;
  1972. }
  1973. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1974. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1975. resp->resp.result, resp->resp.error);
  1976. ret = -resp->resp.result;
  1977. goto out;
  1978. }
  1979. if (resp->antenna_valid)
  1980. plat_priv->antenna = resp->antenna;
  1981. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1982. resp->antenna_valid, resp->antenna);
  1983. kfree(req);
  1984. kfree(resp);
  1985. return 0;
  1986. out:
  1987. kfree(req);
  1988. kfree(resp);
  1989. return ret;
  1990. }
  1991. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1992. {
  1993. struct wlfw_antenna_grant_req_msg_v01 *req;
  1994. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1995. struct qmi_txn txn;
  1996. int ret = 0;
  1997. if (!plat_priv)
  1998. return -ENODEV;
  1999. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  2000. plat_priv->driver_state, plat_priv->grant);
  2001. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2002. if (!req)
  2003. return -ENOMEM;
  2004. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2005. if (!resp) {
  2006. kfree(req);
  2007. return -ENOMEM;
  2008. }
  2009. req->grant_valid = 1;
  2010. req->grant = plat_priv->grant;
  2011. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2012. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  2013. if (ret < 0) {
  2014. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  2015. ret);
  2016. goto out;
  2017. }
  2018. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2019. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  2020. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  2021. wlfw_antenna_grant_req_msg_v01_ei, req);
  2022. if (ret < 0) {
  2023. qmi_txn_cancel(&txn);
  2024. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  2025. ret);
  2026. goto out;
  2027. }
  2028. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2029. if (ret < 0) {
  2030. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  2031. ret);
  2032. goto out;
  2033. }
  2034. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2035. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  2036. resp->resp.result, resp->resp.error);
  2037. ret = -resp->resp.result;
  2038. goto out;
  2039. }
  2040. kfree(req);
  2041. kfree(resp);
  2042. return 0;
  2043. out:
  2044. kfree(req);
  2045. kfree(resp);
  2046. return ret;
  2047. }
  2048. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  2049. {
  2050. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  2051. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  2052. struct qmi_txn txn;
  2053. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  2054. int ret = 0;
  2055. int i;
  2056. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  2057. plat_priv->driver_state);
  2058. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2059. if (!req)
  2060. return -ENOMEM;
  2061. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2062. if (!resp) {
  2063. kfree(req);
  2064. return -ENOMEM;
  2065. }
  2066. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2067. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  2068. ret = -EINVAL;
  2069. goto out;
  2070. }
  2071. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  2072. for (i = 0; i < req->mem_seg_len; i++) {
  2073. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  2074. qdss_mem[i].va, &qdss_mem[i].pa,
  2075. qdss_mem[i].size, qdss_mem[i].type);
  2076. req->mem_seg[i].addr = qdss_mem[i].pa;
  2077. req->mem_seg[i].size = qdss_mem[i].size;
  2078. req->mem_seg[i].type = qdss_mem[i].type;
  2079. }
  2080. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2081. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  2082. if (ret < 0) {
  2083. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  2084. ret);
  2085. goto out;
  2086. }
  2087. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2088. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  2089. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2090. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  2091. if (ret < 0) {
  2092. qmi_txn_cancel(&txn);
  2093. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  2094. ret);
  2095. goto out;
  2096. }
  2097. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2098. if (ret < 0) {
  2099. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  2100. ret);
  2101. goto out;
  2102. }
  2103. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2104. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  2105. resp->resp.result, resp->resp.error);
  2106. ret = -resp->resp.result;
  2107. goto out;
  2108. }
  2109. kfree(req);
  2110. kfree(resp);
  2111. return 0;
  2112. out:
  2113. kfree(req);
  2114. kfree(resp);
  2115. return ret;
  2116. }
  2117. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  2118. struct cnss_wfc_cfg cfg)
  2119. {
  2120. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2121. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2122. struct qmi_txn txn;
  2123. int ret = 0;
  2124. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2125. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  2126. return -EINVAL;
  2127. }
  2128. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2129. if (!req)
  2130. return -ENOMEM;
  2131. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2132. if (!resp) {
  2133. kfree(req);
  2134. return -ENOMEM;
  2135. }
  2136. req->wfc_call_active_valid = 1;
  2137. req->wfc_call_active = cfg.mode;
  2138. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2139. plat_priv->driver_state);
  2140. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2141. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2142. if (ret < 0) {
  2143. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2144. ret);
  2145. goto out;
  2146. }
  2147. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  2148. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2149. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2150. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2151. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2152. if (ret < 0) {
  2153. qmi_txn_cancel(&txn);
  2154. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2155. ret);
  2156. goto out;
  2157. }
  2158. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2159. if (ret < 0) {
  2160. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2161. ret);
  2162. goto out;
  2163. }
  2164. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2165. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2166. resp->resp.result, resp->resp.error);
  2167. ret = -EINVAL;
  2168. goto out;
  2169. }
  2170. ret = 0;
  2171. out:
  2172. kfree(req);
  2173. kfree(resp);
  2174. return ret;
  2175. }
  2176. static int cnss_wlfw_wfc_call_status_send_sync
  2177. (struct cnss_plat_data *plat_priv,
  2178. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  2179. {
  2180. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2181. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2182. struct qmi_txn txn;
  2183. int ret = 0;
  2184. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2185. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  2186. return -EINVAL;
  2187. }
  2188. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2189. if (!req)
  2190. return -ENOMEM;
  2191. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2192. if (!resp) {
  2193. kfree(req);
  2194. return -ENOMEM;
  2195. }
  2196. /**
  2197. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  2198. * But in r2 update QMI structure is expanded and as an effect qmi
  2199. * decoded structures have padding. Thus we cannot use buffer design.
  2200. * For backward compatibility for r1 design copy only wfc_call_active
  2201. * value in hex buffer.
  2202. */
  2203. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  2204. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  2205. /* wfc_call_active is mandatory in IMS indication */
  2206. req->wfc_call_active_valid = 1;
  2207. req->wfc_call_active = ind_msg->wfc_call_active;
  2208. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  2209. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  2210. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  2211. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  2212. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  2213. req->twt_ims_start = ind_msg->twt_ims_start;
  2214. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  2215. req->twt_ims_int = ind_msg->twt_ims_int;
  2216. req->media_quality_valid = ind_msg->media_quality_valid;
  2217. req->media_quality =
  2218. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  2219. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2220. plat_priv->driver_state);
  2221. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2222. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2223. if (ret < 0) {
  2224. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2225. ret);
  2226. goto out;
  2227. }
  2228. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2229. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2230. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2231. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2232. if (ret < 0) {
  2233. qmi_txn_cancel(&txn);
  2234. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2235. ret);
  2236. goto out;
  2237. }
  2238. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2239. if (ret < 0) {
  2240. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2241. ret);
  2242. goto out;
  2243. }
  2244. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2245. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2246. resp->resp.result, resp->resp.error);
  2247. ret = -resp->resp.result;
  2248. goto out;
  2249. }
  2250. ret = 0;
  2251. out:
  2252. kfree(req);
  2253. kfree(resp);
  2254. return ret;
  2255. }
  2256. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2257. {
  2258. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2259. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2260. struct qmi_txn txn;
  2261. int ret = 0;
  2262. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2263. plat_priv->dynamic_feature,
  2264. plat_priv->driver_state);
  2265. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2266. if (!req)
  2267. return -ENOMEM;
  2268. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2269. if (!resp) {
  2270. kfree(req);
  2271. return -ENOMEM;
  2272. }
  2273. req->mask_valid = 1;
  2274. req->mask = plat_priv->dynamic_feature;
  2275. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2276. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2277. if (ret < 0) {
  2278. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2279. ret);
  2280. goto out;
  2281. }
  2282. ret = qmi_send_request
  2283. (&plat_priv->qmi_wlfw, NULL, &txn,
  2284. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2285. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2286. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2287. if (ret < 0) {
  2288. qmi_txn_cancel(&txn);
  2289. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2290. ret);
  2291. goto out;
  2292. }
  2293. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2294. if (ret < 0) {
  2295. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2296. ret);
  2297. goto out;
  2298. }
  2299. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2300. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2301. resp->resp.result, resp->resp.error);
  2302. ret = -resp->resp.result;
  2303. goto out;
  2304. }
  2305. out:
  2306. kfree(req);
  2307. kfree(resp);
  2308. return ret;
  2309. }
  2310. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2311. void *cmd, int cmd_len)
  2312. {
  2313. struct wlfw_get_info_req_msg_v01 *req;
  2314. struct wlfw_get_info_resp_msg_v01 *resp;
  2315. struct qmi_txn txn;
  2316. int ret = 0;
  2317. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2318. type, cmd_len, plat_priv->driver_state);
  2319. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2320. return -EINVAL;
  2321. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2322. if (!req)
  2323. return -ENOMEM;
  2324. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2325. if (!resp) {
  2326. kfree(req);
  2327. return -ENOMEM;
  2328. }
  2329. req->type = type;
  2330. req->data_len = cmd_len;
  2331. memcpy(req->data, cmd, req->data_len);
  2332. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2333. wlfw_get_info_resp_msg_v01_ei, resp);
  2334. if (ret < 0) {
  2335. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2336. ret);
  2337. goto out;
  2338. }
  2339. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2340. QMI_WLFW_GET_INFO_REQ_V01,
  2341. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2342. wlfw_get_info_req_msg_v01_ei, req);
  2343. if (ret < 0) {
  2344. qmi_txn_cancel(&txn);
  2345. cnss_pr_err("Failed to send get info request, err: %d\n",
  2346. ret);
  2347. goto out;
  2348. }
  2349. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2350. if (ret < 0) {
  2351. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2352. ret);
  2353. goto out;
  2354. }
  2355. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2356. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2357. resp->resp.result, resp->resp.error);
  2358. ret = -resp->resp.result;
  2359. goto out;
  2360. }
  2361. kfree(req);
  2362. kfree(resp);
  2363. return 0;
  2364. out:
  2365. kfree(req);
  2366. kfree(resp);
  2367. return ret;
  2368. }
  2369. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2370. {
  2371. return QMI_WLFW_TIMEOUT_MS;
  2372. }
  2373. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2374. struct sockaddr_qrtr *sq,
  2375. struct qmi_txn *txn, const void *data)
  2376. {
  2377. struct cnss_plat_data *plat_priv =
  2378. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2379. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2380. int i;
  2381. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2382. if (!txn) {
  2383. cnss_pr_err("Spurious indication\n");
  2384. return;
  2385. }
  2386. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2387. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2388. return;
  2389. }
  2390. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2391. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2392. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2393. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2394. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2395. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2396. if (!plat_priv->fw_mem[i].va &&
  2397. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2398. plat_priv->fw_mem[i].attrs |=
  2399. DMA_ATTR_FORCE_CONTIGUOUS;
  2400. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2401. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2402. }
  2403. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2404. 0, NULL);
  2405. }
  2406. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2407. struct sockaddr_qrtr *sq,
  2408. struct qmi_txn *txn, const void *data)
  2409. {
  2410. struct cnss_plat_data *plat_priv =
  2411. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2412. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2413. if (!txn) {
  2414. cnss_pr_err("Spurious indication\n");
  2415. return;
  2416. }
  2417. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2418. 0, NULL);
  2419. }
  2420. /**
  2421. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2422. *
  2423. * This event is not required for HST/ HSP as FW calibration done is
  2424. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2425. */
  2426. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2427. struct sockaddr_qrtr *sq,
  2428. struct qmi_txn *txn, const void *data)
  2429. {
  2430. struct cnss_plat_data *plat_priv =
  2431. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2432. struct cnss_cal_info *cal_info;
  2433. if (!txn) {
  2434. cnss_pr_err("Spurious indication\n");
  2435. return;
  2436. }
  2437. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2438. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2439. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2440. return;
  2441. }
  2442. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2443. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2444. if (!cal_info)
  2445. return;
  2446. cal_info->cal_status = CNSS_CAL_DONE;
  2447. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2448. 0, cal_info);
  2449. }
  2450. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2451. struct sockaddr_qrtr *sq,
  2452. struct qmi_txn *txn, const void *data)
  2453. {
  2454. struct cnss_plat_data *plat_priv =
  2455. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2456. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2457. if (!txn) {
  2458. cnss_pr_err("Spurious indication\n");
  2459. return;
  2460. }
  2461. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2462. }
  2463. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2464. struct sockaddr_qrtr *sq,
  2465. struct qmi_txn *txn, const void *data)
  2466. {
  2467. struct cnss_plat_data *plat_priv =
  2468. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2469. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2470. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2471. if (!txn) {
  2472. cnss_pr_err("Spurious indication\n");
  2473. return;
  2474. }
  2475. if (ind_msg->pwr_pin_result_valid)
  2476. plat_priv->pin_result.fw_pwr_pin_result =
  2477. ind_msg->pwr_pin_result;
  2478. if (ind_msg->phy_io_pin_result_valid)
  2479. plat_priv->pin_result.fw_phy_io_pin_result =
  2480. ind_msg->phy_io_pin_result;
  2481. if (ind_msg->rf_pin_result_valid)
  2482. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2483. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2484. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2485. ind_msg->rf_pin_result);
  2486. }
  2487. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2488. u32 cal_file_download_size)
  2489. {
  2490. struct wlfw_cal_report_req_msg_v01 req = {0};
  2491. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2492. struct qmi_txn txn;
  2493. int ret = 0;
  2494. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2495. cal_file_download_size, plat_priv->driver_state);
  2496. req.cal_file_download_size_valid = 1;
  2497. req.cal_file_download_size = cal_file_download_size;
  2498. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2499. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2500. if (ret < 0) {
  2501. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2502. ret);
  2503. goto out;
  2504. }
  2505. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2506. QMI_WLFW_CAL_REPORT_REQ_V01,
  2507. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2508. wlfw_cal_report_req_msg_v01_ei, &req);
  2509. if (ret < 0) {
  2510. qmi_txn_cancel(&txn);
  2511. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2512. ret);
  2513. goto out;
  2514. }
  2515. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2516. if (ret < 0) {
  2517. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2518. ret);
  2519. goto out;
  2520. }
  2521. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2522. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2523. resp.resp.result, resp.resp.error);
  2524. ret = -resp.resp.result;
  2525. goto out;
  2526. }
  2527. out:
  2528. return ret;
  2529. }
  2530. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2531. struct sockaddr_qrtr *sq,
  2532. struct qmi_txn *txn, const void *data)
  2533. {
  2534. struct cnss_plat_data *plat_priv =
  2535. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2536. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2537. struct cnss_cal_info *cal_info;
  2538. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2539. ind->cal_file_upload_size);
  2540. cnss_pr_info("Calibration took %d ms\n",
  2541. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2542. if (!txn) {
  2543. cnss_pr_err("Spurious indication\n");
  2544. return;
  2545. }
  2546. if (ind->cal_file_upload_size_valid)
  2547. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2548. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2549. if (!cal_info)
  2550. return;
  2551. cal_info->cal_status = CNSS_CAL_DONE;
  2552. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2553. 0, cal_info);
  2554. }
  2555. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2556. struct sockaddr_qrtr *sq,
  2557. struct qmi_txn *txn,
  2558. const void *data)
  2559. {
  2560. struct cnss_plat_data *plat_priv =
  2561. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2562. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2563. int i;
  2564. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2565. if (!txn) {
  2566. cnss_pr_err("Spurious indication\n");
  2567. return;
  2568. }
  2569. if (plat_priv->qdss_mem_seg_len) {
  2570. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2571. plat_priv->qdss_mem_seg_len);
  2572. return;
  2573. }
  2574. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2575. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2576. return;
  2577. }
  2578. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2579. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2580. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2581. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2582. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2583. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2584. }
  2585. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2586. 0, NULL);
  2587. }
  2588. /**
  2589. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2590. *
  2591. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2592. * fw memory segment for dumping to file system. Only one type of mem can be
  2593. * saved per indication and is provided in mem seg index 0.
  2594. *
  2595. * Return: None
  2596. */
  2597. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2598. struct sockaddr_qrtr *sq,
  2599. struct qmi_txn *txn,
  2600. const void *data)
  2601. {
  2602. struct cnss_plat_data *plat_priv =
  2603. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2604. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2605. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2606. int i = 0;
  2607. if (!txn || !data) {
  2608. cnss_pr_err("Spurious indication\n");
  2609. return;
  2610. }
  2611. cnss_pr_dbg_buf("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2612. ind_msg->source, ind_msg->mem_seg_valid,
  2613. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2614. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2615. if (!event_data)
  2616. return;
  2617. event_data->mem_type = ind_msg->mem_seg[0].type;
  2618. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2619. event_data->total_size = ind_msg->total_size;
  2620. if (ind_msg->mem_seg_valid) {
  2621. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2622. cnss_pr_err("Invalid seg len indication\n");
  2623. goto free_event_data;
  2624. }
  2625. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2626. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2627. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2628. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2629. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2630. goto free_event_data;
  2631. }
  2632. cnss_pr_dbg_buf("seg-%d: addr 0x%llx size 0x%x\n",
  2633. i, ind_msg->mem_seg[i].addr,
  2634. ind_msg->mem_seg[i].size);
  2635. }
  2636. }
  2637. if (ind_msg->file_name_valid)
  2638. strlcpy(event_data->file_name, ind_msg->file_name,
  2639. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2640. if (ind_msg->source == 1) {
  2641. if (!ind_msg->file_name_valid)
  2642. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2643. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2644. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2645. 0, event_data);
  2646. } else {
  2647. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2648. if (!ind_msg->file_name_valid)
  2649. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2650. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2651. } else {
  2652. if (!ind_msg->file_name_valid)
  2653. strlcpy(event_data->file_name, "fw_mem_dump",
  2654. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2655. }
  2656. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2657. 0, event_data);
  2658. }
  2659. return;
  2660. free_event_data:
  2661. kfree(event_data);
  2662. }
  2663. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2664. struct sockaddr_qrtr *sq,
  2665. struct qmi_txn *txn,
  2666. const void *data)
  2667. {
  2668. struct cnss_plat_data *plat_priv =
  2669. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2670. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2671. 0, NULL);
  2672. }
  2673. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2674. struct sockaddr_qrtr *sq,
  2675. struct qmi_txn *txn,
  2676. const void *data)
  2677. {
  2678. struct cnss_plat_data *plat_priv =
  2679. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2680. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2681. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2682. if (!txn) {
  2683. cnss_pr_err("Spurious indication\n");
  2684. return;
  2685. }
  2686. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2687. ind_msg->data_len, ind_msg->type,
  2688. ind_msg->is_last, ind_msg->seq_no);
  2689. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2690. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2691. (void *)ind_msg->data,
  2692. ind_msg->data_len);
  2693. }
  2694. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2695. (struct cnss_plat_data *plat_priv,
  2696. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2697. {
  2698. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2699. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2700. struct qmi_txn txn;
  2701. int ret = 0;
  2702. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2703. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2704. return -EINVAL;
  2705. }
  2706. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2707. if (!req)
  2708. return -ENOMEM;
  2709. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2710. if (!resp) {
  2711. kfree(req);
  2712. return -ENOMEM;
  2713. }
  2714. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2715. req->twt_sta_start = ind_msg->twt_sta_start;
  2716. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2717. req->twt_sta_int = ind_msg->twt_sta_int;
  2718. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2719. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2720. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2721. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2722. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2723. req->twt_sta_dl = req->twt_sta_dl;
  2724. req->twt_sta_config_changed_valid =
  2725. ind_msg->twt_sta_config_changed_valid;
  2726. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2727. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2728. plat_priv->driver_state);
  2729. ret =
  2730. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2731. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2732. resp);
  2733. if (ret < 0) {
  2734. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2735. ret);
  2736. goto out;
  2737. }
  2738. ret =
  2739. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2740. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2741. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2742. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2743. if (ret < 0) {
  2744. qmi_txn_cancel(&txn);
  2745. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2746. goto out;
  2747. }
  2748. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2749. if (ret < 0) {
  2750. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2751. goto out;
  2752. }
  2753. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2754. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2755. resp->resp.result, resp->resp.error);
  2756. ret = -resp->resp.result;
  2757. goto out;
  2758. }
  2759. ret = 0;
  2760. out:
  2761. kfree(req);
  2762. kfree(resp);
  2763. return ret;
  2764. }
  2765. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2766. void *data)
  2767. {
  2768. int ret;
  2769. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2770. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2771. kfree(data);
  2772. return ret;
  2773. }
  2774. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2775. struct sockaddr_qrtr *sq,
  2776. struct qmi_txn *txn,
  2777. const void *data)
  2778. {
  2779. struct cnss_plat_data *plat_priv =
  2780. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2781. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2782. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2783. if (!txn) {
  2784. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2785. return;
  2786. }
  2787. if (!ind_msg) {
  2788. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2789. return;
  2790. }
  2791. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2792. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2793. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2794. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2795. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2796. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2797. ind_msg->twt_sta_config_changed_valid,
  2798. ind_msg->twt_sta_config_changed);
  2799. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2800. if (!event_data)
  2801. return;
  2802. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2803. event_data);
  2804. }
  2805. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2806. {
  2807. .type = QMI_INDICATION,
  2808. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2809. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2810. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2811. .fn = cnss_wlfw_request_mem_ind_cb
  2812. },
  2813. {
  2814. .type = QMI_INDICATION,
  2815. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2816. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2817. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2818. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2819. },
  2820. {
  2821. .type = QMI_INDICATION,
  2822. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2823. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2824. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2825. .fn = cnss_wlfw_fw_ready_ind_cb
  2826. },
  2827. {
  2828. .type = QMI_INDICATION,
  2829. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2830. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2831. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2832. .fn = cnss_wlfw_fw_init_done_ind_cb
  2833. },
  2834. {
  2835. .type = QMI_INDICATION,
  2836. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2837. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2838. .decoded_size =
  2839. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2840. .fn = cnss_wlfw_pin_result_ind_cb
  2841. },
  2842. {
  2843. .type = QMI_INDICATION,
  2844. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2845. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2846. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2847. .fn = cnss_wlfw_cal_done_ind_cb
  2848. },
  2849. {
  2850. .type = QMI_INDICATION,
  2851. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2852. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2853. .decoded_size =
  2854. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2855. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2856. },
  2857. {
  2858. .type = QMI_INDICATION,
  2859. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2860. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2861. .decoded_size =
  2862. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2863. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2864. },
  2865. {
  2866. .type = QMI_INDICATION,
  2867. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2868. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2869. .decoded_size =
  2870. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2871. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2872. },
  2873. {
  2874. .type = QMI_INDICATION,
  2875. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2876. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2877. .decoded_size =
  2878. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2879. .fn = cnss_wlfw_respond_get_info_ind_cb
  2880. },
  2881. {
  2882. .type = QMI_INDICATION,
  2883. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2884. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2885. .decoded_size =
  2886. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2887. .fn = cnss_wlfw_process_twt_cfg_ind
  2888. },
  2889. {}
  2890. };
  2891. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2892. void *data)
  2893. {
  2894. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2895. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2896. struct sockaddr_qrtr sq = { 0 };
  2897. int ret = 0;
  2898. if (!event_data)
  2899. return -EINVAL;
  2900. sq.sq_family = AF_QIPCRTR;
  2901. sq.sq_node = event_data->node;
  2902. sq.sq_port = event_data->port;
  2903. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2904. sizeof(sq), 0);
  2905. if (ret < 0) {
  2906. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2907. goto out;
  2908. }
  2909. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2910. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2911. plat_priv->driver_state);
  2912. kfree(data);
  2913. return 0;
  2914. out:
  2915. CNSS_QMI_ASSERT();
  2916. kfree(data);
  2917. return ret;
  2918. }
  2919. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2920. {
  2921. int ret = 0;
  2922. if (!plat_priv)
  2923. return -ENODEV;
  2924. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2925. cnss_pr_err("Unexpected WLFW server arrive\n");
  2926. CNSS_ASSERT(0);
  2927. return -EINVAL;
  2928. }
  2929. cnss_ignore_qmi_failure(false);
  2930. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2931. if (ret < 0)
  2932. goto out;
  2933. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2934. if (ret < 0) {
  2935. if (ret == -EALREADY)
  2936. ret = 0;
  2937. goto out;
  2938. }
  2939. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2940. if (ret < 0)
  2941. goto out;
  2942. return 0;
  2943. out:
  2944. return ret;
  2945. }
  2946. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2947. {
  2948. int ret;
  2949. if (!plat_priv)
  2950. return -ENODEV;
  2951. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2952. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2953. plat_priv->driver_state);
  2954. cnss_qmi_deinit(plat_priv);
  2955. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2956. ret = cnss_qmi_init(plat_priv);
  2957. if (ret < 0) {
  2958. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2959. CNSS_ASSERT(0);
  2960. }
  2961. return 0;
  2962. }
  2963. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2964. struct qmi_service *service)
  2965. {
  2966. struct cnss_plat_data *plat_priv =
  2967. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2968. struct cnss_qmi_event_server_arrive_data *event_data;
  2969. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2970. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2971. plat_priv->driver_state);
  2972. return 0;
  2973. }
  2974. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2975. service->node, service->port);
  2976. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2977. if (!event_data)
  2978. return -ENOMEM;
  2979. event_data->node = service->node;
  2980. event_data->port = service->port;
  2981. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2982. 0, event_data);
  2983. return 0;
  2984. }
  2985. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2986. struct qmi_service *service)
  2987. {
  2988. struct cnss_plat_data *plat_priv =
  2989. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2990. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2991. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2992. plat_priv->driver_state);
  2993. return;
  2994. }
  2995. cnss_pr_dbg("WLFW server exiting\n");
  2996. if (plat_priv) {
  2997. cnss_ignore_qmi_failure(true);
  2998. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2999. }
  3000. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  3001. 0, NULL);
  3002. }
  3003. static struct qmi_ops qmi_wlfw_ops = {
  3004. .new_server = wlfw_new_server,
  3005. .del_server = wlfw_del_server,
  3006. };
  3007. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  3008. {
  3009. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  3010. /* In order to support dual wlan card attach case,
  3011. * need separate qmi service instance id for each dev
  3012. */
  3013. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  3014. plat_priv->wlfw_service_instance_id != 0)
  3015. id = plat_priv->wlfw_service_instance_id;
  3016. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  3017. WLFW_SERVICE_VERS_V01, id);
  3018. }
  3019. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  3020. {
  3021. int ret = 0;
  3022. cnss_get_qrtr_info(plat_priv);
  3023. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  3024. QMI_WLFW_MAX_RECV_BUF_SIZE,
  3025. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  3026. if (ret < 0) {
  3027. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  3028. ret);
  3029. goto out;
  3030. }
  3031. ret = cnss_qmi_add_lookup(plat_priv);
  3032. if (ret < 0)
  3033. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  3034. out:
  3035. return ret;
  3036. }
  3037. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  3038. {
  3039. qmi_handle_release(&plat_priv->qmi_wlfw);
  3040. }
  3041. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  3042. {
  3043. struct dms_get_mac_address_req_msg_v01 req;
  3044. struct dms_get_mac_address_resp_msg_v01 resp;
  3045. struct qmi_txn txn;
  3046. int ret = 0;
  3047. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  3048. cnss_pr_err("DMS QMI connection not established\n");
  3049. return -EINVAL;
  3050. }
  3051. cnss_pr_dbg("Requesting DMS MAC address");
  3052. memset(&resp, 0, sizeof(resp));
  3053. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  3054. dms_get_mac_address_resp_msg_v01_ei, &resp);
  3055. if (ret < 0) {
  3056. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  3057. ret);
  3058. goto out;
  3059. }
  3060. req.device = DMS_DEVICE_MAC_WLAN_V01;
  3061. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  3062. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  3063. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  3064. dms_get_mac_address_req_msg_v01_ei, &req);
  3065. if (ret < 0) {
  3066. qmi_txn_cancel(&txn);
  3067. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  3068. ret);
  3069. goto out;
  3070. }
  3071. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  3072. if (ret < 0) {
  3073. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  3074. ret);
  3075. goto out;
  3076. }
  3077. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  3078. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  3079. resp.resp.result, resp.resp.error);
  3080. ret = -resp.resp.result;
  3081. goto out;
  3082. }
  3083. if (!resp.mac_address_valid ||
  3084. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  3085. cnss_pr_err("Invalid MAC address received from DMS\n");
  3086. plat_priv->dms.mac_valid = false;
  3087. goto out;
  3088. }
  3089. plat_priv->dms.mac_valid = true;
  3090. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  3091. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  3092. out:
  3093. return ret;
  3094. }
  3095. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  3096. unsigned int node, unsigned int port)
  3097. {
  3098. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  3099. struct sockaddr_qrtr sq = {0};
  3100. int ret = 0;
  3101. sq.sq_family = AF_QIPCRTR;
  3102. sq.sq_node = node;
  3103. sq.sq_port = port;
  3104. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  3105. sizeof(sq), 0);
  3106. if (ret < 0) {
  3107. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  3108. node, port);
  3109. goto out;
  3110. }
  3111. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3112. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  3113. plat_priv->driver_state);
  3114. out:
  3115. return ret;
  3116. }
  3117. static int dms_new_server(struct qmi_handle *qmi_dms,
  3118. struct qmi_service *service)
  3119. {
  3120. struct cnss_plat_data *plat_priv =
  3121. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3122. if (!service)
  3123. return -EINVAL;
  3124. return cnss_dms_connect_to_server(plat_priv, service->node,
  3125. service->port);
  3126. }
  3127. static void cnss_dms_server_exit_work(struct work_struct *work)
  3128. {
  3129. int ret;
  3130. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3131. cnss_dms_deinit(plat_priv);
  3132. cnss_pr_info("QMI DMS Server Exit");
  3133. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3134. ret = cnss_dms_init(plat_priv);
  3135. if (ret < 0)
  3136. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  3137. }
  3138. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  3139. static void dms_del_server(struct qmi_handle *qmi_dms,
  3140. struct qmi_service *service)
  3141. {
  3142. struct cnss_plat_data *plat_priv =
  3143. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3144. if (!plat_priv)
  3145. return;
  3146. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  3147. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  3148. plat_priv->driver_state);
  3149. return;
  3150. }
  3151. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3152. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3153. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  3154. plat_priv->driver_state);
  3155. schedule_work(&cnss_dms_del_work);
  3156. }
  3157. void cnss_cancel_dms_work(void)
  3158. {
  3159. cancel_work_sync(&cnss_dms_del_work);
  3160. }
  3161. static struct qmi_ops qmi_dms_ops = {
  3162. .new_server = dms_new_server,
  3163. .del_server = dms_del_server,
  3164. };
  3165. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  3166. {
  3167. int ret = 0;
  3168. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  3169. &qmi_dms_ops, NULL);
  3170. if (ret < 0) {
  3171. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  3172. goto out;
  3173. }
  3174. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  3175. DMS_SERVICE_VERS_V01, 0);
  3176. if (ret < 0)
  3177. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  3178. out:
  3179. return ret;
  3180. }
  3181. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  3182. {
  3183. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3184. qmi_handle_release(&plat_priv->qmi_dms);
  3185. }
  3186. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  3187. {
  3188. int ret;
  3189. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  3190. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  3191. struct qmi_txn txn;
  3192. if (!plat_priv)
  3193. return -ENODEV;
  3194. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  3195. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3196. if (!req)
  3197. return -ENOMEM;
  3198. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3199. if (!resp) {
  3200. kfree(req);
  3201. return -ENOMEM;
  3202. }
  3203. req->antenna = plat_priv->antenna;
  3204. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3205. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  3206. if (ret < 0) {
  3207. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  3208. ret);
  3209. goto out;
  3210. }
  3211. ret = qmi_send_request
  3212. (&plat_priv->coex_qmi, NULL, &txn,
  3213. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  3214. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  3215. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  3216. if (ret < 0) {
  3217. qmi_txn_cancel(&txn);
  3218. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  3219. ret);
  3220. goto out;
  3221. }
  3222. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3223. if (ret < 0) {
  3224. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  3225. ret);
  3226. goto out;
  3227. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3228. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3229. resp->resp.result, resp->resp.error);
  3230. ret = -resp->resp.result;
  3231. goto out;
  3232. }
  3233. if (resp->grant_valid)
  3234. plat_priv->grant = resp->grant;
  3235. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3236. kfree(resp);
  3237. kfree(req);
  3238. return 0;
  3239. out:
  3240. kfree(resp);
  3241. kfree(req);
  3242. return ret;
  3243. }
  3244. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3245. {
  3246. int ret;
  3247. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3248. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3249. struct qmi_txn txn;
  3250. if (!plat_priv)
  3251. return -ENODEV;
  3252. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3253. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3254. if (!req)
  3255. return -ENOMEM;
  3256. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3257. if (!resp) {
  3258. kfree(req);
  3259. return -ENOMEM;
  3260. }
  3261. req->antenna = plat_priv->antenna;
  3262. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3263. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3264. if (ret < 0) {
  3265. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3266. ret);
  3267. goto out;
  3268. }
  3269. ret = qmi_send_request
  3270. (&plat_priv->coex_qmi, NULL, &txn,
  3271. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3272. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3273. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3274. if (ret < 0) {
  3275. qmi_txn_cancel(&txn);
  3276. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3277. ret);
  3278. goto out;
  3279. }
  3280. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3281. if (ret < 0) {
  3282. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3283. ret);
  3284. goto out;
  3285. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3286. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3287. resp->resp.result, resp->resp.error);
  3288. ret = -resp->resp.result;
  3289. goto out;
  3290. }
  3291. kfree(resp);
  3292. kfree(req);
  3293. return 0;
  3294. out:
  3295. kfree(resp);
  3296. kfree(req);
  3297. return ret;
  3298. }
  3299. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3300. {
  3301. int ret;
  3302. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3303. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3304. u8 pcss_enabled;
  3305. if (!plat_priv)
  3306. return -ENODEV;
  3307. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3308. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3309. return 0;
  3310. }
  3311. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3312. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3313. req.restart_level_type_valid = 1;
  3314. req.restart_level_type = pcss_enabled;
  3315. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3316. wlfw_subsys_restart_level_req_msg_v01_ei,
  3317. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3318. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3319. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3320. QMI_WLFW_TIMEOUT_JF);
  3321. if (ret < 0)
  3322. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3323. return ret;
  3324. }
  3325. static int coex_new_server(struct qmi_handle *qmi,
  3326. struct qmi_service *service)
  3327. {
  3328. struct cnss_plat_data *plat_priv =
  3329. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3330. struct sockaddr_qrtr sq = { 0 };
  3331. int ret = 0;
  3332. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3333. service->node, service->port);
  3334. sq.sq_family = AF_QIPCRTR;
  3335. sq.sq_node = service->node;
  3336. sq.sq_port = service->port;
  3337. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3338. if (ret < 0) {
  3339. cnss_pr_err("Fail to connect to remote service port\n");
  3340. return ret;
  3341. }
  3342. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3343. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3344. plat_priv->driver_state);
  3345. return 0;
  3346. }
  3347. static void coex_del_server(struct qmi_handle *qmi,
  3348. struct qmi_service *service)
  3349. {
  3350. struct cnss_plat_data *plat_priv =
  3351. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3352. cnss_pr_dbg("COEX server exit\n");
  3353. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3354. }
  3355. static struct qmi_ops coex_qmi_ops = {
  3356. .new_server = coex_new_server,
  3357. .del_server = coex_del_server,
  3358. };
  3359. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3360. { int ret;
  3361. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3362. COEX_SERVICE_MAX_MSG_LEN,
  3363. &coex_qmi_ops, NULL);
  3364. if (ret < 0)
  3365. return ret;
  3366. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3367. COEX_SERVICE_VERS_V01, 0);
  3368. return ret;
  3369. }
  3370. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3371. {
  3372. qmi_handle_release(&plat_priv->coex_qmi);
  3373. }
  3374. /* IMS Service */
  3375. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3376. {
  3377. int ret;
  3378. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3379. struct qmi_txn *txn;
  3380. if (!plat_priv)
  3381. return -ENODEV;
  3382. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3383. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3384. if (!req)
  3385. return -ENOMEM;
  3386. req->wfc_call_status_valid = 1;
  3387. req->wfc_call_status = 1;
  3388. txn = &plat_priv->txn;
  3389. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3390. if (ret < 0) {
  3391. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3392. ret);
  3393. goto out;
  3394. }
  3395. ret = qmi_send_request
  3396. (&plat_priv->ims_qmi, NULL, txn,
  3397. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3398. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3399. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3400. if (ret < 0) {
  3401. qmi_txn_cancel(txn);
  3402. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3403. ret);
  3404. goto out;
  3405. }
  3406. kfree(req);
  3407. return 0;
  3408. out:
  3409. kfree(req);
  3410. return ret;
  3411. }
  3412. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3413. struct sockaddr_qrtr *sq,
  3414. struct qmi_txn *txn,
  3415. const void *data)
  3416. {
  3417. const
  3418. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3419. data;
  3420. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3421. if (!txn) {
  3422. cnss_pr_err("spurious response\n");
  3423. return;
  3424. }
  3425. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3426. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3427. resp->resp.result, resp->resp.error);
  3428. txn->result = -resp->resp.result;
  3429. }
  3430. }
  3431. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3432. void *data)
  3433. {
  3434. int ret;
  3435. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3436. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3437. kfree(data);
  3438. return ret;
  3439. }
  3440. static void
  3441. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3442. struct sockaddr_qrtr *sq,
  3443. struct qmi_txn *txn, const void *data)
  3444. {
  3445. struct cnss_plat_data *plat_priv =
  3446. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3447. const
  3448. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3449. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3450. if (!txn) {
  3451. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3452. return;
  3453. }
  3454. if (!ind_msg) {
  3455. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3456. return;
  3457. }
  3458. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3459. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3460. ind_msg->all_wfc_calls_held,
  3461. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3462. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3463. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3464. ind_msg->media_quality_valid, ind_msg->media_quality);
  3465. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3466. if (!event_data)
  3467. return;
  3468. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3469. 0, event_data);
  3470. }
  3471. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3472. {
  3473. .type = QMI_RESPONSE,
  3474. .msg_id =
  3475. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3476. .ei =
  3477. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3478. .decoded_size = sizeof(struct
  3479. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3480. .fn = ims_subscribe_for_indication_resp_cb
  3481. },
  3482. {
  3483. .type = QMI_INDICATION,
  3484. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3485. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3486. .decoded_size =
  3487. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3488. .fn = cnss_ims_process_wfc_call_ind_cb
  3489. },
  3490. {}
  3491. };
  3492. static int ims_new_server(struct qmi_handle *qmi,
  3493. struct qmi_service *service)
  3494. {
  3495. struct cnss_plat_data *plat_priv =
  3496. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3497. struct sockaddr_qrtr sq = { 0 };
  3498. int ret = 0;
  3499. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3500. service->node, service->port);
  3501. sq.sq_family = AF_QIPCRTR;
  3502. sq.sq_node = service->node;
  3503. sq.sq_port = service->port;
  3504. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3505. if (ret < 0) {
  3506. cnss_pr_err("Fail to connect to remote service port\n");
  3507. return ret;
  3508. }
  3509. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3510. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3511. plat_priv->driver_state);
  3512. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3513. return ret;
  3514. }
  3515. static void ims_del_server(struct qmi_handle *qmi,
  3516. struct qmi_service *service)
  3517. {
  3518. struct cnss_plat_data *plat_priv =
  3519. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3520. cnss_pr_dbg("IMS server exit\n");
  3521. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3522. }
  3523. static struct qmi_ops ims_qmi_ops = {
  3524. .new_server = ims_new_server,
  3525. .del_server = ims_del_server,
  3526. };
  3527. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3528. { int ret;
  3529. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3530. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3531. &ims_qmi_ops, qmi_ims_msg_handlers);
  3532. if (ret < 0)
  3533. return ret;
  3534. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3535. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3536. return ret;
  3537. }
  3538. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3539. {
  3540. qmi_handle_release(&plat_priv->ims_qmi);
  3541. }