cam_mem_mgr.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/types.h>
  7. #include <linux/mutex.h>
  8. #include <linux/slab.h>
  9. #include <linux/dma-buf.h>
  10. #include <linux/version.h>
  11. #include <linux/debugfs.h>
  12. #include "cam_compat.h"
  13. #include "cam_req_mgr_util.h"
  14. #include "cam_mem_mgr.h"
  15. #include "cam_smmu_api.h"
  16. #include "cam_debug_util.h"
  17. #include "cam_trace.h"
  18. #include "cam_common_util.h"
  19. static struct cam_mem_table tbl;
  20. static atomic_t cam_mem_mgr_state = ATOMIC_INIT(CAM_MEM_MGR_UNINITIALIZED);
  21. static void cam_mem_mgr_print_tbl(void)
  22. {
  23. int i;
  24. uint64_t ms, tmp, hrs, min, sec;
  25. struct timespec64 *ts = NULL;
  26. struct timespec64 current_ts;
  27. ktime_get_real_ts64(&(current_ts));
  28. tmp = current_ts.tv_sec;
  29. ms = (current_ts.tv_nsec) / 1000000;
  30. sec = do_div(tmp, 60);
  31. min = do_div(tmp, 60);
  32. hrs = do_div(tmp, 24);
  33. CAM_INFO(CAM_MEM, "***%llu:%llu:%llu:%llu Mem mgr table dump***",
  34. hrs, min, sec, ms);
  35. for (i = 1; i < CAM_MEM_BUFQ_MAX; i++) {
  36. if (tbl.bufq[i].active) {
  37. ts = &tbl.bufq[i].timestamp;
  38. tmp = ts->tv_sec;
  39. ms = (ts->tv_nsec) / 1000000;
  40. sec = do_div(tmp, 60);
  41. min = do_div(tmp, 60);
  42. hrs = do_div(tmp, 24);
  43. CAM_INFO(CAM_MEM,
  44. "%llu:%llu:%llu:%llu idx %d fd %d size %llu",
  45. hrs, min, sec, ms, i, tbl.bufq[i].fd,
  46. tbl.bufq[i].len);
  47. }
  48. }
  49. }
  50. static int cam_mem_util_get_dma_dir(uint32_t flags)
  51. {
  52. int rc = -EINVAL;
  53. if (flags & CAM_MEM_FLAG_HW_READ_ONLY)
  54. rc = DMA_TO_DEVICE;
  55. else if (flags & CAM_MEM_FLAG_HW_WRITE_ONLY)
  56. rc = DMA_FROM_DEVICE;
  57. else if (flags & CAM_MEM_FLAG_HW_READ_WRITE)
  58. rc = DMA_BIDIRECTIONAL;
  59. else if (flags & CAM_MEM_FLAG_PROTECTED_MODE)
  60. rc = DMA_BIDIRECTIONAL;
  61. return rc;
  62. }
  63. static int cam_mem_util_map_cpu_va(struct dma_buf *dmabuf,
  64. uintptr_t *vaddr,
  65. size_t *len)
  66. {
  67. int i, j, rc;
  68. void *addr;
  69. /*
  70. * dma_buf_begin_cpu_access() and dma_buf_end_cpu_access()
  71. * need to be called in pair to avoid stability issue.
  72. */
  73. rc = dma_buf_begin_cpu_access(dmabuf, DMA_BIDIRECTIONAL);
  74. if (rc) {
  75. CAM_ERR(CAM_MEM, "dma begin access failed rc=%d", rc);
  76. return rc;
  77. }
  78. /*
  79. * Code could be simplified if ION support of dma_buf_vmap is
  80. * available. This workaround takes the avandaage that ion_alloc
  81. * returns a virtually contiguous memory region, so we just need
  82. * to _kmap each individual page and then only use the virtual
  83. * address returned from the first call to _kmap.
  84. */
  85. for (i = 0; i < PAGE_ALIGN(dmabuf->size) / PAGE_SIZE; i++) {
  86. addr = dma_buf_kmap(dmabuf, i);
  87. if (IS_ERR_OR_NULL(addr)) {
  88. CAM_ERR(CAM_MEM, "kernel map fail");
  89. for (j = 0; j < i; j++)
  90. dma_buf_kunmap(dmabuf,
  91. j,
  92. (void *)(*vaddr + (j * PAGE_SIZE)));
  93. *vaddr = 0;
  94. *len = 0;
  95. rc = -ENOSPC;
  96. goto fail;
  97. }
  98. if (i == 0)
  99. *vaddr = (uint64_t)addr;
  100. }
  101. *len = dmabuf->size;
  102. return 0;
  103. fail:
  104. dma_buf_end_cpu_access(dmabuf, DMA_BIDIRECTIONAL);
  105. return rc;
  106. }
  107. static int cam_mem_util_unmap_cpu_va(struct dma_buf *dmabuf,
  108. uint64_t vaddr)
  109. {
  110. int i, rc = 0, page_num;
  111. if (!dmabuf || !vaddr) {
  112. CAM_ERR(CAM_MEM, "Invalid input args %pK %llX", dmabuf, vaddr);
  113. return -EINVAL;
  114. }
  115. page_num = PAGE_ALIGN(dmabuf->size) / PAGE_SIZE;
  116. for (i = 0; i < page_num; i++) {
  117. dma_buf_kunmap(dmabuf, i,
  118. (void *)(vaddr + (i * PAGE_SIZE)));
  119. }
  120. /*
  121. * dma_buf_begin_cpu_access() and
  122. * dma_buf_end_cpu_access() need to be called in pair
  123. * to avoid stability issue.
  124. */
  125. rc = dma_buf_end_cpu_access(dmabuf, DMA_BIDIRECTIONAL);
  126. if (rc) {
  127. CAM_ERR(CAM_MEM, "Failed in end cpu access, dmabuf=%pK",
  128. dmabuf);
  129. return rc;
  130. }
  131. return rc;
  132. }
  133. static int cam_mem_mgr_create_debug_fs(void)
  134. {
  135. tbl.dentry = debugfs_create_dir("camera_memmgr", NULL);
  136. if (!tbl.dentry) {
  137. CAM_ERR(CAM_MEM, "failed to create dentry");
  138. return -ENOMEM;
  139. }
  140. if (!debugfs_create_bool("alloc_profile_enable",
  141. 0644,
  142. tbl.dentry,
  143. &tbl.alloc_profile_enable)) {
  144. CAM_ERR(CAM_MEM,
  145. "failed to create alloc_profile_enable");
  146. goto err;
  147. }
  148. return 0;
  149. err:
  150. debugfs_remove_recursive(tbl.dentry);
  151. return -ENOMEM;
  152. }
  153. int cam_mem_mgr_init(void)
  154. {
  155. int i;
  156. int bitmap_size;
  157. memset(tbl.bufq, 0, sizeof(tbl.bufq));
  158. bitmap_size = BITS_TO_LONGS(CAM_MEM_BUFQ_MAX) * sizeof(long);
  159. tbl.bitmap = kzalloc(bitmap_size, GFP_KERNEL);
  160. if (!tbl.bitmap)
  161. return -ENOMEM;
  162. tbl.bits = bitmap_size * BITS_PER_BYTE;
  163. bitmap_zero(tbl.bitmap, tbl.bits);
  164. /* We need to reserve slot 0 because 0 is invalid */
  165. set_bit(0, tbl.bitmap);
  166. for (i = 1; i < CAM_MEM_BUFQ_MAX; i++) {
  167. tbl.bufq[i].fd = -1;
  168. tbl.bufq[i].buf_handle = -1;
  169. }
  170. mutex_init(&tbl.m_lock);
  171. atomic_set(&cam_mem_mgr_state, CAM_MEM_MGR_INITIALIZED);
  172. cam_mem_mgr_create_debug_fs();
  173. return 0;
  174. }
  175. static int32_t cam_mem_get_slot(void)
  176. {
  177. int32_t idx;
  178. mutex_lock(&tbl.m_lock);
  179. idx = find_first_zero_bit(tbl.bitmap, tbl.bits);
  180. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  181. mutex_unlock(&tbl.m_lock);
  182. return -ENOMEM;
  183. }
  184. set_bit(idx, tbl.bitmap);
  185. tbl.bufq[idx].active = true;
  186. ktime_get_real_ts64(&(tbl.bufq[idx].timestamp));
  187. mutex_init(&tbl.bufq[idx].q_lock);
  188. mutex_unlock(&tbl.m_lock);
  189. return idx;
  190. }
  191. static void cam_mem_put_slot(int32_t idx)
  192. {
  193. mutex_lock(&tbl.m_lock);
  194. mutex_lock(&tbl.bufq[idx].q_lock);
  195. tbl.bufq[idx].active = false;
  196. tbl.bufq[idx].is_internal = false;
  197. memset(&tbl.bufq[idx].timestamp, 0, sizeof(struct timespec64));
  198. mutex_unlock(&tbl.bufq[idx].q_lock);
  199. mutex_destroy(&tbl.bufq[idx].q_lock);
  200. clear_bit(idx, tbl.bitmap);
  201. mutex_unlock(&tbl.m_lock);
  202. }
  203. int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
  204. dma_addr_t *iova_ptr, size_t *len_ptr)
  205. {
  206. int rc = 0, idx;
  207. *len_ptr = 0;
  208. if (!atomic_read(&cam_mem_mgr_state)) {
  209. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  210. return -EINVAL;
  211. }
  212. idx = CAM_MEM_MGR_GET_HDL_IDX(buf_handle);
  213. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0)
  214. return -ENOENT;
  215. if (!tbl.bufq[idx].active) {
  216. CAM_ERR(CAM_MEM, "Buffer at idx=%d is already unmapped,",
  217. idx);
  218. return -EAGAIN;
  219. }
  220. mutex_lock(&tbl.bufq[idx].q_lock);
  221. if (buf_handle != tbl.bufq[idx].buf_handle) {
  222. rc = -EINVAL;
  223. goto handle_mismatch;
  224. }
  225. if (CAM_MEM_MGR_IS_SECURE_HDL(buf_handle))
  226. rc = cam_smmu_get_stage2_iova(mmu_handle,
  227. tbl.bufq[idx].fd,
  228. iova_ptr,
  229. len_ptr);
  230. else
  231. rc = cam_smmu_get_iova(mmu_handle,
  232. tbl.bufq[idx].fd,
  233. iova_ptr,
  234. len_ptr);
  235. if (rc) {
  236. CAM_ERR(CAM_MEM,
  237. "fail to map buf_hdl:0x%x, mmu_hdl: 0x%x for fd:%d",
  238. buf_handle, mmu_handle, tbl.bufq[idx].fd);
  239. goto handle_mismatch;
  240. }
  241. CAM_DBG(CAM_MEM,
  242. "handle:0x%x fd:%d iova_ptr:%pK len_ptr:%llu",
  243. mmu_handle, tbl.bufq[idx].fd, iova_ptr, *len_ptr);
  244. handle_mismatch:
  245. mutex_unlock(&tbl.bufq[idx].q_lock);
  246. return rc;
  247. }
  248. EXPORT_SYMBOL(cam_mem_get_io_buf);
  249. int cam_mem_get_cpu_buf(int32_t buf_handle, uintptr_t *vaddr_ptr, size_t *len)
  250. {
  251. int idx;
  252. if (!atomic_read(&cam_mem_mgr_state)) {
  253. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  254. return -EINVAL;
  255. }
  256. if (!atomic_read(&cam_mem_mgr_state)) {
  257. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  258. return -EINVAL;
  259. }
  260. if (!buf_handle || !vaddr_ptr || !len)
  261. return -EINVAL;
  262. idx = CAM_MEM_MGR_GET_HDL_IDX(buf_handle);
  263. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0)
  264. return -EINVAL;
  265. if (!tbl.bufq[idx].active) {
  266. CAM_ERR(CAM_MEM, "Buffer at idx=%d is already unmapped,",
  267. idx);
  268. return -EPERM;
  269. }
  270. if (buf_handle != tbl.bufq[idx].buf_handle)
  271. return -EINVAL;
  272. if (!(tbl.bufq[idx].flags & CAM_MEM_FLAG_KMD_ACCESS))
  273. return -EINVAL;
  274. if (tbl.bufq[idx].kmdvaddr) {
  275. *vaddr_ptr = tbl.bufq[idx].kmdvaddr;
  276. *len = tbl.bufq[idx].len;
  277. } else {
  278. CAM_ERR(CAM_MEM, "No KMD access was requested for 0x%x handle",
  279. buf_handle);
  280. return -EINVAL;
  281. }
  282. return 0;
  283. }
  284. EXPORT_SYMBOL(cam_mem_get_cpu_buf);
  285. int cam_mem_mgr_cache_ops(struct cam_mem_cache_ops_cmd *cmd)
  286. {
  287. int rc = 0, idx;
  288. uint32_t cache_dir;
  289. unsigned long dmabuf_flag = 0;
  290. if (!atomic_read(&cam_mem_mgr_state)) {
  291. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  292. return -EINVAL;
  293. }
  294. if (!cmd)
  295. return -EINVAL;
  296. idx = CAM_MEM_MGR_GET_HDL_IDX(cmd->buf_handle);
  297. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0)
  298. return -EINVAL;
  299. mutex_lock(&tbl.bufq[idx].q_lock);
  300. if (!tbl.bufq[idx].active) {
  301. CAM_ERR(CAM_MEM, "Buffer at idx=%d is already unmapped,",
  302. idx);
  303. rc = -EINVAL;
  304. goto end;
  305. }
  306. if (cmd->buf_handle != tbl.bufq[idx].buf_handle) {
  307. rc = -EINVAL;
  308. goto end;
  309. }
  310. rc = dma_buf_get_flags(tbl.bufq[idx].dma_buf, &dmabuf_flag);
  311. if (rc) {
  312. CAM_ERR(CAM_MEM, "cache get flags failed %d", rc);
  313. goto end;
  314. }
  315. if (dmabuf_flag & ION_FLAG_CACHED) {
  316. switch (cmd->mem_cache_ops) {
  317. case CAM_MEM_CLEAN_CACHE:
  318. cache_dir = DMA_TO_DEVICE;
  319. break;
  320. case CAM_MEM_INV_CACHE:
  321. cache_dir = DMA_FROM_DEVICE;
  322. break;
  323. case CAM_MEM_CLEAN_INV_CACHE:
  324. cache_dir = DMA_BIDIRECTIONAL;
  325. break;
  326. default:
  327. CAM_ERR(CAM_MEM,
  328. "invalid cache ops :%d", cmd->mem_cache_ops);
  329. rc = -EINVAL;
  330. goto end;
  331. }
  332. } else {
  333. CAM_DBG(CAM_MEM, "BUF is not cached");
  334. goto end;
  335. }
  336. rc = dma_buf_begin_cpu_access(tbl.bufq[idx].dma_buf,
  337. (cmd->mem_cache_ops == CAM_MEM_CLEAN_INV_CACHE) ?
  338. DMA_BIDIRECTIONAL : DMA_TO_DEVICE);
  339. if (rc) {
  340. CAM_ERR(CAM_MEM, "dma begin access failed rc=%d", rc);
  341. goto end;
  342. }
  343. rc = dma_buf_end_cpu_access(tbl.bufq[idx].dma_buf,
  344. cache_dir);
  345. if (rc) {
  346. CAM_ERR(CAM_MEM, "dma end access failed rc=%d", rc);
  347. goto end;
  348. }
  349. end:
  350. mutex_unlock(&tbl.bufq[idx].q_lock);
  351. return rc;
  352. }
  353. EXPORT_SYMBOL(cam_mem_mgr_cache_ops);
  354. static int cam_mem_util_get_dma_buf(size_t len,
  355. unsigned int heap_id_mask,
  356. unsigned int flags,
  357. struct dma_buf **buf)
  358. {
  359. int rc = 0;
  360. if (!buf) {
  361. CAM_ERR(CAM_MEM, "Invalid params");
  362. return -EINVAL;
  363. }
  364. *buf = ion_alloc(len, heap_id_mask, flags);
  365. if (IS_ERR_OR_NULL(*buf))
  366. return -ENOMEM;
  367. return rc;
  368. }
  369. static int cam_mem_util_get_dma_buf_fd(size_t len,
  370. size_t align,
  371. unsigned int heap_id_mask,
  372. unsigned int flags,
  373. struct dma_buf **buf,
  374. int *fd)
  375. {
  376. struct dma_buf *dmabuf = NULL;
  377. int rc = 0;
  378. struct timespec64 ts1, ts2;
  379. long microsec = 0;
  380. if (!buf || !fd) {
  381. CAM_ERR(CAM_MEM, "Invalid params, buf=%pK, fd=%pK", buf, fd);
  382. return -EINVAL;
  383. }
  384. if (tbl.alloc_profile_enable)
  385. CAM_GET_TIMESTAMP(ts1);
  386. *buf = ion_alloc(len, heap_id_mask, flags);
  387. if (IS_ERR_OR_NULL(*buf))
  388. return -ENOMEM;
  389. *fd = dma_buf_fd(*buf, O_CLOEXEC);
  390. if (*fd < 0) {
  391. CAM_ERR(CAM_MEM, "get fd fail, *fd=%d", *fd);
  392. rc = -EINVAL;
  393. goto get_fd_fail;
  394. }
  395. /*
  396. * increment the ref count so that ref count becomes 2 here
  397. * when we close fd, refcount becomes 1 and when we do
  398. * dmap_put_buf, ref count becomes 0 and memory will be freed.
  399. */
  400. dmabuf = dma_buf_get(*fd);
  401. if (IS_ERR_OR_NULL(dmabuf)) {
  402. CAM_ERR(CAM_MEM, "dma_buf_get failed, *fd=%d", *fd);
  403. rc = -EINVAL;
  404. }
  405. if (tbl.alloc_profile_enable) {
  406. CAM_GET_TIMESTAMP(ts2);
  407. CAM_GET_TIMESTAMP_DIFF_IN_MICRO(ts1, ts2, microsec);
  408. trace_cam_log_event("IONAllocProfile", "size and time in micro",
  409. len, microsec);
  410. }
  411. return rc;
  412. get_fd_fail:
  413. dma_buf_put(*buf);
  414. return rc;
  415. }
  416. static int cam_mem_util_ion_alloc(struct cam_mem_mgr_alloc_cmd *cmd,
  417. struct dma_buf **dmabuf,
  418. int *fd)
  419. {
  420. uint32_t heap_id;
  421. uint32_t ion_flag = 0;
  422. int rc;
  423. if ((cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE) &&
  424. (cmd->flags & CAM_MEM_FLAG_CDSP_OUTPUT)) {
  425. heap_id = ION_HEAP(ION_SECURE_DISPLAY_HEAP_ID);
  426. ion_flag |=
  427. ION_FLAG_SECURE | ION_FLAG_CP_CAMERA | ION_FLAG_CP_CDSP;
  428. } else if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE) {
  429. heap_id = ION_HEAP(ION_SECURE_DISPLAY_HEAP_ID);
  430. ion_flag |= ION_FLAG_SECURE | ION_FLAG_CP_CAMERA;
  431. } else {
  432. heap_id = ION_HEAP(ION_SYSTEM_HEAP_ID) |
  433. ION_HEAP(ION_CAMERA_HEAP_ID);
  434. }
  435. if (cmd->flags & CAM_MEM_FLAG_CACHE)
  436. ion_flag |= ION_FLAG_CACHED;
  437. else
  438. ion_flag &= ~ION_FLAG_CACHED;
  439. rc = cam_mem_util_get_dma_buf_fd(cmd->len,
  440. cmd->align,
  441. heap_id,
  442. ion_flag,
  443. dmabuf,
  444. fd);
  445. return rc;
  446. }
  447. static int cam_mem_util_check_alloc_flags(struct cam_mem_mgr_alloc_cmd *cmd)
  448. {
  449. if (cmd->num_hdl > CAM_MEM_MMU_MAX_HANDLE) {
  450. CAM_ERR(CAM_MEM, "Num of mmu hdl exceeded maximum(%d)",
  451. CAM_MEM_MMU_MAX_HANDLE);
  452. return -EINVAL;
  453. }
  454. if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE &&
  455. cmd->flags & CAM_MEM_FLAG_KMD_ACCESS) {
  456. CAM_ERR(CAM_MEM, "Kernel mapping in secure mode not allowed");
  457. return -EINVAL;
  458. }
  459. return 0;
  460. }
  461. static int cam_mem_util_check_map_flags(struct cam_mem_mgr_map_cmd *cmd)
  462. {
  463. if (!cmd->flags) {
  464. CAM_ERR(CAM_MEM, "Invalid flags");
  465. return -EINVAL;
  466. }
  467. if (cmd->num_hdl > CAM_MEM_MMU_MAX_HANDLE) {
  468. CAM_ERR(CAM_MEM, "Num of mmu hdl %d exceeded maximum(%d)",
  469. cmd->num_hdl, CAM_MEM_MMU_MAX_HANDLE);
  470. return -EINVAL;
  471. }
  472. if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE &&
  473. cmd->flags & CAM_MEM_FLAG_KMD_ACCESS) {
  474. CAM_ERR(CAM_MEM,
  475. "Kernel mapping in secure mode not allowed, flags=0x%x",
  476. cmd->flags);
  477. return -EINVAL;
  478. }
  479. if (cmd->flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) {
  480. CAM_ERR(CAM_MEM,
  481. "Shared memory buffers are not allowed to be mapped");
  482. return -EINVAL;
  483. }
  484. return 0;
  485. }
  486. static int cam_mem_util_map_hw_va(uint32_t flags,
  487. int32_t *mmu_hdls,
  488. int32_t num_hdls,
  489. int fd,
  490. dma_addr_t *hw_vaddr,
  491. size_t *len,
  492. enum cam_smmu_region_id region,
  493. bool is_internal)
  494. {
  495. int i;
  496. int rc = -1;
  497. int dir = cam_mem_util_get_dma_dir(flags);
  498. bool dis_delayed_unmap = false;
  499. if (dir < 0) {
  500. CAM_ERR(CAM_MEM, "fail to map DMA direction, dir=%d", dir);
  501. return dir;
  502. }
  503. if (flags & CAM_MEM_FLAG_DISABLE_DELAYED_UNMAP)
  504. dis_delayed_unmap = true;
  505. CAM_DBG(CAM_MEM,
  506. "map_hw_va : fd = %d, flags = 0x%x, dir=%d, num_hdls=%d",
  507. fd, flags, dir, num_hdls);
  508. if (flags & CAM_MEM_FLAG_PROTECTED_MODE) {
  509. for (i = 0; i < num_hdls; i++) {
  510. rc = cam_smmu_map_stage2_iova(mmu_hdls[i],
  511. fd,
  512. dir,
  513. hw_vaddr,
  514. len);
  515. if (rc < 0) {
  516. CAM_ERR(CAM_MEM,
  517. "Failed to securely map to smmu, i=%d, fd=%d, dir=%d, mmu_hdl=%d, rc=%d",
  518. i, fd, dir, mmu_hdls[i], rc);
  519. goto multi_map_fail;
  520. }
  521. }
  522. } else {
  523. for (i = 0; i < num_hdls; i++) {
  524. rc = cam_smmu_map_user_iova(mmu_hdls[i],
  525. fd,
  526. dis_delayed_unmap,
  527. dir,
  528. (dma_addr_t *)hw_vaddr,
  529. len,
  530. region,
  531. is_internal);
  532. if (rc < 0) {
  533. CAM_ERR(CAM_MEM,
  534. "Failed to map to smmu, i=%d, fd=%d, dir=%d, mmu_hdl=%d, region=%d, rc=%d",
  535. i, fd, dir, mmu_hdls[i], region, rc);
  536. goto multi_map_fail;
  537. }
  538. }
  539. }
  540. return rc;
  541. multi_map_fail:
  542. if (flags & CAM_MEM_FLAG_PROTECTED_MODE)
  543. for (--i; i > 0; i--)
  544. cam_smmu_unmap_stage2_iova(mmu_hdls[i], fd);
  545. else
  546. for (--i; i > 0; i--)
  547. cam_smmu_unmap_user_iova(mmu_hdls[i],
  548. fd,
  549. CAM_SMMU_REGION_IO);
  550. return rc;
  551. }
  552. int cam_mem_mgr_alloc_and_map(struct cam_mem_mgr_alloc_cmd *cmd)
  553. {
  554. int rc;
  555. int32_t idx;
  556. struct dma_buf *dmabuf = NULL;
  557. int fd = -1;
  558. dma_addr_t hw_vaddr = 0;
  559. size_t len;
  560. uintptr_t kvaddr = 0;
  561. size_t klen;
  562. if (!atomic_read(&cam_mem_mgr_state)) {
  563. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  564. return -EINVAL;
  565. }
  566. if (!cmd) {
  567. CAM_ERR(CAM_MEM, " Invalid argument");
  568. return -EINVAL;
  569. }
  570. len = cmd->len;
  571. rc = cam_mem_util_check_alloc_flags(cmd);
  572. if (rc) {
  573. CAM_ERR(CAM_MEM, "Invalid flags: flags = 0x%X, rc=%d",
  574. cmd->flags, rc);
  575. return rc;
  576. }
  577. rc = cam_mem_util_ion_alloc(cmd,
  578. &dmabuf,
  579. &fd);
  580. if (rc) {
  581. CAM_ERR(CAM_MEM,
  582. "Ion Alloc failed, len=%llu, align=%llu, flags=0x%x, num_hdl=%d",
  583. cmd->len, cmd->align, cmd->flags, cmd->num_hdl);
  584. cam_mem_mgr_print_tbl();
  585. return rc;
  586. }
  587. idx = cam_mem_get_slot();
  588. if (idx < 0) {
  589. CAM_ERR(CAM_MEM, "Failed in getting mem slot, idx=%d", idx);
  590. rc = -ENOMEM;
  591. goto slot_fail;
  592. }
  593. if ((cmd->flags & CAM_MEM_FLAG_HW_READ_WRITE) ||
  594. (cmd->flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) ||
  595. (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE)) {
  596. enum cam_smmu_region_id region;
  597. if (cmd->flags & CAM_MEM_FLAG_HW_READ_WRITE)
  598. region = CAM_SMMU_REGION_IO;
  599. if (cmd->flags & CAM_MEM_FLAG_HW_SHARED_ACCESS)
  600. region = CAM_SMMU_REGION_SHARED;
  601. if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE)
  602. region = CAM_SMMU_REGION_SECHEAP;
  603. rc = cam_mem_util_map_hw_va(cmd->flags,
  604. cmd->mmu_hdls,
  605. cmd->num_hdl,
  606. fd,
  607. &hw_vaddr,
  608. &len,
  609. region,
  610. true);
  611. if (rc) {
  612. CAM_ERR(CAM_MEM,
  613. "Failed in map_hw_va len=%llu, flags=0x%x, fd=%d, region=%d, num_hdl=%d, rc=%d",
  614. len, cmd->flags,
  615. fd, region, cmd->num_hdl, rc);
  616. if (rc == -EALREADY) {
  617. if ((size_t)dmabuf->size != len)
  618. rc = -EBADR;
  619. cam_mem_mgr_print_tbl();
  620. }
  621. goto map_hw_fail;
  622. }
  623. }
  624. mutex_lock(&tbl.bufq[idx].q_lock);
  625. tbl.bufq[idx].fd = fd;
  626. tbl.bufq[idx].dma_buf = NULL;
  627. tbl.bufq[idx].flags = cmd->flags;
  628. tbl.bufq[idx].buf_handle = GET_MEM_HANDLE(idx, fd);
  629. tbl.bufq[idx].is_internal = true;
  630. if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE)
  631. CAM_MEM_MGR_SET_SECURE_HDL(tbl.bufq[idx].buf_handle, true);
  632. if (cmd->flags & CAM_MEM_FLAG_KMD_ACCESS) {
  633. rc = cam_mem_util_map_cpu_va(dmabuf, &kvaddr, &klen);
  634. if (rc) {
  635. CAM_ERR(CAM_MEM, "dmabuf: %pK mapping failed: %d",
  636. dmabuf, rc);
  637. goto map_kernel_fail;
  638. }
  639. }
  640. tbl.bufq[idx].kmdvaddr = kvaddr;
  641. tbl.bufq[idx].vaddr = hw_vaddr;
  642. tbl.bufq[idx].dma_buf = dmabuf;
  643. tbl.bufq[idx].len = cmd->len;
  644. tbl.bufq[idx].num_hdl = cmd->num_hdl;
  645. memcpy(tbl.bufq[idx].hdls, cmd->mmu_hdls,
  646. sizeof(int32_t) * cmd->num_hdl);
  647. tbl.bufq[idx].is_imported = false;
  648. mutex_unlock(&tbl.bufq[idx].q_lock);
  649. cmd->out.buf_handle = tbl.bufq[idx].buf_handle;
  650. cmd->out.fd = tbl.bufq[idx].fd;
  651. cmd->out.vaddr = 0;
  652. CAM_DBG(CAM_MEM,
  653. "fd=%d, flags=0x%x, num_hdl=%d, idx=%d, buf handle=%x, len=%zu",
  654. cmd->out.fd, cmd->flags, cmd->num_hdl, idx, cmd->out.buf_handle,
  655. tbl.bufq[idx].len);
  656. return rc;
  657. map_kernel_fail:
  658. mutex_unlock(&tbl.bufq[idx].q_lock);
  659. map_hw_fail:
  660. cam_mem_put_slot(idx);
  661. slot_fail:
  662. dma_buf_put(dmabuf);
  663. return rc;
  664. }
  665. static bool cam_mem_util_is_map_internal(int32_t fd)
  666. {
  667. uint32_t i;
  668. bool is_internal = false;
  669. mutex_lock(&tbl.m_lock);
  670. for_each_set_bit(i, tbl.bitmap, tbl.bits) {
  671. if (tbl.bufq[i].fd == fd) {
  672. is_internal = tbl.bufq[i].is_internal;
  673. break;
  674. }
  675. }
  676. mutex_unlock(&tbl.m_lock);
  677. return is_internal;
  678. }
  679. int cam_mem_mgr_map(struct cam_mem_mgr_map_cmd *cmd)
  680. {
  681. int32_t idx;
  682. int rc;
  683. struct dma_buf *dmabuf;
  684. dma_addr_t hw_vaddr = 0;
  685. size_t len = 0;
  686. bool is_internal = false;
  687. if (!atomic_read(&cam_mem_mgr_state)) {
  688. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  689. return -EINVAL;
  690. }
  691. if (!cmd || (cmd->fd < 0)) {
  692. CAM_ERR(CAM_MEM, "Invalid argument");
  693. return -EINVAL;
  694. }
  695. if (cmd->num_hdl > CAM_MEM_MMU_MAX_HANDLE) {
  696. CAM_ERR(CAM_MEM, "Num of mmu hdl %d exceeded maximum(%d)",
  697. cmd->num_hdl, CAM_MEM_MMU_MAX_HANDLE);
  698. return -EINVAL;
  699. }
  700. rc = cam_mem_util_check_map_flags(cmd);
  701. if (rc) {
  702. CAM_ERR(CAM_MEM, "Invalid flags: flags = %X", cmd->flags);
  703. return rc;
  704. }
  705. dmabuf = dma_buf_get(cmd->fd);
  706. if (IS_ERR_OR_NULL((void *)(dmabuf))) {
  707. CAM_ERR(CAM_MEM, "Failed to import dma_buf fd");
  708. return -EINVAL;
  709. }
  710. is_internal = cam_mem_util_is_map_internal(cmd->fd);
  711. if ((cmd->flags & CAM_MEM_FLAG_HW_READ_WRITE) ||
  712. (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE)) {
  713. rc = cam_mem_util_map_hw_va(cmd->flags,
  714. cmd->mmu_hdls,
  715. cmd->num_hdl,
  716. cmd->fd,
  717. &hw_vaddr,
  718. &len,
  719. CAM_SMMU_REGION_IO,
  720. is_internal);
  721. if (rc) {
  722. CAM_ERR(CAM_MEM,
  723. "Failed in map_hw_va, flags=0x%x, fd=%d, len=%llu, region=%d, num_hdl=%d, rc=%d",
  724. cmd->flags, cmd->fd, len,
  725. CAM_SMMU_REGION_IO, cmd->num_hdl, rc);
  726. if (rc == -EALREADY) {
  727. if ((size_t)dmabuf->size != len) {
  728. rc = -EBADR;
  729. cam_mem_mgr_print_tbl();
  730. }
  731. }
  732. goto map_fail;
  733. }
  734. }
  735. idx = cam_mem_get_slot();
  736. if (idx < 0) {
  737. rc = -ENOMEM;
  738. goto map_fail;
  739. }
  740. mutex_lock(&tbl.bufq[idx].q_lock);
  741. tbl.bufq[idx].fd = cmd->fd;
  742. tbl.bufq[idx].dma_buf = NULL;
  743. tbl.bufq[idx].flags = cmd->flags;
  744. tbl.bufq[idx].buf_handle = GET_MEM_HANDLE(idx, cmd->fd);
  745. if (cmd->flags & CAM_MEM_FLAG_PROTECTED_MODE)
  746. CAM_MEM_MGR_SET_SECURE_HDL(tbl.bufq[idx].buf_handle, true);
  747. tbl.bufq[idx].kmdvaddr = 0;
  748. if (cmd->num_hdl > 0)
  749. tbl.bufq[idx].vaddr = hw_vaddr;
  750. else
  751. tbl.bufq[idx].vaddr = 0;
  752. tbl.bufq[idx].dma_buf = dmabuf;
  753. tbl.bufq[idx].len = len;
  754. tbl.bufq[idx].num_hdl = cmd->num_hdl;
  755. memcpy(tbl.bufq[idx].hdls, cmd->mmu_hdls,
  756. sizeof(int32_t) * cmd->num_hdl);
  757. tbl.bufq[idx].is_imported = true;
  758. tbl.bufq[idx].is_internal = is_internal;
  759. mutex_unlock(&tbl.bufq[idx].q_lock);
  760. cmd->out.buf_handle = tbl.bufq[idx].buf_handle;
  761. cmd->out.vaddr = 0;
  762. cmd->out.size = (uint32_t)len;
  763. CAM_DBG(CAM_MEM,
  764. "fd=%d, flags=0x%x, num_hdl=%d, idx=%d, buf handle=%x, len=%zu",
  765. cmd->fd, cmd->flags, cmd->num_hdl, idx, cmd->out.buf_handle,
  766. tbl.bufq[idx].len);
  767. return rc;
  768. map_fail:
  769. dma_buf_put(dmabuf);
  770. return rc;
  771. }
  772. static int cam_mem_util_unmap_hw_va(int32_t idx,
  773. enum cam_smmu_region_id region,
  774. enum cam_smmu_mapping_client client)
  775. {
  776. int i;
  777. uint32_t flags;
  778. int32_t *mmu_hdls;
  779. int num_hdls;
  780. int fd;
  781. int rc = 0;
  782. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  783. CAM_ERR(CAM_MEM, "Incorrect index");
  784. return -EINVAL;
  785. }
  786. flags = tbl.bufq[idx].flags;
  787. mmu_hdls = tbl.bufq[idx].hdls;
  788. num_hdls = tbl.bufq[idx].num_hdl;
  789. fd = tbl.bufq[idx].fd;
  790. CAM_DBG(CAM_MEM,
  791. "unmap_hw_va : idx=%d, fd=%x, flags=0x%x, num_hdls=%d, client=%d",
  792. idx, fd, flags, num_hdls, client);
  793. if (flags & CAM_MEM_FLAG_PROTECTED_MODE) {
  794. for (i = 0; i < num_hdls; i++) {
  795. rc = cam_smmu_unmap_stage2_iova(mmu_hdls[i], fd);
  796. if (rc < 0) {
  797. CAM_ERR(CAM_MEM,
  798. "Failed in secure unmap, i=%d, fd=%d, mmu_hdl=%d, rc=%d",
  799. i, fd, mmu_hdls[i], rc);
  800. goto unmap_end;
  801. }
  802. }
  803. } else {
  804. for (i = 0; i < num_hdls; i++) {
  805. if (client == CAM_SMMU_MAPPING_USER) {
  806. rc = cam_smmu_unmap_user_iova(mmu_hdls[i],
  807. fd, region);
  808. } else if (client == CAM_SMMU_MAPPING_KERNEL) {
  809. rc = cam_smmu_unmap_kernel_iova(mmu_hdls[i],
  810. tbl.bufq[idx].dma_buf, region);
  811. } else {
  812. CAM_ERR(CAM_MEM,
  813. "invalid caller for unmapping : %d",
  814. client);
  815. rc = -EINVAL;
  816. }
  817. if (rc < 0) {
  818. CAM_ERR(CAM_MEM,
  819. "Failed in unmap, i=%d, fd=%d, mmu_hdl=%d, region=%d, rc=%d",
  820. i, fd, mmu_hdls[i], region, rc);
  821. goto unmap_end;
  822. }
  823. }
  824. }
  825. return rc;
  826. unmap_end:
  827. CAM_ERR(CAM_MEM, "unmapping failed");
  828. return rc;
  829. }
  830. static void cam_mem_mgr_unmap_active_buf(int idx)
  831. {
  832. enum cam_smmu_region_id region = CAM_SMMU_REGION_SHARED;
  833. if (tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_SHARED_ACCESS)
  834. region = CAM_SMMU_REGION_SHARED;
  835. else if (tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_READ_WRITE)
  836. region = CAM_SMMU_REGION_IO;
  837. cam_mem_util_unmap_hw_va(idx, region, CAM_SMMU_MAPPING_USER);
  838. }
  839. static int cam_mem_mgr_cleanup_table(void)
  840. {
  841. int i;
  842. mutex_lock(&tbl.m_lock);
  843. for (i = 1; i < CAM_MEM_BUFQ_MAX; i++) {
  844. if (!tbl.bufq[i].active) {
  845. CAM_DBG(CAM_MEM,
  846. "Buffer inactive at idx=%d, continuing", i);
  847. continue;
  848. } else {
  849. CAM_DBG(CAM_MEM,
  850. "Active buffer at idx=%d, possible leak needs unmapping",
  851. i);
  852. cam_mem_mgr_unmap_active_buf(i);
  853. }
  854. mutex_lock(&tbl.bufq[i].q_lock);
  855. if (tbl.bufq[i].dma_buf) {
  856. dma_buf_put(tbl.bufq[i].dma_buf);
  857. tbl.bufq[i].dma_buf = NULL;
  858. }
  859. tbl.bufq[i].fd = -1;
  860. tbl.bufq[i].flags = 0;
  861. tbl.bufq[i].buf_handle = -1;
  862. tbl.bufq[i].vaddr = 0;
  863. tbl.bufq[i].len = 0;
  864. memset(tbl.bufq[i].hdls, 0,
  865. sizeof(int32_t) * tbl.bufq[i].num_hdl);
  866. tbl.bufq[i].num_hdl = 0;
  867. tbl.bufq[i].dma_buf = NULL;
  868. tbl.bufq[i].active = false;
  869. tbl.bufq[i].is_internal = false;
  870. mutex_unlock(&tbl.bufq[i].q_lock);
  871. mutex_destroy(&tbl.bufq[i].q_lock);
  872. }
  873. bitmap_zero(tbl.bitmap, tbl.bits);
  874. /* We need to reserve slot 0 because 0 is invalid */
  875. set_bit(0, tbl.bitmap);
  876. mutex_unlock(&tbl.m_lock);
  877. return 0;
  878. }
  879. void cam_mem_mgr_deinit(void)
  880. {
  881. atomic_set(&cam_mem_mgr_state, CAM_MEM_MGR_UNINITIALIZED);
  882. cam_mem_mgr_cleanup_table();
  883. debugfs_remove_recursive(tbl.dentry);
  884. mutex_lock(&tbl.m_lock);
  885. bitmap_zero(tbl.bitmap, tbl.bits);
  886. kfree(tbl.bitmap);
  887. tbl.bitmap = NULL;
  888. mutex_unlock(&tbl.m_lock);
  889. mutex_destroy(&tbl.m_lock);
  890. }
  891. static int cam_mem_util_unmap(int32_t idx,
  892. enum cam_smmu_mapping_client client)
  893. {
  894. int rc = 0;
  895. enum cam_smmu_region_id region = CAM_SMMU_REGION_SHARED;
  896. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  897. CAM_ERR(CAM_MEM, "Incorrect index");
  898. return -EINVAL;
  899. }
  900. CAM_DBG(CAM_MEM, "Flags = %X idx %d", tbl.bufq[idx].flags, idx);
  901. mutex_lock(&tbl.m_lock);
  902. if ((!tbl.bufq[idx].active) &&
  903. (tbl.bufq[idx].vaddr) == 0) {
  904. CAM_WARN(CAM_MEM, "Buffer at idx=%d is already unmapped,",
  905. idx);
  906. mutex_unlock(&tbl.m_lock);
  907. return 0;
  908. }
  909. /* Deactivate the buffer queue to prevent multiple unmap */
  910. mutex_lock(&tbl.bufq[idx].q_lock);
  911. tbl.bufq[idx].active = false;
  912. tbl.bufq[idx].vaddr = 0;
  913. mutex_unlock(&tbl.bufq[idx].q_lock);
  914. mutex_unlock(&tbl.m_lock);
  915. if (tbl.bufq[idx].flags & CAM_MEM_FLAG_KMD_ACCESS) {
  916. if (tbl.bufq[idx].dma_buf && tbl.bufq[idx].kmdvaddr) {
  917. rc = cam_mem_util_unmap_cpu_va(tbl.bufq[idx].dma_buf,
  918. tbl.bufq[idx].kmdvaddr);
  919. if (rc)
  920. CAM_ERR(CAM_MEM,
  921. "Failed, dmabuf=%pK, kmdvaddr=%pK",
  922. tbl.bufq[idx].dma_buf,
  923. (void *) tbl.bufq[idx].kmdvaddr);
  924. }
  925. }
  926. /* SHARED flag gets precedence, all other flags after it */
  927. if (tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) {
  928. region = CAM_SMMU_REGION_SHARED;
  929. } else {
  930. if (tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_READ_WRITE)
  931. region = CAM_SMMU_REGION_IO;
  932. }
  933. if ((tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_READ_WRITE) ||
  934. (tbl.bufq[idx].flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) ||
  935. (tbl.bufq[idx].flags & CAM_MEM_FLAG_PROTECTED_MODE)) {
  936. if (cam_mem_util_unmap_hw_va(idx, region, client))
  937. CAM_ERR(CAM_MEM, "Failed, dmabuf=%pK",
  938. tbl.bufq[idx].dma_buf);
  939. if (client == CAM_SMMU_MAPPING_KERNEL)
  940. tbl.bufq[idx].dma_buf = NULL;
  941. }
  942. mutex_lock(&tbl.m_lock);
  943. mutex_lock(&tbl.bufq[idx].q_lock);
  944. tbl.bufq[idx].flags = 0;
  945. tbl.bufq[idx].buf_handle = -1;
  946. memset(tbl.bufq[idx].hdls, 0,
  947. sizeof(int32_t) * CAM_MEM_MMU_MAX_HANDLE);
  948. CAM_DBG(CAM_MEM,
  949. "Ion buf at idx = %d freeing fd = %d, imported %d, dma_buf %pK",
  950. idx, tbl.bufq[idx].fd,
  951. tbl.bufq[idx].is_imported,
  952. tbl.bufq[idx].dma_buf);
  953. if (tbl.bufq[idx].dma_buf)
  954. dma_buf_put(tbl.bufq[idx].dma_buf);
  955. tbl.bufq[idx].fd = -1;
  956. tbl.bufq[idx].dma_buf = NULL;
  957. tbl.bufq[idx].is_imported = false;
  958. tbl.bufq[idx].is_internal = false;
  959. tbl.bufq[idx].len = 0;
  960. tbl.bufq[idx].num_hdl = 0;
  961. memset(&tbl.bufq[idx].timestamp, 0, sizeof(struct timespec64));
  962. mutex_unlock(&tbl.bufq[idx].q_lock);
  963. mutex_destroy(&tbl.bufq[idx].q_lock);
  964. clear_bit(idx, tbl.bitmap);
  965. mutex_unlock(&tbl.m_lock);
  966. return rc;
  967. }
  968. int cam_mem_mgr_release(struct cam_mem_mgr_release_cmd *cmd)
  969. {
  970. int idx;
  971. int rc;
  972. if (!atomic_read(&cam_mem_mgr_state)) {
  973. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  974. return -EINVAL;
  975. }
  976. if (!cmd) {
  977. CAM_ERR(CAM_MEM, "Invalid argument");
  978. return -EINVAL;
  979. }
  980. idx = CAM_MEM_MGR_GET_HDL_IDX(cmd->buf_handle);
  981. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  982. CAM_ERR(CAM_MEM, "Incorrect index %d extracted from mem handle",
  983. idx);
  984. return -EINVAL;
  985. }
  986. if (!tbl.bufq[idx].active) {
  987. CAM_ERR(CAM_MEM, "Released buffer state should be active");
  988. return -EINVAL;
  989. }
  990. if (tbl.bufq[idx].buf_handle != cmd->buf_handle) {
  991. CAM_ERR(CAM_MEM,
  992. "Released buf handle %d not matching within table %d, idx=%d",
  993. cmd->buf_handle, tbl.bufq[idx].buf_handle, idx);
  994. return -EINVAL;
  995. }
  996. CAM_DBG(CAM_MEM, "Releasing hdl = %x, idx = %d", cmd->buf_handle, idx);
  997. rc = cam_mem_util_unmap(idx, CAM_SMMU_MAPPING_USER);
  998. return rc;
  999. }
  1000. int cam_mem_mgr_request_mem(struct cam_mem_mgr_request_desc *inp,
  1001. struct cam_mem_mgr_memory_desc *out)
  1002. {
  1003. struct dma_buf *buf = NULL;
  1004. int ion_fd = -1;
  1005. int rc = 0;
  1006. uint32_t heap_id;
  1007. int32_t ion_flag = 0;
  1008. uintptr_t kvaddr;
  1009. dma_addr_t iova = 0;
  1010. size_t request_len = 0;
  1011. uint32_t mem_handle;
  1012. int32_t idx;
  1013. int32_t smmu_hdl = 0;
  1014. int32_t num_hdl = 0;
  1015. enum cam_smmu_region_id region = CAM_SMMU_REGION_SHARED;
  1016. if (!atomic_read(&cam_mem_mgr_state)) {
  1017. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  1018. return -EINVAL;
  1019. }
  1020. if (!inp || !out) {
  1021. CAM_ERR(CAM_MEM, "Invalid params");
  1022. return -EINVAL;
  1023. }
  1024. if (!(inp->flags & CAM_MEM_FLAG_HW_READ_WRITE ||
  1025. inp->flags & CAM_MEM_FLAG_HW_SHARED_ACCESS ||
  1026. inp->flags & CAM_MEM_FLAG_CACHE)) {
  1027. CAM_ERR(CAM_MEM, "Invalid flags for request mem");
  1028. return -EINVAL;
  1029. }
  1030. if (inp->flags & CAM_MEM_FLAG_CACHE)
  1031. ion_flag |= ION_FLAG_CACHED;
  1032. else
  1033. ion_flag &= ~ION_FLAG_CACHED;
  1034. heap_id = ION_HEAP(ION_SYSTEM_HEAP_ID) |
  1035. ION_HEAP(ION_CAMERA_HEAP_ID);
  1036. rc = cam_mem_util_get_dma_buf(inp->size,
  1037. heap_id,
  1038. ion_flag,
  1039. &buf);
  1040. if (rc) {
  1041. CAM_ERR(CAM_MEM, "ION alloc failed for shared buffer");
  1042. goto ion_fail;
  1043. } else {
  1044. CAM_DBG(CAM_MEM, "Got dma_buf = %pK", buf);
  1045. }
  1046. /*
  1047. * we are mapping kva always here,
  1048. * update flags so that we do unmap properly
  1049. */
  1050. inp->flags |= CAM_MEM_FLAG_KMD_ACCESS;
  1051. rc = cam_mem_util_map_cpu_va(buf, &kvaddr, &request_len);
  1052. if (rc) {
  1053. CAM_ERR(CAM_MEM, "Failed to get kernel vaddr");
  1054. goto map_fail;
  1055. }
  1056. if (!inp->smmu_hdl) {
  1057. CAM_ERR(CAM_MEM, "Invalid SMMU handle");
  1058. rc = -EINVAL;
  1059. goto smmu_fail;
  1060. }
  1061. /* SHARED flag gets precedence, all other flags after it */
  1062. if (inp->flags & CAM_MEM_FLAG_HW_SHARED_ACCESS) {
  1063. region = CAM_SMMU_REGION_SHARED;
  1064. } else {
  1065. if (inp->flags & CAM_MEM_FLAG_HW_READ_WRITE)
  1066. region = CAM_SMMU_REGION_IO;
  1067. }
  1068. rc = cam_smmu_map_kernel_iova(inp->smmu_hdl,
  1069. buf,
  1070. CAM_SMMU_MAP_RW,
  1071. &iova,
  1072. &request_len,
  1073. region);
  1074. if (rc < 0) {
  1075. CAM_ERR(CAM_MEM, "SMMU mapping failed");
  1076. goto smmu_fail;
  1077. }
  1078. smmu_hdl = inp->smmu_hdl;
  1079. num_hdl = 1;
  1080. idx = cam_mem_get_slot();
  1081. if (idx < 0) {
  1082. rc = -ENOMEM;
  1083. goto slot_fail;
  1084. }
  1085. mutex_lock(&tbl.bufq[idx].q_lock);
  1086. mem_handle = GET_MEM_HANDLE(idx, ion_fd);
  1087. tbl.bufq[idx].dma_buf = buf;
  1088. tbl.bufq[idx].fd = -1;
  1089. tbl.bufq[idx].flags = inp->flags;
  1090. tbl.bufq[idx].buf_handle = mem_handle;
  1091. tbl.bufq[idx].kmdvaddr = kvaddr;
  1092. tbl.bufq[idx].vaddr = iova;
  1093. tbl.bufq[idx].len = inp->size;
  1094. tbl.bufq[idx].num_hdl = num_hdl;
  1095. memcpy(tbl.bufq[idx].hdls, &smmu_hdl,
  1096. sizeof(int32_t));
  1097. tbl.bufq[idx].is_imported = false;
  1098. mutex_unlock(&tbl.bufq[idx].q_lock);
  1099. out->kva = kvaddr;
  1100. out->iova = (uint32_t)iova;
  1101. out->smmu_hdl = smmu_hdl;
  1102. out->mem_handle = mem_handle;
  1103. out->len = inp->size;
  1104. out->region = region;
  1105. return rc;
  1106. slot_fail:
  1107. cam_smmu_unmap_kernel_iova(inp->smmu_hdl,
  1108. buf, region);
  1109. smmu_fail:
  1110. cam_mem_util_unmap_cpu_va(buf, kvaddr);
  1111. map_fail:
  1112. dma_buf_put(buf);
  1113. ion_fail:
  1114. return rc;
  1115. }
  1116. EXPORT_SYMBOL(cam_mem_mgr_request_mem);
  1117. int cam_mem_mgr_release_mem(struct cam_mem_mgr_memory_desc *inp)
  1118. {
  1119. int32_t idx;
  1120. int rc;
  1121. if (!atomic_read(&cam_mem_mgr_state)) {
  1122. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  1123. return -EINVAL;
  1124. }
  1125. if (!inp) {
  1126. CAM_ERR(CAM_MEM, "Invalid argument");
  1127. return -EINVAL;
  1128. }
  1129. idx = CAM_MEM_MGR_GET_HDL_IDX(inp->mem_handle);
  1130. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  1131. CAM_ERR(CAM_MEM, "Incorrect index extracted from mem handle");
  1132. return -EINVAL;
  1133. }
  1134. if (!tbl.bufq[idx].active) {
  1135. if (tbl.bufq[idx].vaddr == 0) {
  1136. CAM_ERR(CAM_MEM, "buffer is released already");
  1137. return 0;
  1138. }
  1139. CAM_ERR(CAM_MEM, "Released buffer state should be active");
  1140. return -EINVAL;
  1141. }
  1142. if (tbl.bufq[idx].buf_handle != inp->mem_handle) {
  1143. CAM_ERR(CAM_MEM,
  1144. "Released buf handle not matching within table");
  1145. return -EINVAL;
  1146. }
  1147. CAM_DBG(CAM_MEM, "Releasing hdl = %X", inp->mem_handle);
  1148. rc = cam_mem_util_unmap(idx, CAM_SMMU_MAPPING_KERNEL);
  1149. return rc;
  1150. }
  1151. EXPORT_SYMBOL(cam_mem_mgr_release_mem);
  1152. int cam_mem_mgr_reserve_memory_region(struct cam_mem_mgr_request_desc *inp,
  1153. enum cam_smmu_region_id region,
  1154. struct cam_mem_mgr_memory_desc *out)
  1155. {
  1156. struct dma_buf *buf = NULL;
  1157. int rc = 0;
  1158. int ion_fd = -1;
  1159. uint32_t heap_id;
  1160. dma_addr_t iova = 0;
  1161. size_t request_len = 0;
  1162. uint32_t mem_handle;
  1163. int32_t idx;
  1164. int32_t smmu_hdl = 0;
  1165. int32_t num_hdl = 0;
  1166. if (!atomic_read(&cam_mem_mgr_state)) {
  1167. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  1168. return -EINVAL;
  1169. }
  1170. if (!inp || !out) {
  1171. CAM_ERR(CAM_MEM, "Invalid param(s)");
  1172. return -EINVAL;
  1173. }
  1174. if (!inp->smmu_hdl) {
  1175. CAM_ERR(CAM_MEM, "Invalid SMMU handle");
  1176. return -EINVAL;
  1177. }
  1178. if (region != CAM_SMMU_REGION_SECHEAP) {
  1179. CAM_ERR(CAM_MEM, "Only secondary heap supported");
  1180. return -EINVAL;
  1181. }
  1182. heap_id = ION_HEAP(ION_SYSTEM_HEAP_ID) |
  1183. ION_HEAP(ION_CAMERA_HEAP_ID);
  1184. rc = cam_mem_util_get_dma_buf(inp->size,
  1185. heap_id,
  1186. 0,
  1187. &buf);
  1188. if (rc) {
  1189. CAM_ERR(CAM_MEM, "ION alloc failed for sec heap buffer");
  1190. goto ion_fail;
  1191. } else {
  1192. CAM_DBG(CAM_MEM, "Got dma_buf = %pK", buf);
  1193. }
  1194. rc = cam_smmu_reserve_sec_heap(inp->smmu_hdl,
  1195. buf,
  1196. &iova,
  1197. &request_len);
  1198. if (rc) {
  1199. CAM_ERR(CAM_MEM, "Reserving secondary heap failed");
  1200. goto smmu_fail;
  1201. }
  1202. smmu_hdl = inp->smmu_hdl;
  1203. num_hdl = 1;
  1204. idx = cam_mem_get_slot();
  1205. if (idx < 0) {
  1206. rc = -ENOMEM;
  1207. goto slot_fail;
  1208. }
  1209. mutex_lock(&tbl.bufq[idx].q_lock);
  1210. mem_handle = GET_MEM_HANDLE(idx, ion_fd);
  1211. tbl.bufq[idx].fd = -1;
  1212. tbl.bufq[idx].dma_buf = buf;
  1213. tbl.bufq[idx].flags = inp->flags;
  1214. tbl.bufq[idx].buf_handle = mem_handle;
  1215. tbl.bufq[idx].kmdvaddr = 0;
  1216. tbl.bufq[idx].vaddr = iova;
  1217. tbl.bufq[idx].len = request_len;
  1218. tbl.bufq[idx].num_hdl = num_hdl;
  1219. memcpy(tbl.bufq[idx].hdls, &smmu_hdl,
  1220. sizeof(int32_t));
  1221. tbl.bufq[idx].is_imported = false;
  1222. mutex_unlock(&tbl.bufq[idx].q_lock);
  1223. out->kva = 0;
  1224. out->iova = (uint32_t)iova;
  1225. out->smmu_hdl = smmu_hdl;
  1226. out->mem_handle = mem_handle;
  1227. out->len = request_len;
  1228. out->region = region;
  1229. return rc;
  1230. slot_fail:
  1231. cam_smmu_release_sec_heap(smmu_hdl);
  1232. smmu_fail:
  1233. dma_buf_put(buf);
  1234. ion_fail:
  1235. return rc;
  1236. }
  1237. EXPORT_SYMBOL(cam_mem_mgr_reserve_memory_region);
  1238. int cam_mem_mgr_free_memory_region(struct cam_mem_mgr_memory_desc *inp)
  1239. {
  1240. int32_t idx;
  1241. int rc;
  1242. int32_t smmu_hdl;
  1243. if (!atomic_read(&cam_mem_mgr_state)) {
  1244. CAM_ERR(CAM_MEM, "failed. mem_mgr not initialized");
  1245. return -EINVAL;
  1246. }
  1247. if (!inp) {
  1248. CAM_ERR(CAM_MEM, "Invalid argument");
  1249. return -EINVAL;
  1250. }
  1251. if (inp->region != CAM_SMMU_REGION_SECHEAP) {
  1252. CAM_ERR(CAM_MEM, "Only secondary heap supported");
  1253. return -EINVAL;
  1254. }
  1255. idx = CAM_MEM_MGR_GET_HDL_IDX(inp->mem_handle);
  1256. if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0) {
  1257. CAM_ERR(CAM_MEM, "Incorrect index extracted from mem handle");
  1258. return -EINVAL;
  1259. }
  1260. if (!tbl.bufq[idx].active) {
  1261. if (tbl.bufq[idx].vaddr == 0) {
  1262. CAM_ERR(CAM_MEM, "buffer is released already");
  1263. return 0;
  1264. }
  1265. CAM_ERR(CAM_MEM, "Released buffer state should be active");
  1266. return -EINVAL;
  1267. }
  1268. if (tbl.bufq[idx].buf_handle != inp->mem_handle) {
  1269. CAM_ERR(CAM_MEM,
  1270. "Released buf handle not matching within table");
  1271. return -EINVAL;
  1272. }
  1273. if (tbl.bufq[idx].num_hdl != 1) {
  1274. CAM_ERR(CAM_MEM,
  1275. "Sec heap region should have only one smmu hdl");
  1276. return -ENODEV;
  1277. }
  1278. memcpy(&smmu_hdl, tbl.bufq[idx].hdls,
  1279. sizeof(int32_t));
  1280. if (inp->smmu_hdl != smmu_hdl) {
  1281. CAM_ERR(CAM_MEM,
  1282. "Passed SMMU handle doesn't match with internal hdl");
  1283. return -ENODEV;
  1284. }
  1285. rc = cam_smmu_release_sec_heap(inp->smmu_hdl);
  1286. if (rc) {
  1287. CAM_ERR(CAM_MEM,
  1288. "Sec heap region release failed");
  1289. return -ENODEV;
  1290. }
  1291. CAM_DBG(CAM_MEM, "Releasing hdl = %X", inp->mem_handle);
  1292. rc = cam_mem_util_unmap(idx, CAM_SMMU_MAPPING_KERNEL);
  1293. if (rc)
  1294. CAM_ERR(CAM_MEM, "unmapping secondary heap failed");
  1295. return rc;
  1296. }
  1297. EXPORT_SYMBOL(cam_mem_mgr_free_memory_region);