dp_rx_mon_status.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038
  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #ifdef FEATURE_PERPKT_INFO
  31. #include "dp_ratetable.h"
  32. #endif
  33. /**
  34. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  35. * @pdev: pdev ctx
  36. * @ppdu_info: ppdu info structure from ppdu ring
  37. * @ppdu_nbuf: qdf nbuf abstraction for linux skb
  38. *
  39. * Return: none
  40. */
  41. #ifdef FEATURE_PERPKT_INFO
  42. static inline void
  43. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  44. struct hal_rx_ppdu_info *ppdu_info,
  45. qdf_nbuf_t ppdu_nbuf)
  46. {
  47. struct dp_peer *peer;
  48. struct dp_soc *soc = pdev->soc;
  49. struct dp_ast_entry *ast_entry;
  50. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  51. uint32_t ast_index;
  52. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  53. cdp_rx_ppdu->first_data_seq_ctrl =
  54. ppdu_info->rx_status.first_data_seq_ctrl;
  55. cdp_rx_ppdu->frame_ctrl =
  56. ppdu_info->rx_status.frame_control;
  57. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  58. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  59. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  60. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  61. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  62. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  63. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  64. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  65. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  66. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  67. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  68. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  69. else
  70. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  71. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  72. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  73. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  74. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  75. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  76. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  77. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  78. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  79. cdp_rx_ppdu->udp_msdu_count +
  80. cdp_rx_ppdu->other_msdu_count);
  81. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  82. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  83. cdp_rx_ppdu->is_ampdu = 1;
  84. else
  85. cdp_rx_ppdu->is_ampdu = 0;
  86. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  87. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  88. ast_index = ppdu_info->rx_status.ast_index;
  89. if (ast_index > (WLAN_UMAC_PSOC_MAX_PEERS * 2)) {
  90. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  91. return;
  92. }
  93. ast_entry = soc->ast_table[ast_index];
  94. if (!ast_entry) {
  95. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  96. return;
  97. }
  98. peer = ast_entry->peer;
  99. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  100. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  101. return;
  102. }
  103. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  104. peer->mac_addr.raw, DP_MAC_ADDR_LEN);
  105. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  106. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  107. }
  108. #else
  109. static inline void
  110. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  111. struct hal_rx_ppdu_info *ppdu_info,
  112. qdf_nbuf_t ppdu_nbuf)
  113. {
  114. }
  115. #endif
  116. /**
  117. * dp_rx_stats_update() - Update per-peer statistics
  118. * @soc: Datapath SOC handle
  119. * @peer: Datapath peer handle
  120. * @ppdu: PPDU Descriptor
  121. *
  122. * Return: None
  123. */
  124. #ifdef FEATURE_PERPKT_INFO
  125. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  126. struct cdp_rx_indication_ppdu *ppdu)
  127. {
  128. uint32_t ratekbps = 0;
  129. uint32_t ppdu_rx_rate = 0;
  130. uint32_t nss = 0;
  131. if (!peer || !ppdu)
  132. return;
  133. if (ppdu->u.nss == 0)
  134. nss = 0;
  135. else
  136. nss = ppdu->u.nss - 1;
  137. ratekbps = dp_getrateindex(ppdu->u.gi,
  138. ppdu->u.mcs,
  139. nss,
  140. ppdu->u.preamble,
  141. ppdu->u.bw);
  142. if (!ratekbps)
  143. return;
  144. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  145. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  146. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  147. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  148. if (peer->vdev)
  149. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  150. }
  151. static void dp_rx_stats_update(struct dp_pdev *pdev, struct dp_peer *peer,
  152. struct cdp_rx_indication_ppdu *ppdu)
  153. {
  154. struct dp_soc *soc = NULL;
  155. uint8_t mcs, preamble, ac = 0;
  156. uint16_t num_msdu;
  157. bool is_invalid_peer = false;
  158. mcs = ppdu->u.mcs;
  159. preamble = ppdu->u.preamble;
  160. num_msdu = ppdu->num_msdu;
  161. if (pdev)
  162. soc = pdev->soc;
  163. else
  164. return;
  165. if (!peer) {
  166. is_invalid_peer = true;
  167. peer = pdev->invalid_peer;
  168. }
  169. if (!soc || soc->process_rx_status)
  170. return;
  171. DP_STATS_UPD(peer, rx.rssi, ppdu->rssi);
  172. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  173. ppdu->u.nss = 1;
  174. if (ppdu->u.nss)
  175. DP_STATS_INC(peer, rx.nss[ppdu->u.nss - 1], num_msdu);
  176. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  177. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  178. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type], num_msdu);
  179. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu, ppdu->is_ampdu);
  180. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu, !(ppdu->is_ampdu));
  181. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  182. DP_STATS_INCC(peer,
  183. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  184. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  185. DP_STATS_INCC(peer,
  186. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  187. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  188. DP_STATS_INCC(peer,
  189. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  190. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  191. DP_STATS_INCC(peer,
  192. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  193. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  194. DP_STATS_INCC(peer,
  195. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  196. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  197. DP_STATS_INCC(peer,
  198. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  199. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  200. DP_STATS_INCC(peer,
  201. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  202. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  203. DP_STATS_INCC(peer,
  204. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  205. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  206. DP_STATS_INCC(peer,
  207. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  208. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  209. DP_STATS_INCC(peer,
  210. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  211. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  212. /*
  213. * If invalid TID, it could be a non-qos frame, hence do not update
  214. * any AC counters
  215. */
  216. ac = TID_TO_WME_AC(ppdu->tid);
  217. if (ppdu->tid != HAL_TID_INVALID)
  218. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  219. dp_peer_stats_notify(peer);
  220. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  221. if (is_invalid_peer)
  222. return;
  223. dp_rx_rate_stats_update(peer, ppdu);
  224. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  225. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  226. &peer->stats, ppdu->peer_id,
  227. UPDATE_PEER_STATS, pdev->pdev_id);
  228. #endif
  229. }
  230. #endif
  231. /**
  232. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  233. * @soc: core txrx main context
  234. * @pdev: pdev strcuture
  235. * @ppdu_info: structure for rx ppdu ring
  236. *
  237. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  238. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  239. */
  240. #ifdef FEATURE_PERPKT_INFO
  241. static inline QDF_STATUS
  242. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  243. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  244. {
  245. uint8_t size = 0;
  246. struct ieee80211_frame *wh;
  247. uint32_t *nbuf_data;
  248. if (ppdu_info->msdu_info.first_msdu_payload == NULL)
  249. return QDF_STATUS_SUCCESS;
  250. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  251. return QDF_STATUS_SUCCESS;
  252. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  253. wh = (struct ieee80211_frame *)(ppdu_info->msdu_info.first_msdu_payload
  254. + 4);
  255. size = (ppdu_info->msdu_info.first_msdu_payload -
  256. qdf_nbuf_data(nbuf));
  257. ppdu_info->msdu_info.first_msdu_payload = NULL;
  258. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  259. return QDF_STATUS_SUCCESS;
  260. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  261. IEEE80211_FC0_TYPE_MGT) ||
  262. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  263. IEEE80211_FC0_TYPE_CTL)) {
  264. return QDF_STATUS_SUCCESS;
  265. }
  266. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  267. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  268. /* only retain RX MSDU payload in the skb */
  269. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  270. ppdu_info->msdu_info.payload_len);
  271. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  272. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  273. return QDF_STATUS_E_ALREADY;
  274. }
  275. #else
  276. static inline QDF_STATUS
  277. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  278. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  279. {
  280. return QDF_STATUS_SUCCESS;
  281. }
  282. #endif
  283. /**
  284. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  285. * @soc: Datapath SOC handle
  286. * @pdev: Datapath PDEV handle
  287. * @ppdu_info: Structure for rx ppdu info
  288. * @nbuf: Qdf nbuf abstraction for linux skb
  289. *
  290. * Return: 0 on success, 1 on failure
  291. */
  292. static inline int
  293. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  294. struct hal_rx_ppdu_info *ppdu_info,
  295. qdf_nbuf_t nbuf)
  296. {
  297. uint8_t size = 0;
  298. if (!pdev->monitor_vdev) {
  299. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  300. "[%s]:[%d] Monitor vdev is NULL !!",
  301. __func__, __LINE__);
  302. return 1;
  303. }
  304. if (ppdu_info->msdu_info.first_msdu_payload == NULL) {
  305. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  306. "[%s]:[%d] First msdu payload not present",
  307. __func__, __LINE__);
  308. return 1;
  309. }
  310. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  311. size = (ppdu_info->msdu_info.first_msdu_payload -
  312. qdf_nbuf_data(nbuf)) + 4;
  313. ppdu_info->msdu_info.first_msdu_payload = NULL;
  314. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  315. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  316. "[%s]:[%d] No header present",
  317. __func__, __LINE__);
  318. return 1;
  319. }
  320. /* Only retain RX MSDU payload in the skb */
  321. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  322. ppdu_info->msdu_info.payload_len);
  323. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  324. nbuf, sizeof(struct rx_pkt_tlvs));
  325. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  326. nbuf, NULL);
  327. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  328. return 0;
  329. }
  330. /**
  331. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  332. * @soc: core txrx main context
  333. * @pdev: pdev strcuture
  334. * @ppdu_info: structure for rx ppdu ring
  335. *
  336. * Return: none
  337. */
  338. #ifdef FEATURE_PERPKT_INFO
  339. static inline void
  340. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  341. struct hal_rx_ppdu_info *ppdu_info)
  342. {
  343. qdf_nbuf_t ppdu_nbuf;
  344. struct dp_peer *peer;
  345. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  346. /*
  347. * Do not allocate if fcs error,
  348. * ast idx invalid / fctl invalid
  349. */
  350. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  351. return;
  352. if (ppdu_info->nac_info.fc_valid &&
  353. ppdu_info->nac_info.to_ds_flag &&
  354. ppdu_info->nac_info.mac_addr2_valid) {
  355. struct dp_neighbour_peer *peer = NULL;
  356. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  357. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  358. if (pdev->neighbour_peers_added) {
  359. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  360. neighbour_peer_list_elem) {
  361. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  362. &ppdu_info->nac_info.mac_addr2,
  363. DP_MAC_ADDR_LEN)) {
  364. peer->rssi = rssi;
  365. break;
  366. }
  367. }
  368. }
  369. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  370. }
  371. if (!pdev->mcopy_mode) {
  372. if (!ppdu_info->rx_status.frame_control_info_valid)
  373. return;
  374. if (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)
  375. return;
  376. }
  377. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  378. sizeof(struct hal_rx_ppdu_info), 0, 0, FALSE);
  379. if (ppdu_nbuf) {
  380. dp_rx_populate_cdp_indication_ppdu(pdev, ppdu_info, ppdu_nbuf);
  381. qdf_nbuf_put_tail(ppdu_nbuf,
  382. sizeof(struct cdp_rx_indication_ppdu));
  383. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  384. peer = dp_peer_find_by_id(soc, cdp_rx_ppdu->peer_id);
  385. if (peer) {
  386. dp_rx_stats_update(pdev, peer, cdp_rx_ppdu);
  387. dp_peer_unref_del_find_by_id(peer);
  388. }
  389. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  390. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  391. soc, ppdu_nbuf,
  392. cdp_rx_ppdu->peer_id,
  393. WDI_NO_VAL, pdev->pdev_id);
  394. } else if (pdev->mcopy_mode) {
  395. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  396. ppdu_nbuf, HTT_INVALID_PEER,
  397. WDI_NO_VAL, pdev->pdev_id);
  398. } else {
  399. qdf_nbuf_free(ppdu_nbuf);
  400. }
  401. }
  402. }
  403. #else
  404. static inline void
  405. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  406. struct hal_rx_ppdu_info *ppdu_info)
  407. {
  408. }
  409. #endif
  410. /**
  411. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  412. * filtering enabled
  413. * @soc: core txrx main context
  414. * @ppdu_info: Structure for rx ppdu info
  415. * @status_nbuf: Qdf nbuf abstraction for linux skb
  416. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  417. *
  418. * Return: none
  419. */
  420. static inline void
  421. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  422. struct hal_rx_ppdu_info *ppdu_info,
  423. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  424. {
  425. struct dp_peer *peer;
  426. struct dp_ast_entry *ast_entry;
  427. uint32_t ast_index;
  428. ast_index = ppdu_info->rx_status.ast_index;
  429. if (ast_index < (WLAN_UMAC_PSOC_MAX_PEERS * 2)) {
  430. ast_entry = soc->ast_table[ast_index];
  431. if (ast_entry) {
  432. peer = ast_entry->peer;
  433. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  434. if (peer->peer_based_pktlog_filter) {
  435. dp_wdi_event_handler(
  436. WDI_EVENT_RX_DESC, soc,
  437. status_nbuf,
  438. peer->peer_ids[0],
  439. WDI_NO_VAL, mac_id);
  440. }
  441. }
  442. }
  443. }
  444. }
  445. /**
  446. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  447. * buffer on Rx status Queue posted by status SRNG processing.
  448. * @soc: core txrx main context
  449. * @mac_id: mac_id which is one of 3 mac_ids _ring
  450. *
  451. * Return: none
  452. */
  453. static inline void
  454. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  455. uint32_t quota)
  456. {
  457. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  458. struct hal_rx_ppdu_info *ppdu_info;
  459. qdf_nbuf_t status_nbuf;
  460. uint8_t *rx_tlv;
  461. uint8_t *rx_tlv_start;
  462. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  463. QDF_STATUS m_copy_status = QDF_STATUS_SUCCESS;
  464. struct cdp_pdev_mon_stats *rx_mon_stats;
  465. int smart_mesh_status;
  466. ppdu_info = &pdev->ppdu_info;
  467. rx_mon_stats = &pdev->rx_mon_stats;
  468. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  469. return;
  470. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  471. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  472. rx_tlv = qdf_nbuf_data(status_nbuf);
  473. rx_tlv_start = rx_tlv;
  474. if ((pdev->monitor_vdev != NULL) || (pdev->enhanced_stats_en) ||
  475. pdev->mcopy_mode) {
  476. do {
  477. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  478. ppdu_info, pdev->soc->hal_soc);
  479. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  480. rx_mon_stats);
  481. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  482. if ((rx_tlv - rx_tlv_start) >= RX_BUFFER_SIZE)
  483. break;
  484. } while (tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE);
  485. }
  486. if (pdev->dp_peer_based_pktlog) {
  487. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  488. status_nbuf, mac_id);
  489. } else {
  490. dp_wdi_event_handler(WDI_EVENT_RX_DESC, soc,
  491. status_nbuf, HTT_INVALID_PEER,
  492. WDI_NO_VAL, mac_id);
  493. }
  494. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  495. && pdev->monitor_vdev) {
  496. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  497. pdev, ppdu_info, status_nbuf);
  498. if (smart_mesh_status)
  499. qdf_nbuf_free(status_nbuf);
  500. }
  501. if (pdev->mcopy_mode) {
  502. m_copy_status = dp_rx_handle_mcopy_mode(soc,
  503. pdev, ppdu_info, status_nbuf);
  504. if (m_copy_status == QDF_STATUS_SUCCESS)
  505. qdf_nbuf_free(status_nbuf);
  506. }
  507. if (!pdev->neighbour_peers_added && !pdev->mcopy_mode)
  508. qdf_nbuf_free(status_nbuf);
  509. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  510. dp_rx_mon_deliver_non_std(soc, mac_id);
  511. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  512. rx_mon_stats->status_ppdu_done++;
  513. if (pdev->enhanced_stats_en ||
  514. pdev->mcopy_mode || pdev->neighbour_peers_added)
  515. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  516. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  517. dp_rx_mon_dest_process(soc, mac_id, quota);
  518. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  519. }
  520. }
  521. return;
  522. }
  523. /*
  524. * dp_rx_mon_status_srng_process() - Process monitor status ring
  525. * post the status ring buffer to Rx status Queue for later
  526. * processing when status ring is filled with status TLV.
  527. * Allocate a new buffer to status ring if the filled buffer
  528. * is posted.
  529. *
  530. * @soc: core txrx main context
  531. * @mac_id: mac_id which is one of 3 mac_ids
  532. * @quota: No. of ring entry that can be serviced in one shot.
  533. * Return: uint32_t: No. of ring entry that is processed.
  534. */
  535. static inline uint32_t
  536. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  537. uint32_t quota)
  538. {
  539. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  540. void *hal_soc;
  541. void *mon_status_srng;
  542. void *rxdma_mon_status_ring_entry;
  543. QDF_STATUS status;
  544. uint32_t work_done = 0;
  545. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  546. mon_status_srng = pdev->rxdma_mon_status_ring[mac_for_pdev].hal_srng;
  547. qdf_assert(mon_status_srng);
  548. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  549. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  550. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  551. __func__, __LINE__, mon_status_srng);
  552. return work_done;
  553. }
  554. hal_soc = soc->hal_soc;
  555. qdf_assert(hal_soc);
  556. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  557. goto done;
  558. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  559. * BUFFER_ADDR_INFO STRUCT
  560. */
  561. while (qdf_likely((rxdma_mon_status_ring_entry =
  562. hal_srng_src_peek(hal_soc, mon_status_srng))
  563. && quota--)) {
  564. uint32_t rx_buf_cookie;
  565. qdf_nbuf_t status_nbuf;
  566. struct dp_rx_desc *rx_desc;
  567. uint8_t *status_buf;
  568. qdf_dma_addr_t paddr;
  569. uint64_t buf_addr;
  570. buf_addr =
  571. (HAL_RX_BUFFER_ADDR_31_0_GET(
  572. rxdma_mon_status_ring_entry) |
  573. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  574. rxdma_mon_status_ring_entry)) << 32));
  575. if (qdf_likely(buf_addr)) {
  576. rx_buf_cookie =
  577. HAL_RX_BUF_COOKIE_GET(
  578. rxdma_mon_status_ring_entry);
  579. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  580. rx_buf_cookie);
  581. qdf_assert(rx_desc);
  582. status_nbuf = rx_desc->nbuf;
  583. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  584. QDF_DMA_FROM_DEVICE);
  585. status_buf = qdf_nbuf_data(status_nbuf);
  586. status = hal_get_rx_status_done(status_buf);
  587. if (status != QDF_STATUS_SUCCESS) {
  588. uint32_t hp, tp;
  589. hal_get_sw_hptp(hal_soc, mon_status_srng,
  590. &tp, &hp);
  591. QDF_TRACE(QDF_MODULE_ID_DP,
  592. QDF_TRACE_LEVEL_ERROR,
  593. "[%s][%d] status not done - hp:%u, tp:%u",
  594. __func__, __LINE__, hp, tp);
  595. /* WAR for missing status: Skip status entry */
  596. hal_srng_src_get_next(hal_soc, mon_status_srng);
  597. continue;
  598. }
  599. qdf_nbuf_set_pktlen(status_nbuf, RX_BUFFER_SIZE);
  600. qdf_nbuf_unmap_single(soc->osdev, status_nbuf,
  601. QDF_DMA_FROM_DEVICE);
  602. /* Put the status_nbuf to queue */
  603. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  604. } else {
  605. union dp_rx_desc_list_elem_t *desc_list = NULL;
  606. union dp_rx_desc_list_elem_t *tail = NULL;
  607. struct rx_desc_pool *rx_desc_pool;
  608. uint32_t num_alloc_desc;
  609. rx_desc_pool = &soc->rx_desc_status[mac_id];
  610. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  611. rx_desc_pool,
  612. 1,
  613. &desc_list,
  614. &tail);
  615. rx_desc = &desc_list->rx_desc;
  616. }
  617. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  618. /*
  619. * qdf_nbuf alloc or map failed,
  620. * free the dp rx desc to free list,
  621. * fill in NULL dma address at current HP entry,
  622. * keep HP in mon_status_ring unchanged,
  623. * wait next time dp_rx_mon_status_srng_process
  624. * to fill in buffer at current HP.
  625. */
  626. if (qdf_unlikely(status_nbuf == NULL)) {
  627. union dp_rx_desc_list_elem_t *desc_list = NULL;
  628. union dp_rx_desc_list_elem_t *tail = NULL;
  629. struct rx_desc_pool *rx_desc_pool;
  630. rx_desc_pool = &soc->rx_desc_status[mac_id];
  631. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  632. "%s: fail to allocate or map qdf_nbuf",
  633. __func__);
  634. dp_rx_add_to_free_desc_list(&desc_list,
  635. &tail, rx_desc);
  636. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  637. &tail, mac_id, rx_desc_pool);
  638. hal_rxdma_buff_addr_info_set(
  639. rxdma_mon_status_ring_entry,
  640. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  641. work_done++;
  642. break;
  643. }
  644. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  645. rx_desc->nbuf = status_nbuf;
  646. rx_desc->in_use = 1;
  647. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  648. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  649. hal_srng_src_get_next(hal_soc, mon_status_srng);
  650. work_done++;
  651. }
  652. done:
  653. hal_srng_access_end(hal_soc, mon_status_srng);
  654. return work_done;
  655. }
  656. /*
  657. * dp_rx_mon_status_process() - Process monitor status ring and
  658. * TLV in status ring.
  659. *
  660. * @soc: core txrx main context
  661. * @mac_id: mac_id which is one of 3 mac_ids
  662. * @quota: No. of ring entry that can be serviced in one shot.
  663. * Return: uint32_t: No. of ring entry that is processed.
  664. */
  665. static inline uint32_t
  666. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  667. uint32_t work_done;
  668. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  669. quota -= work_done;
  670. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  671. return work_done;
  672. }
  673. /**
  674. * dp_mon_process() - Main monitor mode processing roution.
  675. * This call monitor status ring process then monitor
  676. * destination ring process.
  677. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  678. * @soc: core txrx main context
  679. * @mac_id: mac_id which is one of 3 mac_ids
  680. * @quota: No. of status ring entry that can be serviced in one shot.
  681. * Return: uint32_t: No. of ring entry that is processed.
  682. */
  683. uint32_t
  684. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  685. return dp_rx_mon_status_process(soc, mac_id, quota);
  686. }
  687. /**
  688. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  689. * @pdev: core txrx pdev context
  690. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  691. *
  692. * This function will detach DP RX status ring from
  693. * main device context. will free DP Rx resources for
  694. * status ring
  695. *
  696. * Return: QDF_STATUS_SUCCESS: success
  697. * QDF_STATUS_E_RESOURCES: Error return
  698. */
  699. QDF_STATUS
  700. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  701. {
  702. struct dp_soc *soc = pdev->soc;
  703. struct rx_desc_pool *rx_desc_pool;
  704. rx_desc_pool = &soc->rx_desc_status[mac_id];
  705. if (rx_desc_pool->pool_size != 0)
  706. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  707. return QDF_STATUS_SUCCESS;
  708. }
  709. /*
  710. * dp_rx_buffers_replenish() - replenish monitor status ring with
  711. * rx nbufs called during dp rx
  712. * monitor status ring initialization
  713. *
  714. * @soc: core txrx main context
  715. * @mac_id: mac_id which is one of 3 mac_ids
  716. * @dp_rxdma_srng: dp monitor status circular ring
  717. * @rx_desc_pool; Pointer to Rx descriptor pool
  718. * @num_req_buffers: number of buffer to be replenished
  719. * @desc_list: list of descs if called from dp rx monitor status
  720. * process or NULL during dp rx initialization or
  721. * out of buffer interrupt
  722. * @tail: tail of descs list
  723. * @owner: who owns the nbuf (host, NSS etc...)
  724. * Return: return success or failure
  725. */
  726. static inline
  727. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  728. uint32_t mac_id,
  729. struct dp_srng *dp_rxdma_srng,
  730. struct rx_desc_pool *rx_desc_pool,
  731. uint32_t num_req_buffers,
  732. union dp_rx_desc_list_elem_t **desc_list,
  733. union dp_rx_desc_list_elem_t **tail,
  734. uint8_t owner)
  735. {
  736. uint32_t num_alloc_desc;
  737. uint16_t num_desc_to_free = 0;
  738. uint32_t num_entries_avail;
  739. uint32_t count = 0;
  740. int sync_hw_ptr = 1;
  741. qdf_dma_addr_t paddr;
  742. qdf_nbuf_t rx_netbuf;
  743. void *rxdma_ring_entry;
  744. union dp_rx_desc_list_elem_t *next;
  745. void *rxdma_srng;
  746. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  747. rxdma_srng = dp_rxdma_srng->hal_srng;
  748. qdf_assert(rxdma_srng);
  749. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  750. "[%s][%d] requested %d buffers for replenish",
  751. __func__, __LINE__, num_req_buffers);
  752. /*
  753. * if desc_list is NULL, allocate the descs from freelist
  754. */
  755. if (!(*desc_list)) {
  756. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  757. rx_desc_pool,
  758. num_req_buffers,
  759. desc_list,
  760. tail);
  761. if (!num_alloc_desc) {
  762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  763. "[%s][%d] no free rx_descs in freelist",
  764. __func__, __LINE__);
  765. return QDF_STATUS_E_NOMEM;
  766. }
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  768. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  769. num_alloc_desc);
  770. num_req_buffers = num_alloc_desc;
  771. }
  772. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  773. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  774. rxdma_srng, sync_hw_ptr);
  775. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  776. "[%s][%d] no of available entries in rxdma ring: %d",
  777. __func__, __LINE__, num_entries_avail);
  778. if (num_entries_avail < num_req_buffers) {
  779. num_desc_to_free = num_req_buffers - num_entries_avail;
  780. num_req_buffers = num_entries_avail;
  781. }
  782. while (count < num_req_buffers) {
  783. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  784. /*
  785. * qdf_nbuf alloc or map failed,
  786. * keep HP in mon_status_ring unchanged,
  787. * wait dp_rx_mon_status_srng_process
  788. * to fill in buffer at current HP.
  789. */
  790. if (qdf_unlikely(rx_netbuf == NULL)) {
  791. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  792. "%s: qdf_nbuf allocate or map fail, count %d",
  793. __func__, count);
  794. break;
  795. }
  796. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  797. next = (*desc_list)->next;
  798. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  799. rxdma_srng);
  800. if (qdf_unlikely(rxdma_ring_entry == NULL)) {
  801. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  802. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  803. __func__, __LINE__, count);
  804. qdf_nbuf_unmap_single(dp_soc->osdev, rx_netbuf,
  805. QDF_DMA_BIDIRECTIONAL);
  806. qdf_nbuf_free(rx_netbuf);
  807. break;
  808. }
  809. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  810. (*desc_list)->rx_desc.in_use = 1;
  811. count++;
  812. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  813. (*desc_list)->rx_desc.cookie, owner);
  814. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  815. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  816. paddr=%pK",
  817. __func__, __LINE__, &(*desc_list)->rx_desc,
  818. (*desc_list)->rx_desc.cookie, rx_netbuf,
  819. (void *)paddr);
  820. *desc_list = next;
  821. }
  822. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  823. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  824. "successfully replenished %d buffers", num_req_buffers);
  825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  826. "%d rx desc added back to free list", num_desc_to_free);
  827. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  828. "[%s][%d] desc_list=%pK, tail=%pK rx_desc=%pK, cookie=%d",
  829. __func__, __LINE__, desc_list, tail, &(*desc_list)->rx_desc,
  830. (*desc_list)->rx_desc.cookie);
  831. /*
  832. * add any available free desc back to the free list
  833. */
  834. if (*desc_list) {
  835. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  836. mac_id, rx_desc_pool);
  837. }
  838. return QDF_STATUS_SUCCESS;
  839. }
  840. /**
  841. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  842. * @pdev: core txrx pdev context
  843. * @ring_id: ring number
  844. * This function will attach a DP RX monitor status ring into pDEV
  845. * and replenish monitor status ring with buffer.
  846. *
  847. * Return: QDF_STATUS_SUCCESS: success
  848. * QDF_STATUS_E_RESOURCES: Error return
  849. */
  850. QDF_STATUS
  851. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  852. struct dp_soc *soc = pdev->soc;
  853. union dp_rx_desc_list_elem_t *desc_list = NULL;
  854. union dp_rx_desc_list_elem_t *tail = NULL;
  855. struct dp_srng *rxdma_srng;
  856. uint32_t rxdma_entries;
  857. struct rx_desc_pool *rx_desc_pool;
  858. QDF_STATUS status;
  859. int mac_for_pdev = dp_get_mac_id_for_mac(soc, ring_id);
  860. rxdma_srng = &pdev->rxdma_mon_status_ring[mac_for_pdev];
  861. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  862. soc->hal_soc, RXDMA_MONITOR_STATUS);
  863. rx_desc_pool = &soc->rx_desc_status[ring_id];
  864. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  865. "%s: Mon RX Status Pool[%d] allocation size=%d",
  866. __func__, ring_id, rxdma_entries);
  867. status = dp_rx_desc_pool_alloc(soc, ring_id, rxdma_entries+1,
  868. rx_desc_pool);
  869. if (!QDF_IS_STATUS_SUCCESS(status)) {
  870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  871. "%s: dp_rx_desc_pool_alloc() failed ", __func__);
  872. return status;
  873. }
  874. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  875. "%s: Mon RX Status Buffers Replenish ring_id=%d",
  876. __func__, ring_id);
  877. status = dp_rx_mon_status_buffers_replenish(soc, ring_id, rxdma_srng,
  878. rx_desc_pool, rxdma_entries, &desc_list, &tail,
  879. HAL_RX_BUF_RBM_SW3_BM);
  880. if (!QDF_IS_STATUS_SUCCESS(status)) {
  881. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  882. "%s: dp_rx_buffers_replenish() failed ", __func__);
  883. return status;
  884. }
  885. qdf_nbuf_queue_init(&pdev->rx_status_q);
  886. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  887. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  888. sizeof(pdev->ppdu_info.rx_status));
  889. qdf_mem_zero(&pdev->rx_mon_stats,
  890. sizeof(pdev->rx_mon_stats));
  891. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  892. &pdev->rx_mon_stats);
  893. return QDF_STATUS_SUCCESS;
  894. }