hal_rh_generic_api.c 25 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_rh_api.h"
  20. #include "hal_rx.h"
  21. #include "hal_rh_rx.h"
  22. #include "hal_tx.h"
  23. #include <hal_api_mon.h>
  24. static uint32_t hal_get_reo_qdesc_size_rh(uint32_t ba_window_size,
  25. int tid)
  26. {
  27. return 0;
  28. }
  29. static uint16_t hal_get_rx_max_ba_window_rh(int tid)
  30. {
  31. return 0;
  32. }
  33. static void hal_set_link_desc_addr_rh(void *desc, uint32_t cookie,
  34. qdf_dma_addr_t link_desc_paddr,
  35. uint8_t bm_id)
  36. {
  37. }
  38. static void hal_tx_init_data_ring_rh(hal_soc_handle_t hal_soc_hdl,
  39. hal_ring_handle_t hal_ring_hdl)
  40. {
  41. }
  42. static void hal_get_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
  43. uint8_t ac, uint32_t *value)
  44. {
  45. }
  46. static void hal_set_ba_aging_timeout_rh(hal_soc_handle_t hal_soc_hdl,
  47. uint8_t ac, uint32_t value)
  48. {
  49. }
  50. static uint32_t hal_get_reo_reg_base_offset_rh(void)
  51. {
  52. return 0;
  53. }
  54. static void hal_rx_reo_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
  55. struct hal_buf_info *buf_info)
  56. {
  57. }
  58. static void
  59. hal_rx_msdu_link_desc_set_rh(hal_soc_handle_t hal_soc_hdl,
  60. void *src_srng_desc,
  61. hal_buff_addrinfo_t buf_addr_info,
  62. uint8_t bm_action)
  63. {
  64. }
  65. static
  66. void hal_rx_buf_cookie_rbm_get_rh(uint32_t *buf_addr_info_hdl,
  67. hal_buf_info_t buf_info_hdl)
  68. {
  69. }
  70. static uint8_t hal_rx_ret_buf_manager_get_rh(hal_ring_desc_t ring_desc)
  71. {
  72. return 0;
  73. }
  74. static uint32_t hal_rx_get_reo_error_code_rh(hal_ring_desc_t rx_desc)
  75. {
  76. return 0;
  77. }
  78. static uint32_t
  79. hal_gen_reo_remap_val_generic_rh(enum hal_reo_remap_reg remap_reg,
  80. uint8_t *ix0_map)
  81. {
  82. return 0;
  83. }
  84. static void hal_rx_mpdu_desc_info_get_rh(void *desc_addr,
  85. void *mpdu_desc_info_hdl)
  86. {
  87. }
  88. static uint8_t hal_rx_err_status_get_rh(hal_ring_desc_t rx_desc)
  89. {
  90. return 0;
  91. }
  92. static uint8_t hal_rx_reo_buf_type_get_rh(hal_ring_desc_t rx_desc)
  93. {
  94. return 0;
  95. }
  96. static uint32_t hal_rx_wbm_err_src_get_rh(hal_ring_desc_t ring_desc)
  97. {
  98. return 0;
  99. }
  100. static void
  101. hal_rx_wbm_rel_buf_paddr_get_rh(hal_ring_desc_t rx_desc,
  102. struct hal_buf_info *buf_info)
  103. {
  104. }
  105. static int hal_reo_send_cmd_rh(hal_soc_handle_t hal_soc_hdl,
  106. hal_ring_handle_t hal_ring_hdl,
  107. enum hal_reo_cmd_type cmd,
  108. void *params)
  109. {
  110. return 0;
  111. }
  112. static void
  113. hal_reo_qdesc_setup_rh(hal_soc_handle_t hal_soc_hdl, int tid,
  114. uint32_t ba_window_size,
  115. uint32_t start_seq, void *hw_qdesc_vaddr,
  116. qdf_dma_addr_t hw_qdesc_paddr,
  117. int pn_type, uint8_t vdev_stats_id)
  118. {
  119. }
  120. static inline uint32_t
  121. hal_rx_msdu_reo_dst_ind_get_rh(hal_soc_handle_t hal_soc_hdl,
  122. void *msdu_link_desc)
  123. {
  124. return 0;
  125. }
  126. static inline void
  127. hal_msdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl,
  128. void *msdu_desc, uint32_t dst_ind,
  129. uint32_t nbuf_len)
  130. {
  131. }
  132. static inline void
  133. hal_mpdu_desc_info_set_rh(hal_soc_handle_t hal_soc_hdl, void *ent_desc,
  134. void *mpdu_desc, uint32_t seq_no)
  135. {
  136. }
  137. static QDF_STATUS hal_reo_status_update_rh(hal_soc_handle_t hal_soc_hdl,
  138. hal_ring_desc_t reo_desc,
  139. void *st_handle,
  140. uint32_t tlv, int *num_ref)
  141. {
  142. return QDF_STATUS_SUCCESS;
  143. }
  144. static uint8_t hal_get_tlv_hdr_size_rh(void)
  145. {
  146. return sizeof(struct tlv_32_hdr);
  147. }
  148. static inline
  149. uint8_t *hal_get_reo_ent_desc_qdesc_addr_rh(uint8_t *desc)
  150. {
  151. return 0;
  152. }
  153. static inline
  154. void hal_set_reo_ent_desc_reo_dest_ind_rh(uint8_t *desc,
  155. uint32_t dst_ind)
  156. {
  157. }
  158. static uint64_t hal_rx_get_qdesc_addr_rh(uint8_t *dst_ring_desc,
  159. uint8_t *buf)
  160. {
  161. return 0;
  162. }
  163. static uint8_t hal_get_idle_link_bm_id_rh(uint8_t chip_id)
  164. {
  165. return 0;
  166. }
  167. /*
  168. * hal_rx_msdu_is_wlan_mcast_generic_rh(): Check if the buffer is for multicast
  169. * address
  170. * @nbuf: Network buffer
  171. *
  172. * Returns: flag to indicate whether the nbuf has MC/BC address
  173. */
  174. static uint32_t hal_rx_msdu_is_wlan_mcast_generic_rh(qdf_nbuf_t nbuf)
  175. {
  176. uint8_t *buf = qdf_nbuf_data(nbuf);
  177. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  178. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  179. return rx_attn->mcast_bcast;
  180. }
  181. /**
  182. * hal_rx_tlv_decap_format_get_rh() - Get packet decap format from the TLV
  183. * @hw_desc_addr: rx tlv desc
  184. *
  185. * Return: pkt decap format
  186. */
  187. static uint32_t hal_rx_tlv_decap_format_get_rh(void *hw_desc_addr)
  188. {
  189. struct rx_msdu_start *rx_msdu_start;
  190. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  191. rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
  192. return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
  193. }
  194. /**
  195. * hal_rx_dump_pkt_tlvs_rh(): API to print all member elements of
  196. * RX TLVs
  197. * @hal_soc_hdl: HAL SOC handle
  198. * @buf: pointer the pkt buffer
  199. * @dbg_level: log level
  200. *
  201. * Return: void
  202. */
  203. static void hal_rx_dump_pkt_tlvs_rh(hal_soc_handle_t hal_soc_hdl,
  204. uint8_t *buf, uint8_t dbg_level)
  205. {
  206. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  207. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  208. struct rx_mpdu_start *mpdu_start =
  209. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  210. struct rx_msdu_start *msdu_start =
  211. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  212. struct rx_mpdu_end *mpdu_end = &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
  213. struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  214. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  215. hal_rx_dump_rx_attention_tlv(rx_attn, dbg_level);
  216. hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level, hal_soc);
  217. hal_rx_dump_msdu_start_tlv(hal_soc, msdu_start, dbg_level);
  218. hal_rx_dump_mpdu_end_tlv(mpdu_end, dbg_level);
  219. hal_rx_dump_msdu_end_tlv(hal_soc, msdu_end, dbg_level);
  220. hal_rx_dump_pkt_hdr_tlv(pkt_tlvs, dbg_level);
  221. }
  222. /**
  223. * hal_rx_tlv_get_offload_info_rh() - Get the offload info from TLV
  224. * @rx_tlv: RX tlv start address in buffer
  225. * @offload_info: Buffer to store the offload info
  226. *
  227. * Return: 0 on success, -EINVAL on failure.
  228. */
  229. static int
  230. hal_rx_tlv_get_offload_info_rh(uint8_t *rx_tlv,
  231. struct hal_offload_info *offload_info)
  232. {
  233. offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  234. offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_tlv);
  235. offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  236. offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  237. if (offload_info->tcp_proto) {
  238. offload_info->tcp_pure_ack =
  239. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  240. offload_info->tcp_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  241. offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  242. offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  243. offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  244. }
  245. return 0;
  246. }
  247. /*
  248. * hal_rx_attn_phy_ppdu_id_get_rh(): get phy_ppdu_id value
  249. * from rx attention
  250. * @buf: pointer to rx_pkt_tlvs
  251. *
  252. * Return: phy_ppdu_id
  253. */
  254. static uint16_t hal_rx_attn_phy_ppdu_id_get_rh(uint8_t *buf)
  255. {
  256. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  257. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  258. uint16_t phy_ppdu_id;
  259. phy_ppdu_id = HAL_RX_ATTN_PHY_PPDU_ID_GET(rx_attn);
  260. return phy_ppdu_id;
  261. }
  262. /**
  263. * hal_rx_msdu_start_msdu_len_get_rh(): API to get the MSDU length
  264. * from rx_msdu_start TLV
  265. *
  266. * @buf: pointer to the start of RX PKT TLV headers
  267. *
  268. * Return: msdu length
  269. */
  270. static uint32_t hal_rx_msdu_start_msdu_len_get_rh(uint8_t *buf)
  271. {
  272. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  273. struct rx_msdu_start *msdu_start =
  274. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  275. uint32_t msdu_len;
  276. msdu_len = HAL_RX_MSDU_START_MSDU_LEN_GET(msdu_start);
  277. return msdu_len;
  278. }
  279. /**
  280. * hal_rx_get_proto_params_rh() - Get l4 proto values from TLV
  281. * @buf: rx tlv address
  282. * @proto_params: Buffer to store proto parameters
  283. *
  284. * Return: 0 on success.
  285. */
  286. static int hal_rx_get_proto_params_rh(uint8_t *buf, void *proto_params)
  287. {
  288. struct hal_proto_params *param =
  289. (struct hal_proto_params *)proto_params;
  290. param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(buf);
  291. param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(buf);
  292. param->ipv6_proto = HAL_RX_TLV_GET_IPV6(buf);
  293. return 0;
  294. }
  295. /**
  296. * hal_rx_get_l3_l4_offsets_rh() - Get l3/l4 header offset from TLV
  297. * @buf: rx tlv start address
  298. * @l3_hdr_offset: buffer to store l3 offset
  299. * @l4_hdr_offset: buffer to store l4 offset
  300. *
  301. * Return: 0 on success.
  302. */
  303. static int hal_rx_get_l3_l4_offsets_rh(uint8_t *buf, uint32_t *l3_hdr_offset,
  304. uint32_t *l4_hdr_offset)
  305. {
  306. *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(buf);
  307. *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(buf);
  308. return 0;
  309. }
  310. /**
  311. * hal_rx_tlv_get_pn_num_rh() - Get packet number from RX TLV
  312. * @buf: rx tlv address
  313. * @pn_num: buffer to store packet number
  314. *
  315. * Return: None
  316. */
  317. static inline void hal_rx_tlv_get_pn_num_rh(uint8_t *buf, uint64_t *pn_num)
  318. {
  319. struct rx_pkt_tlvs *rx_pkt_tlv =
  320. (struct rx_pkt_tlvs *)buf;
  321. struct rx_mpdu_info *rx_mpdu_info_details =
  322. &rx_pkt_tlv->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
  323. pn_num[0] = rx_mpdu_info_details->pn_31_0;
  324. pn_num[0] |=
  325. ((uint64_t)rx_mpdu_info_details->pn_63_32 << 32);
  326. pn_num[1] = rx_mpdu_info_details->pn_95_64;
  327. pn_num[1] |=
  328. ((uint64_t)rx_mpdu_info_details->pn_127_96 << 32);
  329. }
  330. #ifdef NO_RX_PKT_HDR_TLV
  331. /**
  332. * hal_rx_pkt_hdr_get_rh() - Get rx packet header start address.
  333. * @buf: packet start address
  334. *
  335. * Return: packet data start address.
  336. */
  337. static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
  338. {
  339. return buf + RX_PKT_TLVS_LEN;
  340. }
  341. #else
  342. static inline uint8_t *hal_rx_pkt_hdr_get_rh(uint8_t *buf)
  343. {
  344. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  345. return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
  346. }
  347. #endif
  348. /**
  349. * hal_rx_priv_info_set_in_tlv_rh(): Save the private info to
  350. * the reserved bytes of rx_tlv_hdr
  351. * @buf: start of rx_tlv_hdr
  352. * @priv_data: hal_wbm_err_desc_info structure
  353. * @len: length of the private data
  354. * Return: void
  355. */
  356. static inline void
  357. hal_rx_priv_info_set_in_tlv_rh(uint8_t *buf, uint8_t *priv_data,
  358. uint32_t len)
  359. {
  360. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  361. uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
  362. RX_PADDING0_BYTES : len;
  363. qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
  364. }
  365. /**
  366. * hal_rx_priv_info_get_from_tlv_rh(): retrieve the private data from
  367. * the reserved bytes of rx_tlv_hdr.
  368. * @buf: start of rx_tlv_hdr
  369. * @priv_data: hal_wbm_err_desc_info structure
  370. * @len: length of the private data
  371. * Return: void
  372. */
  373. static inline void
  374. hal_rx_priv_info_get_from_tlv_rh(uint8_t *buf, uint8_t *priv_data,
  375. uint32_t len)
  376. {
  377. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  378. uint32_t copy_len = (len > RX_PADDING0_BYTES) ?
  379. RX_PADDING0_BYTES : len;
  380. qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
  381. }
  382. /**
  383. * hal_rx_get_tlv_size_generic_rh() - Get rx packet tlv size
  384. * @rx_pkt_tlv_size: TLV size for regular RX packets
  385. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  386. *
  387. * Return: size of rx pkt tlv before the actual data
  388. */
  389. static void hal_rx_get_tlv_size_generic_rh(uint16_t *rx_pkt_tlv_size,
  390. uint16_t *rx_mon_pkt_tlv_size)
  391. {
  392. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  393. *rx_mon_pkt_tlv_size = SIZE_OF_MONITOR_TLV;
  394. }
  395. /*
  396. * hal_rxdma_buff_addr_info_set() - set the buffer_addr_info of the
  397. * rxdma ring entry.
  398. * @rxdma_entry: descriptor entry
  399. * @paddr: physical address of nbuf data pointer.
  400. * @cookie: SW cookie used as a index to SW rx desc.
  401. * @manager: who owns the nbuf (host, NSS, etc...).
  402. *
  403. */
  404. static void
  405. hal_rxdma_buff_addr_info_set_rh(void *rxdma_entry, qdf_dma_addr_t paddr,
  406. uint32_t cookie, uint8_t manager)
  407. {
  408. uint32_t paddr_lo = ((u64)paddr & 0x00000000ffffffff);
  409. uint32_t paddr_hi = ((u64)paddr & 0xffffffff00000000) >> 32;
  410. HAL_RXDMA_PADDR_LO_SET(rxdma_entry, paddr_lo);
  411. HAL_RXDMA_PADDR_HI_SET(rxdma_entry, paddr_hi);
  412. HAL_RXDMA_COOKIE_SET(rxdma_entry, cookie);
  413. HAL_RXDMA_MANAGER_SET(rxdma_entry, manager);
  414. }
  415. /**
  416. * hal_rx_tlv_csum_err_get_rh() - Get IP and tcp-udp checksum fail flag
  417. * @rx_tlv_hdr: start address of rx_tlv_hdr
  418. * @ip_csum_err: buffer to return ip_csum_fail flag
  419. * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
  420. *
  421. * Return: None
  422. */
  423. static inline void
  424. hal_rx_tlv_csum_err_get_rh(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
  425. uint32_t *tcp_udp_csum_err)
  426. {
  427. *ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  428. *tcp_udp_csum_err = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  429. }
  430. static void
  431. hal_rx_tlv_get_pkt_capture_flags_rh(uint8_t *rx_tlv_pkt_hdr,
  432. struct hal_rx_pkt_capture_flags *flags)
  433. {
  434. struct rx_pkt_tlvs *rx_tlv_hdr = (struct rx_pkt_tlvs *)rx_tlv_pkt_hdr;
  435. struct rx_attention *rx_attn = &rx_tlv_hdr->attn_tlv.rx_attn;
  436. struct rx_mpdu_start *mpdu_start =
  437. &rx_tlv_hdr->mpdu_start_tlv.rx_mpdu_start;
  438. struct rx_mpdu_end *mpdu_end = &rx_tlv_hdr->mpdu_end_tlv.rx_mpdu_end;
  439. struct rx_msdu_start *msdu_start =
  440. &rx_tlv_hdr->msdu_start_tlv.rx_msdu_start;
  441. flags->encrypt_type = mpdu_start->rx_mpdu_info_details.encrypt_type;
  442. flags->fcs_err = mpdu_end->fcs_err;
  443. flags->fragment_flag = rx_attn->fragment_flag;
  444. flags->chan_freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
  445. flags->rssi_comb = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
  446. flags->tsft = msdu_start->ppdu_start_timestamp;
  447. }
  448. static inline bool
  449. hal_rx_mpdu_info_ampdu_flag_get_rh(uint8_t *buf)
  450. {
  451. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  452. struct rx_mpdu_start *mpdu_start =
  453. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  454. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  455. bool ampdu_flag;
  456. ampdu_flag = HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(mpdu_info);
  457. return ampdu_flag;
  458. }
  459. static
  460. uint32_t hal_rx_tlv_mpdu_len_err_get_rh(void *hw_desc_addr)
  461. {
  462. struct rx_attention *rx_attn;
  463. struct rx_mon_pkt_tlvs *rx_desc =
  464. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  465. rx_attn = &rx_desc->attn_tlv.rx_attn;
  466. return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR);
  467. }
  468. static
  469. uint32_t hal_rx_tlv_mpdu_fcs_err_get_rh(void *hw_desc_addr)
  470. {
  471. struct rx_attention *rx_attn;
  472. struct rx_mon_pkt_tlvs *rx_desc =
  473. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  474. rx_attn = &rx_desc->attn_tlv.rx_attn;
  475. return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR);
  476. }
  477. #ifdef NO_RX_PKT_HDR_TLV
  478. static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
  479. {
  480. uint8_t *rx_pkt_hdr;
  481. struct rx_mon_pkt_tlvs *rx_desc =
  482. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  483. rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
  484. return rx_pkt_hdr;
  485. }
  486. #else
  487. static uint8_t *hal_rx_desc_get_80211_hdr_rh(void *hw_desc_addr)
  488. {
  489. uint8_t *rx_pkt_hdr;
  490. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  491. rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0];
  492. return rx_pkt_hdr;
  493. }
  494. #endif
  495. static uint32_t hal_rx_hw_desc_mpdu_user_id_rh(void *hw_desc_addr)
  496. {
  497. struct rx_mon_pkt_tlvs *rx_desc =
  498. (struct rx_mon_pkt_tlvs *)hw_desc_addr;
  499. uint32_t user_id;
  500. user_id = HAL_RX_GET_USER_TLV32_USERID(
  501. &rx_desc->mpdu_start_tlv);
  502. return user_id;
  503. }
  504. /**
  505. * hal_rx_msdu_start_msdu_len_set_rh(): API to set the MSDU length
  506. * from rx_msdu_start TLV
  507. *
  508. * @buf: pointer to the start of RX PKT TLV headers
  509. * @len: msdu length
  510. *
  511. * Return: none
  512. */
  513. static inline void
  514. hal_rx_msdu_start_msdu_len_set_rh(uint8_t *buf, uint32_t len)
  515. {
  516. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  517. struct rx_msdu_start *msdu_start =
  518. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  519. void *wrd1;
  520. wrd1 = (uint8_t *)msdu_start + RX_MSDU_START_1_MSDU_LENGTH_OFFSET;
  521. *(uint32_t *)wrd1 &= (~RX_MSDU_START_1_MSDU_LENGTH_MASK);
  522. *(uint32_t *)wrd1 |= len;
  523. }
  524. /*
  525. * hal_rx_tlv_bw_get_rh(): API to get the Bandwidth
  526. * Interval from rx_msdu_start
  527. *
  528. * @buf: pointer to the start of RX PKT TLV header
  529. * Return: uint32_t(bw)
  530. */
  531. static inline uint32_t hal_rx_tlv_bw_get_rh(uint8_t *buf)
  532. {
  533. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  534. struct rx_msdu_start *msdu_start =
  535. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  536. uint32_t bw;
  537. bw = HAL_RX_MSDU_START_BW_GET(msdu_start);
  538. return bw;
  539. }
  540. /*
  541. * hal_rx_tlv_get_freq_rh(): API to get the frequency of operating channel
  542. * from rx_msdu_start
  543. *
  544. * @buf: pointer to the start of RX PKT TLV header
  545. * Return: uint32_t(frequency)
  546. */
  547. static inline uint32_t
  548. hal_rx_tlv_get_freq_rh(uint8_t *buf)
  549. {
  550. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  551. struct rx_msdu_start *msdu_start =
  552. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  553. uint32_t freq;
  554. freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start);
  555. return freq;
  556. }
  557. /**
  558. * hal_rx_tlv_sgi_get_rh(): API to get the Short Guard
  559. * Interval from rx_msdu_start TLV
  560. *
  561. * @buf: pointer to the start of RX PKT TLV headers
  562. * Return: uint32_t(sgi)
  563. */
  564. static inline uint32_t
  565. hal_rx_tlv_sgi_get_rh(uint8_t *buf)
  566. {
  567. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  568. struct rx_msdu_start *msdu_start =
  569. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  570. uint32_t sgi;
  571. sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start);
  572. return sgi;
  573. }
  574. /**
  575. * hal_rx_tlv_rate_mcs_get_rh(): API to get the MCS rate
  576. * from rx_msdu_start TLV
  577. *
  578. * @buf: pointer to the start of RX PKT TLV headers
  579. * Return: uint32_t(rate_mcs)
  580. */
  581. static inline uint32_t
  582. hal_rx_tlv_rate_mcs_get_rh(uint8_t *buf)
  583. {
  584. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  585. struct rx_msdu_start *msdu_start =
  586. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  587. uint32_t rate_mcs;
  588. rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start);
  589. return rate_mcs;
  590. }
  591. /*
  592. * hal_rx_tlv_get_pkt_type_rh(): API to get the pkt type
  593. * from rx_msdu_start
  594. *
  595. * @buf: pointer to the start of RX PKT TLV header
  596. * Return: uint32_t(pkt type)
  597. */
  598. static inline uint32_t hal_rx_tlv_get_pkt_type_rh(uint8_t *buf)
  599. {
  600. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  601. struct rx_msdu_start *msdu_start =
  602. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  603. uint32_t pkt_type;
  604. pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start);
  605. return pkt_type;
  606. }
  607. /**
  608. * hal_rx_tlv_mic_err_get_rh(): API to get the MIC ERR
  609. * from rx_mpdu_end TLV
  610. *
  611. * @buf: pointer to the start of RX PKT TLV headers
  612. * Return: uint32_t(mic_err)
  613. */
  614. static inline uint32_t
  615. hal_rx_tlv_mic_err_get_rh(uint8_t *buf)
  616. {
  617. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  618. struct rx_mpdu_end *mpdu_end =
  619. &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
  620. uint32_t mic_err;
  621. mic_err = HAL_RX_MPDU_END_MIC_ERR_GET(mpdu_end);
  622. return mic_err;
  623. }
  624. /**
  625. * hal_rx_tlv_decrypt_err_get_rh(): API to get the Decrypt ERR
  626. * from rx_mpdu_end TLV
  627. *
  628. * @buf: pointer to the start of RX PKT TLV headers
  629. * Return: uint32_t(decrypt_err)
  630. */
  631. static inline uint32_t
  632. hal_rx_tlv_decrypt_err_get_rh(uint8_t *buf)
  633. {
  634. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  635. struct rx_mpdu_end *mpdu_end =
  636. &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end;
  637. uint32_t decrypt_err;
  638. decrypt_err = HAL_RX_MPDU_END_DECRYPT_ERR_GET(mpdu_end);
  639. return decrypt_err;
  640. }
  641. /*
  642. * hal_rx_tlv_first_mpdu_get_rh(): get fist_mpdu bit from rx attention
  643. * @buf: pointer to rx_pkt_tlvs
  644. *
  645. * reutm: uint32_t(first_msdu)
  646. */
  647. static inline uint32_t
  648. hal_rx_tlv_first_mpdu_get_rh(uint8_t *buf)
  649. {
  650. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  651. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  652. uint32_t first_mpdu;
  653. first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn);
  654. return first_mpdu;
  655. }
  656. /*
  657. * hal_rx_msdu_get_keyid_rh(): API to get the key id if the decrypted packet
  658. * from rx_msdu_end
  659. *
  660. * @buf: pointer to the start of RX PKT TLV header
  661. * Return: uint32_t(key id)
  662. */
  663. static inline uint8_t
  664. hal_rx_msdu_get_keyid_rh(uint8_t *buf)
  665. {
  666. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  667. struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  668. uint32_t keyid_octet;
  669. keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end);
  670. return keyid_octet & 0x3;
  671. }
  672. /*
  673. * hal_rx_tlv_get_is_decrypted_rh(): API to get the decrypt status of the
  674. * packet from rx_attention
  675. *
  676. * @buf: pointer to the start of RX PKT TLV header
  677. * Return: uint32_t(decryt status)
  678. */
  679. static inline uint32_t
  680. hal_rx_tlv_get_is_decrypted_rh(uint8_t *buf)
  681. {
  682. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  683. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  684. uint32_t is_decrypt = 0;
  685. uint32_t decrypt_status;
  686. decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn);
  687. if (!decrypt_status)
  688. is_decrypt = 1;
  689. return is_decrypt;
  690. }
  691. /**
  692. * hal_hw_txrx_default_ops_attach_rh() - Attach the default hal ops for
  693. * Rh arch chipsets.
  694. * @hal_soc: HAL soc handle
  695. *
  696. * Return: None
  697. */
  698. void hal_hw_txrx_default_ops_attach_rh(struct hal_soc *hal_soc)
  699. {
  700. hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_rh;
  701. hal_soc->ops->hal_get_rx_max_ba_window =
  702. hal_get_rx_max_ba_window_rh;
  703. hal_soc->ops->hal_set_link_desc_addr = hal_set_link_desc_addr_rh;
  704. hal_soc->ops->hal_tx_init_data_ring = hal_tx_init_data_ring_rh;
  705. hal_soc->ops->hal_get_ba_aging_timeout = hal_get_ba_aging_timeout_rh;
  706. hal_soc->ops->hal_set_ba_aging_timeout = hal_set_ba_aging_timeout_rh;
  707. hal_soc->ops->hal_get_reo_reg_base_offset =
  708. hal_get_reo_reg_base_offset_rh;
  709. hal_soc->ops->hal_rx_get_tlv_size = hal_rx_get_tlv_size_generic_rh;
  710. hal_soc->ops->hal_rx_msdu_is_wlan_mcast =
  711. hal_rx_msdu_is_wlan_mcast_generic_rh;
  712. hal_soc->ops->hal_rx_tlv_decap_format_get =
  713. hal_rx_tlv_decap_format_get_rh;
  714. hal_soc->ops->hal_rx_dump_pkt_tlvs = hal_rx_dump_pkt_tlvs_rh;
  715. hal_soc->ops->hal_rx_tlv_get_offload_info =
  716. hal_rx_tlv_get_offload_info_rh;
  717. hal_soc->ops->hal_rx_tlv_phy_ppdu_id_get =
  718. hal_rx_attn_phy_ppdu_id_get_rh;
  719. hal_soc->ops->hal_rx_tlv_msdu_done_get = hal_rx_attn_msdu_done_get_rh;
  720. hal_soc->ops->hal_rx_tlv_msdu_len_get =
  721. hal_rx_msdu_start_msdu_len_get_rh;
  722. hal_soc->ops->hal_rx_get_proto_params = hal_rx_get_proto_params_rh;
  723. hal_soc->ops->hal_rx_get_l3_l4_offsets = hal_rx_get_l3_l4_offsets_rh;
  724. hal_soc->ops->hal_rx_reo_buf_paddr_get = hal_rx_reo_buf_paddr_get_rh;
  725. hal_soc->ops->hal_rx_msdu_link_desc_set = hal_rx_msdu_link_desc_set_rh;
  726. hal_soc->ops->hal_rx_buf_cookie_rbm_get = hal_rx_buf_cookie_rbm_get_rh;
  727. hal_soc->ops->hal_rx_ret_buf_manager_get =
  728. hal_rx_ret_buf_manager_get_rh;
  729. hal_soc->ops->hal_rxdma_buff_addr_info_set =
  730. hal_rxdma_buff_addr_info_set_rh;
  731. hal_soc->ops->hal_rx_msdu_flags_get = hal_rx_msdu_flags_get_rh;
  732. hal_soc->ops->hal_rx_get_reo_error_code = hal_rx_get_reo_error_code_rh;
  733. hal_soc->ops->hal_gen_reo_remap_val =
  734. hal_gen_reo_remap_val_generic_rh;
  735. hal_soc->ops->hal_rx_tlv_csum_err_get =
  736. hal_rx_tlv_csum_err_get_rh;
  737. hal_soc->ops->hal_rx_mpdu_desc_info_get =
  738. hal_rx_mpdu_desc_info_get_rh;
  739. hal_soc->ops->hal_rx_err_status_get = hal_rx_err_status_get_rh;
  740. hal_soc->ops->hal_rx_reo_buf_type_get = hal_rx_reo_buf_type_get_rh;
  741. hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_rh;
  742. hal_soc->ops->hal_rx_wbm_err_src_get = hal_rx_wbm_err_src_get_rh;
  743. hal_soc->ops->hal_rx_wbm_rel_buf_paddr_get =
  744. hal_rx_wbm_rel_buf_paddr_get_rh;
  745. hal_soc->ops->hal_rx_priv_info_set_in_tlv =
  746. hal_rx_priv_info_set_in_tlv_rh;
  747. hal_soc->ops->hal_rx_priv_info_get_from_tlv =
  748. hal_rx_priv_info_get_from_tlv_rh;
  749. hal_soc->ops->hal_rx_mpdu_info_ampdu_flag_get =
  750. hal_rx_mpdu_info_ampdu_flag_get_rh;
  751. hal_soc->ops->hal_rx_tlv_mpdu_len_err_get =
  752. hal_rx_tlv_mpdu_len_err_get_rh;
  753. hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get =
  754. hal_rx_tlv_mpdu_fcs_err_get_rh;
  755. hal_soc->ops->hal_reo_send_cmd = hal_reo_send_cmd_rh;
  756. hal_soc->ops->hal_rx_tlv_get_pkt_capture_flags =
  757. hal_rx_tlv_get_pkt_capture_flags_rh;
  758. hal_soc->ops->hal_rx_desc_get_80211_hdr = hal_rx_desc_get_80211_hdr_rh;
  759. hal_soc->ops->hal_rx_hw_desc_mpdu_user_id =
  760. hal_rx_hw_desc_mpdu_user_id_rh;
  761. hal_soc->ops->hal_reo_qdesc_setup = hal_reo_qdesc_setup_rh;
  762. hal_soc->ops->hal_rx_tlv_msdu_len_set =
  763. hal_rx_msdu_start_msdu_len_set_rh;
  764. hal_soc->ops->hal_rx_tlv_bw_get = hal_rx_tlv_bw_get_rh;
  765. hal_soc->ops->hal_rx_tlv_get_freq = hal_rx_tlv_get_freq_rh;
  766. hal_soc->ops->hal_rx_tlv_sgi_get = hal_rx_tlv_sgi_get_rh;
  767. hal_soc->ops->hal_rx_tlv_rate_mcs_get = hal_rx_tlv_rate_mcs_get_rh;
  768. hal_soc->ops->hal_rx_tlv_get_pkt_type = hal_rx_tlv_get_pkt_type_rh;
  769. hal_soc->ops->hal_rx_tlv_get_pn_num = hal_rx_tlv_get_pn_num_rh;
  770. hal_soc->ops->hal_rx_tlv_mic_err_get = hal_rx_tlv_mic_err_get_rh;
  771. hal_soc->ops->hal_rx_tlv_decrypt_err_get =
  772. hal_rx_tlv_decrypt_err_get_rh;
  773. hal_soc->ops->hal_rx_tlv_first_mpdu_get = hal_rx_tlv_first_mpdu_get_rh;
  774. hal_soc->ops->hal_rx_tlv_get_is_decrypted =
  775. hal_rx_tlv_get_is_decrypted_rh;
  776. hal_soc->ops->hal_rx_msdu_get_keyid = hal_rx_msdu_get_keyid_rh;
  777. hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
  778. hal_rx_msdu_reo_dst_ind_get_rh;
  779. hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_rh;
  780. hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_rh;
  781. hal_soc->ops->hal_reo_status_update = hal_reo_status_update_rh;
  782. hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_rh;
  783. hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
  784. hal_get_reo_ent_desc_qdesc_addr_rh;
  785. hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_rh;
  786. hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
  787. hal_set_reo_ent_desc_reo_dest_ind_rh;
  788. hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_rh;
  789. }