msm_drv.c 54 KB

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  1. /*
  2. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Copyright (c) 2016 Intel Corporation
  20. *
  21. * Permission to use, copy, modify, distribute, and sell this software and its
  22. * documentation for any purpose is hereby granted without fee, provided that
  23. * the above copyright notice appear in all copies and that both that copyright
  24. * notice and this permission notice appear in supporting documentation, and
  25. * that the name of the copyright holders not be used in advertising or
  26. * publicity pertaining to distribution of the software without specific,
  27. * written prior permission. The copyright holders make no representations
  28. * about the suitability of this software for any purpose. It is provided "as
  29. * is" without express or implied warranty.
  30. *
  31. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  32. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  33. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  34. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  35. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  36. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  37. * OF THIS SOFTWARE.
  38. */
  39. #include <linux/of_address.h>
  40. #include <linux/kthread.h>
  41. #include <uapi/linux/sched/types.h>
  42. #include <drm/drm_of.h>
  43. #include <drm/drm_probe_helper.h>
  44. #include "msm_drv.h"
  45. #include "msm_gem.h"
  46. #include "msm_kms.h"
  47. #include "msm_mmu.h"
  48. #include "sde_wb.h"
  49. #include "sde_dbg.h"
  50. /*
  51. * MSM driver version:
  52. * - 1.0.0 - initial interface
  53. * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
  54. * - 1.2.0 - adds explicit fence support for submit ioctl
  55. * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
  56. * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
  57. * MSM_GEM_INFO ioctl.
  58. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
  59. * GEM object's debug name
  60. */
  61. #define MSM_VERSION_MAJOR 1
  62. #define MSM_VERSION_MINOR 4
  63. #define MSM_VERSION_PATCHLEVEL 0
  64. #define LASTCLOSE_TIMEOUT_MS 500
  65. #define msm_wait_event_timeout(waitq, cond, timeout_ms, ret) \
  66. do { \
  67. ktime_t cur_ktime; \
  68. ktime_t exp_ktime; \
  69. s64 wait_time_jiffies = msecs_to_jiffies(timeout_ms); \
  70. \
  71. exp_ktime = ktime_add_ms(ktime_get(), timeout_ms); \
  72. do { \
  73. ret = wait_event_timeout(waitq, cond, \
  74. wait_time_jiffies); \
  75. cur_ktime = ktime_get(); \
  76. } while ((!cond) && (ret == 0) && \
  77. (ktime_compare_safe(exp_ktime, cur_ktime) > 0));\
  78. } while (0)
  79. static void msm_fb_output_poll_changed(struct drm_device *dev)
  80. {
  81. struct msm_drm_private *priv = NULL;
  82. if (!dev) {
  83. DRM_ERROR("output_poll_changed failed, invalid input\n");
  84. return;
  85. }
  86. priv = dev->dev_private;
  87. if (priv->fbdev)
  88. drm_fb_helper_hotplug_event(priv->fbdev);
  89. }
  90. /**
  91. * msm_atomic_helper_check - validate state object
  92. * @dev: DRM device
  93. * @state: the driver state object
  94. *
  95. * This is a wrapper for the drm_atomic_helper_check to check the modeset
  96. * and state checking for planes. Additionally it checks if any secure
  97. * transition(moving CRTC and planes between secure and non-secure states and
  98. * vice versa) is allowed or not. When going to secure state, planes
  99. * with fb_mode as dir translated only can be staged on the CRTC, and only one
  100. * CRTC should be active.
  101. * Also mixing of secure and non-secure is not allowed.
  102. *
  103. * RETURNS
  104. * Zero for success or -errorno.
  105. */
  106. int msm_atomic_check(struct drm_device *dev,
  107. struct drm_atomic_state *state)
  108. {
  109. struct msm_drm_private *priv;
  110. priv = dev->dev_private;
  111. if (priv && priv->kms && priv->kms->funcs &&
  112. priv->kms->funcs->atomic_check)
  113. return priv->kms->funcs->atomic_check(priv->kms, state);
  114. return drm_atomic_helper_check(dev, state);
  115. }
  116. static const struct drm_mode_config_funcs mode_config_funcs = {
  117. .fb_create = msm_framebuffer_create,
  118. .output_poll_changed = msm_fb_output_poll_changed,
  119. .atomic_check = msm_atomic_check,
  120. .atomic_commit = msm_atomic_commit,
  121. .atomic_state_alloc = msm_atomic_state_alloc,
  122. .atomic_state_clear = msm_atomic_state_clear,
  123. .atomic_state_free = msm_atomic_state_free,
  124. };
  125. static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
  126. .atomic_commit_tail = msm_atomic_commit_tail,
  127. };
  128. #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  129. static bool reglog = false;
  130. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  131. module_param(reglog, bool, 0600);
  132. #else
  133. #define reglog 0
  134. #endif
  135. #ifdef CONFIG_DRM_FBDEV_EMULATION
  136. static bool fbdev = true;
  137. MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  138. module_param(fbdev, bool, 0600);
  139. #endif
  140. static char *vram = "16m";
  141. MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  142. module_param(vram, charp, 0);
  143. bool dumpstate = false;
  144. MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
  145. module_param(dumpstate, bool, 0600);
  146. static bool modeset = true;
  147. MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
  148. module_param(modeset, bool, 0600);
  149. /*
  150. * Util/helpers:
  151. */
  152. int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk)
  153. {
  154. struct property *prop;
  155. const char *name;
  156. struct clk_bulk_data *local;
  157. int i = 0, ret, count;
  158. count = of_property_count_strings(dev->of_node, "clock-names");
  159. if (count < 1)
  160. return 0;
  161. local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
  162. count, GFP_KERNEL);
  163. if (!local)
  164. return -ENOMEM;
  165. of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
  166. local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
  167. if (!local[i].id) {
  168. devm_kfree(dev, local);
  169. return -ENOMEM;
  170. }
  171. i++;
  172. }
  173. ret = devm_clk_bulk_get(dev, count, local);
  174. if (ret) {
  175. for (i = 0; i < count; i++)
  176. devm_kfree(dev, (void *) local[i].id);
  177. devm_kfree(dev, local);
  178. return ret;
  179. }
  180. *bulk = local;
  181. return count;
  182. }
  183. struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
  184. const char *name)
  185. {
  186. int i;
  187. char n[32];
  188. snprintf(n, sizeof(n), "%s_clk", name);
  189. for (i = 0; bulk && i < count; i++) {
  190. if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
  191. return bulk[i].clk;
  192. }
  193. return NULL;
  194. }
  195. struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
  196. {
  197. struct clk *clk;
  198. char name2[32];
  199. clk = devm_clk_get(&pdev->dev, name);
  200. if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
  201. return clk;
  202. snprintf(name2, sizeof(name2), "%s_clk", name);
  203. clk = devm_clk_get(&pdev->dev, name2);
  204. if (!IS_ERR(clk))
  205. dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
  206. "\"%s\" instead of \"%s\"\n", name, name2);
  207. return clk;
  208. }
  209. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  210. const char *dbgname)
  211. {
  212. struct resource *res;
  213. unsigned long size;
  214. void __iomem *ptr;
  215. if (name)
  216. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  217. else
  218. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  219. if (!res) {
  220. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  221. name);
  222. return ERR_PTR(-EINVAL);
  223. }
  224. size = resource_size(res);
  225. ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  226. if (!ptr) {
  227. dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  228. return ERR_PTR(-ENOMEM);
  229. }
  230. if (reglog)
  231. dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n",
  232. dbgname, ptr, size);
  233. return ptr;
  234. }
  235. unsigned long msm_iomap_size(struct platform_device *pdev, const char *name)
  236. {
  237. struct resource *res;
  238. if (name)
  239. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  240. else
  241. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  242. if (!res) {
  243. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  244. name);
  245. return 0;
  246. }
  247. return resource_size(res);
  248. }
  249. void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
  250. {
  251. devm_iounmap(&pdev->dev, addr);
  252. }
  253. void msm_writel(u32 data, void __iomem *addr)
  254. {
  255. if (reglog)
  256. pr_debug("IO:W %pK %08x\n", addr, data);
  257. writel(data, addr);
  258. }
  259. u32 msm_readl(const void __iomem *addr)
  260. {
  261. u32 val = readl(addr);
  262. if (reglog)
  263. pr_err("IO:R %pK %08x\n", addr, val);
  264. return val;
  265. }
  266. int msm_get_src_bpc(int chroma_format,
  267. int bpc)
  268. {
  269. int src_bpp;
  270. switch (chroma_format) {
  271. case MSM_CHROMA_444:
  272. src_bpp = bpc * 3;
  273. break;
  274. case MSM_CHROMA_422:
  275. src_bpp = bpc * 2;
  276. break;
  277. case MSM_CHROMA_420:
  278. src_bpp = mult_frac(bpc, 3, 2);
  279. break;
  280. default:
  281. src_bpp = bpc * 3;
  282. break;
  283. }
  284. return src_bpp;
  285. }
  286. struct vblank_work {
  287. struct kthread_work work;
  288. int crtc_id;
  289. bool enable;
  290. struct msm_drm_private *priv;
  291. };
  292. static void vblank_ctrl_worker(struct kthread_work *work)
  293. {
  294. struct vblank_work *cur_work = container_of(work,
  295. struct vblank_work, work);
  296. struct msm_drm_private *priv = cur_work->priv;
  297. struct msm_kms *kms = priv->kms;
  298. if (cur_work->enable)
  299. kms->funcs->enable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  300. else
  301. kms->funcs->disable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  302. kfree(cur_work);
  303. }
  304. static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
  305. int crtc_id, bool enable)
  306. {
  307. struct vblank_work *cur_work;
  308. struct drm_crtc *crtc;
  309. struct kthread_worker *worker;
  310. if (!priv || crtc_id >= priv->num_crtcs)
  311. return -EINVAL;
  312. cur_work = kzalloc(sizeof(*cur_work), GFP_ATOMIC);
  313. if (!cur_work)
  314. return -ENOMEM;
  315. crtc = priv->crtcs[crtc_id];
  316. kthread_init_work(&cur_work->work, vblank_ctrl_worker);
  317. cur_work->crtc_id = crtc_id;
  318. cur_work->enable = enable;
  319. cur_work->priv = priv;
  320. worker = &priv->event_thread[crtc_id].worker;
  321. kthread_queue_work(worker, &cur_work->work);
  322. return 0;
  323. }
  324. static int msm_drm_uninit(struct device *dev)
  325. {
  326. struct platform_device *pdev = to_platform_device(dev);
  327. struct drm_device *ddev = platform_get_drvdata(pdev);
  328. struct msm_drm_private *priv = ddev->dev_private;
  329. struct msm_kms *kms = priv->kms;
  330. struct msm_vm_client_entry *client_entry, *tmp;
  331. int i;
  332. flush_workqueue(priv->wq);
  333. pm_runtime_get_sync(dev);
  334. /* clean up display commit/event worker threads */
  335. for (i = 0; i < priv->num_crtcs; i++) {
  336. if (priv->disp_thread[i].thread) {
  337. kthread_flush_worker(&priv->disp_thread[i].worker);
  338. kthread_stop(priv->disp_thread[i].thread);
  339. priv->disp_thread[i].thread = NULL;
  340. }
  341. if (priv->event_thread[i].thread) {
  342. kthread_flush_worker(&priv->event_thread[i].worker);
  343. kthread_stop(priv->event_thread[i].thread);
  344. priv->event_thread[i].thread = NULL;
  345. }
  346. }
  347. drm_kms_helper_poll_fini(ddev);
  348. if (kms && kms->funcs)
  349. kms->funcs->debugfs_destroy(kms);
  350. sde_dbg_destroy();
  351. debugfs_remove_recursive(priv->debug_root);
  352. drm_mode_config_cleanup(ddev);
  353. if (priv->registered) {
  354. drm_dev_unregister(ddev);
  355. priv->registered = false;
  356. }
  357. #ifdef CONFIG_DRM_FBDEV_EMULATION
  358. if (fbdev && priv->fbdev)
  359. msm_fbdev_free(ddev);
  360. #endif
  361. drm_atomic_helper_shutdown(ddev);
  362. drm_irq_uninstall(ddev);
  363. if (kms && kms->funcs)
  364. kms->funcs->destroy(kms);
  365. if (priv->vram.paddr) {
  366. unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
  367. drm_mm_takedown(&priv->vram.mm);
  368. dma_free_attrs(dev, priv->vram.size, NULL,
  369. priv->vram.paddr, attrs);
  370. }
  371. component_unbind_all(dev, ddev);
  372. pm_runtime_put_sync(dev);
  373. sde_power_resource_deinit(pdev, &priv->phandle);
  374. mutex_lock(&priv->vm_client_lock);
  375. /* clean up any unregistered clients */
  376. list_for_each_entry_safe(client_entry, tmp, &priv->vm_client_list,
  377. list) {
  378. list_del(&client_entry->list);
  379. kfree(client_entry);
  380. }
  381. mutex_unlock(&priv->vm_client_lock);
  382. msm_mdss_destroy(ddev);
  383. ddev->dev_private = NULL;
  384. destroy_workqueue(priv->wq);
  385. kfree(priv);
  386. drm_dev_put(ddev);
  387. return 0;
  388. }
  389. #define KMS_MDP4 4
  390. #define KMS_MDP5 5
  391. #define KMS_SDE 3
  392. static int get_mdp_ver(struct platform_device *pdev)
  393. {
  394. #ifdef CONFIG_OF
  395. static const struct of_device_id match_types[] = { {
  396. .compatible = "qcom,mdss_mdp",
  397. .data = (void *)KMS_MDP5,
  398. },
  399. {
  400. .compatible = "qcom,sde-kms",
  401. .data = (void *)KMS_SDE,
  402. },
  403. {},
  404. };
  405. struct device *dev = &pdev->dev;
  406. const struct of_device_id *match;
  407. match = of_match_node(match_types, dev->of_node);
  408. if (match)
  409. return (int)(unsigned long)match->data;
  410. #endif
  411. return KMS_MDP4;
  412. }
  413. static int msm_init_vram(struct drm_device *dev)
  414. {
  415. struct msm_drm_private *priv = dev->dev_private;
  416. struct device_node *node;
  417. unsigned long size = 0;
  418. int ret = 0;
  419. /* In the device-tree world, we could have a 'memory-region'
  420. * phandle, which gives us a link to our "vram". Allocating
  421. * is all nicely abstracted behind the dma api, but we need
  422. * to know the entire size to allocate it all in one go. There
  423. * are two cases:
  424. * 1) device with no IOMMU, in which case we need exclusive
  425. * access to a VRAM carveout big enough for all gpu
  426. * buffers
  427. * 2) device with IOMMU, but where the bootloader puts up
  428. * a splash screen. In this case, the VRAM carveout
  429. * need only be large enough for fbdev fb. But we need
  430. * exclusive access to the buffer to avoid the kernel
  431. * using those pages for other purposes (which appears
  432. * as corruption on screen before we have a chance to
  433. * load and do initial modeset)
  434. */
  435. node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
  436. if (node) {
  437. struct resource r;
  438. ret = of_address_to_resource(node, 0, &r);
  439. of_node_put(node);
  440. if (ret)
  441. return ret;
  442. size = r.end - r.start;
  443. DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
  444. /* if we have no IOMMU, then we need to use carveout allocator.
  445. * Grab the entire CMA chunk carved out in early startup in
  446. * mach-msm:
  447. */
  448. } else if (!iommu_present(&platform_bus_type)) {
  449. u32 vram_size;
  450. ret = of_property_read_u32(dev->dev->of_node,
  451. "qcom,vram-size", &vram_size);
  452. size = (ret < 0) ? memparse(vram, NULL) : vram_size;
  453. DRM_INFO("using 0x%x VRAM carveout\n", size);
  454. ret = 0;
  455. }
  456. if (size) {
  457. unsigned long attrs = 0;
  458. void *p;
  459. priv->vram.size = size;
  460. drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
  461. spin_lock_init(&priv->vram.lock);
  462. attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
  463. attrs |= DMA_ATTR_WRITE_COMBINE;
  464. /* note that for no-kernel-mapping, the vaddr returned
  465. * is bogus, but non-null if allocation succeeded:
  466. */
  467. p = dma_alloc_attrs(dev->dev, size,
  468. &priv->vram.paddr, GFP_KERNEL, attrs);
  469. if (!p) {
  470. dev_err(dev->dev, "failed to allocate VRAM\n");
  471. priv->vram.paddr = 0;
  472. return -ENOMEM;
  473. }
  474. dev_info(dev->dev, "VRAM: %08x->%08x\n",
  475. (uint32_t)priv->vram.paddr,
  476. (uint32_t)(priv->vram.paddr + size));
  477. }
  478. return ret;
  479. }
  480. #ifdef CONFIG_OF
  481. static int msm_component_bind_all(struct device *dev,
  482. struct drm_device *drm_dev)
  483. {
  484. int ret;
  485. ret = component_bind_all(dev, drm_dev);
  486. if (ret)
  487. DRM_ERROR("component_bind_all failed: %d\n", ret);
  488. return ret;
  489. }
  490. #else
  491. static int msm_component_bind_all(struct device *dev,
  492. struct drm_device *drm_dev)
  493. {
  494. return 0;
  495. }
  496. #endif
  497. static int msm_drm_display_thread_create(struct sched_param param,
  498. struct msm_drm_private *priv, struct drm_device *ddev,
  499. struct device *dev)
  500. {
  501. int i, ret = 0;
  502. /**
  503. * this priority was found during empiric testing to have appropriate
  504. * realtime scheduling to process display updates and interact with
  505. * other real time and normal priority task
  506. */
  507. param.sched_priority = 16;
  508. for (i = 0; i < priv->num_crtcs; i++) {
  509. /* initialize display thread */
  510. priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
  511. kthread_init_worker(&priv->disp_thread[i].worker);
  512. priv->disp_thread[i].dev = ddev;
  513. priv->disp_thread[i].thread =
  514. kthread_run(kthread_worker_fn,
  515. &priv->disp_thread[i].worker,
  516. "crtc_commit:%d", priv->disp_thread[i].crtc_id);
  517. ret = sched_setscheduler(priv->disp_thread[i].thread,
  518. SCHED_FIFO, &param);
  519. if (ret)
  520. pr_warn("display thread priority update failed: %d\n",
  521. ret);
  522. if (IS_ERR(priv->disp_thread[i].thread)) {
  523. dev_err(dev, "failed to create crtc_commit kthread\n");
  524. priv->disp_thread[i].thread = NULL;
  525. }
  526. /* initialize event thread */
  527. priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
  528. kthread_init_worker(&priv->event_thread[i].worker);
  529. priv->event_thread[i].dev = ddev;
  530. priv->event_thread[i].thread =
  531. kthread_run(kthread_worker_fn,
  532. &priv->event_thread[i].worker,
  533. "crtc_event:%d", priv->event_thread[i].crtc_id);
  534. /**
  535. * event thread should also run at same priority as disp_thread
  536. * because it is handling frame_done events. A lower priority
  537. * event thread and higher priority disp_thread can causes
  538. * frame_pending counters beyond 2. This can lead to commit
  539. * failure at crtc commit level.
  540. */
  541. ret = sched_setscheduler(priv->event_thread[i].thread,
  542. SCHED_FIFO, &param);
  543. if (ret)
  544. pr_warn("display event thread priority update failed: %d\n",
  545. ret);
  546. if (IS_ERR(priv->event_thread[i].thread)) {
  547. dev_err(dev, "failed to create crtc_event kthread\n");
  548. priv->event_thread[i].thread = NULL;
  549. }
  550. if ((!priv->disp_thread[i].thread) ||
  551. !priv->event_thread[i].thread) {
  552. /* clean up previously created threads if any */
  553. for ( ; i >= 0; i--) {
  554. if (priv->disp_thread[i].thread) {
  555. kthread_stop(
  556. priv->disp_thread[i].thread);
  557. priv->disp_thread[i].thread = NULL;
  558. }
  559. if (priv->event_thread[i].thread) {
  560. kthread_stop(
  561. priv->event_thread[i].thread);
  562. priv->event_thread[i].thread = NULL;
  563. }
  564. }
  565. return -EINVAL;
  566. }
  567. }
  568. /**
  569. * Since pp interrupt is heavy weight, try to queue the work
  570. * into a dedicated worker thread, so that they dont interrupt
  571. * other important events.
  572. */
  573. kthread_init_worker(&priv->pp_event_worker);
  574. priv->pp_event_thread = kthread_run(kthread_worker_fn,
  575. &priv->pp_event_worker, "pp_event");
  576. ret = sched_setscheduler(priv->pp_event_thread,
  577. SCHED_FIFO, &param);
  578. if (ret)
  579. pr_warn("pp_event thread priority update failed: %d\n",
  580. ret);
  581. if (IS_ERR(priv->pp_event_thread)) {
  582. dev_err(dev, "failed to create pp_event kthread\n");
  583. ret = PTR_ERR(priv->pp_event_thread);
  584. priv->pp_event_thread = NULL;
  585. return ret;
  586. }
  587. return 0;
  588. }
  589. static struct msm_kms *_msm_drm_component_init_helper(
  590. struct msm_drm_private *priv,
  591. struct drm_device *ddev, struct device *dev,
  592. struct platform_device *pdev)
  593. {
  594. int ret;
  595. struct msm_kms *kms;
  596. switch (get_mdp_ver(pdev)) {
  597. case KMS_MDP4:
  598. kms = mdp4_kms_init(ddev);
  599. break;
  600. case KMS_MDP5:
  601. kms = mdp5_kms_init(ddev);
  602. break;
  603. case KMS_SDE:
  604. kms = sde_kms_init(ddev);
  605. break;
  606. default:
  607. kms = ERR_PTR(-ENODEV);
  608. break;
  609. }
  610. if (IS_ERR_OR_NULL(kms)) {
  611. /*
  612. * NOTE: once we have GPU support, having no kms should not
  613. * be considered fatal.. ideally we would still support gpu
  614. * and (for example) use dmabuf/prime to share buffers with
  615. * imx drm driver on iMX5
  616. */
  617. dev_err(dev, "failed to load kms\n");
  618. return kms;
  619. }
  620. priv->kms = kms;
  621. /**
  622. * Since kms->funcs->hw_init(kms) might call
  623. * drm_object_property_set_value to initialize some custom
  624. * properties we need to make sure mode_config.funcs are populated
  625. * beforehand to avoid dereferencing an unset value during the
  626. * drm_drv_uses_atomic_modeset check.
  627. */
  628. ddev->mode_config.funcs = &mode_config_funcs;
  629. ret = (kms)->funcs->hw_init(kms);
  630. if (ret) {
  631. dev_err(dev, "kms hw init failed: %d\n", ret);
  632. return ERR_PTR(ret);
  633. }
  634. return kms;
  635. }
  636. static int msm_drm_device_init(struct platform_device *pdev,
  637. struct drm_driver *drv)
  638. {
  639. struct device *dev = &pdev->dev;
  640. struct drm_device *ddev;
  641. struct msm_drm_private *priv;
  642. int i, ret;
  643. ddev = drm_dev_alloc(drv, dev);
  644. if (IS_ERR(ddev)) {
  645. dev_err(dev, "failed to allocate drm_device\n");
  646. return PTR_ERR(ddev);
  647. }
  648. drm_mode_config_init(ddev);
  649. platform_set_drvdata(pdev, ddev);
  650. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  651. if (!priv) {
  652. ret = -ENOMEM;
  653. goto priv_alloc_fail;
  654. }
  655. ddev->dev_private = priv;
  656. priv->dev = ddev;
  657. ret = sde_power_resource_init(pdev, &priv->phandle);
  658. if (ret) {
  659. pr_err("sde power resource init failed\n");
  660. goto power_init_fail;
  661. }
  662. ret = sde_dbg_init(&pdev->dev);
  663. if (ret) {
  664. dev_err(dev, "failed to init sde dbg: %d\n", ret);
  665. goto dbg_init_fail;
  666. }
  667. pm_runtime_enable(dev);
  668. ret = pm_runtime_get_sync(dev);
  669. if (ret < 0) {
  670. dev_err(dev, "resource enable failed: %d\n", ret);
  671. goto pm_runtime_error;
  672. }
  673. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  674. sde_power_data_bus_set_quota(&priv->phandle, i,
  675. SDE_POWER_HANDLE_CONT_SPLASH_BUS_AB_QUOTA,
  676. SDE_POWER_HANDLE_CONT_SPLASH_BUS_IB_QUOTA);
  677. return ret;
  678. pm_runtime_error:
  679. sde_dbg_destroy();
  680. dbg_init_fail:
  681. sde_power_resource_deinit(pdev, &priv->phandle);
  682. power_init_fail:
  683. priv_alloc_fail:
  684. drm_dev_put(ddev);
  685. kfree(priv);
  686. return ret;
  687. }
  688. static int msm_drm_component_init(struct device *dev)
  689. {
  690. struct platform_device *pdev = to_platform_device(dev);
  691. struct drm_device *ddev = platform_get_drvdata(pdev);
  692. struct msm_drm_private *priv = ddev->dev_private;
  693. struct msm_kms *kms = NULL;
  694. int ret;
  695. struct sched_param param = { 0 };
  696. struct drm_crtc *crtc;
  697. ret = msm_mdss_init(ddev);
  698. if (ret)
  699. goto mdss_init_fail;
  700. priv->wq = alloc_ordered_workqueue("msm_drm", 0);
  701. init_waitqueue_head(&priv->pending_crtcs_event);
  702. INIT_LIST_HEAD(&priv->client_event_list);
  703. INIT_LIST_HEAD(&priv->inactive_list);
  704. INIT_LIST_HEAD(&priv->vm_client_list);
  705. mutex_init(&priv->vm_client_lock);
  706. /* Bind all our sub-components: */
  707. ret = msm_component_bind_all(dev, ddev);
  708. if (ret)
  709. goto bind_fail;
  710. ret = msm_init_vram(ddev);
  711. if (ret)
  712. goto fail;
  713. ddev->mode_config.funcs = &mode_config_funcs;
  714. ddev->mode_config.helper_private = &mode_config_helper_funcs;
  715. kms = _msm_drm_component_init_helper(priv, ddev, dev, pdev);
  716. if (IS_ERR_OR_NULL(kms)) {
  717. dev_err(dev, "msm_drm_component_init_helper failed\n");
  718. goto fail;
  719. }
  720. ret = msm_drm_display_thread_create(param, priv, ddev, dev);
  721. if (ret) {
  722. dev_err(dev, "msm_drm_display_thread_create failed\n");
  723. goto fail;
  724. }
  725. ret = drm_vblank_init(ddev, priv->num_crtcs);
  726. if (ret < 0) {
  727. dev_err(dev, "failed to initialize vblank\n");
  728. goto fail;
  729. }
  730. drm_for_each_crtc(crtc, ddev)
  731. drm_crtc_vblank_reset(crtc);
  732. if (kms) {
  733. pm_runtime_get_sync(dev);
  734. ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
  735. pm_runtime_put_sync(dev);
  736. if (ret < 0) {
  737. dev_err(dev, "failed to install IRQ handler\n");
  738. goto fail;
  739. }
  740. }
  741. ret = drm_dev_register(ddev, 0);
  742. if (ret)
  743. goto fail;
  744. priv->registered = true;
  745. drm_mode_config_reset(ddev);
  746. if (kms && kms->funcs && kms->funcs->cont_splash_config) {
  747. ret = kms->funcs->cont_splash_config(kms);
  748. if (ret) {
  749. dev_err(dev, "kms cont_splash config failed.\n");
  750. goto fail;
  751. }
  752. }
  753. #ifdef CONFIG_DRM_FBDEV_EMULATION
  754. if (fbdev)
  755. priv->fbdev = msm_fbdev_init(ddev);
  756. #endif
  757. /* create drm client only when fbdev is not supported */
  758. if (!priv->fbdev) {
  759. ret = drm_client_init(ddev, &kms->client, "kms_client", NULL);
  760. if (ret) {
  761. DRM_ERROR("failed to init kms_client: %d\n", ret);
  762. kms->client.dev = NULL;
  763. goto fail;
  764. }
  765. drm_client_register(&kms->client);
  766. }
  767. ret = sde_dbg_debugfs_register(dev);
  768. if (ret) {
  769. dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret);
  770. goto fail;
  771. }
  772. /* perform subdriver post initialization */
  773. if (kms && kms->funcs && kms->funcs->postinit) {
  774. ret = kms->funcs->postinit(kms);
  775. if (ret) {
  776. pr_err("kms post init failed: %d\n", ret);
  777. goto fail;
  778. }
  779. }
  780. drm_kms_helper_poll_init(ddev);
  781. return 0;
  782. fail:
  783. msm_drm_uninit(dev);
  784. return ret;
  785. bind_fail:
  786. msm_mdss_destroy(ddev);
  787. mdss_init_fail:
  788. sde_dbg_destroy();
  789. sde_power_resource_deinit(pdev, &priv->phandle);
  790. drm_dev_put(ddev);
  791. kfree(priv);
  792. return ret;
  793. }
  794. /*
  795. * DRM operations:
  796. */
  797. static int context_init(struct drm_device *dev, struct drm_file *file)
  798. {
  799. struct msm_file_private *ctx;
  800. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  801. if (!ctx)
  802. return -ENOMEM;
  803. mutex_init(&ctx->power_lock);
  804. file->driver_priv = ctx;
  805. if (dev && dev->dev_private) {
  806. struct msm_drm_private *priv = dev->dev_private;
  807. struct msm_kms *kms;
  808. kms = priv->kms;
  809. if (kms && kms->funcs && kms->funcs->postopen)
  810. kms->funcs->postopen(kms, file);
  811. }
  812. return 0;
  813. }
  814. static int msm_open(struct drm_device *dev, struct drm_file *file)
  815. {
  816. return context_init(dev, file);
  817. }
  818. static void context_close(struct msm_file_private *ctx)
  819. {
  820. kfree(ctx);
  821. }
  822. static void msm_postclose(struct drm_device *dev, struct drm_file *file)
  823. {
  824. struct msm_drm_private *priv = dev->dev_private;
  825. struct msm_file_private *ctx = file->driver_priv;
  826. struct msm_kms *kms = priv->kms;
  827. if (!kms)
  828. return;
  829. if (kms->funcs && kms->funcs->postclose)
  830. kms->funcs->postclose(kms, file);
  831. mutex_lock(&dev->struct_mutex);
  832. if (ctx == priv->lastctx)
  833. priv->lastctx = NULL;
  834. mutex_unlock(&dev->struct_mutex);
  835. mutex_lock(&ctx->power_lock);
  836. if (ctx->enable_refcnt) {
  837. SDE_EVT32(ctx->enable_refcnt);
  838. pm_runtime_put_sync(dev->dev);
  839. }
  840. mutex_unlock(&ctx->power_lock);
  841. context_close(ctx);
  842. }
  843. static void msm_lastclose(struct drm_device *dev)
  844. {
  845. struct msm_drm_private *priv = dev->dev_private;
  846. struct msm_kms *kms = priv->kms;
  847. int i, rc;
  848. if (!kms)
  849. return;
  850. /* check for splash status before triggering cleanup
  851. * if we end up here with splash status ON i.e before first
  852. * commit then ignore the last close call
  853. */
  854. if (kms->funcs && kms->funcs->check_for_splash
  855. && kms->funcs->check_for_splash(kms))
  856. return;
  857. /*
  858. * clean up vblank disable immediately as this is the last close.
  859. */
  860. for (i = 0; i < dev->num_crtcs; i++) {
  861. struct drm_vblank_crtc *vblank = &dev->vblank[i];
  862. struct timer_list *disable_timer = &vblank->disable_timer;
  863. if (del_timer_sync(disable_timer))
  864. disable_timer->function(disable_timer);
  865. }
  866. /* wait for pending vblank requests to be executed by worker thread */
  867. flush_workqueue(priv->wq);
  868. /* wait for any pending crtcs to finish before lastclose commit */
  869. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  870. LASTCLOSE_TIMEOUT_MS, rc);
  871. if (!rc)
  872. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  873. priv->pending_crtcs);
  874. if (priv->fbdev) {
  875. rc = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  876. if (rc)
  877. DRM_ERROR("restore FBDEV mode failed: %d\n", rc);
  878. } else if (kms && kms->client.dev) {
  879. rc = drm_client_modeset_commit_force(&kms->client);
  880. if (rc)
  881. DRM_ERROR("client modeset commit failed: %d\n", rc);
  882. }
  883. /* wait again, before kms driver does it's lastclose commit */
  884. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  885. LASTCLOSE_TIMEOUT_MS, rc);
  886. if (!rc)
  887. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  888. priv->pending_crtcs);
  889. if (kms->funcs && kms->funcs->lastclose)
  890. kms->funcs->lastclose(kms);
  891. }
  892. static irqreturn_t msm_irq(int irq, void *arg)
  893. {
  894. struct drm_device *dev = arg;
  895. struct msm_drm_private *priv = dev->dev_private;
  896. struct msm_kms *kms = priv->kms;
  897. BUG_ON(!kms);
  898. return kms->funcs->irq(kms);
  899. }
  900. static void msm_irq_preinstall(struct drm_device *dev)
  901. {
  902. struct msm_drm_private *priv = dev->dev_private;
  903. struct msm_kms *kms = priv->kms;
  904. BUG_ON(!kms);
  905. kms->funcs->irq_preinstall(kms);
  906. }
  907. static int msm_irq_postinstall(struct drm_device *dev)
  908. {
  909. struct msm_drm_private *priv = dev->dev_private;
  910. struct msm_kms *kms = priv->kms;
  911. BUG_ON(!kms);
  912. if (kms->funcs->irq_postinstall)
  913. return kms->funcs->irq_postinstall(kms);
  914. return 0;
  915. }
  916. static void msm_irq_uninstall(struct drm_device *dev)
  917. {
  918. struct msm_drm_private *priv = dev->dev_private;
  919. struct msm_kms *kms = priv->kms;
  920. BUG_ON(!kms);
  921. kms->funcs->irq_uninstall(kms);
  922. }
  923. static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
  924. {
  925. struct msm_drm_private *priv = dev->dev_private;
  926. struct msm_kms *kms = priv->kms;
  927. if (!kms)
  928. return -ENXIO;
  929. DBG("dev=%pK, crtc=%u", dev, pipe);
  930. return vblank_ctrl_queue_work(priv, pipe, true);
  931. }
  932. static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
  933. {
  934. struct msm_drm_private *priv = dev->dev_private;
  935. struct msm_kms *kms = priv->kms;
  936. if (!kms)
  937. return;
  938. DBG("dev=%pK, crtc=%u", dev, pipe);
  939. vblank_ctrl_queue_work(priv, pipe, false);
  940. }
  941. /*
  942. * DRM ioctls:
  943. */
  944. static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
  945. struct drm_file *file)
  946. {
  947. struct drm_msm_gem_new *args = data;
  948. if (args->flags & ~MSM_BO_FLAGS) {
  949. DRM_ERROR("invalid flags: %08x\n", args->flags);
  950. return -EINVAL;
  951. }
  952. return msm_gem_new_handle(dev, file, args->size,
  953. args->flags, &args->handle, NULL);
  954. }
  955. static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
  956. {
  957. return ktime_set(timeout.tv_sec, timeout.tv_nsec);
  958. }
  959. static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  960. struct drm_file *file)
  961. {
  962. struct drm_msm_gem_cpu_prep *args = data;
  963. struct drm_gem_object *obj;
  964. ktime_t timeout = to_ktime(args->timeout);
  965. int ret;
  966. if (args->op & ~MSM_PREP_FLAGS) {
  967. DRM_ERROR("invalid op: %08x\n", args->op);
  968. return -EINVAL;
  969. }
  970. obj = drm_gem_object_lookup(file, args->handle);
  971. if (!obj)
  972. return -ENOENT;
  973. ret = msm_gem_cpu_prep(obj, args->op, &timeout);
  974. drm_gem_object_put_unlocked(obj);
  975. return ret;
  976. }
  977. static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  978. struct drm_file *file)
  979. {
  980. struct drm_msm_gem_cpu_fini *args = data;
  981. struct drm_gem_object *obj;
  982. int ret;
  983. obj = drm_gem_object_lookup(file, args->handle);
  984. if (!obj)
  985. return -ENOENT;
  986. ret = msm_gem_cpu_fini(obj);
  987. drm_gem_object_put_unlocked(obj);
  988. return ret;
  989. }
  990. static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
  991. struct drm_file *file)
  992. {
  993. struct drm_msm_gem_madvise *args = data;
  994. struct drm_gem_object *obj;
  995. int ret;
  996. switch (args->madv) {
  997. case MSM_MADV_DONTNEED:
  998. case MSM_MADV_WILLNEED:
  999. break;
  1000. default:
  1001. return -EINVAL;
  1002. }
  1003. ret = mutex_lock_interruptible(&dev->struct_mutex);
  1004. if (ret)
  1005. return ret;
  1006. obj = drm_gem_object_lookup(file, args->handle);
  1007. if (!obj) {
  1008. ret = -ENOENT;
  1009. goto unlock;
  1010. }
  1011. ret = msm_gem_madvise(obj, args->madv);
  1012. if (ret >= 0) {
  1013. args->retained = ret;
  1014. ret = 0;
  1015. }
  1016. drm_gem_object_put(obj);
  1017. unlock:
  1018. mutex_unlock(&dev->struct_mutex);
  1019. return ret;
  1020. }
  1021. static int msm_drm_object_supports_event(struct drm_device *dev,
  1022. struct drm_msm_event_req *req)
  1023. {
  1024. int ret = -EINVAL;
  1025. struct drm_mode_object *arg_obj;
  1026. arg_obj = drm_mode_object_find(dev, NULL, req->object_id,
  1027. req->object_type);
  1028. if (!arg_obj)
  1029. return -ENOENT;
  1030. switch (arg_obj->type) {
  1031. case DRM_MODE_OBJECT_CRTC:
  1032. case DRM_MODE_OBJECT_CONNECTOR:
  1033. ret = 0;
  1034. break;
  1035. default:
  1036. ret = -EOPNOTSUPP;
  1037. break;
  1038. }
  1039. drm_mode_object_put(arg_obj);
  1040. return ret;
  1041. }
  1042. static int msm_register_event(struct drm_device *dev,
  1043. struct drm_msm_event_req *req, struct drm_file *file, bool en)
  1044. {
  1045. int ret = -EINVAL;
  1046. struct msm_drm_private *priv = dev->dev_private;
  1047. struct msm_kms *kms = priv->kms;
  1048. struct drm_mode_object *arg_obj;
  1049. arg_obj = drm_mode_object_find(dev, file, req->object_id,
  1050. req->object_type);
  1051. if (!arg_obj)
  1052. return -ENOENT;
  1053. ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
  1054. drm_mode_object_put(arg_obj);
  1055. return ret;
  1056. }
  1057. static int msm_event_client_count(struct drm_device *dev,
  1058. struct drm_msm_event_req *req_event, bool locked)
  1059. {
  1060. struct msm_drm_private *priv = dev->dev_private;
  1061. unsigned long flag = 0;
  1062. struct msm_drm_event *node;
  1063. int count = 0;
  1064. if (!locked)
  1065. spin_lock_irqsave(&dev->event_lock, flag);
  1066. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1067. if (node->event.base.type == req_event->event &&
  1068. node->event.info.object_id == req_event->object_id)
  1069. count++;
  1070. }
  1071. if (!locked)
  1072. spin_unlock_irqrestore(&dev->event_lock, flag);
  1073. return count;
  1074. }
  1075. static int msm_ioctl_register_event(struct drm_device *dev, void *data,
  1076. struct drm_file *file)
  1077. {
  1078. struct msm_drm_private *priv = dev->dev_private;
  1079. struct drm_msm_event_req *req_event = data;
  1080. struct msm_drm_event *client, *node;
  1081. unsigned long flag = 0;
  1082. bool dup_request = false;
  1083. int ret = 0, count = 0;
  1084. ret = msm_drm_object_supports_event(dev, req_event);
  1085. if (ret) {
  1086. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1087. req_event->event, req_event->object_type,
  1088. req_event->object_id);
  1089. return ret;
  1090. }
  1091. spin_lock_irqsave(&dev->event_lock, flag);
  1092. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1093. if (node->base.file_priv != file)
  1094. continue;
  1095. if (node->event.base.type == req_event->event &&
  1096. node->event.info.object_id == req_event->object_id) {
  1097. DRM_DEBUG("duplicate request for event %x obj id %d\n",
  1098. node->event.base.type,
  1099. node->event.info.object_id);
  1100. dup_request = true;
  1101. break;
  1102. }
  1103. }
  1104. spin_unlock_irqrestore(&dev->event_lock, flag);
  1105. if (dup_request)
  1106. return -EALREADY;
  1107. client = kzalloc(sizeof(*client), GFP_KERNEL);
  1108. if (!client)
  1109. return -ENOMEM;
  1110. client->base.file_priv = file;
  1111. client->base.event = &client->event.base;
  1112. client->event.base.type = req_event->event;
  1113. memcpy(&client->event.info, req_event, sizeof(client->event.info));
  1114. /* Get the count of clients that have registered for event.
  1115. * Event should be enabled for first client, for subsequent enable
  1116. * calls add to client list and return.
  1117. */
  1118. count = msm_event_client_count(dev, req_event, false);
  1119. if (count)
  1120. return 0;
  1121. ret = msm_register_event(dev, req_event, file, true);
  1122. if (ret) {
  1123. DRM_ERROR("failed to enable event %x object %x object id %d\n",
  1124. req_event->event, req_event->object_type,
  1125. req_event->object_id);
  1126. spin_lock_irqsave(&dev->event_lock, flag);
  1127. list_del(&client->base.link);
  1128. spin_unlock_irqrestore(&dev->event_lock, flag);
  1129. kfree(client);
  1130. } else {
  1131. /* Add current client to list */
  1132. spin_lock_irqsave(&dev->event_lock, flag);
  1133. list_add_tail(&client->base.link, &priv->client_event_list);
  1134. spin_unlock_irqrestore(&dev->event_lock, flag);
  1135. }
  1136. return ret;
  1137. }
  1138. static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
  1139. struct drm_file *file)
  1140. {
  1141. struct msm_drm_private *priv = dev->dev_private;
  1142. struct drm_msm_event_req *req_event = data;
  1143. struct msm_drm_event *client = NULL, *node, *temp;
  1144. unsigned long flag = 0;
  1145. int count = 0;
  1146. bool found = false;
  1147. int ret = 0;
  1148. ret = msm_drm_object_supports_event(dev, req_event);
  1149. if (ret) {
  1150. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1151. req_event->event, req_event->object_type,
  1152. req_event->object_id);
  1153. return ret;
  1154. }
  1155. spin_lock_irqsave(&dev->event_lock, flag);
  1156. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1157. base.link) {
  1158. if (node->event.base.type == req_event->event &&
  1159. node->event.info.object_id == req_event->object_id &&
  1160. node->base.file_priv == file) {
  1161. client = node;
  1162. list_del(&client->base.link);
  1163. found = true;
  1164. kfree(client);
  1165. break;
  1166. }
  1167. }
  1168. spin_unlock_irqrestore(&dev->event_lock, flag);
  1169. if (!found)
  1170. return -ENOENT;
  1171. count = msm_event_client_count(dev, req_event, false);
  1172. if (!count)
  1173. ret = msm_register_event(dev, req_event, file, false);
  1174. return ret;
  1175. }
  1176. void msm_mode_object_event_notify(struct drm_mode_object *obj,
  1177. struct drm_device *dev, struct drm_event *event, u8 *payload)
  1178. {
  1179. struct msm_drm_private *priv = NULL;
  1180. unsigned long flags;
  1181. struct msm_drm_event *notify, *node;
  1182. int len = 0, ret;
  1183. if (!obj || !event || !event->length || !payload) {
  1184. DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n",
  1185. obj, event, ((event) ? (event->length) : -1),
  1186. payload);
  1187. return;
  1188. }
  1189. priv = (dev) ? dev->dev_private : NULL;
  1190. if (!dev || !priv) {
  1191. DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
  1192. return;
  1193. }
  1194. spin_lock_irqsave(&dev->event_lock, flags);
  1195. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1196. if (node->event.base.type != event->type ||
  1197. obj->id != node->event.info.object_id)
  1198. continue;
  1199. len = event->length + sizeof(struct msm_drm_event);
  1200. if (node->base.file_priv->event_space < len) {
  1201. DRM_ERROR("Insufficient space %d for event %x len %d\n",
  1202. node->base.file_priv->event_space, event->type,
  1203. len);
  1204. continue;
  1205. }
  1206. notify = kzalloc(len, GFP_ATOMIC);
  1207. if (!notify)
  1208. continue;
  1209. notify->base.file_priv = node->base.file_priv;
  1210. notify->base.event = &notify->event.base;
  1211. notify->event.base.type = node->event.base.type;
  1212. notify->event.base.length = event->length +
  1213. sizeof(struct drm_msm_event_resp);
  1214. memcpy(&notify->event.info, &node->event.info,
  1215. sizeof(notify->event.info));
  1216. memcpy(notify->event.data, payload, event->length);
  1217. ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
  1218. &notify->base, &notify->event.base);
  1219. if (ret) {
  1220. kfree(notify);
  1221. continue;
  1222. }
  1223. drm_send_event_locked(dev, &notify->base);
  1224. }
  1225. spin_unlock_irqrestore(&dev->event_lock, flags);
  1226. }
  1227. static int msm_release(struct inode *inode, struct file *filp)
  1228. {
  1229. struct drm_file *file_priv = filp->private_data;
  1230. struct drm_minor *minor = file_priv->minor;
  1231. struct drm_device *dev = minor->dev;
  1232. struct msm_drm_private *priv = dev->dev_private;
  1233. struct msm_drm_event *node, *temp, *tmp_node;
  1234. u32 count;
  1235. unsigned long flags;
  1236. LIST_HEAD(tmp_head);
  1237. spin_lock_irqsave(&dev->event_lock, flags);
  1238. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1239. base.link) {
  1240. if (node->base.file_priv != file_priv)
  1241. continue;
  1242. list_del(&node->base.link);
  1243. list_add_tail(&node->base.link, &tmp_head);
  1244. }
  1245. spin_unlock_irqrestore(&dev->event_lock, flags);
  1246. list_for_each_entry_safe(node, temp, &tmp_head,
  1247. base.link) {
  1248. list_del(&node->base.link);
  1249. count = msm_event_client_count(dev, &node->event.info, false);
  1250. list_for_each_entry(tmp_node, &tmp_head, base.link) {
  1251. if (tmp_node->event.base.type ==
  1252. node->event.info.event &&
  1253. tmp_node->event.info.object_id ==
  1254. node->event.info.object_id)
  1255. count++;
  1256. }
  1257. if (!count)
  1258. msm_register_event(dev, &node->event.info, file_priv,
  1259. false);
  1260. kfree(node);
  1261. }
  1262. return drm_release(inode, filp);
  1263. }
  1264. /**
  1265. * msm_ioctl_rmfb2 - remove an FB from the configuration
  1266. * @dev: drm device for the ioctl
  1267. * @data: data pointer for the ioctl
  1268. * @file_priv: drm file for the ioctl call
  1269. *
  1270. * Remove the FB specified by the user.
  1271. *
  1272. * Called by the user via ioctl.
  1273. *
  1274. * Returns:
  1275. * Zero on success, negative errno on failure.
  1276. */
  1277. int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
  1278. struct drm_file *file_priv)
  1279. {
  1280. struct drm_framebuffer *fb = NULL;
  1281. struct drm_framebuffer *fbl = NULL;
  1282. uint32_t *id = data;
  1283. int found = 0;
  1284. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  1285. return -EINVAL;
  1286. fb = drm_framebuffer_lookup(dev, file_priv, *id);
  1287. if (!fb)
  1288. return -ENOENT;
  1289. /* drop extra ref from traversing drm_framebuffer_lookup */
  1290. drm_framebuffer_put(fb);
  1291. mutex_lock(&file_priv->fbs_lock);
  1292. list_for_each_entry(fbl, &file_priv->fbs, filp_head)
  1293. if (fb == fbl)
  1294. found = 1;
  1295. if (!found) {
  1296. mutex_unlock(&file_priv->fbs_lock);
  1297. return -ENOENT;
  1298. }
  1299. list_del_init(&fb->filp_head);
  1300. mutex_unlock(&file_priv->fbs_lock);
  1301. drm_framebuffer_put(fb);
  1302. return 0;
  1303. }
  1304. EXPORT_SYMBOL(msm_ioctl_rmfb2);
  1305. /**
  1306. * msm_ioctl_power_ctrl - enable/disable power vote on MDSS Hw
  1307. * @dev: drm device for the ioctl
  1308. * @data: data pointer for the ioctl
  1309. * @file_priv: drm file for the ioctl call
  1310. *
  1311. */
  1312. int msm_ioctl_power_ctrl(struct drm_device *dev, void *data,
  1313. struct drm_file *file_priv)
  1314. {
  1315. struct msm_file_private *ctx = file_priv->driver_priv;
  1316. struct msm_drm_private *priv;
  1317. struct drm_msm_power_ctrl *power_ctrl = data;
  1318. bool vote_req = false;
  1319. int old_cnt;
  1320. int rc = 0;
  1321. if (unlikely(!power_ctrl)) {
  1322. DRM_ERROR("invalid ioctl data\n");
  1323. return -EINVAL;
  1324. }
  1325. priv = dev->dev_private;
  1326. mutex_lock(&ctx->power_lock);
  1327. old_cnt = ctx->enable_refcnt;
  1328. if (power_ctrl->enable) {
  1329. if (!ctx->enable_refcnt)
  1330. vote_req = true;
  1331. ctx->enable_refcnt++;
  1332. } else if (ctx->enable_refcnt) {
  1333. ctx->enable_refcnt--;
  1334. if (!ctx->enable_refcnt)
  1335. vote_req = true;
  1336. } else {
  1337. pr_err("ignoring, unbalanced disable\n");
  1338. }
  1339. if (vote_req) {
  1340. if (power_ctrl->enable)
  1341. rc = pm_runtime_get_sync(dev->dev);
  1342. else
  1343. pm_runtime_put_sync(dev->dev);
  1344. if (rc < 0)
  1345. ctx->enable_refcnt = old_cnt;
  1346. else
  1347. rc = 0;
  1348. }
  1349. pr_debug("pid %d enable %d, refcnt %d, vote_req %d\n",
  1350. current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1351. vote_req);
  1352. SDE_EVT32(current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1353. vote_req);
  1354. mutex_unlock(&ctx->power_lock);
  1355. return rc;
  1356. }
  1357. /**
  1358. * msm_ioctl_display_early_wakeup - early wakeup display.
  1359. * @dev: drm device for the ioctl
  1360. * @data: data pointer for the ioctl
  1361. * @file_priv: drm file for the ioctl call
  1362. *
  1363. */
  1364. int msm_ioctl_display_hint_ops(struct drm_device *dev, void *data,
  1365. struct drm_file *file_priv)
  1366. {
  1367. struct drm_msm_display_hint *display_hint = data;
  1368. struct drm_msm_early_wakeup early_wakeup;
  1369. void __user *early_wakeup_usr;
  1370. struct msm_drm_private *priv;
  1371. struct msm_kms *kms;
  1372. priv = dev->dev_private;
  1373. kms = priv->kms;
  1374. if (unlikely(!display_hint)) {
  1375. DRM_ERROR("invalid ioctl data\n");
  1376. return -EINVAL;
  1377. }
  1378. SDE_EVT32(display_hint->hint_flags);
  1379. if (display_hint->hint_flags == DRM_MSM_DISPLAY_EARLY_WAKEUP_HINT) {
  1380. if (!display_hint->data) {
  1381. DRM_ERROR("early_wakeup: wrong parameter\n");
  1382. return -EINVAL;
  1383. }
  1384. early_wakeup_usr =
  1385. (void __user *)((uintptr_t)display_hint->data);
  1386. if (copy_from_user(&early_wakeup, early_wakeup_usr,
  1387. sizeof(early_wakeup))) {
  1388. DRM_ERROR("early_wakeup: copy from user failed\n");
  1389. return -EINVAL;
  1390. }
  1391. SDE_EVT32(early_wakeup.wakeup_hint);
  1392. if (kms && kms->funcs && kms->funcs->display_early_wakeup
  1393. && early_wakeup.wakeup_hint)
  1394. kms->funcs->display_early_wakeup(dev,
  1395. early_wakeup.connector_id);
  1396. }
  1397. return 0;
  1398. }
  1399. static const struct drm_ioctl_desc msm_ioctls[] = {
  1400. DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  1401. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  1402. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  1403. DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
  1404. DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
  1405. DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
  1406. DRM_UNLOCKED),
  1407. DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
  1408. DRM_UNLOCKED),
  1409. DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_UNLOCKED),
  1410. DRM_IOCTL_DEF_DRV(MSM_POWER_CTRL, msm_ioctl_power_ctrl,
  1411. DRM_RENDER_ALLOW),
  1412. DRM_IOCTL_DEF_DRV(MSM_DISPLAY_HINT, msm_ioctl_display_hint_ops,
  1413. DRM_UNLOCKED),
  1414. };
  1415. static const struct vm_operations_struct vm_ops = {
  1416. .fault = msm_gem_fault,
  1417. .open = drm_gem_vm_open,
  1418. .close = drm_gem_vm_close,
  1419. };
  1420. static const struct file_operations fops = {
  1421. .owner = THIS_MODULE,
  1422. .open = drm_open,
  1423. .release = msm_release,
  1424. .unlocked_ioctl = drm_ioctl,
  1425. .compat_ioctl = drm_compat_ioctl,
  1426. .poll = drm_poll,
  1427. .read = drm_read,
  1428. .llseek = no_llseek,
  1429. .mmap = msm_gem_mmap,
  1430. };
  1431. static struct drm_driver msm_driver = {
  1432. .driver_features = DRIVER_GEM |
  1433. DRIVER_RENDER |
  1434. DRIVER_ATOMIC |
  1435. DRIVER_MODESET,
  1436. .open = msm_open,
  1437. .postclose = msm_postclose,
  1438. .lastclose = msm_lastclose,
  1439. .irq_handler = msm_irq,
  1440. .irq_preinstall = msm_irq_preinstall,
  1441. .irq_postinstall = msm_irq_postinstall,
  1442. .irq_uninstall = msm_irq_uninstall,
  1443. .enable_vblank = msm_enable_vblank,
  1444. .disable_vblank = msm_disable_vblank,
  1445. .gem_free_object = msm_gem_free_object,
  1446. .gem_vm_ops = &vm_ops,
  1447. .dumb_create = msm_gem_dumb_create,
  1448. .dumb_map_offset = msm_gem_dumb_map_offset,
  1449. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  1450. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  1451. .gem_prime_export = drm_gem_prime_export,
  1452. .gem_prime_import = msm_gem_prime_import,
  1453. .gem_prime_pin = msm_gem_prime_pin,
  1454. .gem_prime_unpin = msm_gem_prime_unpin,
  1455. .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
  1456. .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
  1457. .gem_prime_vmap = msm_gem_prime_vmap,
  1458. .gem_prime_vunmap = msm_gem_prime_vunmap,
  1459. .gem_prime_mmap = msm_gem_prime_mmap,
  1460. .ioctls = msm_ioctls,
  1461. .num_ioctls = ARRAY_SIZE(msm_ioctls),
  1462. .fops = &fops,
  1463. .name = "msm_drm",
  1464. .desc = "MSM Snapdragon DRM",
  1465. .date = "20130625",
  1466. .major = MSM_VERSION_MAJOR,
  1467. .minor = MSM_VERSION_MINOR,
  1468. .patchlevel = MSM_VERSION_PATCHLEVEL,
  1469. };
  1470. #ifdef CONFIG_PM_SLEEP
  1471. static int msm_pm_suspend(struct device *dev)
  1472. {
  1473. struct drm_device *ddev;
  1474. struct msm_drm_private *priv;
  1475. struct msm_kms *kms;
  1476. if (!dev)
  1477. return -EINVAL;
  1478. ddev = dev_get_drvdata(dev);
  1479. if (!ddev || !ddev->dev_private)
  1480. return -EINVAL;
  1481. priv = ddev->dev_private;
  1482. kms = priv->kms;
  1483. if (kms && kms->funcs && kms->funcs->pm_suspend)
  1484. return kms->funcs->pm_suspend(dev);
  1485. /* disable hot-plug polling */
  1486. drm_kms_helper_poll_disable(ddev);
  1487. return 0;
  1488. }
  1489. static int msm_pm_resume(struct device *dev)
  1490. {
  1491. struct drm_device *ddev;
  1492. struct msm_drm_private *priv;
  1493. struct msm_kms *kms;
  1494. if (!dev)
  1495. return -EINVAL;
  1496. ddev = dev_get_drvdata(dev);
  1497. if (!ddev || !ddev->dev_private)
  1498. return -EINVAL;
  1499. priv = ddev->dev_private;
  1500. kms = priv->kms;
  1501. if (kms && kms->funcs && kms->funcs->pm_resume)
  1502. return kms->funcs->pm_resume(dev);
  1503. /* enable hot-plug polling */
  1504. drm_kms_helper_poll_enable(ddev);
  1505. return 0;
  1506. }
  1507. #endif
  1508. #ifdef CONFIG_PM
  1509. static int msm_runtime_suspend(struct device *dev)
  1510. {
  1511. struct drm_device *ddev = dev_get_drvdata(dev);
  1512. struct msm_drm_private *priv = ddev->dev_private;
  1513. DBG("");
  1514. if (priv->mdss)
  1515. msm_mdss_disable(priv->mdss);
  1516. else
  1517. sde_power_resource_enable(&priv->phandle, false);
  1518. return 0;
  1519. }
  1520. static int msm_runtime_resume(struct device *dev)
  1521. {
  1522. struct drm_device *ddev = dev_get_drvdata(dev);
  1523. struct msm_drm_private *priv = ddev->dev_private;
  1524. int ret;
  1525. DBG("");
  1526. if (priv->mdss)
  1527. ret = msm_mdss_enable(priv->mdss);
  1528. else
  1529. ret = sde_power_resource_enable(&priv->phandle, true);
  1530. return ret;
  1531. }
  1532. #endif
  1533. static const struct dev_pm_ops msm_pm_ops = {
  1534. SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
  1535. SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
  1536. };
  1537. /*
  1538. * Componentized driver support:
  1539. */
  1540. /*
  1541. * NOTE: duplication of the same code as exynos or imx (or probably any other).
  1542. * so probably some room for some helpers
  1543. */
  1544. static int compare_of(struct device *dev, void *data)
  1545. {
  1546. return dev->of_node == data;
  1547. }
  1548. /*
  1549. * Identify what components need to be added by parsing what remote-endpoints
  1550. * our MDP output ports are connected to. In the case of LVDS on MDP4, there
  1551. * is no external component that we need to add since LVDS is within MDP4
  1552. * itself.
  1553. */
  1554. static int add_components_mdp(struct device *mdp_dev,
  1555. struct component_match **matchptr)
  1556. {
  1557. struct device_node *np = mdp_dev->of_node;
  1558. struct device_node *ep_node;
  1559. struct device *master_dev;
  1560. /*
  1561. * on MDP4 based platforms, the MDP platform device is the component
  1562. * master that adds other display interface components to itself.
  1563. *
  1564. * on MDP5 based platforms, the MDSS platform device is the component
  1565. * master that adds MDP5 and other display interface components to
  1566. * itself.
  1567. */
  1568. if (of_device_is_compatible(np, "qcom,mdp4"))
  1569. master_dev = mdp_dev;
  1570. else
  1571. master_dev = mdp_dev->parent;
  1572. for_each_endpoint_of_node(np, ep_node) {
  1573. struct device_node *intf;
  1574. struct of_endpoint ep;
  1575. int ret;
  1576. ret = of_graph_parse_endpoint(ep_node, &ep);
  1577. if (ret) {
  1578. dev_err(mdp_dev, "unable to parse port endpoint\n");
  1579. of_node_put(ep_node);
  1580. return ret;
  1581. }
  1582. /*
  1583. * The LCDC/LVDS port on MDP4 is a speacial case where the
  1584. * remote-endpoint isn't a component that we need to add
  1585. */
  1586. if (of_device_is_compatible(np, "qcom,mdp4") &&
  1587. ep.port == 0)
  1588. continue;
  1589. /*
  1590. * It's okay if some of the ports don't have a remote endpoint
  1591. * specified. It just means that the port isn't connected to
  1592. * any external interface.
  1593. */
  1594. intf = of_graph_get_remote_port_parent(ep_node);
  1595. if (!intf)
  1596. continue;
  1597. if (of_device_is_available(intf))
  1598. drm_of_component_match_add(master_dev, matchptr,
  1599. compare_of, intf);
  1600. of_node_put(intf);
  1601. }
  1602. return 0;
  1603. }
  1604. static int compare_name_mdp(struct device *dev, void *data)
  1605. {
  1606. return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
  1607. }
  1608. static int add_display_components(struct device *dev,
  1609. struct component_match **matchptr)
  1610. {
  1611. struct device *mdp_dev = NULL;
  1612. struct device_node *node;
  1613. int ret;
  1614. if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
  1615. struct device_node *np = dev->of_node;
  1616. unsigned int i;
  1617. for (i = 0; ; i++) {
  1618. node = of_parse_phandle(np, "connectors", i);
  1619. if (!node)
  1620. break;
  1621. component_match_add(dev, matchptr, compare_of, node);
  1622. }
  1623. return 0;
  1624. }
  1625. /*
  1626. * MDP5 based devices don't have a flat hierarchy. There is a top level
  1627. * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
  1628. * children devices, find the MDP5 node, and then add the interfaces
  1629. * to our components list.
  1630. */
  1631. if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
  1632. ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
  1633. if (ret) {
  1634. dev_err(dev, "failed to populate children devices\n");
  1635. return ret;
  1636. }
  1637. mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
  1638. if (!mdp_dev) {
  1639. dev_err(dev, "failed to find MDSS MDP node\n");
  1640. of_platform_depopulate(dev);
  1641. return -ENODEV;
  1642. }
  1643. put_device(mdp_dev);
  1644. /* add the MDP component itself */
  1645. component_match_add(dev, matchptr, compare_of,
  1646. mdp_dev->of_node);
  1647. } else {
  1648. /* MDP4 */
  1649. mdp_dev = dev;
  1650. }
  1651. ret = add_components_mdp(mdp_dev, matchptr);
  1652. if (ret)
  1653. of_platform_depopulate(dev);
  1654. return ret;
  1655. }
  1656. struct msm_gem_address_space *
  1657. msm_gem_smmu_address_space_get(struct drm_device *dev,
  1658. unsigned int domain)
  1659. {
  1660. struct msm_drm_private *priv = NULL;
  1661. struct msm_kms *kms;
  1662. const struct msm_kms_funcs *funcs;
  1663. struct msm_gem_address_space *aspace;
  1664. if (!iommu_present(&platform_bus_type))
  1665. return ERR_PTR(-ENODEV);
  1666. if ((!dev) || (!dev->dev_private))
  1667. return ERR_PTR(-EINVAL);
  1668. priv = dev->dev_private;
  1669. kms = priv->kms;
  1670. if (!kms)
  1671. return ERR_PTR(-EINVAL);
  1672. funcs = kms->funcs;
  1673. if ((!funcs) || (!funcs->get_address_space))
  1674. return ERR_PTR(-EINVAL);
  1675. aspace = funcs->get_address_space(priv->kms, domain);
  1676. return aspace ? aspace : ERR_PTR(-EINVAL);
  1677. }
  1678. int msm_get_mixer_count(struct msm_drm_private *priv,
  1679. const struct drm_display_mode *mode,
  1680. const struct msm_resource_caps_info *res, u32 *num_lm)
  1681. {
  1682. struct msm_kms *kms;
  1683. const struct msm_kms_funcs *funcs;
  1684. if (!priv) {
  1685. DRM_ERROR("invalid drm private struct\n");
  1686. return -EINVAL;
  1687. }
  1688. kms = priv->kms;
  1689. if (!kms) {
  1690. DRM_ERROR("invalid msm kms struct\n");
  1691. return -EINVAL;
  1692. }
  1693. funcs = kms->funcs;
  1694. if (!funcs || !funcs->get_mixer_count) {
  1695. DRM_ERROR("invalid function pointers\n");
  1696. return -EINVAL;
  1697. }
  1698. return funcs->get_mixer_count(priv->kms, mode, res, num_lm);
  1699. }
  1700. int msm_get_dsc_count(struct msm_drm_private *priv,
  1701. u32 hdisplay, u32 *num_dsc)
  1702. {
  1703. struct msm_kms *kms;
  1704. const struct msm_kms_funcs *funcs;
  1705. if (!priv) {
  1706. DRM_ERROR("invalid drm private struct\n");
  1707. return -EINVAL;
  1708. }
  1709. kms = priv->kms;
  1710. if (!kms) {
  1711. DRM_ERROR("invalid msm kms struct\n");
  1712. return -EINVAL;
  1713. }
  1714. funcs = kms->funcs;
  1715. if (!funcs || !funcs->get_dsc_count) {
  1716. DRM_ERROR("invalid function pointers\n");
  1717. return -EINVAL;
  1718. }
  1719. return funcs->get_dsc_count(priv->kms, hdisplay, num_dsc);
  1720. }
  1721. static int msm_drm_bind(struct device *dev)
  1722. {
  1723. return msm_drm_component_init(dev);
  1724. }
  1725. static void msm_drm_unbind(struct device *dev)
  1726. {
  1727. msm_drm_uninit(dev);
  1728. }
  1729. static const struct component_master_ops msm_drm_ops = {
  1730. .bind = msm_drm_bind,
  1731. .unbind = msm_drm_unbind,
  1732. };
  1733. static int msm_drm_component_dependency_check(struct device *dev)
  1734. {
  1735. struct device_node *node;
  1736. struct device_node *np = dev->of_node;
  1737. unsigned int i;
  1738. if (!of_device_is_compatible(dev->of_node, "qcom,sde-kms"))
  1739. return 0;
  1740. for (i = 0; ; i++) {
  1741. node = of_parse_phandle(np, "connectors", i);
  1742. if (!node)
  1743. break;
  1744. if (of_node_name_eq(node,"qcom,sde_rscc") &&
  1745. of_device_is_available(node) &&
  1746. of_node_check_flag(node, OF_POPULATED)) {
  1747. struct platform_device *pdev =
  1748. of_find_device_by_node(node);
  1749. if (!platform_get_drvdata(pdev)) {
  1750. dev_err(dev,
  1751. "qcom,sde_rscc not probed yet\n");
  1752. return -EPROBE_DEFER;
  1753. } else {
  1754. return 0;
  1755. }
  1756. }
  1757. }
  1758. return 0;
  1759. }
  1760. /*
  1761. * Platform driver:
  1762. */
  1763. static int msm_pdev_probe(struct platform_device *pdev)
  1764. {
  1765. int ret;
  1766. struct component_match *match = NULL;
  1767. ret = msm_drm_component_dependency_check(&pdev->dev);
  1768. if (ret)
  1769. return ret;
  1770. ret = msm_drm_device_init(pdev, &msm_driver);
  1771. if (ret)
  1772. return ret;
  1773. ret = add_display_components(&pdev->dev, &match);
  1774. if (ret)
  1775. return ret;
  1776. if (!match)
  1777. return -ENODEV;
  1778. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  1779. return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
  1780. }
  1781. static int msm_pdev_remove(struct platform_device *pdev)
  1782. {
  1783. component_master_del(&pdev->dev, &msm_drm_ops);
  1784. of_platform_depopulate(&pdev->dev);
  1785. return 0;
  1786. }
  1787. static void msm_pdev_shutdown(struct platform_device *pdev)
  1788. {
  1789. struct drm_device *ddev = platform_get_drvdata(pdev);
  1790. struct msm_drm_private *priv = NULL;
  1791. if (!ddev) {
  1792. DRM_ERROR("invalid drm device node\n");
  1793. return;
  1794. }
  1795. priv = ddev->dev_private;
  1796. if (!priv) {
  1797. DRM_ERROR("invalid msm drm private node\n");
  1798. return;
  1799. }
  1800. msm_lastclose(ddev);
  1801. /* set this after lastclose to allow kickoff from lastclose */
  1802. priv->shutdown_in_progress = true;
  1803. }
  1804. static const struct of_device_id dt_match[] = {
  1805. { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
  1806. { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
  1807. { .compatible = "qcom,sde-kms", .data = (void *)KMS_SDE },
  1808. {},
  1809. };
  1810. MODULE_DEVICE_TABLE(of, dt_match);
  1811. static struct platform_driver msm_platform_driver = {
  1812. .probe = msm_pdev_probe,
  1813. .remove = msm_pdev_remove,
  1814. .shutdown = msm_pdev_shutdown,
  1815. .driver = {
  1816. .name = "msm_drm",
  1817. .of_match_table = dt_match,
  1818. .pm = &msm_pm_ops,
  1819. .suppress_bind_attrs = true,
  1820. },
  1821. };
  1822. static int __init msm_drm_register(void)
  1823. {
  1824. if (!modeset)
  1825. return -EINVAL;
  1826. DBG("init");
  1827. sde_rsc_rpmh_register();
  1828. sde_rsc_register();
  1829. dsi_display_register();
  1830. msm_hdcp_register();
  1831. dp_display_register();
  1832. msm_smmu_driver_init();
  1833. sde_rotator_register();
  1834. sde_rotator_smmu_driver_register();
  1835. msm_dsi_register();
  1836. msm_edp_register();
  1837. msm_hdmi_register();
  1838. sde_wb_register();
  1839. return platform_driver_register(&msm_platform_driver);
  1840. }
  1841. static void __exit msm_drm_unregister(void)
  1842. {
  1843. DBG("fini");
  1844. platform_driver_unregister(&msm_platform_driver);
  1845. sde_wb_unregister();
  1846. msm_hdmi_unregister();
  1847. msm_edp_unregister();
  1848. msm_dsi_unregister();
  1849. sde_rotator_smmu_driver_unregister();
  1850. sde_rotator_unregister();
  1851. msm_smmu_driver_cleanup();
  1852. msm_hdcp_unregister();
  1853. dp_display_unregister();
  1854. dsi_display_unregister();
  1855. sde_rsc_unregister();
  1856. }
  1857. module_init(msm_drm_register);
  1858. module_exit(msm_drm_unregister);
  1859. MODULE_AUTHOR("Rob Clark <[email protected]");
  1860. MODULE_DESCRIPTION("MSM DRM Driver");
  1861. MODULE_LICENSE("GPL");