main.c 128 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  47. #include <trace/hooks/remoteproc.h>
  48. #endif
  49. #ifdef SLATE_MODULE_ENABLED
  50. #include <linux/soc/qcom/slatecom_interface.h>
  51. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  52. #include <uapi/linux/slatecom_interface.h>
  53. #endif
  54. #include "main.h"
  55. #include "qmi.h"
  56. #include "debug.h"
  57. #include "power.h"
  58. #include "genl.h"
  59. #define MAX_PROP_SIZE 32
  60. #define NUM_LOG_PAGES 10
  61. #define NUM_LOG_LONG_PAGES 4
  62. #define ICNSS_MAGIC 0x5abc5abc
  63. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  64. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  65. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  66. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  67. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  68. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  69. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  70. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  71. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  72. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  73. #define ICNSS_MAX_PROBE_CNT 2
  74. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  75. #define PROBE_TIMEOUT 15000
  76. #define SMP2P_SOC_WAKE_TIMEOUT 500
  77. #ifdef CONFIG_ICNSS2_DEBUG
  78. static unsigned long qmi_timeout = 3000;
  79. module_param(qmi_timeout, ulong, 0600);
  80. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  81. #else
  82. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  83. #endif
  84. #define ICNSS_RECOVERY_TIMEOUT 60000
  85. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  86. #define ICNSS_CAL_TIMEOUT 40000
  87. static struct icnss_priv *penv;
  88. static struct work_struct wpss_loader;
  89. static struct work_struct wpss_ssr_work;
  90. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  91. #define ICNSS_EVENT_PENDING 2989
  92. #define ICNSS_EVENT_SYNC BIT(0)
  93. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  94. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  95. ICNSS_EVENT_SYNC)
  96. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  97. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  98. #define SMP2P_GET_MAX_RETRY 4
  99. #define SMP2P_GET_RETRY_DELAY_MS 500
  100. #define RAMDUMP_NUM_DEVICES 256
  101. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  102. #define WLAN_EN_TEMP_THRESHOLD 5000
  103. #define WLAN_EN_DELAY 500
  104. #define ICNSS_RPROC_LEN 10
  105. static DEFINE_IDA(rd_minor_id);
  106. enum icnss_pdr_cause_index {
  107. ICNSS_FW_CRASH,
  108. ICNSS_ROOT_PD_CRASH,
  109. ICNSS_ROOT_PD_SHUTDOWN,
  110. ICNSS_HOST_ERROR,
  111. };
  112. static const char * const icnss_pdr_cause[] = {
  113. [ICNSS_FW_CRASH] = "FW crash",
  114. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  115. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  116. [ICNSS_HOST_ERROR] = "Host error",
  117. };
  118. static void icnss_set_plat_priv(struct icnss_priv *priv)
  119. {
  120. penv = priv;
  121. }
  122. static struct icnss_priv *icnss_get_plat_priv(void)
  123. {
  124. return penv;
  125. }
  126. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  127. {
  128. if (priv && priv->rproc) {
  129. rproc_shutdown(priv->rproc);
  130. rproc_put(priv->rproc);
  131. priv->rproc = NULL;
  132. }
  133. }
  134. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  135. struct kobj_attribute *attr,
  136. const char *buf, size_t count)
  137. {
  138. struct icnss_priv *priv = icnss_get_plat_priv();
  139. if (!priv)
  140. return count;
  141. icnss_pr_dbg("Received shutdown indication");
  142. atomic_set(&priv->is_shutdown, true);
  143. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  144. priv->device_id == ADRASTEA_DEVICE_ID)
  145. icnss_wpss_unload(priv);
  146. return count;
  147. }
  148. static struct kobj_attribute icnss_sysfs_attribute =
  149. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  150. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  151. {
  152. if (atomic_inc_return(&priv->pm_count) != 1)
  153. return;
  154. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  155. atomic_read(&priv->pm_count));
  156. pm_stay_awake(&priv->pdev->dev);
  157. priv->stats.pm_stay_awake++;
  158. }
  159. static void icnss_pm_relax(struct icnss_priv *priv)
  160. {
  161. int r = atomic_dec_return(&priv->pm_count);
  162. WARN_ON(r < 0);
  163. if (r != 0)
  164. return;
  165. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  166. atomic_read(&priv->pm_count));
  167. pm_relax(&priv->pdev->dev);
  168. priv->stats.pm_relax++;
  169. }
  170. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  171. {
  172. switch (type) {
  173. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  174. return "SERVER_ARRIVE";
  175. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  176. return "SERVER_EXIT";
  177. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  178. return "FW_READY";
  179. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  180. return "REGISTER_DRIVER";
  181. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  182. return "UNREGISTER_DRIVER";
  183. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  184. return "PD_SERVICE_DOWN";
  185. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  186. return "FW_EARLY_CRASH_IND";
  187. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  188. return "IDLE_SHUTDOWN";
  189. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  190. return "IDLE_RESTART";
  191. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  192. return "FW_INIT_DONE";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  194. return "QDSS_TRACE_REQ_MEM";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  196. return "QDSS_TRACE_SAVE";
  197. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  198. return "QDSS_TRACE_FREE";
  199. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  200. return "M3_DUMP_UPLOAD";
  201. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  202. return "IMS_WFC_CALL_IND";
  203. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  204. return "WLFW_TWC_CFG_IND";
  205. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  206. return "QDSS_TRACE_REQ_DATA";
  207. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  208. return "SUBSYS_RESTART_LEVEL";
  209. case ICNSS_DRIVER_EVENT_MAX:
  210. return "EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  215. {
  216. switch (type) {
  217. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  218. return "SOC_WAKE_REQUEST";
  219. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  220. return "SOC_WAKE_RELEASE";
  221. case ICNSS_SOC_WAKE_EVENT_MAX:
  222. return "SOC_EVENT_MAX";
  223. }
  224. return "UNKNOWN";
  225. };
  226. int icnss_driver_event_post(struct icnss_priv *priv,
  227. enum icnss_driver_event_type type,
  228. u32 flags, void *data)
  229. {
  230. struct icnss_driver_event *event;
  231. unsigned long irq_flags;
  232. int gfp = GFP_KERNEL;
  233. int ret = 0;
  234. if (!priv)
  235. return -ENODEV;
  236. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  237. icnss_driver_event_to_str(type), type, current->comm,
  238. flags, priv->state);
  239. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  240. icnss_pr_err("Invalid Event type: %d, can't post", type);
  241. return -EINVAL;
  242. }
  243. if (in_interrupt() || irqs_disabled())
  244. gfp = GFP_ATOMIC;
  245. event = kzalloc(sizeof(*event), gfp);
  246. if (event == NULL)
  247. return -ENOMEM;
  248. icnss_pm_stay_awake(priv);
  249. event->type = type;
  250. event->data = data;
  251. init_completion(&event->complete);
  252. event->ret = ICNSS_EVENT_PENDING;
  253. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  254. spin_lock_irqsave(&priv->event_lock, irq_flags);
  255. list_add_tail(&event->list, &priv->event_list);
  256. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  257. priv->stats.events[type].posted++;
  258. queue_work(priv->event_wq, &priv->event_work);
  259. if (!(flags & ICNSS_EVENT_SYNC))
  260. goto out;
  261. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  262. wait_for_completion(&event->complete);
  263. else
  264. ret = wait_for_completion_interruptible(&event->complete);
  265. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  266. icnss_driver_event_to_str(type), type, priv->state, ret,
  267. event->ret);
  268. spin_lock_irqsave(&priv->event_lock, irq_flags);
  269. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  270. event->sync = false;
  271. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  272. ret = -EINTR;
  273. goto out;
  274. }
  275. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  276. ret = event->ret;
  277. kfree(event);
  278. out:
  279. icnss_pm_relax(priv);
  280. return ret;
  281. }
  282. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  283. enum icnss_soc_wake_event_type type,
  284. u32 flags, void *data)
  285. {
  286. struct icnss_soc_wake_event *event;
  287. unsigned long irq_flags;
  288. int gfp = GFP_KERNEL;
  289. int ret = 0;
  290. if (!priv)
  291. return -ENODEV;
  292. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, current->comm, flags, priv->state);
  295. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  296. icnss_pr_err("Invalid Event type: %d, can't post", type);
  297. return -EINVAL;
  298. }
  299. if (in_interrupt() || irqs_disabled())
  300. gfp = GFP_ATOMIC;
  301. event = kzalloc(sizeof(*event), gfp);
  302. if (!event)
  303. return -ENOMEM;
  304. icnss_pm_stay_awake(priv);
  305. event->type = type;
  306. event->data = data;
  307. init_completion(&event->complete);
  308. event->ret = ICNSS_EVENT_PENDING;
  309. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  310. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  311. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  312. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  313. priv->stats.soc_wake_events[type].posted++;
  314. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  315. if (!(flags & ICNSS_EVENT_SYNC))
  316. goto out;
  317. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  318. wait_for_completion(&event->complete);
  319. else
  320. ret = wait_for_completion_interruptible(&event->complete);
  321. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  322. icnss_soc_wake_event_to_str(type),
  323. type, priv->state, ret, event->ret);
  324. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  325. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  326. event->sync = false;
  327. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  328. ret = -EINTR;
  329. goto out;
  330. }
  331. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  332. ret = event->ret;
  333. kfree(event);
  334. out:
  335. icnss_pm_relax(priv);
  336. return ret;
  337. }
  338. bool icnss_is_fw_ready(void)
  339. {
  340. if (!penv)
  341. return false;
  342. else
  343. return test_bit(ICNSS_FW_READY, &penv->state);
  344. }
  345. EXPORT_SYMBOL(icnss_is_fw_ready);
  346. void icnss_block_shutdown(bool status)
  347. {
  348. if (!penv)
  349. return;
  350. if (status) {
  351. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  352. reinit_completion(&penv->unblock_shutdown);
  353. } else {
  354. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  355. complete(&penv->unblock_shutdown);
  356. }
  357. }
  358. EXPORT_SYMBOL(icnss_block_shutdown);
  359. bool icnss_is_fw_down(void)
  360. {
  361. struct icnss_priv *priv = icnss_get_plat_priv();
  362. if (!priv)
  363. return false;
  364. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  365. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  366. test_bit(ICNSS_REJUVENATE, &priv->state);
  367. }
  368. EXPORT_SYMBOL(icnss_is_fw_down);
  369. unsigned long icnss_get_device_config(void)
  370. {
  371. struct icnss_priv *priv = icnss_get_plat_priv();
  372. if (!priv)
  373. return 0;
  374. return priv->device_config;
  375. }
  376. EXPORT_SYMBOL(icnss_get_device_config);
  377. bool icnss_is_rejuvenate(void)
  378. {
  379. if (!penv)
  380. return false;
  381. else
  382. return test_bit(ICNSS_REJUVENATE, &penv->state);
  383. }
  384. EXPORT_SYMBOL(icnss_is_rejuvenate);
  385. bool icnss_is_pdr(void)
  386. {
  387. if (!penv)
  388. return false;
  389. else
  390. return test_bit(ICNSS_PDR, &penv->state);
  391. }
  392. EXPORT_SYMBOL(icnss_is_pdr);
  393. static int icnss_send_smp2p(struct icnss_priv *priv,
  394. enum icnss_smp2p_msg_id msg_id,
  395. enum smp2p_out_entry smp2p_entry)
  396. {
  397. unsigned int value = 0;
  398. int ret;
  399. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  400. return -EINVAL;
  401. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  402. if (msg_id == ICNSS_RESET_MSG) {
  403. priv->smp2p_info[smp2p_entry].seq = 0;
  404. ret = qcom_smem_state_update_bits(
  405. priv->smp2p_info[smp2p_entry].smem_state,
  406. ICNSS_SMEM_VALUE_MASK,
  407. 0);
  408. if (ret)
  409. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  410. ret, icnss_smp2p_str[smp2p_entry]);
  411. return ret;
  412. }
  413. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  414. !test_bit(ICNSS_FW_READY, &priv->state)) {
  415. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  416. priv->state);
  417. return -EINVAL;
  418. }
  419. value |= priv->smp2p_info[smp2p_entry].seq++;
  420. value <<= ICNSS_SMEM_SEQ_NO_POS;
  421. value |= msg_id;
  422. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  423. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  424. reinit_completion(&penv->smp2p_soc_wake_wait);
  425. ret = qcom_smem_state_update_bits(
  426. priv->smp2p_info[smp2p_entry].smem_state,
  427. ICNSS_SMEM_VALUE_MASK,
  428. value);
  429. if (ret) {
  430. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  431. icnss_smp2p_str[smp2p_entry]);
  432. } else {
  433. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  434. msg_id == ICNSS_SOC_WAKE_REL) {
  435. if (!wait_for_completion_timeout(
  436. &priv->smp2p_soc_wake_wait,
  437. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  438. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  439. icnss_smp2p_str[smp2p_entry]);
  440. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  441. ICNSS_ASSERT(0);
  442. }
  443. }
  444. }
  445. return ret;
  446. }
  447. bool icnss_is_low_power(void)
  448. {
  449. if (!penv)
  450. return false;
  451. else
  452. return test_bit(ICNSS_LOW_POWER, &penv->state);
  453. }
  454. EXPORT_SYMBOL(icnss_is_low_power);
  455. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  456. {
  457. struct icnss_priv *priv = ctx;
  458. if (priv)
  459. priv->force_err_fatal = true;
  460. icnss_pr_err("Received force error fatal request from FW\n");
  461. return IRQ_HANDLED;
  462. }
  463. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  464. {
  465. struct icnss_priv *priv = ctx;
  466. struct icnss_uevent_fw_down_data fw_down_data = {0};
  467. icnss_pr_err("Received early crash indication from FW\n");
  468. if (priv) {
  469. if (priv->wpss_self_recovery_enabled)
  470. mod_timer(&priv->wpss_ssr_timer,
  471. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  472. set_bit(ICNSS_FW_DOWN, &priv->state);
  473. icnss_ignore_fw_timeout(true);
  474. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  475. clear_bit(ICNSS_FW_READY, &priv->state);
  476. fw_down_data.crashed = true;
  477. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  478. &fw_down_data);
  479. }
  480. }
  481. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  482. 0, NULL);
  483. return IRQ_HANDLED;
  484. }
  485. static void register_fw_error_notifications(struct device *dev)
  486. {
  487. struct icnss_priv *priv = dev_get_drvdata(dev);
  488. struct device_node *dev_node;
  489. int irq = 0, ret = 0;
  490. if (!priv)
  491. return;
  492. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  493. if (!dev_node) {
  494. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  495. return;
  496. }
  497. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  498. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  499. ret = irq = of_irq_get_byname(dev_node,
  500. "qcom,smp2p-force-fatal-error");
  501. if (ret < 0) {
  502. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  503. irq);
  504. return;
  505. }
  506. }
  507. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  508. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  509. "wlanfw-err", priv);
  510. if (ret < 0) {
  511. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  512. irq, ret);
  513. return;
  514. }
  515. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  516. priv->fw_error_fatal_irq = irq;
  517. }
  518. static void register_early_crash_notifications(struct device *dev)
  519. {
  520. struct icnss_priv *priv = dev_get_drvdata(dev);
  521. struct device_node *dev_node;
  522. int irq = 0, ret = 0;
  523. if (!priv)
  524. return;
  525. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  526. if (!dev_node) {
  527. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  528. return;
  529. }
  530. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  531. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  532. ret = irq = of_irq_get_byname(dev_node,
  533. "qcom,smp2p-early-crash-ind");
  534. if (ret < 0) {
  535. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  536. irq);
  537. return;
  538. }
  539. }
  540. ret = devm_request_threaded_irq(dev, irq, NULL,
  541. fw_crash_indication_handler,
  542. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  543. "wlanfw-early-crash-ind", priv);
  544. if (ret < 0) {
  545. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  546. irq, ret);
  547. return;
  548. }
  549. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  550. priv->fw_early_crash_irq = irq;
  551. }
  552. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  553. {
  554. struct thermal_zone_device *thermal_dev;
  555. const char *tsens;
  556. int ret;
  557. ret = of_property_read_string(priv->pdev->dev.of_node,
  558. "tsens",
  559. &tsens);
  560. if (ret)
  561. return ret;
  562. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  563. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  564. if (IS_ERR(thermal_dev)) {
  565. icnss_pr_err("Fail to get thermal zone. ret: %d",
  566. PTR_ERR(thermal_dev));
  567. return PTR_ERR(thermal_dev);
  568. }
  569. ret = thermal_zone_get_temp(thermal_dev, temp);
  570. if (ret)
  571. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  572. return ret;
  573. }
  574. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  575. {
  576. struct icnss_priv *priv = ctx;
  577. if (priv)
  578. complete(&priv->smp2p_soc_wake_wait);
  579. return IRQ_HANDLED;
  580. }
  581. static void register_soc_wake_notif(struct device *dev)
  582. {
  583. struct icnss_priv *priv = dev_get_drvdata(dev);
  584. struct device_node *dev_node;
  585. int irq = 0, ret = 0;
  586. if (!priv)
  587. return;
  588. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  589. if (!dev_node) {
  590. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  591. return;
  592. }
  593. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  594. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  595. ret = irq = of_irq_get_byname(dev_node,
  596. "qcom,smp2p-soc-wake-ack");
  597. if (ret < 0) {
  598. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  599. irq);
  600. return;
  601. }
  602. }
  603. ret = devm_request_threaded_irq(dev, irq, NULL,
  604. fw_soc_wake_ack_handler,
  605. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  606. IRQF_TRIGGER_FALLING,
  607. "wlanfw-soc-wake-ack", priv);
  608. if (ret < 0) {
  609. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  610. irq, ret);
  611. return;
  612. }
  613. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  614. priv->fw_soc_wake_ack_irq = irq;
  615. }
  616. int icnss_call_driver_uevent(struct icnss_priv *priv,
  617. enum icnss_uevent uevent, void *data)
  618. {
  619. struct icnss_uevent_data uevent_data;
  620. if (!priv->ops || !priv->ops->uevent)
  621. return 0;
  622. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  623. priv->state, uevent);
  624. uevent_data.uevent = uevent;
  625. uevent_data.data = data;
  626. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  627. }
  628. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  629. {
  630. int i;
  631. int ret = 0;
  632. ret = icnss_qmi_get_dms_mac(priv);
  633. if (ret == 0 && priv->dms.mac_valid)
  634. goto qmi_send;
  635. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  636. * Thus assert on failure to get MAC from DMS even after retries
  637. */
  638. if (priv->use_nv_mac) {
  639. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  640. if (priv->dms.mac_valid)
  641. break;
  642. ret = icnss_qmi_get_dms_mac(priv);
  643. if (ret != -EAGAIN)
  644. break;
  645. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  646. }
  647. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  648. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  649. ICNSS_ASSERT(0);
  650. return -EINVAL;
  651. }
  652. }
  653. qmi_send:
  654. if (priv->dms.mac_valid)
  655. ret =
  656. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  657. ARRAY_SIZE(priv->dms.mac));
  658. return ret;
  659. }
  660. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  661. enum smp2p_out_entry smp2p_entry)
  662. {
  663. int retry = 0;
  664. int error;
  665. if (priv->smp2p_info[smp2p_entry].smem_state)
  666. return;
  667. retry:
  668. priv->smp2p_info[smp2p_entry].smem_state =
  669. qcom_smem_state_get(&priv->pdev->dev,
  670. icnss_smp2p_str[smp2p_entry],
  671. &priv->smp2p_info[smp2p_entry].smem_bit);
  672. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  673. if (retry++ < SMP2P_GET_MAX_RETRY) {
  674. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  675. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  676. error, icnss_smp2p_str[smp2p_entry]);
  677. msleep(SMP2P_GET_RETRY_DELAY_MS);
  678. goto retry;
  679. }
  680. ICNSS_ASSERT(0);
  681. return;
  682. }
  683. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  684. }
  685. static inline
  686. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  687. {
  688. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  689. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  690. } else {
  691. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  692. }
  693. }
  694. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  695. {
  696. switch (val) {
  697. case WLAN_RF_SLATE:
  698. return WLFW_WLAN_RF_SLATE_V01;
  699. case WLAN_RF_APACHE:
  700. return WLFW_WLAN_RF_APACHE_V01;
  701. default:
  702. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  703. }
  704. }
  705. #ifdef SLATE_MODULE_ENABLED
  706. static void icnss_send_wlan_boot_init(void)
  707. {
  708. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  709. icnss_pr_info("sent wlan boot init command\n");
  710. }
  711. static void icnss_send_wlan_boot_complete(void)
  712. {
  713. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  714. icnss_pr_info("sent wlan boot complete command\n");
  715. }
  716. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  717. {
  718. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  719. reinit_completion(&priv->slate_boot_complete);
  720. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  721. priv->state);
  722. wait_for_completion(&priv->slate_boot_complete);
  723. }
  724. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  725. return -EINVAL;
  726. icnss_send_wlan_boot_init();
  727. return 0;
  728. }
  729. #else
  730. static void icnss_send_wlan_boot_complete(void)
  731. {
  732. }
  733. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  734. {
  735. return 0;
  736. }
  737. #endif
  738. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  739. void *data)
  740. {
  741. int ret = 0;
  742. int temp = 0;
  743. bool ignore_assert = false;
  744. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  745. if (!priv)
  746. return -ENODEV;
  747. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  748. clear_bit(ICNSS_FW_DOWN, &priv->state);
  749. clear_bit(ICNSS_FW_READY, &priv->state);
  750. if (priv->is_slate_rfa) {
  751. ret = icnss_wait_for_slate_complete(priv);
  752. if (ret == -EINVAL) {
  753. icnss_pr_err("Slate complete failed\n");
  754. return ret;
  755. }
  756. }
  757. icnss_ignore_fw_timeout(false);
  758. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  759. icnss_pr_err("QMI Server already in Connected State\n");
  760. ICNSS_ASSERT(0);
  761. }
  762. ret = icnss_connect_to_fw_server(priv, data);
  763. if (ret)
  764. goto fail;
  765. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  766. ret = wlfw_ind_register_send_sync_msg(priv);
  767. if (ret < 0) {
  768. if (ret == -EALREADY) {
  769. ret = 0;
  770. goto qmi_registered;
  771. }
  772. ignore_assert = true;
  773. goto fail;
  774. }
  775. if (priv->is_rf_subtype_valid) {
  776. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  777. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  778. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  779. if (ret < 0)
  780. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  781. ret);
  782. } else {
  783. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  784. priv->rf_subtype);
  785. }
  786. }
  787. if (priv->device_id == WCN6750_DEVICE_ID ||
  788. priv->device_id == WCN6450_DEVICE_ID) {
  789. if (!icnss_get_temperature(priv, &temp)) {
  790. icnss_pr_dbg("Temperature: %d\n", temp);
  791. if (temp < WLAN_EN_TEMP_THRESHOLD)
  792. icnss_set_wlan_en_delay(priv);
  793. }
  794. ret = wlfw_host_cap_send_sync(priv);
  795. if (ret < 0)
  796. goto fail;
  797. }
  798. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  799. if (!priv->msa_va) {
  800. icnss_pr_err("Invalid MSA address\n");
  801. ret = -EINVAL;
  802. goto fail;
  803. }
  804. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  805. if (ret < 0) {
  806. ignore_assert = true;
  807. goto fail;
  808. }
  809. ret = wlfw_msa_ready_send_sync_msg(priv);
  810. if (ret < 0) {
  811. ignore_assert = true;
  812. goto fail;
  813. }
  814. }
  815. if (priv->device_id == WCN6450_DEVICE_ID)
  816. icnss_hw_power_off(priv);
  817. ret = wlfw_cap_send_sync_msg(priv);
  818. if (ret < 0) {
  819. ignore_assert = true;
  820. goto fail;
  821. }
  822. ret = icnss_hw_power_on(priv);
  823. if (ret)
  824. goto fail;
  825. if (priv->device_id == WCN6750_DEVICE_ID ||
  826. priv->device_id == WCN6450_DEVICE_ID) {
  827. ret = wlfw_device_info_send_msg(priv);
  828. if (ret < 0) {
  829. ignore_assert = true;
  830. goto device_info_failure;
  831. }
  832. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  833. priv->mem_base_pa,
  834. priv->mem_base_size);
  835. if (!priv->mem_base_va) {
  836. icnss_pr_err("Ioremap failed for bar address\n");
  837. goto device_info_failure;
  838. }
  839. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  840. &priv->mem_base_pa,
  841. priv->mem_base_va);
  842. if (priv->mhi_state_info_pa)
  843. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  844. priv->mhi_state_info_pa,
  845. PAGE_SIZE);
  846. if (!priv->mhi_state_info_va)
  847. icnss_pr_err("Ioremap failed for MHI info address\n");
  848. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  849. &priv->mhi_state_info_pa,
  850. priv->mhi_state_info_va);
  851. }
  852. if (priv->bdf_download_support) {
  853. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  854. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  855. priv->ctrl_params.bdf_type);
  856. if (ret < 0)
  857. goto device_info_failure;
  858. }
  859. if (priv->device_id == WCN6450_DEVICE_ID) {
  860. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  861. if (ret < 0)
  862. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  863. ret);
  864. }
  865. if (priv->device_id == WCN6750_DEVICE_ID ||
  866. priv->device_id == WCN6450_DEVICE_ID) {
  867. if (!priv->fw_soc_wake_ack_irq)
  868. register_soc_wake_notif(&priv->pdev->dev);
  869. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  870. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  871. }
  872. if (priv->wpss_supported)
  873. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  874. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  875. if (priv->bdf_download_support) {
  876. ret = wlfw_cal_report_req(priv);
  877. if (ret < 0)
  878. goto device_info_failure;
  879. }
  880. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  881. dynamic_feature_mask);
  882. }
  883. if (!priv->fw_error_fatal_irq)
  884. register_fw_error_notifications(&priv->pdev->dev);
  885. if (!priv->fw_early_crash_irq)
  886. register_early_crash_notifications(&priv->pdev->dev);
  887. if (priv->psf_supported)
  888. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  889. return ret;
  890. device_info_failure:
  891. icnss_hw_power_off(priv);
  892. fail:
  893. ICNSS_ASSERT(ignore_assert);
  894. qmi_registered:
  895. return ret;
  896. }
  897. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  898. {
  899. if (!priv)
  900. return -ENODEV;
  901. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  902. icnss_clear_server(priv);
  903. if (priv->psf_supported)
  904. priv->last_updated_voltage = 0;
  905. return 0;
  906. }
  907. static int icnss_call_driver_probe(struct icnss_priv *priv)
  908. {
  909. int ret = 0;
  910. int probe_cnt = 0;
  911. if (!priv->ops || !priv->ops->probe)
  912. return 0;
  913. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  914. return -EINVAL;
  915. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  916. icnss_hw_power_on(priv);
  917. icnss_block_shutdown(true);
  918. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  919. ret = priv->ops->probe(&priv->pdev->dev);
  920. probe_cnt++;
  921. if (ret != -EPROBE_DEFER)
  922. break;
  923. }
  924. if (ret < 0) {
  925. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  926. ret, priv->state, probe_cnt);
  927. icnss_block_shutdown(false);
  928. goto out;
  929. }
  930. icnss_block_shutdown(false);
  931. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  932. return 0;
  933. out:
  934. icnss_hw_power_off(priv);
  935. return ret;
  936. }
  937. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  938. {
  939. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  940. goto out;
  941. if (!priv->ops || !priv->ops->shutdown)
  942. goto out;
  943. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  944. goto out;
  945. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  946. priv->ops->shutdown(&priv->pdev->dev);
  947. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  948. out:
  949. return 0;
  950. }
  951. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  952. {
  953. int ret = 0;
  954. icnss_pm_relax(priv);
  955. icnss_call_driver_shutdown(priv);
  956. clear_bit(ICNSS_PDR, &priv->state);
  957. clear_bit(ICNSS_REJUVENATE, &priv->state);
  958. clear_bit(ICNSS_PD_RESTART, &priv->state);
  959. clear_bit(ICNSS_LOW_POWER, &priv->state);
  960. priv->early_crash_ind = false;
  961. priv->is_ssr = false;
  962. if (!priv->ops || !priv->ops->reinit)
  963. goto out;
  964. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  965. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  966. priv->state);
  967. goto out;
  968. }
  969. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  970. goto call_probe;
  971. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  972. icnss_hw_power_on(priv);
  973. icnss_block_shutdown(true);
  974. ret = priv->ops->reinit(&priv->pdev->dev);
  975. if (ret < 0) {
  976. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  977. ret, priv->state);
  978. if (!priv->allow_recursive_recovery)
  979. ICNSS_ASSERT(false);
  980. icnss_block_shutdown(false);
  981. goto out_power_off;
  982. }
  983. icnss_block_shutdown(false);
  984. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  985. return 0;
  986. call_probe:
  987. return icnss_call_driver_probe(priv);
  988. out_power_off:
  989. icnss_hw_power_off(priv);
  990. out:
  991. return ret;
  992. }
  993. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  994. {
  995. int ret = 0;
  996. if (!priv)
  997. return -ENODEV;
  998. del_timer(&priv->recovery_timer);
  999. set_bit(ICNSS_FW_READY, &priv->state);
  1000. clear_bit(ICNSS_MODE_ON, &priv->state);
  1001. atomic_set(&priv->soc_wake_ref_count, 0);
  1002. if (priv->device_id == WCN6750_DEVICE_ID ||
  1003. priv->device_id == WCN6450_DEVICE_ID)
  1004. icnss_free_qdss_mem(priv);
  1005. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1006. icnss_hw_power_off(priv);
  1007. if (!priv->pdev) {
  1008. icnss_pr_err("Device is not ready\n");
  1009. ret = -ENODEV;
  1010. goto out;
  1011. }
  1012. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1013. icnss_send_wlan_boot_complete();
  1014. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1015. ret = icnss_pd_restart_complete(priv);
  1016. } else {
  1017. if (priv->wpss_supported)
  1018. icnss_setup_dms_mac(priv);
  1019. ret = icnss_call_driver_probe(priv);
  1020. }
  1021. icnss_vreg_unvote(priv);
  1022. out:
  1023. return ret;
  1024. }
  1025. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1026. {
  1027. int ret = 0;
  1028. if (!priv)
  1029. return -ENODEV;
  1030. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1031. if (priv->device_id == WCN6750_DEVICE_ID) {
  1032. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1033. if (ret < 0)
  1034. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1035. ret);
  1036. }
  1037. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1038. mod_timer(&priv->recovery_timer,
  1039. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1040. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1041. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1042. } else {
  1043. icnss_driver_event_fw_ready_ind(priv, NULL);
  1044. }
  1045. return ret;
  1046. }
  1047. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1048. {
  1049. struct platform_device *pdev = priv->pdev;
  1050. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1051. int i, j;
  1052. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1053. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1054. qdss_mem[i].va =
  1055. dma_alloc_coherent(&pdev->dev,
  1056. qdss_mem[i].size,
  1057. &qdss_mem[i].pa,
  1058. GFP_KERNEL);
  1059. if (!qdss_mem[i].va) {
  1060. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1061. qdss_mem[i].size,
  1062. qdss_mem[i].type, i);
  1063. break;
  1064. }
  1065. }
  1066. }
  1067. /* Best-effort allocation for QDSS trace */
  1068. if (i < priv->qdss_mem_seg_len) {
  1069. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1070. qdss_mem[j].type = 0;
  1071. qdss_mem[j].size = 0;
  1072. }
  1073. priv->qdss_mem_seg_len = i;
  1074. }
  1075. return 0;
  1076. }
  1077. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1078. {
  1079. struct platform_device *pdev = priv->pdev;
  1080. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1081. int i;
  1082. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1083. if (qdss_mem[i].va && qdss_mem[i].size) {
  1084. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1085. &qdss_mem[i].pa, qdss_mem[i].size,
  1086. qdss_mem[i].type);
  1087. dma_free_coherent(&pdev->dev,
  1088. qdss_mem[i].size, qdss_mem[i].va,
  1089. qdss_mem[i].pa);
  1090. qdss_mem[i].va = NULL;
  1091. qdss_mem[i].pa = 0;
  1092. qdss_mem[i].size = 0;
  1093. qdss_mem[i].type = 0;
  1094. }
  1095. }
  1096. priv->qdss_mem_seg_len = 0;
  1097. }
  1098. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1099. {
  1100. int ret = 0;
  1101. ret = icnss_alloc_qdss_mem(priv);
  1102. if (ret < 0)
  1103. return ret;
  1104. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1105. }
  1106. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1107. u64 pa, u32 size, int *seg_id)
  1108. {
  1109. int i = 0;
  1110. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1111. u64 offset = 0;
  1112. void *va = NULL;
  1113. u64 local_pa;
  1114. u32 local_size;
  1115. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1116. local_pa = (u64)qdss_mem[i].pa;
  1117. local_size = (u32)qdss_mem[i].size;
  1118. if (pa == local_pa && size <= local_size) {
  1119. va = qdss_mem[i].va;
  1120. break;
  1121. }
  1122. if (pa > local_pa &&
  1123. pa < local_pa + local_size &&
  1124. pa + size <= local_pa + local_size) {
  1125. offset = pa - local_pa;
  1126. va = qdss_mem[i].va + offset;
  1127. break;
  1128. }
  1129. }
  1130. *seg_id = i;
  1131. return va;
  1132. }
  1133. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1134. void *data)
  1135. {
  1136. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1137. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1138. int ret = 0;
  1139. int i;
  1140. void *va = NULL;
  1141. u64 pa;
  1142. u32 size;
  1143. int seg_id = 0;
  1144. if (!priv->qdss_mem_seg_len) {
  1145. icnss_pr_err("Memory for QDSS trace is not available\n");
  1146. return -ENOMEM;
  1147. }
  1148. if (event_data->mem_seg_len == 0) {
  1149. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1150. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1151. ICNSS_GENL_MSG_TYPE_QDSS,
  1152. event_data->file_name,
  1153. qdss_mem[i].size);
  1154. if (ret < 0) {
  1155. icnss_pr_err("Fail to save QDSS data: %d\n",
  1156. ret);
  1157. break;
  1158. }
  1159. }
  1160. } else {
  1161. for (i = 0; i < event_data->mem_seg_len; i++) {
  1162. pa = event_data->mem_seg[i].addr;
  1163. size = event_data->mem_seg[i].size;
  1164. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1165. size, &seg_id);
  1166. if (!va) {
  1167. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1168. &pa);
  1169. ret = -EINVAL;
  1170. break;
  1171. }
  1172. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1173. event_data->file_name, size);
  1174. if (ret < 0) {
  1175. icnss_pr_err("Fail to save QDSS data: %d\n",
  1176. ret);
  1177. break;
  1178. }
  1179. }
  1180. }
  1181. kfree(data);
  1182. return ret;
  1183. }
  1184. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1185. {
  1186. int dec, c = atomic_read(v);
  1187. do {
  1188. dec = c - 1;
  1189. if (unlikely(dec < 1))
  1190. break;
  1191. } while (!atomic_try_cmpxchg(v, &c, dec));
  1192. return dec;
  1193. }
  1194. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1195. void *data)
  1196. {
  1197. int ret = 0;
  1198. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1199. if (!priv)
  1200. return -ENODEV;
  1201. if (!data)
  1202. return -EINVAL;
  1203. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1204. event_data->total_size);
  1205. kfree(data);
  1206. return ret;
  1207. }
  1208. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1209. {
  1210. int ret = 0;
  1211. if (!priv)
  1212. return -ENODEV;
  1213. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1214. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1215. atomic_read(&priv->soc_wake_ref_count));
  1216. return 0;
  1217. }
  1218. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1219. ICNSS_SMP2P_OUT_SOC_WAKE);
  1220. if (!ret)
  1221. atomic_inc(&priv->soc_wake_ref_count);
  1222. return ret;
  1223. }
  1224. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1225. {
  1226. int ret = 0;
  1227. if (!priv)
  1228. return -ENODEV;
  1229. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1230. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1231. priv->soc_wake_ref_count);
  1232. return 0;
  1233. }
  1234. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1235. ICNSS_SMP2P_OUT_SOC_WAKE);
  1236. return ret;
  1237. }
  1238. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1239. void *data)
  1240. {
  1241. int ret = 0;
  1242. int probe_cnt = 0;
  1243. if (priv->ops)
  1244. return -EEXIST;
  1245. priv->ops = data;
  1246. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1247. set_bit(ICNSS_FW_READY, &priv->state);
  1248. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1249. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1250. priv->state);
  1251. return -ENODEV;
  1252. }
  1253. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1254. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1255. priv->state);
  1256. goto out;
  1257. }
  1258. ret = icnss_hw_power_on(priv);
  1259. if (ret)
  1260. goto out;
  1261. icnss_block_shutdown(true);
  1262. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1263. ret = priv->ops->probe(&priv->pdev->dev);
  1264. probe_cnt++;
  1265. if (ret != -EPROBE_DEFER)
  1266. break;
  1267. }
  1268. if (ret) {
  1269. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1270. ret, priv->state, probe_cnt);
  1271. icnss_block_shutdown(false);
  1272. goto power_off;
  1273. }
  1274. icnss_block_shutdown(false);
  1275. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1276. return 0;
  1277. power_off:
  1278. icnss_hw_power_off(priv);
  1279. out:
  1280. return ret;
  1281. }
  1282. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1283. void *data)
  1284. {
  1285. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1286. priv->ops = NULL;
  1287. goto out;
  1288. }
  1289. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1290. icnss_block_shutdown(true);
  1291. if (priv->ops)
  1292. priv->ops->remove(&priv->pdev->dev);
  1293. icnss_block_shutdown(false);
  1294. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1295. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1296. priv->ops = NULL;
  1297. icnss_hw_power_off(priv);
  1298. out:
  1299. return 0;
  1300. }
  1301. static int icnss_fw_crashed(struct icnss_priv *priv,
  1302. struct icnss_event_pd_service_down_data *event_data)
  1303. {
  1304. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1305. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1306. set_bit(ICNSS_PD_RESTART, &priv->state);
  1307. icnss_pm_stay_awake(priv);
  1308. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1309. test_bit(ICNSS_FW_READY, &priv->state)) {
  1310. clear_bit(ICNSS_FW_READY, &priv->state);
  1311. fw_down_data.crashed = true;
  1312. icnss_call_driver_uevent(priv,
  1313. ICNSS_UEVENT_FW_DOWN,
  1314. &fw_down_data);
  1315. }
  1316. if (event_data && event_data->fw_rejuvenate)
  1317. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1318. return 0;
  1319. }
  1320. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1321. struct icnss_uevent_hang_data *hang_data)
  1322. {
  1323. if (!priv->hang_event_data_va)
  1324. return -EINVAL;
  1325. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1326. priv->hang_event_data_len,
  1327. GFP_ATOMIC);
  1328. if (!priv->hang_event_data)
  1329. return -ENOMEM;
  1330. // Update the hang event params
  1331. hang_data->hang_event_data = priv->hang_event_data;
  1332. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1333. return 0;
  1334. }
  1335. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1336. {
  1337. struct icnss_uevent_hang_data hang_data = {0};
  1338. int ret = 0xFF;
  1339. if (priv->early_crash_ind) {
  1340. ret = icnss_update_hang_event_data(priv, &hang_data);
  1341. if (ret)
  1342. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1343. }
  1344. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1345. &hang_data);
  1346. if (!ret) {
  1347. kfree(priv->hang_event_data);
  1348. priv->hang_event_data = NULL;
  1349. }
  1350. return 0;
  1351. }
  1352. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1353. void *data)
  1354. {
  1355. struct icnss_event_pd_service_down_data *event_data = data;
  1356. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1357. icnss_ignore_fw_timeout(false);
  1358. goto out;
  1359. }
  1360. if (priv->force_err_fatal)
  1361. ICNSS_ASSERT(0);
  1362. if (priv->device_id == WCN6750_DEVICE_ID ||
  1363. priv->device_id == WCN6450_DEVICE_ID) {
  1364. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1365. ICNSS_SMP2P_OUT_SOC_WAKE);
  1366. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1367. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1368. }
  1369. if (priv->wpss_supported)
  1370. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1371. ICNSS_SMP2P_OUT_POWER_SAVE);
  1372. icnss_send_hang_event_data(priv);
  1373. if (priv->early_crash_ind) {
  1374. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1375. event_data->crashed, priv->state);
  1376. goto out;
  1377. }
  1378. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1379. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1380. event_data->crashed, priv->state);
  1381. if (!priv->allow_recursive_recovery)
  1382. ICNSS_ASSERT(0);
  1383. goto out;
  1384. }
  1385. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1386. icnss_fw_crashed(priv, event_data);
  1387. out:
  1388. kfree(data);
  1389. return 0;
  1390. }
  1391. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1392. void *data)
  1393. {
  1394. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1395. icnss_ignore_fw_timeout(false);
  1396. goto out;
  1397. }
  1398. priv->early_crash_ind = true;
  1399. icnss_fw_crashed(priv, NULL);
  1400. out:
  1401. kfree(data);
  1402. return 0;
  1403. }
  1404. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1405. void *data)
  1406. {
  1407. int ret = 0;
  1408. if (!priv->ops || !priv->ops->idle_shutdown)
  1409. return 0;
  1410. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1411. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1412. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1413. ret = -EBUSY;
  1414. } else {
  1415. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1416. priv->state);
  1417. icnss_block_shutdown(true);
  1418. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1419. icnss_block_shutdown(false);
  1420. }
  1421. return ret;
  1422. }
  1423. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1424. void *data)
  1425. {
  1426. int ret = 0;
  1427. if (!priv->ops || !priv->ops->idle_restart)
  1428. return 0;
  1429. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1430. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1431. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1432. ret = -EBUSY;
  1433. } else {
  1434. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1435. priv->state);
  1436. icnss_block_shutdown(true);
  1437. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1438. icnss_block_shutdown(false);
  1439. }
  1440. return ret;
  1441. }
  1442. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1443. {
  1444. icnss_free_qdss_mem(priv);
  1445. return 0;
  1446. }
  1447. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1448. void *data)
  1449. {
  1450. struct icnss_m3_upload_segments_req_data *event_data = data;
  1451. struct qcom_dump_segment segment;
  1452. int i, status = 0, ret = 0;
  1453. struct list_head head;
  1454. if (!dump_enabled()) {
  1455. icnss_pr_info("Dump collection is not enabled\n");
  1456. return ret;
  1457. }
  1458. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1459. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1460. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1461. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1462. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1463. return ret;
  1464. INIT_LIST_HEAD(&head);
  1465. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1466. memset(&segment, 0, sizeof(segment));
  1467. segment.va = devm_ioremap(&priv->pdev->dev,
  1468. event_data->m3_segment[i].addr,
  1469. event_data->m3_segment[i].size);
  1470. if (!segment.va) {
  1471. icnss_pr_err("Failed to ioremap M3 Dump region");
  1472. ret = -ENOMEM;
  1473. goto send_resp;
  1474. }
  1475. segment.size = event_data->m3_segment[i].size;
  1476. list_add(&segment.node, &head);
  1477. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1478. event_data->m3_segment[i].name);
  1479. switch (event_data->m3_segment[i].type) {
  1480. case QMI_M3_SEGMENT_PHYAREG_V01:
  1481. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1482. break;
  1483. case QMI_M3_SEGMENT_PHYDBG_V01:
  1484. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1485. break;
  1486. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1487. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1488. break;
  1489. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1490. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1491. break;
  1492. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1493. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1494. break;
  1495. default:
  1496. icnss_pr_err("Invalid Segment type: %d",
  1497. event_data->m3_segment[i].type);
  1498. }
  1499. if (ret) {
  1500. status = ret;
  1501. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1502. event_data->m3_segment[i].name, ret);
  1503. }
  1504. list_del(&segment.node);
  1505. }
  1506. send_resp:
  1507. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1508. status);
  1509. return ret;
  1510. }
  1511. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1512. {
  1513. int ret = 0;
  1514. struct icnss_subsys_restart_level_data *event_data = data;
  1515. if (!priv)
  1516. return -ENODEV;
  1517. if (!data)
  1518. return -EINVAL;
  1519. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1520. kfree(data);
  1521. return ret;
  1522. }
  1523. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1524. {
  1525. int ret;
  1526. struct icnss_priv *priv = icnss_get_plat_priv();
  1527. rproc_shutdown(priv->rproc);
  1528. ret = rproc_boot(priv->rproc);
  1529. if (ret) {
  1530. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1531. rproc_put(priv->rproc);
  1532. }
  1533. }
  1534. static void icnss_driver_event_work(struct work_struct *work)
  1535. {
  1536. struct icnss_priv *priv =
  1537. container_of(work, struct icnss_priv, event_work);
  1538. struct icnss_driver_event *event;
  1539. unsigned long flags;
  1540. int ret;
  1541. icnss_pm_stay_awake(priv);
  1542. spin_lock_irqsave(&priv->event_lock, flags);
  1543. while (!list_empty(&priv->event_list)) {
  1544. event = list_first_entry(&priv->event_list,
  1545. struct icnss_driver_event, list);
  1546. list_del(&event->list);
  1547. spin_unlock_irqrestore(&priv->event_lock, flags);
  1548. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1549. icnss_driver_event_to_str(event->type),
  1550. event->sync ? "-sync" : "", event->type,
  1551. priv->state);
  1552. switch (event->type) {
  1553. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1554. ret = icnss_driver_event_server_arrive(priv,
  1555. event->data);
  1556. break;
  1557. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1558. ret = icnss_driver_event_server_exit(priv);
  1559. break;
  1560. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1561. ret = icnss_driver_event_fw_ready_ind(priv,
  1562. event->data);
  1563. break;
  1564. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1565. ret = icnss_driver_event_register_driver(priv,
  1566. event->data);
  1567. break;
  1568. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1569. ret = icnss_driver_event_unregister_driver(priv,
  1570. event->data);
  1571. break;
  1572. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1573. ret = icnss_driver_event_pd_service_down(priv,
  1574. event->data);
  1575. break;
  1576. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1577. ret = icnss_driver_event_early_crash_ind(priv,
  1578. event->data);
  1579. break;
  1580. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1581. ret = icnss_driver_event_idle_shutdown(priv,
  1582. event->data);
  1583. break;
  1584. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1585. ret = icnss_driver_event_idle_restart(priv,
  1586. event->data);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1589. ret = icnss_driver_event_fw_init_done(priv,
  1590. event->data);
  1591. break;
  1592. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1593. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1594. break;
  1595. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1596. ret = icnss_qdss_trace_save_hdlr(priv,
  1597. event->data);
  1598. break;
  1599. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1600. ret = icnss_qdss_trace_free_hdlr(priv);
  1601. break;
  1602. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1603. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1604. break;
  1605. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1606. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1607. event->data);
  1608. break;
  1609. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1610. ret = icnss_subsys_restart_level(priv, event->data);
  1611. break;
  1612. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1613. ret = icnss_process_wfc_call_ind_event(priv,
  1614. event->data);
  1615. break;
  1616. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1617. ret = icnss_process_twt_cfg_ind_event(priv,
  1618. event->data);
  1619. break;
  1620. default:
  1621. icnss_pr_err("Invalid Event type: %d", event->type);
  1622. kfree(event);
  1623. continue;
  1624. }
  1625. priv->stats.events[event->type].processed++;
  1626. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1627. icnss_driver_event_to_str(event->type),
  1628. event->sync ? "-sync" : "", event->type, ret,
  1629. priv->state);
  1630. spin_lock_irqsave(&priv->event_lock, flags);
  1631. if (event->sync) {
  1632. event->ret = ret;
  1633. complete(&event->complete);
  1634. continue;
  1635. }
  1636. spin_unlock_irqrestore(&priv->event_lock, flags);
  1637. kfree(event);
  1638. spin_lock_irqsave(&priv->event_lock, flags);
  1639. }
  1640. spin_unlock_irqrestore(&priv->event_lock, flags);
  1641. icnss_pm_relax(priv);
  1642. }
  1643. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1644. {
  1645. struct icnss_priv *priv =
  1646. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1647. struct icnss_soc_wake_event *event;
  1648. unsigned long flags;
  1649. int ret;
  1650. icnss_pm_stay_awake(priv);
  1651. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1652. while (!list_empty(&priv->soc_wake_msg_list)) {
  1653. event = list_first_entry(&priv->soc_wake_msg_list,
  1654. struct icnss_soc_wake_event, list);
  1655. list_del(&event->list);
  1656. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1657. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1658. icnss_soc_wake_event_to_str(event->type),
  1659. event->sync ? "-sync" : "", event->type,
  1660. priv->state);
  1661. switch (event->type) {
  1662. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1663. ret = icnss_event_soc_wake_request(priv,
  1664. event->data);
  1665. break;
  1666. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1667. ret = icnss_event_soc_wake_release(priv,
  1668. event->data);
  1669. break;
  1670. default:
  1671. icnss_pr_err("Invalid Event type: %d", event->type);
  1672. kfree(event);
  1673. continue;
  1674. }
  1675. priv->stats.soc_wake_events[event->type].processed++;
  1676. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1677. icnss_soc_wake_event_to_str(event->type),
  1678. event->sync ? "-sync" : "", event->type, ret,
  1679. priv->state);
  1680. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1681. if (event->sync) {
  1682. event->ret = ret;
  1683. complete(&event->complete);
  1684. continue;
  1685. }
  1686. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1687. kfree(event);
  1688. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1689. }
  1690. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1691. icnss_pm_relax(priv);
  1692. }
  1693. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1694. {
  1695. int ret = 0;
  1696. struct qcom_dump_segment segment;
  1697. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1698. struct list_head head;
  1699. if (!dump_enabled()) {
  1700. icnss_pr_info("Dump collection is not enabled\n");
  1701. return ret;
  1702. }
  1703. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1704. return ret;
  1705. INIT_LIST_HEAD(&head);
  1706. memset(&segment, 0, sizeof(segment));
  1707. segment.va = priv->msa_va;
  1708. segment.size = priv->msa_mem_size;
  1709. list_add(&segment.node, &head);
  1710. if (!msa0_dump_dev->dev) {
  1711. icnss_pr_err("Created Dump Device not found\n");
  1712. return 0;
  1713. }
  1714. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1715. if (ret) {
  1716. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1717. return ret;
  1718. }
  1719. list_del(&segment.node);
  1720. return ret;
  1721. }
  1722. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1723. void *data)
  1724. {
  1725. struct qcom_ssr_notify_data *notif = data;
  1726. int ret = 0;
  1727. if (!notif->crashed) {
  1728. if (atomic_read(&priv->is_shutdown)) {
  1729. atomic_set(&priv->is_shutdown, false);
  1730. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1731. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1732. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1733. clear_bit(ICNSS_FW_READY, &priv->state);
  1734. icnss_driver_event_post(priv,
  1735. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1736. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1737. NULL);
  1738. }
  1739. }
  1740. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1741. if (!wait_for_completion_timeout(
  1742. &priv->unblock_shutdown,
  1743. msecs_to_jiffies(PROBE_TIMEOUT)))
  1744. icnss_pr_err("modem block shutdown timeout\n");
  1745. }
  1746. ret = wlfw_send_modem_shutdown_msg(priv);
  1747. if (ret < 0)
  1748. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1749. ret);
  1750. }
  1751. }
  1752. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1753. {
  1754. switch (code) {
  1755. case QCOM_SSR_BEFORE_POWERUP:
  1756. return "BEFORE_POWERUP";
  1757. case QCOM_SSR_AFTER_POWERUP:
  1758. return "AFTER_POWERUP";
  1759. case QCOM_SSR_BEFORE_SHUTDOWN:
  1760. return "BEFORE_SHUTDOWN";
  1761. case QCOM_SSR_AFTER_SHUTDOWN:
  1762. return "AFTER_SHUTDOWN";
  1763. default:
  1764. return "UNKNOWN";
  1765. }
  1766. };
  1767. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1768. unsigned long code,
  1769. void *data)
  1770. {
  1771. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1772. wpss_early_ssr_nb);
  1773. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1774. icnss_qcom_ssr_notify_state_to_str(code), code);
  1775. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1776. set_bit(ICNSS_FW_DOWN, &priv->state);
  1777. icnss_ignore_fw_timeout(true);
  1778. }
  1779. return NOTIFY_DONE;
  1780. }
  1781. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1782. unsigned long code,
  1783. void *data)
  1784. {
  1785. struct icnss_event_pd_service_down_data *event_data;
  1786. struct qcom_ssr_notify_data *notif = data;
  1787. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1788. wpss_ssr_nb);
  1789. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1790. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1791. icnss_qcom_ssr_notify_state_to_str(code), code);
  1792. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1793. icnss_pr_info("Collecting msa0 segment dump\n");
  1794. icnss_msa0_ramdump(priv);
  1795. goto out;
  1796. }
  1797. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1798. goto out;
  1799. if (priv->wpss_self_recovery_enabled)
  1800. del_timer(&priv->wpss_ssr_timer);
  1801. priv->is_ssr = true;
  1802. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1803. priv->state, notif->crashed);
  1804. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1805. icnss_update_state_send_modem_shutdown(priv, data);
  1806. set_bit(ICNSS_FW_DOWN, &priv->state);
  1807. icnss_ignore_fw_timeout(true);
  1808. if (notif->crashed)
  1809. priv->stats.recovery.root_pd_crash++;
  1810. else
  1811. priv->stats.recovery.root_pd_shutdown++;
  1812. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1813. if (event_data == NULL)
  1814. return notifier_from_errno(-ENOMEM);
  1815. event_data->crashed = notif->crashed;
  1816. fw_down_data.crashed = !!notif->crashed;
  1817. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1818. clear_bit(ICNSS_FW_READY, &priv->state);
  1819. fw_down_data.crashed = !!notif->crashed;
  1820. icnss_call_driver_uevent(priv,
  1821. ICNSS_UEVENT_FW_DOWN,
  1822. &fw_down_data);
  1823. }
  1824. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1825. ICNSS_EVENT_SYNC, event_data);
  1826. if (notif->crashed)
  1827. mod_timer(&priv->recovery_timer,
  1828. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1829. out:
  1830. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1831. return NOTIFY_OK;
  1832. }
  1833. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1834. unsigned long code,
  1835. void *data)
  1836. {
  1837. struct icnss_event_pd_service_down_data *event_data;
  1838. struct qcom_ssr_notify_data *notif = data;
  1839. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1840. modem_ssr_nb);
  1841. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1842. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1843. icnss_qcom_ssr_notify_state_to_str(code), code);
  1844. switch (code) {
  1845. case QCOM_SSR_BEFORE_SHUTDOWN:
  1846. if (priv->is_slate_rfa)
  1847. complete(&priv->slate_boot_complete);
  1848. if (!notif->crashed &&
  1849. priv->low_power_support) { /* Hibernate */
  1850. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1851. icnss_driver_event_post(
  1852. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1853. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1854. set_bit(ICNSS_LOW_POWER, &priv->state);
  1855. }
  1856. break;
  1857. case QCOM_SSR_AFTER_SHUTDOWN:
  1858. /* Collect ramdump only when there was a crash. */
  1859. if (notif->crashed) {
  1860. icnss_pr_info("Collecting msa0 segment dump\n");
  1861. icnss_msa0_ramdump(priv);
  1862. }
  1863. goto out;
  1864. default:
  1865. goto out;
  1866. }
  1867. priv->is_ssr = true;
  1868. if (notif->crashed) {
  1869. priv->stats.recovery.root_pd_crash++;
  1870. priv->root_pd_shutdown = false;
  1871. } else {
  1872. priv->stats.recovery.root_pd_shutdown++;
  1873. priv->root_pd_shutdown = true;
  1874. }
  1875. icnss_update_state_send_modem_shutdown(priv, data);
  1876. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1877. set_bit(ICNSS_FW_DOWN, &priv->state);
  1878. icnss_ignore_fw_timeout(true);
  1879. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1880. clear_bit(ICNSS_FW_READY, &priv->state);
  1881. fw_down_data.crashed = !!notif->crashed;
  1882. icnss_call_driver_uevent(priv,
  1883. ICNSS_UEVENT_FW_DOWN,
  1884. &fw_down_data);
  1885. }
  1886. goto out;
  1887. }
  1888. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1889. priv->state, notif->crashed);
  1890. set_bit(ICNSS_FW_DOWN, &priv->state);
  1891. icnss_ignore_fw_timeout(true);
  1892. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1893. if (event_data == NULL)
  1894. return notifier_from_errno(-ENOMEM);
  1895. event_data->crashed = notif->crashed;
  1896. fw_down_data.crashed = !!notif->crashed;
  1897. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1898. clear_bit(ICNSS_FW_READY, &priv->state);
  1899. fw_down_data.crashed = !!notif->crashed;
  1900. icnss_call_driver_uevent(priv,
  1901. ICNSS_UEVENT_FW_DOWN,
  1902. &fw_down_data);
  1903. }
  1904. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1905. ICNSS_EVENT_SYNC, event_data);
  1906. if (notif->crashed)
  1907. mod_timer(&priv->recovery_timer,
  1908. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1909. out:
  1910. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1911. return NOTIFY_OK;
  1912. }
  1913. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1914. {
  1915. int ret = 0;
  1916. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1917. priv->wpss_early_notify_handler =
  1918. qcom_register_early_ssr_notifier("wpss",
  1919. &priv->wpss_early_ssr_nb);
  1920. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1921. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1922. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1923. }
  1924. return ret;
  1925. }
  1926. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1927. {
  1928. int ret = 0;
  1929. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1930. /*
  1931. * Assign priority of icnss wpss notifier callback over IPA
  1932. * modem notifier callback which is 0
  1933. */
  1934. priv->wpss_ssr_nb.priority = 1;
  1935. priv->wpss_notify_handler =
  1936. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1937. if (IS_ERR(priv->wpss_notify_handler)) {
  1938. ret = PTR_ERR(priv->wpss_notify_handler);
  1939. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1940. }
  1941. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1942. return ret;
  1943. }
  1944. #ifdef SLATE_MODULE_ENABLED
  1945. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1946. unsigned long event, void *data)
  1947. {
  1948. icnss_pr_info("Received slate event 0x%x\n", event);
  1949. if (event == SLATE_STATUS) {
  1950. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1951. seb_nb);
  1952. enum boot_status status = *(enum boot_status *)data;
  1953. if (status == SLATE_READY) {
  1954. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1955. priv->state);
  1956. set_bit(ICNSS_SLATE_READY, &priv->state);
  1957. set_bit(ICNSS_SLATE_UP, &priv->state);
  1958. complete(&priv->slate_boot_complete);
  1959. }
  1960. }
  1961. return NOTIFY_OK;
  1962. }
  1963. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1964. {
  1965. int ret = 0;
  1966. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1967. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1968. &priv->seb_nb);
  1969. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1970. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1971. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1972. ret);
  1973. }
  1974. return ret;
  1975. }
  1976. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1977. {
  1978. int ret = 0;
  1979. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1980. if (ret < 0)
  1981. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1982. return ret;
  1983. }
  1984. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1985. unsigned long code,
  1986. void *data)
  1987. {
  1988. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1989. slate_ssr_nb);
  1990. int ret = 0;
  1991. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1992. if (code == QCOM_SSR_AFTER_POWERUP &&
  1993. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1994. set_bit(ICNSS_SLATE_UP, &priv->state);
  1995. complete(&priv->slate_boot_complete);
  1996. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1997. priv->state);
  1998. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1999. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2000. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2001. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2002. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2003. priv->state);
  2004. goto skip_pdr;
  2005. }
  2006. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2007. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2008. if (ret < 0) {
  2009. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2010. ret, priv->state);
  2011. goto skip_pdr;
  2012. }
  2013. }
  2014. skip_pdr:
  2015. return NOTIFY_OK;
  2016. }
  2017. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2018. {
  2019. int ret = 0;
  2020. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2021. priv->slate_notify_handler =
  2022. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2023. if (IS_ERR(priv->slate_notify_handler)) {
  2024. ret = PTR_ERR(priv->slate_notify_handler);
  2025. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2026. }
  2027. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2028. return ret;
  2029. }
  2030. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2031. {
  2032. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2033. return 0;
  2034. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2035. &priv->slate_ssr_nb);
  2036. priv->slate_notify_handler = NULL;
  2037. return 0;
  2038. }
  2039. #else
  2040. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2041. {
  2042. return 0;
  2043. }
  2044. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2045. {
  2046. return 0;
  2047. }
  2048. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2049. {
  2050. return 0;
  2051. }
  2052. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2053. {
  2054. return 0;
  2055. }
  2056. #endif
  2057. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2058. {
  2059. int ret = 0;
  2060. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2061. /*
  2062. * Assign priority of icnss modem notifier callback over IPA
  2063. * modem notifier callback which is 0
  2064. */
  2065. priv->modem_ssr_nb.priority = 1;
  2066. priv->modem_notify_handler =
  2067. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2068. if (IS_ERR(priv->modem_notify_handler)) {
  2069. ret = PTR_ERR(priv->modem_notify_handler);
  2070. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2071. }
  2072. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2073. return ret;
  2074. }
  2075. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2076. {
  2077. if (IS_ERR(priv->wpss_early_notify_handler))
  2078. return;
  2079. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2080. &priv->wpss_early_ssr_nb);
  2081. priv->wpss_early_notify_handler = NULL;
  2082. }
  2083. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2084. {
  2085. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2086. return 0;
  2087. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2088. &priv->wpss_ssr_nb);
  2089. priv->wpss_notify_handler = NULL;
  2090. return 0;
  2091. }
  2092. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2093. {
  2094. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2095. return 0;
  2096. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2097. &priv->modem_ssr_nb);
  2098. priv->modem_notify_handler = NULL;
  2099. return 0;
  2100. }
  2101. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2102. {
  2103. struct icnss_priv *priv = priv_cb;
  2104. struct icnss_event_pd_service_down_data *event_data;
  2105. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2106. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2107. if (!priv)
  2108. return;
  2109. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2110. state, priv->state);
  2111. switch (state) {
  2112. case SERVREG_SERVICE_STATE_DOWN:
  2113. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2114. if (!event_data)
  2115. return;
  2116. event_data->crashed = true;
  2117. if (!priv->is_ssr) {
  2118. set_bit(ICNSS_PDR, &penv->state);
  2119. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2120. cause = ICNSS_HOST_ERROR;
  2121. priv->stats.recovery.pdr_host_error++;
  2122. } else {
  2123. cause = ICNSS_FW_CRASH;
  2124. priv->stats.recovery.pdr_fw_crash++;
  2125. }
  2126. } else if (priv->root_pd_shutdown) {
  2127. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2128. event_data->crashed = false;
  2129. }
  2130. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2131. priv->state, icnss_pdr_cause[cause]);
  2132. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2133. set_bit(ICNSS_FW_DOWN, &priv->state);
  2134. icnss_ignore_fw_timeout(true);
  2135. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2136. clear_bit(ICNSS_FW_READY, &priv->state);
  2137. fw_down_data.crashed = event_data->crashed;
  2138. icnss_call_driver_uevent(priv,
  2139. ICNSS_UEVENT_FW_DOWN,
  2140. &fw_down_data);
  2141. }
  2142. }
  2143. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2144. if (event_data->crashed)
  2145. mod_timer(&priv->recovery_timer,
  2146. jiffies +
  2147. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2148. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2149. ICNSS_EVENT_SYNC, event_data);
  2150. break;
  2151. case SERVREG_SERVICE_STATE_UP:
  2152. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2153. break;
  2154. default:
  2155. break;
  2156. }
  2157. return;
  2158. }
  2159. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2160. {
  2161. struct pdr_handle *handle = NULL;
  2162. struct pdr_service *service = NULL;
  2163. int err = 0;
  2164. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2165. if (IS_ERR_OR_NULL(handle)) {
  2166. err = PTR_ERR(handle);
  2167. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2168. goto out;
  2169. }
  2170. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2171. if (IS_ERR_OR_NULL(service)) {
  2172. err = PTR_ERR(service);
  2173. icnss_pr_err("Failed to add lookup, err %d", err);
  2174. goto out;
  2175. }
  2176. priv->pdr_handle = handle;
  2177. priv->pdr_service = service;
  2178. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2179. icnss_pr_info("PDR registration happened");
  2180. out:
  2181. return err;
  2182. }
  2183. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2184. {
  2185. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2186. return;
  2187. pdr_handle_release(priv->pdr_handle);
  2188. }
  2189. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2190. {
  2191. int ret = 0;
  2192. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2193. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2194. #else
  2195. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2196. #endif
  2197. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2198. ret = PTR_ERR(priv->icnss_ramdump_class);
  2199. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2200. return ret;
  2201. }
  2202. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2203. ICNSS_RAMDUMP_NAME);
  2204. if (ret < 0) {
  2205. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2206. goto fail_alloc_major;
  2207. }
  2208. return 0;
  2209. fail_alloc_major:
  2210. class_destroy(priv->icnss_ramdump_class);
  2211. return ret;
  2212. }
  2213. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2214. {
  2215. int ret = 0;
  2216. struct icnss_ramdump_info *ramdump_info;
  2217. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2218. if (!ramdump_info)
  2219. return ERR_PTR(-ENOMEM);
  2220. if (!dev_name) {
  2221. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2222. return NULL;
  2223. }
  2224. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2225. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2226. if (ramdump_info->minor < 0) {
  2227. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2228. ramdump_info->minor);
  2229. ret = -ENODEV;
  2230. goto fail_out_of_minors;
  2231. }
  2232. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2233. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2234. ramdump_info->minor),
  2235. ramdump_info, ramdump_info->name);
  2236. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2237. ret = PTR_ERR(ramdump_info->dev);
  2238. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2239. ramdump_info->name, ret);
  2240. goto fail_device_create;
  2241. }
  2242. return (void *)ramdump_info;
  2243. fail_device_create:
  2244. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2245. fail_out_of_minors:
  2246. kfree(ramdump_info);
  2247. return ERR_PTR(ret);
  2248. }
  2249. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2250. {
  2251. int ret = 0;
  2252. if (!priv || !priv->pdev) {
  2253. icnss_pr_err("Platform priv or pdev is NULL\n");
  2254. return -EINVAL;
  2255. }
  2256. ret = icnss_ramdump_devnode_init(priv);
  2257. if (ret)
  2258. return ret;
  2259. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2260. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2261. icnss_pr_err("Failed to create msa0 dump device!");
  2262. return -ENOMEM;
  2263. }
  2264. if (priv->device_id == WCN6750_DEVICE_ID ||
  2265. priv->device_id == WCN6450_DEVICE_ID) {
  2266. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2267. ICNSS_M3_SEGMENT(
  2268. ICNSS_M3_SEGMENT_PHYAREG));
  2269. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2270. !priv->m3_dump_phyareg->dev) {
  2271. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2272. return -ENOMEM;
  2273. }
  2274. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2275. ICNSS_M3_SEGMENT(
  2276. ICNSS_M3_SEGMENT_PHYA));
  2277. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2278. !priv->m3_dump_phydbg->dev) {
  2279. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2280. return -ENOMEM;
  2281. }
  2282. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2283. ICNSS_M3_SEGMENT(
  2284. ICNSS_M3_SEGMENT_WMACREG));
  2285. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2286. !priv->m3_dump_wmac0reg->dev) {
  2287. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2288. return -ENOMEM;
  2289. }
  2290. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2291. ICNSS_M3_SEGMENT(
  2292. ICNSS_M3_SEGMENT_WCSSDBG));
  2293. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2294. !priv->m3_dump_wcssdbg->dev) {
  2295. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2296. return -ENOMEM;
  2297. }
  2298. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2299. ICNSS_M3_SEGMENT(
  2300. ICNSS_M3_SEGMENT_PHYAM3));
  2301. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2302. !priv->m3_dump_phyapdmem->dev) {
  2303. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2304. return -ENOMEM;
  2305. }
  2306. }
  2307. return 0;
  2308. }
  2309. static int icnss_enable_recovery(struct icnss_priv *priv)
  2310. {
  2311. int ret;
  2312. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2313. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2314. return 0;
  2315. }
  2316. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2317. icnss_pr_dbg("SSR disabled through module parameter\n");
  2318. goto enable_pdr;
  2319. }
  2320. ret = icnss_register_ramdump_devices(priv);
  2321. if (ret)
  2322. return ret;
  2323. if (priv->wpss_supported) {
  2324. icnss_wpss_early_ssr_register_notifier(priv);
  2325. icnss_wpss_ssr_register_notifier(priv);
  2326. return 0;
  2327. }
  2328. if (!(priv->rproc_fw_download))
  2329. icnss_modem_ssr_register_notifier(priv);
  2330. if (priv->is_slate_rfa) {
  2331. icnss_slate_ssr_register_notifier(priv);
  2332. icnss_register_slate_event_notifier(priv);
  2333. }
  2334. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2335. icnss_pr_dbg("PDR disabled through module parameter\n");
  2336. return 0;
  2337. }
  2338. enable_pdr:
  2339. ret = icnss_pd_restart_enable(priv);
  2340. if (ret)
  2341. return ret;
  2342. return 0;
  2343. }
  2344. static int icnss_dev_id_match(struct icnss_priv *priv,
  2345. struct device_info *dev_info)
  2346. {
  2347. while (dev_info->device_id) {
  2348. if (priv->device_id == dev_info->device_id)
  2349. return 1;
  2350. dev_info++;
  2351. }
  2352. return 0;
  2353. }
  2354. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2355. unsigned long *thermal_state)
  2356. {
  2357. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2358. *thermal_state = icnss_tcdev->max_thermal_state;
  2359. return 0;
  2360. }
  2361. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2362. unsigned long *thermal_state)
  2363. {
  2364. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2365. *thermal_state = icnss_tcdev->curr_thermal_state;
  2366. return 0;
  2367. }
  2368. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2369. unsigned long thermal_state)
  2370. {
  2371. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2372. struct device *dev = &penv->pdev->dev;
  2373. int ret = 0;
  2374. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2375. return 0;
  2376. if (thermal_state > icnss_tcdev->max_thermal_state)
  2377. return -EINVAL;
  2378. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2379. thermal_state, icnss_tcdev->tcdev_id);
  2380. mutex_lock(&penv->tcdev_lock);
  2381. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2382. icnss_tcdev->tcdev_id);
  2383. if (!ret)
  2384. icnss_tcdev->curr_thermal_state = thermal_state;
  2385. mutex_unlock(&penv->tcdev_lock);
  2386. if (ret) {
  2387. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2388. ret, icnss_tcdev->tcdev_id);
  2389. return ret;
  2390. }
  2391. return 0;
  2392. }
  2393. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2394. .get_max_state = icnss_tcdev_get_max_state,
  2395. .get_cur_state = icnss_tcdev_get_cur_state,
  2396. .set_cur_state = icnss_tcdev_set_cur_state,
  2397. };
  2398. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2399. int tcdev_id)
  2400. {
  2401. struct icnss_priv *priv = dev_get_drvdata(dev);
  2402. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2403. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2404. struct device_node *dev_node;
  2405. int ret = 0;
  2406. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2407. if (!icnss_tcdev)
  2408. return -ENOMEM;
  2409. icnss_tcdev->tcdev_id = tcdev_id;
  2410. icnss_tcdev->max_thermal_state = max_state;
  2411. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2412. "qcom,icnss_cdev%d", tcdev_id);
  2413. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2414. if (!dev_node) {
  2415. icnss_pr_err("Failed to get cooling device node\n");
  2416. return -EINVAL;
  2417. }
  2418. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2419. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2420. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2421. dev_node,
  2422. cdev_node_name, icnss_tcdev,
  2423. &icnss_cooling_ops);
  2424. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2425. ret = PTR_ERR(icnss_tcdev->tcdev);
  2426. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2427. ret, icnss_tcdev->tcdev_id);
  2428. } else {
  2429. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2430. icnss_tcdev->tcdev_id);
  2431. list_add(&icnss_tcdev->tcdev_list,
  2432. &priv->icnss_tcdev_list);
  2433. }
  2434. } else {
  2435. icnss_pr_dbg("Cooling device registration not supported");
  2436. ret = -EOPNOTSUPP;
  2437. }
  2438. return ret;
  2439. }
  2440. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2441. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2442. {
  2443. struct icnss_priv *priv = dev_get_drvdata(dev);
  2444. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2445. while (!list_empty(&priv->icnss_tcdev_list)) {
  2446. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2447. struct icnss_thermal_cdev,
  2448. tcdev_list);
  2449. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2450. list_del(&icnss_tcdev->tcdev_list);
  2451. kfree(icnss_tcdev);
  2452. }
  2453. }
  2454. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2455. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2456. unsigned long *thermal_state,
  2457. int tcdev_id)
  2458. {
  2459. struct icnss_priv *priv = dev_get_drvdata(dev);
  2460. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2461. mutex_lock(&priv->tcdev_lock);
  2462. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2463. if (icnss_tcdev->tcdev_id != tcdev_id)
  2464. continue;
  2465. *thermal_state = icnss_tcdev->curr_thermal_state;
  2466. mutex_unlock(&priv->tcdev_lock);
  2467. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2468. icnss_tcdev->curr_thermal_state, tcdev_id);
  2469. return 0;
  2470. }
  2471. mutex_unlock(&priv->tcdev_lock);
  2472. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2473. return -EINVAL;
  2474. }
  2475. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2476. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2477. int cmd_len, void *cb_ctx,
  2478. int (*cb)(void *ctx, void *event, int event_len))
  2479. {
  2480. struct icnss_priv *priv = icnss_get_plat_priv();
  2481. int ret;
  2482. if (!priv)
  2483. return -ENODEV;
  2484. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2485. return -EINVAL;
  2486. priv->get_info_cb = cb;
  2487. priv->get_info_cb_ctx = cb_ctx;
  2488. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2489. if (ret) {
  2490. priv->get_info_cb = NULL;
  2491. priv->get_info_cb_ctx = NULL;
  2492. }
  2493. return ret;
  2494. }
  2495. EXPORT_SYMBOL(icnss_qmi_send);
  2496. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2497. struct module *owner, const char *mod_name)
  2498. {
  2499. int ret = 0;
  2500. struct icnss_priv *priv = icnss_get_plat_priv();
  2501. if (!priv || !priv->pdev) {
  2502. ret = -ENODEV;
  2503. goto out;
  2504. }
  2505. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2506. if (priv->ops) {
  2507. icnss_pr_err("Driver already registered\n");
  2508. ret = -EEXIST;
  2509. goto out;
  2510. }
  2511. if (!ops->dev_info) {
  2512. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2513. return -EINVAL;
  2514. }
  2515. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2516. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2517. ops->dev_info->name);
  2518. return -ENODEV;
  2519. }
  2520. if (!ops->probe || !ops->remove) {
  2521. ret = -EINVAL;
  2522. goto out;
  2523. }
  2524. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2525. 0, ops);
  2526. if (ret == -EINTR)
  2527. ret = 0;
  2528. out:
  2529. return ret;
  2530. }
  2531. EXPORT_SYMBOL(__icnss_register_driver);
  2532. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2533. {
  2534. int ret;
  2535. struct icnss_priv *priv = icnss_get_plat_priv();
  2536. if (!priv || !priv->pdev) {
  2537. ret = -ENODEV;
  2538. goto out;
  2539. }
  2540. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2541. if (!priv->ops) {
  2542. icnss_pr_err("Driver not registered\n");
  2543. ret = -ENOENT;
  2544. goto out;
  2545. }
  2546. ret = icnss_driver_event_post(priv,
  2547. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2548. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2549. out:
  2550. return ret;
  2551. }
  2552. EXPORT_SYMBOL(icnss_unregister_driver);
  2553. static struct icnss_msi_config msi_config_wcn6750 = {
  2554. .total_vectors = 28,
  2555. .total_users = 2,
  2556. .users = (struct icnss_msi_user[]) {
  2557. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2558. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2559. },
  2560. };
  2561. static struct icnss_msi_config msi_config_wcn6450 = {
  2562. .total_vectors = 14,
  2563. .total_users = 2,
  2564. .users = (struct icnss_msi_user[]) {
  2565. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2566. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2567. },
  2568. };
  2569. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2570. {
  2571. if (priv->device_id == WCN6750_DEVICE_ID)
  2572. priv->msi_config = &msi_config_wcn6750;
  2573. else
  2574. priv->msi_config = &msi_config_wcn6450;
  2575. return 0;
  2576. }
  2577. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2578. int *num_vectors, u32 *user_base_data,
  2579. u32 *base_vector)
  2580. {
  2581. struct icnss_priv *priv = dev_get_drvdata(dev);
  2582. struct icnss_msi_config *msi_config;
  2583. int idx;
  2584. if (!priv)
  2585. return -ENODEV;
  2586. msi_config = priv->msi_config;
  2587. if (!msi_config) {
  2588. icnss_pr_err("MSI is not supported.\n");
  2589. return -EINVAL;
  2590. }
  2591. for (idx = 0; idx < msi_config->total_users; idx++) {
  2592. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2593. *num_vectors = msi_config->users[idx].num_vectors;
  2594. *user_base_data = msi_config->users[idx].base_vector
  2595. + priv->msi_base_data;
  2596. *base_vector = msi_config->users[idx].base_vector;
  2597. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2598. user_name, *num_vectors, *user_base_data,
  2599. *base_vector);
  2600. return 0;
  2601. }
  2602. }
  2603. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2604. return -EINVAL;
  2605. }
  2606. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2607. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2608. {
  2609. struct icnss_priv *priv = dev_get_drvdata(dev);
  2610. int irq_num;
  2611. irq_num = priv->srng_irqs[vector];
  2612. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2613. irq_num, vector);
  2614. return irq_num;
  2615. }
  2616. EXPORT_SYMBOL(icnss_get_msi_irq);
  2617. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2618. u32 *msi_addr_high)
  2619. {
  2620. struct icnss_priv *priv = dev_get_drvdata(dev);
  2621. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2622. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2623. }
  2624. EXPORT_SYMBOL(icnss_get_msi_address);
  2625. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2626. irqreturn_t (*handler)(int, void *),
  2627. unsigned long flags, const char *name, void *ctx)
  2628. {
  2629. int ret = 0;
  2630. unsigned int irq;
  2631. struct ce_irq_list *irq_entry;
  2632. struct icnss_priv *priv = dev_get_drvdata(dev);
  2633. if (!priv || !priv->pdev) {
  2634. ret = -ENODEV;
  2635. goto out;
  2636. }
  2637. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2638. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2639. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2640. ret = -EINVAL;
  2641. goto out;
  2642. }
  2643. irq = priv->ce_irqs[ce_id];
  2644. irq_entry = &priv->ce_irq_list[ce_id];
  2645. if (irq_entry->handler || irq_entry->irq) {
  2646. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2647. irq, ce_id);
  2648. ret = -EEXIST;
  2649. goto out;
  2650. }
  2651. ret = request_irq(irq, handler, flags, name, ctx);
  2652. if (ret) {
  2653. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2654. irq, ce_id, ret);
  2655. goto out;
  2656. }
  2657. irq_entry->irq = irq;
  2658. irq_entry->handler = handler;
  2659. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2660. penv->stats.ce_irqs[ce_id].request++;
  2661. out:
  2662. return ret;
  2663. }
  2664. EXPORT_SYMBOL(icnss_ce_request_irq);
  2665. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2666. {
  2667. int ret = 0;
  2668. unsigned int irq;
  2669. struct ce_irq_list *irq_entry;
  2670. if (!penv || !penv->pdev || !dev) {
  2671. ret = -ENODEV;
  2672. goto out;
  2673. }
  2674. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2675. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2676. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2677. ret = -EINVAL;
  2678. goto out;
  2679. }
  2680. irq = penv->ce_irqs[ce_id];
  2681. irq_entry = &penv->ce_irq_list[ce_id];
  2682. if (!irq_entry->handler || !irq_entry->irq) {
  2683. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2684. ret = -EEXIST;
  2685. goto out;
  2686. }
  2687. free_irq(irq, ctx);
  2688. irq_entry->irq = 0;
  2689. irq_entry->handler = NULL;
  2690. penv->stats.ce_irqs[ce_id].free++;
  2691. out:
  2692. return ret;
  2693. }
  2694. EXPORT_SYMBOL(icnss_ce_free_irq);
  2695. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2696. {
  2697. unsigned int irq;
  2698. if (!penv || !penv->pdev || !dev) {
  2699. icnss_pr_err("Platform driver not initialized\n");
  2700. return;
  2701. }
  2702. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2703. penv->state);
  2704. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2705. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2706. return;
  2707. }
  2708. penv->stats.ce_irqs[ce_id].enable++;
  2709. irq = penv->ce_irqs[ce_id];
  2710. enable_irq(irq);
  2711. }
  2712. EXPORT_SYMBOL(icnss_enable_irq);
  2713. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2714. {
  2715. unsigned int irq;
  2716. if (!penv || !penv->pdev || !dev) {
  2717. icnss_pr_err("Platform driver not initialized\n");
  2718. return;
  2719. }
  2720. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2721. penv->state);
  2722. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2723. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2724. ce_id);
  2725. return;
  2726. }
  2727. irq = penv->ce_irqs[ce_id];
  2728. disable_irq(irq);
  2729. penv->stats.ce_irqs[ce_id].disable++;
  2730. }
  2731. EXPORT_SYMBOL(icnss_disable_irq);
  2732. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2733. {
  2734. char *fw_build_timestamp = NULL;
  2735. struct icnss_priv *priv = dev_get_drvdata(dev);
  2736. if (!priv) {
  2737. icnss_pr_err("Platform driver not initialized\n");
  2738. return -EINVAL;
  2739. }
  2740. info->v_addr = priv->mem_base_va;
  2741. info->p_addr = priv->mem_base_pa;
  2742. info->chip_id = priv->chip_info.chip_id;
  2743. info->chip_family = priv->chip_info.chip_family;
  2744. info->board_id = priv->board_id;
  2745. info->soc_id = priv->soc_id;
  2746. info->fw_version = priv->fw_version_info.fw_version;
  2747. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2748. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2749. strlcpy(info->fw_build_timestamp,
  2750. priv->fw_version_info.fw_build_timestamp,
  2751. WLFW_MAX_TIMESTAMP_LEN + 1);
  2752. strlcpy(info->fw_build_id, priv->fw_build_id,
  2753. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2754. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2755. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2756. info->phy_qam_cap = priv->phy_qam_cap;
  2757. return 0;
  2758. }
  2759. EXPORT_SYMBOL(icnss_get_soc_info);
  2760. int icnss_get_mhi_state(struct device *dev)
  2761. {
  2762. struct icnss_priv *priv = dev_get_drvdata(dev);
  2763. if (!priv) {
  2764. icnss_pr_err("Platform driver not initialized\n");
  2765. return -EINVAL;
  2766. }
  2767. if (!priv->mhi_state_info_va)
  2768. return -ENOMEM;
  2769. return ioread32(priv->mhi_state_info_va);
  2770. }
  2771. EXPORT_SYMBOL(icnss_get_mhi_state);
  2772. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2773. {
  2774. int ret;
  2775. struct icnss_priv *priv;
  2776. if (!dev)
  2777. return -ENODEV;
  2778. priv = dev_get_drvdata(dev);
  2779. if (!priv) {
  2780. icnss_pr_err("Platform driver not initialized\n");
  2781. return -EINVAL;
  2782. }
  2783. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2784. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2785. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2786. priv->state);
  2787. return -EINVAL;
  2788. }
  2789. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2790. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2791. if (ret)
  2792. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2793. ret, fw_log_mode);
  2794. return ret;
  2795. }
  2796. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2797. int icnss_force_wake_request(struct device *dev)
  2798. {
  2799. struct icnss_priv *priv;
  2800. if (!dev)
  2801. return -ENODEV;
  2802. priv = dev_get_drvdata(dev);
  2803. if (!priv) {
  2804. icnss_pr_err("Platform driver not initialized\n");
  2805. return -EINVAL;
  2806. }
  2807. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2808. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2809. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2810. priv->state);
  2811. return -EINVAL;
  2812. }
  2813. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2814. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2815. atomic_read(&priv->soc_wake_ref_count));
  2816. return 0;
  2817. }
  2818. icnss_pr_soc_wake("Calling SOC Wake request");
  2819. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2820. 0, NULL);
  2821. return 0;
  2822. }
  2823. EXPORT_SYMBOL(icnss_force_wake_request);
  2824. int icnss_force_wake_release(struct device *dev)
  2825. {
  2826. struct icnss_priv *priv;
  2827. if (!dev)
  2828. return -ENODEV;
  2829. priv = dev_get_drvdata(dev);
  2830. if (!priv) {
  2831. icnss_pr_err("Platform driver not initialized\n");
  2832. return -EINVAL;
  2833. }
  2834. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2835. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2836. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2837. priv->state);
  2838. return -EINVAL;
  2839. }
  2840. icnss_pr_soc_wake("Calling SOC Wake response");
  2841. if (atomic_read(&priv->soc_wake_ref_count) &&
  2842. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2843. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2844. atomic_read(&priv->soc_wake_ref_count));
  2845. return 0;
  2846. }
  2847. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2848. 0, NULL);
  2849. return 0;
  2850. }
  2851. EXPORT_SYMBOL(icnss_force_wake_release);
  2852. int icnss_is_device_awake(struct device *dev)
  2853. {
  2854. struct icnss_priv *priv = dev_get_drvdata(dev);
  2855. if (!priv) {
  2856. icnss_pr_err("Platform driver not initialized\n");
  2857. return -EINVAL;
  2858. }
  2859. return atomic_read(&priv->soc_wake_ref_count);
  2860. }
  2861. EXPORT_SYMBOL(icnss_is_device_awake);
  2862. int icnss_is_pci_ep_awake(struct device *dev)
  2863. {
  2864. struct icnss_priv *priv = dev_get_drvdata(dev);
  2865. if (!priv) {
  2866. icnss_pr_err("Platform driver not initialized\n");
  2867. return -EINVAL;
  2868. }
  2869. if (!priv->mhi_state_info_va)
  2870. return -ENOMEM;
  2871. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2872. }
  2873. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2874. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2875. uint32_t mem_type, uint32_t data_len,
  2876. uint8_t *output)
  2877. {
  2878. int ret = 0;
  2879. struct icnss_priv *priv = dev_get_drvdata(dev);
  2880. if (priv->magic != ICNSS_MAGIC) {
  2881. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2882. dev, priv, priv->magic);
  2883. return -EINVAL;
  2884. }
  2885. if (!output || data_len == 0
  2886. || data_len > WLFW_MAX_DATA_SIZE) {
  2887. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2888. output, data_len);
  2889. ret = -EINVAL;
  2890. goto out;
  2891. }
  2892. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2893. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2894. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2895. priv->state);
  2896. ret = -EINVAL;
  2897. goto out;
  2898. }
  2899. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2900. data_len, output);
  2901. out:
  2902. return ret;
  2903. }
  2904. EXPORT_SYMBOL(icnss_athdiag_read);
  2905. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2906. uint32_t mem_type, uint32_t data_len,
  2907. uint8_t *input)
  2908. {
  2909. int ret = 0;
  2910. struct icnss_priv *priv = dev_get_drvdata(dev);
  2911. if (priv->magic != ICNSS_MAGIC) {
  2912. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2913. dev, priv, priv->magic);
  2914. return -EINVAL;
  2915. }
  2916. if (!input || data_len == 0
  2917. || data_len > WLFW_MAX_DATA_SIZE) {
  2918. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2919. input, data_len);
  2920. ret = -EINVAL;
  2921. goto out;
  2922. }
  2923. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2924. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2925. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2926. priv->state);
  2927. ret = -EINVAL;
  2928. goto out;
  2929. }
  2930. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2931. data_len, input);
  2932. out:
  2933. return ret;
  2934. }
  2935. EXPORT_SYMBOL(icnss_athdiag_write);
  2936. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2937. enum icnss_driver_mode mode,
  2938. const char *host_version)
  2939. {
  2940. struct icnss_priv *priv = dev_get_drvdata(dev);
  2941. int temp = 0, ret = 0;
  2942. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2943. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2944. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2945. priv->state);
  2946. return -EINVAL;
  2947. }
  2948. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2949. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2950. priv->state);
  2951. return -EINVAL;
  2952. }
  2953. if (priv->wpss_supported &&
  2954. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2955. icnss_setup_dms_mac(priv);
  2956. if (priv->device_id == WCN6750_DEVICE_ID) {
  2957. if (!icnss_get_temperature(priv, &temp)) {
  2958. icnss_pr_dbg("Temperature: %d\n", temp);
  2959. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2960. icnss_set_wlan_en_delay(priv);
  2961. }
  2962. }
  2963. if (priv->device_id == WCN6450_DEVICE_ID)
  2964. icnss_hw_power_off(priv);
  2965. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2966. if (priv->device_id == WCN6450_DEVICE_ID)
  2967. icnss_hw_power_on(priv);
  2968. return ret;
  2969. }
  2970. EXPORT_SYMBOL(icnss_wlan_enable);
  2971. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2972. {
  2973. struct icnss_priv *priv = dev_get_drvdata(dev);
  2974. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2975. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2976. priv->state);
  2977. return 0;
  2978. }
  2979. return icnss_send_wlan_disable_to_fw(priv);
  2980. }
  2981. EXPORT_SYMBOL(icnss_wlan_disable);
  2982. bool icnss_is_qmi_disable(struct device *dev)
  2983. {
  2984. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2985. }
  2986. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2987. int icnss_get_ce_id(struct device *dev, int irq)
  2988. {
  2989. int i;
  2990. if (!penv || !penv->pdev || !dev)
  2991. return -ENODEV;
  2992. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2993. if (penv->ce_irqs[i] == irq)
  2994. return i;
  2995. }
  2996. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2997. return -EINVAL;
  2998. }
  2999. EXPORT_SYMBOL(icnss_get_ce_id);
  3000. int icnss_get_irq(struct device *dev, int ce_id)
  3001. {
  3002. int irq;
  3003. if (!penv || !penv->pdev || !dev)
  3004. return -ENODEV;
  3005. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3006. return -EINVAL;
  3007. irq = penv->ce_irqs[ce_id];
  3008. return irq;
  3009. }
  3010. EXPORT_SYMBOL(icnss_get_irq);
  3011. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3012. {
  3013. struct icnss_priv *priv = dev_get_drvdata(dev);
  3014. if (!priv) {
  3015. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3016. return NULL;
  3017. }
  3018. return priv->iommu_domain;
  3019. }
  3020. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3021. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3022. int icnss_iommu_map(struct iommu_domain *domain,
  3023. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3024. {
  3025. return iommu_map(domain, iova, paddr, size, prot);
  3026. }
  3027. #else
  3028. int icnss_iommu_map(struct iommu_domain *domain,
  3029. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3030. {
  3031. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3032. }
  3033. #endif
  3034. int icnss_smmu_map(struct device *dev,
  3035. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3036. {
  3037. struct icnss_priv *priv = dev_get_drvdata(dev);
  3038. int flag = IOMMU_READ | IOMMU_WRITE;
  3039. bool dma_coherent = false;
  3040. unsigned long iova;
  3041. int prop_len = 0;
  3042. size_t len;
  3043. int ret = 0;
  3044. if (!priv) {
  3045. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3046. dev, priv);
  3047. return -EINVAL;
  3048. }
  3049. if (!iova_addr) {
  3050. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3051. &paddr, size);
  3052. return -EINVAL;
  3053. }
  3054. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3055. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3056. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3057. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3058. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3059. iova,
  3060. &priv->smmu_iova_ipa_start,
  3061. priv->smmu_iova_ipa_len);
  3062. return -ENOMEM;
  3063. }
  3064. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3065. icnss_pr_dbg("dma-coherent is %s\n",
  3066. dma_coherent ? "enabled" : "disabled");
  3067. if (dma_coherent)
  3068. flag |= IOMMU_CACHE;
  3069. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3070. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3071. rounddown(paddr, PAGE_SIZE), len,
  3072. flag);
  3073. if (ret) {
  3074. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3075. return ret;
  3076. }
  3077. priv->smmu_iova_ipa_current = iova + len;
  3078. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3079. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3080. return 0;
  3081. }
  3082. EXPORT_SYMBOL(icnss_smmu_map);
  3083. int icnss_smmu_unmap(struct device *dev,
  3084. uint32_t iova_addr, size_t size)
  3085. {
  3086. struct icnss_priv *priv = dev_get_drvdata(dev);
  3087. unsigned long iova;
  3088. size_t len, unmapped_len;
  3089. if (!priv) {
  3090. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3091. dev, priv);
  3092. return -EINVAL;
  3093. }
  3094. if (!iova_addr) {
  3095. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3096. size);
  3097. return -EINVAL;
  3098. }
  3099. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3100. PAGE_SIZE);
  3101. iova = rounddown(iova_addr, PAGE_SIZE);
  3102. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3103. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3104. iova,
  3105. &priv->smmu_iova_ipa_start,
  3106. priv->smmu_iova_ipa_len);
  3107. return -ENOMEM;
  3108. }
  3109. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3110. iova, len);
  3111. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3112. if (unmapped_len != len) {
  3113. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3114. return -EINVAL;
  3115. }
  3116. priv->smmu_iova_ipa_current = iova;
  3117. return 0;
  3118. }
  3119. EXPORT_SYMBOL(icnss_smmu_unmap);
  3120. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3121. {
  3122. return socinfo_get_serial_number();
  3123. }
  3124. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3125. int icnss_trigger_recovery(struct device *dev)
  3126. {
  3127. int ret = 0;
  3128. struct icnss_priv *priv = dev_get_drvdata(dev);
  3129. if (priv->magic != ICNSS_MAGIC) {
  3130. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3131. ret = -EINVAL;
  3132. goto out;
  3133. }
  3134. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3135. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3136. priv->state);
  3137. ret = -EPERM;
  3138. goto out;
  3139. }
  3140. if (priv->wpss_supported) {
  3141. icnss_pr_vdbg("Initiate Root PD restart");
  3142. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3143. ICNSS_SMP2P_OUT_POWER_SAVE);
  3144. if (!ret)
  3145. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3146. return ret;
  3147. }
  3148. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3149. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3150. priv->state);
  3151. ret = -EOPNOTSUPP;
  3152. goto out;
  3153. }
  3154. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3155. priv->state);
  3156. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3157. if (!ret)
  3158. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3159. out:
  3160. return ret;
  3161. }
  3162. EXPORT_SYMBOL(icnss_trigger_recovery);
  3163. int icnss_idle_shutdown(struct device *dev)
  3164. {
  3165. struct icnss_priv *priv = dev_get_drvdata(dev);
  3166. if (!priv) {
  3167. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3168. return -EINVAL;
  3169. }
  3170. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3171. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3172. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3173. return -EBUSY;
  3174. }
  3175. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3176. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3177. }
  3178. EXPORT_SYMBOL(icnss_idle_shutdown);
  3179. int icnss_idle_restart(struct device *dev)
  3180. {
  3181. struct icnss_priv *priv = dev_get_drvdata(dev);
  3182. if (!priv) {
  3183. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3184. return -EINVAL;
  3185. }
  3186. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3187. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3188. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3189. return -EBUSY;
  3190. }
  3191. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3192. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3193. }
  3194. EXPORT_SYMBOL(icnss_idle_restart);
  3195. int icnss_exit_power_save(struct device *dev)
  3196. {
  3197. struct icnss_priv *priv = dev_get_drvdata(dev);
  3198. icnss_pr_vdbg("Calling Exit Power Save\n");
  3199. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3200. !test_bit(ICNSS_MODE_ON, &priv->state))
  3201. return 0;
  3202. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3203. ICNSS_SMP2P_OUT_POWER_SAVE);
  3204. }
  3205. EXPORT_SYMBOL(icnss_exit_power_save);
  3206. int icnss_prevent_l1(struct device *dev)
  3207. {
  3208. struct icnss_priv *priv = dev_get_drvdata(dev);
  3209. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3210. !test_bit(ICNSS_MODE_ON, &priv->state))
  3211. return 0;
  3212. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3213. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3214. }
  3215. EXPORT_SYMBOL(icnss_prevent_l1);
  3216. void icnss_allow_l1(struct device *dev)
  3217. {
  3218. struct icnss_priv *priv = dev_get_drvdata(dev);
  3219. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3220. !test_bit(ICNSS_MODE_ON, &priv->state))
  3221. return;
  3222. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3223. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3224. }
  3225. EXPORT_SYMBOL(icnss_allow_l1);
  3226. void icnss_allow_recursive_recovery(struct device *dev)
  3227. {
  3228. struct icnss_priv *priv = dev_get_drvdata(dev);
  3229. priv->allow_recursive_recovery = true;
  3230. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3231. }
  3232. void icnss_disallow_recursive_recovery(struct device *dev)
  3233. {
  3234. struct icnss_priv *priv = dev_get_drvdata(dev);
  3235. priv->allow_recursive_recovery = false;
  3236. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3237. }
  3238. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3239. {
  3240. struct kobject *icnss_kobject;
  3241. int ret = 0;
  3242. atomic_set(&priv->is_shutdown, false);
  3243. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3244. if (!icnss_kobject) {
  3245. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3246. return -EINVAL;
  3247. }
  3248. priv->icnss_kobject = icnss_kobject;
  3249. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3250. if (ret) {
  3251. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3252. return ret;
  3253. }
  3254. return ret;
  3255. }
  3256. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3257. {
  3258. struct kobject *icnss_kobject;
  3259. icnss_kobject = priv->icnss_kobject;
  3260. if (icnss_kobject)
  3261. kobject_put(icnss_kobject);
  3262. }
  3263. static ssize_t qdss_tr_start_store(struct device *dev,
  3264. struct device_attribute *attr,
  3265. const char *buf, size_t count)
  3266. {
  3267. struct icnss_priv *priv = dev_get_drvdata(dev);
  3268. wlfw_qdss_trace_start(priv);
  3269. icnss_pr_dbg("Received QDSS start command\n");
  3270. return count;
  3271. }
  3272. static ssize_t qdss_tr_stop_store(struct device *dev,
  3273. struct device_attribute *attr,
  3274. const char *user_buf, size_t count)
  3275. {
  3276. struct icnss_priv *priv = dev_get_drvdata(dev);
  3277. u32 option = 0;
  3278. if (sscanf(user_buf, "%du", &option) != 1)
  3279. return -EINVAL;
  3280. wlfw_qdss_trace_stop(priv, option);
  3281. icnss_pr_dbg("Received QDSS stop command\n");
  3282. return count;
  3283. }
  3284. static ssize_t qdss_conf_download_store(struct device *dev,
  3285. struct device_attribute *attr,
  3286. const char *buf, size_t count)
  3287. {
  3288. struct icnss_priv *priv = dev_get_drvdata(dev);
  3289. icnss_wlfw_qdss_dnld_send_sync(priv);
  3290. icnss_pr_dbg("Received QDSS download config command\n");
  3291. return count;
  3292. }
  3293. static ssize_t hw_trc_override_store(struct device *dev,
  3294. struct device_attribute *attr,
  3295. const char *buf, size_t count)
  3296. {
  3297. struct icnss_priv *priv = dev_get_drvdata(dev);
  3298. int tmp = 0;
  3299. if (sscanf(buf, "%du", &tmp) != 1)
  3300. return -EINVAL;
  3301. priv->hw_trc_override = tmp;
  3302. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3303. return count;
  3304. }
  3305. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3306. {
  3307. struct icnss_priv *priv = icnss_get_plat_priv();
  3308. phandle rproc_phandle;
  3309. int ret;
  3310. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3311. &rproc_phandle)) {
  3312. icnss_pr_err("error reading rproc phandle\n");
  3313. return;
  3314. }
  3315. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3316. if (IS_ERR_OR_NULL(priv->rproc)) {
  3317. icnss_pr_err("rproc not found");
  3318. return;
  3319. }
  3320. ret = rproc_boot(priv->rproc);
  3321. if (ret) {
  3322. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3323. rproc_put(priv->rproc);
  3324. }
  3325. }
  3326. static ssize_t wpss_boot_store(struct device *dev,
  3327. struct device_attribute *attr,
  3328. const char *buf, size_t count)
  3329. {
  3330. struct icnss_priv *priv = dev_get_drvdata(dev);
  3331. int wpss_rproc = 0;
  3332. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3333. return count;
  3334. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3335. icnss_pr_err("Failed to read wpss rproc info");
  3336. return -EINVAL;
  3337. }
  3338. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3339. if (wpss_rproc == 1)
  3340. schedule_work(&wpss_loader);
  3341. else if (wpss_rproc == 0)
  3342. icnss_wpss_unload(priv);
  3343. return count;
  3344. }
  3345. static ssize_t wlan_en_delay_store(struct device *dev,
  3346. struct device_attribute *attr,
  3347. const char *buf, size_t count)
  3348. {
  3349. struct icnss_priv *priv = dev_get_drvdata(dev);
  3350. uint32_t wlan_en_delay = 0;
  3351. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3352. return count;
  3353. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3354. icnss_pr_err("Failed to read wlan_en_delay");
  3355. return -EINVAL;
  3356. }
  3357. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3358. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3359. return count;
  3360. }
  3361. static DEVICE_ATTR_WO(qdss_tr_start);
  3362. static DEVICE_ATTR_WO(qdss_tr_stop);
  3363. static DEVICE_ATTR_WO(qdss_conf_download);
  3364. static DEVICE_ATTR_WO(hw_trc_override);
  3365. static DEVICE_ATTR_WO(wpss_boot);
  3366. static DEVICE_ATTR_WO(wlan_en_delay);
  3367. static struct attribute *icnss_attrs[] = {
  3368. &dev_attr_qdss_tr_start.attr,
  3369. &dev_attr_qdss_tr_stop.attr,
  3370. &dev_attr_qdss_conf_download.attr,
  3371. &dev_attr_hw_trc_override.attr,
  3372. &dev_attr_wpss_boot.attr,
  3373. &dev_attr_wlan_en_delay.attr,
  3374. NULL,
  3375. };
  3376. static struct attribute_group icnss_attr_group = {
  3377. .attrs = icnss_attrs,
  3378. };
  3379. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3380. {
  3381. struct device *dev = &priv->pdev->dev;
  3382. int ret;
  3383. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3384. if (ret) {
  3385. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3386. ret);
  3387. goto out;
  3388. }
  3389. return 0;
  3390. out:
  3391. return ret;
  3392. }
  3393. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3394. {
  3395. sysfs_remove_link(kernel_kobj, "icnss");
  3396. }
  3397. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3398. union icnss_device_group_devres {
  3399. const struct attribute_group *group;
  3400. };
  3401. static void devm_icnss_group_remove(struct device *dev, void *res)
  3402. {
  3403. union icnss_device_group_devres *devres = res;
  3404. const struct attribute_group *group = devres->group;
  3405. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3406. sysfs_remove_group(&dev->kobj, group);
  3407. }
  3408. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3409. {
  3410. return ((union icnss_device_group_devres *)res) == data;
  3411. }
  3412. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3413. {
  3414. WARN_ON(devres_release(&priv->pdev->dev,
  3415. devm_icnss_group_remove, devm_icnss_group_match,
  3416. (void *)&icnss_attr_group));
  3417. }
  3418. #else
  3419. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3420. {
  3421. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3422. }
  3423. #endif
  3424. static int icnss_sysfs_create(struct icnss_priv *priv)
  3425. {
  3426. int ret = 0;
  3427. ret = devm_device_add_group(&priv->pdev->dev,
  3428. &icnss_attr_group);
  3429. if (ret) {
  3430. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3431. ret);
  3432. goto out;
  3433. }
  3434. icnss_create_sysfs_link(priv);
  3435. ret = icnss_create_shutdown_sysfs(priv);
  3436. if (ret)
  3437. goto remove_icnss_group;
  3438. return 0;
  3439. remove_icnss_group:
  3440. icnss_devm_device_remove_group(priv);
  3441. out:
  3442. return ret;
  3443. }
  3444. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3445. {
  3446. icnss_destroy_shutdown_sysfs(priv);
  3447. icnss_remove_sysfs_link(priv);
  3448. icnss_devm_device_remove_group(priv);
  3449. }
  3450. static int icnss_resource_parse(struct icnss_priv *priv)
  3451. {
  3452. int ret = 0, i = 0, irq = 0;
  3453. struct platform_device *pdev = priv->pdev;
  3454. struct device *dev = &pdev->dev;
  3455. struct resource *res;
  3456. u32 int_prop;
  3457. ret = icnss_get_vreg(priv);
  3458. if (ret) {
  3459. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3460. goto out;
  3461. }
  3462. ret = icnss_get_clk(priv);
  3463. if (ret) {
  3464. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3465. goto put_vreg;
  3466. }
  3467. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3468. ret = icnss_get_psf_info(priv);
  3469. if (ret < 0)
  3470. goto out;
  3471. priv->psf_supported = true;
  3472. }
  3473. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3474. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3475. "membase");
  3476. if (!res) {
  3477. icnss_pr_err("Memory base not found in DT\n");
  3478. ret = -EINVAL;
  3479. goto put_clk;
  3480. }
  3481. priv->mem_base_pa = res->start;
  3482. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3483. resource_size(res));
  3484. if (!priv->mem_base_va) {
  3485. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3486. &priv->mem_base_pa);
  3487. ret = -EINVAL;
  3488. goto put_clk;
  3489. }
  3490. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3491. &priv->mem_base_pa,
  3492. priv->mem_base_va);
  3493. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3494. irq = platform_get_irq(pdev, i);
  3495. if (irq < 0) {
  3496. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3497. ret = -ENODEV;
  3498. goto put_clk;
  3499. } else {
  3500. priv->ce_irqs[i] = irq;
  3501. }
  3502. }
  3503. if (of_property_read_bool(pdev->dev.of_node,
  3504. "qcom,is_low_power")) {
  3505. priv->low_power_support = true;
  3506. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3507. }
  3508. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3509. &priv->rf_subtype) == 0) {
  3510. priv->is_rf_subtype_valid = true;
  3511. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3512. }
  3513. if (of_property_read_bool(pdev->dev.of_node,
  3514. "qcom,is_slate_rfa")) {
  3515. priv->is_slate_rfa = true;
  3516. icnss_pr_err("SLATE rfa is enabled\n");
  3517. }
  3518. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3519. priv->device_id == WCN6450_DEVICE_ID) {
  3520. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3521. "msi_addr");
  3522. if (!res) {
  3523. icnss_pr_err("MSI address not found in DT\n");
  3524. ret = -EINVAL;
  3525. goto put_clk;
  3526. }
  3527. priv->msi_addr_pa = res->start;
  3528. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3529. PAGE_SIZE,
  3530. DMA_FROM_DEVICE, 0);
  3531. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3532. icnss_pr_err("MSI: failed to map msi address\n");
  3533. priv->msi_addr_iova = 0;
  3534. ret = -ENOMEM;
  3535. goto put_clk;
  3536. }
  3537. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3538. &priv->msi_addr_pa,
  3539. priv->msi_addr_iova);
  3540. ret = of_property_read_u32_index(dev->of_node,
  3541. "interrupts",
  3542. 1,
  3543. &int_prop);
  3544. if (ret) {
  3545. icnss_pr_dbg("Read interrupt prop failed");
  3546. goto put_clk;
  3547. }
  3548. priv->msi_base_data = int_prop + 32;
  3549. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3550. priv->msi_base_data, int_prop);
  3551. icnss_get_msi_assignment(priv);
  3552. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3553. irq = platform_get_irq(priv->pdev, i);
  3554. if (irq < 0) {
  3555. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3556. ret = -ENODEV;
  3557. goto put_clk;
  3558. } else {
  3559. priv->srng_irqs[i] = irq;
  3560. }
  3561. }
  3562. }
  3563. return 0;
  3564. put_clk:
  3565. icnss_put_clk(priv);
  3566. put_vreg:
  3567. icnss_put_vreg(priv);
  3568. out:
  3569. return ret;
  3570. }
  3571. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3572. {
  3573. int ret = 0;
  3574. struct platform_device *pdev = priv->pdev;
  3575. struct device *dev = &pdev->dev;
  3576. struct device_node *np = NULL;
  3577. u64 prop_size = 0;
  3578. const __be32 *addrp = NULL;
  3579. np = of_parse_phandle(dev->of_node,
  3580. "qcom,wlan-msa-fixed-region", 0);
  3581. if (np) {
  3582. addrp = of_get_address(np, 0, &prop_size, NULL);
  3583. if (!addrp) {
  3584. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3585. ret = -EINVAL;
  3586. of_node_put(np);
  3587. goto out;
  3588. }
  3589. priv->msa_pa = of_translate_address(np, addrp);
  3590. if (priv->msa_pa == OF_BAD_ADDR) {
  3591. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3592. ret = -EINVAL;
  3593. of_node_put(np);
  3594. goto out;
  3595. }
  3596. of_node_put(np);
  3597. priv->msa_va = memremap(priv->msa_pa,
  3598. (unsigned long)prop_size, MEMREMAP_WT);
  3599. if (!priv->msa_va) {
  3600. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3601. &priv->msa_pa);
  3602. ret = -EINVAL;
  3603. goto out;
  3604. }
  3605. priv->msa_mem_size = prop_size;
  3606. } else {
  3607. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3608. &priv->msa_mem_size);
  3609. if (ret || priv->msa_mem_size == 0) {
  3610. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3611. priv->msa_mem_size, ret);
  3612. goto out;
  3613. }
  3614. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3615. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3616. if (!priv->msa_va) {
  3617. icnss_pr_err("DMA alloc failed for MSA\n");
  3618. ret = -ENOMEM;
  3619. goto out;
  3620. }
  3621. }
  3622. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3623. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3624. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3625. "qcom,fw-prefix");
  3626. return 0;
  3627. out:
  3628. return ret;
  3629. }
  3630. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3631. struct device *dev, unsigned long iova,
  3632. int flags, void *handler_token)
  3633. {
  3634. struct icnss_priv *priv = handler_token;
  3635. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3636. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3637. if (!priv) {
  3638. icnss_pr_err("priv is NULL\n");
  3639. return -ENODEV;
  3640. }
  3641. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3642. fw_down_data.crashed = true;
  3643. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3644. &fw_down_data);
  3645. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3646. &fw_down_data);
  3647. }
  3648. icnss_trigger_recovery(&priv->pdev->dev);
  3649. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3650. return -ENOSYS;
  3651. }
  3652. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3653. {
  3654. int ret = 0;
  3655. struct platform_device *pdev = priv->pdev;
  3656. struct device *dev = &pdev->dev;
  3657. const char *iommu_dma_type;
  3658. struct resource *res;
  3659. u32 addr_win[2];
  3660. ret = of_property_read_u32_array(dev->of_node,
  3661. "qcom,iommu-dma-addr-pool",
  3662. addr_win,
  3663. ARRAY_SIZE(addr_win));
  3664. if (ret) {
  3665. icnss_pr_err("SMMU IOVA base not found\n");
  3666. } else {
  3667. priv->smmu_iova_start = addr_win[0];
  3668. priv->smmu_iova_len = addr_win[1];
  3669. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3670. &priv->smmu_iova_start,
  3671. priv->smmu_iova_len);
  3672. priv->iommu_domain =
  3673. iommu_get_domain_for_dev(&pdev->dev);
  3674. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3675. &iommu_dma_type);
  3676. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3677. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3678. priv->smmu_s1_enable = true;
  3679. if (priv->device_id == WCN6750_DEVICE_ID ||
  3680. priv->device_id == WCN6450_DEVICE_ID)
  3681. iommu_set_fault_handler(priv->iommu_domain,
  3682. icnss_smmu_fault_handler,
  3683. priv);
  3684. }
  3685. res = platform_get_resource_byname(pdev,
  3686. IORESOURCE_MEM,
  3687. "smmu_iova_ipa");
  3688. if (!res) {
  3689. icnss_pr_err("SMMU IOVA IPA not found\n");
  3690. } else {
  3691. priv->smmu_iova_ipa_start = res->start;
  3692. priv->smmu_iova_ipa_current = res->start;
  3693. priv->smmu_iova_ipa_len = resource_size(res);
  3694. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3695. &priv->smmu_iova_ipa_start,
  3696. priv->smmu_iova_ipa_len);
  3697. }
  3698. }
  3699. return 0;
  3700. }
  3701. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3702. {
  3703. if (!priv)
  3704. return -ENODEV;
  3705. if (!priv->smmu_iova_len)
  3706. return -EINVAL;
  3707. *addr = priv->smmu_iova_start;
  3708. *size = priv->smmu_iova_len;
  3709. return 0;
  3710. }
  3711. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3712. {
  3713. if (!priv)
  3714. return -ENODEV;
  3715. if (!priv->smmu_iova_ipa_len)
  3716. return -EINVAL;
  3717. *addr = priv->smmu_iova_ipa_start;
  3718. *size = priv->smmu_iova_ipa_len;
  3719. return 0;
  3720. }
  3721. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3722. char *name)
  3723. {
  3724. if (!priv)
  3725. return;
  3726. if (!priv->use_prefix_path) {
  3727. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3728. return;
  3729. }
  3730. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3731. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3732. ADRASTEA_PATH_PREFIX "%s", name);
  3733. else if (priv->device_id == WCN6750_DEVICE_ID)
  3734. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3735. QCA6750_PATH_PREFIX "%s", name);
  3736. else if (priv->device_id == WCN6450_DEVICE_ID)
  3737. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3738. WCN6450_PATH_PREFIX "%s", name);
  3739. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3740. }
  3741. static const struct platform_device_id icnss_platform_id_table[] = {
  3742. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3743. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3744. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3745. { },
  3746. };
  3747. static const struct of_device_id icnss_dt_match[] = {
  3748. {
  3749. .compatible = "qcom,wcn6750",
  3750. .data = (void *)&icnss_platform_id_table[0]},
  3751. {
  3752. .compatible = "qcom,icnss",
  3753. .data = (void *)&icnss_platform_id_table[1]},
  3754. {
  3755. .compatible = "qcom,wcn6450",
  3756. .data = (void *)&icnss_platform_id_table[2]},
  3757. { },
  3758. };
  3759. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3760. static void icnss_init_control_params(struct icnss_priv *priv)
  3761. {
  3762. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3763. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3764. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3765. if (priv->device_id == WCN6750_DEVICE_ID ||
  3766. priv->device_id == WCN6450_DEVICE_ID ||
  3767. of_property_read_bool(priv->pdev->dev.of_node,
  3768. "wpss-support-enable"))
  3769. priv->wpss_supported = true;
  3770. if (of_property_read_bool(priv->pdev->dev.of_node,
  3771. "bdf-download-support"))
  3772. priv->bdf_download_support = true;
  3773. if (of_property_read_bool(priv->pdev->dev.of_node,
  3774. "rproc-fw-download"))
  3775. priv->rproc_fw_download = true;
  3776. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3777. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3778. }
  3779. static void icnss_read_device_configs(struct icnss_priv *priv)
  3780. {
  3781. if (of_property_read_bool(priv->pdev->dev.of_node,
  3782. "wlan-ipa-disabled")) {
  3783. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3784. }
  3785. if (of_property_read_bool(priv->pdev->dev.of_node,
  3786. "qcom,wpss-self-recovery"))
  3787. priv->wpss_self_recovery_enabled = true;
  3788. }
  3789. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3790. {
  3791. pm_runtime_get_sync(&priv->pdev->dev);
  3792. pm_runtime_forbid(&priv->pdev->dev);
  3793. pm_runtime_set_active(&priv->pdev->dev);
  3794. pm_runtime_enable(&priv->pdev->dev);
  3795. }
  3796. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3797. {
  3798. pm_runtime_disable(&priv->pdev->dev);
  3799. pm_runtime_allow(&priv->pdev->dev);
  3800. pm_runtime_put_sync(&priv->pdev->dev);
  3801. }
  3802. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3803. {
  3804. return of_property_read_bool(priv->pdev->dev.of_node,
  3805. "use-nv-mac");
  3806. }
  3807. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3808. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3809. {
  3810. struct icnss_subsys_restart_level_data *restart_level_data;
  3811. icnss_pr_info("rproc name: %s recovery disable: %d",
  3812. rproc->name, rproc->recovery_disabled);
  3813. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3814. if (!restart_level_data)
  3815. return;
  3816. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3817. if (rproc->recovery_disabled)
  3818. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3819. else
  3820. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3821. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3822. 0, restart_level_data);
  3823. }
  3824. }
  3825. #endif
  3826. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3827. static void icnss_initialize_mem_pool(unsigned long device_id)
  3828. {
  3829. cnss_initialize_prealloc_pool(device_id);
  3830. }
  3831. static void icnss_deinitialize_mem_pool(void)
  3832. {
  3833. cnss_deinitialize_prealloc_pool();
  3834. }
  3835. #else
  3836. static void icnss_initialize_mem_pool(unsigned long device_id)
  3837. {
  3838. }
  3839. static void icnss_deinitialize_mem_pool(void)
  3840. {
  3841. }
  3842. #endif
  3843. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3844. static void register_rproc_restart_level_notifier(void)
  3845. {
  3846. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3847. }
  3848. #else
  3849. static void register_rproc_restart_level_notifier(void)
  3850. {
  3851. return;
  3852. }
  3853. #endif
  3854. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3855. static void unregister_rproc_restart_level_notifier(void)
  3856. {
  3857. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3858. }
  3859. #else
  3860. static void unregister_rproc_restart_level_notifier(void)
  3861. {
  3862. return;
  3863. }
  3864. #endif
  3865. static int icnss_probe(struct platform_device *pdev)
  3866. {
  3867. int ret = 0;
  3868. struct device *dev = &pdev->dev;
  3869. struct icnss_priv *priv;
  3870. const struct of_device_id *of_id;
  3871. const struct platform_device_id *device_id;
  3872. if (dev_get_drvdata(dev)) {
  3873. icnss_pr_err("Driver is already initialized\n");
  3874. return -EEXIST;
  3875. }
  3876. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3877. if (!of_id || !of_id->data) {
  3878. icnss_pr_err("Failed to find of match device!\n");
  3879. ret = -ENODEV;
  3880. goto out_reset_drvdata;
  3881. }
  3882. device_id = of_id->data;
  3883. icnss_pr_dbg("Platform driver probe\n");
  3884. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3885. if (!priv)
  3886. return -ENOMEM;
  3887. priv->magic = ICNSS_MAGIC;
  3888. dev_set_drvdata(dev, priv);
  3889. priv->pdev = pdev;
  3890. priv->device_id = device_id->driver_data;
  3891. priv->is_chain1_supported = true;
  3892. INIT_LIST_HEAD(&priv->vreg_list);
  3893. INIT_LIST_HEAD(&priv->clk_list);
  3894. icnss_allow_recursive_recovery(dev);
  3895. icnss_initialize_mem_pool(priv->device_id);
  3896. icnss_init_control_params(priv);
  3897. icnss_read_device_configs(priv);
  3898. ret = icnss_resource_parse(priv);
  3899. if (ret)
  3900. goto out_reset_drvdata;
  3901. ret = icnss_msa_dt_parse(priv);
  3902. if (ret)
  3903. goto out_free_resources;
  3904. ret = icnss_smmu_dt_parse(priv);
  3905. if (ret)
  3906. goto out_free_resources;
  3907. spin_lock_init(&priv->event_lock);
  3908. spin_lock_init(&priv->on_off_lock);
  3909. spin_lock_init(&priv->soc_wake_msg_lock);
  3910. mutex_init(&priv->dev_lock);
  3911. mutex_init(&priv->tcdev_lock);
  3912. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3913. if (!priv->event_wq) {
  3914. icnss_pr_err("Workqueue creation failed\n");
  3915. ret = -EFAULT;
  3916. goto smmu_cleanup;
  3917. }
  3918. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3919. INIT_LIST_HEAD(&priv->event_list);
  3920. if (priv->is_slate_rfa)
  3921. init_completion(&priv->slate_boot_complete);
  3922. ret = icnss_register_fw_service(priv);
  3923. if (ret < 0) {
  3924. icnss_pr_err("fw service registration failed: %d\n", ret);
  3925. goto out_destroy_wq;
  3926. }
  3927. icnss_power_misc_params_init(priv);
  3928. icnss_enable_recovery(priv);
  3929. icnss_debugfs_create(priv);
  3930. icnss_sysfs_create(priv);
  3931. ret = device_init_wakeup(&priv->pdev->dev, true);
  3932. if (ret)
  3933. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3934. ret);
  3935. icnss_set_plat_priv(priv);
  3936. init_completion(&priv->unblock_shutdown);
  3937. if (priv->device_id == WCN6750_DEVICE_ID ||
  3938. priv->device_id == WCN6450_DEVICE_ID) {
  3939. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3940. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3941. if (!priv->soc_wake_wq) {
  3942. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3943. ret = -EFAULT;
  3944. goto out_unregister_fw_service;
  3945. }
  3946. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3947. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3948. ret = icnss_genl_init();
  3949. if (ret < 0)
  3950. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3951. init_completion(&priv->smp2p_soc_wake_wait);
  3952. icnss_runtime_pm_init(priv);
  3953. icnss_aop_interface_init(priv);
  3954. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3955. priv->bdf_download_support = true;
  3956. register_rproc_restart_level_notifier();
  3957. }
  3958. if (priv->wpss_supported) {
  3959. ret = icnss_dms_init(priv);
  3960. if (ret)
  3961. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3962. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3963. icnss_pr_dbg("NV MAC feature is %s\n",
  3964. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3965. }
  3966. if (priv->wpss_supported || priv->rproc_fw_download)
  3967. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3968. timer_setup(&priv->recovery_timer,
  3969. icnss_recovery_timeout_hdlr, 0);
  3970. if (priv->wpss_self_recovery_enabled) {
  3971. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3972. timer_setup(&priv->wpss_ssr_timer,
  3973. icnss_wpss_ssr_timeout_hdlr, 0);
  3974. }
  3975. icnss_register_ims_service(priv);
  3976. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3977. icnss_pr_info("Platform driver probed successfully\n");
  3978. return 0;
  3979. out_unregister_fw_service:
  3980. icnss_unregister_fw_service(priv);
  3981. out_destroy_wq:
  3982. destroy_workqueue(priv->event_wq);
  3983. smmu_cleanup:
  3984. priv->iommu_domain = NULL;
  3985. out_free_resources:
  3986. icnss_put_resources(priv);
  3987. out_reset_drvdata:
  3988. icnss_deinitialize_mem_pool();
  3989. dev_set_drvdata(dev, NULL);
  3990. return ret;
  3991. }
  3992. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3993. {
  3994. if (IS_ERR_OR_NULL(ramdump_info))
  3995. return;
  3996. device_unregister(ramdump_info->dev);
  3997. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3998. kfree(ramdump_info);
  3999. }
  4000. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4001. {
  4002. if (priv->batt_psy)
  4003. power_supply_put(penv->batt_psy);
  4004. if (priv->psf_supported) {
  4005. flush_workqueue(priv->soc_update_wq);
  4006. destroy_workqueue(priv->soc_update_wq);
  4007. power_supply_unreg_notifier(&priv->psf_nb);
  4008. }
  4009. }
  4010. static int icnss_remove(struct platform_device *pdev)
  4011. {
  4012. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4013. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4014. del_timer(&priv->recovery_timer);
  4015. if (priv->wpss_self_recovery_enabled)
  4016. del_timer(&priv->wpss_ssr_timer);
  4017. device_init_wakeup(&priv->pdev->dev, false);
  4018. icnss_unregister_ims_service(priv);
  4019. icnss_debugfs_destroy(priv);
  4020. icnss_unregister_power_supply_notifier(penv);
  4021. icnss_sysfs_destroy(priv);
  4022. complete_all(&priv->unblock_shutdown);
  4023. if (priv->is_slate_rfa) {
  4024. complete(&priv->slate_boot_complete);
  4025. icnss_slate_ssr_unregister_notifier(priv);
  4026. icnss_unregister_slate_event_notifier(priv);
  4027. }
  4028. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4029. if (priv->wpss_supported) {
  4030. icnss_dms_deinit(priv);
  4031. icnss_wpss_early_ssr_unregister_notifier(priv);
  4032. icnss_wpss_ssr_unregister_notifier(priv);
  4033. } else {
  4034. icnss_modem_ssr_unregister_notifier(priv);
  4035. icnss_pdr_unregister_notifier(priv);
  4036. }
  4037. if (priv->device_id == WCN6750_DEVICE_ID ||
  4038. priv->device_id == WCN6450_DEVICE_ID) {
  4039. icnss_genl_exit();
  4040. icnss_runtime_pm_deinit(priv);
  4041. unregister_rproc_restart_level_notifier();
  4042. complete_all(&priv->smp2p_soc_wake_wait);
  4043. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4044. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4045. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4046. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4047. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4048. if (priv->soc_wake_wq)
  4049. destroy_workqueue(priv->soc_wake_wq);
  4050. icnss_aop_interface_deinit(priv);
  4051. }
  4052. class_destroy(priv->icnss_ramdump_class);
  4053. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4054. icnss_unregister_fw_service(priv);
  4055. if (priv->event_wq)
  4056. destroy_workqueue(priv->event_wq);
  4057. priv->iommu_domain = NULL;
  4058. icnss_hw_power_off(priv);
  4059. icnss_put_resources(priv);
  4060. icnss_deinitialize_mem_pool();
  4061. dev_set_drvdata(&pdev->dev, NULL);
  4062. return 0;
  4063. }
  4064. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4065. {
  4066. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4067. /* This is to handle if slate is not up and modem SSR is triggered */
  4068. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4069. return;
  4070. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4071. ICNSS_ASSERT(0);
  4072. }
  4073. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4074. {
  4075. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4076. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4077. priv->state);
  4078. schedule_work(&wpss_ssr_work);
  4079. }
  4080. #ifdef CONFIG_PM_SLEEP
  4081. static int icnss_pm_suspend(struct device *dev)
  4082. {
  4083. struct icnss_priv *priv = dev_get_drvdata(dev);
  4084. int ret = 0;
  4085. if (priv->magic != ICNSS_MAGIC) {
  4086. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4087. dev, priv, priv->magic);
  4088. return -EINVAL;
  4089. }
  4090. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4091. if (!priv->ops || !priv->ops->pm_suspend ||
  4092. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4093. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4094. return 0;
  4095. ret = priv->ops->pm_suspend(dev);
  4096. if (ret == 0) {
  4097. if (priv->device_id == WCN6750_DEVICE_ID ||
  4098. priv->device_id == WCN6450_DEVICE_ID) {
  4099. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4100. !test_bit(ICNSS_MODE_ON, &priv->state))
  4101. return 0;
  4102. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4103. ICNSS_SMP2P_OUT_POWER_SAVE);
  4104. }
  4105. priv->stats.pm_suspend++;
  4106. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4107. } else {
  4108. priv->stats.pm_suspend_err++;
  4109. }
  4110. return ret;
  4111. }
  4112. static int icnss_pm_resume(struct device *dev)
  4113. {
  4114. struct icnss_priv *priv = dev_get_drvdata(dev);
  4115. int ret = 0;
  4116. if (priv->magic != ICNSS_MAGIC) {
  4117. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4118. dev, priv, priv->magic);
  4119. return -EINVAL;
  4120. }
  4121. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4122. if (!priv->ops || !priv->ops->pm_resume ||
  4123. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4124. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4125. goto out;
  4126. ret = priv->ops->pm_resume(dev);
  4127. out:
  4128. if (ret == 0) {
  4129. priv->stats.pm_resume++;
  4130. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4131. } else {
  4132. priv->stats.pm_resume_err++;
  4133. }
  4134. return ret;
  4135. }
  4136. static int icnss_pm_suspend_noirq(struct device *dev)
  4137. {
  4138. struct icnss_priv *priv = dev_get_drvdata(dev);
  4139. int ret = 0;
  4140. if (priv->magic != ICNSS_MAGIC) {
  4141. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4142. dev, priv, priv->magic);
  4143. return -EINVAL;
  4144. }
  4145. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4146. if (!priv->ops || !priv->ops->suspend_noirq ||
  4147. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4148. goto out;
  4149. ret = priv->ops->suspend_noirq(dev);
  4150. out:
  4151. if (ret == 0) {
  4152. priv->stats.pm_suspend_noirq++;
  4153. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4154. } else {
  4155. priv->stats.pm_suspend_noirq_err++;
  4156. }
  4157. return ret;
  4158. }
  4159. static int icnss_pm_resume_noirq(struct device *dev)
  4160. {
  4161. struct icnss_priv *priv = dev_get_drvdata(dev);
  4162. int ret = 0;
  4163. if (priv->magic != ICNSS_MAGIC) {
  4164. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4165. dev, priv, priv->magic);
  4166. return -EINVAL;
  4167. }
  4168. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4169. if (!priv->ops || !priv->ops->resume_noirq ||
  4170. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4171. goto out;
  4172. ret = priv->ops->resume_noirq(dev);
  4173. out:
  4174. if (ret == 0) {
  4175. priv->stats.pm_resume_noirq++;
  4176. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4177. } else {
  4178. priv->stats.pm_resume_noirq_err++;
  4179. }
  4180. return ret;
  4181. }
  4182. static int icnss_pm_runtime_suspend(struct device *dev)
  4183. {
  4184. struct icnss_priv *priv = dev_get_drvdata(dev);
  4185. int ret = 0;
  4186. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4187. icnss_pr_err("Ignore runtime suspend:\n");
  4188. goto out;
  4189. }
  4190. if (priv->magic != ICNSS_MAGIC) {
  4191. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4192. dev, priv, priv->magic);
  4193. return -EINVAL;
  4194. }
  4195. if (!priv->ops || !priv->ops->runtime_suspend ||
  4196. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4197. goto out;
  4198. icnss_pr_vdbg("Runtime suspend\n");
  4199. ret = priv->ops->runtime_suspend(dev);
  4200. if (!ret) {
  4201. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4202. !test_bit(ICNSS_MODE_ON, &priv->state))
  4203. return 0;
  4204. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4205. ICNSS_SMP2P_OUT_POWER_SAVE);
  4206. }
  4207. out:
  4208. return ret;
  4209. }
  4210. static int icnss_pm_runtime_resume(struct device *dev)
  4211. {
  4212. struct icnss_priv *priv = dev_get_drvdata(dev);
  4213. int ret = 0;
  4214. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4215. icnss_pr_err("Ignore runtime resume\n");
  4216. goto out;
  4217. }
  4218. if (priv->magic != ICNSS_MAGIC) {
  4219. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4220. dev, priv, priv->magic);
  4221. return -EINVAL;
  4222. }
  4223. if (!priv->ops || !priv->ops->runtime_resume ||
  4224. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4225. goto out;
  4226. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4227. ret = priv->ops->runtime_resume(dev);
  4228. out:
  4229. return ret;
  4230. }
  4231. static int icnss_pm_runtime_idle(struct device *dev)
  4232. {
  4233. struct icnss_priv *priv = dev_get_drvdata(dev);
  4234. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4235. icnss_pr_err("Ignore runtime idle\n");
  4236. goto out;
  4237. }
  4238. icnss_pr_vdbg("Runtime idle\n");
  4239. pm_request_autosuspend(dev);
  4240. out:
  4241. return -EBUSY;
  4242. }
  4243. #endif
  4244. static const struct dev_pm_ops icnss_pm_ops = {
  4245. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4246. icnss_pm_resume)
  4247. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4248. icnss_pm_resume_noirq)
  4249. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4250. icnss_pm_runtime_idle)
  4251. };
  4252. static struct platform_driver icnss_driver = {
  4253. .probe = icnss_probe,
  4254. .remove = icnss_remove,
  4255. .driver = {
  4256. .name = "icnss2",
  4257. .pm = &icnss_pm_ops,
  4258. .of_match_table = icnss_dt_match,
  4259. },
  4260. };
  4261. static int __init icnss_initialize(void)
  4262. {
  4263. icnss_debug_init();
  4264. return platform_driver_register(&icnss_driver);
  4265. }
  4266. static void __exit icnss_exit(void)
  4267. {
  4268. platform_driver_unregister(&icnss_driver);
  4269. icnss_debug_deinit();
  4270. }
  4271. module_init(icnss_initialize);
  4272. module_exit(icnss_exit);
  4273. MODULE_LICENSE("GPL v2");
  4274. MODULE_DESCRIPTION("iWCN CORE platform driver");