dp_rx_mon_status.c 61 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211
  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline void
  35. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  36. struct hal_rx_ppdu_info *ppdu_info,
  37. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  38. #ifndef QCA_SUPPORT_FULL_MON
  39. /**
  40. * dp_rx_mon_process () - Core brain processing for monitor mode
  41. *
  42. * This API processes monitor destination ring followed by monitor status ring
  43. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  44. *
  45. * @soc: datapath soc context
  46. * @mac_id: mac_id on which interrupt is received
  47. * @quota: Number of status ring entry that can be serviced in one shot.
  48. *
  49. * @Return: Number of reaped status ring entries
  50. */
  51. static inline uint32_t
  52. dp_rx_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  53. {
  54. return quota;
  55. }
  56. #endif
  57. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  58. #include "dp_rx_mon_feature.h"
  59. #else
  60. static QDF_STATUS
  61. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  62. struct hal_rx_ppdu_info *ppdu_info)
  63. {
  64. return QDF_STATUS_SUCCESS;
  65. }
  66. static void
  67. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  68. qdf_nbuf_t status_nbuf,
  69. struct hal_rx_ppdu_info *ppdu_info,
  70. bool *nbuf_used)
  71. {
  72. }
  73. #endif
  74. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  75. #include "dp_rx_mon_feature.h"
  76. #else
  77. static QDF_STATUS
  78. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  79. struct dp_pdev *pdev,
  80. struct hal_rx_ppdu_info *ppdu_info)
  81. {
  82. return QDF_STATUS_SUCCESS;
  83. }
  84. #endif
  85. #ifdef FEATURE_PERPKT_INFO
  86. static inline void
  87. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  88. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  89. {
  90. uint8_t chain, bw;
  91. int8_t rssi;
  92. for (chain = 0; chain < SS_COUNT; chain++) {
  93. for (bw = 0; bw < MAX_BW; bw++) {
  94. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  95. if (rssi != DP_RSSI_INVAL)
  96. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  97. else
  98. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  99. }
  100. }
  101. }
  102. /*
  103. * dp_rx_populate_su_evm_details() - Populate su evm info
  104. * @ppdu_info: ppdu info structure from ppdu ring
  105. * @cdp_rx_ppdu: rx ppdu indication structure
  106. */
  107. static inline void
  108. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  109. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  110. {
  111. uint8_t pilot_evm;
  112. uint8_t nss_count;
  113. uint8_t pilot_count;
  114. nss_count = ppdu_info->evm_info.nss_count;
  115. pilot_count = ppdu_info->evm_info.pilot_count;
  116. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  117. qdf_err("pilot evm count is more than expected");
  118. return;
  119. }
  120. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  121. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  122. /* Populate evm for pilot_evm = nss_count*pilot_count */
  123. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  124. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  125. ppdu_info->evm_info.pilot_evm[pilot_evm];
  126. }
  127. }
  128. /**
  129. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  130. * @pdev: pdev ctx
  131. * @rx_user_status: mon rx user status
  132. *
  133. * Return: bool
  134. */
  135. static inline bool
  136. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  137. struct mon_rx_user_status *rx_user_status)
  138. {
  139. uint32_t ru_size;
  140. bool is_data;
  141. ru_size = rx_user_status->ofdma_ru_size;
  142. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  143. DP_STATS_INC(pdev,
  144. ul_ofdma.data_rx_ru_size[ru_size], 1);
  145. is_data = true;
  146. } else {
  147. DP_STATS_INC(pdev,
  148. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  149. is_data = false;
  150. }
  151. return is_data;
  152. }
  153. /**
  154. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  155. * @pdev: pdev ctx
  156. * @ppdu_info: ppdu info structure from ppdu ring
  157. * @cdp_rx_ppdu: Rx PPDU indication structure
  158. *
  159. * Return: none
  160. */
  161. static inline void
  162. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  163. struct hal_rx_ppdu_info *ppdu_info,
  164. struct cdp_rx_indication_ppdu
  165. *cdp_rx_ppdu)
  166. {
  167. struct dp_peer *peer;
  168. struct dp_soc *soc = pdev->soc;
  169. struct dp_ast_entry *ast_entry;
  170. uint32_t ast_index;
  171. int i;
  172. struct mon_rx_user_status *rx_user_status;
  173. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  174. int ru_size;
  175. bool is_data = false;
  176. uint32_t num_users;
  177. num_users = ppdu_info->com_info.num_users;
  178. for (i = 0; i < num_users; i++) {
  179. if (i > OFDMA_NUM_USERS)
  180. return;
  181. rx_user_status = &ppdu_info->rx_user_status[i];
  182. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  183. ast_index = rx_user_status->ast_index;
  184. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  185. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  186. continue;
  187. }
  188. ast_entry = soc->ast_table[ast_index];
  189. if (!ast_entry) {
  190. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  191. continue;
  192. }
  193. peer = ast_entry->peer;
  194. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  195. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  196. continue;
  197. }
  198. rx_stats_peruser->first_data_seq_ctrl =
  199. rx_user_status->first_data_seq_ctrl;
  200. rx_stats_peruser->frame_control_info_valid =
  201. rx_user_status->frame_control_info_valid;
  202. rx_stats_peruser->frame_control =
  203. rx_user_status->frame_control;
  204. rx_stats_peruser->tcp_msdu_count =
  205. rx_user_status->tcp_msdu_count;
  206. rx_stats_peruser->udp_msdu_count =
  207. rx_user_status->udp_msdu_count;
  208. rx_stats_peruser->other_msdu_count =
  209. rx_user_status->other_msdu_count;
  210. rx_stats_peruser->num_msdu =
  211. rx_stats_peruser->tcp_msdu_count +
  212. rx_stats_peruser->udp_msdu_count +
  213. rx_stats_peruser->other_msdu_count;
  214. rx_stats_peruser->preamble_type =
  215. rx_user_status->preamble_type;
  216. rx_stats_peruser->mpdu_cnt_fcs_ok =
  217. rx_user_status->mpdu_cnt_fcs_ok;
  218. rx_stats_peruser->mpdu_cnt_fcs_err =
  219. rx_user_status->mpdu_cnt_fcs_err;
  220. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  221. &rx_user_status->mpdu_fcs_ok_bitmap,
  222. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  223. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  224. rx_stats_peruser->mpdu_ok_byte_count =
  225. rx_user_status->mpdu_ok_byte_count;
  226. rx_stats_peruser->mpdu_err_byte_count =
  227. rx_user_status->mpdu_err_byte_count;
  228. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  229. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  230. rx_stats_peruser->retries =
  231. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  232. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  233. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  234. rx_stats_peruser->is_ampdu = 1;
  235. else
  236. rx_stats_peruser->is_ampdu = 0;
  237. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  238. qdf_mem_copy(rx_stats_peruser->mac_addr,
  239. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  240. rx_stats_peruser->peer_id = peer->peer_ids[0];
  241. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  242. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  243. rx_stats_peruser->mu_ul_info_valid = 0;
  244. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  245. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  246. if (rx_user_status->mu_ul_info_valid) {
  247. rx_stats_peruser->nss = rx_user_status->nss;
  248. rx_stats_peruser->mcs = rx_user_status->mcs;
  249. rx_stats_peruser->mu_ul_info_valid =
  250. rx_user_status->mu_ul_info_valid;
  251. rx_stats_peruser->ofdma_ru_start_index =
  252. rx_user_status->ofdma_ru_start_index;
  253. rx_stats_peruser->ofdma_ru_width =
  254. rx_user_status->ofdma_ru_width;
  255. rx_stats_peruser->user_index = i;
  256. ru_size = rx_user_status->ofdma_ru_size;
  257. /*
  258. * max RU size will be equal to
  259. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  260. */
  261. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  262. dp_err("invalid ru_size %d\n",
  263. ru_size);
  264. return;
  265. }
  266. is_data = dp_rx_inc_rusize_cnt(pdev,
  267. rx_user_status);
  268. }
  269. if (is_data) {
  270. /* counter to get number of MU OFDMA */
  271. pdev->stats.ul_ofdma.data_rx_ppdu++;
  272. pdev->stats.ul_ofdma.data_users[num_users]++;
  273. }
  274. }
  275. }
  276. }
  277. /**
  278. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  279. * @pdev: pdev ctx
  280. * @ppdu_info: ppdu info structure from ppdu ring
  281. * @cdp_rx_ppdu: Rx PPDU indication structure
  282. *
  283. * Return: none
  284. */
  285. static inline void
  286. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  287. struct hal_rx_ppdu_info *ppdu_info,
  288. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  289. {
  290. struct dp_peer *peer;
  291. struct dp_soc *soc = pdev->soc;
  292. struct dp_ast_entry *ast_entry;
  293. uint32_t ast_index;
  294. uint32_t i;
  295. cdp_rx_ppdu->first_data_seq_ctrl =
  296. ppdu_info->rx_status.first_data_seq_ctrl;
  297. cdp_rx_ppdu->frame_ctrl =
  298. ppdu_info->rx_status.frame_control;
  299. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  300. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  301. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  302. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  303. /* num mpdu is consolidated and added together in num user loop */
  304. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  305. /* num msdu is consolidated and added together in num user loop */
  306. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  307. cdp_rx_ppdu->udp_msdu_count +
  308. cdp_rx_ppdu->other_msdu_count);
  309. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  310. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  311. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  312. cdp_rx_ppdu->is_ampdu = 1;
  313. else
  314. cdp_rx_ppdu->is_ampdu = 0;
  315. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  316. ast_index = ppdu_info->rx_status.ast_index;
  317. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  318. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  319. cdp_rx_ppdu->num_users = 0;
  320. goto end;
  321. }
  322. ast_entry = soc->ast_table[ast_index];
  323. if (!ast_entry) {
  324. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  325. cdp_rx_ppdu->num_users = 0;
  326. goto end;
  327. }
  328. peer = ast_entry->peer;
  329. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  330. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  331. cdp_rx_ppdu->num_users = 0;
  332. goto end;
  333. }
  334. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  335. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  336. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  337. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  338. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  339. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  340. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  341. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  342. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  343. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  344. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  345. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  346. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  347. else
  348. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  349. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  350. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  351. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  352. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  353. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  354. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  355. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  356. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  357. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  358. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  359. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  360. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  361. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  362. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  363. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  364. for (i = 0; i < MAX_CHAIN; i++)
  365. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  366. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  367. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  368. cdp_rx_ppdu->num_mpdu = 0;
  369. cdp_rx_ppdu->num_msdu = 0;
  370. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  371. return;
  372. end:
  373. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  374. }
  375. #else
  376. static inline void
  377. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  378. struct hal_rx_ppdu_info *ppdu_info,
  379. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  380. {
  381. }
  382. #endif
  383. /**
  384. * dp_rx_stats_update() - Update per-peer statistics
  385. * @soc: Datapath SOC handle
  386. * @peer: Datapath peer handle
  387. * @ppdu: PPDU Descriptor
  388. *
  389. * Return: None
  390. */
  391. #ifdef FEATURE_PERPKT_INFO
  392. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  393. struct cdp_rx_indication_ppdu *ppdu,
  394. uint32_t user)
  395. {
  396. uint32_t ratekbps = 0;
  397. uint32_t ppdu_rx_rate = 0;
  398. uint32_t nss = 0;
  399. uint8_t mcs = 0;
  400. uint32_t rix;
  401. uint16_t ratecode;
  402. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  403. if (!peer || !ppdu)
  404. return;
  405. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  406. ppdu_user = &ppdu->user[user];
  407. if (ppdu_user->nss == 0)
  408. nss = 0;
  409. else
  410. nss = ppdu_user->nss - 1;
  411. mcs = ppdu_user->mcs;
  412. } else {
  413. mcs = ppdu->u.mcs;
  414. nss = ppdu->u.nss;
  415. }
  416. ratekbps = dp_getrateindex(ppdu->u.gi,
  417. mcs,
  418. nss,
  419. ppdu->u.preamble,
  420. ppdu->u.bw,
  421. &rix,
  422. &ratecode);
  423. if (!ratekbps)
  424. return;
  425. ppdu->rix = rix;
  426. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  427. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  428. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  429. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  430. ppdu->rx_ratekbps = ratekbps;
  431. ppdu->rx_ratecode = ratecode;
  432. if (peer->vdev)
  433. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  434. }
  435. static void dp_rx_stats_update(struct dp_pdev *pdev,
  436. struct cdp_rx_indication_ppdu *ppdu)
  437. {
  438. struct dp_soc *soc = NULL;
  439. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  440. uint16_t num_msdu;
  441. uint8_t pkt_bw_offset;
  442. struct dp_peer *peer;
  443. struct cdp_rx_stats_ppdu_user *ppdu_user;
  444. uint32_t i;
  445. enum cdp_mu_packet_type mu_pkt_type;
  446. if (pdev)
  447. soc = pdev->soc;
  448. else
  449. return;
  450. if (!soc || soc->process_rx_status)
  451. return;
  452. preamble = ppdu->u.preamble;
  453. ppdu_type = ppdu->u.ppdu_type;
  454. for (i = 0; i < ppdu->num_users; i++) {
  455. peer = NULL;
  456. ppdu_user = &ppdu->user[i];
  457. if (ppdu_user->peer_id != HTT_INVALID_PEER)
  458. peer = dp_peer_find_hash_find(soc, ppdu_user->mac_addr,
  459. 0, ppdu_user->vdev_id);
  460. if (!peer)
  461. peer = pdev->invalid_peer;
  462. ppdu->cookie = (void *)peer->wlanstats_ctx;
  463. if (ppdu_type == HAL_RX_TYPE_SU) {
  464. mcs = ppdu->u.mcs;
  465. nss = ppdu->u.nss;
  466. } else {
  467. mcs = ppdu_user->mcs;
  468. nss = ppdu_user->nss;
  469. }
  470. num_msdu = ppdu_user->num_msdu;
  471. switch (ppdu->u.bw) {
  472. case CMN_BW_20MHZ:
  473. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  474. break;
  475. case CMN_BW_40MHZ:
  476. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  477. break;
  478. case CMN_BW_80MHZ:
  479. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  480. break;
  481. case CMN_BW_160MHZ:
  482. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  483. break;
  484. default:
  485. pkt_bw_offset = 0;
  486. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  487. "Invalid BW index = %d", ppdu->u.bw);
  488. }
  489. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  490. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  491. peer->stats.rx.avg_rssi =
  492. CDP_RSSI_IN(peer->stats.rx.rssi);
  493. else
  494. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  495. peer->stats.rx.rssi);
  496. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  497. nss = 1;
  498. if (ppdu_type == HAL_RX_TYPE_SU) {
  499. if (nss) {
  500. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  501. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  502. }
  503. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  504. ppdu_user->mpdu_cnt_fcs_ok);
  505. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  506. ppdu_user->mpdu_cnt_fcs_err);
  507. }
  508. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  509. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  510. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  511. mu_pkt_type = RX_TYPE_MU_MIMO;
  512. else
  513. mu_pkt_type = RX_TYPE_MU_OFDMA;
  514. if (nss) {
  515. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  516. DP_STATS_INC(peer,
  517. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  518. 1);
  519. }
  520. DP_STATS_INC(peer,
  521. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  522. ppdu_user->mpdu_cnt_fcs_ok);
  523. DP_STATS_INC(peer,
  524. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  525. ppdu_user->mpdu_cnt_fcs_err);
  526. }
  527. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  528. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  529. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  530. num_msdu);
  531. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  532. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  533. ppdu_user->is_ampdu);
  534. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  535. !(ppdu_user->is_ampdu));
  536. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  537. DP_STATS_INCC(peer,
  538. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  539. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  540. DP_STATS_INCC(peer,
  541. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  542. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  543. DP_STATS_INCC(peer,
  544. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  545. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  546. DP_STATS_INCC(peer,
  547. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  548. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  549. DP_STATS_INCC(peer,
  550. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  551. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  552. DP_STATS_INCC(peer,
  553. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  554. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  555. DP_STATS_INCC(peer,
  556. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  557. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  558. DP_STATS_INCC(peer,
  559. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  560. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  561. DP_STATS_INCC(peer,
  562. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  563. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  564. DP_STATS_INCC(peer,
  565. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  566. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  567. DP_STATS_INCC(peer,
  568. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  569. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  570. (ppdu_type == HAL_RX_TYPE_SU)));
  571. DP_STATS_INCC(peer,
  572. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  573. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  574. (ppdu_type == HAL_RX_TYPE_SU)));
  575. DP_STATS_INCC(peer,
  576. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  577. 1, ((mcs >= (MAX_MCS - 1)) &&
  578. (preamble == DOT11_AX) &&
  579. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  580. DP_STATS_INCC(peer,
  581. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  582. 1, ((mcs < (MAX_MCS - 1)) &&
  583. (preamble == DOT11_AX) &&
  584. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  585. DP_STATS_INCC(peer,
  586. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  587. 1, ((mcs >= (MAX_MCS - 1)) &&
  588. (preamble == DOT11_AX) &&
  589. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  590. DP_STATS_INCC(peer,
  591. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  592. 1, ((mcs < (MAX_MCS - 1)) &&
  593. (preamble == DOT11_AX) &&
  594. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  595. /*
  596. * If invalid TID, it could be a non-qos frame, hence do not
  597. * update any AC counters
  598. */
  599. ac = TID_TO_WME_AC(ppdu_user->tid);
  600. if (ppdu->tid != HAL_TID_INVALID)
  601. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  602. dp_peer_stats_notify(pdev, peer);
  603. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  604. if (peer == pdev->invalid_peer)
  605. continue;
  606. if (dp_is_subtype_data(ppdu->frame_ctrl))
  607. dp_rx_rate_stats_update(peer, ppdu, i);
  608. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  609. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  610. &peer->stats, ppdu->peer_id,
  611. UPDATE_PEER_STATS, pdev->pdev_id);
  612. #endif
  613. dp_peer_unref_delete(peer);
  614. }
  615. }
  616. #endif
  617. /**
  618. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  619. * @soc: core txrx main context
  620. * @pdev: pdev structure
  621. * @ppdu_info: structure for rx ppdu ring
  622. * @nbuf: QDF nbuf
  623. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  624. * @deliver_frame: flag to deliver wdi event
  625. *
  626. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  627. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  628. */
  629. #ifdef FEATURE_PERPKT_INFO
  630. static inline QDF_STATUS
  631. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  632. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  633. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  634. {
  635. uint16_t size = 0;
  636. struct ieee80211_frame *wh;
  637. uint32_t *nbuf_data;
  638. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  639. return QDF_STATUS_SUCCESS;
  640. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  641. if (pdev->mcopy_mode == M_COPY) {
  642. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  643. return QDF_STATUS_SUCCESS;
  644. }
  645. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  646. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  647. qdf_nbuf_data(nbuf));
  648. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  649. return QDF_STATUS_SUCCESS;
  650. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  651. IEEE80211_FC0_TYPE_MGT) ||
  652. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  653. IEEE80211_FC0_TYPE_CTL)) {
  654. return QDF_STATUS_SUCCESS;
  655. }
  656. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  657. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  658. /* only retain RX MSDU payload in the skb */
  659. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  660. if (deliver_frame) {
  661. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  662. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  663. nbuf, HTT_INVALID_PEER,
  664. WDI_NO_VAL, pdev->pdev_id);
  665. }
  666. return QDF_STATUS_E_ALREADY;
  667. }
  668. #else
  669. static inline QDF_STATUS
  670. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  671. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  672. uint8_t fcs_ok_cnt, bool deliver_frame)
  673. {
  674. return QDF_STATUS_SUCCESS;
  675. }
  676. #endif
  677. /**
  678. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  679. * status buffer if MPDU end tlv is received in different buffer
  680. * @soc: core txrx main context
  681. * @pdev: pdev structure
  682. * @ppdu_info: structure for rx ppdu ring
  683. * @status_nbuf: QDF nbuf
  684. *
  685. * Return: void
  686. */
  687. #ifdef FEATURE_PERPKT_INFO
  688. static inline void
  689. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  690. struct hal_rx_ppdu_info *ppdu_info,
  691. qdf_nbuf_t status_nbuf)
  692. {
  693. QDF_STATUS mcopy_status;
  694. qdf_nbuf_t nbuf_clone = NULL;
  695. /* If the MPDU end tlv and RX header are received in different buffers,
  696. * process the RX header based on fcs status.
  697. */
  698. if (pdev->mcopy_status_nbuf) {
  699. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  700. if (pdev->mcopy_mode == M_COPY) {
  701. if (pdev->m_copy_id.rx_ppdu_id ==
  702. ppdu_info->com_info.ppdu_id)
  703. goto end1;
  704. }
  705. if (ppdu_info->is_fcs_passed) {
  706. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  707. if (!nbuf_clone) {
  708. QDF_TRACE(QDF_MODULE_ID_TXRX,
  709. QDF_TRACE_LEVEL_ERROR,
  710. "Failed to clone nbuf",
  711. __func__, __LINE__);
  712. goto end1;
  713. }
  714. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  715. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  716. nbuf_clone,
  717. HTT_INVALID_PEER,
  718. WDI_NO_VAL, pdev->pdev_id);
  719. ppdu_info->is_fcs_passed = false;
  720. }
  721. end1:
  722. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  723. pdev->mcopy_status_nbuf = NULL;
  724. }
  725. /* If the MPDU end tlv and RX header are received in different buffers,
  726. * preserve the RX header as the fcs status will be received in MPDU
  727. * end tlv in next buffer. So, cache the buffer to be processd in next
  728. * iteration
  729. */
  730. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  731. ppdu_info->com_info.mpdu_cnt) {
  732. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  733. if (pdev->mcopy_status_nbuf) {
  734. mcopy_status = dp_rx_handle_mcopy_mode(
  735. soc, pdev,
  736. ppdu_info,
  737. pdev->mcopy_status_nbuf,
  738. ppdu_info->fcs_ok_cnt,
  739. false);
  740. if (mcopy_status == QDF_STATUS_SUCCESS) {
  741. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  742. pdev->mcopy_status_nbuf = NULL;
  743. }
  744. }
  745. }
  746. }
  747. #else
  748. static inline void
  749. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  750. struct hal_rx_ppdu_info *ppdu_info,
  751. qdf_nbuf_t status_nbuf)
  752. {
  753. }
  754. #endif
  755. /**
  756. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  757. * @ppdu_info: structure for rx ppdu ring
  758. * @tlv_status: processed TLV status
  759. *
  760. * Return: void
  761. */
  762. #ifdef FEATURE_PERPKT_INFO
  763. static inline void
  764. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  765. struct hal_rx_ppdu_info *ppdu_info,
  766. uint32_t tlv_status)
  767. {
  768. if (!pdev->mcopy_mode)
  769. return;
  770. /* The fcs status is received in MPDU end tlv. If the RX header
  771. * and its MPDU end tlv are received in different status buffer then
  772. * to process that header ppdu_info->is_fcs_passed is used.
  773. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  774. * will be 0 at the time of receiving MPDU end tlv and we update the
  775. * is_fcs_passed flag based on ppdu_info->fcs_err.
  776. */
  777. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  778. return;
  779. if (!ppdu_info->fcs_err) {
  780. if (ppdu_info->fcs_ok_cnt >
  781. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  782. dp_err("No. of MPDUs(%d) per status buff exceeded",
  783. ppdu_info->fcs_ok_cnt);
  784. return;
  785. }
  786. if (ppdu_info->com_info.mpdu_cnt)
  787. ppdu_info->fcs_ok_cnt++;
  788. else
  789. ppdu_info->is_fcs_passed = true;
  790. } else {
  791. if (ppdu_info->com_info.mpdu_cnt)
  792. ppdu_info->fcs_err_cnt++;
  793. else
  794. ppdu_info->is_fcs_passed = false;
  795. }
  796. }
  797. #else
  798. static inline void
  799. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  800. struct hal_rx_ppdu_info *ppdu_info,
  801. uint32_t tlv_status)
  802. {
  803. }
  804. #endif
  805. #ifdef FEATURE_PERPKT_INFO
  806. static inline void
  807. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  808. struct hal_rx_ppdu_info *ppdu_info,
  809. uint32_t tlv_status,
  810. qdf_nbuf_t status_nbuf)
  811. {
  812. QDF_STATUS mcopy_status;
  813. qdf_nbuf_t nbuf_clone = NULL;
  814. uint8_t fcs_ok_mpdu_cnt = 0;
  815. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  816. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  817. goto end;
  818. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  819. goto end;
  820. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  821. if (pdev->mcopy_mode == M_COPY)
  822. ppdu_info->fcs_ok_cnt = 1;
  823. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  824. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  825. if (!nbuf_clone) {
  826. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  827. "Failed to clone nbuf",
  828. __func__, __LINE__);
  829. goto end;
  830. }
  831. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  832. ppdu_info,
  833. nbuf_clone,
  834. fcs_ok_mpdu_cnt,
  835. true);
  836. if (mcopy_status == QDF_STATUS_SUCCESS)
  837. qdf_nbuf_free(nbuf_clone);
  838. fcs_ok_mpdu_cnt++;
  839. }
  840. end:
  841. qdf_nbuf_free(status_nbuf);
  842. ppdu_info->fcs_ok_cnt = 0;
  843. ppdu_info->fcs_err_cnt = 0;
  844. ppdu_info->com_info.mpdu_cnt = 0;
  845. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  846. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  847. * sizeof(struct hal_rx_msdu_payload_info));
  848. }
  849. #else
  850. static inline void
  851. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  852. struct hal_rx_ppdu_info *ppdu_info,
  853. uint32_t tlv_status,
  854. qdf_nbuf_t status_nbuf)
  855. {
  856. }
  857. #endif
  858. /**
  859. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  860. * @soc: Datapath SOC handle
  861. * @pdev: Datapath PDEV handle
  862. * @ppdu_info: Structure for rx ppdu info
  863. * @nbuf: Qdf nbuf abstraction for linux skb
  864. *
  865. * Return: 0 on success, 1 on failure
  866. */
  867. static inline int
  868. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  869. struct hal_rx_ppdu_info *ppdu_info,
  870. qdf_nbuf_t nbuf)
  871. {
  872. uint8_t size = 0;
  873. if (!pdev->monitor_vdev) {
  874. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  875. "[%s]:[%d] Monitor vdev is NULL !!",
  876. __func__, __LINE__);
  877. return 1;
  878. }
  879. if (!ppdu_info->msdu_info.first_msdu_payload) {
  880. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  881. "[%s]:[%d] First msdu payload not present",
  882. __func__, __LINE__);
  883. return 1;
  884. }
  885. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  886. size = (ppdu_info->msdu_info.first_msdu_payload -
  887. qdf_nbuf_data(nbuf)) + 4;
  888. ppdu_info->msdu_info.first_msdu_payload = NULL;
  889. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  890. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  891. "[%s]:[%d] No header present",
  892. __func__, __LINE__);
  893. return 1;
  894. }
  895. /* Only retain RX MSDU payload in the skb */
  896. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  897. ppdu_info->msdu_info.payload_len);
  898. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  899. qdf_nbuf_headroom(nbuf))) {
  900. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  901. return 1;
  902. }
  903. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  904. nbuf, NULL);
  905. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  906. return 0;
  907. }
  908. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  909. /*
  910. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  911. * the PPDU received, this will be used for correlation of CFR data captured
  912. * for an UL-MU-PPDU
  913. * @pdev: pdev ctx
  914. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  915. * @cdp_rx_ppdu: Rx PPDU indication structure
  916. *
  917. * Return: none
  918. */
  919. static inline void
  920. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  921. struct hal_rx_ppdu_info *ppdu_info,
  922. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  923. {
  924. struct dp_peer *peer;
  925. struct dp_soc *soc = pdev->soc;
  926. struct dp_ast_entry *ast_entry;
  927. struct mon_rx_user_status *rx_user_status;
  928. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  929. uint32_t num_users;
  930. int user_id;
  931. uint32_t ast_index;
  932. qdf_spin_lock_bh(&soc->ast_lock);
  933. num_users = ppdu_info->com_info.num_users;
  934. for (user_id = 0; user_id < num_users; user_id++) {
  935. if (user_id > OFDMA_NUM_USERS) {
  936. qdf_spin_unlock_bh(&soc->ast_lock);
  937. return;
  938. }
  939. rx_user_status = &ppdu_info->rx_user_status[user_id];
  940. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  941. ast_index = rx_user_status->ast_index;
  942. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  943. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  944. continue;
  945. }
  946. ast_entry = soc->ast_table[ast_index];
  947. if (!ast_entry) {
  948. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  949. continue;
  950. }
  951. peer = ast_entry->peer;
  952. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  953. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  954. continue;
  955. }
  956. qdf_mem_copy(rx_stats_peruser->mac_addr,
  957. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  958. }
  959. qdf_spin_unlock_bh(&soc->ast_lock);
  960. }
  961. /*
  962. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  963. * info
  964. * @pdev: pdev ctx
  965. * @ppdu_info: ppdu info structure from ppdu ring
  966. * @cdp_rx_ppdu : Rx PPDU indication structure
  967. *
  968. * Return: none
  969. */
  970. static inline void
  971. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  972. struct hal_rx_ppdu_info *ppdu_info,
  973. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  974. {
  975. int chain;
  976. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  977. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  978. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  979. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  980. for (chain = 0; chain < MAX_CHAIN; chain++)
  981. cdp_rx_ppdu->per_chain_rssi[chain] =
  982. ppdu_info->rx_status.rssi[chain];
  983. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  984. }
  985. /**
  986. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  987. * @pdev: pdev ctx
  988. *
  989. * Return: True or False
  990. */
  991. static inline bool
  992. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  993. {
  994. return pdev->cfr_rcc_mode;
  995. }
  996. /*
  997. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  998. * @pdev: pdev ctx
  999. * @ppdu_info: ppdu info structure from ppdu ring
  1000. * @cdp_rx_ppdu: Rx PPDU indication structure
  1001. *
  1002. * Return: none
  1003. */
  1004. static inline void
  1005. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1006. struct hal_rx_ppdu_info *ppdu_info,
  1007. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1008. {
  1009. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1010. if (!dp_cfr_rcc_mode_status(pdev))
  1011. return;
  1012. cfr_info = &cdp_rx_ppdu->cfr_info;
  1013. cfr_info->bb_captured_channel
  1014. = ppdu_info->cfr_info.bb_captured_channel;
  1015. cfr_info->bb_captured_timeout
  1016. = ppdu_info->cfr_info.bb_captured_timeout;
  1017. cfr_info->bb_captured_reason
  1018. = ppdu_info->cfr_info.bb_captured_reason;
  1019. cfr_info->rx_location_info_valid
  1020. = ppdu_info->cfr_info.rx_location_info_valid;
  1021. cfr_info->chan_capture_status
  1022. = ppdu_info->cfr_info.chan_capture_status;
  1023. cfr_info->rtt_che_buffer_pointer_high8
  1024. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1025. cfr_info->rtt_che_buffer_pointer_low32
  1026. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1027. }
  1028. /**
  1029. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1030. * @pdev: pdev structure
  1031. * @ppdu_info: structure for rx ppdu ring
  1032. *
  1033. * Return: none
  1034. */
  1035. static inline void
  1036. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1037. struct hal_rx_ppdu_info *ppdu_info)
  1038. {
  1039. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1040. DP_STATS_INC(pdev,
  1041. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1042. if (cfr->rx_location_info_valid) {
  1043. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1044. if (cfr->bb_captured_channel) {
  1045. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1046. DP_STATS_INC(pdev,
  1047. rcc.reason_cnt[cfr->bb_captured_reason],
  1048. 1);
  1049. } else if (cfr->bb_captured_timeout) {
  1050. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1051. DP_STATS_INC(pdev,
  1052. rcc.reason_cnt[cfr->bb_captured_reason],
  1053. 1);
  1054. }
  1055. }
  1056. }
  1057. /*
  1058. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1059. * @soc: core txrx main context
  1060. * @pdev: pdev ctx
  1061. * @ppdu_info: ppdu info structure from ppdu ring
  1062. *
  1063. * Return: none
  1064. */
  1065. static inline void
  1066. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1067. struct hal_rx_ppdu_info *ppdu_info)
  1068. {
  1069. qdf_nbuf_t ppdu_nbuf;
  1070. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1071. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1072. if (!ppdu_info->cfr_info.bb_captured_channel)
  1073. return;
  1074. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1075. sizeof(struct cdp_rx_indication_ppdu),
  1076. 0,
  1077. 0,
  1078. FALSE);
  1079. if (ppdu_nbuf) {
  1080. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1081. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1082. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1083. qdf_nbuf_put_tail(ppdu_nbuf,
  1084. sizeof(struct cdp_rx_indication_ppdu));
  1085. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1086. ppdu_nbuf, HTT_INVALID_PEER,
  1087. WDI_NO_VAL, pdev->pdev_id);
  1088. }
  1089. }
  1090. /**
  1091. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1092. * non-associated stations
  1093. * @pdev: pdev ctx
  1094. * @ppdu_info: ppdu info structure from ppdu ring
  1095. * @cdp_rx_ppdu: Rx PPDU indication structure
  1096. *
  1097. * Return: none
  1098. */
  1099. static inline void
  1100. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1101. struct hal_rx_ppdu_info *ppdu_info,
  1102. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1103. {
  1104. if (!dp_cfr_rcc_mode_status(pdev))
  1105. return;
  1106. if (ppdu_info->cfr_info.bb_captured_channel)
  1107. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1108. }
  1109. /**
  1110. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1111. * @ppdu_info: structure for rx ppdu ring
  1112. *
  1113. * Return: Success/ Failure
  1114. */
  1115. static inline QDF_STATUS
  1116. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1117. struct hal_rx_ppdu_info *ppdu_info)
  1118. {
  1119. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1120. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1121. if (dp_cfr_rcc_mode_status(pdev)) {
  1122. if (cfr->bb_captured_channel)
  1123. status = QDF_STATUS_SUCCESS;
  1124. }
  1125. return status;
  1126. }
  1127. #else
  1128. static inline void
  1129. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1130. struct hal_rx_ppdu_info *ppdu_info,
  1131. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1132. {
  1133. }
  1134. static inline void
  1135. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1136. struct hal_rx_ppdu_info *ppdu_info,
  1137. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1138. {
  1139. }
  1140. static inline void
  1141. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1142. struct hal_rx_ppdu_info *ppdu_info,
  1143. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1144. {
  1145. }
  1146. static inline void
  1147. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1148. struct hal_rx_ppdu_info *ppdu_info)
  1149. {
  1150. }
  1151. static inline void
  1152. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1153. struct hal_rx_ppdu_info *ppdu_info,
  1154. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1155. {
  1156. }
  1157. static inline void
  1158. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1159. struct hal_rx_ppdu_info *ppdu_info)
  1160. {
  1161. }
  1162. static inline QDF_STATUS
  1163. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1164. struct hal_rx_ppdu_info *ppdu_info)
  1165. {
  1166. return QDF_STATUS_E_NOSUPPORT;
  1167. }
  1168. static inline bool
  1169. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1170. {
  1171. return false;
  1172. }
  1173. #endif
  1174. /**
  1175. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1176. * @soc: core txrx main context
  1177. * @pdev: pdev strcuture
  1178. * @ppdu_info: structure for rx ppdu ring
  1179. *
  1180. * Return: none
  1181. */
  1182. #ifdef FEATURE_PERPKT_INFO
  1183. static inline void
  1184. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1185. struct hal_rx_ppdu_info *ppdu_info)
  1186. {
  1187. qdf_nbuf_t ppdu_nbuf;
  1188. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1189. /*
  1190. * Do not allocate if fcs error,
  1191. * ast idx invalid / fctl invalid
  1192. *
  1193. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1194. */
  1195. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1196. return;
  1197. if (ppdu_info->nac_info.fc_valid &&
  1198. ppdu_info->nac_info.to_ds_flag &&
  1199. ppdu_info->nac_info.mac_addr2_valid) {
  1200. struct dp_neighbour_peer *peer = NULL;
  1201. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1202. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1203. if (pdev->neighbour_peers_added) {
  1204. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1205. neighbour_peer_list_elem) {
  1206. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1207. &ppdu_info->nac_info.mac_addr2,
  1208. QDF_MAC_ADDR_SIZE)) {
  1209. peer->rssi = rssi;
  1210. break;
  1211. }
  1212. }
  1213. }
  1214. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1215. }
  1216. /* need not generate wdi event when mcopy, cfr rcc mode and
  1217. * enhanced stats are not enabled
  1218. */
  1219. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1220. !dp_cfr_rcc_mode_status(pdev))
  1221. return;
  1222. if (dp_cfr_rcc_mode_status(pdev))
  1223. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1224. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1225. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1226. if (!(pdev->mcopy_mode ||
  1227. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1228. QDF_STATUS_SUCCESS)))
  1229. return;
  1230. }
  1231. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1232. sizeof(struct cdp_rx_indication_ppdu),
  1233. 0, 0, FALSE);
  1234. if (ppdu_nbuf) {
  1235. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1236. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1237. dp_rx_populate_cdp_indication_ppdu(pdev,
  1238. ppdu_info, cdp_rx_ppdu);
  1239. qdf_nbuf_put_tail(ppdu_nbuf,
  1240. sizeof(struct cdp_rx_indication_ppdu));
  1241. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1242. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1243. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1244. soc, ppdu_nbuf,
  1245. cdp_rx_ppdu->peer_id,
  1246. WDI_NO_VAL, pdev->pdev_id);
  1247. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1248. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1249. ppdu_nbuf, HTT_INVALID_PEER,
  1250. WDI_NO_VAL, pdev->pdev_id);
  1251. } else {
  1252. qdf_nbuf_free(ppdu_nbuf);
  1253. }
  1254. }
  1255. }
  1256. #else
  1257. static inline void
  1258. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1259. struct hal_rx_ppdu_info *ppdu_info)
  1260. {
  1261. }
  1262. #endif
  1263. /**
  1264. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1265. * filtering enabled
  1266. * @soc: core txrx main context
  1267. * @ppdu_info: Structure for rx ppdu info
  1268. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1269. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1270. *
  1271. * Return: none
  1272. */
  1273. static inline void
  1274. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1275. struct hal_rx_ppdu_info *ppdu_info,
  1276. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  1277. {
  1278. struct dp_peer *peer;
  1279. struct dp_ast_entry *ast_entry;
  1280. uint32_t ast_index;
  1281. ast_index = ppdu_info->rx_status.ast_index;
  1282. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1283. ast_entry = soc->ast_table[ast_index];
  1284. if (ast_entry) {
  1285. peer = ast_entry->peer;
  1286. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  1287. if (peer->peer_based_pktlog_filter) {
  1288. dp_wdi_event_handler(
  1289. WDI_EVENT_RX_DESC, soc,
  1290. status_nbuf,
  1291. peer->peer_ids[0],
  1292. WDI_NO_VAL, mac_id);
  1293. }
  1294. }
  1295. }
  1296. }
  1297. }
  1298. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1299. static inline void
  1300. dp_rx_ul_ofdma_ru_size_to_width(
  1301. uint32_t ru_size,
  1302. uint32_t *ru_width)
  1303. {
  1304. uint32_t width;
  1305. width = 0;
  1306. switch (ru_size) {
  1307. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1308. width = 1;
  1309. break;
  1310. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1311. width = 2;
  1312. break;
  1313. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1314. width = 4;
  1315. break;
  1316. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1317. width = 9;
  1318. break;
  1319. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1320. width = 18;
  1321. break;
  1322. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1323. width = 37;
  1324. break;
  1325. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1326. width = 74;
  1327. break;
  1328. default:
  1329. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1330. "RU size to width convert err");
  1331. break;
  1332. }
  1333. *ru_width = width;
  1334. }
  1335. static inline void
  1336. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1337. {
  1338. struct mon_rx_user_status *mon_rx_user_status;
  1339. uint32_t num_users;
  1340. uint32_t i;
  1341. uint32_t mu_ul_user_v0_word0;
  1342. uint32_t mu_ul_user_v0_word1;
  1343. uint32_t ru_width;
  1344. uint32_t ru_size;
  1345. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1346. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1347. return;
  1348. num_users = ppdu_info->com_info.num_users;
  1349. if (num_users > HAL_MAX_UL_MU_USERS)
  1350. num_users = HAL_MAX_UL_MU_USERS;
  1351. for (i = 0; i < num_users; i++) {
  1352. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1353. mu_ul_user_v0_word0 =
  1354. mon_rx_user_status->mu_ul_user_v0_word0;
  1355. mu_ul_user_v0_word1 =
  1356. mon_rx_user_status->mu_ul_user_v0_word1;
  1357. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1358. mu_ul_user_v0_word0) &&
  1359. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1360. mu_ul_user_v0_word0)) {
  1361. mon_rx_user_status->mcs =
  1362. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1363. mu_ul_user_v0_word1);
  1364. mon_rx_user_status->nss =
  1365. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1366. mu_ul_user_v0_word1) + 1;
  1367. mon_rx_user_status->mu_ul_info_valid = 1;
  1368. mon_rx_user_status->ofdma_ru_start_index =
  1369. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1370. mu_ul_user_v0_word1);
  1371. ru_size =
  1372. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1373. mu_ul_user_v0_word1);
  1374. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1375. mon_rx_user_status->ofdma_ru_width = ru_width;
  1376. mon_rx_user_status->ofdma_ru_size = ru_size;
  1377. }
  1378. }
  1379. }
  1380. #else
  1381. static inline void
  1382. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1383. {
  1384. }
  1385. #endif
  1386. /**
  1387. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1388. * buffer on Rx status Queue posted by status SRNG processing.
  1389. * @soc: core txrx main context
  1390. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1391. *
  1392. * Return: none
  1393. */
  1394. static inline void
  1395. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  1396. uint32_t quota)
  1397. {
  1398. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1399. struct hal_rx_ppdu_info *ppdu_info;
  1400. qdf_nbuf_t status_nbuf;
  1401. uint8_t *rx_tlv;
  1402. uint8_t *rx_tlv_start;
  1403. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1404. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1405. struct cdp_pdev_mon_stats *rx_mon_stats;
  1406. int smart_mesh_status;
  1407. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1408. bool nbuf_used;
  1409. uint32_t rx_enh_capture_mode;
  1410. if (!pdev) {
  1411. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1412. "pdev is null for mac_id = %d", mac_id);
  1413. return;
  1414. }
  1415. ppdu_info = &pdev->ppdu_info;
  1416. rx_mon_stats = &pdev->rx_mon_stats;
  1417. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1418. return;
  1419. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1420. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1421. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1422. rx_tlv = qdf_nbuf_data(status_nbuf);
  1423. rx_tlv_start = rx_tlv;
  1424. nbuf_used = false;
  1425. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1426. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1427. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1428. do {
  1429. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1430. ppdu_info, pdev->soc->hal_soc,
  1431. status_nbuf);
  1432. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1433. rx_mon_stats);
  1434. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1435. status_nbuf, ppdu_info,
  1436. &nbuf_used);
  1437. dp_rx_mcopy_process_ppdu_info(pdev,
  1438. ppdu_info,
  1439. tlv_status);
  1440. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1441. if ((rx_tlv - rx_tlv_start) >=
  1442. RX_DATA_BUFFER_SIZE)
  1443. break;
  1444. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1445. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1446. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1447. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1448. }
  1449. if (pdev->dp_peer_based_pktlog) {
  1450. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1451. status_nbuf, mac_id);
  1452. } else {
  1453. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1454. pktlog_mode = WDI_EVENT_RX_DESC;
  1455. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1456. pktlog_mode = WDI_EVENT_LITE_RX;
  1457. if (pktlog_mode != WDI_NO_VAL)
  1458. dp_wdi_event_handler(pktlog_mode, soc,
  1459. status_nbuf,
  1460. HTT_INVALID_PEER,
  1461. WDI_NO_VAL, mac_id);
  1462. }
  1463. /* smart monitor vap and m_copy cannot co-exist */
  1464. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1465. && pdev->monitor_vdev) {
  1466. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1467. pdev, ppdu_info, status_nbuf);
  1468. if (smart_mesh_status)
  1469. qdf_nbuf_free(status_nbuf);
  1470. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1471. dp_rx_process_mcopy_mode(soc, pdev,
  1472. ppdu_info, tlv_status,
  1473. status_nbuf);
  1474. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1475. if (!nbuf_used)
  1476. qdf_nbuf_free(status_nbuf);
  1477. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1478. enh_log_status =
  1479. dp_rx_handle_enh_capture(soc,
  1480. pdev, ppdu_info);
  1481. } else {
  1482. qdf_nbuf_free(status_nbuf);
  1483. }
  1484. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1485. dp_rx_mon_deliver_non_std(soc, mac_id);
  1486. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1487. rx_mon_stats->status_ppdu_done++;
  1488. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1489. if (pdev->tx_capture_enabled
  1490. != CDP_TX_ENH_CAPTURE_DISABLED)
  1491. dp_send_ack_frame_to_stack(soc, pdev,
  1492. ppdu_info);
  1493. if (pdev->enhanced_stats_en ||
  1494. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1495. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1496. else if (dp_cfr_rcc_mode_status(pdev))
  1497. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1498. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1499. /*
  1500. * if chan_num is not fetched correctly from ppdu RX TLV,
  1501. * get it from pdev saved.
  1502. */
  1503. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1504. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1505. /*
  1506. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1507. * get it from pdev saved.
  1508. */
  1509. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1510. pdev->ppdu_info.rx_status.chan_freq =
  1511. pdev->mon_chan_freq;
  1512. }
  1513. if (!soc->full_mon_mode)
  1514. dp_rx_mon_dest_process(soc, mac_id, quota);
  1515. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1516. }
  1517. }
  1518. return;
  1519. }
  1520. /*
  1521. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1522. * post the status ring buffer to Rx status Queue for later
  1523. * processing when status ring is filled with status TLV.
  1524. * Allocate a new buffer to status ring if the filled buffer
  1525. * is posted.
  1526. *
  1527. * @soc: core txrx main context
  1528. * @mac_id: mac_id which is one of 3 mac_ids
  1529. * @quota: No. of ring entry that can be serviced in one shot.
  1530. * Return: uint32_t: No. of ring entry that is processed.
  1531. */
  1532. static inline uint32_t
  1533. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  1534. uint32_t quota)
  1535. {
  1536. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1537. hal_soc_handle_t hal_soc;
  1538. void *mon_status_srng;
  1539. void *rxdma_mon_status_ring_entry;
  1540. QDF_STATUS status;
  1541. uint32_t work_done = 0;
  1542. if (!pdev) {
  1543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1544. "pdev is null for mac_id = %d", mac_id);
  1545. return work_done;
  1546. }
  1547. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1548. qdf_assert(mon_status_srng);
  1549. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1550. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1551. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1552. __func__, __LINE__, mon_status_srng);
  1553. return work_done;
  1554. }
  1555. hal_soc = soc->hal_soc;
  1556. qdf_assert(hal_soc);
  1557. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  1558. goto done;
  1559. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1560. * BUFFER_ADDR_INFO STRUCT
  1561. */
  1562. while (qdf_likely((rxdma_mon_status_ring_entry =
  1563. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1564. && quota--)) {
  1565. uint32_t rx_buf_cookie;
  1566. qdf_nbuf_t status_nbuf;
  1567. struct dp_rx_desc *rx_desc;
  1568. uint8_t *status_buf;
  1569. qdf_dma_addr_t paddr;
  1570. uint64_t buf_addr;
  1571. struct rx_desc_pool *rx_desc_pool;
  1572. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1573. buf_addr =
  1574. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1575. rxdma_mon_status_ring_entry) |
  1576. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1577. rxdma_mon_status_ring_entry)) << 32));
  1578. if (qdf_likely(buf_addr)) {
  1579. rx_buf_cookie =
  1580. HAL_RX_BUF_COOKIE_GET(
  1581. rxdma_mon_status_ring_entry);
  1582. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1583. rx_buf_cookie);
  1584. qdf_assert(rx_desc);
  1585. status_nbuf = rx_desc->nbuf;
  1586. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1587. QDF_DMA_FROM_DEVICE);
  1588. status_buf = qdf_nbuf_data(status_nbuf);
  1589. status = hal_get_rx_status_done(status_buf);
  1590. if (status != QDF_STATUS_SUCCESS) {
  1591. uint32_t hp, tp;
  1592. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1593. &tp, &hp);
  1594. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1595. hp, tp);
  1596. pdev->rx_mon_stats.tlv_tag_status_err++;
  1597. /* RxDMA status done bit might not be set even
  1598. * though tp is moved by HW.
  1599. * So Hold on to current entry on
  1600. * monitor status ring
  1601. */
  1602. /* If done status is missing, hold onto status
  1603. * ring until status is done for this status
  1604. * ring buffer.
  1605. * Keep HP in mon_status_ring unchanged,
  1606. * and break from here.
  1607. * Check status for same buffer for next time
  1608. * dp_rx_mon_status_srng_process
  1609. */
  1610. break;
  1611. }
  1612. qdf_nbuf_set_pktlen(status_nbuf, RX_DATA_BUFFER_SIZE);
  1613. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1614. QDF_DMA_FROM_DEVICE,
  1615. rx_desc_pool->buf_size);
  1616. /* Put the status_nbuf to queue */
  1617. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1618. } else {
  1619. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1620. union dp_rx_desc_list_elem_t *tail = NULL;
  1621. uint32_t num_alloc_desc;
  1622. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1623. rx_desc_pool,
  1624. 1,
  1625. &desc_list,
  1626. &tail);
  1627. /*
  1628. * No free descriptors available
  1629. */
  1630. if (qdf_unlikely(num_alloc_desc == 0)) {
  1631. work_done++;
  1632. break;
  1633. }
  1634. rx_desc = &desc_list->rx_desc;
  1635. }
  1636. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1637. /*
  1638. * qdf_nbuf alloc or map failed,
  1639. * free the dp rx desc to free list,
  1640. * fill in NULL dma address at current HP entry,
  1641. * keep HP in mon_status_ring unchanged,
  1642. * wait next time dp_rx_mon_status_srng_process
  1643. * to fill in buffer at current HP.
  1644. */
  1645. if (qdf_unlikely(!status_nbuf)) {
  1646. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1647. union dp_rx_desc_list_elem_t *tail = NULL;
  1648. struct rx_desc_pool *rx_desc_pool;
  1649. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1650. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1651. "%s: fail to allocate or map qdf_nbuf",
  1652. __func__);
  1653. dp_rx_add_to_free_desc_list(&desc_list,
  1654. &tail, rx_desc);
  1655. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1656. &tail, mac_id, rx_desc_pool);
  1657. hal_rxdma_buff_addr_info_set(
  1658. rxdma_mon_status_ring_entry,
  1659. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1660. work_done++;
  1661. break;
  1662. }
  1663. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1664. rx_desc->nbuf = status_nbuf;
  1665. rx_desc->in_use = 1;
  1666. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1667. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1668. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1669. work_done++;
  1670. }
  1671. done:
  1672. hal_srng_access_end(hal_soc, mon_status_srng);
  1673. return work_done;
  1674. }
  1675. /*
  1676. * dp_rx_mon_status_process() - Process monitor status ring and
  1677. * TLV in status ring.
  1678. *
  1679. * @soc: core txrx main context
  1680. * @mac_id: mac_id which is one of 3 mac_ids
  1681. * @quota: No. of ring entry that can be serviced in one shot.
  1682. * Return: uint32_t: No. of ring entry that is processed.
  1683. */
  1684. uint32_t
  1685. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1686. uint32_t work_done;
  1687. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  1688. quota -= work_done;
  1689. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  1690. return work_done;
  1691. }
  1692. /**
  1693. * dp_mon_process() - Main monitor mode processing roution.
  1694. * This call monitor status ring process then monitor
  1695. * destination ring process.
  1696. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1697. * @soc: core txrx main context
  1698. * @mac_id: mac_id which is one of 3 mac_ids
  1699. * @quota: No. of status ring entry that can be serviced in one shot.
  1700. * Return: uint32_t: No. of ring entry that is processed.
  1701. */
  1702. uint32_t
  1703. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  1704. if (qdf_unlikely(soc->full_mon_mode))
  1705. return dp_rx_mon_process(soc, mac_id, quota);
  1706. return dp_rx_mon_status_process(soc, mac_id, quota);
  1707. }
  1708. /**
  1709. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  1710. * @pdev: core txrx pdev context
  1711. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1712. *
  1713. * This function will detach DP RX status ring from
  1714. * main device context. will free DP Rx resources for
  1715. * status ring
  1716. *
  1717. * Return: QDF_STATUS_SUCCESS: success
  1718. * QDF_STATUS_E_RESOURCES: Error return
  1719. */
  1720. QDF_STATUS
  1721. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  1722. {
  1723. struct dp_soc *soc = pdev->soc;
  1724. struct rx_desc_pool *rx_desc_pool;
  1725. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1726. if (rx_desc_pool->pool_size != 0) {
  1727. if (!dp_is_soc_reinit(soc))
  1728. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1729. rx_desc_pool);
  1730. else
  1731. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1732. }
  1733. return QDF_STATUS_SUCCESS;
  1734. }
  1735. /*
  1736. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1737. * rx nbufs called during dp rx
  1738. * monitor status ring initialization
  1739. *
  1740. * @soc: core txrx main context
  1741. * @mac_id: mac_id which is one of 3 mac_ids
  1742. * @dp_rxdma_srng: dp monitor status circular ring
  1743. * @rx_desc_pool; Pointer to Rx descriptor pool
  1744. * @num_req_buffers: number of buffer to be replenished
  1745. * @desc_list: list of descs if called from dp rx monitor status
  1746. * process or NULL during dp rx initialization or
  1747. * out of buffer interrupt
  1748. * @tail: tail of descs list
  1749. * @owner: who owns the nbuf (host, NSS etc...)
  1750. * Return: return success or failure
  1751. */
  1752. static inline
  1753. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1754. uint32_t mac_id,
  1755. struct dp_srng *dp_rxdma_srng,
  1756. struct rx_desc_pool *rx_desc_pool,
  1757. uint32_t num_req_buffers,
  1758. union dp_rx_desc_list_elem_t **desc_list,
  1759. union dp_rx_desc_list_elem_t **tail,
  1760. uint8_t owner)
  1761. {
  1762. uint32_t num_alloc_desc;
  1763. uint16_t num_desc_to_free = 0;
  1764. uint32_t num_entries_avail;
  1765. uint32_t count = 0;
  1766. int sync_hw_ptr = 1;
  1767. qdf_dma_addr_t paddr;
  1768. qdf_nbuf_t rx_netbuf;
  1769. void *rxdma_ring_entry;
  1770. union dp_rx_desc_list_elem_t *next;
  1771. void *rxdma_srng;
  1772. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1773. if (!dp_pdev) {
  1774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1775. "pdev is null for mac_id = %d", mac_id);
  1776. return QDF_STATUS_E_FAILURE;
  1777. }
  1778. rxdma_srng = dp_rxdma_srng->hal_srng;
  1779. qdf_assert(rxdma_srng);
  1780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1781. "[%s][%d] requested %d buffers for replenish",
  1782. __func__, __LINE__, num_req_buffers);
  1783. /*
  1784. * if desc_list is NULL, allocate the descs from freelist
  1785. */
  1786. if (!(*desc_list)) {
  1787. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1788. rx_desc_pool,
  1789. num_req_buffers,
  1790. desc_list,
  1791. tail);
  1792. if (!num_alloc_desc) {
  1793. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1794. "[%s][%d] no free rx_descs in freelist",
  1795. __func__, __LINE__);
  1796. return QDF_STATUS_E_NOMEM;
  1797. }
  1798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1799. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1800. num_alloc_desc);
  1801. num_req_buffers = num_alloc_desc;
  1802. }
  1803. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1804. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1805. rxdma_srng, sync_hw_ptr);
  1806. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1807. "[%s][%d] no of available entries in rxdma ring: %d",
  1808. __func__, __LINE__, num_entries_avail);
  1809. if (num_entries_avail < num_req_buffers) {
  1810. num_desc_to_free = num_req_buffers - num_entries_avail;
  1811. num_req_buffers = num_entries_avail;
  1812. }
  1813. while (count <= num_req_buffers) {
  1814. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1815. /*
  1816. * qdf_nbuf alloc or map failed,
  1817. * keep HP in mon_status_ring unchanged,
  1818. * wait dp_rx_mon_status_srng_process
  1819. * to fill in buffer at current HP.
  1820. */
  1821. if (qdf_unlikely(!rx_netbuf)) {
  1822. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1823. "%s: qdf_nbuf allocate or map fail, count %d",
  1824. __func__, count);
  1825. break;
  1826. }
  1827. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1828. next = (*desc_list)->next;
  1829. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  1830. dp_soc->hal_soc,
  1831. rxdma_srng);
  1832. if (qdf_unlikely(!rxdma_ring_entry)) {
  1833. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1834. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1835. __func__, __LINE__, count);
  1836. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  1837. QDF_DMA_FROM_DEVICE,
  1838. rx_desc_pool->buf_size);
  1839. qdf_nbuf_free(rx_netbuf);
  1840. break;
  1841. }
  1842. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1843. (*desc_list)->rx_desc.in_use = 1;
  1844. count++;
  1845. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1846. (*desc_list)->rx_desc.cookie, owner);
  1847. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1848. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1849. paddr=%pK",
  1850. __func__, __LINE__, &(*desc_list)->rx_desc,
  1851. (*desc_list)->rx_desc.cookie, rx_netbuf,
  1852. (void *)paddr);
  1853. *desc_list = next;
  1854. }
  1855. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1857. "successfully replenished %d buffers", num_req_buffers);
  1858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1859. "%d rx desc added back to free list", num_desc_to_free);
  1860. /*
  1861. * add any available free desc back to the free list
  1862. */
  1863. if (*desc_list) {
  1864. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1865. mac_id, rx_desc_pool);
  1866. }
  1867. return QDF_STATUS_SUCCESS;
  1868. }
  1869. /**
  1870. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  1871. * @pdev: core txrx pdev context
  1872. * @ring_id: ring number
  1873. * This function will attach a DP RX monitor status ring into pDEV
  1874. * and replenish monitor status ring with buffer.
  1875. *
  1876. * Return: QDF_STATUS_SUCCESS: success
  1877. * QDF_STATUS_E_RESOURCES: Error return
  1878. */
  1879. QDF_STATUS
  1880. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  1881. struct dp_soc *soc = pdev->soc;
  1882. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1883. union dp_rx_desc_list_elem_t *tail = NULL;
  1884. struct dp_srng *mon_status_ring;
  1885. uint32_t num_entries;
  1886. uint32_t i;
  1887. struct rx_desc_pool *rx_desc_pool;
  1888. QDF_STATUS status;
  1889. mon_status_ring = &soc->rxdma_mon_status_ring[ring_id];
  1890. num_entries = mon_status_ring->num_entries;
  1891. rx_desc_pool = &soc->rx_desc_status[ring_id];
  1892. dp_info("Mon RX Status Pool[%d] entries=%d",
  1893. ring_id, num_entries);
  1894. if (!dp_is_soc_reinit(soc)) {
  1895. status = dp_rx_desc_pool_alloc(soc, num_entries + 1,
  1896. rx_desc_pool);
  1897. if (!QDF_IS_STATUS_SUCCESS(status))
  1898. return status;
  1899. }
  1900. dp_rx_desc_pool_init(soc, ring_id, num_entries + 1, rx_desc_pool);
  1901. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  1902. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1903. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  1904. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  1905. mon_status_ring,
  1906. rx_desc_pool,
  1907. num_entries,
  1908. &desc_list, &tail,
  1909. HAL_RX_BUF_RBM_SW3_BM);
  1910. if (!QDF_IS_STATUS_SUCCESS(status))
  1911. return status;
  1912. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1913. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1914. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  1915. sizeof(pdev->ppdu_info.rx_status));
  1916. qdf_mem_zero(&pdev->rx_mon_stats,
  1917. sizeof(pdev->rx_mon_stats));
  1918. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1919. &pdev->rx_mon_stats);
  1920. for (i = 0; i < MAX_MU_USERS; i++) {
  1921. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1922. pdev->is_mpdu_hdr[i] = true;
  1923. }
  1924. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1925. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1926. return QDF_STATUS_SUCCESS;
  1927. }