sw_monitor_ring.h 33 KB

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  1. /*
  2. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _SW_MONITOR_RING_H_
  17. #define _SW_MONITOR_RING_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #include "rx_mpdu_details.h"
  21. #include "buffer_addr_info.h"
  22. // ################ START SUMMARY #################
  23. //
  24. // Dword Fields
  25. // 0-3 struct rx_mpdu_details reo_level_mpdu_frame_info;
  26. // 4-5 struct buffer_addr_info status_buff_addr_info;
  27. // 6 rxdma_push_reason[1:0], rxdma_error_code[6:2], mpdu_fragment_number[10:7], frameless_bar[11], status_buf_count[15:12], end_of_ppdu[16], reserved_6a[31:17]
  28. // 7 phy_ppdu_id[15:0], reserved_7a[19:16], ring_id[27:20], looping_count[31:28]
  29. //
  30. // ################ END SUMMARY #################
  31. #define NUM_OF_DWORDS_SW_MONITOR_RING 8
  32. struct sw_monitor_ring {
  33. struct rx_mpdu_details reo_level_mpdu_frame_info;
  34. struct buffer_addr_info status_buff_addr_info;
  35. uint32_t rxdma_push_reason : 2, //[1:0]
  36. rxdma_error_code : 5, //[6:2]
  37. mpdu_fragment_number : 4, //[10:7]
  38. frameless_bar : 1, //[11]
  39. status_buf_count : 4, //[15:12]
  40. end_of_ppdu : 1, //[16]
  41. reserved_6a : 15; //[31:17]
  42. uint32_t phy_ppdu_id : 16, //[15:0]
  43. reserved_7a : 4, //[19:16]
  44. ring_id : 8, //[27:20]
  45. looping_count : 4; //[31:28]
  46. };
  47. /*
  48. struct rx_mpdu_details reo_level_mpdu_frame_info
  49. Consumer: SW
  50. Producer: RXDMA
  51. Details related to the MPDU being pushed to SW, valid
  52. only if end_of_ppdu is set to 0
  53. struct buffer_addr_info status_buff_addr_info
  54. Consumer: SW
  55. Producer: RXDMA
  56. Details of the physical address of the first status
  57. buffer used for the PPDU (either the PPDU that included the
  58. MPDU being pushed to SW if end_of_ppdu = 0, or the PPDU
  59. whose end is indicated through end_of_ppdu = 1)
  60. rxdma_push_reason
  61. Indicates why RXDMA pushed the frame to this ring
  62. <enum 0 rxdma_error_detected> RXDMA detected an error an
  63. pushed this frame to this queue
  64. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  65. frame to this queue per received routing instructions. No
  66. error within RXDMA was detected
  67. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  68. result the MSDU link descriptor might not have the
  69. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  70. NULL pointer in the MSDU link descriptor. This is to be
  71. considered a normal condition for this scenario.
  72. <legal 0 - 2>
  73. rxdma_error_code
  74. Field only valid when rxdma_push_reason is set to
  75. 'rxdma_error_detected.'
  76. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  77. due to a FIFO overflow error in RXPCU.
  78. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  79. due to receiving incomplete MPDU from the PHY
  80. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  81. error or CRYPTO received an encrypted frame, but did not get
  82. a valid corresponding key id in the peer entry.
  83. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  84. error
  85. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  86. unencrypted frame error when encrypted was expected
  87. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  88. length error
  89. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  90. number of MSDUs allowed in an MPDU got exceeded
  91. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  92. error
  93. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  94. parsing error
  95. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  96. during SA search
  97. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  98. during DA search
  99. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  100. timeout during flow search
  101. <enum 13 rxdma_flush_request>RXDMA received a flush
  102. request
  103. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  104. present as well as a fragmented MPDU. A-MSDU defragmentation
  105. is not supported in Lithium SW so this is treated as an
  106. error.
  107. mpdu_fragment_number
  108. Field only valid when Reo_level_mpdu_frame_info.
  109. Rx_mpdu_desc_info_details.Fragment_flag is set and
  110. end_of_ppdu is set to 0.
  111. The fragment number from the 802.11 header.
  112. Note that the sequence number is embedded in the field:
  113. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  114. Mpdu_sequence_number
  115. <legal all>
  116. frameless_bar
  117. When set, this SW monitor ring struct contains BAR info
  118. from a multi TID BAR frame. The original multi TID BAR frame
  119. itself contained all the REO info for the first TID, but all
  120. the subsequent TID info and their linkage to the REO
  121. descriptors is passed down as 'frameless' BAR info.
  122. The only fields valid in this descriptor when this bit
  123. is within the
  124. Reo_level_mpdu_frame_info:
  125. Within Rx_mpdu_desc_info_details:
  126. Mpdu_Sequence_number
  127. BAR_frame
  128. Peer_meta_data
  129. All other fields shall be set to 0.
  130. <legal all>
  131. status_buf_count
  132. A count of status buffers used so far for the PPDU
  133. (either the PPDU that included the MPDU being pushed to SW
  134. if end_of_ppdu = 0, or the PPDU whose end is indicated
  135. through end_of_ppdu = 1)
  136. end_of_ppdu
  137. Pine RXDMA can be configured to generate a separate
  138. 'SW_MONITOR_RING' descriptor at the end of a PPDU (either
  139. through an 'RX_PPDU_END' TLV or through an 'RX_FLUSH') to
  140. demarcate PPDUs.
  141. For such a descriptor, this bit is set to 1 and fields
  142. Reo_level_mpdu_frame_info, mpdu_fragment_number and
  143. Frameless_bar are all set to 0.
  144. Otherwise this bit is set to 0.
  145. reserved_6a
  146. <legal 0>
  147. phy_ppdu_id
  148. A PPDU counter value that PHY increments for every PPDU
  149. received
  150. The counter value wraps around. Pine RXDMA can be
  151. configured to copy this from the RX_PPDU_START TLV for every
  152. output descriptor.
  153. <legal all>
  154. reserved_7a
  155. <legal 0>
  156. ring_id
  157. Consumer: SW/REO/DEBUG
  158. Producer: SRNG (of RXDMA)
  159. For debugging.
  160. This field is filled in by the SRNG module.
  161. It help to identify the ring that is being looked <legal
  162. all>
  163. looping_count
  164. Consumer: SW/REO/DEBUG
  165. Producer: SRNG (of RXDMA)
  166. For debugging.
  167. This field is filled in by the SRNG module.
  168. A count value that indicates the number of times the
  169. producer of entries into this Ring has looped around the
  170. ring.
  171. At initialization time, this value is set to 0. On the
  172. first loop, this value is set to 1. After the max value is
  173. reached allowed by the number of bits for this field, the
  174. count value continues with 0 again.
  175. In case SW is the consumer of the ring entries, it can
  176. use this field to figure out up to where the producer of
  177. entries has created new entries. This eliminates the need to
  178. check where the head pointer' of the ring is located once
  179. the SW starts processing an interrupt indicating that new
  180. entries have been put into this ring...
  181. Also note that SW if it wants only needs to look at the
  182. LSB bit of this count value.
  183. <legal all>
  184. */
  185. /* EXTERNAL REFERENCE : struct rx_mpdu_details reo_level_mpdu_frame_info */
  186. /* EXTERNAL REFERENCE : struct buffer_addr_info msdu_link_desc_addr_info */
  187. /* Description SW_MONITOR_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  188. Address (lower 32 bits) of the MSDU buffer OR
  189. MSDU_EXTENSION descriptor OR Link Descriptor
  190. In case of 'NULL' pointer, this field is set to 0
  191. <legal all>
  192. */
  193. #define SW_MONITOR_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  194. #define SW_MONITOR_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  195. #define SW_MONITOR_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  196. /* Description SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  197. Address (upper 8 bits) of the MSDU buffer OR
  198. MSDU_EXTENSION descriptor OR Link Descriptor
  199. In case of 'NULL' pointer, this field is set to 0
  200. <legal all>
  201. */
  202. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  203. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  204. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  205. /* Description SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  206. Consumer: WBM
  207. Producer: SW/FW
  208. In case of 'NULL' pointer, this field is set to 0
  209. Indicates to which buffer manager the buffer OR
  210. MSDU_EXTENSION descriptor OR link descriptor that is being
  211. pointed to shall be returned after the frame has been
  212. processed. It is used by WBM for routing purposes.
  213. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  214. to the WMB buffer idle list
  215. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  216. returned to the WMB idle link descriptor idle list
  217. <enum 2 FW_BM> This buffer shall be returned to the FW
  218. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  219. ring 0
  220. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  221. ring 1
  222. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  223. ring 2
  224. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  225. ring 3
  226. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  227. ring 4
  228. <legal all>
  229. */
  230. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  231. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  232. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  233. /* Description SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  234. Cookie field exclusively used by SW.
  235. In case of 'NULL' pointer, this field is set to 0
  236. HW ignores the contents, accept that it passes the
  237. programmed value on to other descriptors together with the
  238. physical address
  239. Field can be used by SW to for example associate the
  240. buffers physical address with the virtual address
  241. The bit definitions as used by SW are within SW HLD
  242. specification
  243. NOTE:
  244. The three most significant bits can have a special
  245. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  246. STRUCT, and field transmit_bw_restriction is set
  247. In case of NON punctured transmission:
  248. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  249. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  250. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  251. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  252. In case of punctured transmission:
  253. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  254. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  255. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  256. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  257. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  258. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  259. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  260. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  261. Note: a punctured transmission is indicated by the
  262. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  263. TLV
  264. <legal all>
  265. */
  266. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  267. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  268. #define SW_MONITOR_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  269. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  270. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  271. Consumer: REO/SW/FW
  272. Producer: RXDMA
  273. The number of MSDUs within the MPDU
  274. <legal all>
  275. */
  276. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  277. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  278. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  279. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  280. Consumer: REO/SW/FW
  281. Producer: RXDMA
  282. The field can have two different meanings based on the
  283. setting of field 'BAR_frame':
  284. 'BAR_frame' is NOT set:
  285. The MPDU sequence number of the received frame.
  286. 'BAR_frame' is set.
  287. The MPDU Start sequence number from the BAR frame
  288. <legal all>
  289. */
  290. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  291. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  292. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  293. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  294. Consumer: REO/SW/FW
  295. Producer: RXDMA
  296. When set, this MPDU is a fragment and REO should forward
  297. this fragment MPDU to the REO destination ring without any
  298. reorder checks, pn checks or bitmap update. This implies
  299. that REO is forwarding the pointer to the MSDU link
  300. descriptor. The destination ring is coming from a
  301. programmable register setting in REO
  302. <legal all>
  303. */
  304. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  305. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  306. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  307. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  308. Consumer: REO/SW/FW
  309. Producer: RXDMA
  310. The retry bit setting from the MPDU header of the
  311. received frame
  312. <legal all>
  313. */
  314. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  315. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  316. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  317. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  318. Consumer: REO/SW/FW
  319. Producer: RXDMA
  320. When set, the MPDU was received as part of an A-MPDU.
  321. <legal all>
  322. */
  323. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  324. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  325. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  326. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  327. Consumer: REO/SW/FW
  328. Producer: RXDMA
  329. When set, the received frame is a BAR frame. After
  330. processing, this frame shall be pushed to SW or deleted.
  331. <legal all>
  332. */
  333. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  334. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  335. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  336. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  337. Consumer: REO/SW/FW
  338. Producer: RXDMA
  339. Copied here by RXDMA from RX_MPDU_END
  340. When not set, REO will Not perform a PN sequence number
  341. check
  342. */
  343. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  344. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  345. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  346. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  347. When set, OLE found a valid SA entry for all MSDUs in
  348. this MPDU
  349. <legal all>
  350. */
  351. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  352. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  353. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  354. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  355. When set, at least 1 MSDU within the MPDU has an
  356. unsuccessful MAC source address search due to the expiration
  357. of the search timer.
  358. <legal all>
  359. */
  360. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  361. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  362. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  363. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  364. When set, OLE found a valid DA entry for all MSDUs in
  365. this MPDU
  366. <legal all>
  367. */
  368. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  369. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  370. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  371. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  372. Field Only valid if da_is_valid is set
  373. When set, at least one of the DA addresses is a
  374. Multicast or Broadcast address.
  375. <legal all>
  376. */
  377. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  378. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  379. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  380. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  381. When set, at least 1 MSDU within the MPDU has an
  382. unsuccessful MAC destination address search due to the
  383. expiration of the search timer.
  384. <legal all>
  385. */
  386. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  387. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  388. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  389. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  390. Field only valid when first_msdu_in_mpdu_flag is set.
  391. When set, the contents in the MSDU buffer contains a
  392. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  393. multiple MSDU buffers.
  394. <legal all>
  395. */
  396. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  397. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  398. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  399. /* Description SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  400. The More Fragment bit setting from the MPDU header of
  401. the received frame
  402. <legal all>
  403. */
  404. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  405. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  406. #define SW_MONITOR_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  407. /* Description SW_MONITOR_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  408. Meta data that SW has programmed in the Peer table entry
  409. of the transmitting STA.
  410. <legal all>
  411. */
  412. #define SW_MONITOR_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  413. #define SW_MONITOR_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  414. #define SW_MONITOR_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  415. /* EXTERNAL REFERENCE : struct buffer_addr_info status_buff_addr_info */
  416. /* Description SW_MONITOR_RING_4_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_31_0
  417. Address (lower 32 bits) of the MSDU buffer OR
  418. MSDU_EXTENSION descriptor OR Link Descriptor
  419. In case of 'NULL' pointer, this field is set to 0
  420. <legal all>
  421. */
  422. #define SW_MONITOR_RING_4_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000010
  423. #define SW_MONITOR_RING_4_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  424. #define SW_MONITOR_RING_4_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  425. /* Description SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_39_32
  426. Address (upper 8 bits) of the MSDU buffer OR
  427. MSDU_EXTENSION descriptor OR Link Descriptor
  428. In case of 'NULL' pointer, this field is set to 0
  429. <legal all>
  430. */
  431. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000014
  432. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  433. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  434. /* Description SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_RETURN_BUFFER_MANAGER
  435. Consumer: WBM
  436. Producer: SW/FW
  437. In case of 'NULL' pointer, this field is set to 0
  438. Indicates to which buffer manager the buffer OR
  439. MSDU_EXTENSION descriptor OR link descriptor that is being
  440. pointed to shall be returned after the frame has been
  441. processed. It is used by WBM for routing purposes.
  442. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  443. to the WMB buffer idle list
  444. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  445. returned to the WMB idle link descriptor idle list
  446. <enum 2 FW_BM> This buffer shall be returned to the FW
  447. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  448. ring 0
  449. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  450. ring 1
  451. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  452. ring 2
  453. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  454. ring 3
  455. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  456. ring 4
  457. <legal all>
  458. */
  459. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000014
  460. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  461. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  462. /* Description SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_SW_BUFFER_COOKIE
  463. Cookie field exclusively used by SW.
  464. In case of 'NULL' pointer, this field is set to 0
  465. HW ignores the contents, accept that it passes the
  466. programmed value on to other descriptors together with the
  467. physical address
  468. Field can be used by SW to for example associate the
  469. buffers physical address with the virtual address
  470. The bit definitions as used by SW are within SW HLD
  471. specification
  472. NOTE:
  473. The three most significant bits can have a special
  474. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  475. STRUCT, and field transmit_bw_restriction is set
  476. In case of NON punctured transmission:
  477. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  478. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  479. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  480. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  481. In case of punctured transmission:
  482. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  483. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  484. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  485. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  486. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  487. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  488. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  489. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  490. Note: a punctured transmission is indicated by the
  491. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  492. TLV
  493. <legal all>
  494. */
  495. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000014
  496. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  497. #define SW_MONITOR_RING_5_STATUS_BUFF_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  498. /* Description SW_MONITOR_RING_6_RXDMA_PUSH_REASON
  499. Indicates why RXDMA pushed the frame to this ring
  500. <enum 0 rxdma_error_detected> RXDMA detected an error an
  501. pushed this frame to this queue
  502. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  503. frame to this queue per received routing instructions. No
  504. error within RXDMA was detected
  505. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  506. result the MSDU link descriptor might not have the
  507. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  508. NULL pointer in the MSDU link descriptor. This is to be
  509. considered a normal condition for this scenario.
  510. <legal 0 - 2>
  511. */
  512. #define SW_MONITOR_RING_6_RXDMA_PUSH_REASON_OFFSET 0x00000018
  513. #define SW_MONITOR_RING_6_RXDMA_PUSH_REASON_LSB 0
  514. #define SW_MONITOR_RING_6_RXDMA_PUSH_REASON_MASK 0x00000003
  515. /* Description SW_MONITOR_RING_6_RXDMA_ERROR_CODE
  516. Field only valid when rxdma_push_reason is set to
  517. 'rxdma_error_detected.'
  518. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  519. due to a FIFO overflow error in RXPCU.
  520. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  521. due to receiving incomplete MPDU from the PHY
  522. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  523. error or CRYPTO received an encrypted frame, but did not get
  524. a valid corresponding key id in the peer entry.
  525. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  526. error
  527. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  528. unencrypted frame error when encrypted was expected
  529. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  530. length error
  531. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  532. number of MSDUs allowed in an MPDU got exceeded
  533. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  534. error
  535. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  536. parsing error
  537. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  538. during SA search
  539. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  540. during DA search
  541. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  542. timeout during flow search
  543. <enum 13 rxdma_flush_request>RXDMA received a flush
  544. request
  545. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  546. present as well as a fragmented MPDU. A-MSDU defragmentation
  547. is not supported in Lithium SW so this is treated as an
  548. error.
  549. */
  550. #define SW_MONITOR_RING_6_RXDMA_ERROR_CODE_OFFSET 0x00000018
  551. #define SW_MONITOR_RING_6_RXDMA_ERROR_CODE_LSB 2
  552. #define SW_MONITOR_RING_6_RXDMA_ERROR_CODE_MASK 0x0000007c
  553. /* Description SW_MONITOR_RING_6_MPDU_FRAGMENT_NUMBER
  554. Field only valid when Reo_level_mpdu_frame_info.
  555. Rx_mpdu_desc_info_details.Fragment_flag is set and
  556. end_of_ppdu is set to 0.
  557. The fragment number from the 802.11 header.
  558. Note that the sequence number is embedded in the field:
  559. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  560. Mpdu_sequence_number
  561. <legal all>
  562. */
  563. #define SW_MONITOR_RING_6_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018
  564. #define SW_MONITOR_RING_6_MPDU_FRAGMENT_NUMBER_LSB 7
  565. #define SW_MONITOR_RING_6_MPDU_FRAGMENT_NUMBER_MASK 0x00000780
  566. /* Description SW_MONITOR_RING_6_FRAMELESS_BAR
  567. When set, this SW monitor ring struct contains BAR info
  568. from a multi TID BAR frame. The original multi TID BAR frame
  569. itself contained all the REO info for the first TID, but all
  570. the subsequent TID info and their linkage to the REO
  571. descriptors is passed down as 'frameless' BAR info.
  572. The only fields valid in this descriptor when this bit
  573. is within the
  574. Reo_level_mpdu_frame_info:
  575. Within Rx_mpdu_desc_info_details:
  576. Mpdu_Sequence_number
  577. BAR_frame
  578. Peer_meta_data
  579. All other fields shall be set to 0.
  580. <legal all>
  581. */
  582. #define SW_MONITOR_RING_6_FRAMELESS_BAR_OFFSET 0x00000018
  583. #define SW_MONITOR_RING_6_FRAMELESS_BAR_LSB 11
  584. #define SW_MONITOR_RING_6_FRAMELESS_BAR_MASK 0x00000800
  585. /* Description SW_MONITOR_RING_6_STATUS_BUF_COUNT
  586. A count of status buffers used so far for the PPDU
  587. (either the PPDU that included the MPDU being pushed to SW
  588. if end_of_ppdu = 0, or the PPDU whose end is indicated
  589. through end_of_ppdu = 1)
  590. */
  591. #define SW_MONITOR_RING_6_STATUS_BUF_COUNT_OFFSET 0x00000018
  592. #define SW_MONITOR_RING_6_STATUS_BUF_COUNT_LSB 12
  593. #define SW_MONITOR_RING_6_STATUS_BUF_COUNT_MASK 0x0000f000
  594. /* Description SW_MONITOR_RING_6_END_OF_PPDU
  595. Pine RXDMA can be configured to generate a separate
  596. 'SW_MONITOR_RING' descriptor at the end of a PPDU (either
  597. through an 'RX_PPDU_END' TLV or through an 'RX_FLUSH') to
  598. demarcate PPDUs.
  599. For such a descriptor, this bit is set to 1 and fields
  600. Reo_level_mpdu_frame_info, mpdu_fragment_number and
  601. Frameless_bar are all set to 0.
  602. Otherwise this bit is set to 0.
  603. */
  604. #define SW_MONITOR_RING_6_END_OF_PPDU_OFFSET 0x00000018
  605. #define SW_MONITOR_RING_6_END_OF_PPDU_LSB 16
  606. #define SW_MONITOR_RING_6_END_OF_PPDU_MASK 0x00010000
  607. /* Description SW_MONITOR_RING_6_RESERVED_6A
  608. <legal 0>
  609. */
  610. #define SW_MONITOR_RING_6_RESERVED_6A_OFFSET 0x00000018
  611. #define SW_MONITOR_RING_6_RESERVED_6A_LSB 17
  612. #define SW_MONITOR_RING_6_RESERVED_6A_MASK 0xfffe0000
  613. /* Description SW_MONITOR_RING_7_PHY_PPDU_ID
  614. A PPDU counter value that PHY increments for every PPDU
  615. received
  616. The counter value wraps around. Pine RXDMA can be
  617. configured to copy this from the RX_PPDU_START TLV for every
  618. output descriptor.
  619. <legal all>
  620. */
  621. #define SW_MONITOR_RING_7_PHY_PPDU_ID_OFFSET 0x0000001c
  622. #define SW_MONITOR_RING_7_PHY_PPDU_ID_LSB 0
  623. #define SW_MONITOR_RING_7_PHY_PPDU_ID_MASK 0x0000ffff
  624. /* Description SW_MONITOR_RING_7_RESERVED_7A
  625. <legal 0>
  626. */
  627. #define SW_MONITOR_RING_7_RESERVED_7A_OFFSET 0x0000001c
  628. #define SW_MONITOR_RING_7_RESERVED_7A_LSB 16
  629. #define SW_MONITOR_RING_7_RESERVED_7A_MASK 0x000f0000
  630. /* Description SW_MONITOR_RING_7_RING_ID
  631. Consumer: SW/REO/DEBUG
  632. Producer: SRNG (of RXDMA)
  633. For debugging.
  634. This field is filled in by the SRNG module.
  635. It help to identify the ring that is being looked <legal
  636. all>
  637. */
  638. #define SW_MONITOR_RING_7_RING_ID_OFFSET 0x0000001c
  639. #define SW_MONITOR_RING_7_RING_ID_LSB 20
  640. #define SW_MONITOR_RING_7_RING_ID_MASK 0x0ff00000
  641. /* Description SW_MONITOR_RING_7_LOOPING_COUNT
  642. Consumer: SW/REO/DEBUG
  643. Producer: SRNG (of RXDMA)
  644. For debugging.
  645. This field is filled in by the SRNG module.
  646. A count value that indicates the number of times the
  647. producer of entries into this Ring has looped around the
  648. ring.
  649. At initialization time, this value is set to 0. On the
  650. first loop, this value is set to 1. After the max value is
  651. reached allowed by the number of bits for this field, the
  652. count value continues with 0 again.
  653. In case SW is the consumer of the ring entries, it can
  654. use this field to figure out up to where the producer of
  655. entries has created new entries. This eliminates the need to
  656. check where the head pointer' of the ring is located once
  657. the SW starts processing an interrupt indicating that new
  658. entries have been put into this ring...
  659. Also note that SW if it wants only needs to look at the
  660. LSB bit of this count value.
  661. <legal all>
  662. */
  663. #define SW_MONITOR_RING_7_LOOPING_COUNT_OFFSET 0x0000001c
  664. #define SW_MONITOR_RING_7_LOOPING_COUNT_LSB 28
  665. #define SW_MONITOR_RING_7_LOOPING_COUNT_MASK 0xf0000000
  666. #endif // _SW_MONITOR_RING_H_