reo_destination_ring.h 46 KB

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  1. /*
  2. * Copyright (c) 2019, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _REO_DESTINATION_RING_H_
  17. #define _REO_DESTINATION_RING_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #include "buffer_addr_info.h"
  21. #include "rx_mpdu_desc_info.h"
  22. #include "rx_msdu_desc_info.h"
  23. // ################ START SUMMARY #################
  24. //
  25. // Dword Fields
  26. // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
  27. // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  28. // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  29. // 6 rx_reo_queue_desc_addr_31_0[31:0]
  30. // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
  31. // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], mpdu_fragment_number[16:13], captured_msdu_data_size[20:17], sw_exception[21], reserved_8a[31:22]
  32. // 9 reo_destination_struct_signature[31:0]
  33. // 10 reserved_10a[31:0]
  34. // 11 reserved_11a[31:0]
  35. // 12 reserved_12a[31:0]
  36. // 13 reserved_13a[31:0]
  37. // 14 reserved_14a[31:0]
  38. // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
  39. //
  40. // ################ END SUMMARY #################
  41. #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
  42. struct reo_destination_ring {
  43. struct buffer_addr_info buf_or_link_desc_addr_info;
  44. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  45. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  46. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  47. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  48. reo_dest_buffer_type : 1, //[8]
  49. reo_push_reason : 2, //[10:9]
  50. reo_error_code : 5, //[15:11]
  51. receive_queue_number : 16; //[31:16]
  52. uint32_t soft_reorder_info_valid : 1, //[0]
  53. reorder_opcode : 4, //[4:1]
  54. reorder_slot_index : 8, //[12:5]
  55. mpdu_fragment_number : 4, //[16:13]
  56. captured_msdu_data_size : 4, //[20:17]
  57. sw_exception : 1, //[21]
  58. reserved_8a : 10; //[31:22]
  59. uint32_t reo_destination_struct_signature: 32; //[31:0]
  60. uint32_t reserved_10a : 32; //[31:0]
  61. uint32_t reserved_11a : 32; //[31:0]
  62. uint32_t reserved_12a : 32; //[31:0]
  63. uint32_t reserved_13a : 32; //[31:0]
  64. uint32_t reserved_14a : 32; //[31:0]
  65. uint32_t reserved_15 : 20, //[19:0]
  66. ring_id : 8, //[27:20]
  67. looping_count : 4; //[31:28]
  68. };
  69. /*
  70. struct buffer_addr_info buf_or_link_desc_addr_info
  71. Consumer: REO/SW/FW
  72. Producer: RXDMA
  73. Details of the physical address of the a buffer or MSDU
  74. link descriptor
  75. struct rx_mpdu_desc_info rx_mpdu_desc_info_details
  76. Consumer: REO/SW/FW
  77. Producer: RXDMA
  78. General information related to the MPDU that is passed
  79. on from REO entrance ring to the REO destination ring
  80. struct rx_msdu_desc_info rx_msdu_desc_info_details
  81. General information related to the MSDU that is passed
  82. on from RXDMA all the way to to the REO destination ring.
  83. rx_reo_queue_desc_addr_31_0
  84. Consumer: REO
  85. Producer: RXDMA
  86. Address (lower 32 bits) of the REO queue descriptor.
  87. <legal all>
  88. rx_reo_queue_desc_addr_39_32
  89. Consumer: REO
  90. Producer: RXDMA
  91. Address (upper 8 bits) of the REO queue descriptor.
  92. <legal all>
  93. reo_dest_buffer_type
  94. Indicates the type of address provided in the
  95. 'Buf_or_link_desc_addr_info'
  96. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  97. <enum 1 MSDU_link_desc_address> The address of the MSDU
  98. link descriptor.
  99. <legal all>
  100. reo_push_reason
  101. Indicates why REO pushed the frame to this exit ring
  102. <enum 0 reo_error_detected> Reo detected an error an
  103. pushed this frame to this queue
  104. <enum 1 reo_routing_instruction> Reo pushed the frame to
  105. this queue per received routing instructions. No error
  106. within REO was detected
  107. <legal 0 - 1>
  108. reo_error_code
  109. Field only valid when 'Reo_push_reason' set to
  110. 'reo_error_detected'.
  111. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  112. provided in the REO_ENTRANCE ring is set to 0
  113. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  114. valid bit is NOT set
  115. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  116. session having been setup.
  117. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  118. SSN, Retry bit set: duplicate frame
  119. <enum 4 ba_duplicate> BA session, duplicate frame
  120. <enum 5 regular_frame_2k_jump> A normal (management/data
  121. frame) received with 2K jump in SN
  122. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  123. in SSN
  124. <enum 7 regular_frame_OOR> A normal (management/data
  125. frame) received with SN falling within the OOR window
  126. <enum 8 bar_frame_OOR> A bar received with SSN falling
  127. within the OOR window
  128. <enum 9 bar_frame_no_ba_session> A bar received without
  129. a BA session
  130. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  131. SSN equal to SN
  132. <enum 11 pn_check_failed> PN Check Failed packet.
  133. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  134. as a result of the 'Seq_2k_error_detected_flag' been set in
  135. the REO Queue descriptor
  136. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  137. as a result of the 'pn_error_detected_flag' been set in the
  138. REO Queue descriptor
  139. <enum 14 queue_descriptor_blocked_set> Frame is
  140. forwarded as a result of the queue descriptor(address) being
  141. blocked as SW/FW seems to be currently in the process of
  142. making updates to this descriptor...
  143. <legal 0-14>
  144. receive_queue_number
  145. This field in NOT valid (should be set to 0), when
  146. SW_exception is set.
  147. This field indicates the REO MPDU reorder queue ID from
  148. which this frame originated. This field is populated from a
  149. field with the same name in the RX_REO_QUEUE descriptor.
  150. <legal all>
  151. soft_reorder_info_valid
  152. This field in NOT valid (should be set to 0), when
  153. SW_exception is set.
  154. When set, REO has been instructed to not perform the
  155. actual re-ordering of frames for this queue, but just to
  156. insert the reorder opcodes
  157. <legal all>
  158. reorder_opcode
  159. Field is valid when 'Soft_reorder_info_valid' is set.
  160. This field is always valid for debug purpose as well.
  161. Details are in the MLD.
  162. <enum 0 invalid>
  163. <enum 1 fwdcur_fwdbuf>
  164. <enum 2 fwdbuf_fwdcur>
  165. <enum 3 qcur>
  166. <enum 4 fwdbuf_qcur>
  167. <enum 5 fwdbuf_drop>
  168. <enum 6 fwdall_drop>
  169. <enum 7 fwdall_qcur>
  170. <enum 8 reserved_reo_opcode_1>
  171. <enum 9 dropcur> the error reason code is in
  172. reo_error_code field.
  173. <enum 10 reserved_reo_opcode_2>
  174. <enum 11 reserved_reo_opcode_3>
  175. <enum 12 reserved_reo_opcode_4>
  176. <enum 13 reserved_reo_opcode_5>
  177. <enum 14 reserved_reo_opcode_6>
  178. <enum 15 reserved_reo_opcode_7>
  179. <legal all>
  180. reorder_slot_index
  181. Field only valid when 'Soft_reorder_info_valid' is set.
  182. TODO: add description
  183. <legal all>
  184. mpdu_fragment_number
  185. Field only valid when Rx_mpdu_desc_info_details.
  186. Fragment_flag is set.
  187. The fragment number from the 802.11 header.
  188. Note that the sequence number is embedded in the field:
  189. Rx_mpdu_desc_info_details. Mpdu_sequence_number
  190. <legal all>
  191. captured_msdu_data_size
  192. The number of following REO_DESTINATION STRUCTs that
  193. have been replaced with msdu_data extracted from the
  194. msdu_buffer and copied into the ring for easy FW/SW access.
  195. Note that it is possible that these STRUCTs wrap around
  196. the end of the ring.
  197. Feature supported only in HastingsPrime
  198. <legal 0-4>
  199. sw_exception
  200. This field has the same setting as the SW_exception
  201. field in the corresponding REO_entrance_ring descriptor.
  202. When set, the REO entrance descriptor is generated by
  203. FW, and the MPDU was processed in the following way:
  204. - NO re-order function is needed.
  205. - MPDU delinking is determined by the setting of
  206. Entrance ring field: SW_excection_mpdu_delink
  207. - Destination ring selection is based on the setting of
  208. Feature supported only in HastingsPrime
  209. <legal all>
  210. reserved_8a
  211. <legal 0>
  212. reo_destination_struct_signature
  213. Set to value 0x8888_88888 when msdu capture mode is
  214. enabled for this ring (supported only in HastingsPrime)
  215. <legal 0, 2290649224 >
  216. reserved_10a
  217. <legal 0>
  218. reserved_11a
  219. <legal 0>
  220. reserved_12a
  221. <legal 0>
  222. reserved_13a
  223. <legal 0>
  224. reserved_14a
  225. <legal 0>
  226. reserved_15
  227. <legal 0>
  228. ring_id
  229. The buffer pointer ring ID.
  230. 0 refers to the IDLE ring
  231. 1 - N refers to other rings
  232. Helps with debugging when dumping ring contents.
  233. <legal all>
  234. looping_count
  235. A count value that indicates the number of times the
  236. producer of entries into this Ring has looped around the
  237. ring.
  238. At initialization time, this value is set to 0. On the
  239. first loop, this value is set to 1. After the max value is
  240. reached allowed by the number of bits for this field, the
  241. count value continues with 0 again.
  242. In case SW is the consumer of the ring entries, it can
  243. use this field to figure out up to where the producer of
  244. entries has created new entries. This eliminates the need to
  245. check where the head pointer' of the ring is located once
  246. the SW starts processing an interrupt indicating that new
  247. entries have been put into this ring...
  248. Also note that SW if it wants only needs to look at the
  249. LSB bit of this count value.
  250. <legal all>
  251. */
  252. /* EXTERNAL REFERENCE : struct buffer_addr_info buf_or_link_desc_addr_info */
  253. /* Description REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  254. Address (lower 32 bits) of the MSDU buffer OR
  255. MSDU_EXTENSION descriptor OR Link Descriptor
  256. In case of 'NULL' pointer, this field is set to 0
  257. <legal all>
  258. */
  259. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  260. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  261. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  262. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  263. Address (upper 8 bits) of the MSDU buffer OR
  264. MSDU_EXTENSION descriptor OR Link Descriptor
  265. In case of 'NULL' pointer, this field is set to 0
  266. <legal all>
  267. */
  268. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  269. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  270. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  271. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  272. Consumer: WBM
  273. Producer: SW/FW
  274. In case of 'NULL' pointer, this field is set to 0
  275. Indicates to which buffer manager the buffer OR
  276. MSDU_EXTENSION descriptor OR link descriptor that is being
  277. pointed to shall be returned after the frame has been
  278. processed. It is used by WBM for routing purposes.
  279. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  280. to the WMB buffer idle list
  281. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  282. returned to the WMB idle link descriptor idle list
  283. <enum 2 FW_BM> This buffer shall be returned to the FW
  284. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  285. ring 0
  286. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  287. ring 1
  288. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  289. ring 2
  290. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  291. ring 3
  292. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  293. ring 4
  294. <legal all>
  295. */
  296. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  297. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  298. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  299. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  300. Cookie field exclusively used by SW.
  301. In case of 'NULL' pointer, this field is set to 0
  302. HW ignores the contents, accept that it passes the
  303. programmed value on to other descriptors together with the
  304. physical address
  305. Field can be used by SW to for example associate the
  306. buffers physical address with the virtual address
  307. The bit definitions as used by SW are within SW HLD
  308. specification
  309. NOTE:
  310. The three most significant bits can have a special
  311. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  312. STRUCT, and field transmit_bw_restriction is set
  313. In case of NON punctured transmission:
  314. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  315. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  316. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  317. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  318. In case of punctured transmission:
  319. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  320. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  321. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  322. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  323. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  324. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  325. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  326. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  327. Note: a punctured transmission is indicated by the
  328. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  329. TLV
  330. <legal all>
  331. */
  332. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  333. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  334. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  335. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  336. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  337. Consumer: REO/SW/FW
  338. Producer: RXDMA
  339. The number of MSDUs within the MPDU
  340. <legal all>
  341. */
  342. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  343. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  344. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  345. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  346. Consumer: REO/SW/FW
  347. Producer: RXDMA
  348. The field can have two different meanings based on the
  349. setting of field 'BAR_frame':
  350. 'BAR_frame' is NOT set:
  351. The MPDU sequence number of the received frame.
  352. 'BAR_frame' is set.
  353. The MPDU Start sequence number from the BAR frame
  354. <legal all>
  355. */
  356. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  357. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  358. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  359. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  360. Consumer: REO/SW/FW
  361. Producer: RXDMA
  362. When set, this MPDU is a fragment and REO should forward
  363. this fragment MPDU to the REO destination ring without any
  364. reorder checks, pn checks or bitmap update. This implies
  365. that REO is forwarding the pointer to the MSDU link
  366. descriptor. The destination ring is coming from a
  367. programmable register setting in REO
  368. <legal all>
  369. */
  370. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  371. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  372. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  373. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  374. Consumer: REO/SW/FW
  375. Producer: RXDMA
  376. The retry bit setting from the MPDU header of the
  377. received frame
  378. <legal all>
  379. */
  380. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  381. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  382. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  383. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  384. Consumer: REO/SW/FW
  385. Producer: RXDMA
  386. When set, the MPDU was received as part of an A-MPDU.
  387. <legal all>
  388. */
  389. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  390. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  391. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  392. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  393. Consumer: REO/SW/FW
  394. Producer: RXDMA
  395. When set, the received frame is a BAR frame. After
  396. processing, this frame shall be pushed to SW or deleted.
  397. <legal all>
  398. */
  399. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  400. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  401. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  402. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  403. Consumer: REO/SW/FW
  404. Producer: RXDMA
  405. Copied here by RXDMA from RX_MPDU_END
  406. When not set, REO will Not perform a PN sequence number
  407. check
  408. */
  409. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  410. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  411. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  412. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  413. When set, OLE found a valid SA entry for all MSDUs in
  414. this MPDU
  415. <legal all>
  416. */
  417. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  418. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  419. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  420. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  421. When set, at least 1 MSDU within the MPDU has an
  422. unsuccessful MAC source address search due to the expiration
  423. of the search timer.
  424. <legal all>
  425. */
  426. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  427. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  428. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  429. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  430. When set, OLE found a valid DA entry for all MSDUs in
  431. this MPDU
  432. <legal all>
  433. */
  434. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  435. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  436. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  437. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  438. Field Only valid if da_is_valid is set
  439. When set, at least one of the DA addresses is a
  440. Multicast or Broadcast address.
  441. <legal all>
  442. */
  443. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  444. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  445. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  446. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  447. When set, at least 1 MSDU within the MPDU has an
  448. unsuccessful MAC destination address search due to the
  449. expiration of the search timer.
  450. <legal all>
  451. */
  452. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  453. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  454. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  455. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  456. Field only valid when first_msdu_in_mpdu_flag is set.
  457. When set, the contents in the MSDU buffer contains a
  458. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  459. multiple MSDU buffers.
  460. <legal all>
  461. */
  462. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  463. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  464. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  465. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  466. The More Fragment bit setting from the MPDU header of
  467. the received frame
  468. <legal all>
  469. */
  470. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  471. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  472. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  473. /* Description REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  474. Meta data that SW has programmed in the Peer table entry
  475. of the transmitting STA.
  476. <legal all>
  477. */
  478. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  479. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  480. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  481. /* EXTERNAL REFERENCE : struct rx_msdu_desc_info rx_msdu_desc_info_details */
  482. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG
  483. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  484. over multiple buffers, this field will be valid in the Last
  485. buffer used by the MSDU
  486. <enum 0 Not_first_msdu> This is not the first MSDU in
  487. the MPDU.
  488. <enum 1 first_msdu> This MSDU is the first one in the
  489. MPDU.
  490. <legal all>
  491. */
  492. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  493. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  494. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  495. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG
  496. Consumer: WBM/REO/SW/FW
  497. Producer: RXDMA
  498. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  499. over multiple buffers, this field will be valid in the Last
  500. buffer used by the MSDU
  501. <enum 0 Not_last_msdu> There are more MSDUs linked to
  502. this MSDU that belongs to this MPDU
  503. <enum 1 Last_msdu> this MSDU is the last one in the
  504. MPDU. This setting is only allowed in combination with
  505. 'Msdu_continuation' set to 0. This implies that when an msdu
  506. is spread out over multiple buffers and thus
  507. msdu_continuation is set, only for the very last buffer of
  508. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  509. When both first_msdu_in_mpdu_flag and
  510. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  511. belongs to only contains a single MSDU.
  512. <legal all>
  513. */
  514. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  515. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  516. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  517. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION
  518. When set, this MSDU buffer was not able to hold the
  519. entire MSDU. The next buffer will therefor contain
  520. additional information related to this MSDU.
  521. <legal all>
  522. */
  523. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000010
  524. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
  525. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
  526. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH
  527. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  528. over multiple buffers, this field will be valid in the First
  529. buffer used by MSDU.
  530. Full MSDU length in bytes after decapsulation.
  531. This field is still valid for MPDU frames without
  532. A-MSDU. It still represents MSDU length after decapsulation
  533. Or in case of RAW MPDUs, it indicates the length of the
  534. entire MPDU (without FCS field)
  535. <legal all>
  536. */
  537. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000010
  538. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
  539. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
  540. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION
  541. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  542. over multiple buffers, this field will be valid in the Last
  543. buffer used by the MSDU
  544. The ID of the REO exit ring where the MSDU frame shall
  545. push after (MPDU level) reordering has finished.
  546. <enum 0 reo_destination_tcl> Reo will push the frame
  547. into the REO2TCL ring
  548. <enum 1 reo_destination_sw1> Reo will push the frame
  549. into the REO2SW1 ring
  550. <enum 2 reo_destination_sw2> Reo will push the frame
  551. into the REO2SW2 ring
  552. <enum 3 reo_destination_sw3> Reo will push the frame
  553. into the REO2SW3 ring
  554. <enum 4 reo_destination_sw4> Reo will push the frame
  555. into the REO2SW4 ring
  556. <enum 5 reo_destination_release> Reo will push the frame
  557. into the REO_release ring
  558. <enum 6 reo_destination_fw> Reo will push the frame into
  559. the REO2FW ring
  560. <enum 7 reo_destination_sw5> Reo will push the frame
  561. into the REO2SW5 ring (REO remaps this in chips without
  562. REO2SW5 ring, e.g. Pine)
  563. <enum 8 reo_destination_sw6> Reo will push the frame
  564. into the REO2SW6 ring (REO remaps this in chips without
  565. REO2SW6 ring, e.g. Pine)
  566. <enum 9 reo_destination_9> REO remaps this <enum 10
  567. reo_destination_10> REO remaps this
  568. <enum 11 reo_destination_11> REO remaps this
  569. <enum 12 reo_destination_12> REO remaps this <enum 13
  570. reo_destination_13> REO remaps this
  571. <enum 14 reo_destination_14> REO remaps this
  572. <enum 15 reo_destination_15> REO remaps this
  573. <enum 16 reo_destination_16> REO remaps this
  574. <enum 17 reo_destination_17> REO remaps this
  575. <enum 18 reo_destination_18> REO remaps this
  576. <enum 19 reo_destination_19> REO remaps this
  577. <enum 20 reo_destination_20> REO remaps this
  578. <enum 21 reo_destination_21> REO remaps this
  579. <enum 22 reo_destination_22> REO remaps this
  580. <enum 23 reo_destination_23> REO remaps this
  581. <enum 24 reo_destination_24> REO remaps this
  582. <enum 25 reo_destination_25> REO remaps this
  583. <enum 26 reo_destination_26> REO remaps this
  584. <enum 27 reo_destination_27> REO remaps this
  585. <enum 28 reo_destination_28> REO remaps this
  586. <enum 29 reo_destination_29> REO remaps this
  587. <enum 30 reo_destination_30> REO remaps this
  588. <enum 31 reo_destination_31> REO remaps this
  589. <legal all>
  590. */
  591. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000010
  592. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 17
  593. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x003e0000
  594. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP
  595. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  596. over multiple buffers, this field will be valid in the Last
  597. buffer used by the MSDU
  598. When set, REO shall drop this MSDU and not forward it to
  599. any other ring...
  600. <legal all>
  601. */
  602. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000010
  603. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 22
  604. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00400000
  605. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID
  606. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  607. over multiple buffers, this field will be valid in the Last
  608. buffer used by the MSDU
  609. Indicates that OLE found a valid SA entry for this MSDU
  610. <legal all>
  611. */
  612. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000010
  613. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 23
  614. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00800000
  615. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  616. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  617. over multiple buffers, this field will be valid in the Last
  618. buffer used by the MSDU
  619. Indicates an unsuccessful MAC source address search due
  620. to the expiring of the search timer for this MSDU
  621. <legal all>
  622. */
  623. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000010
  624. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 24
  625. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x01000000
  626. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID
  627. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  628. over multiple buffers, this field will be valid in the Last
  629. buffer used by the MSDU
  630. Indicates that OLE found a valid DA entry for this MSDU
  631. <legal all>
  632. */
  633. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000010
  634. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 25
  635. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x02000000
  636. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC
  637. Field Only valid if da_is_valid is set
  638. Indicates the DA address was a Multicast of Broadcast
  639. address for this MSDU
  640. <legal all>
  641. */
  642. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000010
  643. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 26
  644. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x04000000
  645. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  646. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  647. over multiple buffers, this field will be valid in the Last
  648. buffer used by the MSDU
  649. Indicates an unsuccessful MAC destination address search
  650. due to the expiring of the search timer for this MSDU
  651. <legal all>
  652. */
  653. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000010
  654. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 27
  655. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x08000000
  656. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A
  657. <legal 0>
  658. */
  659. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000010
  660. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 28
  661. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xf0000000
  662. /* Description REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A
  663. <legal 0>
  664. */
  665. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000014
  666. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_LSB 0
  667. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_MASK 0xffffffff
  668. /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
  669. Consumer: REO
  670. Producer: RXDMA
  671. Address (lower 32 bits) of the REO queue descriptor.
  672. <legal all>
  673. */
  674. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
  675. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  676. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  677. /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
  678. Consumer: REO
  679. Producer: RXDMA
  680. Address (upper 8 bits) of the REO queue descriptor.
  681. <legal all>
  682. */
  683. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
  684. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  685. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  686. /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
  687. Indicates the type of address provided in the
  688. 'Buf_or_link_desc_addr_info'
  689. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  690. <enum 1 MSDU_link_desc_address> The address of the MSDU
  691. link descriptor.
  692. <legal all>
  693. */
  694. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  695. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
  696. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
  697. /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
  698. Indicates why REO pushed the frame to this exit ring
  699. <enum 0 reo_error_detected> Reo detected an error an
  700. pushed this frame to this queue
  701. <enum 1 reo_routing_instruction> Reo pushed the frame to
  702. this queue per received routing instructions. No error
  703. within REO was detected
  704. <legal 0 - 1>
  705. */
  706. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
  707. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
  708. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
  709. /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
  710. Field only valid when 'Reo_push_reason' set to
  711. 'reo_error_detected'.
  712. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  713. provided in the REO_ENTRANCE ring is set to 0
  714. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  715. valid bit is NOT set
  716. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  717. session having been setup.
  718. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  719. SSN, Retry bit set: duplicate frame
  720. <enum 4 ba_duplicate> BA session, duplicate frame
  721. <enum 5 regular_frame_2k_jump> A normal (management/data
  722. frame) received with 2K jump in SN
  723. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  724. in SSN
  725. <enum 7 regular_frame_OOR> A normal (management/data
  726. frame) received with SN falling within the OOR window
  727. <enum 8 bar_frame_OOR> A bar received with SSN falling
  728. within the OOR window
  729. <enum 9 bar_frame_no_ba_session> A bar received without
  730. a BA session
  731. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  732. SSN equal to SN
  733. <enum 11 pn_check_failed> PN Check Failed packet.
  734. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  735. as a result of the 'Seq_2k_error_detected_flag' been set in
  736. the REO Queue descriptor
  737. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  738. as a result of the 'pn_error_detected_flag' been set in the
  739. REO Queue descriptor
  740. <enum 14 queue_descriptor_blocked_set> Frame is
  741. forwarded as a result of the queue descriptor(address) being
  742. blocked as SW/FW seems to be currently in the process of
  743. making updates to this descriptor...
  744. <legal 0-14>
  745. */
  746. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
  747. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
  748. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
  749. /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
  750. This field in NOT valid (should be set to 0), when
  751. SW_exception is set.
  752. This field indicates the REO MPDU reorder queue ID from
  753. which this frame originated. This field is populated from a
  754. field with the same name in the RX_REO_QUEUE descriptor.
  755. <legal all>
  756. */
  757. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
  758. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
  759. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
  760. /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
  761. This field in NOT valid (should be set to 0), when
  762. SW_exception is set.
  763. When set, REO has been instructed to not perform the
  764. actual re-ordering of frames for this queue, but just to
  765. insert the reorder opcodes
  766. <legal all>
  767. */
  768. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
  769. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
  770. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
  771. /* Description REO_DESTINATION_RING_8_REORDER_OPCODE
  772. Field is valid when 'Soft_reorder_info_valid' is set.
  773. This field is always valid for debug purpose as well.
  774. Details are in the MLD.
  775. <enum 0 invalid>
  776. <enum 1 fwdcur_fwdbuf>
  777. <enum 2 fwdbuf_fwdcur>
  778. <enum 3 qcur>
  779. <enum 4 fwdbuf_qcur>
  780. <enum 5 fwdbuf_drop>
  781. <enum 6 fwdall_drop>
  782. <enum 7 fwdall_qcur>
  783. <enum 8 reserved_reo_opcode_1>
  784. <enum 9 dropcur> the error reason code is in
  785. reo_error_code field.
  786. <enum 10 reserved_reo_opcode_2>
  787. <enum 11 reserved_reo_opcode_3>
  788. <enum 12 reserved_reo_opcode_4>
  789. <enum 13 reserved_reo_opcode_5>
  790. <enum 14 reserved_reo_opcode_6>
  791. <enum 15 reserved_reo_opcode_7>
  792. <legal all>
  793. */
  794. #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
  795. #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
  796. #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
  797. /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
  798. Field only valid when 'Soft_reorder_info_valid' is set.
  799. TODO: add description
  800. <legal all>
  801. */
  802. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
  803. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
  804. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
  805. /* Description REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER
  806. Field only valid when Rx_mpdu_desc_info_details.
  807. Fragment_flag is set.
  808. The fragment number from the 802.11 header.
  809. Note that the sequence number is embedded in the field:
  810. Rx_mpdu_desc_info_details. Mpdu_sequence_number
  811. <legal all>
  812. */
  813. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000020
  814. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_LSB 13
  815. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_MASK 0x0001e000
  816. /* Description REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE
  817. The number of following REO_DESTINATION STRUCTs that
  818. have been replaced with msdu_data extracted from the
  819. msdu_buffer and copied into the ring for easy FW/SW access.
  820. Note that it is possible that these STRUCTs wrap around
  821. the end of the ring.
  822. Feature supported only in HastingsPrime
  823. <legal 0-4>
  824. */
  825. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_OFFSET 0x00000020
  826. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_LSB 17
  827. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_MASK 0x001e0000
  828. /* Description REO_DESTINATION_RING_8_SW_EXCEPTION
  829. This field has the same setting as the SW_exception
  830. field in the corresponding REO_entrance_ring descriptor.
  831. When set, the REO entrance descriptor is generated by
  832. FW, and the MPDU was processed in the following way:
  833. - NO re-order function is needed.
  834. - MPDU delinking is determined by the setting of
  835. Entrance ring field: SW_excection_mpdu_delink
  836. - Destination ring selection is based on the setting of
  837. Feature supported only in HastingsPrime
  838. <legal all>
  839. */
  840. #define REO_DESTINATION_RING_8_SW_EXCEPTION_OFFSET 0x00000020
  841. #define REO_DESTINATION_RING_8_SW_EXCEPTION_LSB 21
  842. #define REO_DESTINATION_RING_8_SW_EXCEPTION_MASK 0x00200000
  843. /* Description REO_DESTINATION_RING_8_RESERVED_8A
  844. <legal 0>
  845. */
  846. #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
  847. #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 22
  848. #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xffc00000
  849. /* Description REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE
  850. Set to value 0x8888_88888 when msdu capture mode is
  851. enabled for this ring (supported only in HastingsPrime)
  852. <legal 0, 2290649224 >
  853. */
  854. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_OFFSET 0x00000024
  855. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_LSB 0
  856. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_MASK 0xffffffff
  857. /* Description REO_DESTINATION_RING_10_RESERVED_10A
  858. <legal 0>
  859. */
  860. #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
  861. #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
  862. #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
  863. /* Description REO_DESTINATION_RING_11_RESERVED_11A
  864. <legal 0>
  865. */
  866. #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
  867. #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
  868. #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
  869. /* Description REO_DESTINATION_RING_12_RESERVED_12A
  870. <legal 0>
  871. */
  872. #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
  873. #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
  874. #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
  875. /* Description REO_DESTINATION_RING_13_RESERVED_13A
  876. <legal 0>
  877. */
  878. #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
  879. #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
  880. #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
  881. /* Description REO_DESTINATION_RING_14_RESERVED_14A
  882. <legal 0>
  883. */
  884. #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
  885. #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
  886. #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
  887. /* Description REO_DESTINATION_RING_15_RESERVED_15
  888. <legal 0>
  889. */
  890. #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
  891. #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
  892. #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
  893. /* Description REO_DESTINATION_RING_15_RING_ID
  894. The buffer pointer ring ID.
  895. 0 refers to the IDLE ring
  896. 1 - N refers to other rings
  897. Helps with debugging when dumping ring contents.
  898. <legal all>
  899. */
  900. #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
  901. #define REO_DESTINATION_RING_15_RING_ID_LSB 20
  902. #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
  903. /* Description REO_DESTINATION_RING_15_LOOPING_COUNT
  904. A count value that indicates the number of times the
  905. producer of entries into this Ring has looped around the
  906. ring.
  907. At initialization time, this value is set to 0. On the
  908. first loop, this value is set to 1. After the max value is
  909. reached allowed by the number of bits for this field, the
  910. count value continues with 0 again.
  911. In case SW is the consumer of the ring entries, it can
  912. use this field to figure out up to where the producer of
  913. entries has created new entries. This eliminates the need to
  914. check where the head pointer' of the ring is located once
  915. the SW starts processing an interrupt indicating that new
  916. entries have been put into this ring...
  917. Also note that SW if it wants only needs to look at the
  918. LSB bit of this count value.
  919. <legal all>
  920. */
  921. #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
  922. #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
  923. #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
  924. #endif // _REO_DESTINATION_RING_H_