buffer_addr_info.h 8.5 KB

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  1. /*
  2. * Copyright (c) 2019, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _BUFFER_ADDR_INFO_H_
  17. #define _BUFFER_ADDR_INFO_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. // ################ START SUMMARY #################
  21. //
  22. // Dword Fields
  23. // 0 buffer_addr_31_0[31:0]
  24. // 1 buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
  25. //
  26. // ################ END SUMMARY #################
  27. #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
  28. struct buffer_addr_info {
  29. uint32_t buffer_addr_31_0 : 32; //[31:0]
  30. uint32_t buffer_addr_39_32 : 8, //[7:0]
  31. return_buffer_manager : 3, //[10:8]
  32. sw_buffer_cookie : 21; //[31:11]
  33. };
  34. /*
  35. buffer_addr_31_0
  36. Address (lower 32 bits) of the MSDU buffer OR
  37. MSDU_EXTENSION descriptor OR Link Descriptor
  38. In case of 'NULL' pointer, this field is set to 0
  39. <legal all>
  40. buffer_addr_39_32
  41. Address (upper 8 bits) of the MSDU buffer OR
  42. MSDU_EXTENSION descriptor OR Link Descriptor
  43. In case of 'NULL' pointer, this field is set to 0
  44. <legal all>
  45. return_buffer_manager
  46. Consumer: WBM
  47. Producer: SW/FW
  48. In case of 'NULL' pointer, this field is set to 0
  49. Indicates to which buffer manager the buffer OR
  50. MSDU_EXTENSION descriptor OR link descriptor that is being
  51. pointed to shall be returned after the frame has been
  52. processed. It is used by WBM for routing purposes.
  53. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  54. to the WMB buffer idle list
  55. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  56. returned to the WMB idle link descriptor idle list
  57. <enum 2 FW_BM> This buffer shall be returned to the FW
  58. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  59. ring 0
  60. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  61. ring 1
  62. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  63. ring 2
  64. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  65. ring 3
  66. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  67. ring 4
  68. <legal all>
  69. sw_buffer_cookie
  70. Cookie field exclusively used by SW.
  71. In case of 'NULL' pointer, this field is set to 0
  72. HW ignores the contents, accept that it passes the
  73. programmed value on to other descriptors together with the
  74. physical address
  75. Field can be used by SW to for example associate the
  76. buffers physical address with the virtual address
  77. The bit definitions as used by SW are within SW HLD
  78. specification
  79. NOTE:
  80. The three most significant bits can have a special
  81. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  82. STRUCT, and field transmit_bw_restriction is set
  83. In case of NON punctured transmission:
  84. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  85. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  86. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  87. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  88. In case of punctured transmission:
  89. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  90. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  91. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  92. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  93. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  94. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  95. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  96. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  97. Note: a punctured transmission is indicated by the
  98. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  99. TLV
  100. <legal all>
  101. */
  102. /* Description BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
  103. Address (lower 32 bits) of the MSDU buffer OR
  104. MSDU_EXTENSION descriptor OR Link Descriptor
  105. In case of 'NULL' pointer, this field is set to 0
  106. <legal all>
  107. */
  108. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET 0x00000000
  109. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB 0
  110. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK 0xffffffff
  111. /* Description BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
  112. Address (upper 8 bits) of the MSDU buffer OR
  113. MSDU_EXTENSION descriptor OR Link Descriptor
  114. In case of 'NULL' pointer, this field is set to 0
  115. <legal all>
  116. */
  117. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET 0x00000004
  118. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB 0
  119. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK 0x000000ff
  120. /* Description BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
  121. Consumer: WBM
  122. Producer: SW/FW
  123. In case of 'NULL' pointer, this field is set to 0
  124. Indicates to which buffer manager the buffer OR
  125. MSDU_EXTENSION descriptor OR link descriptor that is being
  126. pointed to shall be returned after the frame has been
  127. processed. It is used by WBM for routing purposes.
  128. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  129. to the WMB buffer idle list
  130. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  131. returned to the WMB idle link descriptor idle list
  132. <enum 2 FW_BM> This buffer shall be returned to the FW
  133. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  134. ring 0
  135. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  136. ring 1
  137. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  138. ring 2
  139. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  140. ring 3
  141. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  142. ring 4
  143. <legal all>
  144. */
  145. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  146. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB 8
  147. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK 0x00000700
  148. /* Description BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
  149. Cookie field exclusively used by SW.
  150. In case of 'NULL' pointer, this field is set to 0
  151. HW ignores the contents, accept that it passes the
  152. programmed value on to other descriptors together with the
  153. physical address
  154. Field can be used by SW to for example associate the
  155. buffers physical address with the virtual address
  156. The bit definitions as used by SW are within SW HLD
  157. specification
  158. NOTE:
  159. The three most significant bits can have a special
  160. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  161. STRUCT, and field transmit_bw_restriction is set
  162. In case of NON punctured transmission:
  163. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  164. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  165. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  166. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  167. In case of punctured transmission:
  168. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  169. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  170. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  171. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  172. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  173. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  174. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  175. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  176. Note: a punctured transmission is indicated by the
  177. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  178. TLV
  179. <legal all>
  180. */
  181. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET 0x00000004
  182. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB 11
  183. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK 0xfffff800
  184. #endif // _BUFFER_ADDR_INFO_H_