reo_destination_ring.h 36 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945
  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _REO_DESTINATION_RING_H_
  17. #define _REO_DESTINATION_RING_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #include "rx_msdu_desc_info.h"
  21. #include "rx_mpdu_desc_info.h"
  22. #include "buffer_addr_info.h"
  23. #define NUM_OF_DWORDS_REO_DESTINATION_RING 8
  24. struct reo_destination_ring {
  25. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  26. struct buffer_addr_info buf_or_link_desc_addr_info;
  27. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  28. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  29. uint32_t buffer_virt_addr_31_0 : 32; // [31:0]
  30. uint32_t buffer_virt_addr_63_32 : 32; // [31:0]
  31. uint32_t reo_dest_buffer_type : 1, // [0:0]
  32. reo_push_reason : 2, // [2:1]
  33. reo_error_code : 5, // [7:3]
  34. captured_msdu_data_size : 4, // [11:8]
  35. sw_exception : 1, // [12:12]
  36. src_link_id : 3, // [15:13]
  37. reo_destination_struct_signature : 4, // [19:16]
  38. ring_id : 8, // [27:20]
  39. looping_count : 4; // [31:28]
  40. #else
  41. struct buffer_addr_info buf_or_link_desc_addr_info;
  42. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  43. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  44. uint32_t buffer_virt_addr_31_0 : 32; // [31:0]
  45. uint32_t buffer_virt_addr_63_32 : 32; // [31:0]
  46. uint32_t looping_count : 4, // [31:28]
  47. ring_id : 8, // [27:20]
  48. reo_destination_struct_signature : 4, // [19:16]
  49. src_link_id : 3, // [15:13]
  50. sw_exception : 1, // [12:12]
  51. captured_msdu_data_size : 4, // [11:8]
  52. reo_error_code : 5, // [7:3]
  53. reo_push_reason : 2, // [2:1]
  54. reo_dest_buffer_type : 1; // [0:0]
  55. #endif
  56. };
  57. /* Description BUF_OR_LINK_DESC_ADDR_INFO
  58. Consumer: REO/SW/FW
  59. Producer: RXDMA
  60. Details of the physical address of the a buffer or MSDU
  61. link descriptor
  62. */
  63. /* Description BUFFER_ADDR_31_0
  64. Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION
  65. descriptor OR Link Descriptor
  66. In case of 'NULL' pointer, this field is set to 0
  67. <legal all>
  68. */
  69. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  70. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  71. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
  72. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  73. /* Description BUFFER_ADDR_39_32
  74. Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION
  75. descriptor OR Link Descriptor
  76. In case of 'NULL' pointer, this field is set to 0
  77. <legal all>
  78. */
  79. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  80. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  81. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
  82. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  83. /* Description RETURN_BUFFER_MANAGER
  84. Consumer: WBM
  85. Producer: SW/FW
  86. In case of 'NULL' pointer, this field is set to 0
  87. Indicates to which buffer manager the buffer OR MSDU_EXTENSION
  88. descriptor OR link descriptor that is being pointed to
  89. shall be returned after the frame has been processed. It
  90. is used by WBM for routing purposes.
  91. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  92. to the WMB buffer idle list
  93. <enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned
  94. to the WBM idle link descriptor idle list, where the chip
  95. 0 WBM is chosen in case of a multi-chip config
  96. <enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned
  97. to the chip 1 WBM idle link descriptor idle list
  98. <enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned
  99. to the chip 2 WBM idle link descriptor idle list
  100. <enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be
  101. returned to chip 3 WBM idle link descriptor idle list
  102. <enum 4 FW_BM> This buffer shall be returned to the FW
  103. <enum 5 SW0_BM> This buffer shall be returned to the SW,
  104. ring 0
  105. <enum 6 SW1_BM> This buffer shall be returned to the SW,
  106. ring 1
  107. <enum 7 SW2_BM> This buffer shall be returned to the SW,
  108. ring 2
  109. <enum 8 SW3_BM> This buffer shall be returned to the SW,
  110. ring 3
  111. <enum 9 SW4_BM> This buffer shall be returned to the SW,
  112. ring 4
  113. <enum 10 SW5_BM> This buffer shall be returned to the SW,
  114. ring 5
  115. <enum 11 SW6_BM> This buffer shall be returned to the SW,
  116. ring 6
  117. <legal 0-12>
  118. */
  119. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  120. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  121. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
  122. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
  123. /* Description SW_BUFFER_COOKIE
  124. Cookie field exclusively used by SW.
  125. In case of 'NULL' pointer, this field is set to 0
  126. HW ignores the contents, accept that it passes the programmed
  127. value on to other descriptors together with the physical
  128. address
  129. Field can be used by SW to for example associate the buffers
  130. physical address with the virtual address
  131. The bit definitions as used by SW are within SW HLD specification
  132. NOTE1:
  133. The three most significant bits can have a special meaning
  134. in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
  135. and field transmit_bw_restriction is set
  136. In case of NON punctured transmission:
  137. Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only
  138. Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only
  139. Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only
  140. Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only
  141. Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only
  142. Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only
  143. Sw_buffer_cookie[19:18] = 2'b11: reserved
  144. In case of punctured transmission:
  145. Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only
  146. Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only
  147. Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only
  148. Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only
  149. Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only
  150. Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only
  151. Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only
  152. Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only
  153. Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only
  154. Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only
  155. Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only
  156. Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only
  157. Sw_buffer_cookie[19:18] = 2'b11: reserved
  158. Note: a punctured transmission is indicated by the presence
  159. of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV
  160. <legal all>
  161. */
  162. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  163. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
  164. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
  165. #define REO_DESTINATION_RING_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
  166. /* Description RX_MPDU_DESC_INFO_DETAILS
  167. Consumer: REO/SW/FW
  168. Producer: RXDMA
  169. General information related to the MPDU that is passed on
  170. from REO entrance ring to the REO destination ring
  171. When enabled in REO, REO will overwrite this structure to
  172. have only the 'Msdu_count' field and 56 bits of the previous
  173. PN from 'RX_REO_QUEUE'
  174. */
  175. /* Description MSDU_COUNT
  176. Consumer: REO/SW/FW
  177. Producer: RXDMA
  178. The number of MSDUs within the MPDU
  179. <legal all>
  180. */
  181. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  182. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  183. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7
  184. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  185. /* Description FRAGMENT_FLAG
  186. Consumer: REO/SW/FW
  187. Producer: RXDMA
  188. When set, this MPDU is a fragment and REO should forward
  189. this fragment MPDU to the REO destination ring without
  190. any reorder checks, pn checks or bitmap update. This implies
  191. that REO is forwarding the pointer to the MSDU link descriptor.
  192. The destination ring is coming from a programmable register
  193. setting in REO
  194. <legal all>
  195. */
  196. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  197. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8
  198. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8
  199. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100
  200. /* Description MPDU_RETRY_BIT
  201. Consumer: REO/SW/FW
  202. Producer: RXDMA
  203. The retry bit setting from the MPDU header of the received
  204. frame
  205. <legal all>
  206. */
  207. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  208. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9
  209. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9
  210. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200
  211. /* Description AMPDU_FLAG
  212. Consumer: REO/SW/FW
  213. Producer: RXDMA
  214. When set, the MPDU was received as part of an A-MPDU.
  215. <legal all>
  216. */
  217. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  218. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10
  219. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10
  220. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400
  221. /* Description BAR_FRAME
  222. Consumer: REO/SW/FW
  223. Producer: RXDMA
  224. When set, the received frame is a BAR frame. After processing,
  225. this frame shall be pushed to SW or deleted.
  226. <legal all>
  227. */
  228. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  229. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11
  230. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11
  231. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800
  232. /* Description PN_FIELDS_CONTAIN_VALID_INFO
  233. Consumer: REO/SW/FW
  234. Producer: RXDMA
  235. Copied here by RXDMA from RX_MPDU_END
  236. When not set, REO will Not perform a PN sequence number
  237. check
  238. */
  239. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  240. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12
  241. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12
  242. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000
  243. /* Description RAW_MPDU
  244. Field only valid when first_msdu_in_mpdu_flag is set.
  245. When set, the contents in the MSDU buffer contains a 'RAW'
  246. MPDU. This 'RAW' MPDU might be spread out over multiple
  247. MSDU buffers.
  248. <legal all>
  249. */
  250. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  251. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13
  252. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13
  253. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000
  254. /* Description MORE_FRAGMENT_FLAG
  255. The More Fragment bit setting from the MPDU header of the
  256. received frame
  257. <legal all>
  258. */
  259. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  260. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14
  261. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14
  262. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000
  263. /* Description SRC_INFO
  264. Source (virtual) device/interface info. associated with
  265. this peer
  266. This field gets passed on by REO to PPE in the EDMA descriptor
  267. ('REO_TO_PPE_RING').
  268. <legal all>
  269. */
  270. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008
  271. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15
  272. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26
  273. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000
  274. /* Description MPDU_QOS_CONTROL_VALID
  275. When set, the MPDU has a QoS control field.
  276. In case of ndp or phy_err, this field will never be set.
  277. <legal all>
  278. */
  279. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008
  280. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27
  281. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27
  282. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000
  283. /* Description TID
  284. Field only valid when mpdu_qos_control_valid is set
  285. The TID field in the QoS control field
  286. <legal all>
  287. */
  288. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008
  289. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28
  290. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31
  291. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000
  292. /* Description PEER_META_DATA
  293. Meta data that SW has programmed in the Peer table entry
  294. of the transmitting STA.
  295. <legal all>
  296. */
  297. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  298. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  299. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31
  300. #define REO_DESTINATION_RING_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  301. /* Description RX_MSDU_DESC_INFO_DETAILS
  302. General information related to the MSDU that is passed on
  303. from RXDMA all the way to to the REO destination ring.
  304. */
  305. /* Description FIRST_MSDU_IN_MPDU_FLAG
  306. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  307. multiple buffers, this field will be valid in the Last
  308. buffer used by the MSDU
  309. <enum 0 Not_first_msdu> This is not the first MSDU in the
  310. MPDU.
  311. <enum 1 first_msdu> This MSDU is the first one in the MPDU.
  312. <legal all>
  313. */
  314. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  315. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  316. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MSB 0
  317. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  318. /* Description LAST_MSDU_IN_MPDU_FLAG
  319. Consumer: WBM/REO/SW/FW
  320. Producer: RXDMA
  321. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  322. multiple buffers, this field will be valid in the Last
  323. buffer used by the MSDU
  324. <enum 0 Not_last_msdu> There are more MSDUs linked to this
  325. MSDU that belongs to this MPDU
  326. <enum 1 Last_msdu> this MSDU is the last one in the MPDU.
  327. This setting is only allowed in combination with 'Msdu_continuation'
  328. set to 0. This implies that when an msdu is spread out over
  329. multiple buffers and thus msdu_continuation is set, only
  330. for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag'
  331. be set.
  332. When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag
  333. are set, the MPDU that this MSDU belongs to only contains
  334. a single MSDU.
  335. <legal all>
  336. */
  337. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  338. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  339. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MSB 1
  340. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  341. /* Description MSDU_CONTINUATION
  342. When set, this MSDU buffer was not able to hold the entire
  343. MSDU. The next buffer will therefor contain additional
  344. information related to this MSDU.
  345. <legal all>
  346. */
  347. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000010
  348. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
  349. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MSB 2
  350. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
  351. /* Description MSDU_LENGTH
  352. Parsed from RX_MSDU_START TLV . In the case MSDU spans over
  353. multiple buffers, this field will be valid in the First
  354. buffer used by MSDU.
  355. Full MSDU length in bytes after decapsulation.
  356. This field is still valid for MPDU frames without A-MSDU.
  357. It still represents MSDU length after decapsulation
  358. Or in case of RAW MPDUs, it indicates the length of the
  359. entire MPDU (without FCS field)
  360. <legal all>
  361. */
  362. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000010
  363. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
  364. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MSB 16
  365. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
  366. /* Description MSDU_DROP
  367. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  368. multiple buffers, this field will be valid in the Last
  369. buffer used by the MSDU
  370. When set, REO shall drop this MSDU and not forward it to
  371. any other ring...
  372. <legal all>
  373. */
  374. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000010
  375. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 17
  376. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MSB 17
  377. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00020000
  378. /* Description SA_IS_VALID
  379. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  380. multiple buffers, this field will be valid in the Last
  381. buffer used by the MSDU
  382. Indicates that OLE found a valid SA entry for this MSDU
  383. <legal all>
  384. */
  385. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000010
  386. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 18
  387. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MSB 18
  388. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00040000
  389. /* Description DA_IS_VALID
  390. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  391. multiple buffers, this field will be valid in the Last
  392. buffer used by the MSDU
  393. Indicates that OLE found a valid DA entry for this MSDU
  394. <legal all>
  395. */
  396. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000010
  397. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 19
  398. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MSB 19
  399. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x00080000
  400. /* Description DA_IS_MCBC
  401. Field Only valid if "da_is_valid" is set
  402. Indicates the DA address was a Multicast of Broadcast address
  403. for this MSDU
  404. <legal all>
  405. */
  406. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000010
  407. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 20
  408. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MSB 20
  409. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x00100000
  410. /* Description L3_HEADER_PADDING_MSB
  411. Passed on from 'RX_MSDU_END' TLV (only the MSB is reported
  412. as the LSB is always zero)
  413. Number of bytes padded to make sure that the L3 header will
  414. always start of a Dword boundary
  415. <legal all>
  416. */
  417. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_OFFSET 0x00000010
  418. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_LSB 21
  419. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MSB 21
  420. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_L3_HEADER_PADDING_MSB_MASK 0x00200000
  421. /* Description TCP_UDP_CHKSUM_FAIL
  422. Passed on from 'RX_ATTENTION' TLV
  423. Indicates that the computed checksum did not match the checksum
  424. in the TCP/UDP header.
  425. <legal all>
  426. */
  427. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000010
  428. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_LSB 22
  429. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MSB 22
  430. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000
  431. /* Description IP_CHKSUM_FAIL
  432. Passed on from 'RX_ATTENTION' TLV
  433. Indicates that the computed checksum did not match the checksum
  434. in the IP header.
  435. <legal all>
  436. */
  437. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_OFFSET 0x00000010
  438. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_LSB 23
  439. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MSB 23
  440. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_IP_CHKSUM_FAIL_MASK 0x00800000
  441. /* Description FR_DS
  442. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  443. TLV
  444. Set if the 'from DS' bit is set in the frame control.
  445. <legal all>
  446. */
  447. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FR_DS_OFFSET 0x00000010
  448. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FR_DS_LSB 24
  449. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MSB 24
  450. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_FR_DS_MASK 0x01000000
  451. /* Description TO_DS
  452. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  453. TLV
  454. Set if the 'to DS' bit is set in the frame control.
  455. <legal all>
  456. */
  457. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TO_DS_OFFSET 0x00000010
  458. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TO_DS_LSB 25
  459. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MSB 25
  460. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_TO_DS_MASK 0x02000000
  461. /* Description INTRA_BSS
  462. This packet needs intra-BSS routing by SW as the 'vdev_id'
  463. for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START')
  464. that this MSDU was got in.
  465. <legal all>
  466. */
  467. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_OFFSET 0x00000010
  468. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_LSB 26
  469. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MSB 26
  470. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_INTRA_BSS_MASK 0x04000000
  471. /* Description DEST_CHIP_ID
  472. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  473. to support intra-BSS routing with multi-chip multi-link
  474. operation.
  475. This indicates into which chip's TCL the packet should be
  476. queued.
  477. <legal all>
  478. */
  479. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_OFFSET 0x00000010
  480. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_LSB 27
  481. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MSB 28
  482. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_ID_MASK 0x18000000
  483. /* Description DECAP_FORMAT
  484. Indicates the format after decapsulation:
  485. <enum 0 RAW> No encapsulation
  486. <enum 1 Native_WiFi>
  487. <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC)
  488. <enum 3 802_3> Indicate Ethernet
  489. <legal all>
  490. */
  491. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_OFFSET 0x00000010
  492. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_LSB 29
  493. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MSB 30
  494. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DECAP_FORMAT_MASK 0x60000000
  495. /* Description DEST_CHIP_PMAC_ID
  496. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  497. to support intra-BSS routing with multi-chip multi-link
  498. operation.
  499. This indicates into which link/'vdev' the packet should
  500. be queued in TCL.
  501. <legal all>
  502. */
  503. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_OFFSET 0x00000010
  504. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_LSB 31
  505. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MSB 31
  506. #define REO_DESTINATION_RING_RX_MSDU_DESC_INFO_DETAILS_DEST_CHIP_PMAC_ID_MASK 0x80000000
  507. /* Description BUFFER_VIRT_ADDR_31_0
  508. Field only valid if Reo_dest_buffer_type is set to MSDU_buf_address
  509. Lower 32 bits of the 64-bit virtual address corresponding
  510. to Buf_or_link_desc_addr_info
  511. <legal all>
  512. */
  513. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_31_0_OFFSET 0x00000014
  514. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_31_0_LSB 0
  515. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_31_0_MSB 31
  516. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_31_0_MASK 0xffffffff
  517. /* Description BUFFER_VIRT_ADDR_63_32
  518. Field only valid if Reo_dest_buffer_type is set to MSDU_buf_address
  519. Upper 32 bits of the 64-bit virtual address corresponding
  520. to Buf_or_link_desc_addr_info
  521. <legal all>
  522. */
  523. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_63_32_OFFSET 0x00000018
  524. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_63_32_LSB 0
  525. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_63_32_MSB 31
  526. #define REO_DESTINATION_RING_BUFFER_VIRT_ADDR_63_32_MASK 0xffffffff
  527. /* Description REO_DEST_BUFFER_TYPE
  528. Indicates the type of address provided in the 'Buf_or_link_desc_addr_info'
  529. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  530. <enum 1 MSDU_link_desc_address> The address of the MSDU
  531. link descriptor.
  532. <legal all>
  533. */
  534. #define REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  535. #define REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_LSB 0
  536. #define REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_MSB 0
  537. #define REO_DESTINATION_RING_REO_DEST_BUFFER_TYPE_MASK 0x00000001
  538. /* Description REO_PUSH_REASON
  539. Indicates why REO pushed the frame to this exit ring
  540. <enum 0 reo_error_detected> Reo detected an error an pushed
  541. this frame to this queue
  542. <enum 1 reo_routing_instruction> Reo pushed the frame to
  543. this queue per received routing instructions. No error
  544. within REO was detected
  545. <legal 0 - 1>
  546. */
  547. #define REO_DESTINATION_RING_REO_PUSH_REASON_OFFSET 0x0000001c
  548. #define REO_DESTINATION_RING_REO_PUSH_REASON_LSB 1
  549. #define REO_DESTINATION_RING_REO_PUSH_REASON_MSB 2
  550. #define REO_DESTINATION_RING_REO_PUSH_REASON_MASK 0x00000006
  551. /* Description REO_ERROR_CODE
  552. Field only valid when 'Reo_push_reason' set to 'reo_error_detected'.
  553. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor provided
  554. in the REO_ENTRANCE ring is set to 0
  555. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor valid
  556. bit is NOT set
  557. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  558. session having been setup.
  559. <enum 3 non_ba_duplicate> Non-BA session, SN equal to SSN,
  560. Retry bit set: duplicate frame
  561. <enum 4 ba_duplicate> BA session, duplicate frame
  562. <enum 5 regular_frame_2k_jump> A normal (management/data
  563. frame) received with 2K jump in SN
  564. <enum 6 bar_frame_2k_jump> A bar received with 2K jump in
  565. SSN
  566. <enum 7 regular_frame_OOR> A normal (management/data frame)
  567. received with SN falling within the OOR window
  568. <enum 8 bar_frame_OOR> A bar received with SSN falling within
  569. the OOR window
  570. <enum 9 bar_frame_no_ba_session> A bar received without
  571. a BA session
  572. <enum 10 bar_frame_sn_equals_ssn> A bar received with SSN
  573. equal to SN
  574. <enum 11 pn_check_failed> PN Check Failed packet.
  575. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  576. as a result of the 'Seq_2k_error_detected_flag' been set
  577. in the REO Queue descriptor
  578. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  579. as a result of the 'pn_error_detected_flag' been set in
  580. the REO Queue descriptor
  581. <enum 14 queue_descriptor_blocked_set> Frame is forwarded
  582. as a result of the queue descriptor(address) being blocked
  583. as SW/FW seems to be currently in the process of making
  584. updates to this descriptor...
  585. <legal 0-14>
  586. */
  587. #define REO_DESTINATION_RING_REO_ERROR_CODE_OFFSET 0x0000001c
  588. #define REO_DESTINATION_RING_REO_ERROR_CODE_LSB 3
  589. #define REO_DESTINATION_RING_REO_ERROR_CODE_MSB 7
  590. #define REO_DESTINATION_RING_REO_ERROR_CODE_MASK 0x000000f8
  591. /* Description CAPTURED_MSDU_DATA_SIZE
  592. The number of following REO_DESTINATION STRUCTs that have
  593. been replaced with msdu_data extracted from the msdu_buffer
  594. and copied into the ring for easy FW/SW access.
  595. Note that it is possible that these STRUCTs wrap around
  596. the end of the ring.
  597. <legal 0-4>
  598. */
  599. #define REO_DESTINATION_RING_CAPTURED_MSDU_DATA_SIZE_OFFSET 0x0000001c
  600. #define REO_DESTINATION_RING_CAPTURED_MSDU_DATA_SIZE_LSB 8
  601. #define REO_DESTINATION_RING_CAPTURED_MSDU_DATA_SIZE_MSB 11
  602. #define REO_DESTINATION_RING_CAPTURED_MSDU_DATA_SIZE_MASK 0x00000f00
  603. /* Description SW_EXCEPTION
  604. This field has the same setting as the SW_exception field
  605. in the corresponding REO_entrance_ring descriptor.
  606. When set, the REO entrance descriptor is generated by FW,
  607. and the MPDU was processed in the following way:
  608. - NO re-order function is needed.
  609. - MPDU delinking is determined by the setting of Entrance
  610. ring field: SW_excection_mpdu_delink
  611. - Destination ring selection is based on the setting of
  612. the Entrance ring field SW_exception_destination _ring_valid
  613. <legal all>
  614. */
  615. #define REO_DESTINATION_RING_SW_EXCEPTION_OFFSET 0x0000001c
  616. #define REO_DESTINATION_RING_SW_EXCEPTION_LSB 12
  617. #define REO_DESTINATION_RING_SW_EXCEPTION_MSB 12
  618. #define REO_DESTINATION_RING_SW_EXCEPTION_MASK 0x00001000
  619. /* Description SRC_LINK_ID
  620. Consumer: SW
  621. Producer: RXDMA
  622. Set to the link ID of the PMAC that received the frame
  623. <legal all>
  624. */
  625. #define REO_DESTINATION_RING_SRC_LINK_ID_OFFSET 0x0000001c
  626. #define REO_DESTINATION_RING_SRC_LINK_ID_LSB 13
  627. #define REO_DESTINATION_RING_SRC_LINK_ID_MSB 15
  628. #define REO_DESTINATION_RING_SRC_LINK_ID_MASK 0x0000e000
  629. /* Description REO_DESTINATION_STRUCT_SIGNATURE
  630. Set to value 0x8 when msdu capture mode is enabled for this
  631. ring <legal 0, 8 >
  632. */
  633. #define REO_DESTINATION_RING_REO_DESTINATION_STRUCT_SIGNATURE_OFFSET 0x0000001c
  634. #define REO_DESTINATION_RING_REO_DESTINATION_STRUCT_SIGNATURE_LSB 16
  635. #define REO_DESTINATION_RING_REO_DESTINATION_STRUCT_SIGNATURE_MSB 19
  636. #define REO_DESTINATION_RING_REO_DESTINATION_STRUCT_SIGNATURE_MASK 0x000f0000
  637. /* Description RING_ID
  638. The buffer pointer ring ID.
  639. 0 refers to the IDLE ring
  640. 1 - N refers to other rings
  641. Helps with debugging when dumping ring contents.
  642. This can be used in conjunction with the Reo_destination_struct_signature.
  643. For debugging, if enabled, REO may fill the Rx MPDU sequence
  644. number in {Looping_count, ring_id}.
  645. <legal all>
  646. */
  647. #define REO_DESTINATION_RING_RING_ID_OFFSET 0x0000001c
  648. #define REO_DESTINATION_RING_RING_ID_LSB 20
  649. #define REO_DESTINATION_RING_RING_ID_MSB 27
  650. #define REO_DESTINATION_RING_RING_ID_MASK 0x0ff00000
  651. /* Description LOOPING_COUNT
  652. A count value that indicates the number of times the producer
  653. of entries into this Ring has looped around the ring.
  654. At initialization time, this value is set to 0. On the first
  655. loop, this value is set to 1. After the max value is reached
  656. allowed by the number of bits for this field, the count
  657. value continues with 0 again.
  658. In case SW is the consumer of the ring entries, it can use
  659. this field to figure out up to where the producer of entries
  660. has created new entries. This eliminates the need to check
  661. where the "head pointer' of the ring is located once the
  662. SW starts processing an interrupt indicating that new entries
  663. have been put into this ring...
  664. Also note that SW if it wants only needs to look at the
  665. LSB bit of this count value.
  666. For debugging, if enabled, REO may fill the Rx MPDU sequence
  667. number in {Looping_count, ring_id}.
  668. <legal all>
  669. */
  670. #define REO_DESTINATION_RING_LOOPING_COUNT_OFFSET 0x0000001c
  671. #define REO_DESTINATION_RING_LOOPING_COUNT_LSB 28
  672. #define REO_DESTINATION_RING_LOOPING_COUNT_MSB 31
  673. #define REO_DESTINATION_RING_LOOPING_COUNT_MASK 0xf0000000
  674. #endif // REO_DESTINATION_RING