pcu_ppdu_setup_init.h 293 KB

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  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _PCU_PPDU_SETUP_INIT_H_
  17. #define _PCU_PPDU_SETUP_INIT_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #include "pdg_response_rate_setting.h"
  21. #define NUM_OF_DWORDS_PCU_PPDU_SETUP_INIT 58
  22. #define NUM_OF_QWORDS_PCU_PPDU_SETUP_INIT 29
  23. struct pcu_ppdu_setup_init {
  24. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  25. uint32_t medium_prot_type : 3, // [2:0]
  26. response_type : 5, // [7:3]
  27. response_info_part2_required : 1, // [8:8]
  28. response_to_response : 3, // [11:9]
  29. mba_user_order : 2, // [13:12]
  30. expected_mba_size : 11, // [24:14]
  31. required_ul_mu_resp_user_count : 6, // [30:25]
  32. transmitted_bssid_check_en : 1; // [31:31]
  33. uint32_t mprot_required_bw1 : 1, // [0:0]
  34. mprot_required_bw20 : 1, // [1:1]
  35. mprot_required_bw40 : 1, // [2:2]
  36. mprot_required_bw80 : 1, // [3:3]
  37. mprot_required_bw160 : 1, // [4:4]
  38. mprot_required_bw240 : 1, // [5:5]
  39. mprot_required_bw320 : 1, // [6:6]
  40. ppdu_allowed_bw1 : 1, // [7:7]
  41. ppdu_allowed_bw20 : 1, // [8:8]
  42. ppdu_allowed_bw40 : 1, // [9:9]
  43. ppdu_allowed_bw80 : 1, // [10:10]
  44. ppdu_allowed_bw160 : 1, // [11:11]
  45. ppdu_allowed_bw240 : 1, // [12:12]
  46. ppdu_allowed_bw320 : 1, // [13:13]
  47. set_fc_pwr_mgt : 1, // [14:14]
  48. use_cts_duration_for_data_tx : 1, // [15:15]
  49. update_timestamp_64 : 1, // [16:16]
  50. update_timestamp_32_lower : 1, // [17:17]
  51. update_timestamp_32_upper : 1, // [18:18]
  52. reserved_1a : 13; // [31:19]
  53. uint32_t insert_timestamp_offset_0 : 16, // [15:0]
  54. insert_timestamp_offset_1 : 16; // [31:16]
  55. uint32_t max_bw40_try_count : 4, // [3:0]
  56. max_bw80_try_count : 4, // [7:4]
  57. max_bw160_try_count : 4, // [11:8]
  58. max_bw240_try_count : 4, // [15:12]
  59. max_bw320_try_count : 4, // [19:16]
  60. insert_wur_timestamp_offset : 6, // [25:20]
  61. update_wur_timestamp : 1, // [26:26]
  62. wur_embedded_bssid_present : 1, // [27:27]
  63. insert_wur_fcs : 1, // [28:28]
  64. reserved_3b : 3; // [31:29]
  65. struct pdg_response_rate_setting response_to_response_rate_info_bw20;
  66. struct pdg_response_rate_setting response_to_response_rate_info_bw40;
  67. struct pdg_response_rate_setting response_to_response_rate_info_bw80;
  68. struct pdg_response_rate_setting response_to_response_rate_info_bw160;
  69. struct pdg_response_rate_setting response_to_response_rate_info_bw240;
  70. struct pdg_response_rate_setting response_to_response_rate_info_bw320;
  71. uint32_t r2r_hw_response_tx_duration : 16, // [15:0]
  72. r2r_rx_duration_field : 16; // [31:16]
  73. uint32_t r2r_group_id : 6, // [5:0]
  74. r2r_response_frame_type : 4, // [9:6]
  75. r2r_sta_partial_aid : 11, // [20:10]
  76. use_address_fields_for_protection : 1, // [21:21]
  77. r2r_set_required_response_time : 1, // [22:22]
  78. reserved_29a : 3, // [25:23]
  79. r2r_bw20_active_channel : 3, // [28:26]
  80. r2r_bw40_active_channel : 3; // [31:29]
  81. uint32_t r2r_bw80_active_channel : 3, // [2:0]
  82. r2r_bw160_active_channel : 3, // [5:3]
  83. r2r_bw240_active_channel : 3, // [8:6]
  84. r2r_bw320_active_channel : 3, // [11:9]
  85. r2r_bw20 : 3, // [14:12]
  86. r2r_bw40 : 3, // [17:15]
  87. r2r_bw80 : 3, // [20:18]
  88. r2r_bw160 : 3, // [23:21]
  89. r2r_bw240 : 3, // [26:24]
  90. r2r_bw320 : 3, // [29:27]
  91. reserved_30a : 2; // [31:30]
  92. uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0]
  93. uint32_t mu_response_expected_bitmap_36_32 : 5, // [4:0]
  94. mu_expected_response_cbf_count : 6, // [10:5]
  95. mu_expected_response_sta_count : 6, // [16:11]
  96. transmit_includes_multidestination : 1, // [17:17]
  97. insert_prev_tx_start_timing_info : 1, // [18:18]
  98. insert_current_tx_start_timing_info : 1, // [19:19]
  99. tx_start_transmit_time_byte_offset : 12; // [31:20]
  100. uint32_t protection_frame_ad1_31_0 : 32; // [31:0]
  101. uint32_t protection_frame_ad1_47_32 : 16, // [15:0]
  102. protection_frame_ad2_15_0 : 16; // [31:16]
  103. uint32_t protection_frame_ad2_47_16 : 32; // [31:0]
  104. uint32_t dynamic_medium_prot_threshold : 24, // [23:0]
  105. dynamic_medium_prot_type : 1, // [24:24]
  106. reserved_54a : 7; // [31:25]
  107. uint32_t protection_frame_ad3_31_0 : 32; // [31:0]
  108. uint32_t protection_frame_ad3_47_32 : 16, // [15:0]
  109. protection_frame_ad4_15_0 : 16; // [31:16]
  110. uint32_t protection_frame_ad4_47_16 : 32; // [31:0]
  111. #else
  112. uint32_t transmitted_bssid_check_en : 1, // [31:31]
  113. required_ul_mu_resp_user_count : 6, // [30:25]
  114. expected_mba_size : 11, // [24:14]
  115. mba_user_order : 2, // [13:12]
  116. response_to_response : 3, // [11:9]
  117. response_info_part2_required : 1, // [8:8]
  118. response_type : 5, // [7:3]
  119. medium_prot_type : 3; // [2:0]
  120. uint32_t reserved_1a : 13, // [31:19]
  121. update_timestamp_32_upper : 1, // [18:18]
  122. update_timestamp_32_lower : 1, // [17:17]
  123. update_timestamp_64 : 1, // [16:16]
  124. use_cts_duration_for_data_tx : 1, // [15:15]
  125. set_fc_pwr_mgt : 1, // [14:14]
  126. ppdu_allowed_bw320 : 1, // [13:13]
  127. ppdu_allowed_bw240 : 1, // [12:12]
  128. ppdu_allowed_bw160 : 1, // [11:11]
  129. ppdu_allowed_bw80 : 1, // [10:10]
  130. ppdu_allowed_bw40 : 1, // [9:9]
  131. ppdu_allowed_bw20 : 1, // [8:8]
  132. ppdu_allowed_bw1 : 1, // [7:7]
  133. mprot_required_bw320 : 1, // [6:6]
  134. mprot_required_bw240 : 1, // [5:5]
  135. mprot_required_bw160 : 1, // [4:4]
  136. mprot_required_bw80 : 1, // [3:3]
  137. mprot_required_bw40 : 1, // [2:2]
  138. mprot_required_bw20 : 1, // [1:1]
  139. mprot_required_bw1 : 1; // [0:0]
  140. uint32_t insert_timestamp_offset_1 : 16, // [31:16]
  141. insert_timestamp_offset_0 : 16; // [15:0]
  142. uint32_t reserved_3b : 3, // [31:29]
  143. insert_wur_fcs : 1, // [28:28]
  144. wur_embedded_bssid_present : 1, // [27:27]
  145. update_wur_timestamp : 1, // [26:26]
  146. insert_wur_timestamp_offset : 6, // [25:20]
  147. max_bw320_try_count : 4, // [19:16]
  148. max_bw240_try_count : 4, // [15:12]
  149. max_bw160_try_count : 4, // [11:8]
  150. max_bw80_try_count : 4, // [7:4]
  151. max_bw40_try_count : 4; // [3:0]
  152. struct pdg_response_rate_setting response_to_response_rate_info_bw20;
  153. struct pdg_response_rate_setting response_to_response_rate_info_bw40;
  154. struct pdg_response_rate_setting response_to_response_rate_info_bw80;
  155. struct pdg_response_rate_setting response_to_response_rate_info_bw160;
  156. struct pdg_response_rate_setting response_to_response_rate_info_bw240;
  157. struct pdg_response_rate_setting response_to_response_rate_info_bw320;
  158. uint32_t r2r_rx_duration_field : 16, // [31:16]
  159. r2r_hw_response_tx_duration : 16; // [15:0]
  160. uint32_t r2r_bw40_active_channel : 3, // [31:29]
  161. r2r_bw20_active_channel : 3, // [28:26]
  162. reserved_29a : 3, // [25:23]
  163. r2r_set_required_response_time : 1, // [22:22]
  164. use_address_fields_for_protection : 1, // [21:21]
  165. r2r_sta_partial_aid : 11, // [20:10]
  166. r2r_response_frame_type : 4, // [9:6]
  167. r2r_group_id : 6; // [5:0]
  168. uint32_t reserved_30a : 2, // [31:30]
  169. r2r_bw320 : 3, // [29:27]
  170. r2r_bw240 : 3, // [26:24]
  171. r2r_bw160 : 3, // [23:21]
  172. r2r_bw80 : 3, // [20:18]
  173. r2r_bw40 : 3, // [17:15]
  174. r2r_bw20 : 3, // [14:12]
  175. r2r_bw320_active_channel : 3, // [11:9]
  176. r2r_bw240_active_channel : 3, // [8:6]
  177. r2r_bw160_active_channel : 3, // [5:3]
  178. r2r_bw80_active_channel : 3; // [2:0]
  179. uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0]
  180. uint32_t tx_start_transmit_time_byte_offset : 12, // [31:20]
  181. insert_current_tx_start_timing_info : 1, // [19:19]
  182. insert_prev_tx_start_timing_info : 1, // [18:18]
  183. transmit_includes_multidestination : 1, // [17:17]
  184. mu_expected_response_sta_count : 6, // [16:11]
  185. mu_expected_response_cbf_count : 6, // [10:5]
  186. mu_response_expected_bitmap_36_32 : 5; // [4:0]
  187. uint32_t protection_frame_ad1_31_0 : 32; // [31:0]
  188. uint32_t protection_frame_ad2_15_0 : 16, // [31:16]
  189. protection_frame_ad1_47_32 : 16; // [15:0]
  190. uint32_t protection_frame_ad2_47_16 : 32; // [31:0]
  191. uint32_t reserved_54a : 7, // [31:25]
  192. dynamic_medium_prot_type : 1, // [24:24]
  193. dynamic_medium_prot_threshold : 24; // [23:0]
  194. uint32_t protection_frame_ad3_31_0 : 32; // [31:0]
  195. uint32_t protection_frame_ad4_15_0 : 16, // [31:16]
  196. protection_frame_ad3_47_32 : 16; // [15:0]
  197. uint32_t protection_frame_ad4_47_16 : 32; // [31:0]
  198. #endif
  199. };
  200. /* Description MEDIUM_PROT_TYPE
  201. Self Gen Medium Protection type used
  202. <enum 0 No_protection>
  203. <enum 1 RTS_legacy>
  204. <enum 2 RTS_11ac_static_bw>
  205. <enum 3 RTS_11ac_dynamic_bw>
  206. <enum 4 CTS2Self>
  207. <enum 5 QoS_Null_no_ack_3addr>
  208. <enum 6 QoS_Null_no_ack_4addr>
  209. <legal 0-6>
  210. */
  211. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000
  212. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_LSB 0
  213. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MSB 2
  214. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MASK 0x0000000000000007
  215. /* Description RESPONSE_TYPE
  216. PPDU transmission Response type expected
  217. Used by PDG to calculate the anticipated response duration
  218. time.
  219. Used by TXPCU to prepare for expecting to receive a response.
  220. <enum 0 no_response_expected>After transmission of this
  221. frame, no response in SIFS time is expected
  222. When TXPCU sees this setting, it shall not generated the
  223. EXPECTED_RESPONSE TLV.
  224. RXPCU should never see this setting
  225. <enum 1 ack_expected>An ACK frame is expected as response
  226. RXPCU is just expecting any response. It is TXPCU who checks
  227. that the right response was received.
  228. <enum 2 ba_64_bitmap_expected>BA with 64 bitmap is expected.
  229. PDG DOES NOT use the size info to calculated response duration.
  230. The length of the response will have to be programmed by
  231. SW in the per-BW 'Expected_ppdu_resp_length' field.
  232. For TXPCU only the fact that it is a BA is important. Actual
  233. received BA size is not important
  234. RXPCU is just expecting any response. It is TXPCU who checks
  235. that the right response was received.
  236. <enum 3 ba_256_expected>BA with 256 bitmap is expected.
  237. PDG DOES NOT use the size info to calculated response duration.
  238. The length of the response will have to be programmed by
  239. SW in the per-BW 'Expected_ppdu_resp_length' field.
  240. For TXPCU only the fact that it is a BA is important. Actual
  241. received BA size is not important
  242. RXPCU is just expecting any response. It is TXPCU who checks
  243. that the right response was received.
  244. <enum 4 actionnoack_expected>SW sets this after sending
  245. NDP or BR-Poll.
  246. As PDG has no idea on how long the reception is going to
  247. be, the reception time of the response will have to be
  248. programmed by SW in the 'Extend_duration_value_bw...' field
  249. RXPCU is just expecting any response. It is TXPCU who checks
  250. that the right response was received.
  251. <enum 5 ack_ba_expected>PDG uses the size info and assumes
  252. single BA format with ACK and 64 bitmap embedded.
  253. If SW expects more bitmaps in case of multi-TID, is shall
  254. program the 'Extend_duration_value_bw...' field for additional
  255. duration time.
  256. For TXPCU only the fact that an ACK and/or BA is received
  257. is important. Reception of only ACK or BA is also considered
  258. a success.
  259. SW also typically sets this when sending VHT single MPDU.
  260. Some chip vendors might send BA rather than ACK in response
  261. to VHT single MPDU but still we want to accept BA as well.
  262. RXPCU is just expecting any response. It is TXPCU who checks
  263. that the right response was received.
  264. <enum 6 cts_expected>SW sets this after queuing RTS frame
  265. as standalone packet and sending it.
  266. RXPCU is just expecting any response. It is TXPCU who checks
  267. that the right response was received.
  268. <enum 7 ack_data_expected>SW sets this after sending PS-Poll.
  269. For TXPCU either ACK and/or data reception is considered
  270. success.
  271. PDG basis it's response duration calculation on an ACK.
  272. For the data portion, SW shall program the 'Extend_duration_value_bw...'
  273. field
  274. <enum 8 ndp_ack_expected>Reserved for 11ah usage.
  275. <enum 9 ndp_modified_ack>Reserved for 11ah usage
  276. <enum 10 ndp_ba_expected>Reserved for 11ah usage.
  277. <enum 11 ndp_cts_expected>Reserved for 11ah usage
  278. <enum 12 ndp_ack_or_ndp_modified_ack_expected>Reserved for
  279. 11ah usage
  280. TXPCU expects UL MU OFDMA or UL MU MIMO reception.
  281. As PDG does not know how RUs are assigned for the uplink
  282. portion, PDG can not calculate the uplink duration. Therefor
  283. SW shall program the 'Extend_duration_value_bw...' field
  284. RXPCU will report any frame received, irrespective of it
  285. having been UL MU or SU It is TXPCUs responsibility to
  286. distinguish between the UL MU or SU
  287. TXPCU can check in TLV RECEIVED_RESPONSE_INFO MU_Response_BA_bitmap
  288. if indeed BA was received
  289. TXPCU expects UL MU OFDMA or UL MU MIMO reception.
  290. As PDG does not know how RUs are assigned for the uplink
  291. portion, PDG can not calculate the uplink duration. Therefor
  292. SW shall program the 'Extend_duration_value_bw...' field
  293. RXPCU will report any frame received, irrespective of it
  294. having been UL MU or SU It is TXPCUs responsibility to
  295. distinguish between the UL MU or SU
  296. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_data_bitmap
  297. and MU_Response_BA_bitmap if indeed BA and data was received
  298. When selected, CBF frames are expected to be received in
  299. MU reception (uplink OFDMA or uplink MIMO)
  300. RXPCU is just expecting any response. It is TXPCU who checks
  301. that the right response was received
  302. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_cbf_bitmap
  303. if indeed CBF frames were received.
  304. <enum 16 ul_mu_frames_expected>When selected, MPDU frames
  305. are expected in the MU reception (uplink OFDMA or uplink
  306. MIMO)
  307. RXPCU is just expecting any response. It is TXPCU who checks
  308. that the right response was received
  309. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_bitmap
  310. if indeed frames were received.
  311. <enum 17 any_response_to_this_device>Any response expected
  312. to be send to this device in SIFS time is acceptable.
  313. RXPCU is just expecting any response. It is TXPCU who checks
  314. that the right response was received
  315. For TXPCU, UL MU or SU is both acceptable.
  316. Can be used for complex OFDMA scenarios. PDG can not calculate
  317. the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
  318. field
  319. <enum 18 any_response_accepted>Any frame in the medium to
  320. this or any other device, is acceptable as response.
  321. RXPCU is just expecting any response. It is TXPCU who checks
  322. that the right response was received
  323. For TXPCU, UL MU or SU is both acceptable.
  324. Can be used for complex OFDMA scenarios. PDG can not calculate
  325. the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
  326. field
  327. <enum 19 frameless_phyrx_response_accepted>Any MU frameless
  328. reception generated by the PHY is acceptable.
  329. PHY indicates this type of reception explicitly in TLV PHYRX_RSSI_LEGACY,
  330. field Reception_type == reception_is_frameless
  331. RXPCU will report any frame received, irrespective of it
  332. having been UL MU or SU.
  333. This can be used for complex MU-MIMO or OFDMA scenarios,
  334. like receiving MU-CTS.
  335. PDG can not calculate the uplink duration. Therefor SW shall
  336. program the 'Extend_duration_value_bw...' field
  337. <enum 20 ranging_ndp_and_lmr_expected>SW sets this after
  338. sending ranging NDPA followed by NDP as an ISTA and NDP
  339. and LMR (Action No Ack) are expected as back-to-back reception
  340. in SIFS.
  341. As PDG has no idea on how long the reception is going to
  342. be, the reception time of the response will have to be
  343. programmed by SW in the 'Extend_duration_value_bw...' field
  344. RXPCU is just expecting any response. It is TXPCU who checks
  345. that the right response was received.
  346. <enum 21 ba_512_expected>BA with 512 bitmap is expected.
  347. PDG DOES NOT use the size info to calculated response duration.
  348. The length of the response will have to be programmed by
  349. SW in the per-BW 'Expected_ppdu_resp_length' field.
  350. For TXPCU only the fact that it is a BA is important. Actual
  351. received BA size is not important
  352. RXPCU is just expecting any response. It is TXPCU who checks
  353. that the right response was received.
  354. <enum 22 ba_1024_expected>BA with 1024 bitmap is expected.
  355. PDG DOES NOT use the size info to calculated response duration.
  356. The length of the response will have to be programmed by
  357. SW in the per-BW 'Expected_ppdu_resp_length' field.
  358. For TXPCU only the fact that it is a BA is important. Actual
  359. received BA size is not important
  360. RXPCU is just expecting any response. It is TXPCU who checks
  361. that the right response was received.
  362. <enum 23 ul_mu_ranging_cts2s_expected>When selected, CTS2S
  363. frames are expected to be received in MU reception (uplink
  364. OFDMA)
  365. RXPCU shall check each response for CTS2S and report to
  366. TXPCU.
  367. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  368. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed CTS2S
  369. frames were received.
  370. <enum 24 ul_mu_ranging_ndp_expected>When selected, UL NDP
  371. frames are expected to be received in MU reception (uplink
  372. spatial multiplexing)
  373. RXPCU shall check each response for NDP and report to TXPCU.
  374. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  375. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed NDP
  376. frames were received.
  377. <enum 25 ul_mu_ranging_lmr_expected>When selected, LMR frames
  378. are expected to be received in MU reception (uplink OFDMA
  379. or uplink MIMO)
  380. RXPCU shall check each response for LMR and report to TXPCU.
  381. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  382. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed LMR
  383. frames were received.
  384. */
  385. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_OFFSET 0x0000000000000000
  386. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_LSB 3
  387. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MSB 7
  388. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MASK 0x00000000000000f8
  389. /* Description RESPONSE_INFO_PART2_REQUIRED
  390. Field only valid when Response_type is NOT set to No_response_expected
  391. When set to 1, RXPCU shall generate the RECEIVED_RESPONSE_INFO_PART2
  392. TLV after having received the response frame. TXPCU shall
  393. wait for this TLV before sending the TX_FES_STATUS_END
  394. TLV.
  395. When NOT set, RXPCU shall NOT generate the above mentioned
  396. TLV. TXPCU shall not wait for this TLV and after having
  397. received RECEIVED_RESPONSE_INFO TLV, it can immediately
  398. generate the TX_FES_STATUS_END TLV.
  399. <legal all>
  400. */
  401. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_OFFSET 0x0000000000000000
  402. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_LSB 8
  403. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MSB 8
  404. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MASK 0x0000000000000100
  405. /* Description RESPONSE_TO_RESPONSE
  406. Field indicates if after receiving an expected PPDU response
  407. (as indicated by the Response_type), TXPCU is expected
  408. to generate a reponse to that response
  409. Example: OFDMA trigger frame is sent, with expected response
  410. being UL OFDMA data, which result in a response to the
  411. response of MBA
  412. <enum 0 None> No response after response allowed.
  413. <enum 1 SU_BA> The response after response that TXPCU is
  414. allowed to generate is a single BA. Even if RXPCU is indicating
  415. that multiple users are received, TXPCU shall only send
  416. a BA for 1 STA. Response_to_response rates can be found
  417. in fields 'response_to_response_rate_info_bw...'
  418. <enum 2 MU_BA> The response after response that TXPCU is
  419. allowed to generate is only Multi Destination Multi User
  420. BA. Response_to_response rates can be found in fields 'response_to_response_rate_info_bw...'
  421. <enum 3 RESPONSE_TO_RESPONSE_CMD> A response to response
  422. is expected to be generated. In other words, RXPCU will
  423. likely indicate to TXPCU at the end of upcoming reception
  424. that a response is needed. TXPCU is however to ignore this
  425. indication from RXPCU, and assume for a moment that no
  426. response to response is needed, as all the details on how
  427. to handle this is provided in the next scheduling command,
  428. which is marked as a 'response_to_response' type.
  429. <legal 0-3>
  430. */
  431. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_OFFSET 0x0000000000000000
  432. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_LSB 9
  433. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MSB 11
  434. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MASK 0x0000000000000e00
  435. /* Description MBA_USER_ORDER
  436. Field only valid in case of 'response_to_response' set to
  437. MU_BA.
  438. <enum 0 mu_ba_fixed_user_order> TXPCU shall ask RXPCU for
  439. BA info for all TX users, in order from user 0 to user
  440. N
  441. <enum 1 mu_ba_optimized_user_order> TXPCU shall ask RXPCU
  442. for BA info for all TX users, but let RXPCU determine in
  443. which order the BA bitmaps for each user shall be returned.
  444. Note that RXPCU might return some 'invalid' bitmaps in case
  445. there was no data received from all the users.
  446. <enum 2 mu_ba_fully_optimized> TXPCU shall ask RXPCU for
  447. BA info for the number RX users that RXPCU indicated in
  448. the 'Max_rx_user_count' in the RX_PPDU_START TLV. TXPCU
  449. shall let RXPCU determine in which order the BA bitmaps
  450. for each user shall be returned. Note that RXPCU might
  451. still return some 'invalid' bitmaps in case there were only
  452. frames with FCS errors for some of the users
  453. <enum 3 mu_ba_fully_optimized_multi_tid> TXPCU shall ask
  454. RXPCU for BA info for the number bitmaps that RXPCU indicated
  455. in the (SUM of) response_ack_count, response_ba64_count,
  456. response_ba256_count fields in RX_RESPONSE_REQUIRED. TXPCU
  457. shall let RXPCU determine in which order the BA bitmaps
  458. for each user (and sometimes multiple bitmaps for a the
  459. same user in case of multi TID) shall be returned. It is
  460. not expected that RXPCU will return invalid bitmaps for
  461. this scenario as RXPCU earlier indicates that this number
  462. of bitmaps was actually available in RXPCU...
  463. <legal 0-3>
  464. */
  465. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_OFFSET 0x0000000000000000
  466. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_LSB 12
  467. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MSB 13
  468. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MASK 0x0000000000003000
  469. /* Description EXPECTED_MBA_SIZE
  470. Field only valid for:
  471. Mba_user_order == mu_ba_fixed_user_order, mu_ba_optimized_user_order
  472. The expected number of bytes in response (Multi destination)
  473. BA that TXPCU shall request to PDG.
  474. NOTE that SW should have pre-calculated and thus looked-up
  475. the window sizes for each of the STAs.
  476. <legal all>
  477. */
  478. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_OFFSET 0x0000000000000000
  479. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_LSB 14
  480. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MSB 24
  481. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MASK 0x0000000001ffc000
  482. /* Description REQUIRED_UL_MU_RESP_USER_COUNT
  483. Field only valid for: Response_to_response
  484. == MU_BA
  485. or
  486. RESPONSE_TO_RESPONSE_CMD
  487. Field MU_RX_successful_user_count as reported in the RECEIVED_RESPONSE_INFO
  488. TLV shall be >= to this field, in order to consider the
  489. reception successful.
  490. Note that the value in this field shall always be equal
  491. or smaller to the number of bits set in field MU_Response_expected_bitmap_....
  492. <legal all>
  493. */
  494. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_OFFSET 0x0000000000000000
  495. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_LSB 25
  496. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MSB 30
  497. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MASK 0x000000007e000000
  498. /* Description TRANSMITTED_BSSID_CHECK_EN
  499. When set to 1, RXPCU shall assume group addressed frame
  500. with Tx_AD2 equal to TBSSID was sent. RxPCU should properly
  501. handle receive frame(s) from STA(s) which A1 is TBSSID
  502. or any VAPs.When NOT set, RXPCU shall compare received frame's
  503. A1 with Tx_AD2 only.
  504. <legal all>
  505. */
  506. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_OFFSET 0x0000000000000000
  507. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_LSB 31
  508. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MSB 31
  509. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MASK 0x0000000080000000
  510. /* Description MPROT_REQUIRED_BW1
  511. Field only valid when ppdu_allowed_bw1 is set.
  512. When set, Medium protection transmission is required for
  513. a 1 MHz bandwidth PPDU transmission. In case of MU transmissions,
  514. all the medium protection settings are coming from user0. <legal
  515. all>
  516. */
  517. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_OFFSET 0x0000000000000000
  518. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_LSB 32
  519. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MSB 32
  520. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MASK 0x0000000100000000
  521. /* Description MPROT_REQUIRED_BW20
  522. Field only valid when ppdu_allowed_bw20_bw2 is set.
  523. NOTE: This field is also known as Mprot_required_pattern_0
  524. in case punctured transmission is enabled.
  525. When set, Medium protection transmission is required for
  526. a 20 MHz or 2Mhz 11ah bandwidth PPDU transmission
  527. <legal all>
  528. */
  529. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_OFFSET 0x0000000000000000
  530. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_LSB 33
  531. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MSB 33
  532. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MASK 0x0000000200000000
  533. /* Description MPROT_REQUIRED_BW40
  534. Field only valid when ppdu_allowed_bw40_bw4 is set.
  535. NOTE: This field is also known as Mprot_required_pattern_1
  536. in case punctured transmission is enabled.
  537. When set, Medium protection transmission is required for
  538. a 40 MHz or 4Mhz 11ah bandwidth PPDU transmission
  539. <legal all>
  540. */
  541. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_OFFSET 0x0000000000000000
  542. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_LSB 34
  543. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MSB 34
  544. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MASK 0x0000000400000000
  545. /* Description MPROT_REQUIRED_BW80
  546. Field only valid when ppdu_allowed_bw80_bw8 is set.
  547. NOTE: This field is also known as Mprot_required_pattern_2
  548. in case punctured transmission is enabled.
  549. When set, Medium protection transmission is required for
  550. a 80 MHz or 8MHz 11ah bandwidth PPDU transmission
  551. <legal all>
  552. */
  553. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_OFFSET 0x0000000000000000
  554. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_LSB 35
  555. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MSB 35
  556. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MASK 0x0000000800000000
  557. /* Description MPROT_REQUIRED_BW160
  558. Field only valid when ppdu_allowed_bw160_bw16 is set.
  559. NOTE: This field is also known as Mprot_required_pattern_3
  560. in case punctured transmission is enabled.
  561. When set, Medium protection transmission is required for
  562. a 160 MHz or 16MHz 11ah bandwidth PPDU transmission.
  563. <legal all>
  564. */
  565. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_OFFSET 0x0000000000000000
  566. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_LSB 36
  567. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MSB 36
  568. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MASK 0x0000001000000000
  569. /* Description MPROT_REQUIRED_BW240
  570. Field only valid when ppdu_allowed_bw240 is set.
  571. NOTE: This field is also known as Mprot_required_pattern_4
  572. in case punctured transmission is enabled.
  573. When set, Medium protection transmission is required for
  574. a 240 MHz bandwidth PPDU transmission.
  575. <legal all>
  576. */
  577. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_OFFSET 0x0000000000000000
  578. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_LSB 37
  579. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MSB 37
  580. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MASK 0x0000002000000000
  581. /* Description MPROT_REQUIRED_BW320
  582. Field only valid when ppdu_allowed_bw320 is set.
  583. NOTE: This field is also known as Mprot_required_pattern_5
  584. in case punctured transmission is enabled.
  585. When set, Medium protection transmission is required for
  586. a 320 MHz bandwidth PPDU transmission.
  587. <legal all>
  588. */
  589. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_OFFSET 0x0000000000000000
  590. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_LSB 38
  591. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MSB 38
  592. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MASK 0x0000004000000000
  593. /* Description PPDU_ALLOWED_BW1
  594. When set, allow PPDU transmission with 1 MHz 11ah bandwidth.
  595. <legal all>
  596. */
  597. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_OFFSET 0x0000000000000000
  598. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_LSB 39
  599. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MSB 39
  600. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MASK 0x0000008000000000
  601. /* Description PPDU_ALLOWED_BW20
  602. Field Not valid in case punctured transmission is enabled.
  603. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  604. puncture_pattern_count
  605. When set, allow PPDU transmission with 20 MHz or 2MHz 11ah
  606. bandwidth
  607. <legal all>
  608. */
  609. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_OFFSET 0x0000000000000000
  610. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_LSB 40
  611. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MSB 40
  612. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MASK 0x0000010000000000
  613. /* Description PPDU_ALLOWED_BW40
  614. Field Not valid in case punctured transmission is enabled.
  615. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  616. puncture_pattern_count
  617. When set, allow PPDU transmission with 40 MHz or 4MHz 11ah
  618. bandwidth
  619. <legal all>
  620. */
  621. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_OFFSET 0x0000000000000000
  622. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_LSB 41
  623. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MSB 41
  624. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MASK 0x0000020000000000
  625. /* Description PPDU_ALLOWED_BW80
  626. Field Not valid in case punctured transmission is enabled.
  627. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  628. puncture_pattern_count
  629. When set, allow PPDU transmission with 80 MHz or 8MHz 11ah
  630. bandwidth
  631. <legal all>
  632. */
  633. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_OFFSET 0x0000000000000000
  634. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_LSB 42
  635. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MSB 42
  636. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MASK 0x0000040000000000
  637. /* Description PPDU_ALLOWED_BW160
  638. Field Not valid in case punctured transmission is enabled.
  639. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  640. puncture_pattern_count
  641. When set, allow PPDU transmission with 160 MHz or 16MHz
  642. 11ah bandwidth
  643. <legal all>
  644. */
  645. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_OFFSET 0x0000000000000000
  646. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_LSB 43
  647. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MSB 43
  648. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MASK 0x0000080000000000
  649. /* Description PPDU_ALLOWED_BW240
  650. Field Not valid in case punctured transmission is enabled.
  651. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  652. puncture_pattern_count
  653. When set, allow PPDU transmission with 240 MHz bandwidth
  654. <legal all>
  655. */
  656. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_OFFSET 0x0000000000000000
  657. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_LSB 44
  658. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MSB 44
  659. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MASK 0x0000100000000000
  660. /* Description PPDU_ALLOWED_BW320
  661. Field Not valid in case punctured transmission is enabled.
  662. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  663. puncture_pattern_count
  664. When set, allow PPDU transmission with 320 MHz bandwidth
  665. <legal all>
  666. */
  667. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_OFFSET 0x0000000000000000
  668. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_LSB 45
  669. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MSB 45
  670. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MASK 0x0000200000000000
  671. /* Description SET_FC_PWR_MGT
  672. Field valid for SU transmissions only
  673. When set, the TXPCU will set the power management bit in
  674. the Frame Control field for the transmitted frames.
  675. Note: this is there for backup purposes only. TXOLE is the
  676. module now that should be setting the pm bit to the proper
  677. value.
  678. <legal all>
  679. */
  680. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_OFFSET 0x0000000000000000
  681. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_LSB 46
  682. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MSB 46
  683. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MASK 0x0000400000000000
  684. /* Description USE_CTS_DURATION_FOR_DATA_TX
  685. When set, take the value of the duration field from the
  686. CTS frame, and use this as the reference point for how long
  687. the 'data' ppdu transmission can be.
  688. This is an E2E feature.
  689. <legal all>
  690. */
  691. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_OFFSET 0x0000000000000000
  692. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_LSB 47
  693. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MSB 47
  694. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MASK 0x0000800000000000
  695. /* Description UPDATE_TIMESTAMP_64
  696. When set, TXPCU shall update the timestamp value at the
  697. indicated location.
  698. <legal all>
  699. */
  700. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_OFFSET 0x0000000000000000
  701. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_LSB 48
  702. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MSB 48
  703. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MASK 0x0001000000000000
  704. /* Description UPDATE_TIMESTAMP_32_LOWER
  705. Update the 32 bit timestamp at the offset specified by the
  706. insert_timestamp_offset_32. This will be used for AWDL
  707. action frames. The value of the TSF will be added to the
  708. timestamp field in the packet buffer in memory. The tx_delay
  709. should also be included in the timestamp field<legal all>
  710. */
  711. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_OFFSET 0x0000000000000000
  712. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_LSB 49
  713. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MSB 49
  714. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MASK 0x0002000000000000
  715. /* Description UPDATE_TIMESTAMP_32_UPPER
  716. Update the 64 bit TSF at the offset specified by the insert_timestamp_offset_64.
  717. This will be used for beacons and probe response frames.
  718. The value of the TSF will be added to the TSF field in
  719. the packet buffer in memory. The tx_delay should also be
  720. included in the TSF field
  721. <legal all>
  722. */
  723. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_OFFSET 0x0000000000000000
  724. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_LSB 50
  725. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MSB 50
  726. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MASK 0x0004000000000000
  727. /* Description RESERVED_1A
  728. <legal 0>
  729. */
  730. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_OFFSET 0x0000000000000000
  731. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_LSB 51
  732. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MSB 63
  733. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MASK 0xfff8000000000000
  734. /* Description INSERT_TIMESTAMP_OFFSET_0
  735. Byte offset to the first byte of the lower 32 bit timestamp
  736. to be inserted. This is applicable to both beacon and
  737. probe response TSF and the AWDL timestamp<legal all>
  738. */
  739. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_OFFSET 0x0000000000000008
  740. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_LSB 0
  741. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MSB 15
  742. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MASK 0x000000000000ffff
  743. /* Description INSERT_TIMESTAMP_OFFSET_1
  744. Byte offset to the first byte of the upper 32 bit timestamp
  745. to be inserted. This is applicable to both beacon and
  746. probe response TSF and the AWDL timestamp<legal all>
  747. */
  748. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_OFFSET 0x0000000000000008
  749. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_LSB 16
  750. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MSB 31
  751. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MASK 0x00000000ffff0000
  752. /* Description MAX_BW40_TRY_COUNT
  753. Field only valid when ppdu_allowed_bw40_bw4 or Mprot_required_bw40_bw4
  754. is set.
  755. NOTE: This field is also known as Max_try_count_pattern_1
  756. in case punctured transmission is enabled.
  757. The maximum number of times that TXPCU will try to do a
  758. transmission at this or a higher BW, before deciding to
  759. go to a lower BW.
  760. If this count (as indicated by field Optimal_bw_retry_count
  761. in TX_FES_SETUP) has not been reached yet, and this BW
  762. is not available, TXPCU will generate a flush with flush
  763. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  764. When value is 0, it means that if this BW is not available,
  765. TXPCU should immediately try a lower BW.
  766. Note that this value shall always be equal or greater then:
  767. Max_bw80_try_count
  768. <legal all>
  769. */
  770. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_OFFSET 0x0000000000000008
  771. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_LSB 32
  772. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MSB 35
  773. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MASK 0x0000000f00000000
  774. /* Description MAX_BW80_TRY_COUNT
  775. Field only valid when ppdu_allowed_bw80_bw4 or Mprot_required_bw80_bw4
  776. is set.
  777. NOTE: This field is also known as Max_try_count_pattern_2
  778. in case punctured transmission is enabled.
  779. The maximum number of times that TXPCU will try to do a
  780. transmission at this or a higher BW, before deciding to
  781. go to a lower BW.
  782. If this count (as indicated by field Optimal_bw_retry_count
  783. in TX_FES_SETUP) has not been reached yet, and this BW
  784. is not available, TXPCU will generate a flush with flush
  785. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  786. When value is 0, it means that if this BW is not available,
  787. TXPCU should immediately try a lower BW.
  788. Note that this value shall always be equal or greater then:
  789. Max_bw160_try_count
  790. <legal all>
  791. */
  792. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_OFFSET 0x0000000000000008
  793. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_LSB 36
  794. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MSB 39
  795. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MASK 0x000000f000000000
  796. /* Description MAX_BW160_TRY_COUNT
  797. Field only valid when ppdu_allowed_bw160_bw16 or Mprot_required_bw160_bw16
  798. is set.
  799. NOTE: This field is also known as Max_try_count_pattern_3
  800. in case punctured transmission is enabled.
  801. The maximum number of times that TXPCU will try to do a
  802. transmission at this, before deciding to go to a lower BW.
  803. If this count (as indicated by field Optimal_bw_retry_count
  804. in TX_FES_SETUP) has not been reached yet, and this BW
  805. is not available, TXPCU will generate a flush with flush
  806. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  807. When value is 0, it means that if this BW is not available,
  808. TXPCU should immediately try a lower BW.
  809. <legal all>
  810. */
  811. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_OFFSET 0x0000000000000008
  812. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_LSB 40
  813. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MSB 43
  814. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MASK 0x00000f0000000000
  815. /* Description MAX_BW240_TRY_COUNT
  816. Field only valid when ppdu_allowed_bw240 or Mprot_required_bw240
  817. is set.
  818. NOTE: This field is also known as Max_try_count_pattern_4
  819. in case punctured transmission is enabled.
  820. The maximum number of times that TXPCU will try to do a
  821. transmission at this, before deciding to go to a lower BW.
  822. If this count (as indicated by field Optimal_bw_retry_count
  823. in TX_FES_SETUP) has not been reached yet, and this BW
  824. is not available, TXPCU will generate a flush with flush
  825. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  826. When value is 0, it means that if this BW is not available,
  827. TXPCU should immediately try a lower BW.
  828. <legal all>
  829. */
  830. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_OFFSET 0x0000000000000008
  831. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_LSB 44
  832. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MSB 47
  833. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MASK 0x0000f00000000000
  834. /* Description MAX_BW320_TRY_COUNT
  835. Field only valid when ppdu_allowed_bw320 or Mprot_required_bw320
  836. is set.
  837. NOTE: This field is also known as Max_try_count_pattern_5
  838. in case punctured transmission is enabled.
  839. The maximum number of times that TXPCU will try to do a
  840. transmission at this, before deciding to go to a lower BW.
  841. If this count (as indicated by field Optimal_bw_retry_count
  842. in TX_FES_SETUP) has not been reached yet, and this BW
  843. is not available, TXPCU will generate a flush with flush
  844. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  845. When value is 0, it means that if this BW is not available,
  846. TXPCU should immediately try a lower BW.
  847. <legal all>
  848. */
  849. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_OFFSET 0x0000000000000008
  850. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_LSB 48
  851. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MSB 51
  852. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MASK 0x000f000000000000
  853. /* Description INSERT_WUR_TIMESTAMP_OFFSET
  854. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  855. indicates a .11ba packet
  856. Used by TXPCU to determine the offset within a WUR packet,
  857. e.g. a WUR beacon into which to insert the timestamp.
  858. <legal all>
  859. */
  860. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_OFFSET 0x0000000000000008
  861. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_LSB 52
  862. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MSB 57
  863. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MASK 0x03f0000000000000
  864. /* Description UPDATE_WUR_TIMESTAMP
  865. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  866. indicates a .11ba packet
  867. TXPCU will insert the timestamp into a WUR packet if this
  868. bit is set.
  869. <legal all>
  870. */
  871. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_OFFSET 0x0000000000000008
  872. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_LSB 58
  873. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MSB 58
  874. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MASK 0x0400000000000000
  875. /* Description WUR_EMBEDDED_BSSID_PRESENT
  876. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  877. indicates a .11ba packet
  878. If this bit is set, TXPCU will assume the packet includes
  879. an extra 16 bits which contain the embedded BSSID to be
  880. used in the WUR FCS calculation. TXPCU will replace the
  881. 16 bits with the 16-bit FCS field.
  882. If this bit is clear, TXPCU will append the 16-bit FCS calculated
  883. without any embedded BSSID.
  884. <legal all>
  885. */
  886. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_OFFSET 0x0000000000000008
  887. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_LSB 59
  888. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MSB 59
  889. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MASK 0x0800000000000000
  890. /* Description INSERT_WUR_FCS
  891. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  892. indicates a .11ba packet
  893. TXPCU will replace/append the FCS bytes for a WUR packet
  894. if this bit is set. The replace/append choice is based
  895. on WUR_embedded_BSSID_present.
  896. <legal all>
  897. */
  898. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_OFFSET 0x0000000000000008
  899. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_LSB 60
  900. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MSB 60
  901. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MASK 0x1000000000000000
  902. /* Description RESERVED_3B
  903. <legal 0>
  904. */
  905. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_OFFSET 0x0000000000000008
  906. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_LSB 61
  907. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MSB 63
  908. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MASK 0xe000000000000000
  909. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW20
  910. Field only valid in case of Response_to_response set to
  911. SU_BA or MU_BA
  912. NOTE: This field is also known as response_to_response_rate_info_pattern_0
  913. in case punctured transmission is enabled.
  914. Used by TXPCU to determine what the transmit rates are for
  915. the response to response transmission in case original
  916. transmission was 20 MHz.
  917. Note:
  918. see field R2R_bw20_active_channel for the BW of this transmission
  919. */
  920. /* Description RESERVED_0A
  921. <legal 0>
  922. */
  923. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_OFFSET 0x0000000000000010
  924. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_LSB 0
  925. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MSB 0
  926. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MASK 0x0000000000000001
  927. /* Description TX_ANTENNA_SECTOR_CTRL
  928. Sectored transmit antenna
  929. <legal all>
  930. */
  931. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000010
  932. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_LSB 1
  933. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MSB 24
  934. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  935. /* Description PKT_TYPE
  936. Packet type:
  937. <enum 0 dot11a>802.11a PPDU type
  938. <enum 1 dot11b>802.11b PPDU type
  939. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  940. <enum 3 dot11ac>802.11ac PPDU type
  941. <enum 4 dot11ax>802.11ax PPDU type
  942. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  943. <enum 6 dot11be>802.11be PPDU type
  944. <enum 7 dot11az>802.11az (ranging) PPDU type
  945. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  946. & aborted)
  947. */
  948. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_OFFSET 0x0000000000000010
  949. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_LSB 25
  950. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MSB 28
  951. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MASK 0x000000001e000000
  952. /* Description SMOOTHING
  953. This field is used by PDG to populate the SMOOTHING filed
  954. in the SIG Preamble of the PPDU
  955. <legal 0-1>
  956. */
  957. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_OFFSET 0x0000000000000010
  958. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_LSB 29
  959. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MSB 29
  960. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MASK 0x0000000020000000
  961. /* Description LDPC
  962. When set, use LDPC transmission rates
  963. */
  964. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_OFFSET 0x0000000000000010
  965. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_LSB 30
  966. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MSB 30
  967. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MASK 0x0000000040000000
  968. /* Description STBC
  969. When set, use STBC transmission rates
  970. */
  971. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_OFFSET 0x0000000000000010
  972. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_LSB 31
  973. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MSB 31
  974. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MASK 0x0000000080000000
  975. /* Description ALT_TX_PWR
  976. Coex related AlternativeTransmit parameter
  977. Transmit Power in s6.2 format.
  978. In units of 0.25 dBm
  979. <legal all>
  980. */
  981. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_OFFSET 0x0000000000000010
  982. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_LSB 32
  983. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MSB 39
  984. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MASK 0x000000ff00000000
  985. /* Description ALT_MIN_TX_PWR
  986. Coex related Alternative Transmit parameter
  987. Minimum allowed Transmit Power in s6.2 format.
  988. In units of 0.25 dBm
  989. <legal all>
  990. */
  991. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_OFFSET 0x0000000000000010
  992. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_LSB 40
  993. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MSB 47
  994. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  995. /* Description ALT_NSS
  996. Coex related Alternative Transmit parameter
  997. Number of spatial streams.
  998. <enum 0 1_spatial_stream>Single spatial stream
  999. <enum 1 2_spatial_streams>2 spatial streams
  1000. <enum 2 3_spatial_streams>3 spatial streams
  1001. <enum 3 4_spatial_streams>4 spatial streams
  1002. <enum 4 5_spatial_streams>5 spatial streams
  1003. <enum 5 6_spatial_streams>6 spatial streams
  1004. <enum 6 7_spatial_streams>7 spatial streams
  1005. <enum 7 8_spatial_streams>8 spatial streams
  1006. */
  1007. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_OFFSET 0x0000000000000010
  1008. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_LSB 48
  1009. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MSB 50
  1010. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MASK 0x0007000000000000
  1011. /* Description ALT_TX_CHAIN_MASK
  1012. Coex related Alternative Transmit parameter
  1013. Chain mask to support up to 8 antennas.
  1014. <legal 1-255>
  1015. */
  1016. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000010
  1017. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_LSB 51
  1018. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MSB 58
  1019. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  1020. /* Description ALT_BW
  1021. Coex related Alternative Transmit parameter
  1022. The BW of the upcoming transmission.
  1023. <enum 0 20_mhz>20 Mhz BW
  1024. <enum 1 40_mhz>40 Mhz BW
  1025. <enum 2 80_mhz>80 Mhz BW
  1026. <enum 3 160_mhz>160 Mhz BW
  1027. <enum 4 320_mhz>320 Mhz BW
  1028. <enum 5 240_mhz>240 Mhz BW
  1029. */
  1030. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_OFFSET 0x0000000000000010
  1031. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_LSB 59
  1032. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MSB 61
  1033. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MASK 0x3800000000000000
  1034. /* Description STF_LTF_3DB_BOOST
  1035. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  1036. This includes both the legacy preambles and the HT/VHT preambles.0:
  1037. disable power boost1: enable power boost
  1038. <legal all>
  1039. */
  1040. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000010
  1041. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_LSB 62
  1042. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MSB 62
  1043. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  1044. /* Description FORCE_EXTRA_SYMBOL
  1045. Set to 1 to force an extra OFDM symbol (or symbols) even
  1046. if the PPDU encoding process does not result in an extra
  1047. OFDM symbol (or symbols)
  1048. */
  1049. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000010
  1050. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_LSB 63
  1051. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MSB 63
  1052. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  1053. /* Description ALT_RATE_MCS
  1054. Coex related Alternative Transmit parameter
  1055. For details, refer to MCS_TYPE
  1056. Note: This is "rate" in case of 11a/11b
  1057. description
  1058. <legal all>
  1059. */
  1060. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_OFFSET 0x0000000000000018
  1061. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_LSB 0
  1062. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MSB 3
  1063. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MASK 0x000000000000000f
  1064. /* Description NSS
  1065. Number of spatial streams.
  1066. <enum 0 1_spatial_stream>Single spatial stream
  1067. <enum 1 2_spatial_streams>2 spatial streams
  1068. <enum 2 3_spatial_streams>3 spatial streams
  1069. <enum 3 4_spatial_streams>4 spatial streams
  1070. <enum 4 5_spatial_streams>5 spatial streams
  1071. <enum 5 6_spatial_streams>6 spatial streams
  1072. <enum 6 7_spatial_streams>7 spatial streams
  1073. <enum 7 8_spatial_streams>8 spatial streams
  1074. */
  1075. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_OFFSET 0x0000000000000018
  1076. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_LSB 4
  1077. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MSB 6
  1078. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MASK 0x0000000000000070
  1079. /* Description DPD_ENABLE
  1080. DPD enable control
  1081. This is needed on a per packet basis
  1082. <enum 0 dpd_off> DPD profile not applied to current
  1083. packet
  1084. <enum 1 dpd_on> DPD profile applied to current packet
  1085. if available
  1086. <legal 0-1>
  1087. This field is not applicable in11ah mode of operation and
  1088. is ignored by the HW
  1089. */
  1090. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_OFFSET 0x0000000000000018
  1091. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_LSB 7
  1092. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MSB 7
  1093. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MASK 0x0000000000000080
  1094. /* Description TX_PWR
  1095. Transmit Power in s6.2 format.
  1096. In units of 0.25 dBm
  1097. <legal all>
  1098. */
  1099. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_OFFSET 0x0000000000000018
  1100. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_LSB 8
  1101. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MSB 15
  1102. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MASK 0x000000000000ff00
  1103. /* Description MIN_TX_PWR
  1104. Coex related field:
  1105. Minimum allowed Transmit Power in s6.2 format.
  1106. In units of 0.25 dBm
  1107. <legal all>
  1108. */
  1109. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_OFFSET 0x0000000000000018
  1110. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_LSB 16
  1111. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MSB 23
  1112. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MASK 0x0000000000ff0000
  1113. /* Description TX_CHAIN_MASK
  1114. Chain mask to support up to 8 antennas.
  1115. <legal 1-255>
  1116. */
  1117. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_OFFSET 0x0000000000000018
  1118. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_LSB 24
  1119. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MSB 31
  1120. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MASK 0x00000000ff000000
  1121. /* Description RESERVED_3A
  1122. <legal 0>
  1123. */
  1124. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_OFFSET 0x0000000000000018
  1125. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_LSB 32
  1126. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MSB 39
  1127. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MASK 0x000000ff00000000
  1128. /* Description SGI
  1129. Field only valid when pkt type is HT or VHT.For 11ax see
  1130. field Dot11ax_CP_LTF_size
  1131. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  1132. for HE
  1133. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  1134. for HE
  1135. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  1136. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  1137. <legal 0 - 3>
  1138. */
  1139. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_OFFSET 0x0000000000000018
  1140. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_LSB 40
  1141. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MSB 41
  1142. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MASK 0x0000030000000000
  1143. /* Description RATE_MCS
  1144. For details, refer to MCS_TYPE description
  1145. Note: This is "rate" in case of 11a/11b
  1146. <legal all>
  1147. */
  1148. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_OFFSET 0x0000000000000018
  1149. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_LSB 42
  1150. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MSB 45
  1151. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MASK 0x00003c0000000000
  1152. /* Description RESERVED_3B
  1153. <legal 0>
  1154. */
  1155. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_OFFSET 0x0000000000000018
  1156. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_LSB 46
  1157. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MSB 47
  1158. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MASK 0x0000c00000000000
  1159. /* Description TX_PWR_1
  1160. Default (desired) transmit parameter for the second chain
  1161. Transmit Power in s6.2 format.
  1162. In units of 0.25 dBm
  1163. Note that there is no Min value for this
  1164. <legal all>
  1165. */
  1166. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_OFFSET 0x0000000000000018
  1167. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_LSB 48
  1168. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MSB 55
  1169. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MASK 0x00ff000000000000
  1170. /* Description ALT_TX_PWR_1
  1171. Alternate (desired) transmit parameter for the second chain
  1172. Transmit Power in s6.2 format.
  1173. In units of 0.25 dBm
  1174. Note that there is no Min value for this
  1175. <legal all>
  1176. */
  1177. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_OFFSET 0x0000000000000018
  1178. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_LSB 56
  1179. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MSB 63
  1180. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MASK 0xff00000000000000
  1181. /* Description AGGREGATION
  1182. Field only valid in case of pkt_type == 11n
  1183. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  1184. this setting if the CBF response only contains a single
  1185. segment
  1186. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  1187. select this setting if the CBF response will contain two
  1188. or more segments
  1189. <legal 0-1>
  1190. */
  1191. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_OFFSET 0x0000000000000020
  1192. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_LSB 0
  1193. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MSB 0
  1194. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MASK 0x0000000000000001
  1195. /* Description DOT11AX_BSS_COLOR_ID
  1196. BSS color of the nextwork to which this STA belongs.
  1197. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  1198. <legal all>
  1199. */
  1200. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000020
  1201. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_LSB 1
  1202. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MSB 6
  1203. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  1204. /* Description DOT11AX_SPATIAL_REUSE
  1205. This field is only valid for pkt_type == 11ax
  1206. Spatial re-use
  1207. <legal all>
  1208. */
  1209. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000020
  1210. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_LSB 7
  1211. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MSB 10
  1212. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  1213. /* Description DOT11AX_CP_LTF_SIZE
  1214. field is only valid for pkt_type == 11ax
  1215. Indicates the CP and HE-LTF type
  1216. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  1217. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  1218. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  1219. <enum 3 FourX_LTF_0_8CP_3_2CP>
  1220. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  1221. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  1222. In this scenario, Neither DCM nor STBC is applied to HE
  1223. data field.
  1224. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  1225. 0 = 1xLTF + 0.4 usec
  1226. 1 = 2xLTF + 0.4 usec
  1227. 2~3 = Reserved
  1228. <legal all>
  1229. */
  1230. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000020
  1231. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_LSB 11
  1232. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MSB 12
  1233. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  1234. /* Description DOT11AX_DCM
  1235. field is only valid for pkt_type == 11ax
  1236. Indicates whether dual sub-carrier modulation is applied
  1237. 0: No DCM
  1238. 1:DCM
  1239. <legal all>
  1240. */
  1241. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_OFFSET 0x0000000000000020
  1242. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_LSB 13
  1243. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MSB 13
  1244. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MASK 0x0000000000002000
  1245. /* Description DOT11AX_DOPPLER_INDICATION
  1246. field is only valid for pkt_type == 11ax
  1247. 0: No Doppler support
  1248. 1: Doppler support
  1249. <legal all>
  1250. */
  1251. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000020
  1252. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_LSB 14
  1253. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MSB 14
  1254. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  1255. /* Description DOT11AX_SU_EXTENDED
  1256. field is only valid for pkt_type == 11ax OR pkt_type ==
  1257. 11be
  1258. When set, the 11ax or 11be frame is of the extended range
  1259. format
  1260. <legal all>
  1261. */
  1262. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000020
  1263. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_LSB 15
  1264. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MSB 15
  1265. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  1266. /* Description DOT11AX_MIN_PACKET_EXTENSION
  1267. field is only valid for pkt_type == 11ax OR pkt_type ==
  1268. 11be
  1269. The min packet extension duration for this user.
  1270. 0: no extension
  1271. 1: 8us
  1272. 2: 16 us
  1273. 3: 20 us (only for .11be)
  1274. <legal 0-3>
  1275. */
  1276. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000020
  1277. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  1278. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  1279. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  1280. /* Description DOT11AX_PE_NSS
  1281. Number of active spatial streams during packet extension.
  1282. <enum 0 1_spatial_stream>Single spatial stream
  1283. <enum 1 2_spatial_streams>2 spatial streams
  1284. <enum 2 3_spatial_streams>3 spatial streams
  1285. <enum 3 4_spatial_streams>4 spatial streams
  1286. <enum 4 5_spatial_streams>5 spatial streams
  1287. <enum 5 6_spatial_streams>6 spatial streams
  1288. <enum 6 7_spatial_streams>7 spatial streams
  1289. <enum 7 8_spatial_streams>8 spatial streams
  1290. */
  1291. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_OFFSET 0x0000000000000020
  1292. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_LSB 18
  1293. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MSB 20
  1294. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  1295. /* Description DOT11AX_PE_CONTENT
  1296. Content of packet extension. Valid for all 11ax packets
  1297. having packet extension
  1298. 0-he_ltf, 1-last_data_symbol
  1299. <legal all>
  1300. */
  1301. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000020
  1302. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_LSB 21
  1303. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MSB 21
  1304. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  1305. /* Description DOT11AX_PE_LTF_SIZE
  1306. LTF size to be used during packet extention. . This field
  1307. is valid for both FTM and non-FTM packets.
  1308. 0-1x
  1309. 1-2x (unsupported un HWK-1)
  1310. 2-4x (unsupported un HWK-1)
  1311. <legal all>
  1312. */
  1313. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000020
  1314. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_LSB 22
  1315. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MSB 23
  1316. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  1317. /* Description DOT11AX_CHAIN_CSD_EN
  1318. This field denotes whether to apply CSD on the preamble
  1319. and data portion of the packet. This field is valid for
  1320. all transmit packets
  1321. 0: disable per-chain csd
  1322. 1: enable per-chain csd
  1323. <legal all>
  1324. */
  1325. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000020
  1326. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_LSB 24
  1327. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MSB 24
  1328. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  1329. /* Description DOT11AX_PE_CHAIN_CSD_EN
  1330. This field denotes whether to apply CSD on the packet extension
  1331. portion of the packet. This field is valid for all 11ax
  1332. packets.
  1333. 0: disable per-chain csd
  1334. 1: enable per-chain csd
  1335. <legal all>
  1336. */
  1337. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000020
  1338. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  1339. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  1340. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  1341. /* Description DOT11AX_DL_UL_FLAG
  1342. field is only valid for pkt_type == 11ax
  1343. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  1344. <enum 1 DL_UL_FLAG_IS_UL>
  1345. <legal all>
  1346. */
  1347. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000020
  1348. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_LSB 26
  1349. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MSB 26
  1350. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  1351. /* Description RESERVED_4A
  1352. <legal 0>
  1353. */
  1354. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_OFFSET 0x0000000000000020
  1355. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_LSB 27
  1356. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MSB 31
  1357. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MASK 0x00000000f8000000
  1358. /* Description DOT11AX_EXT_RU_START_INDEX
  1359. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1360. == 1
  1361. RU Number to which User is assigned
  1362. The RU numbering bitwidth is only enough to cover the 20MHz
  1363. BW that extended range allows
  1364. <legal 0-8>
  1365. */
  1366. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000020
  1367. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_LSB 32
  1368. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MSB 35
  1369. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  1370. /* Description DOT11AX_EXT_RU_SIZE
  1371. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1372. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  1373. The size of the RU for this user.
  1374. In case of EHT duplicate transmissions, this field indicates
  1375. the width of the actual content before duplication, e.g.
  1376. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  1377. fields indicating 160 MHz and this field set to e-num 4
  1378. (RU_484).
  1379. <enum 0 RU_26>
  1380. <enum 1 RU_52>
  1381. <enum 2 RU_106>
  1382. <enum 3 RU_242>
  1383. <enum 4 RU_484>
  1384. <enum 5 RU_996>
  1385. <enum 6 RU_1992>
  1386. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  1387. bandwidth
  1388. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  1389. packet bandwidth
  1390. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  1391. packet bandwidth
  1392. <enum 10 RU_MULTI_LARGE> DO NOT USE
  1393. <enum 11 RU_78> DO NOT USE
  1394. <enum 12 RU_132> DO NOT USE
  1395. <legal 0-12>
  1396. */
  1397. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000020
  1398. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_LSB 36
  1399. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MSB 39
  1400. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  1401. /* Description EHT_DUPLICATE_MODE
  1402. Field only valid for pkt_type == 11be
  1403. Indicates EHT duplicate modulation
  1404. <enum 0 eht_no_duplicate>
  1405. <enum 1 eht_2x_duplicate>
  1406. <enum 2 eht_4x_duplicate>
  1407. <legal 0-2>
  1408. */
  1409. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000020
  1410. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_LSB 40
  1411. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MSB 41
  1412. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  1413. /* Description HE_SIGB_DCM
  1414. Indicates whether dual sub-carrier modulation is applied
  1415. to EHT-SIG
  1416. <legal all>
  1417. */
  1418. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_OFFSET 0x0000000000000020
  1419. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_LSB 42
  1420. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MSB 42
  1421. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MASK 0x0000040000000000
  1422. /* Description HE_SIGB_0_MCS
  1423. Indicates the MCS of EHT-SIG
  1424. For details, refer to MCS_TYPE description
  1425. <legal all>
  1426. */
  1427. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_OFFSET 0x0000000000000020
  1428. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_LSB 43
  1429. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MSB 45
  1430. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MASK 0x0000380000000000
  1431. /* Description NUM_HE_SIGB_SYM
  1432. Indicates the number of EHT-SIG symbols
  1433. This field is 0-based with 0 indicating that 1 eht_sig symbol
  1434. needs to be transmitted.
  1435. <legal all>
  1436. */
  1437. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000020
  1438. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_LSB 46
  1439. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MSB 50
  1440. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  1441. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  1442. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  1443. HT Control for sync MLO response
  1444. <enum 1 reqd_resp_time_src_is_FW>
  1445. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  1446. to response
  1447. <legal all>
  1448. */
  1449. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000020
  1450. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  1451. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  1452. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  1453. /* Description RESERVED_5A
  1454. <legal 0>
  1455. */
  1456. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_OFFSET 0x0000000000000020
  1457. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_LSB 52
  1458. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MSB 57
  1459. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MASK 0x03f0000000000000
  1460. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  1461. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  1462. to pass on to PDG
  1463. <legal 0-29>
  1464. */
  1465. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000020
  1466. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  1467. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  1468. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  1469. /* Description MLO_STA_ID_DETAILS_RX
  1470. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  1471. on to PDG
  1472. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  1473. from address search.
  1474. See definition of mlo_sta_id_details.
  1475. */
  1476. /* Description NSTR_MLO_STA_ID
  1477. ID of peer participating in non-STR MLO
  1478. */
  1479. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000028
  1480. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  1481. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  1482. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  1483. /* Description BLOCK_SELF_ML_SYNC
  1484. Only valid for TX
  1485. When set, this provides an indication to block the peer
  1486. for self-link.
  1487. */
  1488. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000028
  1489. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  1490. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  1491. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  1492. /* Description BLOCK_PARTNER_ML_SYNC
  1493. Only valid for TX
  1494. When set, this provides an indication to block the peer
  1495. for partner links.
  1496. */
  1497. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000028
  1498. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  1499. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  1500. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  1501. /* Description NSTR_MLO_STA_ID_VALID
  1502. All the fields in this TLV are valid only if this bit is
  1503. set.
  1504. */
  1505. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000028
  1506. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  1507. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  1508. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  1509. /* Description RESERVED_0A
  1510. <legal 0>
  1511. */
  1512. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000028
  1513. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  1514. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  1515. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  1516. /* Description REQUIRED_RESPONSE_TIME
  1517. When non-zero, indicates that PDG shall pad the response
  1518. transmission to the indicated duration (in us)
  1519. */
  1520. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000028
  1521. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_LSB 16
  1522. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MSB 27
  1523. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  1524. /* Description DOT11BE_PARAMS_PLACEHOLDER
  1525. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  1526. */
  1527. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000028
  1528. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  1529. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  1530. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  1531. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW40
  1532. Field only valid in case of Response_to_response set to
  1533. SU_BA or MU_BA
  1534. NOTE: This field is also known as response_to_response_rate_info_pattern_1
  1535. in case punctured transmission is enabled.
  1536. Used by TXPCU to determine what the transmit rates are for
  1537. the response to response transmission in case original
  1538. transmission was 40 MHz.
  1539. Note:
  1540. see field R2R_bw40_active_channel for the BW of this transmission
  1541. */
  1542. /* Description RESERVED_0A
  1543. <legal 0>
  1544. */
  1545. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_OFFSET 0x0000000000000028
  1546. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_LSB 32
  1547. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MSB 32
  1548. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MASK 0x0000000100000000
  1549. /* Description TX_ANTENNA_SECTOR_CTRL
  1550. Sectored transmit antenna
  1551. <legal all>
  1552. */
  1553. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000028
  1554. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_LSB 33
  1555. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MSB 56
  1556. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  1557. /* Description PKT_TYPE
  1558. Packet type:
  1559. <enum 0 dot11a>802.11a PPDU type
  1560. <enum 1 dot11b>802.11b PPDU type
  1561. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  1562. <enum 3 dot11ac>802.11ac PPDU type
  1563. <enum 4 dot11ax>802.11ax PPDU type
  1564. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  1565. <enum 6 dot11be>802.11be PPDU type
  1566. <enum 7 dot11az>802.11az (ranging) PPDU type
  1567. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  1568. & aborted)
  1569. */
  1570. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_OFFSET 0x0000000000000028
  1571. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_LSB 57
  1572. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MSB 60
  1573. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MASK 0x1e00000000000000
  1574. /* Description SMOOTHING
  1575. This field is used by PDG to populate the SMOOTHING filed
  1576. in the SIG Preamble of the PPDU
  1577. <legal 0-1>
  1578. */
  1579. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_OFFSET 0x0000000000000028
  1580. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_LSB 61
  1581. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MSB 61
  1582. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MASK 0x2000000000000000
  1583. /* Description LDPC
  1584. When set, use LDPC transmission rates
  1585. */
  1586. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_OFFSET 0x0000000000000028
  1587. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_LSB 62
  1588. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MSB 62
  1589. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MASK 0x4000000000000000
  1590. /* Description STBC
  1591. When set, use STBC transmission rates
  1592. */
  1593. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_OFFSET 0x0000000000000028
  1594. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_LSB 63
  1595. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MSB 63
  1596. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MASK 0x8000000000000000
  1597. /* Description ALT_TX_PWR
  1598. Coex related AlternativeTransmit parameter
  1599. Transmit Power in s6.2 format.
  1600. In units of 0.25 dBm
  1601. <legal all>
  1602. */
  1603. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_OFFSET 0x0000000000000030
  1604. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_LSB 0
  1605. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MSB 7
  1606. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MASK 0x00000000000000ff
  1607. /* Description ALT_MIN_TX_PWR
  1608. Coex related Alternative Transmit parameter
  1609. Minimum allowed Transmit Power in s6.2 format.
  1610. In units of 0.25 dBm
  1611. <legal all>
  1612. */
  1613. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_OFFSET 0x0000000000000030
  1614. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_LSB 8
  1615. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MSB 15
  1616. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  1617. /* Description ALT_NSS
  1618. Coex related Alternative Transmit parameter
  1619. Number of spatial streams.
  1620. <enum 0 1_spatial_stream>Single spatial stream
  1621. <enum 1 2_spatial_streams>2 spatial streams
  1622. <enum 2 3_spatial_streams>3 spatial streams
  1623. <enum 3 4_spatial_streams>4 spatial streams
  1624. <enum 4 5_spatial_streams>5 spatial streams
  1625. <enum 5 6_spatial_streams>6 spatial streams
  1626. <enum 6 7_spatial_streams>7 spatial streams
  1627. <enum 7 8_spatial_streams>8 spatial streams
  1628. */
  1629. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_OFFSET 0x0000000000000030
  1630. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_LSB 16
  1631. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MSB 18
  1632. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MASK 0x0000000000070000
  1633. /* Description ALT_TX_CHAIN_MASK
  1634. Coex related Alternative Transmit parameter
  1635. Chain mask to support up to 8 antennas.
  1636. <legal 1-255>
  1637. */
  1638. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000030
  1639. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_LSB 19
  1640. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MSB 26
  1641. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  1642. /* Description ALT_BW
  1643. Coex related Alternative Transmit parameter
  1644. The BW of the upcoming transmission.
  1645. <enum 0 20_mhz>20 Mhz BW
  1646. <enum 1 40_mhz>40 Mhz BW
  1647. <enum 2 80_mhz>80 Mhz BW
  1648. <enum 3 160_mhz>160 Mhz BW
  1649. <enum 4 320_mhz>320 Mhz BW
  1650. <enum 5 240_mhz>240 Mhz BW
  1651. */
  1652. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_OFFSET 0x0000000000000030
  1653. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_LSB 27
  1654. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MSB 29
  1655. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MASK 0x0000000038000000
  1656. /* Description STF_LTF_3DB_BOOST
  1657. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  1658. This includes both the legacy preambles and the HT/VHT preambles.0:
  1659. disable power boost1: enable power boost
  1660. <legal all>
  1661. */
  1662. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000030
  1663. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_LSB 30
  1664. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MSB 30
  1665. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  1666. /* Description FORCE_EXTRA_SYMBOL
  1667. Set to 1 to force an extra OFDM symbol (or symbols) even
  1668. if the PPDU encoding process does not result in an extra
  1669. OFDM symbol (or symbols)
  1670. */
  1671. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000030
  1672. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_LSB 31
  1673. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MSB 31
  1674. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  1675. /* Description ALT_RATE_MCS
  1676. Coex related Alternative Transmit parameter
  1677. For details, refer to MCS_TYPE
  1678. Note: This is "rate" in case of 11a/11b
  1679. description
  1680. <legal all>
  1681. */
  1682. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_OFFSET 0x0000000000000030
  1683. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_LSB 32
  1684. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MSB 35
  1685. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MASK 0x0000000f00000000
  1686. /* Description NSS
  1687. Number of spatial streams.
  1688. <enum 0 1_spatial_stream>Single spatial stream
  1689. <enum 1 2_spatial_streams>2 spatial streams
  1690. <enum 2 3_spatial_streams>3 spatial streams
  1691. <enum 3 4_spatial_streams>4 spatial streams
  1692. <enum 4 5_spatial_streams>5 spatial streams
  1693. <enum 5 6_spatial_streams>6 spatial streams
  1694. <enum 6 7_spatial_streams>7 spatial streams
  1695. <enum 7 8_spatial_streams>8 spatial streams
  1696. */
  1697. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_OFFSET 0x0000000000000030
  1698. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_LSB 36
  1699. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MSB 38
  1700. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MASK 0x0000007000000000
  1701. /* Description DPD_ENABLE
  1702. DPD enable control
  1703. This is needed on a per packet basis
  1704. <enum 0 dpd_off> DPD profile not applied to current
  1705. packet
  1706. <enum 1 dpd_on> DPD profile applied to current packet
  1707. if available
  1708. <legal 0-1>
  1709. This field is not applicable in11ah mode of operation and
  1710. is ignored by the HW
  1711. */
  1712. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_OFFSET 0x0000000000000030
  1713. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_LSB 39
  1714. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MSB 39
  1715. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MASK 0x0000008000000000
  1716. /* Description TX_PWR
  1717. Transmit Power in s6.2 format.
  1718. In units of 0.25 dBm
  1719. <legal all>
  1720. */
  1721. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_OFFSET 0x0000000000000030
  1722. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_LSB 40
  1723. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MSB 47
  1724. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MASK 0x0000ff0000000000
  1725. /* Description MIN_TX_PWR
  1726. Coex related field:
  1727. Minimum allowed Transmit Power in s6.2 format.
  1728. In units of 0.25 dBm
  1729. <legal all>
  1730. */
  1731. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_OFFSET 0x0000000000000030
  1732. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_LSB 48
  1733. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MSB 55
  1734. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MASK 0x00ff000000000000
  1735. /* Description TX_CHAIN_MASK
  1736. Chain mask to support up to 8 antennas.
  1737. <legal 1-255>
  1738. */
  1739. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_OFFSET 0x0000000000000030
  1740. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_LSB 56
  1741. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MSB 63
  1742. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MASK 0xff00000000000000
  1743. /* Description RESERVED_3A
  1744. <legal 0>
  1745. */
  1746. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_OFFSET 0x0000000000000038
  1747. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_LSB 0
  1748. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MSB 7
  1749. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MASK 0x00000000000000ff
  1750. /* Description SGI
  1751. Field only valid when pkt type is HT or VHT.For 11ax see
  1752. field Dot11ax_CP_LTF_size
  1753. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  1754. for HE
  1755. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  1756. for HE
  1757. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  1758. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  1759. <legal 0 - 3>
  1760. */
  1761. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_OFFSET 0x0000000000000038
  1762. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_LSB 8
  1763. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MSB 9
  1764. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MASK 0x0000000000000300
  1765. /* Description RATE_MCS
  1766. For details, refer to MCS_TYPE description
  1767. Note: This is "rate" in case of 11a/11b
  1768. <legal all>
  1769. */
  1770. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_OFFSET 0x0000000000000038
  1771. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_LSB 10
  1772. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MSB 13
  1773. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MASK 0x0000000000003c00
  1774. /* Description RESERVED_3B
  1775. <legal 0>
  1776. */
  1777. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_OFFSET 0x0000000000000038
  1778. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_LSB 14
  1779. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MSB 15
  1780. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MASK 0x000000000000c000
  1781. /* Description TX_PWR_1
  1782. Default (desired) transmit parameter for the second chain
  1783. Transmit Power in s6.2 format.
  1784. In units of 0.25 dBm
  1785. Note that there is no Min value for this
  1786. <legal all>
  1787. */
  1788. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_OFFSET 0x0000000000000038
  1789. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_LSB 16
  1790. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MSB 23
  1791. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MASK 0x0000000000ff0000
  1792. /* Description ALT_TX_PWR_1
  1793. Alternate (desired) transmit parameter for the second chain
  1794. Transmit Power in s6.2 format.
  1795. In units of 0.25 dBm
  1796. Note that there is no Min value for this
  1797. <legal all>
  1798. */
  1799. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_OFFSET 0x0000000000000038
  1800. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_LSB 24
  1801. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MSB 31
  1802. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MASK 0x00000000ff000000
  1803. /* Description AGGREGATION
  1804. Field only valid in case of pkt_type == 11n
  1805. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  1806. this setting if the CBF response only contains a single
  1807. segment
  1808. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  1809. select this setting if the CBF response will contain two
  1810. or more segments
  1811. <legal 0-1>
  1812. */
  1813. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_OFFSET 0x0000000000000038
  1814. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_LSB 32
  1815. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MSB 32
  1816. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MASK 0x0000000100000000
  1817. /* Description DOT11AX_BSS_COLOR_ID
  1818. BSS color of the nextwork to which this STA belongs.
  1819. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  1820. <legal all>
  1821. */
  1822. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000038
  1823. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_LSB 33
  1824. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MSB 38
  1825. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  1826. /* Description DOT11AX_SPATIAL_REUSE
  1827. This field is only valid for pkt_type == 11ax
  1828. Spatial re-use
  1829. <legal all>
  1830. */
  1831. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000038
  1832. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_LSB 39
  1833. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MSB 42
  1834. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  1835. /* Description DOT11AX_CP_LTF_SIZE
  1836. field is only valid for pkt_type == 11ax
  1837. Indicates the CP and HE-LTF type
  1838. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  1839. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  1840. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  1841. <enum 3 FourX_LTF_0_8CP_3_2CP>
  1842. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  1843. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  1844. In this scenario, Neither DCM nor STBC is applied to HE
  1845. data field.
  1846. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  1847. 0 = 1xLTF + 0.4 usec
  1848. 1 = 2xLTF + 0.4 usec
  1849. 2~3 = Reserved
  1850. <legal all>
  1851. */
  1852. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000038
  1853. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_LSB 43
  1854. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MSB 44
  1855. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  1856. /* Description DOT11AX_DCM
  1857. field is only valid for pkt_type == 11ax
  1858. Indicates whether dual sub-carrier modulation is applied
  1859. 0: No DCM
  1860. 1:DCM
  1861. <legal all>
  1862. */
  1863. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_OFFSET 0x0000000000000038
  1864. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_LSB 45
  1865. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MSB 45
  1866. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MASK 0x0000200000000000
  1867. /* Description DOT11AX_DOPPLER_INDICATION
  1868. field is only valid for pkt_type == 11ax
  1869. 0: No Doppler support
  1870. 1: Doppler support
  1871. <legal all>
  1872. */
  1873. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000038
  1874. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_LSB 46
  1875. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MSB 46
  1876. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  1877. /* Description DOT11AX_SU_EXTENDED
  1878. field is only valid for pkt_type == 11ax OR pkt_type ==
  1879. 11be
  1880. When set, the 11ax or 11be frame is of the extended range
  1881. format
  1882. <legal all>
  1883. */
  1884. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000038
  1885. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_LSB 47
  1886. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MSB 47
  1887. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  1888. /* Description DOT11AX_MIN_PACKET_EXTENSION
  1889. field is only valid for pkt_type == 11ax OR pkt_type ==
  1890. 11be
  1891. The min packet extension duration for this user.
  1892. 0: no extension
  1893. 1: 8us
  1894. 2: 16 us
  1895. 3: 20 us (only for .11be)
  1896. <legal 0-3>
  1897. */
  1898. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000038
  1899. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  1900. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  1901. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  1902. /* Description DOT11AX_PE_NSS
  1903. Number of active spatial streams during packet extension.
  1904. <enum 0 1_spatial_stream>Single spatial stream
  1905. <enum 1 2_spatial_streams>2 spatial streams
  1906. <enum 2 3_spatial_streams>3 spatial streams
  1907. <enum 3 4_spatial_streams>4 spatial streams
  1908. <enum 4 5_spatial_streams>5 spatial streams
  1909. <enum 5 6_spatial_streams>6 spatial streams
  1910. <enum 6 7_spatial_streams>7 spatial streams
  1911. <enum 7 8_spatial_streams>8 spatial streams
  1912. */
  1913. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_OFFSET 0x0000000000000038
  1914. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_LSB 50
  1915. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MSB 52
  1916. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MASK 0x001c000000000000
  1917. /* Description DOT11AX_PE_CONTENT
  1918. Content of packet extension. Valid for all 11ax packets
  1919. having packet extension
  1920. 0-he_ltf, 1-last_data_symbol
  1921. <legal all>
  1922. */
  1923. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000038
  1924. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_LSB 53
  1925. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MSB 53
  1926. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  1927. /* Description DOT11AX_PE_LTF_SIZE
  1928. LTF size to be used during packet extention. . This field
  1929. is valid for both FTM and non-FTM packets.
  1930. 0-1x
  1931. 1-2x (unsupported un HWK-1)
  1932. 2-4x (unsupported un HWK-1)
  1933. <legal all>
  1934. */
  1935. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000038
  1936. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_LSB 54
  1937. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MSB 55
  1938. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  1939. /* Description DOT11AX_CHAIN_CSD_EN
  1940. This field denotes whether to apply CSD on the preamble
  1941. and data portion of the packet. This field is valid for
  1942. all transmit packets
  1943. 0: disable per-chain csd
  1944. 1: enable per-chain csd
  1945. <legal all>
  1946. */
  1947. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000038
  1948. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_LSB 56
  1949. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MSB 56
  1950. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  1951. /* Description DOT11AX_PE_CHAIN_CSD_EN
  1952. This field denotes whether to apply CSD on the packet extension
  1953. portion of the packet. This field is valid for all 11ax
  1954. packets.
  1955. 0: disable per-chain csd
  1956. 1: enable per-chain csd
  1957. <legal all>
  1958. */
  1959. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000038
  1960. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  1961. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  1962. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  1963. /* Description DOT11AX_DL_UL_FLAG
  1964. field is only valid for pkt_type == 11ax
  1965. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  1966. <enum 1 DL_UL_FLAG_IS_UL>
  1967. <legal all>
  1968. */
  1969. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000038
  1970. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_LSB 58
  1971. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MSB 58
  1972. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  1973. /* Description RESERVED_4A
  1974. <legal 0>
  1975. */
  1976. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_OFFSET 0x0000000000000038
  1977. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_LSB 59
  1978. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MSB 63
  1979. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MASK 0xf800000000000000
  1980. /* Description DOT11AX_EXT_RU_START_INDEX
  1981. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1982. == 1
  1983. RU Number to which User is assigned
  1984. The RU numbering bitwidth is only enough to cover the 20MHz
  1985. BW that extended range allows
  1986. <legal 0-8>
  1987. */
  1988. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000040
  1989. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_LSB 0
  1990. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MSB 3
  1991. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  1992. /* Description DOT11AX_EXT_RU_SIZE
  1993. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1994. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  1995. The size of the RU for this user.
  1996. In case of EHT duplicate transmissions, this field indicates
  1997. the width of the actual content before duplication, e.g.
  1998. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  1999. fields indicating 160 MHz and this field set to e-num 4
  2000. (RU_484).
  2001. <enum 0 RU_26>
  2002. <enum 1 RU_52>
  2003. <enum 2 RU_106>
  2004. <enum 3 RU_242>
  2005. <enum 4 RU_484>
  2006. <enum 5 RU_996>
  2007. <enum 6 RU_1992>
  2008. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  2009. bandwidth
  2010. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  2011. packet bandwidth
  2012. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  2013. packet bandwidth
  2014. <enum 10 RU_MULTI_LARGE> DO NOT USE
  2015. <enum 11 RU_78> DO NOT USE
  2016. <enum 12 RU_132> DO NOT USE
  2017. <legal 0-12>
  2018. */
  2019. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000040
  2020. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_LSB 4
  2021. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MSB 7
  2022. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  2023. /* Description EHT_DUPLICATE_MODE
  2024. Field only valid for pkt_type == 11be
  2025. Indicates EHT duplicate modulation
  2026. <enum 0 eht_no_duplicate>
  2027. <enum 1 eht_2x_duplicate>
  2028. <enum 2 eht_4x_duplicate>
  2029. <legal 0-2>
  2030. */
  2031. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000040
  2032. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_LSB 8
  2033. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MSB 9
  2034. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  2035. /* Description HE_SIGB_DCM
  2036. Indicates whether dual sub-carrier modulation is applied
  2037. to EHT-SIG
  2038. <legal all>
  2039. */
  2040. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_OFFSET 0x0000000000000040
  2041. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_LSB 10
  2042. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MSB 10
  2043. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MASK 0x0000000000000400
  2044. /* Description HE_SIGB_0_MCS
  2045. Indicates the MCS of EHT-SIG
  2046. For details, refer to MCS_TYPE description
  2047. <legal all>
  2048. */
  2049. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_OFFSET 0x0000000000000040
  2050. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_LSB 11
  2051. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MSB 13
  2052. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MASK 0x0000000000003800
  2053. /* Description NUM_HE_SIGB_SYM
  2054. Indicates the number of EHT-SIG symbols
  2055. This field is 0-based with 0 indicating that 1 eht_sig symbol
  2056. needs to be transmitted.
  2057. <legal all>
  2058. */
  2059. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000040
  2060. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_LSB 14
  2061. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MSB 18
  2062. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  2063. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  2064. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  2065. HT Control for sync MLO response
  2066. <enum 1 reqd_resp_time_src_is_FW>
  2067. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  2068. to response
  2069. <legal all>
  2070. */
  2071. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000040
  2072. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  2073. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  2074. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  2075. /* Description RESERVED_5A
  2076. <legal 0>
  2077. */
  2078. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_OFFSET 0x0000000000000040
  2079. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_LSB 20
  2080. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MSB 25
  2081. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MASK 0x0000000003f00000
  2082. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  2083. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  2084. to pass on to PDG
  2085. <legal 0-29>
  2086. */
  2087. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000040
  2088. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  2089. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  2090. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  2091. /* Description MLO_STA_ID_DETAILS_RX
  2092. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  2093. on to PDG
  2094. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  2095. from address search.
  2096. See definition of mlo_sta_id_details.
  2097. */
  2098. /* Description NSTR_MLO_STA_ID
  2099. ID of peer participating in non-STR MLO
  2100. */
  2101. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000040
  2102. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  2103. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  2104. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  2105. /* Description BLOCK_SELF_ML_SYNC
  2106. Only valid for TX
  2107. When set, this provides an indication to block the peer
  2108. for self-link.
  2109. */
  2110. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000040
  2111. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  2112. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  2113. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  2114. /* Description BLOCK_PARTNER_ML_SYNC
  2115. Only valid for TX
  2116. When set, this provides an indication to block the peer
  2117. for partner links.
  2118. */
  2119. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000040
  2120. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  2121. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  2122. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  2123. /* Description NSTR_MLO_STA_ID_VALID
  2124. All the fields in this TLV are valid only if this bit is
  2125. set.
  2126. */
  2127. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000040
  2128. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  2129. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  2130. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  2131. /* Description RESERVED_0A
  2132. <legal 0>
  2133. */
  2134. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000040
  2135. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  2136. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  2137. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  2138. /* Description REQUIRED_RESPONSE_TIME
  2139. When non-zero, indicates that PDG shall pad the response
  2140. transmission to the indicated duration (in us)
  2141. */
  2142. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000040
  2143. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_LSB 48
  2144. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MSB 59
  2145. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  2146. /* Description DOT11BE_PARAMS_PLACEHOLDER
  2147. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  2148. */
  2149. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000040
  2150. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  2151. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  2152. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  2153. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW80
  2154. Field only valid in case of Response_to_response set to
  2155. SU_BA or MU_BA
  2156. NOTE: This field is also known as response_to_response_rate_info_pattern_2
  2157. in case punctured transmission is enabled.
  2158. Used by TXPCU to determine what the transmit rates are for
  2159. the response to response transmission in case original
  2160. transmission was 80 MHz.
  2161. Note:
  2162. see field R2R_bw80_active_channel for the BW of this transmission
  2163. */
  2164. /* Description RESERVED_0A
  2165. <legal 0>
  2166. */
  2167. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_OFFSET 0x0000000000000048
  2168. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_LSB 0
  2169. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MSB 0
  2170. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MASK 0x0000000000000001
  2171. /* Description TX_ANTENNA_SECTOR_CTRL
  2172. Sectored transmit antenna
  2173. <legal all>
  2174. */
  2175. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000048
  2176. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_LSB 1
  2177. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MSB 24
  2178. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  2179. /* Description PKT_TYPE
  2180. Packet type:
  2181. <enum 0 dot11a>802.11a PPDU type
  2182. <enum 1 dot11b>802.11b PPDU type
  2183. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  2184. <enum 3 dot11ac>802.11ac PPDU type
  2185. <enum 4 dot11ax>802.11ax PPDU type
  2186. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  2187. <enum 6 dot11be>802.11be PPDU type
  2188. <enum 7 dot11az>802.11az (ranging) PPDU type
  2189. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  2190. & aborted)
  2191. */
  2192. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_OFFSET 0x0000000000000048
  2193. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_LSB 25
  2194. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MSB 28
  2195. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MASK 0x000000001e000000
  2196. /* Description SMOOTHING
  2197. This field is used by PDG to populate the SMOOTHING filed
  2198. in the SIG Preamble of the PPDU
  2199. <legal 0-1>
  2200. */
  2201. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_OFFSET 0x0000000000000048
  2202. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_LSB 29
  2203. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MSB 29
  2204. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MASK 0x0000000020000000
  2205. /* Description LDPC
  2206. When set, use LDPC transmission rates
  2207. */
  2208. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_OFFSET 0x0000000000000048
  2209. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_LSB 30
  2210. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MSB 30
  2211. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MASK 0x0000000040000000
  2212. /* Description STBC
  2213. When set, use STBC transmission rates
  2214. */
  2215. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_OFFSET 0x0000000000000048
  2216. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_LSB 31
  2217. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MSB 31
  2218. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MASK 0x0000000080000000
  2219. /* Description ALT_TX_PWR
  2220. Coex related AlternativeTransmit parameter
  2221. Transmit Power in s6.2 format.
  2222. In units of 0.25 dBm
  2223. <legal all>
  2224. */
  2225. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_OFFSET 0x0000000000000048
  2226. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_LSB 32
  2227. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MSB 39
  2228. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MASK 0x000000ff00000000
  2229. /* Description ALT_MIN_TX_PWR
  2230. Coex related Alternative Transmit parameter
  2231. Minimum allowed Transmit Power in s6.2 format.
  2232. In units of 0.25 dBm
  2233. <legal all>
  2234. */
  2235. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_OFFSET 0x0000000000000048
  2236. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_LSB 40
  2237. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MSB 47
  2238. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  2239. /* Description ALT_NSS
  2240. Coex related Alternative Transmit parameter
  2241. Number of spatial streams.
  2242. <enum 0 1_spatial_stream>Single spatial stream
  2243. <enum 1 2_spatial_streams>2 spatial streams
  2244. <enum 2 3_spatial_streams>3 spatial streams
  2245. <enum 3 4_spatial_streams>4 spatial streams
  2246. <enum 4 5_spatial_streams>5 spatial streams
  2247. <enum 5 6_spatial_streams>6 spatial streams
  2248. <enum 6 7_spatial_streams>7 spatial streams
  2249. <enum 7 8_spatial_streams>8 spatial streams
  2250. */
  2251. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_OFFSET 0x0000000000000048
  2252. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_LSB 48
  2253. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MSB 50
  2254. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MASK 0x0007000000000000
  2255. /* Description ALT_TX_CHAIN_MASK
  2256. Coex related Alternative Transmit parameter
  2257. Chain mask to support up to 8 antennas.
  2258. <legal 1-255>
  2259. */
  2260. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000048
  2261. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_LSB 51
  2262. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MSB 58
  2263. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  2264. /* Description ALT_BW
  2265. Coex related Alternative Transmit parameter
  2266. The BW of the upcoming transmission.
  2267. <enum 0 20_mhz>20 Mhz BW
  2268. <enum 1 40_mhz>40 Mhz BW
  2269. <enum 2 80_mhz>80 Mhz BW
  2270. <enum 3 160_mhz>160 Mhz BW
  2271. <enum 4 320_mhz>320 Mhz BW
  2272. <enum 5 240_mhz>240 Mhz BW
  2273. */
  2274. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_OFFSET 0x0000000000000048
  2275. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_LSB 59
  2276. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MSB 61
  2277. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MASK 0x3800000000000000
  2278. /* Description STF_LTF_3DB_BOOST
  2279. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  2280. This includes both the legacy preambles and the HT/VHT preambles.0:
  2281. disable power boost1: enable power boost
  2282. <legal all>
  2283. */
  2284. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000048
  2285. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_LSB 62
  2286. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MSB 62
  2287. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  2288. /* Description FORCE_EXTRA_SYMBOL
  2289. Set to 1 to force an extra OFDM symbol (or symbols) even
  2290. if the PPDU encoding process does not result in an extra
  2291. OFDM symbol (or symbols)
  2292. */
  2293. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000048
  2294. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_LSB 63
  2295. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MSB 63
  2296. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  2297. /* Description ALT_RATE_MCS
  2298. Coex related Alternative Transmit parameter
  2299. For details, refer to MCS_TYPE
  2300. Note: This is "rate" in case of 11a/11b
  2301. description
  2302. <legal all>
  2303. */
  2304. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_OFFSET 0x0000000000000050
  2305. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_LSB 0
  2306. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MSB 3
  2307. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MASK 0x000000000000000f
  2308. /* Description NSS
  2309. Number of spatial streams.
  2310. <enum 0 1_spatial_stream>Single spatial stream
  2311. <enum 1 2_spatial_streams>2 spatial streams
  2312. <enum 2 3_spatial_streams>3 spatial streams
  2313. <enum 3 4_spatial_streams>4 spatial streams
  2314. <enum 4 5_spatial_streams>5 spatial streams
  2315. <enum 5 6_spatial_streams>6 spatial streams
  2316. <enum 6 7_spatial_streams>7 spatial streams
  2317. <enum 7 8_spatial_streams>8 spatial streams
  2318. */
  2319. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_OFFSET 0x0000000000000050
  2320. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_LSB 4
  2321. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MSB 6
  2322. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MASK 0x0000000000000070
  2323. /* Description DPD_ENABLE
  2324. DPD enable control
  2325. This is needed on a per packet basis
  2326. <enum 0 dpd_off> DPD profile not applied to current
  2327. packet
  2328. <enum 1 dpd_on> DPD profile applied to current packet
  2329. if available
  2330. <legal 0-1>
  2331. This field is not applicable in11ah mode of operation and
  2332. is ignored by the HW
  2333. */
  2334. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_OFFSET 0x0000000000000050
  2335. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_LSB 7
  2336. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MSB 7
  2337. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MASK 0x0000000000000080
  2338. /* Description TX_PWR
  2339. Transmit Power in s6.2 format.
  2340. In units of 0.25 dBm
  2341. <legal all>
  2342. */
  2343. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_OFFSET 0x0000000000000050
  2344. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_LSB 8
  2345. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MSB 15
  2346. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MASK 0x000000000000ff00
  2347. /* Description MIN_TX_PWR
  2348. Coex related field:
  2349. Minimum allowed Transmit Power in s6.2 format.
  2350. In units of 0.25 dBm
  2351. <legal all>
  2352. */
  2353. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_OFFSET 0x0000000000000050
  2354. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_LSB 16
  2355. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MSB 23
  2356. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MASK 0x0000000000ff0000
  2357. /* Description TX_CHAIN_MASK
  2358. Chain mask to support up to 8 antennas.
  2359. <legal 1-255>
  2360. */
  2361. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_OFFSET 0x0000000000000050
  2362. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_LSB 24
  2363. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MSB 31
  2364. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MASK 0x00000000ff000000
  2365. /* Description RESERVED_3A
  2366. <legal 0>
  2367. */
  2368. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_OFFSET 0x0000000000000050
  2369. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_LSB 32
  2370. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MSB 39
  2371. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MASK 0x000000ff00000000
  2372. /* Description SGI
  2373. Field only valid when pkt type is HT or VHT.For 11ax see
  2374. field Dot11ax_CP_LTF_size
  2375. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  2376. for HE
  2377. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  2378. for HE
  2379. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  2380. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  2381. <legal 0 - 3>
  2382. */
  2383. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_OFFSET 0x0000000000000050
  2384. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_LSB 40
  2385. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MSB 41
  2386. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MASK 0x0000030000000000
  2387. /* Description RATE_MCS
  2388. For details, refer to MCS_TYPE description
  2389. Note: This is "rate" in case of 11a/11b
  2390. <legal all>
  2391. */
  2392. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_OFFSET 0x0000000000000050
  2393. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_LSB 42
  2394. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MSB 45
  2395. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MASK 0x00003c0000000000
  2396. /* Description RESERVED_3B
  2397. <legal 0>
  2398. */
  2399. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_OFFSET 0x0000000000000050
  2400. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_LSB 46
  2401. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MSB 47
  2402. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MASK 0x0000c00000000000
  2403. /* Description TX_PWR_1
  2404. Default (desired) transmit parameter for the second chain
  2405. Transmit Power in s6.2 format.
  2406. In units of 0.25 dBm
  2407. Note that there is no Min value for this
  2408. <legal all>
  2409. */
  2410. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_OFFSET 0x0000000000000050
  2411. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_LSB 48
  2412. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MSB 55
  2413. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MASK 0x00ff000000000000
  2414. /* Description ALT_TX_PWR_1
  2415. Alternate (desired) transmit parameter for the second chain
  2416. Transmit Power in s6.2 format.
  2417. In units of 0.25 dBm
  2418. Note that there is no Min value for this
  2419. <legal all>
  2420. */
  2421. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_OFFSET 0x0000000000000050
  2422. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_LSB 56
  2423. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MSB 63
  2424. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MASK 0xff00000000000000
  2425. /* Description AGGREGATION
  2426. Field only valid in case of pkt_type == 11n
  2427. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  2428. this setting if the CBF response only contains a single
  2429. segment
  2430. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  2431. select this setting if the CBF response will contain two
  2432. or more segments
  2433. <legal 0-1>
  2434. */
  2435. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_OFFSET 0x0000000000000058
  2436. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_LSB 0
  2437. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MSB 0
  2438. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MASK 0x0000000000000001
  2439. /* Description DOT11AX_BSS_COLOR_ID
  2440. BSS color of the nextwork to which this STA belongs.
  2441. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  2442. <legal all>
  2443. */
  2444. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000058
  2445. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_LSB 1
  2446. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MSB 6
  2447. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  2448. /* Description DOT11AX_SPATIAL_REUSE
  2449. This field is only valid for pkt_type == 11ax
  2450. Spatial re-use
  2451. <legal all>
  2452. */
  2453. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000058
  2454. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_LSB 7
  2455. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MSB 10
  2456. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  2457. /* Description DOT11AX_CP_LTF_SIZE
  2458. field is only valid for pkt_type == 11ax
  2459. Indicates the CP and HE-LTF type
  2460. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  2461. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  2462. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  2463. <enum 3 FourX_LTF_0_8CP_3_2CP>
  2464. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  2465. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  2466. In this scenario, Neither DCM nor STBC is applied to HE
  2467. data field.
  2468. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  2469. 0 = 1xLTF + 0.4 usec
  2470. 1 = 2xLTF + 0.4 usec
  2471. 2~3 = Reserved
  2472. <legal all>
  2473. */
  2474. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000058
  2475. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_LSB 11
  2476. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MSB 12
  2477. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  2478. /* Description DOT11AX_DCM
  2479. field is only valid for pkt_type == 11ax
  2480. Indicates whether dual sub-carrier modulation is applied
  2481. 0: No DCM
  2482. 1:DCM
  2483. <legal all>
  2484. */
  2485. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_OFFSET 0x0000000000000058
  2486. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_LSB 13
  2487. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MSB 13
  2488. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MASK 0x0000000000002000
  2489. /* Description DOT11AX_DOPPLER_INDICATION
  2490. field is only valid for pkt_type == 11ax
  2491. 0: No Doppler support
  2492. 1: Doppler support
  2493. <legal all>
  2494. */
  2495. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000058
  2496. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_LSB 14
  2497. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MSB 14
  2498. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  2499. /* Description DOT11AX_SU_EXTENDED
  2500. field is only valid for pkt_type == 11ax OR pkt_type ==
  2501. 11be
  2502. When set, the 11ax or 11be frame is of the extended range
  2503. format
  2504. <legal all>
  2505. */
  2506. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000058
  2507. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_LSB 15
  2508. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MSB 15
  2509. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  2510. /* Description DOT11AX_MIN_PACKET_EXTENSION
  2511. field is only valid for pkt_type == 11ax OR pkt_type ==
  2512. 11be
  2513. The min packet extension duration for this user.
  2514. 0: no extension
  2515. 1: 8us
  2516. 2: 16 us
  2517. 3: 20 us (only for .11be)
  2518. <legal 0-3>
  2519. */
  2520. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000058
  2521. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  2522. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  2523. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  2524. /* Description DOT11AX_PE_NSS
  2525. Number of active spatial streams during packet extension.
  2526. <enum 0 1_spatial_stream>Single spatial stream
  2527. <enum 1 2_spatial_streams>2 spatial streams
  2528. <enum 2 3_spatial_streams>3 spatial streams
  2529. <enum 3 4_spatial_streams>4 spatial streams
  2530. <enum 4 5_spatial_streams>5 spatial streams
  2531. <enum 5 6_spatial_streams>6 spatial streams
  2532. <enum 6 7_spatial_streams>7 spatial streams
  2533. <enum 7 8_spatial_streams>8 spatial streams
  2534. */
  2535. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_OFFSET 0x0000000000000058
  2536. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_LSB 18
  2537. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MSB 20
  2538. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  2539. /* Description DOT11AX_PE_CONTENT
  2540. Content of packet extension. Valid for all 11ax packets
  2541. having packet extension
  2542. 0-he_ltf, 1-last_data_symbol
  2543. <legal all>
  2544. */
  2545. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000058
  2546. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_LSB 21
  2547. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MSB 21
  2548. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  2549. /* Description DOT11AX_PE_LTF_SIZE
  2550. LTF size to be used during packet extention. . This field
  2551. is valid for both FTM and non-FTM packets.
  2552. 0-1x
  2553. 1-2x (unsupported un HWK-1)
  2554. 2-4x (unsupported un HWK-1)
  2555. <legal all>
  2556. */
  2557. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000058
  2558. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_LSB 22
  2559. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MSB 23
  2560. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  2561. /* Description DOT11AX_CHAIN_CSD_EN
  2562. This field denotes whether to apply CSD on the preamble
  2563. and data portion of the packet. This field is valid for
  2564. all transmit packets
  2565. 0: disable per-chain csd
  2566. 1: enable per-chain csd
  2567. <legal all>
  2568. */
  2569. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000058
  2570. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_LSB 24
  2571. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MSB 24
  2572. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  2573. /* Description DOT11AX_PE_CHAIN_CSD_EN
  2574. This field denotes whether to apply CSD on the packet extension
  2575. portion of the packet. This field is valid for all 11ax
  2576. packets.
  2577. 0: disable per-chain csd
  2578. 1: enable per-chain csd
  2579. <legal all>
  2580. */
  2581. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000058
  2582. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  2583. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  2584. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  2585. /* Description DOT11AX_DL_UL_FLAG
  2586. field is only valid for pkt_type == 11ax
  2587. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  2588. <enum 1 DL_UL_FLAG_IS_UL>
  2589. <legal all>
  2590. */
  2591. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000058
  2592. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_LSB 26
  2593. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MSB 26
  2594. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  2595. /* Description RESERVED_4A
  2596. <legal 0>
  2597. */
  2598. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_OFFSET 0x0000000000000058
  2599. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_LSB 27
  2600. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MSB 31
  2601. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MASK 0x00000000f8000000
  2602. /* Description DOT11AX_EXT_RU_START_INDEX
  2603. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  2604. == 1
  2605. RU Number to which User is assigned
  2606. The RU numbering bitwidth is only enough to cover the 20MHz
  2607. BW that extended range allows
  2608. <legal 0-8>
  2609. */
  2610. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000058
  2611. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_LSB 32
  2612. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MSB 35
  2613. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  2614. /* Description DOT11AX_EXT_RU_SIZE
  2615. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  2616. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  2617. The size of the RU for this user.
  2618. In case of EHT duplicate transmissions, this field indicates
  2619. the width of the actual content before duplication, e.g.
  2620. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  2621. fields indicating 160 MHz and this field set to e-num 4
  2622. (RU_484).
  2623. <enum 0 RU_26>
  2624. <enum 1 RU_52>
  2625. <enum 2 RU_106>
  2626. <enum 3 RU_242>
  2627. <enum 4 RU_484>
  2628. <enum 5 RU_996>
  2629. <enum 6 RU_1992>
  2630. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  2631. bandwidth
  2632. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  2633. packet bandwidth
  2634. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  2635. packet bandwidth
  2636. <enum 10 RU_MULTI_LARGE> DO NOT USE
  2637. <enum 11 RU_78> DO NOT USE
  2638. <enum 12 RU_132> DO NOT USE
  2639. <legal 0-12>
  2640. */
  2641. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000058
  2642. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_LSB 36
  2643. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MSB 39
  2644. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  2645. /* Description EHT_DUPLICATE_MODE
  2646. Field only valid for pkt_type == 11be
  2647. Indicates EHT duplicate modulation
  2648. <enum 0 eht_no_duplicate>
  2649. <enum 1 eht_2x_duplicate>
  2650. <enum 2 eht_4x_duplicate>
  2651. <legal 0-2>
  2652. */
  2653. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000058
  2654. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_LSB 40
  2655. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MSB 41
  2656. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  2657. /* Description HE_SIGB_DCM
  2658. Indicates whether dual sub-carrier modulation is applied
  2659. to EHT-SIG
  2660. <legal all>
  2661. */
  2662. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_OFFSET 0x0000000000000058
  2663. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_LSB 42
  2664. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MSB 42
  2665. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MASK 0x0000040000000000
  2666. /* Description HE_SIGB_0_MCS
  2667. Indicates the MCS of EHT-SIG
  2668. For details, refer to MCS_TYPE description
  2669. <legal all>
  2670. */
  2671. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_OFFSET 0x0000000000000058
  2672. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_LSB 43
  2673. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MSB 45
  2674. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MASK 0x0000380000000000
  2675. /* Description NUM_HE_SIGB_SYM
  2676. Indicates the number of EHT-SIG symbols
  2677. This field is 0-based with 0 indicating that 1 eht_sig symbol
  2678. needs to be transmitted.
  2679. <legal all>
  2680. */
  2681. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000058
  2682. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_LSB 46
  2683. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MSB 50
  2684. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  2685. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  2686. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  2687. HT Control for sync MLO response
  2688. <enum 1 reqd_resp_time_src_is_FW>
  2689. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  2690. to response
  2691. <legal all>
  2692. */
  2693. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000058
  2694. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  2695. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  2696. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  2697. /* Description RESERVED_5A
  2698. <legal 0>
  2699. */
  2700. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_OFFSET 0x0000000000000058
  2701. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_LSB 52
  2702. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MSB 57
  2703. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MASK 0x03f0000000000000
  2704. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  2705. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  2706. to pass on to PDG
  2707. <legal 0-29>
  2708. */
  2709. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000058
  2710. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  2711. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  2712. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  2713. /* Description MLO_STA_ID_DETAILS_RX
  2714. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  2715. on to PDG
  2716. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  2717. from address search.
  2718. See definition of mlo_sta_id_details.
  2719. */
  2720. /* Description NSTR_MLO_STA_ID
  2721. ID of peer participating in non-STR MLO
  2722. */
  2723. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000060
  2724. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  2725. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  2726. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  2727. /* Description BLOCK_SELF_ML_SYNC
  2728. Only valid for TX
  2729. When set, this provides an indication to block the peer
  2730. for self-link.
  2731. */
  2732. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000060
  2733. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  2734. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  2735. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  2736. /* Description BLOCK_PARTNER_ML_SYNC
  2737. Only valid for TX
  2738. When set, this provides an indication to block the peer
  2739. for partner links.
  2740. */
  2741. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000060
  2742. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  2743. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  2744. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  2745. /* Description NSTR_MLO_STA_ID_VALID
  2746. All the fields in this TLV are valid only if this bit is
  2747. set.
  2748. */
  2749. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000060
  2750. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  2751. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  2752. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  2753. /* Description RESERVED_0A
  2754. <legal 0>
  2755. */
  2756. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000060
  2757. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  2758. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  2759. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  2760. /* Description REQUIRED_RESPONSE_TIME
  2761. When non-zero, indicates that PDG shall pad the response
  2762. transmission to the indicated duration (in us)
  2763. */
  2764. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000060
  2765. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_LSB 16
  2766. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MSB 27
  2767. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  2768. /* Description DOT11BE_PARAMS_PLACEHOLDER
  2769. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  2770. */
  2771. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000060
  2772. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  2773. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  2774. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  2775. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW160
  2776. Field only valid in case of Response_to_response set to
  2777. SU_BA or MU_BA
  2778. NOTE: This field is also known as response_to_response_rate_info_pattern_3
  2779. in case punctured transmission is enabled.
  2780. Used by TXPCU to determine what the transmit rates are for
  2781. the response to response transmission in case original
  2782. transmission was 160 MHz.
  2783. Note:
  2784. see field R2R_bw160_active_channel for the BW of this transmission
  2785. */
  2786. /* Description RESERVED_0A
  2787. <legal 0>
  2788. */
  2789. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_OFFSET 0x0000000000000060
  2790. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_LSB 32
  2791. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MSB 32
  2792. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MASK 0x0000000100000000
  2793. /* Description TX_ANTENNA_SECTOR_CTRL
  2794. Sectored transmit antenna
  2795. <legal all>
  2796. */
  2797. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000060
  2798. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_LSB 33
  2799. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MSB 56
  2800. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  2801. /* Description PKT_TYPE
  2802. Packet type:
  2803. <enum 0 dot11a>802.11a PPDU type
  2804. <enum 1 dot11b>802.11b PPDU type
  2805. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  2806. <enum 3 dot11ac>802.11ac PPDU type
  2807. <enum 4 dot11ax>802.11ax PPDU type
  2808. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  2809. <enum 6 dot11be>802.11be PPDU type
  2810. <enum 7 dot11az>802.11az (ranging) PPDU type
  2811. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  2812. & aborted)
  2813. */
  2814. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_OFFSET 0x0000000000000060
  2815. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_LSB 57
  2816. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MSB 60
  2817. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MASK 0x1e00000000000000
  2818. /* Description SMOOTHING
  2819. This field is used by PDG to populate the SMOOTHING filed
  2820. in the SIG Preamble of the PPDU
  2821. <legal 0-1>
  2822. */
  2823. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_OFFSET 0x0000000000000060
  2824. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_LSB 61
  2825. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MSB 61
  2826. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MASK 0x2000000000000000
  2827. /* Description LDPC
  2828. When set, use LDPC transmission rates
  2829. */
  2830. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_OFFSET 0x0000000000000060
  2831. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_LSB 62
  2832. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MSB 62
  2833. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MASK 0x4000000000000000
  2834. /* Description STBC
  2835. When set, use STBC transmission rates
  2836. */
  2837. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_OFFSET 0x0000000000000060
  2838. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_LSB 63
  2839. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MSB 63
  2840. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MASK 0x8000000000000000
  2841. /* Description ALT_TX_PWR
  2842. Coex related AlternativeTransmit parameter
  2843. Transmit Power in s6.2 format.
  2844. In units of 0.25 dBm
  2845. <legal all>
  2846. */
  2847. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_OFFSET 0x0000000000000068
  2848. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_LSB 0
  2849. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MSB 7
  2850. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MASK 0x00000000000000ff
  2851. /* Description ALT_MIN_TX_PWR
  2852. Coex related Alternative Transmit parameter
  2853. Minimum allowed Transmit Power in s6.2 format.
  2854. In units of 0.25 dBm
  2855. <legal all>
  2856. */
  2857. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_OFFSET 0x0000000000000068
  2858. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_LSB 8
  2859. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MSB 15
  2860. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  2861. /* Description ALT_NSS
  2862. Coex related Alternative Transmit parameter
  2863. Number of spatial streams.
  2864. <enum 0 1_spatial_stream>Single spatial stream
  2865. <enum 1 2_spatial_streams>2 spatial streams
  2866. <enum 2 3_spatial_streams>3 spatial streams
  2867. <enum 3 4_spatial_streams>4 spatial streams
  2868. <enum 4 5_spatial_streams>5 spatial streams
  2869. <enum 5 6_spatial_streams>6 spatial streams
  2870. <enum 6 7_spatial_streams>7 spatial streams
  2871. <enum 7 8_spatial_streams>8 spatial streams
  2872. */
  2873. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_OFFSET 0x0000000000000068
  2874. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_LSB 16
  2875. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MSB 18
  2876. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MASK 0x0000000000070000
  2877. /* Description ALT_TX_CHAIN_MASK
  2878. Coex related Alternative Transmit parameter
  2879. Chain mask to support up to 8 antennas.
  2880. <legal 1-255>
  2881. */
  2882. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000068
  2883. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_LSB 19
  2884. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MSB 26
  2885. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  2886. /* Description ALT_BW
  2887. Coex related Alternative Transmit parameter
  2888. The BW of the upcoming transmission.
  2889. <enum 0 20_mhz>20 Mhz BW
  2890. <enum 1 40_mhz>40 Mhz BW
  2891. <enum 2 80_mhz>80 Mhz BW
  2892. <enum 3 160_mhz>160 Mhz BW
  2893. <enum 4 320_mhz>320 Mhz BW
  2894. <enum 5 240_mhz>240 Mhz BW
  2895. */
  2896. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_OFFSET 0x0000000000000068
  2897. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_LSB 27
  2898. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MSB 29
  2899. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MASK 0x0000000038000000
  2900. /* Description STF_LTF_3DB_BOOST
  2901. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  2902. This includes both the legacy preambles and the HT/VHT preambles.0:
  2903. disable power boost1: enable power boost
  2904. <legal all>
  2905. */
  2906. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000068
  2907. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_LSB 30
  2908. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MSB 30
  2909. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  2910. /* Description FORCE_EXTRA_SYMBOL
  2911. Set to 1 to force an extra OFDM symbol (or symbols) even
  2912. if the PPDU encoding process does not result in an extra
  2913. OFDM symbol (or symbols)
  2914. */
  2915. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000068
  2916. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_LSB 31
  2917. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MSB 31
  2918. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  2919. /* Description ALT_RATE_MCS
  2920. Coex related Alternative Transmit parameter
  2921. For details, refer to MCS_TYPE
  2922. Note: This is "rate" in case of 11a/11b
  2923. description
  2924. <legal all>
  2925. */
  2926. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_OFFSET 0x0000000000000068
  2927. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_LSB 32
  2928. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MSB 35
  2929. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MASK 0x0000000f00000000
  2930. /* Description NSS
  2931. Number of spatial streams.
  2932. <enum 0 1_spatial_stream>Single spatial stream
  2933. <enum 1 2_spatial_streams>2 spatial streams
  2934. <enum 2 3_spatial_streams>3 spatial streams
  2935. <enum 3 4_spatial_streams>4 spatial streams
  2936. <enum 4 5_spatial_streams>5 spatial streams
  2937. <enum 5 6_spatial_streams>6 spatial streams
  2938. <enum 6 7_spatial_streams>7 spatial streams
  2939. <enum 7 8_spatial_streams>8 spatial streams
  2940. */
  2941. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_OFFSET 0x0000000000000068
  2942. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_LSB 36
  2943. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MSB 38
  2944. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MASK 0x0000007000000000
  2945. /* Description DPD_ENABLE
  2946. DPD enable control
  2947. This is needed on a per packet basis
  2948. <enum 0 dpd_off> DPD profile not applied to current
  2949. packet
  2950. <enum 1 dpd_on> DPD profile applied to current packet
  2951. if available
  2952. <legal 0-1>
  2953. This field is not applicable in11ah mode of operation and
  2954. is ignored by the HW
  2955. */
  2956. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_OFFSET 0x0000000000000068
  2957. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_LSB 39
  2958. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MSB 39
  2959. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MASK 0x0000008000000000
  2960. /* Description TX_PWR
  2961. Transmit Power in s6.2 format.
  2962. In units of 0.25 dBm
  2963. <legal all>
  2964. */
  2965. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_OFFSET 0x0000000000000068
  2966. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_LSB 40
  2967. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MSB 47
  2968. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MASK 0x0000ff0000000000
  2969. /* Description MIN_TX_PWR
  2970. Coex related field:
  2971. Minimum allowed Transmit Power in s6.2 format.
  2972. In units of 0.25 dBm
  2973. <legal all>
  2974. */
  2975. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_OFFSET 0x0000000000000068
  2976. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_LSB 48
  2977. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MSB 55
  2978. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MASK 0x00ff000000000000
  2979. /* Description TX_CHAIN_MASK
  2980. Chain mask to support up to 8 antennas.
  2981. <legal 1-255>
  2982. */
  2983. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_OFFSET 0x0000000000000068
  2984. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_LSB 56
  2985. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MSB 63
  2986. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MASK 0xff00000000000000
  2987. /* Description RESERVED_3A
  2988. <legal 0>
  2989. */
  2990. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_OFFSET 0x0000000000000070
  2991. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_LSB 0
  2992. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MSB 7
  2993. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MASK 0x00000000000000ff
  2994. /* Description SGI
  2995. Field only valid when pkt type is HT or VHT.For 11ax see
  2996. field Dot11ax_CP_LTF_size
  2997. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  2998. for HE
  2999. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  3000. for HE
  3001. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  3002. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  3003. <legal 0 - 3>
  3004. */
  3005. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_OFFSET 0x0000000000000070
  3006. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_LSB 8
  3007. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MSB 9
  3008. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MASK 0x0000000000000300
  3009. /* Description RATE_MCS
  3010. For details, refer to MCS_TYPE description
  3011. Note: This is "rate" in case of 11a/11b
  3012. <legal all>
  3013. */
  3014. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_OFFSET 0x0000000000000070
  3015. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_LSB 10
  3016. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MSB 13
  3017. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MASK 0x0000000000003c00
  3018. /* Description RESERVED_3B
  3019. <legal 0>
  3020. */
  3021. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_OFFSET 0x0000000000000070
  3022. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_LSB 14
  3023. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MSB 15
  3024. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MASK 0x000000000000c000
  3025. /* Description TX_PWR_1
  3026. Default (desired) transmit parameter for the second chain
  3027. Transmit Power in s6.2 format.
  3028. In units of 0.25 dBm
  3029. Note that there is no Min value for this
  3030. <legal all>
  3031. */
  3032. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_OFFSET 0x0000000000000070
  3033. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_LSB 16
  3034. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MSB 23
  3035. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MASK 0x0000000000ff0000
  3036. /* Description ALT_TX_PWR_1
  3037. Alternate (desired) transmit parameter for the second chain
  3038. Transmit Power in s6.2 format.
  3039. In units of 0.25 dBm
  3040. Note that there is no Min value for this
  3041. <legal all>
  3042. */
  3043. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_OFFSET 0x0000000000000070
  3044. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_LSB 24
  3045. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MSB 31
  3046. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MASK 0x00000000ff000000
  3047. /* Description AGGREGATION
  3048. Field only valid in case of pkt_type == 11n
  3049. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  3050. this setting if the CBF response only contains a single
  3051. segment
  3052. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  3053. select this setting if the CBF response will contain two
  3054. or more segments
  3055. <legal 0-1>
  3056. */
  3057. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_OFFSET 0x0000000000000070
  3058. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_LSB 32
  3059. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MSB 32
  3060. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MASK 0x0000000100000000
  3061. /* Description DOT11AX_BSS_COLOR_ID
  3062. BSS color of the nextwork to which this STA belongs.
  3063. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  3064. <legal all>
  3065. */
  3066. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000070
  3067. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_LSB 33
  3068. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MSB 38
  3069. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  3070. /* Description DOT11AX_SPATIAL_REUSE
  3071. This field is only valid for pkt_type == 11ax
  3072. Spatial re-use
  3073. <legal all>
  3074. */
  3075. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000070
  3076. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_LSB 39
  3077. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MSB 42
  3078. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  3079. /* Description DOT11AX_CP_LTF_SIZE
  3080. field is only valid for pkt_type == 11ax
  3081. Indicates the CP and HE-LTF type
  3082. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  3083. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  3084. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  3085. <enum 3 FourX_LTF_0_8CP_3_2CP>
  3086. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  3087. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  3088. In this scenario, Neither DCM nor STBC is applied to HE
  3089. data field.
  3090. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  3091. 0 = 1xLTF + 0.4 usec
  3092. 1 = 2xLTF + 0.4 usec
  3093. 2~3 = Reserved
  3094. <legal all>
  3095. */
  3096. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000070
  3097. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_LSB 43
  3098. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MSB 44
  3099. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  3100. /* Description DOT11AX_DCM
  3101. field is only valid for pkt_type == 11ax
  3102. Indicates whether dual sub-carrier modulation is applied
  3103. 0: No DCM
  3104. 1:DCM
  3105. <legal all>
  3106. */
  3107. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_OFFSET 0x0000000000000070
  3108. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_LSB 45
  3109. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MSB 45
  3110. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MASK 0x0000200000000000
  3111. /* Description DOT11AX_DOPPLER_INDICATION
  3112. field is only valid for pkt_type == 11ax
  3113. 0: No Doppler support
  3114. 1: Doppler support
  3115. <legal all>
  3116. */
  3117. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000070
  3118. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_LSB 46
  3119. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MSB 46
  3120. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  3121. /* Description DOT11AX_SU_EXTENDED
  3122. field is only valid for pkt_type == 11ax OR pkt_type ==
  3123. 11be
  3124. When set, the 11ax or 11be frame is of the extended range
  3125. format
  3126. <legal all>
  3127. */
  3128. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000070
  3129. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_LSB 47
  3130. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MSB 47
  3131. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  3132. /* Description DOT11AX_MIN_PACKET_EXTENSION
  3133. field is only valid for pkt_type == 11ax OR pkt_type ==
  3134. 11be
  3135. The min packet extension duration for this user.
  3136. 0: no extension
  3137. 1: 8us
  3138. 2: 16 us
  3139. 3: 20 us (only for .11be)
  3140. <legal 0-3>
  3141. */
  3142. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000070
  3143. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  3144. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  3145. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  3146. /* Description DOT11AX_PE_NSS
  3147. Number of active spatial streams during packet extension.
  3148. <enum 0 1_spatial_stream>Single spatial stream
  3149. <enum 1 2_spatial_streams>2 spatial streams
  3150. <enum 2 3_spatial_streams>3 spatial streams
  3151. <enum 3 4_spatial_streams>4 spatial streams
  3152. <enum 4 5_spatial_streams>5 spatial streams
  3153. <enum 5 6_spatial_streams>6 spatial streams
  3154. <enum 6 7_spatial_streams>7 spatial streams
  3155. <enum 7 8_spatial_streams>8 spatial streams
  3156. */
  3157. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_OFFSET 0x0000000000000070
  3158. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_LSB 50
  3159. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MSB 52
  3160. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MASK 0x001c000000000000
  3161. /* Description DOT11AX_PE_CONTENT
  3162. Content of packet extension. Valid for all 11ax packets
  3163. having packet extension
  3164. 0-he_ltf, 1-last_data_symbol
  3165. <legal all>
  3166. */
  3167. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000070
  3168. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_LSB 53
  3169. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MSB 53
  3170. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  3171. /* Description DOT11AX_PE_LTF_SIZE
  3172. LTF size to be used during packet extention. . This field
  3173. is valid for both FTM and non-FTM packets.
  3174. 0-1x
  3175. 1-2x (unsupported un HWK-1)
  3176. 2-4x (unsupported un HWK-1)
  3177. <legal all>
  3178. */
  3179. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000070
  3180. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_LSB 54
  3181. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MSB 55
  3182. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  3183. /* Description DOT11AX_CHAIN_CSD_EN
  3184. This field denotes whether to apply CSD on the preamble
  3185. and data portion of the packet. This field is valid for
  3186. all transmit packets
  3187. 0: disable per-chain csd
  3188. 1: enable per-chain csd
  3189. <legal all>
  3190. */
  3191. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000070
  3192. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_LSB 56
  3193. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MSB 56
  3194. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  3195. /* Description DOT11AX_PE_CHAIN_CSD_EN
  3196. This field denotes whether to apply CSD on the packet extension
  3197. portion of the packet. This field is valid for all 11ax
  3198. packets.
  3199. 0: disable per-chain csd
  3200. 1: enable per-chain csd
  3201. <legal all>
  3202. */
  3203. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000070
  3204. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  3205. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  3206. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  3207. /* Description DOT11AX_DL_UL_FLAG
  3208. field is only valid for pkt_type == 11ax
  3209. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  3210. <enum 1 DL_UL_FLAG_IS_UL>
  3211. <legal all>
  3212. */
  3213. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000070
  3214. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_LSB 58
  3215. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MSB 58
  3216. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  3217. /* Description RESERVED_4A
  3218. <legal 0>
  3219. */
  3220. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_OFFSET 0x0000000000000070
  3221. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_LSB 59
  3222. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MSB 63
  3223. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MASK 0xf800000000000000
  3224. /* Description DOT11AX_EXT_RU_START_INDEX
  3225. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3226. == 1
  3227. RU Number to which User is assigned
  3228. The RU numbering bitwidth is only enough to cover the 20MHz
  3229. BW that extended range allows
  3230. <legal 0-8>
  3231. */
  3232. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000078
  3233. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_LSB 0
  3234. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MSB 3
  3235. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  3236. /* Description DOT11AX_EXT_RU_SIZE
  3237. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3238. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  3239. The size of the RU for this user.
  3240. In case of EHT duplicate transmissions, this field indicates
  3241. the width of the actual content before duplication, e.g.
  3242. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  3243. fields indicating 160 MHz and this field set to e-num 4
  3244. (RU_484).
  3245. <enum 0 RU_26>
  3246. <enum 1 RU_52>
  3247. <enum 2 RU_106>
  3248. <enum 3 RU_242>
  3249. <enum 4 RU_484>
  3250. <enum 5 RU_996>
  3251. <enum 6 RU_1992>
  3252. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  3253. bandwidth
  3254. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  3255. packet bandwidth
  3256. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  3257. packet bandwidth
  3258. <enum 10 RU_MULTI_LARGE> DO NOT USE
  3259. <enum 11 RU_78> DO NOT USE
  3260. <enum 12 RU_132> DO NOT USE
  3261. <legal 0-12>
  3262. */
  3263. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000078
  3264. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_LSB 4
  3265. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MSB 7
  3266. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  3267. /* Description EHT_DUPLICATE_MODE
  3268. Field only valid for pkt_type == 11be
  3269. Indicates EHT duplicate modulation
  3270. <enum 0 eht_no_duplicate>
  3271. <enum 1 eht_2x_duplicate>
  3272. <enum 2 eht_4x_duplicate>
  3273. <legal 0-2>
  3274. */
  3275. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000078
  3276. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_LSB 8
  3277. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MSB 9
  3278. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  3279. /* Description HE_SIGB_DCM
  3280. Indicates whether dual sub-carrier modulation is applied
  3281. to EHT-SIG
  3282. <legal all>
  3283. */
  3284. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_OFFSET 0x0000000000000078
  3285. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_LSB 10
  3286. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MSB 10
  3287. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MASK 0x0000000000000400
  3288. /* Description HE_SIGB_0_MCS
  3289. Indicates the MCS of EHT-SIG
  3290. For details, refer to MCS_TYPE description
  3291. <legal all>
  3292. */
  3293. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_OFFSET 0x0000000000000078
  3294. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_LSB 11
  3295. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MSB 13
  3296. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MASK 0x0000000000003800
  3297. /* Description NUM_HE_SIGB_SYM
  3298. Indicates the number of EHT-SIG symbols
  3299. This field is 0-based with 0 indicating that 1 eht_sig symbol
  3300. needs to be transmitted.
  3301. <legal all>
  3302. */
  3303. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000078
  3304. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_LSB 14
  3305. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MSB 18
  3306. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  3307. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  3308. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  3309. HT Control for sync MLO response
  3310. <enum 1 reqd_resp_time_src_is_FW>
  3311. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  3312. to response
  3313. <legal all>
  3314. */
  3315. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000078
  3316. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  3317. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  3318. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  3319. /* Description RESERVED_5A
  3320. <legal 0>
  3321. */
  3322. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_OFFSET 0x0000000000000078
  3323. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_LSB 20
  3324. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MSB 25
  3325. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MASK 0x0000000003f00000
  3326. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  3327. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  3328. to pass on to PDG
  3329. <legal 0-29>
  3330. */
  3331. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000078
  3332. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  3333. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  3334. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  3335. /* Description MLO_STA_ID_DETAILS_RX
  3336. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  3337. on to PDG
  3338. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  3339. from address search.
  3340. See definition of mlo_sta_id_details.
  3341. */
  3342. /* Description NSTR_MLO_STA_ID
  3343. ID of peer participating in non-STR MLO
  3344. */
  3345. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000078
  3346. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  3347. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  3348. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  3349. /* Description BLOCK_SELF_ML_SYNC
  3350. Only valid for TX
  3351. When set, this provides an indication to block the peer
  3352. for self-link.
  3353. */
  3354. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000078
  3355. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  3356. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  3357. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  3358. /* Description BLOCK_PARTNER_ML_SYNC
  3359. Only valid for TX
  3360. When set, this provides an indication to block the peer
  3361. for partner links.
  3362. */
  3363. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000078
  3364. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  3365. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  3366. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  3367. /* Description NSTR_MLO_STA_ID_VALID
  3368. All the fields in this TLV are valid only if this bit is
  3369. set.
  3370. */
  3371. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000078
  3372. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  3373. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  3374. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  3375. /* Description RESERVED_0A
  3376. <legal 0>
  3377. */
  3378. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000078
  3379. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  3380. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  3381. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  3382. /* Description REQUIRED_RESPONSE_TIME
  3383. When non-zero, indicates that PDG shall pad the response
  3384. transmission to the indicated duration (in us)
  3385. */
  3386. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000078
  3387. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_LSB 48
  3388. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MSB 59
  3389. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  3390. /* Description DOT11BE_PARAMS_PLACEHOLDER
  3391. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  3392. */
  3393. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000078
  3394. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  3395. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  3396. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  3397. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW240
  3398. Field only valid in case of Response_to_response set to
  3399. SU_BA or MU_BA
  3400. NOTE: This field is also known as response_to_response_rate_info_pattern_4
  3401. in case punctured transmission is enabled.
  3402. Used by TXPCU to determine what the transmit rates are for
  3403. the response to response transmission in case original
  3404. transmission was 240 MHz.
  3405. Note:
  3406. see field R2R_bw240_active_channel for the BW of this transmission
  3407. */
  3408. /* Description RESERVED_0A
  3409. <legal 0>
  3410. */
  3411. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_OFFSET 0x0000000000000080
  3412. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_LSB 0
  3413. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MSB 0
  3414. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MASK 0x0000000000000001
  3415. /* Description TX_ANTENNA_SECTOR_CTRL
  3416. Sectored transmit antenna
  3417. <legal all>
  3418. */
  3419. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000080
  3420. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_LSB 1
  3421. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MSB 24
  3422. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  3423. /* Description PKT_TYPE
  3424. Packet type:
  3425. <enum 0 dot11a>802.11a PPDU type
  3426. <enum 1 dot11b>802.11b PPDU type
  3427. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  3428. <enum 3 dot11ac>802.11ac PPDU type
  3429. <enum 4 dot11ax>802.11ax PPDU type
  3430. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  3431. <enum 6 dot11be>802.11be PPDU type
  3432. <enum 7 dot11az>802.11az (ranging) PPDU type
  3433. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  3434. & aborted)
  3435. */
  3436. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_OFFSET 0x0000000000000080
  3437. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_LSB 25
  3438. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MSB 28
  3439. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MASK 0x000000001e000000
  3440. /* Description SMOOTHING
  3441. This field is used by PDG to populate the SMOOTHING filed
  3442. in the SIG Preamble of the PPDU
  3443. <legal 0-1>
  3444. */
  3445. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_OFFSET 0x0000000000000080
  3446. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_LSB 29
  3447. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MSB 29
  3448. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MASK 0x0000000020000000
  3449. /* Description LDPC
  3450. When set, use LDPC transmission rates
  3451. */
  3452. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_OFFSET 0x0000000000000080
  3453. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_LSB 30
  3454. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MSB 30
  3455. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MASK 0x0000000040000000
  3456. /* Description STBC
  3457. When set, use STBC transmission rates
  3458. */
  3459. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_OFFSET 0x0000000000000080
  3460. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_LSB 31
  3461. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MSB 31
  3462. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MASK 0x0000000080000000
  3463. /* Description ALT_TX_PWR
  3464. Coex related AlternativeTransmit parameter
  3465. Transmit Power in s6.2 format.
  3466. In units of 0.25 dBm
  3467. <legal all>
  3468. */
  3469. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_OFFSET 0x0000000000000080
  3470. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_LSB 32
  3471. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MSB 39
  3472. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MASK 0x000000ff00000000
  3473. /* Description ALT_MIN_TX_PWR
  3474. Coex related Alternative Transmit parameter
  3475. Minimum allowed Transmit Power in s6.2 format.
  3476. In units of 0.25 dBm
  3477. <legal all>
  3478. */
  3479. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_OFFSET 0x0000000000000080
  3480. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_LSB 40
  3481. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MSB 47
  3482. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  3483. /* Description ALT_NSS
  3484. Coex related Alternative Transmit parameter
  3485. Number of spatial streams.
  3486. <enum 0 1_spatial_stream>Single spatial stream
  3487. <enum 1 2_spatial_streams>2 spatial streams
  3488. <enum 2 3_spatial_streams>3 spatial streams
  3489. <enum 3 4_spatial_streams>4 spatial streams
  3490. <enum 4 5_spatial_streams>5 spatial streams
  3491. <enum 5 6_spatial_streams>6 spatial streams
  3492. <enum 6 7_spatial_streams>7 spatial streams
  3493. <enum 7 8_spatial_streams>8 spatial streams
  3494. */
  3495. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_OFFSET 0x0000000000000080
  3496. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_LSB 48
  3497. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MSB 50
  3498. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MASK 0x0007000000000000
  3499. /* Description ALT_TX_CHAIN_MASK
  3500. Coex related Alternative Transmit parameter
  3501. Chain mask to support up to 8 antennas.
  3502. <legal 1-255>
  3503. */
  3504. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000080
  3505. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_LSB 51
  3506. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MSB 58
  3507. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  3508. /* Description ALT_BW
  3509. Coex related Alternative Transmit parameter
  3510. The BW of the upcoming transmission.
  3511. <enum 0 20_mhz>20 Mhz BW
  3512. <enum 1 40_mhz>40 Mhz BW
  3513. <enum 2 80_mhz>80 Mhz BW
  3514. <enum 3 160_mhz>160 Mhz BW
  3515. <enum 4 320_mhz>320 Mhz BW
  3516. <enum 5 240_mhz>240 Mhz BW
  3517. */
  3518. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_OFFSET 0x0000000000000080
  3519. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_LSB 59
  3520. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MSB 61
  3521. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MASK 0x3800000000000000
  3522. /* Description STF_LTF_3DB_BOOST
  3523. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  3524. This includes both the legacy preambles and the HT/VHT preambles.0:
  3525. disable power boost1: enable power boost
  3526. <legal all>
  3527. */
  3528. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000080
  3529. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_LSB 62
  3530. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MSB 62
  3531. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  3532. /* Description FORCE_EXTRA_SYMBOL
  3533. Set to 1 to force an extra OFDM symbol (or symbols) even
  3534. if the PPDU encoding process does not result in an extra
  3535. OFDM symbol (or symbols)
  3536. */
  3537. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000080
  3538. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_LSB 63
  3539. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MSB 63
  3540. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  3541. /* Description ALT_RATE_MCS
  3542. Coex related Alternative Transmit parameter
  3543. For details, refer to MCS_TYPE
  3544. Note: This is "rate" in case of 11a/11b
  3545. description
  3546. <legal all>
  3547. */
  3548. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_OFFSET 0x0000000000000088
  3549. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_LSB 0
  3550. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MSB 3
  3551. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MASK 0x000000000000000f
  3552. /* Description NSS
  3553. Number of spatial streams.
  3554. <enum 0 1_spatial_stream>Single spatial stream
  3555. <enum 1 2_spatial_streams>2 spatial streams
  3556. <enum 2 3_spatial_streams>3 spatial streams
  3557. <enum 3 4_spatial_streams>4 spatial streams
  3558. <enum 4 5_spatial_streams>5 spatial streams
  3559. <enum 5 6_spatial_streams>6 spatial streams
  3560. <enum 6 7_spatial_streams>7 spatial streams
  3561. <enum 7 8_spatial_streams>8 spatial streams
  3562. */
  3563. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_OFFSET 0x0000000000000088
  3564. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_LSB 4
  3565. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MSB 6
  3566. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MASK 0x0000000000000070
  3567. /* Description DPD_ENABLE
  3568. DPD enable control
  3569. This is needed on a per packet basis
  3570. <enum 0 dpd_off> DPD profile not applied to current
  3571. packet
  3572. <enum 1 dpd_on> DPD profile applied to current packet
  3573. if available
  3574. <legal 0-1>
  3575. This field is not applicable in11ah mode of operation and
  3576. is ignored by the HW
  3577. */
  3578. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_OFFSET 0x0000000000000088
  3579. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_LSB 7
  3580. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MSB 7
  3581. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MASK 0x0000000000000080
  3582. /* Description TX_PWR
  3583. Transmit Power in s6.2 format.
  3584. In units of 0.25 dBm
  3585. <legal all>
  3586. */
  3587. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_OFFSET 0x0000000000000088
  3588. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_LSB 8
  3589. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MSB 15
  3590. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MASK 0x000000000000ff00
  3591. /* Description MIN_TX_PWR
  3592. Coex related field:
  3593. Minimum allowed Transmit Power in s6.2 format.
  3594. In units of 0.25 dBm
  3595. <legal all>
  3596. */
  3597. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_OFFSET 0x0000000000000088
  3598. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_LSB 16
  3599. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MSB 23
  3600. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MASK 0x0000000000ff0000
  3601. /* Description TX_CHAIN_MASK
  3602. Chain mask to support up to 8 antennas.
  3603. <legal 1-255>
  3604. */
  3605. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_OFFSET 0x0000000000000088
  3606. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_LSB 24
  3607. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MSB 31
  3608. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MASK 0x00000000ff000000
  3609. /* Description RESERVED_3A
  3610. <legal 0>
  3611. */
  3612. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_OFFSET 0x0000000000000088
  3613. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_LSB 32
  3614. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MSB 39
  3615. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MASK 0x000000ff00000000
  3616. /* Description SGI
  3617. Field only valid when pkt type is HT or VHT.For 11ax see
  3618. field Dot11ax_CP_LTF_size
  3619. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  3620. for HE
  3621. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  3622. for HE
  3623. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  3624. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  3625. <legal 0 - 3>
  3626. */
  3627. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_OFFSET 0x0000000000000088
  3628. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_LSB 40
  3629. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MSB 41
  3630. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MASK 0x0000030000000000
  3631. /* Description RATE_MCS
  3632. For details, refer to MCS_TYPE description
  3633. Note: This is "rate" in case of 11a/11b
  3634. <legal all>
  3635. */
  3636. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_OFFSET 0x0000000000000088
  3637. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_LSB 42
  3638. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MSB 45
  3639. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MASK 0x00003c0000000000
  3640. /* Description RESERVED_3B
  3641. <legal 0>
  3642. */
  3643. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_OFFSET 0x0000000000000088
  3644. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_LSB 46
  3645. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MSB 47
  3646. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MASK 0x0000c00000000000
  3647. /* Description TX_PWR_1
  3648. Default (desired) transmit parameter for the second chain
  3649. Transmit Power in s6.2 format.
  3650. In units of 0.25 dBm
  3651. Note that there is no Min value for this
  3652. <legal all>
  3653. */
  3654. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_OFFSET 0x0000000000000088
  3655. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_LSB 48
  3656. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MSB 55
  3657. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MASK 0x00ff000000000000
  3658. /* Description ALT_TX_PWR_1
  3659. Alternate (desired) transmit parameter for the second chain
  3660. Transmit Power in s6.2 format.
  3661. In units of 0.25 dBm
  3662. Note that there is no Min value for this
  3663. <legal all>
  3664. */
  3665. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_OFFSET 0x0000000000000088
  3666. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_LSB 56
  3667. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MSB 63
  3668. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MASK 0xff00000000000000
  3669. /* Description AGGREGATION
  3670. Field only valid in case of pkt_type == 11n
  3671. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  3672. this setting if the CBF response only contains a single
  3673. segment
  3674. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  3675. select this setting if the CBF response will contain two
  3676. or more segments
  3677. <legal 0-1>
  3678. */
  3679. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_OFFSET 0x0000000000000090
  3680. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_LSB 0
  3681. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MSB 0
  3682. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MASK 0x0000000000000001
  3683. /* Description DOT11AX_BSS_COLOR_ID
  3684. BSS color of the nextwork to which this STA belongs.
  3685. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  3686. <legal all>
  3687. */
  3688. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000090
  3689. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_LSB 1
  3690. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MSB 6
  3691. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  3692. /* Description DOT11AX_SPATIAL_REUSE
  3693. This field is only valid for pkt_type == 11ax
  3694. Spatial re-use
  3695. <legal all>
  3696. */
  3697. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000090
  3698. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_LSB 7
  3699. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MSB 10
  3700. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  3701. /* Description DOT11AX_CP_LTF_SIZE
  3702. field is only valid for pkt_type == 11ax
  3703. Indicates the CP and HE-LTF type
  3704. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  3705. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  3706. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  3707. <enum 3 FourX_LTF_0_8CP_3_2CP>
  3708. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  3709. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  3710. In this scenario, Neither DCM nor STBC is applied to HE
  3711. data field.
  3712. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  3713. 0 = 1xLTF + 0.4 usec
  3714. 1 = 2xLTF + 0.4 usec
  3715. 2~3 = Reserved
  3716. <legal all>
  3717. */
  3718. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000090
  3719. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_LSB 11
  3720. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MSB 12
  3721. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  3722. /* Description DOT11AX_DCM
  3723. field is only valid for pkt_type == 11ax
  3724. Indicates whether dual sub-carrier modulation is applied
  3725. 0: No DCM
  3726. 1:DCM
  3727. <legal all>
  3728. */
  3729. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_OFFSET 0x0000000000000090
  3730. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_LSB 13
  3731. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MSB 13
  3732. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MASK 0x0000000000002000
  3733. /* Description DOT11AX_DOPPLER_INDICATION
  3734. field is only valid for pkt_type == 11ax
  3735. 0: No Doppler support
  3736. 1: Doppler support
  3737. <legal all>
  3738. */
  3739. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000090
  3740. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_LSB 14
  3741. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MSB 14
  3742. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  3743. /* Description DOT11AX_SU_EXTENDED
  3744. field is only valid for pkt_type == 11ax OR pkt_type ==
  3745. 11be
  3746. When set, the 11ax or 11be frame is of the extended range
  3747. format
  3748. <legal all>
  3749. */
  3750. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000090
  3751. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_LSB 15
  3752. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MSB 15
  3753. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  3754. /* Description DOT11AX_MIN_PACKET_EXTENSION
  3755. field is only valid for pkt_type == 11ax OR pkt_type ==
  3756. 11be
  3757. The min packet extension duration for this user.
  3758. 0: no extension
  3759. 1: 8us
  3760. 2: 16 us
  3761. 3: 20 us (only for .11be)
  3762. <legal 0-3>
  3763. */
  3764. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000090
  3765. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  3766. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  3767. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  3768. /* Description DOT11AX_PE_NSS
  3769. Number of active spatial streams during packet extension.
  3770. <enum 0 1_spatial_stream>Single spatial stream
  3771. <enum 1 2_spatial_streams>2 spatial streams
  3772. <enum 2 3_spatial_streams>3 spatial streams
  3773. <enum 3 4_spatial_streams>4 spatial streams
  3774. <enum 4 5_spatial_streams>5 spatial streams
  3775. <enum 5 6_spatial_streams>6 spatial streams
  3776. <enum 6 7_spatial_streams>7 spatial streams
  3777. <enum 7 8_spatial_streams>8 spatial streams
  3778. */
  3779. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_OFFSET 0x0000000000000090
  3780. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_LSB 18
  3781. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MSB 20
  3782. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  3783. /* Description DOT11AX_PE_CONTENT
  3784. Content of packet extension. Valid for all 11ax packets
  3785. having packet extension
  3786. 0-he_ltf, 1-last_data_symbol
  3787. <legal all>
  3788. */
  3789. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000090
  3790. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_LSB 21
  3791. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MSB 21
  3792. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  3793. /* Description DOT11AX_PE_LTF_SIZE
  3794. LTF size to be used during packet extention. . This field
  3795. is valid for both FTM and non-FTM packets.
  3796. 0-1x
  3797. 1-2x (unsupported un HWK-1)
  3798. 2-4x (unsupported un HWK-1)
  3799. <legal all>
  3800. */
  3801. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000090
  3802. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_LSB 22
  3803. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MSB 23
  3804. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  3805. /* Description DOT11AX_CHAIN_CSD_EN
  3806. This field denotes whether to apply CSD on the preamble
  3807. and data portion of the packet. This field is valid for
  3808. all transmit packets
  3809. 0: disable per-chain csd
  3810. 1: enable per-chain csd
  3811. <legal all>
  3812. */
  3813. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000090
  3814. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_LSB 24
  3815. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MSB 24
  3816. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  3817. /* Description DOT11AX_PE_CHAIN_CSD_EN
  3818. This field denotes whether to apply CSD on the packet extension
  3819. portion of the packet. This field is valid for all 11ax
  3820. packets.
  3821. 0: disable per-chain csd
  3822. 1: enable per-chain csd
  3823. <legal all>
  3824. */
  3825. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000090
  3826. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  3827. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  3828. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  3829. /* Description DOT11AX_DL_UL_FLAG
  3830. field is only valid for pkt_type == 11ax
  3831. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  3832. <enum 1 DL_UL_FLAG_IS_UL>
  3833. <legal all>
  3834. */
  3835. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000090
  3836. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_LSB 26
  3837. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MSB 26
  3838. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  3839. /* Description RESERVED_4A
  3840. <legal 0>
  3841. */
  3842. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_OFFSET 0x0000000000000090
  3843. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_LSB 27
  3844. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MSB 31
  3845. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MASK 0x00000000f8000000
  3846. /* Description DOT11AX_EXT_RU_START_INDEX
  3847. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3848. == 1
  3849. RU Number to which User is assigned
  3850. The RU numbering bitwidth is only enough to cover the 20MHz
  3851. BW that extended range allows
  3852. <legal 0-8>
  3853. */
  3854. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000090
  3855. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_LSB 32
  3856. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MSB 35
  3857. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  3858. /* Description DOT11AX_EXT_RU_SIZE
  3859. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3860. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  3861. The size of the RU for this user.
  3862. In case of EHT duplicate transmissions, this field indicates
  3863. the width of the actual content before duplication, e.g.
  3864. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  3865. fields indicating 160 MHz and this field set to e-num 4
  3866. (RU_484).
  3867. <enum 0 RU_26>
  3868. <enum 1 RU_52>
  3869. <enum 2 RU_106>
  3870. <enum 3 RU_242>
  3871. <enum 4 RU_484>
  3872. <enum 5 RU_996>
  3873. <enum 6 RU_1992>
  3874. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  3875. bandwidth
  3876. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  3877. packet bandwidth
  3878. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  3879. packet bandwidth
  3880. <enum 10 RU_MULTI_LARGE> DO NOT USE
  3881. <enum 11 RU_78> DO NOT USE
  3882. <enum 12 RU_132> DO NOT USE
  3883. <legal 0-12>
  3884. */
  3885. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000090
  3886. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_LSB 36
  3887. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MSB 39
  3888. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  3889. /* Description EHT_DUPLICATE_MODE
  3890. Field only valid for pkt_type == 11be
  3891. Indicates EHT duplicate modulation
  3892. <enum 0 eht_no_duplicate>
  3893. <enum 1 eht_2x_duplicate>
  3894. <enum 2 eht_4x_duplicate>
  3895. <legal 0-2>
  3896. */
  3897. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000090
  3898. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_LSB 40
  3899. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MSB 41
  3900. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  3901. /* Description HE_SIGB_DCM
  3902. Indicates whether dual sub-carrier modulation is applied
  3903. to EHT-SIG
  3904. <legal all>
  3905. */
  3906. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_OFFSET 0x0000000000000090
  3907. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_LSB 42
  3908. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MSB 42
  3909. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MASK 0x0000040000000000
  3910. /* Description HE_SIGB_0_MCS
  3911. Indicates the MCS of EHT-SIG
  3912. For details, refer to MCS_TYPE description
  3913. <legal all>
  3914. */
  3915. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_OFFSET 0x0000000000000090
  3916. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_LSB 43
  3917. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MSB 45
  3918. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MASK 0x0000380000000000
  3919. /* Description NUM_HE_SIGB_SYM
  3920. Indicates the number of EHT-SIG symbols
  3921. This field is 0-based with 0 indicating that 1 eht_sig symbol
  3922. needs to be transmitted.
  3923. <legal all>
  3924. */
  3925. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000090
  3926. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_LSB 46
  3927. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MSB 50
  3928. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  3929. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  3930. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  3931. HT Control for sync MLO response
  3932. <enum 1 reqd_resp_time_src_is_FW>
  3933. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  3934. to response
  3935. <legal all>
  3936. */
  3937. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000090
  3938. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  3939. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  3940. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  3941. /* Description RESERVED_5A
  3942. <legal 0>
  3943. */
  3944. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_OFFSET 0x0000000000000090
  3945. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_LSB 52
  3946. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MSB 57
  3947. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MASK 0x03f0000000000000
  3948. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  3949. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  3950. to pass on to PDG
  3951. <legal 0-29>
  3952. */
  3953. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000090
  3954. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  3955. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  3956. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  3957. /* Description MLO_STA_ID_DETAILS_RX
  3958. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  3959. on to PDG
  3960. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  3961. from address search.
  3962. See definition of mlo_sta_id_details.
  3963. */
  3964. /* Description NSTR_MLO_STA_ID
  3965. ID of peer participating in non-STR MLO
  3966. */
  3967. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000098
  3968. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  3969. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  3970. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  3971. /* Description BLOCK_SELF_ML_SYNC
  3972. Only valid for TX
  3973. When set, this provides an indication to block the peer
  3974. for self-link.
  3975. */
  3976. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000098
  3977. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  3978. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  3979. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  3980. /* Description BLOCK_PARTNER_ML_SYNC
  3981. Only valid for TX
  3982. When set, this provides an indication to block the peer
  3983. for partner links.
  3984. */
  3985. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000098
  3986. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  3987. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  3988. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  3989. /* Description NSTR_MLO_STA_ID_VALID
  3990. All the fields in this TLV are valid only if this bit is
  3991. set.
  3992. */
  3993. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000098
  3994. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  3995. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  3996. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  3997. /* Description RESERVED_0A
  3998. <legal 0>
  3999. */
  4000. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000098
  4001. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  4002. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  4003. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  4004. /* Description REQUIRED_RESPONSE_TIME
  4005. When non-zero, indicates that PDG shall pad the response
  4006. transmission to the indicated duration (in us)
  4007. */
  4008. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000098
  4009. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_LSB 16
  4010. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MSB 27
  4011. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  4012. /* Description DOT11BE_PARAMS_PLACEHOLDER
  4013. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  4014. */
  4015. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000098
  4016. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  4017. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  4018. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  4019. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW320
  4020. Field only valid in case of Response_to_response set to
  4021. SU_BA or MU_BA
  4022. NOTE: This field is also known as response_to_response_rate_info_pattern_5
  4023. in case punctured transmission is enabled.
  4024. Used by TXPCU to determine what the transmit rates are for
  4025. the response to response transmission in case original
  4026. transmission was 320 MHz.
  4027. Note:
  4028. see field R2R_bw320_active_channel for the BW of this transmission
  4029. */
  4030. /* Description RESERVED_0A
  4031. <legal 0>
  4032. */
  4033. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_OFFSET 0x0000000000000098
  4034. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_LSB 32
  4035. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MSB 32
  4036. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MASK 0x0000000100000000
  4037. /* Description TX_ANTENNA_SECTOR_CTRL
  4038. Sectored transmit antenna
  4039. <legal all>
  4040. */
  4041. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000098
  4042. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_LSB 33
  4043. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MSB 56
  4044. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  4045. /* Description PKT_TYPE
  4046. Packet type:
  4047. <enum 0 dot11a>802.11a PPDU type
  4048. <enum 1 dot11b>802.11b PPDU type
  4049. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  4050. <enum 3 dot11ac>802.11ac PPDU type
  4051. <enum 4 dot11ax>802.11ax PPDU type
  4052. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  4053. <enum 6 dot11be>802.11be PPDU type
  4054. <enum 7 dot11az>802.11az (ranging) PPDU type
  4055. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  4056. & aborted)
  4057. */
  4058. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_OFFSET 0x0000000000000098
  4059. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_LSB 57
  4060. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MSB 60
  4061. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MASK 0x1e00000000000000
  4062. /* Description SMOOTHING
  4063. This field is used by PDG to populate the SMOOTHING filed
  4064. in the SIG Preamble of the PPDU
  4065. <legal 0-1>
  4066. */
  4067. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_OFFSET 0x0000000000000098
  4068. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_LSB 61
  4069. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MSB 61
  4070. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MASK 0x2000000000000000
  4071. /* Description LDPC
  4072. When set, use LDPC transmission rates
  4073. */
  4074. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_OFFSET 0x0000000000000098
  4075. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_LSB 62
  4076. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MSB 62
  4077. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MASK 0x4000000000000000
  4078. /* Description STBC
  4079. When set, use STBC transmission rates
  4080. */
  4081. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_OFFSET 0x0000000000000098
  4082. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_LSB 63
  4083. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MSB 63
  4084. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MASK 0x8000000000000000
  4085. /* Description ALT_TX_PWR
  4086. Coex related AlternativeTransmit parameter
  4087. Transmit Power in s6.2 format.
  4088. In units of 0.25 dBm
  4089. <legal all>
  4090. */
  4091. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_OFFSET 0x00000000000000a0
  4092. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_LSB 0
  4093. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MSB 7
  4094. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MASK 0x00000000000000ff
  4095. /* Description ALT_MIN_TX_PWR
  4096. Coex related Alternative Transmit parameter
  4097. Minimum allowed Transmit Power in s6.2 format.
  4098. In units of 0.25 dBm
  4099. <legal all>
  4100. */
  4101. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_OFFSET 0x00000000000000a0
  4102. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_LSB 8
  4103. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MSB 15
  4104. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  4105. /* Description ALT_NSS
  4106. Coex related Alternative Transmit parameter
  4107. Number of spatial streams.
  4108. <enum 0 1_spatial_stream>Single spatial stream
  4109. <enum 1 2_spatial_streams>2 spatial streams
  4110. <enum 2 3_spatial_streams>3 spatial streams
  4111. <enum 3 4_spatial_streams>4 spatial streams
  4112. <enum 4 5_spatial_streams>5 spatial streams
  4113. <enum 5 6_spatial_streams>6 spatial streams
  4114. <enum 6 7_spatial_streams>7 spatial streams
  4115. <enum 7 8_spatial_streams>8 spatial streams
  4116. */
  4117. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_OFFSET 0x00000000000000a0
  4118. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_LSB 16
  4119. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MSB 18
  4120. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MASK 0x0000000000070000
  4121. /* Description ALT_TX_CHAIN_MASK
  4122. Coex related Alternative Transmit parameter
  4123. Chain mask to support up to 8 antennas.
  4124. <legal 1-255>
  4125. */
  4126. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_OFFSET 0x00000000000000a0
  4127. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_LSB 19
  4128. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MSB 26
  4129. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  4130. /* Description ALT_BW
  4131. Coex related Alternative Transmit parameter
  4132. The BW of the upcoming transmission.
  4133. <enum 0 20_mhz>20 Mhz BW
  4134. <enum 1 40_mhz>40 Mhz BW
  4135. <enum 2 80_mhz>80 Mhz BW
  4136. <enum 3 160_mhz>160 Mhz BW
  4137. <enum 4 320_mhz>320 Mhz BW
  4138. <enum 5 240_mhz>240 Mhz BW
  4139. */
  4140. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_OFFSET 0x00000000000000a0
  4141. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_LSB 27
  4142. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MSB 29
  4143. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MASK 0x0000000038000000
  4144. /* Description STF_LTF_3DB_BOOST
  4145. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  4146. This includes both the legacy preambles and the HT/VHT preambles.0:
  4147. disable power boost1: enable power boost
  4148. <legal all>
  4149. */
  4150. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_OFFSET 0x00000000000000a0
  4151. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_LSB 30
  4152. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MSB 30
  4153. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  4154. /* Description FORCE_EXTRA_SYMBOL
  4155. Set to 1 to force an extra OFDM symbol (or symbols) even
  4156. if the PPDU encoding process does not result in an extra
  4157. OFDM symbol (or symbols)
  4158. */
  4159. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_OFFSET 0x00000000000000a0
  4160. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_LSB 31
  4161. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MSB 31
  4162. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  4163. /* Description ALT_RATE_MCS
  4164. Coex related Alternative Transmit parameter
  4165. For details, refer to MCS_TYPE
  4166. Note: This is "rate" in case of 11a/11b
  4167. description
  4168. <legal all>
  4169. */
  4170. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_OFFSET 0x00000000000000a0
  4171. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_LSB 32
  4172. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MSB 35
  4173. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MASK 0x0000000f00000000
  4174. /* Description NSS
  4175. Number of spatial streams.
  4176. <enum 0 1_spatial_stream>Single spatial stream
  4177. <enum 1 2_spatial_streams>2 spatial streams
  4178. <enum 2 3_spatial_streams>3 spatial streams
  4179. <enum 3 4_spatial_streams>4 spatial streams
  4180. <enum 4 5_spatial_streams>5 spatial streams
  4181. <enum 5 6_spatial_streams>6 spatial streams
  4182. <enum 6 7_spatial_streams>7 spatial streams
  4183. <enum 7 8_spatial_streams>8 spatial streams
  4184. */
  4185. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_OFFSET 0x00000000000000a0
  4186. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_LSB 36
  4187. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MSB 38
  4188. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MASK 0x0000007000000000
  4189. /* Description DPD_ENABLE
  4190. DPD enable control
  4191. This is needed on a per packet basis
  4192. <enum 0 dpd_off> DPD profile not applied to current
  4193. packet
  4194. <enum 1 dpd_on> DPD profile applied to current packet
  4195. if available
  4196. <legal 0-1>
  4197. This field is not applicable in11ah mode of operation and
  4198. is ignored by the HW
  4199. */
  4200. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_OFFSET 0x00000000000000a0
  4201. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_LSB 39
  4202. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MSB 39
  4203. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MASK 0x0000008000000000
  4204. /* Description TX_PWR
  4205. Transmit Power in s6.2 format.
  4206. In units of 0.25 dBm
  4207. <legal all>
  4208. */
  4209. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_OFFSET 0x00000000000000a0
  4210. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_LSB 40
  4211. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MSB 47
  4212. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MASK 0x0000ff0000000000
  4213. /* Description MIN_TX_PWR
  4214. Coex related field:
  4215. Minimum allowed Transmit Power in s6.2 format.
  4216. In units of 0.25 dBm
  4217. <legal all>
  4218. */
  4219. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_OFFSET 0x00000000000000a0
  4220. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_LSB 48
  4221. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MSB 55
  4222. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MASK 0x00ff000000000000
  4223. /* Description TX_CHAIN_MASK
  4224. Chain mask to support up to 8 antennas.
  4225. <legal 1-255>
  4226. */
  4227. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_OFFSET 0x00000000000000a0
  4228. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_LSB 56
  4229. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MSB 63
  4230. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MASK 0xff00000000000000
  4231. /* Description RESERVED_3A
  4232. <legal 0>
  4233. */
  4234. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_OFFSET 0x00000000000000a8
  4235. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_LSB 0
  4236. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MSB 7
  4237. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MASK 0x00000000000000ff
  4238. /* Description SGI
  4239. Field only valid when pkt type is HT or VHT.For 11ax see
  4240. field Dot11ax_CP_LTF_size
  4241. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  4242. for HE
  4243. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  4244. for HE
  4245. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  4246. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  4247. <legal 0 - 3>
  4248. */
  4249. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_OFFSET 0x00000000000000a8
  4250. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_LSB 8
  4251. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MSB 9
  4252. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MASK 0x0000000000000300
  4253. /* Description RATE_MCS
  4254. For details, refer to MCS_TYPE description
  4255. Note: This is "rate" in case of 11a/11b
  4256. <legal all>
  4257. */
  4258. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_OFFSET 0x00000000000000a8
  4259. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_LSB 10
  4260. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MSB 13
  4261. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MASK 0x0000000000003c00
  4262. /* Description RESERVED_3B
  4263. <legal 0>
  4264. */
  4265. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_OFFSET 0x00000000000000a8
  4266. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_LSB 14
  4267. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MSB 15
  4268. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MASK 0x000000000000c000
  4269. /* Description TX_PWR_1
  4270. Default (desired) transmit parameter for the second chain
  4271. Transmit Power in s6.2 format.
  4272. In units of 0.25 dBm
  4273. Note that there is no Min value for this
  4274. <legal all>
  4275. */
  4276. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_OFFSET 0x00000000000000a8
  4277. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_LSB 16
  4278. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MSB 23
  4279. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MASK 0x0000000000ff0000
  4280. /* Description ALT_TX_PWR_1
  4281. Alternate (desired) transmit parameter for the second chain
  4282. Transmit Power in s6.2 format.
  4283. In units of 0.25 dBm
  4284. Note that there is no Min value for this
  4285. <legal all>
  4286. */
  4287. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_OFFSET 0x00000000000000a8
  4288. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_LSB 24
  4289. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MSB 31
  4290. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MASK 0x00000000ff000000
  4291. /* Description AGGREGATION
  4292. Field only valid in case of pkt_type == 11n
  4293. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  4294. this setting if the CBF response only contains a single
  4295. segment
  4296. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  4297. select this setting if the CBF response will contain two
  4298. or more segments
  4299. <legal 0-1>
  4300. */
  4301. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_OFFSET 0x00000000000000a8
  4302. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_LSB 32
  4303. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MSB 32
  4304. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MASK 0x0000000100000000
  4305. /* Description DOT11AX_BSS_COLOR_ID
  4306. BSS color of the nextwork to which this STA belongs.
  4307. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  4308. <legal all>
  4309. */
  4310. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000000000000a8
  4311. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_LSB 33
  4312. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MSB 38
  4313. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  4314. /* Description DOT11AX_SPATIAL_REUSE
  4315. This field is only valid for pkt_type == 11ax
  4316. Spatial re-use
  4317. <legal all>
  4318. */
  4319. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000000000000a8
  4320. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_LSB 39
  4321. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MSB 42
  4322. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  4323. /* Description DOT11AX_CP_LTF_SIZE
  4324. field is only valid for pkt_type == 11ax
  4325. Indicates the CP and HE-LTF type
  4326. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  4327. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  4328. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  4329. <enum 3 FourX_LTF_0_8CP_3_2CP>
  4330. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  4331. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  4332. In this scenario, Neither DCM nor STBC is applied to HE
  4333. data field.
  4334. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  4335. 0 = 1xLTF + 0.4 usec
  4336. 1 = 2xLTF + 0.4 usec
  4337. 2~3 = Reserved
  4338. <legal all>
  4339. */
  4340. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000000000000a8
  4341. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_LSB 43
  4342. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MSB 44
  4343. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  4344. /* Description DOT11AX_DCM
  4345. field is only valid for pkt_type == 11ax
  4346. Indicates whether dual sub-carrier modulation is applied
  4347. 0: No DCM
  4348. 1:DCM
  4349. <legal all>
  4350. */
  4351. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_OFFSET 0x00000000000000a8
  4352. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_LSB 45
  4353. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MSB 45
  4354. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MASK 0x0000200000000000
  4355. /* Description DOT11AX_DOPPLER_INDICATION
  4356. field is only valid for pkt_type == 11ax
  4357. 0: No Doppler support
  4358. 1: Doppler support
  4359. <legal all>
  4360. */
  4361. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000000000000a8
  4362. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_LSB 46
  4363. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MSB 46
  4364. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  4365. /* Description DOT11AX_SU_EXTENDED
  4366. field is only valid for pkt_type == 11ax OR pkt_type ==
  4367. 11be
  4368. When set, the 11ax or 11be frame is of the extended range
  4369. format
  4370. <legal all>
  4371. */
  4372. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_OFFSET 0x00000000000000a8
  4373. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_LSB 47
  4374. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MSB 47
  4375. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  4376. /* Description DOT11AX_MIN_PACKET_EXTENSION
  4377. field is only valid for pkt_type == 11ax OR pkt_type ==
  4378. 11be
  4379. The min packet extension duration for this user.
  4380. 0: no extension
  4381. 1: 8us
  4382. 2: 16 us
  4383. 3: 20 us (only for .11be)
  4384. <legal 0-3>
  4385. */
  4386. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000000000000a8
  4387. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  4388. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  4389. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  4390. /* Description DOT11AX_PE_NSS
  4391. Number of active spatial streams during packet extension.
  4392. <enum 0 1_spatial_stream>Single spatial stream
  4393. <enum 1 2_spatial_streams>2 spatial streams
  4394. <enum 2 3_spatial_streams>3 spatial streams
  4395. <enum 3 4_spatial_streams>4 spatial streams
  4396. <enum 4 5_spatial_streams>5 spatial streams
  4397. <enum 5 6_spatial_streams>6 spatial streams
  4398. <enum 6 7_spatial_streams>7 spatial streams
  4399. <enum 7 8_spatial_streams>8 spatial streams
  4400. */
  4401. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_OFFSET 0x00000000000000a8
  4402. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_LSB 50
  4403. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MSB 52
  4404. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MASK 0x001c000000000000
  4405. /* Description DOT11AX_PE_CONTENT
  4406. Content of packet extension. Valid for all 11ax packets
  4407. having packet extension
  4408. 0-he_ltf, 1-last_data_symbol
  4409. <legal all>
  4410. */
  4411. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_OFFSET 0x00000000000000a8
  4412. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_LSB 53
  4413. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MSB 53
  4414. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  4415. /* Description DOT11AX_PE_LTF_SIZE
  4416. LTF size to be used during packet extention. . This field
  4417. is valid for both FTM and non-FTM packets.
  4418. 0-1x
  4419. 1-2x (unsupported un HWK-1)
  4420. 2-4x (unsupported un HWK-1)
  4421. <legal all>
  4422. */
  4423. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000000000000a8
  4424. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_LSB 54
  4425. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MSB 55
  4426. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  4427. /* Description DOT11AX_CHAIN_CSD_EN
  4428. This field denotes whether to apply CSD on the preamble
  4429. and data portion of the packet. This field is valid for
  4430. all transmit packets
  4431. 0: disable per-chain csd
  4432. 1: enable per-chain csd
  4433. <legal all>
  4434. */
  4435. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000000000000a8
  4436. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_LSB 56
  4437. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MSB 56
  4438. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  4439. /* Description DOT11AX_PE_CHAIN_CSD_EN
  4440. This field denotes whether to apply CSD on the packet extension
  4441. portion of the packet. This field is valid for all 11ax
  4442. packets.
  4443. 0: disable per-chain csd
  4444. 1: enable per-chain csd
  4445. <legal all>
  4446. */
  4447. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000000000000a8
  4448. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  4449. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  4450. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  4451. /* Description DOT11AX_DL_UL_FLAG
  4452. field is only valid for pkt_type == 11ax
  4453. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  4454. <enum 1 DL_UL_FLAG_IS_UL>
  4455. <legal all>
  4456. */
  4457. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_OFFSET 0x00000000000000a8
  4458. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_LSB 58
  4459. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MSB 58
  4460. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  4461. /* Description RESERVED_4A
  4462. <legal 0>
  4463. */
  4464. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_OFFSET 0x00000000000000a8
  4465. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_LSB 59
  4466. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MSB 63
  4467. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MASK 0xf800000000000000
  4468. /* Description DOT11AX_EXT_RU_START_INDEX
  4469. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  4470. == 1
  4471. RU Number to which User is assigned
  4472. The RU numbering bitwidth is only enough to cover the 20MHz
  4473. BW that extended range allows
  4474. <legal 0-8>
  4475. */
  4476. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000000000000b0
  4477. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_LSB 0
  4478. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MSB 3
  4479. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  4480. /* Description DOT11AX_EXT_RU_SIZE
  4481. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  4482. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  4483. The size of the RU for this user.
  4484. In case of EHT duplicate transmissions, this field indicates
  4485. the width of the actual content before duplication, e.g.
  4486. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  4487. fields indicating 160 MHz and this field set to e-num 4
  4488. (RU_484).
  4489. <enum 0 RU_26>
  4490. <enum 1 RU_52>
  4491. <enum 2 RU_106>
  4492. <enum 3 RU_242>
  4493. <enum 4 RU_484>
  4494. <enum 5 RU_996>
  4495. <enum 6 RU_1992>
  4496. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  4497. bandwidth
  4498. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  4499. packet bandwidth
  4500. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  4501. packet bandwidth
  4502. <enum 10 RU_MULTI_LARGE> DO NOT USE
  4503. <enum 11 RU_78> DO NOT USE
  4504. <enum 12 RU_132> DO NOT USE
  4505. <legal 0-12>
  4506. */
  4507. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000000000000b0
  4508. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_LSB 4
  4509. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MSB 7
  4510. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  4511. /* Description EHT_DUPLICATE_MODE
  4512. Field only valid for pkt_type == 11be
  4513. Indicates EHT duplicate modulation
  4514. <enum 0 eht_no_duplicate>
  4515. <enum 1 eht_2x_duplicate>
  4516. <enum 2 eht_4x_duplicate>
  4517. <legal 0-2>
  4518. */
  4519. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_OFFSET 0x00000000000000b0
  4520. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_LSB 8
  4521. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MSB 9
  4522. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  4523. /* Description HE_SIGB_DCM
  4524. Indicates whether dual sub-carrier modulation is applied
  4525. to EHT-SIG
  4526. <legal all>
  4527. */
  4528. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_OFFSET 0x00000000000000b0
  4529. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_LSB 10
  4530. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MSB 10
  4531. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MASK 0x0000000000000400
  4532. /* Description HE_SIGB_0_MCS
  4533. Indicates the MCS of EHT-SIG
  4534. For details, refer to MCS_TYPE description
  4535. <legal all>
  4536. */
  4537. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_OFFSET 0x00000000000000b0
  4538. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_LSB 11
  4539. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MSB 13
  4540. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MASK 0x0000000000003800
  4541. /* Description NUM_HE_SIGB_SYM
  4542. Indicates the number of EHT-SIG symbols
  4543. This field is 0-based with 0 indicating that 1 eht_sig symbol
  4544. needs to be transmitted.
  4545. <legal all>
  4546. */
  4547. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_OFFSET 0x00000000000000b0
  4548. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_LSB 14
  4549. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MSB 18
  4550. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  4551. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  4552. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  4553. HT Control for sync MLO response
  4554. <enum 1 reqd_resp_time_src_is_FW>
  4555. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  4556. to response
  4557. <legal all>
  4558. */
  4559. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000000000000b0
  4560. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  4561. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  4562. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  4563. /* Description RESERVED_5A
  4564. <legal 0>
  4565. */
  4566. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_OFFSET 0x00000000000000b0
  4567. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_LSB 20
  4568. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MSB 25
  4569. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MASK 0x0000000003f00000
  4570. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  4571. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  4572. to pass on to PDG
  4573. <legal 0-29>
  4574. */
  4575. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000000000000b0
  4576. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  4577. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  4578. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  4579. /* Description MLO_STA_ID_DETAILS_RX
  4580. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  4581. on to PDG
  4582. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  4583. from address search.
  4584. See definition of mlo_sta_id_details.
  4585. */
  4586. /* Description NSTR_MLO_STA_ID
  4587. ID of peer participating in non-STR MLO
  4588. */
  4589. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000000000000b0
  4590. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  4591. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  4592. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  4593. /* Description BLOCK_SELF_ML_SYNC
  4594. Only valid for TX
  4595. When set, this provides an indication to block the peer
  4596. for self-link.
  4597. */
  4598. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000000000b0
  4599. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  4600. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  4601. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  4602. /* Description BLOCK_PARTNER_ML_SYNC
  4603. Only valid for TX
  4604. When set, this provides an indication to block the peer
  4605. for partner links.
  4606. */
  4607. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000000000b0
  4608. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  4609. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  4610. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  4611. /* Description NSTR_MLO_STA_ID_VALID
  4612. All the fields in this TLV are valid only if this bit is
  4613. set.
  4614. */
  4615. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000000000b0
  4616. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  4617. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  4618. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  4619. /* Description RESERVED_0A
  4620. <legal 0>
  4621. */
  4622. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000000000000b0
  4623. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  4624. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  4625. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  4626. /* Description REQUIRED_RESPONSE_TIME
  4627. When non-zero, indicates that PDG shall pad the response
  4628. transmission to the indicated duration (in us)
  4629. */
  4630. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b0
  4631. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_LSB 48
  4632. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MSB 59
  4633. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  4634. /* Description DOT11BE_PARAMS_PLACEHOLDER
  4635. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  4636. */
  4637. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000000000000b0
  4638. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  4639. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  4640. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  4641. /* Description R2R_HW_RESPONSE_TX_DURATION
  4642. Field only valid in case of Response_to_response set to
  4643. SU_BA or MU_BA
  4644. The amount of time the transmission of the HW response to
  4645. response will take (in us)
  4646. Used for coex as well as e.g. for sync MLO to align R2R
  4647. times on the medium across multiple channels
  4648. This field also represents the 'alt_hw_response_tx_duration'.
  4649. Note that this implies that no different duration can be
  4650. programmed for the default and alt setting. SW should program
  4651. the worst case value in the RXPCU table in case they are
  4652. different.
  4653. <legal all>
  4654. */
  4655. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_OFFSET 0x00000000000000b8
  4656. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_LSB 0
  4657. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MSB 15
  4658. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MASK 0x000000000000ffff
  4659. /* Description R2R_RX_DURATION_FIELD
  4660. Field only valid in case of Response_to_response set to
  4661. SU_BA or MU_BA
  4662. The duration field assumed to have been received in the
  4663. response frame and what will be used in the duration field
  4664. calculation for the response_to_response_Frame
  4665. PDG uses this field to calculate what the duration field
  4666. value should be in the response frame.
  4667. This is returned to the TXPCU
  4668. Note that if PDG has protection in place to wrap around...
  4669. I the actual transmit time is larger then the value programmed
  4670. here, PDG HW will set the duration field in the response
  4671. to response frame to zero.
  4672. This field is used in 11ah mode as well
  4673. <legal all>
  4674. */
  4675. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_OFFSET 0x00000000000000b8
  4676. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_LSB 16
  4677. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MSB 31
  4678. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MASK 0x00000000ffff0000
  4679. /* Description R2R_GROUP_ID
  4680. Field only valid in case of Response_to_response set to
  4681. SU_BA or MU_BA
  4682. Specifies the Group ID to be used in the response to response
  4683. frame.
  4684. <legal all>
  4685. */
  4686. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_OFFSET 0x00000000000000b8
  4687. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_LSB 32
  4688. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MSB 37
  4689. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MASK 0x0000003f00000000
  4690. /* Description R2R_RESPONSE_FRAME_TYPE
  4691. Field only valid in case of Response_to_response set to
  4692. SU_BA or MU_BA
  4693. Response_frame_type to be indicated in the PDG_RESPONSE
  4694. TLV for the response to response frame.
  4695. Coex related field
  4696. <enum 0 Non_11ah_ACK >
  4697. <enum 1 Non_11ah_BA > also used for M-BA
  4698. <enum 2 Non_11ah_CTS >
  4699. <enum 3 AH_NDP_CTS>
  4700. <enum 4 AH_NDP_ACK>
  4701. <enum 5 AH_NDP_BA>
  4702. <enum 6 AH_NDP_MOD_ACK>
  4703. <enum 7 AH_Normal_ACK>
  4704. <enum 8 AH_Normal_BA>
  4705. <enum 9 RTT_ACK>
  4706. <enum 10 CBF_RESPONSE>
  4707. <enum 11 MBA> This can be a multi STA BA or multi TID BA
  4708. <enum 12 Ranging_NDP>
  4709. <enum 13 LMR_RESPONSE> NDP followed by LMR response for
  4710. Rx ranging NDPA followed by NDP
  4711. <legal 0-12>
  4712. */
  4713. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_OFFSET 0x00000000000000b8
  4714. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_LSB 38
  4715. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MSB 41
  4716. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MASK 0x000003c000000000
  4717. /* Description R2R_STA_PARTIAL_AID
  4718. Field only valid in case of Response_to_response set to
  4719. SU_BA or MU_BA
  4720. Specifies the partial AID of the response to response frame
  4721. in case it is transmitted at VHT rates.
  4722. <legal all>
  4723. */
  4724. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_OFFSET 0x00000000000000b8
  4725. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_LSB 42
  4726. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MSB 52
  4727. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MASK 0x001ffc0000000000
  4728. /* Description USE_ADDRESS_FIELDS_FOR_PROTECTION
  4729. When set, the protection_frame_ad1/ad2 fields are to be
  4730. used for RTS/CTS2S frames
  4731. When set and not disabled through a TXPCU register bit,
  4732. the protection_frame_ad2* fields are also copied to the
  4733. tx_ad2* fields of the 'EXPECTED_RESPONSE' TLV (i.e. the
  4734. expected response Rx AD1) to RXPCU for all frames.
  4735. <legal all>
  4736. */
  4737. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_OFFSET 0x00000000000000b8
  4738. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_LSB 53
  4739. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MSB 53
  4740. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MASK 0x0020000000000000
  4741. /* Description R2R_SET_REQUIRED_RESPONSE_TIME
  4742. Field only valid in case of response to response
  4743. When set, TXPCU shall copy the R2R_Hw_response_tx_duration
  4744. field and pass it on to PDG in field required_response_time
  4745. in 'PDG_RESPONSE.'
  4746. This allows SW to force an R2R time e.g. in case of sync
  4747. MLO, making sure that the R2R times on the medium for multiple
  4748. links are aligned.
  4749. <legal all>
  4750. */
  4751. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b8
  4752. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_LSB 54
  4753. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MSB 54
  4754. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MASK 0x0040000000000000
  4755. /* Description RESERVED_29A
  4756. <legal 0>
  4757. */
  4758. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_OFFSET 0x00000000000000b8
  4759. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_LSB 55
  4760. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MSB 57
  4761. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MASK 0x0380000000000000
  4762. /* Description R2R_BW20_ACTIVE_CHANNEL
  4763. Field only valid for 20 BW
  4764. NOTE: This field is also known as R2R_active_channel_pattern_0
  4765. in case punctured transmission is enabled.
  4766. This field indicates the active frequency band when the
  4767. initial trigger frame transmission was in 20 MHz
  4768. <legal all>
  4769. */
  4770. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8
  4771. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_LSB 58
  4772. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MSB 60
  4773. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MASK 0x1c00000000000000
  4774. /* Description R2R_BW40_ACTIVE_CHANNEL
  4775. Field only valid for 40 BW
  4776. NOTE: This field is also known as R2R_active_channel_pattern_1
  4777. in case punctured transmission is enabled.
  4778. This field indicates the active frequency band when the
  4779. initial trigger frame transmission was in 40 MHz
  4780. <legal all>
  4781. */
  4782. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8
  4783. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_LSB 61
  4784. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MSB 63
  4785. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MASK 0xe000000000000000
  4786. /* Description R2R_BW80_ACTIVE_CHANNEL
  4787. Field only valid for 80 BW
  4788. NOTE: This field is also known as R2R_active_channel_pattern_2
  4789. in case punctured transmission is enabled.
  4790. This field indicates the active frequency band when the
  4791. initial trigger frame transmission was in 80 MHz
  4792. <legal all>
  4793. */
  4794. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4795. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_LSB 0
  4796. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MSB 2
  4797. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MASK 0x0000000000000007
  4798. /* Description R2R_BW160_ACTIVE_CHANNEL
  4799. Field only valid for 160 BW
  4800. NOTE: This field is also known as R2R_active_channel_pattern_3
  4801. in case punctured transmission is enabled.
  4802. This field indicates the active frequency band when the
  4803. initial trigger frame transmission was in 160 MHz
  4804. <legal all>
  4805. */
  4806. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4807. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_LSB 3
  4808. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MSB 5
  4809. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MASK 0x0000000000000038
  4810. /* Description R2R_BW240_ACTIVE_CHANNEL
  4811. Field only valid for 240 BW
  4812. NOTE: This field is also known as R2R_active_channel_pattern_4
  4813. in case punctured transmission is enabled.
  4814. This field indicates the active frequency band when the
  4815. initial trigger frame transmission was in 240 MHz
  4816. <legal all>
  4817. */
  4818. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4819. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_LSB 6
  4820. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MSB 8
  4821. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MASK 0x00000000000001c0
  4822. /* Description R2R_BW320_ACTIVE_CHANNEL
  4823. Field only valid for 320 BW
  4824. NOTE: This field is also known as R2R_active_channel_pattern_5
  4825. in case punctured transmission is enabled.
  4826. This field indicates the active frequency band when the
  4827. initial trigger frame transmission was in 320 MHz
  4828. <legal all>
  4829. */
  4830. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4831. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_LSB 9
  4832. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MSB 11
  4833. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MASK 0x0000000000000e00
  4834. /* Description R2R_BW20
  4835. The BW for the response to response frame when the initial
  4836. trigger frame transmission was in 20 MHz
  4837. NOTE: This field is also known as R2R_pattern_0 in case
  4838. punctured transmission is enabled.
  4839. <enum 0 20_mhz>20 Mhz BW
  4840. <enum 1 40_mhz>40 Mhz BW
  4841. <enum 2 80_mhz>80 Mhz BW
  4842. <enum 3 160_mhz>160 Mhz BW
  4843. <enum 4 320_mhz>320 Mhz BW
  4844. <enum 5 240_mhz>240 Mhz BW
  4845. */
  4846. #define PCU_PPDU_SETUP_INIT_R2R_BW20_OFFSET 0x00000000000000c0
  4847. #define PCU_PPDU_SETUP_INIT_R2R_BW20_LSB 12
  4848. #define PCU_PPDU_SETUP_INIT_R2R_BW20_MSB 14
  4849. #define PCU_PPDU_SETUP_INIT_R2R_BW20_MASK 0x0000000000007000
  4850. /* Description R2R_BW40
  4851. The BW for the response to response frame when the initial
  4852. trigger frame transmission was in 40 MHz
  4853. NOTE: This field is also known as R2R_pattern_1 in case
  4854. punctured transmission is enabled.
  4855. <enum 0 20_mhz>20 Mhz BW
  4856. <enum 1 40_mhz>40 Mhz BW
  4857. <enum 2 80_mhz>80 Mhz BW
  4858. <enum 3 160_mhz>160 Mhz BW
  4859. <enum 4 320_mhz>320 Mhz BW
  4860. <enum 5 240_mhz>240 Mhz BW
  4861. */
  4862. #define PCU_PPDU_SETUP_INIT_R2R_BW40_OFFSET 0x00000000000000c0
  4863. #define PCU_PPDU_SETUP_INIT_R2R_BW40_LSB 15
  4864. #define PCU_PPDU_SETUP_INIT_R2R_BW40_MSB 17
  4865. #define PCU_PPDU_SETUP_INIT_R2R_BW40_MASK 0x0000000000038000
  4866. /* Description R2R_BW80
  4867. The BW for the response to response frame when the initial
  4868. trigger frame transmission was in 80 MHz
  4869. NOTE: This field is also known as R2R_pattern_2 in case
  4870. punctured transmission is enabled.
  4871. <enum 0 20_mhz>20 Mhz BW
  4872. <enum 1 40_mhz>40 Mhz BW
  4873. <enum 2 80_mhz>80 Mhz BW
  4874. <enum 3 160_mhz>160 Mhz BW
  4875. <enum 4 320_mhz>320 Mhz BW
  4876. <enum 5 240_mhz>240 Mhz BW
  4877. */
  4878. #define PCU_PPDU_SETUP_INIT_R2R_BW80_OFFSET 0x00000000000000c0
  4879. #define PCU_PPDU_SETUP_INIT_R2R_BW80_LSB 18
  4880. #define PCU_PPDU_SETUP_INIT_R2R_BW80_MSB 20
  4881. #define PCU_PPDU_SETUP_INIT_R2R_BW80_MASK 0x00000000001c0000
  4882. /* Description R2R_BW160
  4883. The BW for the response to response frame when the initial
  4884. trigger frame transmission was in 160 MHz
  4885. NOTE: This field is also known as R2R_pattern_3 in case
  4886. punctured transmission is enabled.
  4887. <enum 0 20_mhz>20 Mhz BW
  4888. <enum 1 40_mhz>40 Mhz BW
  4889. <enum 2 80_mhz>80 Mhz BW
  4890. <enum 3 160_mhz>160 Mhz BW
  4891. <enum 4 320_mhz>320 Mhz BW
  4892. <enum 5 240_mhz>240 Mhz BW
  4893. */
  4894. #define PCU_PPDU_SETUP_INIT_R2R_BW160_OFFSET 0x00000000000000c0
  4895. #define PCU_PPDU_SETUP_INIT_R2R_BW160_LSB 21
  4896. #define PCU_PPDU_SETUP_INIT_R2R_BW160_MSB 23
  4897. #define PCU_PPDU_SETUP_INIT_R2R_BW160_MASK 0x0000000000e00000
  4898. /* Description R2R_BW240
  4899. The BW for the response to response frame when the initial
  4900. trigger frame transmission was in 240 MHz
  4901. NOTE: This field is also known as R2R_pattern_4 in case
  4902. punctured transmission is enabled.
  4903. <enum 0 20_mhz>20 Mhz BW
  4904. <enum 1 40_mhz>40 Mhz BW
  4905. <enum 2 80_mhz>80 Mhz BW
  4906. <enum 3 160_mhz>160 Mhz BW
  4907. <enum 4 320_mhz>320 Mhz BW
  4908. <enum 5 240_mhz>240 Mhz BW
  4909. */
  4910. #define PCU_PPDU_SETUP_INIT_R2R_BW240_OFFSET 0x00000000000000c0
  4911. #define PCU_PPDU_SETUP_INIT_R2R_BW240_LSB 24
  4912. #define PCU_PPDU_SETUP_INIT_R2R_BW240_MSB 26
  4913. #define PCU_PPDU_SETUP_INIT_R2R_BW240_MASK 0x0000000007000000
  4914. /* Description R2R_BW320
  4915. The BW for the response to response frame when the initial
  4916. trigger frame transmission was in 320 MHz
  4917. NOTE: This field is also known as R2R_pattern_5 in case
  4918. punctured transmission is enabled.
  4919. <enum 0 20_mhz>20 Mhz BW
  4920. <enum 1 40_mhz>40 Mhz BW
  4921. <enum 2 80_mhz>80 Mhz BW
  4922. <enum 3 160_mhz>160 Mhz BW
  4923. <enum 4 320_mhz>320 Mhz BW
  4924. <enum 5 240_mhz>240 Mhz BW
  4925. */
  4926. #define PCU_PPDU_SETUP_INIT_R2R_BW320_OFFSET 0x00000000000000c0
  4927. #define PCU_PPDU_SETUP_INIT_R2R_BW320_LSB 27
  4928. #define PCU_PPDU_SETUP_INIT_R2R_BW320_MSB 29
  4929. #define PCU_PPDU_SETUP_INIT_R2R_BW320_MASK 0x0000000038000000
  4930. /* Description RESERVED_30A
  4931. <legal 0>
  4932. */
  4933. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_OFFSET 0x00000000000000c0
  4934. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_LSB 30
  4935. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MSB 31
  4936. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MASK 0x00000000c0000000
  4937. /* Description MU_RESPONSE_EXPECTED_BITMAP_31_0
  4938. Field only valid in case of MU transmission and a response
  4939. from other or more then just user0 is expected.
  4940. Note that this implies that for all legacy SU exchanges,
  4941. or legacy MU-MIMO where only user 0 can get a response,
  4942. this field does not need to be programmed by SW. All existing
  4943. programming remains backwards compatible.
  4944. Bit 0 represents user 0
  4945. Bit 1 represents user 1
  4946. ...
  4947. When set, a response from this user is expected, and TXPCU
  4948. shall generate the 'tx_fes_status_user_response' TLV for
  4949. this user
  4950. Note that the number of bits set in bitmap fields 0 - 36
  4951. (including next field), shall always be equal or greater
  4952. then the number indicated in field: Required_UL_MU_resp_user_count
  4953. <legal all>
  4954. */
  4955. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_OFFSET 0x00000000000000c0
  4956. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_LSB 32
  4957. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MSB 63
  4958. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MASK 0xffffffff00000000
  4959. /* Description MU_RESPONSE_EXPECTED_BITMAP_36_32
  4960. Field only valid in case of MU transmission and a response
  4961. from other or more then just user0 is expected.
  4962. Note that this implies that for all legacy SU exchanges,
  4963. or legacy MU-MIMO where only user 0 can get a response,
  4964. this field does not need to be programmed by SW. All existing
  4965. programming remains backwards compatible.
  4966. Bit 0 represents user 32
  4967. Bit 1 represents user 33
  4968. ...
  4969. When set, a response from this user is expected, and TXPCU
  4970. shall generate the 'tx_fes_status_user_response' TLV for
  4971. this user
  4972. Note that the number of bits set in bitmap fields 0 - 36
  4973. (including previous field), shall always be equal or greater
  4974. then the number indicated in field: Required_UL_MU_resp_user_count
  4975. <legal all>
  4976. */
  4977. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_OFFSET 0x00000000000000c8
  4978. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_LSB 0
  4979. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MSB 4
  4980. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MASK 0x000000000000001f
  4981. /* Description MU_EXPECTED_RESPONSE_CBF_COUNT
  4982. Field only valid when Response_type == MU_CBF_expected
  4983. The number of STAs that are expected to send a CBF back
  4984. Note that the actual amount could be smaller....
  4985. <legal all>
  4986. */
  4987. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_OFFSET 0x00000000000000c8
  4988. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_LSB 5
  4989. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MSB 10
  4990. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MASK 0x00000000000007e0
  4991. /* Description MU_EXPECTED_RESPONSE_STA_COUNT
  4992. SW shall program this field if the number of STAs that are
  4993. expected to send something (ACK, DATA, BA, CBF, etc...)
  4994. back is 2 or larger..
  4995. The number of STAs that are expected to send a response
  4996. back.
  4997. Note that the actual amount could be smaller....
  4998. <legal all>
  4999. */
  5000. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_OFFSET 0x00000000000000c8
  5001. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_LSB 11
  5002. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MSB 16
  5003. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MASK 0x000000000001f800
  5004. /* Description TRANSMIT_INCLUDES_MULTIDESTINATION
  5005. Used by TXPCU
  5006. When set, the MD (Multi Destination) feature is used for
  5007. this transmission. Either for real multi destination STA
  5008. transmissions or Multi TID transmissions.
  5009. Used by TXPCU to know when it can start pre-fetching data
  5010. in order to do BW constrained frame drops.
  5011. <legal all>
  5012. */
  5013. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_OFFSET 0x00000000000000c8
  5014. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_LSB 17
  5015. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MSB 17
  5016. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MASK 0x0000000000020000
  5017. /* Description INSERT_PREV_TX_START_TIMING_INFO
  5018. When set, TXPCU will insert the value in TXPCU register "prev_phy_tx_start_transmit_time"
  5019. in the transmit frame at the byte location indicated by
  5020. field tx_start_transmit_time_byte_offset
  5021. <legal all>
  5022. */
  5023. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8
  5024. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_LSB 18
  5025. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MSB 18
  5026. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MASK 0x0000000000040000
  5027. /* Description INSERT_CURRENT_TX_START_TIMING_INFO
  5028. When set, TXPCU will insert the value in TXPCU register "current_phy_tx_start_transmit_time"
  5029. in the transmit frame at the byte location indicated by
  5030. field tx_start_transmit_time_byte_offset
  5031. <legal all>
  5032. */
  5033. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8
  5034. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_LSB 19
  5035. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MSB 19
  5036. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MASK 0x0000000000080000
  5037. /* Description TX_START_TRANSMIT_TIME_BYTE_OFFSET
  5038. Field only valid when insert_prev_tx_start_timing_info or
  5039. insert_current_tx_start_timing_info is set.
  5040. Start byte offset where the 'start_time' needs to be overwritten
  5041. in the frame
  5042. <legal all>
  5043. */
  5044. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_OFFSET 0x00000000000000c8
  5045. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_LSB 20
  5046. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MSB 31
  5047. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MASK 0x00000000fff00000
  5048. /* Description PROTECTION_FRAME_AD1_31_0
  5049. Field only valid when use_address_fields_for_protection
  5050. is set
  5051. The Least Significant 4 bytes of the Protection Frame MAC
  5052. Address AD1
  5053. <legal all>
  5054. */
  5055. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_OFFSET 0x00000000000000c8
  5056. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_LSB 32
  5057. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MSB 63
  5058. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MASK 0xffffffff00000000
  5059. /* Description PROTECTION_FRAME_AD1_47_32
  5060. Field only valid when use_address_fields_for_protection
  5061. is set
  5062. The 2 most significant bytes of the Protection Frame MAC
  5063. Address AD1
  5064. <legal all>
  5065. */
  5066. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_OFFSET 0x00000000000000d0
  5067. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_LSB 0
  5068. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MSB 15
  5069. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MASK 0x000000000000ffff
  5070. /* Description PROTECTION_FRAME_AD2_15_0
  5071. Field only valid when use_address_fields_for_protection
  5072. is set
  5073. The Least Significant 2 bytes of the MAC Address AD2
  5074. <legal all>
  5075. */
  5076. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_OFFSET 0x00000000000000d0
  5077. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_LSB 16
  5078. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MSB 31
  5079. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MASK 0x00000000ffff0000
  5080. /* Description PROTECTION_FRAME_AD2_47_16
  5081. Field only valid when use_address_fields_for_protection
  5082. is set
  5083. The 4 most significant bytes of the MAC Address AD2
  5084. <legal all>
  5085. */
  5086. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_OFFSET 0x00000000000000d0
  5087. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_LSB 32
  5088. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MSB 63
  5089. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MASK 0xffffffff00000000
  5090. /* Description DYNAMIC_MEDIUM_PROT_THRESHOLD
  5091. Threshold to enable the dynamic medium protection feature
  5092. in terms of PPDU duration in us or PSDU length in bytes
  5093. This is set to zero to disable the dynamic medium protection
  5094. feature.
  5095. <legal all>
  5096. */
  5097. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_OFFSET 0x00000000000000d8
  5098. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_LSB 0
  5099. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MSB 23
  5100. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MASK 0x0000000000ffffff
  5101. /* Description DYNAMIC_MEDIUM_PROT_TYPE
  5102. <enum 0 dyn_medium_prot_byte> dynamic_medium_prot_threshold
  5103. indicates PSDU length in bytes.
  5104. <enum 1 dyn_medium_prot_us>
  5105. dynamic_medium_prot_threshold indicates PPDU duration in
  5106. us.
  5107. <legal all>
  5108. */
  5109. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_OFFSET 0x00000000000000d8
  5110. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_LSB 24
  5111. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MSB 24
  5112. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MASK 0x0000000001000000
  5113. /* Description RESERVED_54A
  5114. <legal 0>
  5115. */
  5116. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_OFFSET 0x00000000000000d8
  5117. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_LSB 25
  5118. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MSB 31
  5119. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MASK 0x00000000fe000000
  5120. /* Description PROTECTION_FRAME_AD3_31_0
  5121. Field only valid when use_address_fields_for_protection
  5122. is set
  5123. The least significant 4 bytes of the Protection Frame MAC
  5124. Address AD3
  5125. <legal all>
  5126. */
  5127. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_OFFSET 0x00000000000000d8
  5128. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_LSB 32
  5129. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MSB 63
  5130. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MASK 0xffffffff00000000
  5131. /* Description PROTECTION_FRAME_AD3_47_32
  5132. Field only valid when use_address_fields_for_protection
  5133. is set
  5134. The 2 most significant bytes of the Protection Frame MAC
  5135. Address AD3
  5136. <legal all>
  5137. */
  5138. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_OFFSET 0x00000000000000e0
  5139. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_LSB 0
  5140. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MSB 15
  5141. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MASK 0x000000000000ffff
  5142. /* Description PROTECTION_FRAME_AD4_15_0
  5143. Field only valid when use_address_fields_for_protection
  5144. is set
  5145. The least significant 2 bytes of the Protection Frame MAC
  5146. Address AD4
  5147. <legal all>
  5148. */
  5149. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_OFFSET 0x00000000000000e0
  5150. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_LSB 16
  5151. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MSB 31
  5152. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MASK 0x00000000ffff0000
  5153. /* Description PROTECTION_FRAME_AD4_47_16
  5154. Field only valid when use_address_fields_for_protection
  5155. is set
  5156. The 4 most significant bytes of the Protection Frame MAC
  5157. Address AD4
  5158. <legal all>
  5159. */
  5160. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_OFFSET 0x00000000000000e0
  5161. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_LSB 32
  5162. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MSB 63
  5163. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MASK 0xffffffff00000000
  5164. #endif // PCU_PPDU_SETUP_INIT