rx_msdu_desc_info.h 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840
  1. /*
  2. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _RX_MSDU_DESC_INFO_H_
  17. #define _RX_MSDU_DESC_INFO_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. // ################ START SUMMARY #################
  21. //
  22. // Dword Fields
  23. // 0 first_msdu_in_mpdu_flag[0], last_msdu_in_mpdu_flag[1], msdu_continuation[2], msdu_length[16:3], reo_destination_indication[21:17], msdu_drop[22], sa_is_valid[23], sa_idx_timeout[24], da_is_valid[25], da_is_mcbc[26], da_idx_timeout[27], l3_header_padding_msb[28], tcp_udp_chksum_fail[29], ip_chksum_fail[30], raw_mpdu[31]
  24. // 1 sa_idx_or_sw_peer_id_14_0[14:0], mpdu_ast_idx_or_sw_peer_id_14_0[29:15], fr_ds[30], to_ds[31]
  25. //
  26. // ################ END SUMMARY #################
  27. #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 2
  28. struct rx_msdu_desc_info {
  29. uint32_t first_msdu_in_mpdu_flag : 1, //[0]
  30. last_msdu_in_mpdu_flag : 1, //[1]
  31. msdu_continuation : 1, //[2]
  32. msdu_length : 14, //[16:3]
  33. reo_destination_indication : 5, //[21:17]
  34. msdu_drop : 1, //[22]
  35. sa_is_valid : 1, //[23]
  36. sa_idx_timeout : 1, //[24]
  37. da_is_valid : 1, //[25]
  38. da_is_mcbc : 1, //[26]
  39. da_idx_timeout : 1, //[27]
  40. l3_header_padding_msb : 1, //[28]
  41. tcp_udp_chksum_fail : 1, //[29]
  42. ip_chksum_fail : 1, //[30]
  43. raw_mpdu : 1; //[31]
  44. uint32_t sa_idx_or_sw_peer_id_14_0 : 15, //[14:0]
  45. mpdu_ast_idx_or_sw_peer_id_14_0 : 15, //[29:15]
  46. fr_ds : 1, //[30]
  47. to_ds : 1; //[31]
  48. };
  49. /*
  50. first_msdu_in_mpdu_flag
  51. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  52. over multiple buffers, this field will be valid in the Last
  53. buffer used by the MSDU
  54. <enum 0 Not_first_msdu> This is not the first MSDU in
  55. the MPDU.
  56. <enum 1 first_msdu> This MSDU is the first one in the
  57. MPDU.
  58. <legal all>
  59. last_msdu_in_mpdu_flag
  60. Consumer: WBM/REO/SW/FW
  61. Producer: RXDMA
  62. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  63. over multiple buffers, this field will be valid in the Last
  64. buffer used by the MSDU
  65. <enum 0 Not_last_msdu> There are more MSDUs linked to
  66. this MSDU that belongs to this MPDU
  67. <enum 1 Last_msdu> this MSDU is the last one in the
  68. MPDU. This setting is only allowed in combination with
  69. 'Msdu_continuation' set to 0. This implies that when an msdu
  70. is spread out over multiple buffers and thus
  71. msdu_continuation is set, only for the very last buffer of
  72. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  73. When both first_msdu_in_mpdu_flag and
  74. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  75. belongs to only contains a single MSDU.
  76. <legal all>
  77. msdu_continuation
  78. When set, this MSDU buffer was not able to hold the
  79. entire MSDU. The next buffer will therefor contain
  80. additional information related to this MSDU.
  81. <legal all>
  82. msdu_length
  83. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  84. over multiple buffers, this field will be valid in the First
  85. buffer used by MSDU.
  86. Full MSDU length in bytes after decapsulation.
  87. This field is still valid for MPDU frames without
  88. A-MSDU. It still represents MSDU length after decapsulation
  89. Or in case of RAW MPDUs, it indicates the length of the
  90. entire MPDU (without FCS field)
  91. <legal all>
  92. reo_destination_indication
  93. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  94. over multiple buffers, this field will be valid in the Last
  95. buffer used by the MSDU
  96. The ID of the REO exit ring where the MSDU frame shall
  97. push after (MPDU level) reordering has finished.
  98. <enum 0 reo_destination_tcl> Reo will push the frame
  99. into the REO2TCL ring
  100. <enum 1 reo_destination_sw1> Reo will push the frame
  101. into the REO2SW1 ring
  102. <enum 2 reo_destination_sw2> Reo will push the frame
  103. into the REO2SW2 ring
  104. <enum 3 reo_destination_sw3> Reo will push the frame
  105. into the REO2SW3 ring
  106. <enum 4 reo_destination_sw4> Reo will push the frame
  107. into the REO2SW4 ring
  108. <enum 5 reo_destination_release> Reo will push the frame
  109. into the REO_release ring
  110. <enum 6 reo_destination_fw> Reo will push the frame into
  111. the REO2FW ring
  112. <enum 7 reo_destination_sw5> Reo will push the frame
  113. into the REO2SW5 ring (REO remaps this in chips without
  114. REO2SW5 ring, e.g. Pine)
  115. <enum 8 reo_destination_sw6> Reo will push the frame
  116. into the REO2SW6 ring (REO remaps this in chips without
  117. REO2SW6 ring, e.g. Pine)
  118. <enum 9 reo_destination_9> REO remaps this <enum 10
  119. reo_destination_10> REO remaps this
  120. <enum 11 reo_destination_11> REO remaps this
  121. <enum 12 reo_destination_12> REO remaps this <enum 13
  122. reo_destination_13> REO remaps this
  123. <enum 14 reo_destination_14> REO remaps this
  124. <enum 15 reo_destination_15> REO remaps this
  125. <enum 16 reo_destination_16> REO remaps this
  126. <enum 17 reo_destination_17> REO remaps this
  127. <enum 18 reo_destination_18> REO remaps this
  128. <enum 19 reo_destination_19> REO remaps this
  129. <enum 20 reo_destination_20> REO remaps this
  130. <enum 21 reo_destination_21> REO remaps this
  131. <enum 22 reo_destination_22> REO remaps this
  132. <enum 23 reo_destination_23> REO remaps this
  133. <enum 24 reo_destination_24> REO remaps this
  134. <enum 25 reo_destination_25> REO remaps this
  135. <enum 26 reo_destination_26> REO remaps this
  136. <enum 27 reo_destination_27> REO remaps this
  137. <enum 28 reo_destination_28> REO remaps this
  138. <enum 29 reo_destination_29> REO remaps this
  139. <enum 30 reo_destination_30> REO remaps this
  140. <enum 31 reo_destination_31> REO remaps this
  141. <legal all>
  142. msdu_drop
  143. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  144. over multiple buffers, this field will be valid in the Last
  145. buffer used by the MSDU
  146. When set, REO shall drop this MSDU and not forward it to
  147. any other ring...
  148. <legal all>
  149. sa_is_valid
  150. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  151. over multiple buffers, this field will be valid in the Last
  152. buffer used by the MSDU
  153. Indicates that OLE found a valid SA entry for this MSDU
  154. <legal all>
  155. sa_idx_timeout
  156. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  157. over multiple buffers, this field will be valid in the Last
  158. buffer used by the MSDU
  159. Indicates an unsuccessful MAC source address search due
  160. to the expiring of the search timer for this MSDU
  161. <legal all>
  162. da_is_valid
  163. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  164. over multiple buffers, this field will be valid in the Last
  165. buffer used by the MSDU
  166. Indicates that OLE found a valid DA entry for this MSDU
  167. <legal all>
  168. da_is_mcbc
  169. Field Only valid if da_is_valid is set
  170. Indicates the DA address was a Multicast of Broadcast
  171. address for this MSDU
  172. <legal all>
  173. da_idx_timeout
  174. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  175. over multiple buffers, this field will be valid in the Last
  176. buffer used by the MSDU
  177. Indicates an unsuccessful MAC destination address search
  178. due to the expiring of the search timer for this MSDU
  179. <legal all>
  180. l3_header_padding_msb
  181. Passed on from 'RX_MSDU_END' TLV (only the MSB is
  182. reported as the LSB is always zero)
  183. Number of bytes padded to make sure that the L3 header
  184. will always start of a Dword boundary
  185. <legal all>
  186. tcp_udp_chksum_fail
  187. Passed on from 'RX_ATTENTION' TLV
  188. Indicates that the computed checksum did not match the
  189. checksum in the TCP/UDP header.
  190. <legal all>
  191. ip_chksum_fail
  192. Passed on from 'RX_ATTENTION' TLV
  193. Indicates that the computed checksum did not match the
  194. checksum in the IP header.
  195. <legal all>
  196. raw_mpdu
  197. Passed on from 'RX_MPDU_INFO' structure in
  198. 'RX_MPDU_START' TLV
  199. Set to 1 by RXOLE when it has not performed any 802.11
  200. to Ethernet/Natvie WiFi header conversion on this MPDU.
  201. <legal all>
  202. sa_idx_or_sw_peer_id_14_0
  203. Passed on from 'RX_MSDU_END' TLV (one MSB is omitted)
  204. Based on a register configuration in RXDMA, this field
  205. will contain:
  206. The offset in the address search table which matches the
  207. MAC source address
  208. OR
  209. 'sw_peer_id' from the address search entry corresponding
  210. to the source address of the MSDU
  211. <legal all>
  212. mpdu_ast_idx_or_sw_peer_id_14_0
  213. Passed on from 'RX_MPDU_INFO' structure in
  214. 'RX_MPDU_START' TLV (one MSB is omitted)
  215. Based on a register configuration in RXDMA, this field
  216. will contain:
  217. The index of the address search entry corresponding to
  218. this MPDU (a value of 0xFFFF indicates an invalid AST index,
  219. meaning that no AST entry was found or no AST search was
  220. performed)
  221. OR:
  222. 'sw_peer_id' from the address search entry corresponding
  223. to this MPDU (in case of ndp or phy_err or
  224. AST_based_lookup_valid == 0, this field will be set to 0)
  225. <legal all>
  226. fr_ds
  227. Passed on from 'RX_MPDU_INFO' structure in
  228. 'RX_MPDU_START' TLV
  229. Set if the 'from DS' bit is set in the frame control.
  230. <legal all>
  231. to_ds
  232. Passed on from 'RX_MPDU_INFO' structure in
  233. 'RX_MPDU_START' TLV
  234. Set if the 'to DS' bit is set in the frame control.
  235. <legal all>
  236. */
  237. /* Description RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG
  238. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  239. over multiple buffers, this field will be valid in the Last
  240. buffer used by the MSDU
  241. <enum 0 Not_first_msdu> This is not the first MSDU in
  242. the MPDU.
  243. <enum 1 first_msdu> This MSDU is the first one in the
  244. MPDU.
  245. <legal all>
  246. */
  247. #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  248. #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  249. #define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  250. /* Description RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG
  251. Consumer: WBM/REO/SW/FW
  252. Producer: RXDMA
  253. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  254. over multiple buffers, this field will be valid in the Last
  255. buffer used by the MSDU
  256. <enum 0 Not_last_msdu> There are more MSDUs linked to
  257. this MSDU that belongs to this MPDU
  258. <enum 1 Last_msdu> this MSDU is the last one in the
  259. MPDU. This setting is only allowed in combination with
  260. 'Msdu_continuation' set to 0. This implies that when an msdu
  261. is spread out over multiple buffers and thus
  262. msdu_continuation is set, only for the very last buffer of
  263. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  264. When both first_msdu_in_mpdu_flag and
  265. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  266. belongs to only contains a single MSDU.
  267. <legal all>
  268. */
  269. #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  270. #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  271. #define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  272. /* Description RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION
  273. When set, this MSDU buffer was not able to hold the
  274. entire MSDU. The next buffer will therefor contain
  275. additional information related to this MSDU.
  276. <legal all>
  277. */
  278. #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET 0x00000000
  279. #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB 2
  280. #define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK 0x00000004
  281. /* Description RX_MSDU_DESC_INFO_0_MSDU_LENGTH
  282. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  283. over multiple buffers, this field will be valid in the First
  284. buffer used by MSDU.
  285. Full MSDU length in bytes after decapsulation.
  286. This field is still valid for MPDU frames without
  287. A-MSDU. It still represents MSDU length after decapsulation
  288. Or in case of RAW MPDUs, it indicates the length of the
  289. entire MPDU (without FCS field)
  290. <legal all>
  291. */
  292. #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET 0x00000000
  293. #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB 3
  294. #define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK 0x0001fff8
  295. /* Description RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION
  296. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  297. over multiple buffers, this field will be valid in the Last
  298. buffer used by the MSDU
  299. The ID of the REO exit ring where the MSDU frame shall
  300. push after (MPDU level) reordering has finished.
  301. <enum 0 reo_destination_tcl> Reo will push the frame
  302. into the REO2TCL ring
  303. <enum 1 reo_destination_sw1> Reo will push the frame
  304. into the REO2SW1 ring
  305. <enum 2 reo_destination_sw2> Reo will push the frame
  306. into the REO2SW2 ring
  307. <enum 3 reo_destination_sw3> Reo will push the frame
  308. into the REO2SW3 ring
  309. <enum 4 reo_destination_sw4> Reo will push the frame
  310. into the REO2SW4 ring
  311. <enum 5 reo_destination_release> Reo will push the frame
  312. into the REO_release ring
  313. <enum 6 reo_destination_fw> Reo will push the frame into
  314. the REO2FW ring
  315. <enum 7 reo_destination_sw5> Reo will push the frame
  316. into the REO2SW5 ring (REO remaps this in chips without
  317. REO2SW5 ring, e.g. Pine)
  318. <enum 8 reo_destination_sw6> Reo will push the frame
  319. into the REO2SW6 ring (REO remaps this in chips without
  320. REO2SW6 ring, e.g. Pine)
  321. <enum 9 reo_destination_9> REO remaps this <enum 10
  322. reo_destination_10> REO remaps this
  323. <enum 11 reo_destination_11> REO remaps this
  324. <enum 12 reo_destination_12> REO remaps this <enum 13
  325. reo_destination_13> REO remaps this
  326. <enum 14 reo_destination_14> REO remaps this
  327. <enum 15 reo_destination_15> REO remaps this
  328. <enum 16 reo_destination_16> REO remaps this
  329. <enum 17 reo_destination_17> REO remaps this
  330. <enum 18 reo_destination_18> REO remaps this
  331. <enum 19 reo_destination_19> REO remaps this
  332. <enum 20 reo_destination_20> REO remaps this
  333. <enum 21 reo_destination_21> REO remaps this
  334. <enum 22 reo_destination_22> REO remaps this
  335. <enum 23 reo_destination_23> REO remaps this
  336. <enum 24 reo_destination_24> REO remaps this
  337. <enum 25 reo_destination_25> REO remaps this
  338. <enum 26 reo_destination_26> REO remaps this
  339. <enum 27 reo_destination_27> REO remaps this
  340. <enum 28 reo_destination_28> REO remaps this
  341. <enum 29 reo_destination_29> REO remaps this
  342. <enum 30 reo_destination_30> REO remaps this
  343. <enum 31 reo_destination_31> REO remaps this
  344. <legal all>
  345. */
  346. #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000
  347. #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB 17
  348. #define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK 0x003e0000
  349. /* Description RX_MSDU_DESC_INFO_0_MSDU_DROP
  350. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  351. over multiple buffers, this field will be valid in the Last
  352. buffer used by the MSDU
  353. When set, REO shall drop this MSDU and not forward it to
  354. any other ring...
  355. <legal all>
  356. */
  357. #define RX_MSDU_DESC_INFO_0_MSDU_DROP_OFFSET 0x00000000
  358. #define RX_MSDU_DESC_INFO_0_MSDU_DROP_LSB 22
  359. #define RX_MSDU_DESC_INFO_0_MSDU_DROP_MASK 0x00400000
  360. /* Description RX_MSDU_DESC_INFO_0_SA_IS_VALID
  361. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  362. over multiple buffers, this field will be valid in the Last
  363. buffer used by the MSDU
  364. Indicates that OLE found a valid SA entry for this MSDU
  365. <legal all>
  366. */
  367. #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET 0x00000000
  368. #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_LSB 23
  369. #define RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK 0x00800000
  370. /* Description RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT
  371. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  372. over multiple buffers, this field will be valid in the Last
  373. buffer used by the MSDU
  374. Indicates an unsuccessful MAC source address search due
  375. to the expiring of the search timer for this MSDU
  376. <legal all>
  377. */
  378. #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET 0x00000000
  379. #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_LSB 24
  380. #define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK 0x01000000
  381. /* Description RX_MSDU_DESC_INFO_0_DA_IS_VALID
  382. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  383. over multiple buffers, this field will be valid in the Last
  384. buffer used by the MSDU
  385. Indicates that OLE found a valid DA entry for this MSDU
  386. <legal all>
  387. */
  388. #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET 0x00000000
  389. #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_LSB 25
  390. #define RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK 0x02000000
  391. /* Description RX_MSDU_DESC_INFO_0_DA_IS_MCBC
  392. Field Only valid if da_is_valid is set
  393. Indicates the DA address was a Multicast of Broadcast
  394. address for this MSDU
  395. <legal all>
  396. */
  397. #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET 0x00000000
  398. #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_LSB 26
  399. #define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK 0x04000000
  400. /* Description RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT
  401. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  402. over multiple buffers, this field will be valid in the Last
  403. buffer used by the MSDU
  404. Indicates an unsuccessful MAC destination address search
  405. due to the expiring of the search timer for this MSDU
  406. <legal all>
  407. */
  408. #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET 0x00000000
  409. #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_LSB 27
  410. #define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK 0x08000000
  411. /* Description RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB
  412. Passed on from 'RX_MSDU_END' TLV (only the MSB is
  413. reported as the LSB is always zero)
  414. Number of bytes padded to make sure that the L3 header
  415. will always start of a Dword boundary
  416. <legal all>
  417. */
  418. #define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_OFFSET 0x00000000
  419. #define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_LSB 28
  420. #define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_MASK 0x10000000
  421. /* Description RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL
  422. Passed on from 'RX_ATTENTION' TLV
  423. Indicates that the computed checksum did not match the
  424. checksum in the TCP/UDP header.
  425. <legal all>
  426. */
  427. #define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000
  428. #define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_LSB 29
  429. #define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_MASK 0x20000000
  430. /* Description RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL
  431. Passed on from 'RX_ATTENTION' TLV
  432. Indicates that the computed checksum did not match the
  433. checksum in the IP header.
  434. <legal all>
  435. */
  436. #define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_OFFSET 0x00000000
  437. #define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_LSB 30
  438. #define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_MASK 0x40000000
  439. /* Description RX_MSDU_DESC_INFO_0_RAW_MPDU
  440. Passed on from 'RX_MPDU_INFO' structure in
  441. 'RX_MPDU_START' TLV
  442. Set to 1 by RXOLE when it has not performed any 802.11
  443. to Ethernet/Natvie WiFi header conversion on this MPDU.
  444. <legal all>
  445. */
  446. #define RX_MSDU_DESC_INFO_0_RAW_MPDU_OFFSET 0x00000000
  447. #define RX_MSDU_DESC_INFO_0_RAW_MPDU_LSB 31
  448. #define RX_MSDU_DESC_INFO_0_RAW_MPDU_MASK 0x80000000
  449. /* Description RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0
  450. Passed on from 'RX_MSDU_END' TLV (one MSB is omitted)
  451. Based on a register configuration in RXDMA, this field
  452. will contain:
  453. The offset in the address search table which matches the
  454. MAC source address
  455. OR
  456. 'sw_peer_id' from the address search entry corresponding
  457. to the source address of the MSDU
  458. <legal all>
  459. */
  460. #define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_OFFSET 0x00000004
  461. #define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_LSB 0
  462. #define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_MASK 0x00007fff
  463. /* Description RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0
  464. Passed on from 'RX_MPDU_INFO' structure in
  465. 'RX_MPDU_START' TLV (one MSB is omitted)
  466. Based on a register configuration in RXDMA, this field
  467. will contain:
  468. The index of the address search entry corresponding to
  469. this MPDU (a value of 0xFFFF indicates an invalid AST index,
  470. meaning that no AST entry was found or no AST search was
  471. performed)
  472. OR:
  473. 'sw_peer_id' from the address search entry corresponding
  474. to this MPDU (in case of ndp or phy_err or
  475. AST_based_lookup_valid == 0, this field will be set to 0)
  476. <legal all>
  477. */
  478. #define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_OFFSET 0x00000004
  479. #define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_LSB 15
  480. #define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_MASK 0x3fff8000
  481. /* Description RX_MSDU_DESC_INFO_1_FR_DS
  482. Passed on from 'RX_MPDU_INFO' structure in
  483. 'RX_MPDU_START' TLV
  484. Set if the 'from DS' bit is set in the frame control.
  485. <legal all>
  486. */
  487. #define RX_MSDU_DESC_INFO_1_FR_DS_OFFSET 0x00000004
  488. #define RX_MSDU_DESC_INFO_1_FR_DS_LSB 30
  489. #define RX_MSDU_DESC_INFO_1_FR_DS_MASK 0x40000000
  490. /* Description RX_MSDU_DESC_INFO_1_TO_DS
  491. Passed on from 'RX_MPDU_INFO' structure in
  492. 'RX_MPDU_START' TLV
  493. Set if the 'to DS' bit is set in the frame control.
  494. <legal all>
  495. */
  496. #define RX_MSDU_DESC_INFO_1_TO_DS_OFFSET 0x00000004
  497. #define RX_MSDU_DESC_INFO_1_TO_DS_LSB 31
  498. #define RX_MSDU_DESC_INFO_1_TO_DS_MASK 0x80000000
  499. #endif // _RX_MSDU_DESC_INFO_H_