tx_msdu_extension.h 24 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. // $ATH_LICENSE_HW_HDR_C$
  17. //
  18. // DO NOT EDIT! This file is automatically generated
  19. // These definitions are tied to a particular hardware layout
  20. #ifndef _TX_MSDU_EXTENSION_H_
  21. #define _TX_MSDU_EXTENSION_H_
  22. #if !defined(__ASSEMBLER__)
  23. #endif
  24. // ################ START SUMMARY #################
  25. //
  26. // Dword Fields
  27. // 0 tso_enable[0], reserved_0a[6:1], tcp_flag[15:7], tcp_flag_mask[24:16], reserved_0b[31:25]
  28. // 1 l2_length[15:0], ip_length[31:16]
  29. // 2 tcp_seq_number[31:0]
  30. // 3 ip_identification[15:0], udp_length[31:16]
  31. // 4 checksum_offset[13:0], partial_checksum_en[14], reserved_4a[15], payload_start_offset[29:16], reserved_4b[31:30]
  32. // 5 payload_end_offset[13:0], reserved_5a[15:14], wds[16], reserved_5b[31:17]
  33. // 6 buf0_ptr_31_0[31:0]
  34. // 7 buf0_ptr_39_32[7:0], reserved_7a[15:8], buf0_len[31:16]
  35. // 8 buf1_ptr_31_0[31:0]
  36. // 9 buf1_ptr_39_32[7:0], reserved_9a[15:8], buf1_len[31:16]
  37. // 10 buf2_ptr_31_0[31:0]
  38. // 11 buf2_ptr_39_32[7:0], reserved_11a[15:8], buf2_len[31:16]
  39. // 12 buf3_ptr_31_0[31:0]
  40. // 13 buf3_ptr_39_32[7:0], reserved_13a[15:8], buf3_len[31:16]
  41. // 14 buf4_ptr_31_0[31:0]
  42. // 15 buf4_ptr_39_32[7:0], reserved_15a[15:8], buf4_len[31:16]
  43. // 16 buf5_ptr_31_0[31:0]
  44. // 17 buf5_ptr_39_32[7:0], reserved_17a[15:8], buf5_len[31:16]
  45. //
  46. // ################ END SUMMARY #################
  47. #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
  48. struct tx_msdu_extension {
  49. uint32_t tso_enable : 1, //[0]
  50. reserved_0a : 6, //[6:1]
  51. tcp_flag : 9, //[15:7]
  52. tcp_flag_mask : 9, //[24:16]
  53. reserved_0b : 7; //[31:25]
  54. uint32_t l2_length : 16, //[15:0]
  55. ip_length : 16; //[31:16]
  56. uint32_t tcp_seq_number : 32; //[31:0]
  57. uint32_t ip_identification : 16, //[15:0]
  58. udp_length : 16; //[31:16]
  59. uint32_t checksum_offset : 14, //[13:0]
  60. partial_checksum_en : 1, //[14]
  61. reserved_4a : 1, //[15]
  62. payload_start_offset : 14, //[29:16]
  63. reserved_4b : 2; //[31:30]
  64. uint32_t payload_end_offset : 14, //[13:0]
  65. reserved_5a : 2, //[15:14]
  66. wds : 1, //[16]
  67. reserved_5b : 15; //[31:17]
  68. uint32_t buf0_ptr_31_0 : 32; //[31:0]
  69. uint32_t buf0_ptr_39_32 : 8, //[7:0]
  70. reserved_7a : 8, //[15:8]
  71. buf0_len : 16; //[31:16]
  72. uint32_t buf1_ptr_31_0 : 32; //[31:0]
  73. uint32_t buf1_ptr_39_32 : 8, //[7:0]
  74. reserved_9a : 8, //[15:8]
  75. buf1_len : 16; //[31:16]
  76. uint32_t buf2_ptr_31_0 : 32; //[31:0]
  77. uint32_t buf2_ptr_39_32 : 8, //[7:0]
  78. reserved_11a : 8, //[15:8]
  79. buf2_len : 16; //[31:16]
  80. uint32_t buf3_ptr_31_0 : 32; //[31:0]
  81. uint32_t buf3_ptr_39_32 : 8, //[7:0]
  82. reserved_13a : 8, //[15:8]
  83. buf3_len : 16; //[31:16]
  84. uint32_t buf4_ptr_31_0 : 32; //[31:0]
  85. uint32_t buf4_ptr_39_32 : 8, //[7:0]
  86. reserved_15a : 8, //[15:8]
  87. buf4_len : 16; //[31:16]
  88. uint32_t buf5_ptr_31_0 : 32; //[31:0]
  89. uint32_t buf5_ptr_39_32 : 8, //[7:0]
  90. reserved_17a : 8, //[15:8]
  91. buf5_len : 16; //[31:16]
  92. };
  93. /*
  94. tso_enable
  95. Enable transmit segmentation offload <legal all>
  96. reserved_0a
  97. FW will set to 0, MAC will ignore.  <legal 0>
  98. tcp_flag
  99. TCP flags
  100. {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all>
  101. tcp_flag_mask
  102. TCP flag mask. Tcp_flag is inserted into the header
  103. based on the mask, if tso is enabled
  104. reserved_0b
  105. FW will set to 0, MAC will ignore.  <legal 0>
  106. l2_length
  107. L2 length for the msdu, if tso is enabled <legal all>
  108. ip_length
  109. Ip length for the msdu, if tso is enabled <legal all>
  110. tcp_seq_number
  111. Tcp_seq_number for the msdu, if tso is enabled <legal
  112. all>
  113. ip_identification
  114. Ip_identification for the msdu, if tso is enabled <legal
  115. all>
  116. udp_length
  117. TXDMA is copies this field into MSDU START TLV
  118. checksum_offset
  119. The calculated checksum from start offset to end offset
  120. will be added to the checksum at the offset given by this
  121. field<legal all>
  122. partial_checksum_en
  123. Partial Checksum Enable Bit.
  124. <legal 0-1>
  125. reserved_4a
  126. <Legal 0>
  127. payload_start_offset
  128. L4 checksum calculations will start fromt this offset
  129. <Legal all>
  130. reserved_4b
  131. <Legal 0>
  132. payload_end_offset
  133. L4 checksum calculations will end at this offset.
  134. <Legal all>
  135. reserved_5a
  136. <Legal 0>
  137. wds
  138. If set the current packet is 4-address frame. Required
  139. because an aggregate can include some frames with 3 address
  140. format and other frames with 4 address format. Used by the
  141. OLE during encapsulation.
  142. Note: there is also global wds tx control in the
  143. TX_PEER_ENTRY
  144. <legal all>
  145. reserved_5b
  146. <Legal 0>
  147. buf0_ptr_31_0
  148. Lower 32 bits of the first buffer pointer
  149. NOTE: SW/FW manages the 'cookie' info related to this
  150. buffer together with the 'cookie' info for this
  151. MSDU_EXTENSION descriptor
  152. <legal all>
  153. buf0_ptr_39_32
  154. Upper 8 bits of the first buffer pointer <legal all>
  155. reserved_7a
  156. <Legal 0>
  157. buf0_len
  158. Length of the first buffer <legal all>
  159. buf1_ptr_31_0
  160. Lower 32 bits of the second buffer pointer
  161. NOTE: SW/FW manages the 'cookie' info related to this
  162. buffer together with the 'cookie' info for this
  163. MSDU_EXTENSION descriptor
  164. <legal all>
  165. buf1_ptr_39_32
  166. Upper 8 bits of the second buffer pointer <legal all>
  167. reserved_9a
  168. <Legal 0>
  169. buf1_len
  170. Length of the second buffer <legal all>
  171. buf2_ptr_31_0
  172. Lower 32 bits of the third buffer pointer
  173. NOTE: SW/FW manages the 'cookie' info related to this
  174. buffer together with the 'cookie' info for this
  175. MSDU_EXTENSION descriptor
  176. <legal all>
  177. buf2_ptr_39_32
  178. Upper 8 bits of the third buffer pointer <legal all>
  179. reserved_11a
  180. <Legal 0>
  181. buf2_len
  182. Length of the third buffer <legal all>
  183. buf3_ptr_31_0
  184. Lower 32 bits of the fourth buffer pointer
  185. NOTE: SW/FW manages the 'cookie' info related to this
  186. buffer together with the 'cookie' info for this
  187. MSDU_EXTENSION descriptor
  188. <legal all>
  189. buf3_ptr_39_32
  190. Upper 8 bits of the fourth buffer pointer <legal all>
  191. reserved_13a
  192. <Legal 0>
  193. buf3_len
  194. Length of the fourth buffer <legal all>
  195. buf4_ptr_31_0
  196. Lower 32 bits of the fifth buffer pointer
  197. NOTE: SW/FW manages the 'cookie' info related to this
  198. buffer together with the 'cookie' info for this
  199. MSDU_EXTENSION descriptor
  200. <legal all>
  201. buf4_ptr_39_32
  202. Upper 8 bits of the fifth buffer pointer <legal all>
  203. reserved_15a
  204. <Legal 0>
  205. buf4_len
  206. Length of the fifth buffer <legal all>
  207. buf5_ptr_31_0
  208. Lower 32 bits of the sixth buffer pointer
  209. NOTE: SW/FW manages the 'cookie' info related to this
  210. buffer together with the 'cookie' info for this
  211. MSDU_EXTENSION descriptor
  212. <legal all>
  213. buf5_ptr_39_32
  214. Upper 8 bits of the sixth buffer pointer <legal all>
  215. reserved_17a
  216. <Legal 0>
  217. buf5_len
  218. Length of the sixth buffer <legal all>
  219. */
  220. /* Description TX_MSDU_EXTENSION_0_TSO_ENABLE
  221. Enable transmit segmentation offload <legal all>
  222. */
  223. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_OFFSET 0x00000000
  224. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_LSB 0
  225. #define TX_MSDU_EXTENSION_0_TSO_ENABLE_MASK 0x00000001
  226. /* Description TX_MSDU_EXTENSION_0_RESERVED_0A
  227. FW will set to 0, MAC will ignore.  <legal 0>
  228. */
  229. #define TX_MSDU_EXTENSION_0_RESERVED_0A_OFFSET 0x00000000
  230. #define TX_MSDU_EXTENSION_0_RESERVED_0A_LSB 1
  231. #define TX_MSDU_EXTENSION_0_RESERVED_0A_MASK 0x0000007e
  232. /* Description TX_MSDU_EXTENSION_0_TCP_FLAG
  233. TCP flags
  234. {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all>
  235. */
  236. #define TX_MSDU_EXTENSION_0_TCP_FLAG_OFFSET 0x00000000
  237. #define TX_MSDU_EXTENSION_0_TCP_FLAG_LSB 7
  238. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 0x0000ff80
  239. /* Description TX_MSDU_EXTENSION_0_TCP_FLAG_MASK
  240. TCP flag mask. Tcp_flag is inserted into the header
  241. based on the mask, if tso is enabled
  242. */
  243. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_OFFSET 0x00000000
  244. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_LSB 16
  245. #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_MASK 0x01ff0000
  246. /* Description TX_MSDU_EXTENSION_0_RESERVED_0B
  247. FW will set to 0, MAC will ignore.  <legal 0>
  248. */
  249. #define TX_MSDU_EXTENSION_0_RESERVED_0B_OFFSET 0x00000000
  250. #define TX_MSDU_EXTENSION_0_RESERVED_0B_LSB 25
  251. #define TX_MSDU_EXTENSION_0_RESERVED_0B_MASK 0xfe000000
  252. /* Description TX_MSDU_EXTENSION_1_L2_LENGTH
  253. L2 length for the msdu, if tso is enabled <legal all>
  254. */
  255. #define TX_MSDU_EXTENSION_1_L2_LENGTH_OFFSET 0x00000004
  256. #define TX_MSDU_EXTENSION_1_L2_LENGTH_LSB 0
  257. #define TX_MSDU_EXTENSION_1_L2_LENGTH_MASK 0x0000ffff
  258. /* Description TX_MSDU_EXTENSION_1_IP_LENGTH
  259. Ip length for the msdu, if tso is enabled <legal all>
  260. */
  261. #define TX_MSDU_EXTENSION_1_IP_LENGTH_OFFSET 0x00000004
  262. #define TX_MSDU_EXTENSION_1_IP_LENGTH_LSB 16
  263. #define TX_MSDU_EXTENSION_1_IP_LENGTH_MASK 0xffff0000
  264. /* Description TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER
  265. Tcp_seq_number for the msdu, if tso is enabled <legal
  266. all>
  267. */
  268. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_OFFSET 0x00000008
  269. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_LSB 0
  270. #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_MASK 0xffffffff
  271. /* Description TX_MSDU_EXTENSION_3_IP_IDENTIFICATION
  272. Ip_identification for the msdu, if tso is enabled <legal
  273. all>
  274. */
  275. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_OFFSET 0x0000000c
  276. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_LSB 0
  277. #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_MASK 0x0000ffff
  278. /* Description TX_MSDU_EXTENSION_3_UDP_LENGTH
  279. TXDMA is copies this field into MSDU START TLV
  280. */
  281. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_OFFSET 0x0000000c
  282. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_LSB 16
  283. #define TX_MSDU_EXTENSION_3_UDP_LENGTH_MASK 0xffff0000
  284. /* Description TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET
  285. The calculated checksum from start offset to end offset
  286. will be added to the checksum at the offset given by this
  287. field<legal all>
  288. */
  289. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_OFFSET 0x00000010
  290. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_LSB 0
  291. #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_MASK 0x00003fff
  292. /* Description TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN
  293. Partial Checksum Enable Bit.
  294. <legal 0-1>
  295. */
  296. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_OFFSET 0x00000010
  297. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_LSB 14
  298. #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_MASK 0x00004000
  299. /* Description TX_MSDU_EXTENSION_4_RESERVED_4A
  300. <Legal 0>
  301. */
  302. #define TX_MSDU_EXTENSION_4_RESERVED_4A_OFFSET 0x00000010
  303. #define TX_MSDU_EXTENSION_4_RESERVED_4A_LSB 15
  304. #define TX_MSDU_EXTENSION_4_RESERVED_4A_MASK 0x00008000
  305. /* Description TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET
  306. L4 checksum calculations will start fromt this offset
  307. <Legal all>
  308. */
  309. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_OFFSET 0x00000010
  310. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_LSB 16
  311. #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_MASK 0x3fff0000
  312. /* Description TX_MSDU_EXTENSION_4_RESERVED_4B
  313. <Legal 0>
  314. */
  315. #define TX_MSDU_EXTENSION_4_RESERVED_4B_OFFSET 0x00000010
  316. #define TX_MSDU_EXTENSION_4_RESERVED_4B_LSB 30
  317. #define TX_MSDU_EXTENSION_4_RESERVED_4B_MASK 0xc0000000
  318. /* Description TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET
  319. L4 checksum calculations will end at this offset.
  320. <Legal all>
  321. */
  322. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_OFFSET 0x00000014
  323. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_LSB 0
  324. #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_MASK 0x00003fff
  325. /* Description TX_MSDU_EXTENSION_5_RESERVED_5A
  326. <Legal 0>
  327. */
  328. #define TX_MSDU_EXTENSION_5_RESERVED_5A_OFFSET 0x00000014
  329. #define TX_MSDU_EXTENSION_5_RESERVED_5A_LSB 14
  330. #define TX_MSDU_EXTENSION_5_RESERVED_5A_MASK 0x0000c000
  331. /* Description TX_MSDU_EXTENSION_5_WDS
  332. If set the current packet is 4-address frame. Required
  333. because an aggregate can include some frames with 3 address
  334. format and other frames with 4 address format. Used by the
  335. OLE during encapsulation.
  336. Note: there is also global wds tx control in the
  337. TX_PEER_ENTRY
  338. <legal all>
  339. */
  340. #define TX_MSDU_EXTENSION_5_WDS_OFFSET 0x00000014
  341. #define TX_MSDU_EXTENSION_5_WDS_LSB 16
  342. #define TX_MSDU_EXTENSION_5_WDS_MASK 0x00010000
  343. /* Description TX_MSDU_EXTENSION_5_RESERVED_5B
  344. <Legal 0>
  345. */
  346. #define TX_MSDU_EXTENSION_5_RESERVED_5B_OFFSET 0x00000014
  347. #define TX_MSDU_EXTENSION_5_RESERVED_5B_LSB 17
  348. #define TX_MSDU_EXTENSION_5_RESERVED_5B_MASK 0xfffe0000
  349. /* Description TX_MSDU_EXTENSION_6_BUF0_PTR_31_0
  350. Lower 32 bits of the first buffer pointer
  351. NOTE: SW/FW manages the 'cookie' info related to this
  352. buffer together with the 'cookie' info for this
  353. MSDU_EXTENSION descriptor
  354. <legal all>
  355. */
  356. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_OFFSET 0x00000018
  357. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_LSB 0
  358. #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_MASK 0xffffffff
  359. /* Description TX_MSDU_EXTENSION_7_BUF0_PTR_39_32
  360. Upper 8 bits of the first buffer pointer <legal all>
  361. */
  362. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_OFFSET 0x0000001c
  363. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_LSB 0
  364. #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_MASK 0x000000ff
  365. /* Description TX_MSDU_EXTENSION_7_RESERVED_7A
  366. <Legal 0>
  367. */
  368. #define TX_MSDU_EXTENSION_7_RESERVED_7A_OFFSET 0x0000001c
  369. #define TX_MSDU_EXTENSION_7_RESERVED_7A_LSB 8
  370. #define TX_MSDU_EXTENSION_7_RESERVED_7A_MASK 0x0000ff00
  371. /* Description TX_MSDU_EXTENSION_7_BUF0_LEN
  372. Length of the first buffer <legal all>
  373. */
  374. #define TX_MSDU_EXTENSION_7_BUF0_LEN_OFFSET 0x0000001c
  375. #define TX_MSDU_EXTENSION_7_BUF0_LEN_LSB 16
  376. #define TX_MSDU_EXTENSION_7_BUF0_LEN_MASK 0xffff0000
  377. /* Description TX_MSDU_EXTENSION_8_BUF1_PTR_31_0
  378. Lower 32 bits of the second buffer pointer
  379. NOTE: SW/FW manages the 'cookie' info related to this
  380. buffer together with the 'cookie' info for this
  381. MSDU_EXTENSION descriptor
  382. <legal all>
  383. */
  384. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_OFFSET 0x00000020
  385. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_LSB 0
  386. #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_MASK 0xffffffff
  387. /* Description TX_MSDU_EXTENSION_9_BUF1_PTR_39_32
  388. Upper 8 bits of the second buffer pointer <legal all>
  389. */
  390. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_OFFSET 0x00000024
  391. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_LSB 0
  392. #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_MASK 0x000000ff
  393. /* Description TX_MSDU_EXTENSION_9_RESERVED_9A
  394. <Legal 0>
  395. */
  396. #define TX_MSDU_EXTENSION_9_RESERVED_9A_OFFSET 0x00000024
  397. #define TX_MSDU_EXTENSION_9_RESERVED_9A_LSB 8
  398. #define TX_MSDU_EXTENSION_9_RESERVED_9A_MASK 0x0000ff00
  399. /* Description TX_MSDU_EXTENSION_9_BUF1_LEN
  400. Length of the second buffer <legal all>
  401. */
  402. #define TX_MSDU_EXTENSION_9_BUF1_LEN_OFFSET 0x00000024
  403. #define TX_MSDU_EXTENSION_9_BUF1_LEN_LSB 16
  404. #define TX_MSDU_EXTENSION_9_BUF1_LEN_MASK 0xffff0000
  405. /* Description TX_MSDU_EXTENSION_10_BUF2_PTR_31_0
  406. Lower 32 bits of the third buffer pointer
  407. NOTE: SW/FW manages the 'cookie' info related to this
  408. buffer together with the 'cookie' info for this
  409. MSDU_EXTENSION descriptor
  410. <legal all>
  411. */
  412. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_OFFSET 0x00000028
  413. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_LSB 0
  414. #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_MASK 0xffffffff
  415. /* Description TX_MSDU_EXTENSION_11_BUF2_PTR_39_32
  416. Upper 8 bits of the third buffer pointer <legal all>
  417. */
  418. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_OFFSET 0x0000002c
  419. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_LSB 0
  420. #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_MASK 0x000000ff
  421. /* Description TX_MSDU_EXTENSION_11_RESERVED_11A
  422. <Legal 0>
  423. */
  424. #define TX_MSDU_EXTENSION_11_RESERVED_11A_OFFSET 0x0000002c
  425. #define TX_MSDU_EXTENSION_11_RESERVED_11A_LSB 8
  426. #define TX_MSDU_EXTENSION_11_RESERVED_11A_MASK 0x0000ff00
  427. /* Description TX_MSDU_EXTENSION_11_BUF2_LEN
  428. Length of the third buffer <legal all>
  429. */
  430. #define TX_MSDU_EXTENSION_11_BUF2_LEN_OFFSET 0x0000002c
  431. #define TX_MSDU_EXTENSION_11_BUF2_LEN_LSB 16
  432. #define TX_MSDU_EXTENSION_11_BUF2_LEN_MASK 0xffff0000
  433. /* Description TX_MSDU_EXTENSION_12_BUF3_PTR_31_0
  434. Lower 32 bits of the fourth buffer pointer
  435. NOTE: SW/FW manages the 'cookie' info related to this
  436. buffer together with the 'cookie' info for this
  437. MSDU_EXTENSION descriptor
  438. <legal all>
  439. */
  440. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_OFFSET 0x00000030
  441. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_LSB 0
  442. #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_MASK 0xffffffff
  443. /* Description TX_MSDU_EXTENSION_13_BUF3_PTR_39_32
  444. Upper 8 bits of the fourth buffer pointer <legal all>
  445. */
  446. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_OFFSET 0x00000034
  447. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_LSB 0
  448. #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_MASK 0x000000ff
  449. /* Description TX_MSDU_EXTENSION_13_RESERVED_13A
  450. <Legal 0>
  451. */
  452. #define TX_MSDU_EXTENSION_13_RESERVED_13A_OFFSET 0x00000034
  453. #define TX_MSDU_EXTENSION_13_RESERVED_13A_LSB 8
  454. #define TX_MSDU_EXTENSION_13_RESERVED_13A_MASK 0x0000ff00
  455. /* Description TX_MSDU_EXTENSION_13_BUF3_LEN
  456. Length of the fourth buffer <legal all>
  457. */
  458. #define TX_MSDU_EXTENSION_13_BUF3_LEN_OFFSET 0x00000034
  459. #define TX_MSDU_EXTENSION_13_BUF3_LEN_LSB 16
  460. #define TX_MSDU_EXTENSION_13_BUF3_LEN_MASK 0xffff0000
  461. /* Description TX_MSDU_EXTENSION_14_BUF4_PTR_31_0
  462. Lower 32 bits of the fifth buffer pointer
  463. NOTE: SW/FW manages the 'cookie' info related to this
  464. buffer together with the 'cookie' info for this
  465. MSDU_EXTENSION descriptor
  466. <legal all>
  467. */
  468. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_OFFSET 0x00000038
  469. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_LSB 0
  470. #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_MASK 0xffffffff
  471. /* Description TX_MSDU_EXTENSION_15_BUF4_PTR_39_32
  472. Upper 8 bits of the fifth buffer pointer <legal all>
  473. */
  474. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_OFFSET 0x0000003c
  475. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_LSB 0
  476. #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_MASK 0x000000ff
  477. /* Description TX_MSDU_EXTENSION_15_RESERVED_15A
  478. <Legal 0>
  479. */
  480. #define TX_MSDU_EXTENSION_15_RESERVED_15A_OFFSET 0x0000003c
  481. #define TX_MSDU_EXTENSION_15_RESERVED_15A_LSB 8
  482. #define TX_MSDU_EXTENSION_15_RESERVED_15A_MASK 0x0000ff00
  483. /* Description TX_MSDU_EXTENSION_15_BUF4_LEN
  484. Length of the fifth buffer <legal all>
  485. */
  486. #define TX_MSDU_EXTENSION_15_BUF4_LEN_OFFSET 0x0000003c
  487. #define TX_MSDU_EXTENSION_15_BUF4_LEN_LSB 16
  488. #define TX_MSDU_EXTENSION_15_BUF4_LEN_MASK 0xffff0000
  489. /* Description TX_MSDU_EXTENSION_16_BUF5_PTR_31_0
  490. Lower 32 bits of the sixth buffer pointer
  491. NOTE: SW/FW manages the 'cookie' info related to this
  492. buffer together with the 'cookie' info for this
  493. MSDU_EXTENSION descriptor
  494. <legal all>
  495. */
  496. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_OFFSET 0x00000040
  497. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_LSB 0
  498. #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_MASK 0xffffffff
  499. /* Description TX_MSDU_EXTENSION_17_BUF5_PTR_39_32
  500. Upper 8 bits of the sixth buffer pointer <legal all>
  501. */
  502. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_OFFSET 0x00000044
  503. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_LSB 0
  504. #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_MASK 0x000000ff
  505. /* Description TX_MSDU_EXTENSION_17_RESERVED_17A
  506. <Legal 0>
  507. */
  508. #define TX_MSDU_EXTENSION_17_RESERVED_17A_OFFSET 0x00000044
  509. #define TX_MSDU_EXTENSION_17_RESERVED_17A_LSB 8
  510. #define TX_MSDU_EXTENSION_17_RESERVED_17A_MASK 0x0000ff00
  511. /* Description TX_MSDU_EXTENSION_17_BUF5_LEN
  512. Length of the sixth buffer <legal all>
  513. */
  514. #define TX_MSDU_EXTENSION_17_BUF5_LEN_OFFSET 0x00000044
  515. #define TX_MSDU_EXTENSION_17_BUF5_LEN_LSB 16
  516. #define TX_MSDU_EXTENSION_17_BUF5_LEN_MASK 0xffff0000
  517. #endif // _TX_MSDU_EXTENSION_H_