reo_destination_ring.h 44 KB

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  1. /*
  2. * Copyright (c) 2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _REO_DESTINATION_RING_H_
  22. #define _REO_DESTINATION_RING_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. #include "buffer_addr_info.h"
  26. #include "rx_mpdu_desc_info.h"
  27. #include "rx_msdu_desc_info.h"
  28. // ################ START SUMMARY #################
  29. //
  30. // Dword Fields
  31. // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
  32. // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  33. // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  34. // 6 rx_reo_queue_desc_addr_31_0[31:0]
  35. // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
  36. // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], mpdu_fragment_number[16:13], captured_msdu_data_size[20:17], sw_exception[21], reserved_8a[31:22]
  37. // 9 reo_destination_struct_signature[31:0]
  38. // 10 reserved_10a[31:0]
  39. // 11 reserved_11a[31:0]
  40. // 12 reserved_12a[31:0]
  41. // 13 reserved_13a[31:0]
  42. // 14 reserved_14a[31:0]
  43. // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
  44. //
  45. // ################ END SUMMARY #################
  46. #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
  47. struct reo_destination_ring {
  48. struct buffer_addr_info buf_or_link_desc_addr_info;
  49. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  50. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  51. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  52. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  53. reo_dest_buffer_type : 1, //[8]
  54. reo_push_reason : 2, //[10:9]
  55. reo_error_code : 5, //[15:11]
  56. receive_queue_number : 16; //[31:16]
  57. uint32_t soft_reorder_info_valid : 1, //[0]
  58. reorder_opcode : 4, //[4:1]
  59. reorder_slot_index : 8, //[12:5]
  60. mpdu_fragment_number : 4, //[16:13]
  61. captured_msdu_data_size : 4, //[20:17]
  62. sw_exception : 1, //[21]
  63. reserved_8a : 10; //[31:22]
  64. uint32_t reo_destination_struct_signature: 32; //[31:0]
  65. uint32_t reserved_10a : 32; //[31:0]
  66. uint32_t reserved_11a : 32; //[31:0]
  67. uint32_t reserved_12a : 32; //[31:0]
  68. uint32_t reserved_13a : 32; //[31:0]
  69. uint32_t reserved_14a : 32; //[31:0]
  70. uint32_t reserved_15 : 20, //[19:0]
  71. ring_id : 8, //[27:20]
  72. looping_count : 4; //[31:28]
  73. };
  74. /*
  75. struct buffer_addr_info buf_or_link_desc_addr_info
  76. Consumer: REO/SW/FW
  77. Producer: RXDMA
  78. Details of the physical address of the a buffer or MSDU
  79. link descriptor
  80. struct rx_mpdu_desc_info rx_mpdu_desc_info_details
  81. Consumer: REO/SW/FW
  82. Producer: RXDMA
  83. General information related to the MPDU that is passed
  84. on from REO entrance ring to the REO destination ring
  85. struct rx_msdu_desc_info rx_msdu_desc_info_details
  86. General information related to the MSDU that is passed
  87. on from RXDMA all the way to to the REO destination ring.
  88. rx_reo_queue_desc_addr_31_0
  89. Consumer: REO
  90. Producer: RXDMA
  91. Address (lower 32 bits) of the REO queue descriptor.
  92. <legal all>
  93. rx_reo_queue_desc_addr_39_32
  94. Consumer: REO
  95. Producer: RXDMA
  96. Address (upper 8 bits) of the REO queue descriptor.
  97. <legal all>
  98. reo_dest_buffer_type
  99. Indicates the type of address provided in the
  100. 'Buf_or_link_desc_addr_info'
  101. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  102. <enum 1 MSDU_link_desc_address> The address of the MSDU
  103. link descriptor.
  104. <legal all>
  105. reo_push_reason
  106. Indicates why REO pushed the frame to this exit ring
  107. <enum 0 reo_error_detected> Reo detected an error an
  108. pushed this frame to this queue
  109. <enum 1 reo_routing_instruction> Reo pushed the frame to
  110. this queue per received routing instructions. No error
  111. within REO was detected
  112. <legal 0 - 1>
  113. reo_error_code
  114. Field only valid when 'Reo_push_reason' set to
  115. 'reo_error_detected'.
  116. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  117. provided in the REO_ENTRANCE ring is set to 0
  118. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  119. valid bit is NOT set
  120. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  121. session having been setup.
  122. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  123. SSN, Retry bit set: duplicate frame
  124. <enum 4 ba_duplicate> BA session, duplicate frame
  125. <enum 5 regular_frame_2k_jump> A normal (management/data
  126. frame) received with 2K jump in SN
  127. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  128. in SSN
  129. <enum 7 regular_frame_OOR> A normal (management/data
  130. frame) received with SN falling within the OOR window
  131. <enum 8 bar_frame_OOR> A bar received with SSN falling
  132. within the OOR window
  133. <enum 9 bar_frame_no_ba_session> A bar received without
  134. a BA session
  135. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  136. SSN equal to SN
  137. <enum 11 pn_check_failed> PN Check Failed packet.
  138. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  139. as a result of the 'Seq_2k_error_detected_flag' been set in
  140. the REO Queue descriptor
  141. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  142. as a result of the 'pn_error_detected_flag' been set in the
  143. REO Queue descriptor
  144. <enum 14 queue_descriptor_blocked_set> Frame is
  145. forwarded as a result of the queue descriptor(address) being
  146. blocked as SW/FW seems to be currently in the process of
  147. making updates to this descriptor...
  148. <legal 0-14>
  149. receive_queue_number
  150. This field in NOT valid (should be set to 0), when
  151. SW_exception is set.
  152. This field indicates the REO MPDU reorder queue ID from
  153. which this frame originated. This field is populated from a
  154. field with the same name in the RX_REO_QUEUE descriptor.
  155. <legal all>
  156. soft_reorder_info_valid
  157. This field in NOT valid (should be set to 0), when
  158. SW_exception is set.
  159. When set, REO has been instructed to not perform the
  160. actual re-ordering of frames for this queue, but just to
  161. insert the reorder opcodes
  162. <legal all>
  163. reorder_opcode
  164. Field is valid when 'Soft_reorder_info_valid' is set.
  165. This field is always valid for debug purpose as well.
  166. Details are in the MLD.
  167. <enum 0 invalid>
  168. <enum 1 fwdcur_fwdbuf>
  169. <enum 2 fwdbuf_fwdcur>
  170. <enum 3 qcur>
  171. <enum 4 fwdbuf_qcur>
  172. <enum 5 fwdbuf_drop>
  173. <enum 6 fwdall_drop>
  174. <enum 7 fwdall_qcur>
  175. <enum 8 reserved_reo_opcode_1>
  176. <enum 9 dropcur> the error reason code is in
  177. reo_error_code field.
  178. <enum 10 reserved_reo_opcode_2>
  179. <enum 11 reserved_reo_opcode_3>
  180. <enum 12 reserved_reo_opcode_4>
  181. <enum 13 reserved_reo_opcode_5>
  182. <enum 14 reserved_reo_opcode_6>
  183. <enum 15 reserved_reo_opcode_7>
  184. <legal all>
  185. reorder_slot_index
  186. Field only valid when 'Soft_reorder_info_valid' is set.
  187. TODO: add description
  188. <legal all>
  189. mpdu_fragment_number
  190. Field only valid when Rx_mpdu_desc_info_details.
  191. Fragment_flag is set.
  192. The fragment number from the 802.11 header.
  193. Note that the sequence number is embedded in the field:
  194. Rx_mpdu_desc_info_details. Mpdu_sequence_number
  195. <legal all>
  196. captured_msdu_data_size
  197. The number of following REO_DESTINATION STRUCTs that
  198. have been replaced with msdu_data extracted from the
  199. msdu_buffer and copied into the ring for easy FW/SW access.
  200. Note that it is possible that these STRUCTs wrap around
  201. the end of the ring.
  202. Feature supported only in HastingsPrime
  203. <legal 0-4>
  204. sw_exception
  205. This field has the same setting as the SW_exception
  206. field in the corresponding REO_entrance_ring descriptor.
  207. When set, the REO entrance descriptor is generated by
  208. FW, and the MPDU was processed in the following way:
  209. - NO re-order function is needed.
  210. - MPDU delinking is determined by the setting of
  211. Entrance ring field: SW_excection_mpdu_delink
  212. - Destination ring selection is based on the setting of
  213. Feature supported only in HastingsPrime
  214. <legal all>
  215. reserved_8a
  216. <legal 0>
  217. reo_destination_struct_signature
  218. Set to value 0x8888_88888 when msdu capture mode is
  219. enabled for this ring (supported only in HastingsPrime)
  220. <legal 0, 2290649224 >
  221. reserved_10a
  222. <legal 0>
  223. reserved_11a
  224. <legal 0>
  225. reserved_12a
  226. <legal 0>
  227. reserved_13a
  228. <legal 0>
  229. reserved_14a
  230. <legal 0>
  231. reserved_15
  232. <legal 0>
  233. ring_id
  234. The buffer pointer ring ID.
  235. 0 refers to the IDLE ring
  236. 1 - N refers to other rings
  237. Helps with debugging when dumping ring contents.
  238. <legal all>
  239. looping_count
  240. A count value that indicates the number of times the
  241. producer of entries into this Ring has looped around the
  242. ring.
  243. At initialization time, this value is set to 0. On the
  244. first loop, this value is set to 1. After the max value is
  245. reached allowed by the number of bits for this field, the
  246. count value continues with 0 again.
  247. In case SW is the consumer of the ring entries, it can
  248. use this field to figure out up to where the producer of
  249. entries has created new entries. This eliminates the need to
  250. check where the head pointer' of the ring is located once
  251. the SW starts processing an interrupt indicating that new
  252. entries have been put into this ring...
  253. Also note that SW if it wants only needs to look at the
  254. LSB bit of this count value.
  255. <legal all>
  256. */
  257. /* EXTERNAL REFERENCE : struct buffer_addr_info buf_or_link_desc_addr_info */
  258. /* Description REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  259. Address (lower 32 bits) of the MSDU buffer OR
  260. MSDU_EXTENSION descriptor OR Link Descriptor
  261. In case of 'NULL' pointer, this field is set to 0
  262. <legal all>
  263. */
  264. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  265. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  266. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  267. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  268. Address (upper 8 bits) of the MSDU buffer OR
  269. MSDU_EXTENSION descriptor OR Link Descriptor
  270. In case of 'NULL' pointer, this field is set to 0
  271. <legal all>
  272. */
  273. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  274. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  275. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  276. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  277. Consumer: WBM
  278. Producer: SW/FW
  279. In case of 'NULL' pointer, this field is set to 0
  280. Indicates to which buffer manager the buffer OR
  281. MSDU_EXTENSION descriptor OR link descriptor that is being
  282. pointed to shall be returned after the frame has been
  283. processed. It is used by WBM for routing purposes.
  284. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  285. to the WMB buffer idle list
  286. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  287. returned to the WMB idle link descriptor idle list
  288. <enum 2 FW_BM> This buffer shall be returned to the FW
  289. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  290. ring 0
  291. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  292. ring 1
  293. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  294. ring 2
  295. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  296. ring 3
  297. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  298. ring 4
  299. <legal all>
  300. */
  301. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  302. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  303. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  304. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  305. Cookie field exclusively used by SW.
  306. In case of 'NULL' pointer, this field is set to 0
  307. HW ignores the contents, accept that it passes the
  308. programmed value on to other descriptors together with the
  309. physical address
  310. Field can be used by SW to for example associate the
  311. buffers physical address with the virtual address
  312. The bit definitions as used by SW are within SW HLD
  313. specification
  314. NOTE:
  315. The three most significant bits can have a special
  316. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  317. STRUCT, and field transmit_bw_restriction is set
  318. In case of NON punctured transmission:
  319. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  320. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  321. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  322. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  323. In case of punctured transmission:
  324. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  325. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  326. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  327. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  328. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  329. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  330. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  331. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  332. Note: a punctured transmission is indicated by the
  333. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  334. TLV
  335. <legal all>
  336. */
  337. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  338. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  339. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  340. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  341. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  342. Consumer: REO/SW/FW
  343. Producer: RXDMA
  344. The number of MSDUs within the MPDU
  345. <legal all>
  346. */
  347. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  348. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  349. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  350. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  351. Consumer: REO/SW/FW
  352. Producer: RXDMA
  353. The field can have two different meanings based on the
  354. setting of field 'BAR_frame':
  355. 'BAR_frame' is NOT set:
  356. The MPDU sequence number of the received frame.
  357. 'BAR_frame' is set.
  358. The MPDU Start sequence number from the BAR frame
  359. <legal all>
  360. */
  361. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  362. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  363. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  364. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  365. Consumer: REO/SW/FW
  366. Producer: RXDMA
  367. When set, this MPDU is a fragment and REO should forward
  368. this fragment MPDU to the REO destination ring without any
  369. reorder checks, pn checks or bitmap update. This implies
  370. that REO is forwarding the pointer to the MSDU link
  371. descriptor. The destination ring is coming from a
  372. programmable register setting in REO
  373. <legal all>
  374. */
  375. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  376. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  377. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  378. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  379. Consumer: REO/SW/FW
  380. Producer: RXDMA
  381. The retry bit setting from the MPDU header of the
  382. received frame
  383. <legal all>
  384. */
  385. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  386. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  387. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  388. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  389. Consumer: REO/SW/FW
  390. Producer: RXDMA
  391. When set, the MPDU was received as part of an A-MPDU.
  392. <legal all>
  393. */
  394. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  395. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  396. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  397. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  398. Consumer: REO/SW/FW
  399. Producer: RXDMA
  400. When set, the received frame is a BAR frame. After
  401. processing, this frame shall be pushed to SW or deleted.
  402. <legal all>
  403. */
  404. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  405. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  406. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  407. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  408. Consumer: REO/SW/FW
  409. Producer: RXDMA
  410. Copied here by RXDMA from RX_MPDU_END
  411. When not set, REO will Not perform a PN sequence number
  412. check
  413. */
  414. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  415. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  416. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  417. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  418. When set, OLE found a valid SA entry for all MSDUs in
  419. this MPDU
  420. <legal all>
  421. */
  422. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  423. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  424. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  425. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  426. When set, at least 1 MSDU within the MPDU has an
  427. unsuccessful MAC source address search due to the expiration
  428. of the search timer.
  429. <legal all>
  430. */
  431. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  432. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  433. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  434. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  435. When set, OLE found a valid DA entry for all MSDUs in
  436. this MPDU
  437. <legal all>
  438. */
  439. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  440. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  441. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  442. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  443. Field Only valid if da_is_valid is set
  444. When set, at least one of the DA addresses is a
  445. Multicast or Broadcast address.
  446. <legal all>
  447. */
  448. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  449. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  450. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  451. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  452. When set, at least 1 MSDU within the MPDU has an
  453. unsuccessful MAC destination address search due to the
  454. expiration of the search timer.
  455. <legal all>
  456. */
  457. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  458. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  459. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  460. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  461. Field only valid when first_msdu_in_mpdu_flag is set.
  462. When set, the contents in the MSDU buffer contains a
  463. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  464. multiple MSDU buffers.
  465. <legal all>
  466. */
  467. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  468. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  469. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  470. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  471. The More Fragment bit setting from the MPDU header of
  472. the received frame
  473. <legal all>
  474. */
  475. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  476. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  477. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  478. /* Description REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  479. Meta data that SW has programmed in the Peer table entry
  480. of the transmitting STA.
  481. <legal all>
  482. */
  483. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  484. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  485. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  486. /* EXTERNAL REFERENCE : struct rx_msdu_desc_info rx_msdu_desc_info_details */
  487. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG
  488. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  489. over multiple buffers, this field will be valid in the Last
  490. buffer used by the MSDU
  491. <enum 0 Not_first_msdu> This is not the first MSDU in
  492. the MPDU.
  493. <enum 1 first_msdu> This MSDU is the first one in the
  494. MPDU.
  495. <legal all>
  496. */
  497. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  498. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  499. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  500. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG
  501. Consumer: WBM/REO/SW/FW
  502. Producer: RXDMA
  503. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  504. over multiple buffers, this field will be valid in the Last
  505. buffer used by the MSDU
  506. <enum 0 Not_last_msdu> There are more MSDUs linked to
  507. this MSDU that belongs to this MPDU
  508. <enum 1 Last_msdu> this MSDU is the last one in the
  509. MPDU. This setting is only allowed in combination with
  510. 'Msdu_continuation' set to 0. This implies that when an msdu
  511. is spread out over multiple buffers and thus
  512. msdu_continuation is set, only for the very last buffer of
  513. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  514. When both first_msdu_in_mpdu_flag and
  515. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  516. belongs to only contains a single MSDU.
  517. <legal all>
  518. */
  519. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  520. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  521. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  522. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION
  523. When set, this MSDU buffer was not able to hold the
  524. entire MSDU. The next buffer will therefor contain
  525. additional information related to this MSDU.
  526. <legal all>
  527. */
  528. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000010
  529. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
  530. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
  531. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH
  532. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  533. over multiple buffers, this field will be valid in the First
  534. buffer used by MSDU.
  535. Full MSDU length in bytes after decapsulation.
  536. This field is still valid for MPDU frames without
  537. A-MSDU. It still represents MSDU length after decapsulation
  538. Or in case of RAW MPDUs, it indicates the length of the
  539. entire MPDU (without FCS field)
  540. <legal all>
  541. */
  542. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000010
  543. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
  544. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
  545. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION
  546. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  547. over multiple buffers, this field will be valid in the Last
  548. buffer used by the MSDU
  549. The ID of the REO exit ring where the MSDU frame shall
  550. push after (MPDU level) reordering has finished.
  551. <enum 0 reo_destination_tcl> Reo will push the frame
  552. into the REO2TCL ring
  553. <enum 1 reo_destination_sw1> Reo will push the frame
  554. into the REO2SW1 ring
  555. <enum 2 reo_destination_sw2> Reo will push the frame
  556. into the REO2SW2 ring
  557. <enum 3 reo_destination_sw3> Reo will push the frame
  558. into the REO2SW3 ring
  559. <enum 4 reo_destination_sw4> Reo will push the frame
  560. into the REO2SW4 ring
  561. <enum 5 reo_destination_release> Reo will push the frame
  562. into the REO_release ring
  563. <enum 6 reo_destination_fw> Reo will push the frame into
  564. the REO2FW ring
  565. <enum 7 reo_destination_sw5> Reo will push the frame
  566. into the REO2SW5 ring
  567. <enum 8 reo_destination_sw6> Reo will push the frame
  568. into the REO2SW6 ring
  569. <enum 9 reo_destination_9> REO remaps this <enum 10
  570. reo_destination_10> REO remaps this
  571. <enum 11 reo_destination_11> REO remaps this
  572. <enum 12 reo_destination_12> REO remaps this <enum 13
  573. reo_destination_13> REO remaps this
  574. <enum 14 reo_destination_14> REO remaps this
  575. <enum 15 reo_destination_15> REO remaps this
  576. <enum 16 reo_destination_16> REO remaps this
  577. <enum 17 reo_destination_17> REO remaps this
  578. <enum 18 reo_destination_18> REO remaps this
  579. <enum 19 reo_destination_19> REO remaps this
  580. <enum 20 reo_destination_20> REO remaps this
  581. <enum 21 reo_destination_21> REO remaps this
  582. <enum 22 reo_destination_22> REO remaps this
  583. <enum 23 reo_destination_23> REO remaps this
  584. <enum 24 reo_destination_24> REO remaps this
  585. <enum 25 reo_destination_25> REO remaps this
  586. <enum 26 reo_destination_26> REO remaps this
  587. <enum 27 reo_destination_27> REO remaps this
  588. <enum 28 reo_destination_28> REO remaps this
  589. <enum 29 reo_destination_29> REO remaps this
  590. <enum 30 reo_destination_30> REO remaps this
  591. <enum 31 reo_destination_31> REO remaps this
  592. <legal all>
  593. */
  594. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000010
  595. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 17
  596. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x003e0000
  597. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP
  598. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  599. over multiple buffers, this field will be valid in the Last
  600. buffer used by the MSDU
  601. When set, REO shall drop this MSDU and not forward it to
  602. any other ring...
  603. <legal all>
  604. */
  605. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000010
  606. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 22
  607. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00400000
  608. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID
  609. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  610. over multiple buffers, this field will be valid in the Last
  611. buffer used by the MSDU
  612. Indicates that OLE found a valid SA entry for this MSDU
  613. <legal all>
  614. */
  615. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000010
  616. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 23
  617. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00800000
  618. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  619. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  620. over multiple buffers, this field will be valid in the Last
  621. buffer used by the MSDU
  622. Indicates an unsuccessful MAC source address search due
  623. to the expiring of the search timer for this MSDU
  624. <legal all>
  625. */
  626. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000010
  627. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 24
  628. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x01000000
  629. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID
  630. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  631. over multiple buffers, this field will be valid in the Last
  632. buffer used by the MSDU
  633. Indicates that OLE found a valid DA entry for this MSDU
  634. <legal all>
  635. */
  636. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000010
  637. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 25
  638. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x02000000
  639. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC
  640. Field Only valid if da_is_valid is set
  641. Indicates the DA address was a Multicast of Broadcast
  642. address for this MSDU
  643. <legal all>
  644. */
  645. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000010
  646. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 26
  647. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x04000000
  648. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  649. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  650. over multiple buffers, this field will be valid in the Last
  651. buffer used by the MSDU
  652. Indicates an unsuccessful MAC destination address search
  653. due to the expiring of the search timer for this MSDU
  654. <legal all>
  655. */
  656. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000010
  657. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 27
  658. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x08000000
  659. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A
  660. <legal 0>
  661. */
  662. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000010
  663. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 28
  664. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xf0000000
  665. /* Description REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A
  666. <legal 0>
  667. */
  668. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000014
  669. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_LSB 0
  670. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_MASK 0xffffffff
  671. /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
  672. Consumer: REO
  673. Producer: RXDMA
  674. Address (lower 32 bits) of the REO queue descriptor.
  675. <legal all>
  676. */
  677. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
  678. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  679. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  680. /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
  681. Consumer: REO
  682. Producer: RXDMA
  683. Address (upper 8 bits) of the REO queue descriptor.
  684. <legal all>
  685. */
  686. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
  687. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  688. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  689. /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
  690. Indicates the type of address provided in the
  691. 'Buf_or_link_desc_addr_info'
  692. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  693. <enum 1 MSDU_link_desc_address> The address of the MSDU
  694. link descriptor.
  695. <legal all>
  696. */
  697. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  698. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
  699. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
  700. /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
  701. Indicates why REO pushed the frame to this exit ring
  702. <enum 0 reo_error_detected> Reo detected an error an
  703. pushed this frame to this queue
  704. <enum 1 reo_routing_instruction> Reo pushed the frame to
  705. this queue per received routing instructions. No error
  706. within REO was detected
  707. <legal 0 - 1>
  708. */
  709. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
  710. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
  711. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
  712. /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
  713. Field only valid when 'Reo_push_reason' set to
  714. 'reo_error_detected'.
  715. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  716. provided in the REO_ENTRANCE ring is set to 0
  717. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  718. valid bit is NOT set
  719. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  720. session having been setup.
  721. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  722. SSN, Retry bit set: duplicate frame
  723. <enum 4 ba_duplicate> BA session, duplicate frame
  724. <enum 5 regular_frame_2k_jump> A normal (management/data
  725. frame) received with 2K jump in SN
  726. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  727. in SSN
  728. <enum 7 regular_frame_OOR> A normal (management/data
  729. frame) received with SN falling within the OOR window
  730. <enum 8 bar_frame_OOR> A bar received with SSN falling
  731. within the OOR window
  732. <enum 9 bar_frame_no_ba_session> A bar received without
  733. a BA session
  734. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  735. SSN equal to SN
  736. <enum 11 pn_check_failed> PN Check Failed packet.
  737. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  738. as a result of the 'Seq_2k_error_detected_flag' been set in
  739. the REO Queue descriptor
  740. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  741. as a result of the 'pn_error_detected_flag' been set in the
  742. REO Queue descriptor
  743. <enum 14 queue_descriptor_blocked_set> Frame is
  744. forwarded as a result of the queue descriptor(address) being
  745. blocked as SW/FW seems to be currently in the process of
  746. making updates to this descriptor...
  747. <legal 0-14>
  748. */
  749. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
  750. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
  751. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
  752. /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
  753. This field in NOT valid (should be set to 0), when
  754. SW_exception is set.
  755. This field indicates the REO MPDU reorder queue ID from
  756. which this frame originated. This field is populated from a
  757. field with the same name in the RX_REO_QUEUE descriptor.
  758. <legal all>
  759. */
  760. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
  761. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
  762. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
  763. /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
  764. This field in NOT valid (should be set to 0), when
  765. SW_exception is set.
  766. When set, REO has been instructed to not perform the
  767. actual re-ordering of frames for this queue, but just to
  768. insert the reorder opcodes
  769. <legal all>
  770. */
  771. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
  772. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
  773. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
  774. /* Description REO_DESTINATION_RING_8_REORDER_OPCODE
  775. Field is valid when 'Soft_reorder_info_valid' is set.
  776. This field is always valid for debug purpose as well.
  777. Details are in the MLD.
  778. <enum 0 invalid>
  779. <enum 1 fwdcur_fwdbuf>
  780. <enum 2 fwdbuf_fwdcur>
  781. <enum 3 qcur>
  782. <enum 4 fwdbuf_qcur>
  783. <enum 5 fwdbuf_drop>
  784. <enum 6 fwdall_drop>
  785. <enum 7 fwdall_qcur>
  786. <enum 8 reserved_reo_opcode_1>
  787. <enum 9 dropcur> the error reason code is in
  788. reo_error_code field.
  789. <enum 10 reserved_reo_opcode_2>
  790. <enum 11 reserved_reo_opcode_3>
  791. <enum 12 reserved_reo_opcode_4>
  792. <enum 13 reserved_reo_opcode_5>
  793. <enum 14 reserved_reo_opcode_6>
  794. <enum 15 reserved_reo_opcode_7>
  795. <legal all>
  796. */
  797. #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
  798. #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
  799. #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
  800. /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
  801. Field only valid when 'Soft_reorder_info_valid' is set.
  802. TODO: add description
  803. <legal all>
  804. */
  805. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
  806. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
  807. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
  808. /* Description REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER
  809. Field only valid when Rx_mpdu_desc_info_details.
  810. Fragment_flag is set.
  811. The fragment number from the 802.11 header.
  812. Note that the sequence number is embedded in the field:
  813. Rx_mpdu_desc_info_details. Mpdu_sequence_number
  814. <legal all>
  815. */
  816. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000020
  817. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_LSB 13
  818. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_MASK 0x0001e000
  819. /* Description REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE
  820. The number of following REO_DESTINATION STRUCTs that
  821. have been replaced with msdu_data extracted from the
  822. msdu_buffer and copied into the ring for easy FW/SW access.
  823. Note that it is possible that these STRUCTs wrap around
  824. the end of the ring.
  825. Feature supported only in HastingsPrime
  826. <legal 0-4>
  827. */
  828. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_OFFSET 0x00000020
  829. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_LSB 17
  830. #define REO_DESTINATION_RING_8_CAPTURED_MSDU_DATA_SIZE_MASK 0x001e0000
  831. /* Description REO_DESTINATION_RING_8_SW_EXCEPTION
  832. This field has the same setting as the SW_exception
  833. field in the corresponding REO_entrance_ring descriptor.
  834. When set, the REO entrance descriptor is generated by
  835. FW, and the MPDU was processed in the following way:
  836. - NO re-order function is needed.
  837. - MPDU delinking is determined by the setting of
  838. Entrance ring field: SW_excection_mpdu_delink
  839. - Destination ring selection is based on the setting of
  840. Feature supported only in HastingsPrime
  841. <legal all>
  842. */
  843. #define REO_DESTINATION_RING_8_SW_EXCEPTION_OFFSET 0x00000020
  844. #define REO_DESTINATION_RING_8_SW_EXCEPTION_LSB 21
  845. #define REO_DESTINATION_RING_8_SW_EXCEPTION_MASK 0x00200000
  846. /* Description REO_DESTINATION_RING_8_RESERVED_8A
  847. <legal 0>
  848. */
  849. #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
  850. #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 22
  851. #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xffc00000
  852. /* Description REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE
  853. Set to value 0x8888_88888 when msdu capture mode is
  854. enabled for this ring (supported only in HastingsPrime)
  855. <legal 0, 2290649224 >
  856. */
  857. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_OFFSET 0x00000024
  858. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_LSB 0
  859. #define REO_DESTINATION_RING_9_REO_DESTINATION_STRUCT_SIGNATURE_MASK 0xffffffff
  860. /* Description REO_DESTINATION_RING_10_RESERVED_10A
  861. <legal 0>
  862. */
  863. #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
  864. #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
  865. #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
  866. /* Description REO_DESTINATION_RING_11_RESERVED_11A
  867. <legal 0>
  868. */
  869. #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
  870. #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
  871. #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
  872. /* Description REO_DESTINATION_RING_12_RESERVED_12A
  873. <legal 0>
  874. */
  875. #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
  876. #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
  877. #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
  878. /* Description REO_DESTINATION_RING_13_RESERVED_13A
  879. <legal 0>
  880. */
  881. #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
  882. #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
  883. #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
  884. /* Description REO_DESTINATION_RING_14_RESERVED_14A
  885. <legal 0>
  886. */
  887. #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
  888. #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
  889. #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
  890. /* Description REO_DESTINATION_RING_15_RESERVED_15
  891. <legal 0>
  892. */
  893. #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
  894. #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
  895. #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
  896. /* Description REO_DESTINATION_RING_15_RING_ID
  897. The buffer pointer ring ID.
  898. 0 refers to the IDLE ring
  899. 1 - N refers to other rings
  900. Helps with debugging when dumping ring contents.
  901. <legal all>
  902. */
  903. #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
  904. #define REO_DESTINATION_RING_15_RING_ID_LSB 20
  905. #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
  906. /* Description REO_DESTINATION_RING_15_LOOPING_COUNT
  907. A count value that indicates the number of times the
  908. producer of entries into this Ring has looped around the
  909. ring.
  910. At initialization time, this value is set to 0. On the
  911. first loop, this value is set to 1. After the max value is
  912. reached allowed by the number of bits for this field, the
  913. count value continues with 0 again.
  914. In case SW is the consumer of the ring entries, it can
  915. use this field to figure out up to where the producer of
  916. entries has created new entries. This eliminates the need to
  917. check where the head pointer' of the ring is located once
  918. the SW starts processing an interrupt indicating that new
  919. entries have been put into this ring...
  920. Also note that SW if it wants only needs to look at the
  921. LSB bit of this count value.
  922. <legal all>
  923. */
  924. #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
  925. #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
  926. #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
  927. #endif // _REO_DESTINATION_RING_H_