buffer_addr_info.h 8.2 KB

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  1. /*
  2. * Copyright (c) 2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _BUFFER_ADDR_INFO_H_
  22. #define _BUFFER_ADDR_INFO_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. // ################ START SUMMARY #################
  26. //
  27. // Dword Fields
  28. // 0 buffer_addr_31_0[31:0]
  29. // 1 buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
  30. //
  31. // ################ END SUMMARY #################
  32. #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
  33. struct buffer_addr_info {
  34. uint32_t buffer_addr_31_0 : 32; //[31:0]
  35. uint32_t buffer_addr_39_32 : 8, //[7:0]
  36. return_buffer_manager : 3, //[10:8]
  37. sw_buffer_cookie : 21; //[31:11]
  38. };
  39. /*
  40. buffer_addr_31_0
  41. Address (lower 32 bits) of the MSDU buffer OR
  42. MSDU_EXTENSION descriptor OR Link Descriptor
  43. In case of 'NULL' pointer, this field is set to 0
  44. <legal all>
  45. buffer_addr_39_32
  46. Address (upper 8 bits) of the MSDU buffer OR
  47. MSDU_EXTENSION descriptor OR Link Descriptor
  48. In case of 'NULL' pointer, this field is set to 0
  49. <legal all>
  50. return_buffer_manager
  51. Consumer: WBM
  52. Producer: SW/FW
  53. In case of 'NULL' pointer, this field is set to 0
  54. Indicates to which buffer manager the buffer OR
  55. MSDU_EXTENSION descriptor OR link descriptor that is being
  56. pointed to shall be returned after the frame has been
  57. processed. It is used by WBM for routing purposes.
  58. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  59. to the WMB buffer idle list
  60. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  61. returned to the WMB idle link descriptor idle list
  62. <enum 2 FW_BM> This buffer shall be returned to the FW
  63. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  64. ring 0
  65. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  66. ring 1
  67. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  68. ring 2
  69. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  70. ring 3
  71. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  72. ring 4
  73. <legal all>
  74. sw_buffer_cookie
  75. Cookie field exclusively used by SW.
  76. In case of 'NULL' pointer, this field is set to 0
  77. HW ignores the contents, accept that it passes the
  78. programmed value on to other descriptors together with the
  79. physical address
  80. Field can be used by SW to for example associate the
  81. buffers physical address with the virtual address
  82. The bit definitions as used by SW are within SW HLD
  83. specification
  84. NOTE:
  85. The three most significant bits can have a special
  86. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  87. STRUCT, and field transmit_bw_restriction is set
  88. In case of NON punctured transmission:
  89. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  90. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  91. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  92. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  93. In case of punctured transmission:
  94. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  95. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  96. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  97. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  98. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  99. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  100. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  101. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  102. Note: a punctured transmission is indicated by the
  103. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  104. TLV
  105. <legal all>
  106. */
  107. /* Description BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
  108. Address (lower 32 bits) of the MSDU buffer OR
  109. MSDU_EXTENSION descriptor OR Link Descriptor
  110. In case of 'NULL' pointer, this field is set to 0
  111. <legal all>
  112. */
  113. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET 0x00000000
  114. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB 0
  115. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK 0xffffffff
  116. /* Description BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
  117. Address (upper 8 bits) of the MSDU buffer OR
  118. MSDU_EXTENSION descriptor OR Link Descriptor
  119. In case of 'NULL' pointer, this field is set to 0
  120. <legal all>
  121. */
  122. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET 0x00000004
  123. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB 0
  124. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK 0x000000ff
  125. /* Description BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
  126. Consumer: WBM
  127. Producer: SW/FW
  128. In case of 'NULL' pointer, this field is set to 0
  129. Indicates to which buffer manager the buffer OR
  130. MSDU_EXTENSION descriptor OR link descriptor that is being
  131. pointed to shall be returned after the frame has been
  132. processed. It is used by WBM for routing purposes.
  133. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  134. to the WMB buffer idle list
  135. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  136. returned to the WMB idle link descriptor idle list
  137. <enum 2 FW_BM> This buffer shall be returned to the FW
  138. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  139. ring 0
  140. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  141. ring 1
  142. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  143. ring 2
  144. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  145. ring 3
  146. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  147. ring 4
  148. <legal all>
  149. */
  150. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  151. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB 8
  152. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK 0x00000700
  153. /* Description BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
  154. Cookie field exclusively used by SW.
  155. In case of 'NULL' pointer, this field is set to 0
  156. HW ignores the contents, accept that it passes the
  157. programmed value on to other descriptors together with the
  158. physical address
  159. Field can be used by SW to for example associate the
  160. buffers physical address with the virtual address
  161. The bit definitions as used by SW are within SW HLD
  162. specification
  163. NOTE:
  164. The three most significant bits can have a special
  165. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  166. STRUCT, and field transmit_bw_restriction is set
  167. In case of NON punctured transmission:
  168. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  169. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  170. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  171. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  172. In case of punctured transmission:
  173. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  174. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  175. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  176. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  177. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  178. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  179. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  180. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  181. Note: a punctured transmission is indicated by the
  182. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  183. TLV
  184. <legal all>
  185. */
  186. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET 0x00000004
  187. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB 11
  188. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK 0xfffff800
  189. #endif // _BUFFER_ADDR_INFO_H_