rx_msdu_start.h 35 KB

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  1. /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _RX_MSDU_START_H_
  16. #define _RX_MSDU_START_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #define NUM_OF_DWORDS_RX_MSDU_START 10
  20. #define NUM_OF_QWORDS_RX_MSDU_START 5
  21. struct rx_msdu_start {
  22. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  23. uint32_t rxpcu_mpdu_filter_in_category : 2, // [1:0]
  24. sw_frame_group_id : 7, // [8:2]
  25. reserved_0 : 7, // [15:9]
  26. phy_ppdu_id : 16; // [31:16]
  27. uint32_t msdu_length : 14, // [13:0]
  28. stbc : 1, // [14:14]
  29. ipsec_esp : 1, // [15:15]
  30. l3_offset : 7, // [22:16]
  31. ipsec_ah : 1, // [23:23]
  32. l4_offset : 8; // [31:24]
  33. uint32_t msdu_number : 8, // [7:0]
  34. decap_format : 2, // [9:8]
  35. ipv4_proto : 1, // [10:10]
  36. ipv6_proto : 1, // [11:11]
  37. tcp_proto : 1, // [12:12]
  38. udp_proto : 1, // [13:13]
  39. ip_frag : 1, // [14:14]
  40. tcp_only_ack : 1, // [15:15]
  41. da_is_bcast_mcast : 1, // [16:16]
  42. toeplitz_hash_sel : 2, // [18:17]
  43. ip_fixed_header_valid : 1, // [19:19]
  44. ip_extn_header_valid : 1, // [20:20]
  45. tcp_udp_header_valid : 1, // [21:21]
  46. mesh_control_present : 1, // [22:22]
  47. ldpc : 1, // [23:23]
  48. ip4_protocol_ip6_next_header : 8; // [31:24]
  49. uint32_t toeplitz_hash_2_or_4 : 32; // [31:0]
  50. uint32_t flow_id_toeplitz : 32; // [31:0]
  51. uint32_t user_rssi : 8, // [7:0]
  52. pkt_type : 4, // [11:8]
  53. sgi : 2, // [13:12]
  54. rate_mcs : 4, // [17:14]
  55. receive_bandwidth : 3, // [20:18]
  56. reception_type : 3, // [23:21]
  57. mimo_ss_bitmap : 8; // [31:24]
  58. uint32_t ppdu_start_timestamp_31_0 : 32; // [31:0]
  59. uint32_t ppdu_start_timestamp_63_32 : 32; // [31:0]
  60. uint32_t sw_phy_meta_data : 32; // [31:0]
  61. uint32_t vlan_ctag_ci : 16, // [15:0]
  62. vlan_stag_ci : 16; // [31:16]
  63. #else
  64. uint32_t phy_ppdu_id : 16, // [31:16]
  65. reserved_0 : 7, // [15:9]
  66. sw_frame_group_id : 7, // [8:2]
  67. rxpcu_mpdu_filter_in_category : 2; // [1:0]
  68. uint32_t l4_offset : 8, // [31:24]
  69. ipsec_ah : 1, // [23:23]
  70. l3_offset : 7, // [22:16]
  71. ipsec_esp : 1, // [15:15]
  72. stbc : 1, // [14:14]
  73. msdu_length : 14; // [13:0]
  74. uint32_t ip4_protocol_ip6_next_header : 8, // [31:24]
  75. ldpc : 1, // [23:23]
  76. mesh_control_present : 1, // [22:22]
  77. tcp_udp_header_valid : 1, // [21:21]
  78. ip_extn_header_valid : 1, // [20:20]
  79. ip_fixed_header_valid : 1, // [19:19]
  80. toeplitz_hash_sel : 2, // [18:17]
  81. da_is_bcast_mcast : 1, // [16:16]
  82. tcp_only_ack : 1, // [15:15]
  83. ip_frag : 1, // [14:14]
  84. udp_proto : 1, // [13:13]
  85. tcp_proto : 1, // [12:12]
  86. ipv6_proto : 1, // [11:11]
  87. ipv4_proto : 1, // [10:10]
  88. decap_format : 2, // [9:8]
  89. msdu_number : 8; // [7:0]
  90. uint32_t toeplitz_hash_2_or_4 : 32; // [31:0]
  91. uint32_t flow_id_toeplitz : 32; // [31:0]
  92. uint32_t mimo_ss_bitmap : 8, // [31:24]
  93. reception_type : 3, // [23:21]
  94. receive_bandwidth : 3, // [20:18]
  95. rate_mcs : 4, // [17:14]
  96. sgi : 2, // [13:12]
  97. pkt_type : 4, // [11:8]
  98. user_rssi : 8; // [7:0]
  99. uint32_t ppdu_start_timestamp_31_0 : 32; // [31:0]
  100. uint32_t ppdu_start_timestamp_63_32 : 32; // [31:0]
  101. uint32_t sw_phy_meta_data : 32; // [31:0]
  102. uint32_t vlan_stag_ci : 16, // [31:16]
  103. vlan_ctag_ci : 16; // [15:0]
  104. #endif
  105. };
  106. /* Description RXPCU_MPDU_FILTER_IN_CATEGORY
  107. Field indicates what the reason was that this MPDU frame
  108. was allowed to come into the receive path by RXPCU
  109. <enum 0 rxpcu_filter_pass> This MPDU passed the normal frame
  110. filter programming of rxpcu
  111. <enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
  112. regular frame filter and would have been dropped, were
  113. it not for the frame fitting into the 'monitor_client' category.
  114. <enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
  115. regular frame filter and also did not pass the rxpcu_monitor_client
  116. filter. It would have been dropped accept that it did pass
  117. the 'monitor_other' category.
  118. <enum 3 rxpcu_filter_pass_monitor_ovrd> This MPDU passed
  119. the normal frame filter programming of RXPCU but additionally
  120. fit into the 'monitor_override_client' category.
  121. <legal 0-3>
  122. */
  123. #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000
  124. #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0
  125. #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1
  126. #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003
  127. /* Description SW_FRAME_GROUP_ID
  128. SW processes frames based on certain classifications. This
  129. field indicates to what sw classification this MPDU is
  130. mapped.
  131. The classification is given in priority order
  132. <enum 0 sw_frame_group_NDP_frame>
  133. <enum 1 sw_frame_group_Multicast_data>
  134. <enum 2 sw_frame_group_Unicast_data>
  135. <enum 3 sw_frame_group_Null_data > This includes mpdus of
  136. type Data Null.
  137. Hamilton v1 included QoS Data Null as well here.
  138. <enum 38 sw_frame_group_QoS_Null_data> This includes QoS
  139. Null frames except in UL MU or TB PPDUs.
  140. <enum 39 sw_frame_group_QoS_Null_data_TB> This includes
  141. QoS Null frames in UL MU or TB PPDUs.
  142. <enum 4 sw_frame_group_mgmt_0000 >
  143. <enum 5 sw_frame_group_mgmt_0001 >
  144. <enum 6 sw_frame_group_mgmt_0010 >
  145. <enum 7 sw_frame_group_mgmt_0011 >
  146. <enum 8 sw_frame_group_mgmt_0100 >
  147. <enum 9 sw_frame_group_mgmt_0101 >
  148. <enum 10 sw_frame_group_mgmt_0110 >
  149. <enum 11 sw_frame_group_mgmt_0111 >
  150. <enum 12 sw_frame_group_mgmt_1000 >
  151. <enum 13 sw_frame_group_mgmt_1001 >
  152. <enum 14 sw_frame_group_mgmt_1010 >
  153. <enum 15 sw_frame_group_mgmt_1011 >
  154. <enum 16 sw_frame_group_mgmt_1100 >
  155. <enum 17 sw_frame_group_mgmt_1101 >
  156. <enum 18 sw_frame_group_mgmt_1110 >
  157. <enum 19 sw_frame_group_mgmt_1111 >
  158. <enum 20 sw_frame_group_ctrl_0000 >
  159. <enum 21 sw_frame_group_ctrl_0001 >
  160. <enum 22 sw_frame_group_ctrl_0010 >
  161. <enum 23 sw_frame_group_ctrl_0011 >
  162. <enum 24 sw_frame_group_ctrl_0100 >
  163. <enum 25 sw_frame_group_ctrl_0101 >
  164. <enum 26 sw_frame_group_ctrl_0110 >
  165. <enum 27 sw_frame_group_ctrl_0111 >
  166. <enum 28 sw_frame_group_ctrl_1000 >
  167. <enum 29 sw_frame_group_ctrl_1001 >
  168. <enum 30 sw_frame_group_ctrl_1010 >
  169. <enum 31 sw_frame_group_ctrl_1011 >
  170. <enum 32 sw_frame_group_ctrl_1100 >
  171. <enum 33 sw_frame_group_ctrl_1101 >
  172. <enum 34 sw_frame_group_ctrl_1110 >
  173. <enum 35 sw_frame_group_ctrl_1111 >
  174. <enum 36 sw_frame_group_unsupported> This covers type 3
  175. and protocol version != 0
  176. <enum 37 sw_frame_group_phy_error> PHY reported an error
  177. <legal 0-39>
  178. */
  179. #define RX_MSDU_START_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000
  180. #define RX_MSDU_START_SW_FRAME_GROUP_ID_LSB 2
  181. #define RX_MSDU_START_SW_FRAME_GROUP_ID_MSB 8
  182. #define RX_MSDU_START_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc
  183. /* Description RESERVED_0
  184. <legal 0>
  185. */
  186. #define RX_MSDU_START_RESERVED_0_OFFSET 0x0000000000000000
  187. #define RX_MSDU_START_RESERVED_0_LSB 9
  188. #define RX_MSDU_START_RESERVED_0_MSB 15
  189. #define RX_MSDU_START_RESERVED_0_MASK 0x000000000000fe00
  190. /* Description PHY_PPDU_ID
  191. A ppdu counter value that PHY increments for every PPDU
  192. received. The counter value wraps around
  193. <legal all>
  194. */
  195. #define RX_MSDU_START_PHY_PPDU_ID_OFFSET 0x0000000000000000
  196. #define RX_MSDU_START_PHY_PPDU_ID_LSB 16
  197. #define RX_MSDU_START_PHY_PPDU_ID_MSB 31
  198. #define RX_MSDU_START_PHY_PPDU_ID_MASK 0x00000000ffff0000
  199. /* Description MSDU_LENGTH
  200. MSDU length in bytes after decapsulation.
  201. This field is still valid for MPDU frames without A-MSDU.
  202. It still represents MSDU length after decapsulation
  203. */
  204. #define RX_MSDU_START_MSDU_LENGTH_OFFSET 0x0000000000000000
  205. #define RX_MSDU_START_MSDU_LENGTH_LSB 32
  206. #define RX_MSDU_START_MSDU_LENGTH_MSB 45
  207. #define RX_MSDU_START_MSDU_LENGTH_MASK 0x00003fff00000000
  208. /* Description STBC
  209. When set, use STBC transmission rates
  210. */
  211. #define RX_MSDU_START_STBC_OFFSET 0x0000000000000000
  212. #define RX_MSDU_START_STBC_LSB 46
  213. #define RX_MSDU_START_STBC_MSB 46
  214. #define RX_MSDU_START_STBC_MASK 0x0000400000000000
  215. /* Description IPSEC_ESP
  216. Set if IPv4/v6 packet is using IPsec ESP
  217. */
  218. #define RX_MSDU_START_IPSEC_ESP_OFFSET 0x0000000000000000
  219. #define RX_MSDU_START_IPSEC_ESP_LSB 47
  220. #define RX_MSDU_START_IPSEC_ESP_MSB 47
  221. #define RX_MSDU_START_IPSEC_ESP_MASK 0x0000800000000000
  222. /* Description L3_OFFSET
  223. Depending upon mode bit, this field either indicates the
  224. L3 offset in bytes from the start of the RX_HEADER or the
  225. IP offset in bytes from the start of the packet after decapsulation.
  226. The latter is only valid if ipv4_proto or ipv6_proto is
  227. set.
  228. */
  229. #define RX_MSDU_START_L3_OFFSET_OFFSET 0x0000000000000000
  230. #define RX_MSDU_START_L3_OFFSET_LSB 48
  231. #define RX_MSDU_START_L3_OFFSET_MSB 54
  232. #define RX_MSDU_START_L3_OFFSET_MASK 0x007f000000000000
  233. /* Description IPSEC_AH
  234. Set if IPv4/v6 packet is using IPsec AH
  235. */
  236. #define RX_MSDU_START_IPSEC_AH_OFFSET 0x0000000000000000
  237. #define RX_MSDU_START_IPSEC_AH_LSB 55
  238. #define RX_MSDU_START_IPSEC_AH_MSB 55
  239. #define RX_MSDU_START_IPSEC_AH_MASK 0x0080000000000000
  240. /* Description L4_OFFSET
  241. Depending upon mode bit, this field either indicates the
  242. L4 offset nin bytes from the start of RX_HEADER(only valid
  243. if either ipv4_proto or ipv6_proto is set to 1) or indicates
  244. the offset in bytes to the start of TCP or UDP header from
  245. the start of the IP header after decapsulation(Only valid
  246. if tcp_proto or udp_proto is set). The value 0 indicates
  247. that the offset is longer than 127 bytes.
  248. */
  249. #define RX_MSDU_START_L4_OFFSET_OFFSET 0x0000000000000000
  250. #define RX_MSDU_START_L4_OFFSET_LSB 56
  251. #define RX_MSDU_START_L4_OFFSET_MSB 63
  252. #define RX_MSDU_START_L4_OFFSET_MASK 0xff00000000000000
  253. /* Description MSDU_NUMBER
  254. Indicates the MSDU number within a MPDU. This value is
  255. reset to zero at the start of each MPDU. If the number
  256. of MSDU exceeds 255 this number will wrap using modulo 256.
  257. */
  258. #define RX_MSDU_START_MSDU_NUMBER_OFFSET 0x0000000000000008
  259. #define RX_MSDU_START_MSDU_NUMBER_LSB 0
  260. #define RX_MSDU_START_MSDU_NUMBER_MSB 7
  261. #define RX_MSDU_START_MSDU_NUMBER_MASK 0x00000000000000ff
  262. /* Description DECAP_FORMAT
  263. Indicates the format after decapsulation:
  264. <enum 0 RAW> No encapsulation
  265. <enum 1 Native_WiFi>
  266. <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC)
  267. <enum 3 802_3> Indicate Ethernet
  268. <legal all>
  269. */
  270. #define RX_MSDU_START_DECAP_FORMAT_OFFSET 0x0000000000000008
  271. #define RX_MSDU_START_DECAP_FORMAT_LSB 8
  272. #define RX_MSDU_START_DECAP_FORMAT_MSB 9
  273. #define RX_MSDU_START_DECAP_FORMAT_MASK 0x0000000000000300
  274. /* Description IPV4_PROTO
  275. Set if L2 layer indicates IPv4 protocol.
  276. */
  277. #define RX_MSDU_START_IPV4_PROTO_OFFSET 0x0000000000000008
  278. #define RX_MSDU_START_IPV4_PROTO_LSB 10
  279. #define RX_MSDU_START_IPV4_PROTO_MSB 10
  280. #define RX_MSDU_START_IPV4_PROTO_MASK 0x0000000000000400
  281. /* Description IPV6_PROTO
  282. Set if L2 layer indicates IPv6 protocol.
  283. */
  284. #define RX_MSDU_START_IPV6_PROTO_OFFSET 0x0000000000000008
  285. #define RX_MSDU_START_IPV6_PROTO_LSB 11
  286. #define RX_MSDU_START_IPV6_PROTO_MSB 11
  287. #define RX_MSDU_START_IPV6_PROTO_MASK 0x0000000000000800
  288. /* Description TCP_PROTO
  289. Set if the ipv4_proto or ipv6_proto are set and the IP protocol
  290. indicates TCP.
  291. */
  292. #define RX_MSDU_START_TCP_PROTO_OFFSET 0x0000000000000008
  293. #define RX_MSDU_START_TCP_PROTO_LSB 12
  294. #define RX_MSDU_START_TCP_PROTO_MSB 12
  295. #define RX_MSDU_START_TCP_PROTO_MASK 0x0000000000001000
  296. /* Description UDP_PROTO
  297. Set if the ipv4_proto or ipv6_proto are set and the IP protocol
  298. indicates UDP.
  299. */
  300. #define RX_MSDU_START_UDP_PROTO_OFFSET 0x0000000000000008
  301. #define RX_MSDU_START_UDP_PROTO_LSB 13
  302. #define RX_MSDU_START_UDP_PROTO_MSB 13
  303. #define RX_MSDU_START_UDP_PROTO_MASK 0x0000000000002000
  304. /* Description IP_FRAG
  305. Indicates that either the IP More frag bit is set or IP
  306. frag number is non-zero. If set indicates that this is
  307. a fragmented IP packet.
  308. */
  309. #define RX_MSDU_START_IP_FRAG_OFFSET 0x0000000000000008
  310. #define RX_MSDU_START_IP_FRAG_LSB 14
  311. #define RX_MSDU_START_IP_FRAG_MSB 14
  312. #define RX_MSDU_START_IP_FRAG_MASK 0x0000000000004000
  313. /* Description TCP_ONLY_ACK
  314. Set if only the TCP Ack bit is set in the TCP flags and
  315. if the TCP payload is 0.
  316. */
  317. #define RX_MSDU_START_TCP_ONLY_ACK_OFFSET 0x0000000000000008
  318. #define RX_MSDU_START_TCP_ONLY_ACK_LSB 15
  319. #define RX_MSDU_START_TCP_ONLY_ACK_MSB 15
  320. #define RX_MSDU_START_TCP_ONLY_ACK_MASK 0x0000000000008000
  321. /* Description DA_IS_BCAST_MCAST
  322. The destination address is broadcast or multicast.
  323. */
  324. #define RX_MSDU_START_DA_IS_BCAST_MCAST_OFFSET 0x0000000000000008
  325. #define RX_MSDU_START_DA_IS_BCAST_MCAST_LSB 16
  326. #define RX_MSDU_START_DA_IS_BCAST_MCAST_MSB 16
  327. #define RX_MSDU_START_DA_IS_BCAST_MCAST_MASK 0x0000000000010000
  328. /* Description TOEPLITZ_HASH_SEL
  329. Actual choosen Hash.
  330. 0 -> Toeplitz hash of 2-tuple (IP source address, IP destination
  331. address)1 -> Toeplitz hash of 4-tuple (IP source address,
  332. IP destination address, L4 (TCP/UDP) source port, L4 (TCP/UDP)
  333. destination port)
  334. 2 -> Toeplitz of flow_id
  335. 3 -> "Zero" is used
  336. <legal all>
  337. */
  338. #define RX_MSDU_START_TOEPLITZ_HASH_SEL_OFFSET 0x0000000000000008
  339. #define RX_MSDU_START_TOEPLITZ_HASH_SEL_LSB 17
  340. #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MSB 18
  341. #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MASK 0x0000000000060000
  342. /* Description IP_FIXED_HEADER_VALID
  343. Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
  344. fully within first 256 bytes of the packet
  345. */
  346. #define RX_MSDU_START_IP_FIXED_HEADER_VALID_OFFSET 0x0000000000000008
  347. #define RX_MSDU_START_IP_FIXED_HEADER_VALID_LSB 19
  348. #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MSB 19
  349. #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MASK 0x0000000000080000
  350. /* Description IP_EXTN_HEADER_VALID
  351. IPv6/IPv6 header, including IPv4 options and recognizable
  352. extension headers parsed fully within first 256 bytes of
  353. the packet
  354. */
  355. #define RX_MSDU_START_IP_EXTN_HEADER_VALID_OFFSET 0x0000000000000008
  356. #define RX_MSDU_START_IP_EXTN_HEADER_VALID_LSB 20
  357. #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MSB 20
  358. #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MASK 0x0000000000100000
  359. /* Description TCP_UDP_HEADER_VALID
  360. Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
  361. header parsed fully within first 256 bytes of the packet
  362. */
  363. #define RX_MSDU_START_TCP_UDP_HEADER_VALID_OFFSET 0x0000000000000008
  364. #define RX_MSDU_START_TCP_UDP_HEADER_VALID_LSB 21
  365. #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MSB 21
  366. #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MASK 0x0000000000200000
  367. /* Description MESH_CONTROL_PRESENT
  368. When set, this MSDU includes the 'Mesh Control' field
  369. <legal all>
  370. */
  371. #define RX_MSDU_START_MESH_CONTROL_PRESENT_OFFSET 0x0000000000000008
  372. #define RX_MSDU_START_MESH_CONTROL_PRESENT_LSB 22
  373. #define RX_MSDU_START_MESH_CONTROL_PRESENT_MSB 22
  374. #define RX_MSDU_START_MESH_CONTROL_PRESENT_MASK 0x0000000000400000
  375. /* Description LDPC
  376. When set, indicates that LDPC coding was used.
  377. <legal all>
  378. */
  379. #define RX_MSDU_START_LDPC_OFFSET 0x0000000000000008
  380. #define RX_MSDU_START_LDPC_LSB 23
  381. #define RX_MSDU_START_LDPC_MSB 23
  382. #define RX_MSDU_START_LDPC_MASK 0x0000000000800000
  383. /* Description IP4_PROTOCOL_IP6_NEXT_HEADER
  384. For IPv4 this is the 8 bit protocol field (when ipv4_proto
  385. is set). For IPv6 this is the 8 bit next_header field (when
  386. ipv6_proto is set).
  387. */
  388. #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x0000000000000008
  389. #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 24
  390. #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB 31
  391. #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0x00000000ff000000
  392. /* Description TOEPLITZ_HASH_2_OR_4
  393. Controlled by multiple RxOLE registers for TCP/UDP over
  394. IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
  395. IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz
  396. hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
  397. and src/dest ports is reported. The Flow_id_toeplitz hash
  398. can also be reported here. Usually the hash reported here
  399. is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
  400. in 'RXPT_CLASSIFY_INFO').
  401. In Pine, optionally the 3-tuple Toeplitz hash over IPv4
  402. or IPv6 src/dest addresses and L4 protocol can be reported
  403. here. (Unsupported in HastingsPrime)
  404. */
  405. #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000000000008
  406. #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_LSB 32
  407. #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MSB 63
  408. #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MASK 0xffffffff00000000
  409. /* Description FLOW_ID_TOEPLITZ
  410. Toeplitz hash of 5-tuple
  411. {IP source address, IP destination address, IP source port,
  412. IP destination port, L4 protocol} in case of non-IPSec.
  413. In case of IPSec - Toeplitz hash of 4-tuple
  414. {IP source address, IP destination address, SPI, L4 protocol}
  415. In Pine, optionally the 3-tuple Toeplitz hash over IPv4
  416. or IPv6 src/dest addresses and L4 protocol can be reported
  417. here. (Unsupported in HastingsPrime)
  418. The relevant Toeplitz key registers are provided in RxOLE's
  419. instance of common parser module. These registers are separate
  420. from the Toeplitz keys used by ASE/FSE modules inside RxOLE.The
  421. actual value will be passed on from common parser module
  422. to RxOLE in one of the WHO_* TLVs.
  423. <legal all>
  424. */
  425. #define RX_MSDU_START_FLOW_ID_TOEPLITZ_OFFSET 0x0000000000000010
  426. #define RX_MSDU_START_FLOW_ID_TOEPLITZ_LSB 0
  427. #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MSB 31
  428. #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MASK 0x00000000ffffffff
  429. /* Description USER_RSSI
  430. RSSI for this user
  431. <legal all>
  432. */
  433. #define RX_MSDU_START_USER_RSSI_OFFSET 0x0000000000000010
  434. #define RX_MSDU_START_USER_RSSI_LSB 32
  435. #define RX_MSDU_START_USER_RSSI_MSB 39
  436. #define RX_MSDU_START_USER_RSSI_MASK 0x000000ff00000000
  437. /* Description PKT_TYPE
  438. Packet type:
  439. <enum 0 dot11a>802.11a PPDU type
  440. <enum 1 dot11b>802.11b PPDU type
  441. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  442. <enum 3 dot11ac>802.11ac PPDU type
  443. <enum 4 dot11ax>802.11ax PPDU type
  444. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  445. <enum 6 dot11be>802.11be PPDU type
  446. <enum 7 dot11az>802.11az (ranging) PPDU type
  447. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  448. & aborted)
  449. */
  450. #define RX_MSDU_START_PKT_TYPE_OFFSET 0x0000000000000010
  451. #define RX_MSDU_START_PKT_TYPE_LSB 40
  452. #define RX_MSDU_START_PKT_TYPE_MSB 43
  453. #define RX_MSDU_START_PKT_TYPE_MASK 0x00000f0000000000
  454. /* Description SGI
  455. Field only valid when pkt type is HT, VHT or HE.
  456. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  457. for HE
  458. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  459. for HE
  460. <enum 2 1_6_us_sgi > HE related GI
  461. <enum 3 3_2_us_sgi > HE related GI
  462. <legal 0 - 3>
  463. */
  464. #define RX_MSDU_START_SGI_OFFSET 0x0000000000000010
  465. #define RX_MSDU_START_SGI_LSB 44
  466. #define RX_MSDU_START_SGI_MSB 45
  467. #define RX_MSDU_START_SGI_MASK 0x0000300000000000
  468. /* Description RATE_MCS
  469. For details, refer to MCS_TYPE description
  470. Note: This is "rate" in case of 11a/11b
  471. <legal all>
  472. */
  473. #define RX_MSDU_START_RATE_MCS_OFFSET 0x0000000000000010
  474. #define RX_MSDU_START_RATE_MCS_LSB 46
  475. #define RX_MSDU_START_RATE_MCS_MSB 49
  476. #define RX_MSDU_START_RATE_MCS_MASK 0x0003c00000000000
  477. /* Description RECEIVE_BANDWIDTH
  478. Full receive Bandwidth
  479. <enum 0 20_mhz>20 Mhz BW
  480. <enum 1 40_mhz>40 Mhz BW
  481. <enum 2 80_mhz>80 Mhz BW
  482. <enum 3 160_mhz>160 Mhz BW
  483. <enum 4 320_mhz>320 Mhz BW
  484. <enum 5 240_mhz>240 Mhz BW
  485. */
  486. #define RX_MSDU_START_RECEIVE_BANDWIDTH_OFFSET 0x0000000000000010
  487. #define RX_MSDU_START_RECEIVE_BANDWIDTH_LSB 50
  488. #define RX_MSDU_START_RECEIVE_BANDWIDTH_MSB 52
  489. #define RX_MSDU_START_RECEIVE_BANDWIDTH_MASK 0x001c000000000000
  490. /* Description RECEPTION_TYPE
  491. Indicates what type of reception this is.
  492. <enum 0 reception_type_SU > Basic SU reception (not
  493. part of OFDMA or MIMO)
  494. <enum 1 reception_type_MU_MIMO > This is related to
  495. DL type of reception
  496. <enum 2 reception_type_MU_OFDMA > This is related to
  497. DL type of reception
  498. <enum 3 reception_type_MU_OFDMA_MIMO > This is related
  499. to DL type of reception
  500. <enum 4 reception_type_UL_MU_MIMO > This is related
  501. to UL type of reception
  502. <enum 5 reception_type_UL_MU_OFDMA > This is related
  503. to UL type of reception
  504. <enum 6 reception_type_UL_MU_OFDMA_MIMO > This is related
  505. to UL type of reception
  506. <legal 0-6>
  507. */
  508. #define RX_MSDU_START_RECEPTION_TYPE_OFFSET 0x0000000000000010
  509. #define RX_MSDU_START_RECEPTION_TYPE_LSB 53
  510. #define RX_MSDU_START_RECEPTION_TYPE_MSB 55
  511. #define RX_MSDU_START_RECEPTION_TYPE_MASK 0x00e0000000000000
  512. /* Description MIMO_SS_BITMAP
  513. Field only valid when Reception_type for the MPDU from this
  514. STA is some form of MIMO reception
  515. Bitmap, with each bit indicating if the related spatial
  516. stream is used for this STA
  517. LSB related to SS 0
  518. 0: spatial stream not used for this reception
  519. 1: spatial stream used for this reception
  520. <legal all>
  521. */
  522. #define RX_MSDU_START_MIMO_SS_BITMAP_OFFSET 0x0000000000000010
  523. #define RX_MSDU_START_MIMO_SS_BITMAP_LSB 56
  524. #define RX_MSDU_START_MIMO_SS_BITMAP_MSB 63
  525. #define RX_MSDU_START_MIMO_SS_BITMAP_MASK 0xff00000000000000
  526. /* Description PPDU_START_TIMESTAMP_31_0
  527. Timestamp that indicates when the PPDU that contained this
  528. MPDU started on the medium, lower 32 bits
  529. <legal all>
  530. */
  531. #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_OFFSET 0x0000000000000018
  532. #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_LSB 0
  533. #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MSB 31
  534. #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MASK 0x00000000ffffffff
  535. /* Description PPDU_START_TIMESTAMP_63_32
  536. Timestamp that indicates when the PPDU that contained this
  537. MPDU started on the medium, upper 32 bits
  538. <legal all>
  539. */
  540. #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_OFFSET 0x0000000000000018
  541. #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_LSB 32
  542. #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MSB 63
  543. #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MASK 0xffffffff00000000
  544. /* Description SW_PHY_META_DATA
  545. SW programmed Meta data provided by the PHY.
  546. Can be used for SW to indicate the channel the device is
  547. on.
  548. <legal all>
  549. */
  550. #define RX_MSDU_START_SW_PHY_META_DATA_OFFSET 0x0000000000000020
  551. #define RX_MSDU_START_SW_PHY_META_DATA_LSB 0
  552. #define RX_MSDU_START_SW_PHY_META_DATA_MSB 31
  553. #define RX_MSDU_START_SW_PHY_META_DATA_MASK 0x00000000ffffffff
  554. /* Description VLAN_CTAG_CI
  555. 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
  556. */
  557. #define RX_MSDU_START_VLAN_CTAG_CI_OFFSET 0x0000000000000020
  558. #define RX_MSDU_START_VLAN_CTAG_CI_LSB 32
  559. #define RX_MSDU_START_VLAN_CTAG_CI_MSB 47
  560. #define RX_MSDU_START_VLAN_CTAG_CI_MASK 0x0000ffff00000000
  561. /* Description VLAN_STAG_CI
  562. 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
  563. in case of double VLAN
  564. */
  565. #define RX_MSDU_START_VLAN_STAG_CI_OFFSET 0x0000000000000020
  566. #define RX_MSDU_START_VLAN_STAG_CI_LSB 48
  567. #define RX_MSDU_START_VLAN_STAG_CI_MSB 63
  568. #define RX_MSDU_START_VLAN_STAG_CI_MASK 0xffff000000000000
  569. #endif // RX_MSDU_START