rx_msdu_desc_info.h 15 KB

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  1. /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _RX_MSDU_DESC_INFO_H_
  16. #define _RX_MSDU_DESC_INFO_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 1
  20. struct rx_msdu_desc_info {
  21. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  22. uint32_t first_msdu_in_mpdu_flag : 1, // [0:0]
  23. last_msdu_in_mpdu_flag : 1, // [1:1]
  24. msdu_continuation : 1, // [2:2]
  25. msdu_length : 14, // [16:3]
  26. msdu_drop : 1, // [17:17]
  27. sa_is_valid : 1, // [18:18]
  28. da_is_valid : 1, // [19:19]
  29. da_is_mcbc : 1, // [20:20]
  30. l3_header_padding_msb : 1, // [21:21]
  31. tcp_udp_chksum_fail : 1, // [22:22]
  32. ip_chksum_fail : 1, // [23:23]
  33. fr_ds : 1, // [24:24]
  34. to_ds : 1, // [25:25]
  35. intra_bss : 1, // [26:26]
  36. dest_chip_id : 2, // [28:27]
  37. decap_format : 2, // [30:29]
  38. dest_chip_pmac_id : 1; // [31:31]
  39. #else
  40. uint32_t dest_chip_pmac_id : 1, // [31:31]
  41. decap_format : 2, // [30:29]
  42. dest_chip_id : 2, // [28:27]
  43. intra_bss : 1, // [26:26]
  44. to_ds : 1, // [25:25]
  45. fr_ds : 1, // [24:24]
  46. ip_chksum_fail : 1, // [23:23]
  47. tcp_udp_chksum_fail : 1, // [22:22]
  48. l3_header_padding_msb : 1, // [21:21]
  49. da_is_mcbc : 1, // [20:20]
  50. da_is_valid : 1, // [19:19]
  51. sa_is_valid : 1, // [18:18]
  52. msdu_drop : 1, // [17:17]
  53. msdu_length : 14, // [16:3]
  54. msdu_continuation : 1, // [2:2]
  55. last_msdu_in_mpdu_flag : 1, // [1:1]
  56. first_msdu_in_mpdu_flag : 1; // [0:0]
  57. #endif
  58. };
  59. /* Description FIRST_MSDU_IN_MPDU_FLAG
  60. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  61. multiple buffers, this field will be valid in the Last
  62. buffer used by the MSDU
  63. <enum 0 Not_first_msdu> This is not the first MSDU in the
  64. MPDU.
  65. <enum 1 first_msdu> This MSDU is the first one in the MPDU.
  66. <legal all>
  67. */
  68. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  69. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  70. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MSB 0
  71. #define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  72. /* Description LAST_MSDU_IN_MPDU_FLAG
  73. Consumer: WBM/REO/SW/FW
  74. Producer: RXDMA
  75. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  76. multiple buffers, this field will be valid in the Last
  77. buffer used by the MSDU
  78. <enum 0 Not_last_msdu> There are more MSDUs linked to this
  79. MSDU that belongs to this MPDU
  80. <enum 1 Last_msdu> this MSDU is the last one in the MPDU.
  81. This setting is only allowed in combination with 'Msdu_continuation'
  82. set to 0. This implies that when an msdu is spread out over
  83. multiple buffers and thus msdu_continuation is set, only
  84. for the very last buffer of the msdu, can the 'last_msdu_in_mpdu_flag'
  85. be set.
  86. When both first_msdu_in_mpdu_flag and last_msdu_in_mpdu_flag
  87. are set, the MPDU that this MSDU belongs to only contains
  88. a single MSDU.
  89. <legal all>
  90. */
  91. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
  92. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  93. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MSB 1
  94. #define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  95. /* Description MSDU_CONTINUATION
  96. When set, this MSDU buffer was not able to hold the entire
  97. MSDU. The next buffer will therefor contain additional
  98. information related to this MSDU.
  99. <legal all>
  100. */
  101. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_OFFSET 0x00000000
  102. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_LSB 2
  103. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MSB 2
  104. #define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MASK 0x00000004
  105. /* Description MSDU_LENGTH
  106. Parsed from RX_MSDU_START TLV . In the case MSDU spans over
  107. multiple buffers, this field will be valid in the First
  108. buffer used by MSDU.
  109. Full MSDU length in bytes after decapsulation.
  110. This field is still valid for MPDU frames without A-MSDU.
  111. It still represents MSDU length after decapsulation
  112. Or in case of RAW MPDUs, it indicates the length of the
  113. entire MPDU (without FCS field)
  114. <legal all>
  115. */
  116. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_OFFSET 0x00000000
  117. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_LSB 3
  118. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MSB 16
  119. #define RX_MSDU_DESC_INFO_MSDU_LENGTH_MASK 0x0001fff8
  120. /* Description MSDU_DROP
  121. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  122. multiple buffers, this field will be valid in the Last
  123. buffer used by the MSDU
  124. When set, REO shall drop this MSDU and not forward it to
  125. any other ring...
  126. <legal all>
  127. */
  128. #define RX_MSDU_DESC_INFO_MSDU_DROP_OFFSET 0x00000000
  129. #define RX_MSDU_DESC_INFO_MSDU_DROP_LSB 17
  130. #define RX_MSDU_DESC_INFO_MSDU_DROP_MSB 17
  131. #define RX_MSDU_DESC_INFO_MSDU_DROP_MASK 0x00020000
  132. /* Description SA_IS_VALID
  133. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  134. multiple buffers, this field will be valid in the Last
  135. buffer used by the MSDU
  136. Indicates that OLE found a valid SA entry for this MSDU
  137. <legal all>
  138. */
  139. #define RX_MSDU_DESC_INFO_SA_IS_VALID_OFFSET 0x00000000
  140. #define RX_MSDU_DESC_INFO_SA_IS_VALID_LSB 18
  141. #define RX_MSDU_DESC_INFO_SA_IS_VALID_MSB 18
  142. #define RX_MSDU_DESC_INFO_SA_IS_VALID_MASK 0x00040000
  143. /* Description DA_IS_VALID
  144. Parsed from RX_MSDU_END TLV . In the case MSDU spans over
  145. multiple buffers, this field will be valid in the Last
  146. buffer used by the MSDU
  147. Indicates that OLE found a valid DA entry for this MSDU
  148. <legal all>
  149. */
  150. #define RX_MSDU_DESC_INFO_DA_IS_VALID_OFFSET 0x00000000
  151. #define RX_MSDU_DESC_INFO_DA_IS_VALID_LSB 19
  152. #define RX_MSDU_DESC_INFO_DA_IS_VALID_MSB 19
  153. #define RX_MSDU_DESC_INFO_DA_IS_VALID_MASK 0x00080000
  154. /* Description DA_IS_MCBC
  155. Field Only valid if "da_is_valid" is set
  156. Indicates the DA address was a Multicast of Broadcast address
  157. for this MSDU
  158. <legal all>
  159. */
  160. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_OFFSET 0x00000000
  161. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_LSB 20
  162. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MSB 20
  163. #define RX_MSDU_DESC_INFO_DA_IS_MCBC_MASK 0x00100000
  164. /* Description L3_HEADER_PADDING_MSB
  165. Passed on from 'RX_MSDU_END' TLV (only the MSB is reported
  166. as the LSB is always zero)
  167. Number of bytes padded to make sure that the L3 header will
  168. always start of a Dword boundary
  169. <legal all>
  170. */
  171. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_OFFSET 0x00000000
  172. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_LSB 21
  173. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MSB 21
  174. #define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MASK 0x00200000
  175. /* Description TCP_UDP_CHKSUM_FAIL
  176. Passed on from 'RX_ATTENTION' TLV
  177. Indicates that the computed checksum did not match the checksum
  178. in the TCP/UDP header.
  179. <legal all>
  180. */
  181. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000
  182. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_LSB 22
  183. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MSB 22
  184. #define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000
  185. /* Description IP_CHKSUM_FAIL
  186. Passed on from 'RX_ATTENTION' TLV
  187. Indicates that the computed checksum did not match the checksum
  188. in the IP header.
  189. <legal all>
  190. */
  191. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_OFFSET 0x00000000
  192. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_LSB 23
  193. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MSB 23
  194. #define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MASK 0x00800000
  195. /* Description FR_DS
  196. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  197. TLV
  198. Set if the 'from DS' bit is set in the frame control.
  199. <legal all>
  200. */
  201. #define RX_MSDU_DESC_INFO_FR_DS_OFFSET 0x00000000
  202. #define RX_MSDU_DESC_INFO_FR_DS_LSB 24
  203. #define RX_MSDU_DESC_INFO_FR_DS_MSB 24
  204. #define RX_MSDU_DESC_INFO_FR_DS_MASK 0x01000000
  205. /* Description TO_DS
  206. Passed on from 'RX_MPDU_INFO' structure in 'RX_MPDU_START'
  207. TLV
  208. Set if the 'to DS' bit is set in the frame control.
  209. <legal all>
  210. */
  211. #define RX_MSDU_DESC_INFO_TO_DS_OFFSET 0x00000000
  212. #define RX_MSDU_DESC_INFO_TO_DS_LSB 25
  213. #define RX_MSDU_DESC_INFO_TO_DS_MSB 25
  214. #define RX_MSDU_DESC_INFO_TO_DS_MASK 0x02000000
  215. /* Description INTRA_BSS
  216. This packet needs intra-BSS routing by SW as the 'vdev_id'
  217. for the destination is the same as the 'vdev_id' (from 'RX_MPDU_PCU_START')
  218. that this MSDU was got in.
  219. <legal all>
  220. */
  221. #define RX_MSDU_DESC_INFO_INTRA_BSS_OFFSET 0x00000000
  222. #define RX_MSDU_DESC_INFO_INTRA_BSS_LSB 26
  223. #define RX_MSDU_DESC_INFO_INTRA_BSS_MSB 26
  224. #define RX_MSDU_DESC_INFO_INTRA_BSS_MASK 0x04000000
  225. /* Description DEST_CHIP_ID
  226. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  227. to support intra-BSS routing with multi-chip multi-link
  228. operation.
  229. This indicates into which chip's TCL the packet should be
  230. queued.
  231. <legal all>
  232. */
  233. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_OFFSET 0x00000000
  234. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_LSB 27
  235. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MSB 28
  236. #define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MASK 0x18000000
  237. /* Description DECAP_FORMAT
  238. Indicates the format after decapsulation:
  239. <enum 0 RAW> No encapsulation
  240. <enum 1 Native_WiFi>
  241. <enum 2 Ethernet> Ethernet 2 (DIX) or 802.3 (uses SNAP/LLC)
  242. <enum 3 802_3> Indicate Ethernet
  243. <legal all>
  244. */
  245. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_OFFSET 0x00000000
  246. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_LSB 29
  247. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MSB 30
  248. #define RX_MSDU_DESC_INFO_DECAP_FORMAT_MASK 0x60000000
  249. /* Description DEST_CHIP_PMAC_ID
  250. If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY'
  251. to support intra-BSS routing with multi-chip multi-link
  252. operation.
  253. This indicates into which link/'vdev' the packet should
  254. be queued in TCL.
  255. <legal all>
  256. */
  257. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_OFFSET 0x00000000
  258. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_LSB 31
  259. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_MSB 31
  260. #define RX_MSDU_DESC_INFO_DEST_CHIP_PMAC_ID_MASK 0x80000000
  261. #endif // RX_MSDU_DESC_INFO