pcu_ppdu_setup_init.h 293 KB

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  1. /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _PCU_PPDU_SETUP_INIT_H_
  16. #define _PCU_PPDU_SETUP_INIT_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #include "pdg_response_rate_setting.h"
  20. #define NUM_OF_DWORDS_PCU_PPDU_SETUP_INIT 58
  21. #define NUM_OF_QWORDS_PCU_PPDU_SETUP_INIT 29
  22. struct pcu_ppdu_setup_init {
  23. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  24. uint32_t medium_prot_type : 3, // [2:0]
  25. response_type : 5, // [7:3]
  26. response_info_part2_required : 1, // [8:8]
  27. response_to_response : 3, // [11:9]
  28. mba_user_order : 2, // [13:12]
  29. expected_mba_size : 11, // [24:14]
  30. required_ul_mu_resp_user_count : 6, // [30:25]
  31. transmitted_bssid_check_en : 1; // [31:31]
  32. uint32_t mprot_required_bw1 : 1, // [0:0]
  33. mprot_required_bw20 : 1, // [1:1]
  34. mprot_required_bw40 : 1, // [2:2]
  35. mprot_required_bw80 : 1, // [3:3]
  36. mprot_required_bw160 : 1, // [4:4]
  37. mprot_required_bw240 : 1, // [5:5]
  38. mprot_required_bw320 : 1, // [6:6]
  39. ppdu_allowed_bw1 : 1, // [7:7]
  40. ppdu_allowed_bw20 : 1, // [8:8]
  41. ppdu_allowed_bw40 : 1, // [9:9]
  42. ppdu_allowed_bw80 : 1, // [10:10]
  43. ppdu_allowed_bw160 : 1, // [11:11]
  44. ppdu_allowed_bw240 : 1, // [12:12]
  45. ppdu_allowed_bw320 : 1, // [13:13]
  46. set_fc_pwr_mgt : 1, // [14:14]
  47. use_cts_duration_for_data_tx : 1, // [15:15]
  48. update_timestamp_64 : 1, // [16:16]
  49. update_timestamp_32_lower : 1, // [17:17]
  50. update_timestamp_32_upper : 1, // [18:18]
  51. reserved_1a : 13; // [31:19]
  52. uint32_t insert_timestamp_offset_0 : 16, // [15:0]
  53. insert_timestamp_offset_1 : 16; // [31:16]
  54. uint32_t max_bw40_try_count : 4, // [3:0]
  55. max_bw80_try_count : 4, // [7:4]
  56. max_bw160_try_count : 4, // [11:8]
  57. max_bw240_try_count : 4, // [15:12]
  58. max_bw320_try_count : 4, // [19:16]
  59. insert_wur_timestamp_offset : 6, // [25:20]
  60. update_wur_timestamp : 1, // [26:26]
  61. wur_embedded_bssid_present : 1, // [27:27]
  62. insert_wur_fcs : 1, // [28:28]
  63. reserved_3b : 3; // [31:29]
  64. struct pdg_response_rate_setting response_to_response_rate_info_bw20;
  65. struct pdg_response_rate_setting response_to_response_rate_info_bw40;
  66. struct pdg_response_rate_setting response_to_response_rate_info_bw80;
  67. struct pdg_response_rate_setting response_to_response_rate_info_bw160;
  68. struct pdg_response_rate_setting response_to_response_rate_info_bw240;
  69. struct pdg_response_rate_setting response_to_response_rate_info_bw320;
  70. uint32_t r2r_hw_response_tx_duration : 16, // [15:0]
  71. r2r_rx_duration_field : 16; // [31:16]
  72. uint32_t r2r_group_id : 6, // [5:0]
  73. r2r_response_frame_type : 4, // [9:6]
  74. r2r_sta_partial_aid : 11, // [20:10]
  75. use_address_fields_for_protection : 1, // [21:21]
  76. r2r_set_required_response_time : 1, // [22:22]
  77. reserved_29a : 3, // [25:23]
  78. r2r_bw20_active_channel : 3, // [28:26]
  79. r2r_bw40_active_channel : 3; // [31:29]
  80. uint32_t r2r_bw80_active_channel : 3, // [2:0]
  81. r2r_bw160_active_channel : 3, // [5:3]
  82. r2r_bw240_active_channel : 3, // [8:6]
  83. r2r_bw320_active_channel : 3, // [11:9]
  84. r2r_bw20 : 3, // [14:12]
  85. r2r_bw40 : 3, // [17:15]
  86. r2r_bw80 : 3, // [20:18]
  87. r2r_bw160 : 3, // [23:21]
  88. r2r_bw240 : 3, // [26:24]
  89. r2r_bw320 : 3, // [29:27]
  90. reserved_30a : 2; // [31:30]
  91. uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0]
  92. uint32_t mu_response_expected_bitmap_36_32 : 5, // [4:0]
  93. mu_expected_response_cbf_count : 6, // [10:5]
  94. mu_expected_response_sta_count : 6, // [16:11]
  95. transmit_includes_multidestination : 1, // [17:17]
  96. insert_prev_tx_start_timing_info : 1, // [18:18]
  97. insert_current_tx_start_timing_info : 1, // [19:19]
  98. tx_start_transmit_time_byte_offset : 12; // [31:20]
  99. uint32_t protection_frame_ad1_31_0 : 32; // [31:0]
  100. uint32_t protection_frame_ad1_47_32 : 16, // [15:0]
  101. protection_frame_ad2_15_0 : 16; // [31:16]
  102. uint32_t protection_frame_ad2_47_16 : 32; // [31:0]
  103. uint32_t dynamic_medium_prot_threshold : 24, // [23:0]
  104. dynamic_medium_prot_type : 1, // [24:24]
  105. reserved_54a : 7; // [31:25]
  106. uint32_t protection_frame_ad3_31_0 : 32; // [31:0]
  107. uint32_t protection_frame_ad3_47_32 : 16, // [15:0]
  108. protection_frame_ad4_15_0 : 16; // [31:16]
  109. uint32_t protection_frame_ad4_47_16 : 32; // [31:0]
  110. #else
  111. uint32_t transmitted_bssid_check_en : 1, // [31:31]
  112. required_ul_mu_resp_user_count : 6, // [30:25]
  113. expected_mba_size : 11, // [24:14]
  114. mba_user_order : 2, // [13:12]
  115. response_to_response : 3, // [11:9]
  116. response_info_part2_required : 1, // [8:8]
  117. response_type : 5, // [7:3]
  118. medium_prot_type : 3; // [2:0]
  119. uint32_t reserved_1a : 13, // [31:19]
  120. update_timestamp_32_upper : 1, // [18:18]
  121. update_timestamp_32_lower : 1, // [17:17]
  122. update_timestamp_64 : 1, // [16:16]
  123. use_cts_duration_for_data_tx : 1, // [15:15]
  124. set_fc_pwr_mgt : 1, // [14:14]
  125. ppdu_allowed_bw320 : 1, // [13:13]
  126. ppdu_allowed_bw240 : 1, // [12:12]
  127. ppdu_allowed_bw160 : 1, // [11:11]
  128. ppdu_allowed_bw80 : 1, // [10:10]
  129. ppdu_allowed_bw40 : 1, // [9:9]
  130. ppdu_allowed_bw20 : 1, // [8:8]
  131. ppdu_allowed_bw1 : 1, // [7:7]
  132. mprot_required_bw320 : 1, // [6:6]
  133. mprot_required_bw240 : 1, // [5:5]
  134. mprot_required_bw160 : 1, // [4:4]
  135. mprot_required_bw80 : 1, // [3:3]
  136. mprot_required_bw40 : 1, // [2:2]
  137. mprot_required_bw20 : 1, // [1:1]
  138. mprot_required_bw1 : 1; // [0:0]
  139. uint32_t insert_timestamp_offset_1 : 16, // [31:16]
  140. insert_timestamp_offset_0 : 16; // [15:0]
  141. uint32_t reserved_3b : 3, // [31:29]
  142. insert_wur_fcs : 1, // [28:28]
  143. wur_embedded_bssid_present : 1, // [27:27]
  144. update_wur_timestamp : 1, // [26:26]
  145. insert_wur_timestamp_offset : 6, // [25:20]
  146. max_bw320_try_count : 4, // [19:16]
  147. max_bw240_try_count : 4, // [15:12]
  148. max_bw160_try_count : 4, // [11:8]
  149. max_bw80_try_count : 4, // [7:4]
  150. max_bw40_try_count : 4; // [3:0]
  151. struct pdg_response_rate_setting response_to_response_rate_info_bw20;
  152. struct pdg_response_rate_setting response_to_response_rate_info_bw40;
  153. struct pdg_response_rate_setting response_to_response_rate_info_bw80;
  154. struct pdg_response_rate_setting response_to_response_rate_info_bw160;
  155. struct pdg_response_rate_setting response_to_response_rate_info_bw240;
  156. struct pdg_response_rate_setting response_to_response_rate_info_bw320;
  157. uint32_t r2r_rx_duration_field : 16, // [31:16]
  158. r2r_hw_response_tx_duration : 16; // [15:0]
  159. uint32_t r2r_bw40_active_channel : 3, // [31:29]
  160. r2r_bw20_active_channel : 3, // [28:26]
  161. reserved_29a : 3, // [25:23]
  162. r2r_set_required_response_time : 1, // [22:22]
  163. use_address_fields_for_protection : 1, // [21:21]
  164. r2r_sta_partial_aid : 11, // [20:10]
  165. r2r_response_frame_type : 4, // [9:6]
  166. r2r_group_id : 6; // [5:0]
  167. uint32_t reserved_30a : 2, // [31:30]
  168. r2r_bw320 : 3, // [29:27]
  169. r2r_bw240 : 3, // [26:24]
  170. r2r_bw160 : 3, // [23:21]
  171. r2r_bw80 : 3, // [20:18]
  172. r2r_bw40 : 3, // [17:15]
  173. r2r_bw20 : 3, // [14:12]
  174. r2r_bw320_active_channel : 3, // [11:9]
  175. r2r_bw240_active_channel : 3, // [8:6]
  176. r2r_bw160_active_channel : 3, // [5:3]
  177. r2r_bw80_active_channel : 3; // [2:0]
  178. uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0]
  179. uint32_t tx_start_transmit_time_byte_offset : 12, // [31:20]
  180. insert_current_tx_start_timing_info : 1, // [19:19]
  181. insert_prev_tx_start_timing_info : 1, // [18:18]
  182. transmit_includes_multidestination : 1, // [17:17]
  183. mu_expected_response_sta_count : 6, // [16:11]
  184. mu_expected_response_cbf_count : 6, // [10:5]
  185. mu_response_expected_bitmap_36_32 : 5; // [4:0]
  186. uint32_t protection_frame_ad1_31_0 : 32; // [31:0]
  187. uint32_t protection_frame_ad2_15_0 : 16, // [31:16]
  188. protection_frame_ad1_47_32 : 16; // [15:0]
  189. uint32_t protection_frame_ad2_47_16 : 32; // [31:0]
  190. uint32_t reserved_54a : 7, // [31:25]
  191. dynamic_medium_prot_type : 1, // [24:24]
  192. dynamic_medium_prot_threshold : 24; // [23:0]
  193. uint32_t protection_frame_ad3_31_0 : 32; // [31:0]
  194. uint32_t protection_frame_ad4_15_0 : 16, // [31:16]
  195. protection_frame_ad3_47_32 : 16; // [15:0]
  196. uint32_t protection_frame_ad4_47_16 : 32; // [31:0]
  197. #endif
  198. };
  199. /* Description MEDIUM_PROT_TYPE
  200. Self Gen Medium Protection type used
  201. <enum 0 No_protection>
  202. <enum 1 RTS_legacy>
  203. <enum 2 RTS_11ac_static_bw>
  204. <enum 3 RTS_11ac_dynamic_bw>
  205. <enum 4 CTS2Self>
  206. <enum 5 QoS_Null_no_ack_3addr>
  207. <enum 6 QoS_Null_no_ack_4addr>
  208. <legal 0-6>
  209. */
  210. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000
  211. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_LSB 0
  212. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MSB 2
  213. #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MASK 0x0000000000000007
  214. /* Description RESPONSE_TYPE
  215. PPDU transmission Response type expected
  216. Used by PDG to calculate the anticipated response duration
  217. time.
  218. Used by TXPCU to prepare for expecting to receive a response.
  219. <enum 0 no_response_expected>After transmission of this
  220. frame, no response in SIFS time is expected
  221. When TXPCU sees this setting, it shall not generated the
  222. EXPECTED_RESPONSE TLV.
  223. RXPCU should never see this setting
  224. <enum 1 ack_expected>An ACK frame is expected as response
  225. RXPCU is just expecting any response. It is TXPCU who checks
  226. that the right response was received.
  227. <enum 2 ba_64_bitmap_expected>BA with 64 bitmap is expected.
  228. PDG DOES NOT use the size info to calculated response duration.
  229. The length of the response will have to be programmed by
  230. SW in the per-BW 'Expected_ppdu_resp_length' field.
  231. For TXPCU only the fact that it is a BA is important. Actual
  232. received BA size is not important
  233. RXPCU is just expecting any response. It is TXPCU who checks
  234. that the right response was received.
  235. <enum 3 ba_256_expected>BA with 256 bitmap is expected.
  236. PDG DOES NOT use the size info to calculated response duration.
  237. The length of the response will have to be programmed by
  238. SW in the per-BW 'Expected_ppdu_resp_length' field.
  239. For TXPCU only the fact that it is a BA is important. Actual
  240. received BA size is not important
  241. RXPCU is just expecting any response. It is TXPCU who checks
  242. that the right response was received.
  243. <enum 4 actionnoack_expected>SW sets this after sending
  244. NDP or BR-Poll.
  245. As PDG has no idea on how long the reception is going to
  246. be, the reception time of the response will have to be
  247. programmed by SW in the 'Extend_duration_value_bw...' field
  248. RXPCU is just expecting any response. It is TXPCU who checks
  249. that the right response was received.
  250. <enum 5 ack_ba_expected>PDG uses the size info and assumes
  251. single BA format with ACK and 64 bitmap embedded.
  252. If SW expects more bitmaps in case of multi-TID, is shall
  253. program the 'Extend_duration_value_bw...' field for additional
  254. duration time.
  255. For TXPCU only the fact that an ACK and/or BA is received
  256. is important. Reception of only ACK or BA is also considered
  257. a success.
  258. SW also typically sets this when sending VHT single MPDU.
  259. Some chip vendors might send BA rather than ACK in response
  260. to VHT single MPDU but still we want to accept BA as well.
  261. RXPCU is just expecting any response. It is TXPCU who checks
  262. that the right response was received.
  263. <enum 6 cts_expected>SW sets this after queuing RTS frame
  264. as standalone packet and sending it.
  265. RXPCU is just expecting any response. It is TXPCU who checks
  266. that the right response was received.
  267. <enum 7 ack_data_expected>SW sets this after sending PS-Poll.
  268. For TXPCU either ACK and/or data reception is considered
  269. success.
  270. PDG basis it's response duration calculation on an ACK.
  271. For the data portion, SW shall program the 'Extend_duration_value_bw...'
  272. field
  273. <enum 8 ndp_ack_expected>Reserved for 11ah usage.
  274. <enum 9 ndp_modified_ack>Reserved for 11ah usage
  275. <enum 10 ndp_ba_expected>Reserved for 11ah usage.
  276. <enum 11 ndp_cts_expected>Reserved for 11ah usage
  277. <enum 12 ndp_ack_or_ndp_modified_ack_expected>Reserved for
  278. 11ah usage
  279. <enum 13 ul_mu_ba_expected>NOT SUPPORTED IN NAPIER AX AND
  280. HASTINGS
  281. TXPCU expects UL MU OFDMA or UL MU MIMO reception.
  282. As PDG does not know how RUs are assigned for the uplink
  283. portion, PDG can not calculate the uplink duration. Therefor
  284. SW shall program the 'Extend_duration_value_bw...' field
  285. RXPCU will report any frame received, irrespective of it
  286. having been UL MU or SU It is TXPCUs responsibility to
  287. distinguish between the UL MU or SU
  288. TXPCU can check in TLV RECEIVED_RESPONSE_INFO MU_Response_BA_bitmap
  289. if indeed BA was received
  290. <enum 14 ul_mu_ba_and_data_expected>NOT SUPPORTED IN NAPIER
  291. AX AND HASTINGS
  292. TXPCU expects UL MU OFDMA or UL MU MIMO reception.
  293. As PDG does not know how RUs are assigned for the uplink
  294. portion, PDG can not calculate the uplink duration. Therefor
  295. SW shall program the 'Extend_duration_value_bw...' field
  296. RXPCU will report any frame received, irrespective of it
  297. having been UL MU or SU It is TXPCUs responsibility to
  298. distinguish between the UL MU or SU
  299. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_data_bitmap
  300. and MU_Response_BA_bitmap if indeed BA and data was received
  301. <enum 15 ul_mu_cbf_expected>NOT SUPPORTED IN NAPIER AX AND
  302. HASTINGS
  303. When selected, CBF frames are expected to be received in
  304. MU reception (uplink OFDMA or uplink MIMO)
  305. RXPCU is just expecting any response. It is TXPCU who checks
  306. that the right response was received
  307. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_cbf_bitmap
  308. if indeed CBF frames were received.
  309. <enum 16 ul_mu_frames_expected>When selected, MPDU frames
  310. are expected in the MU reception (uplink OFDMA or uplink
  311. MIMO)
  312. RXPCU is just expecting any response. It is TXPCU who checks
  313. that the right response was received
  314. TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_bitmap
  315. if indeed frames were received.
  316. <enum 17 any_response_to_this_device>Any response expected
  317. to be send to this device in SIFS time is acceptable.
  318. RXPCU is just expecting any response. It is TXPCU who checks
  319. that the right response was received
  320. For TXPCU, UL MU or SU is both acceptable.
  321. Can be used for complex OFDMA scenarios. PDG can not calculate
  322. the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
  323. field
  324. <enum 18 any_response_accepted>Any frame in the medium to
  325. this or any other device, is acceptable as response.
  326. RXPCU is just expecting any response. It is TXPCU who checks
  327. that the right response was received
  328. For TXPCU, UL MU or SU is both acceptable.
  329. Can be used for complex OFDMA scenarios. PDG can not calculate
  330. the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...'
  331. field
  332. <enum 19 frameless_phyrx_response_accepted>Any MU frameless
  333. reception generated by the PHY is acceptable.
  334. PHY indicates this type of reception explicitly in TLV PHYRX_RSSI_LEGACY,
  335. field Reception_type == reception_is_frameless
  336. RXPCU will report any frame received, irrespective of it
  337. having been UL MU or SU.
  338. This can be used for complex MU-MIMO or OFDMA scenarios,
  339. like receiving MU-CTS.
  340. PDG can not calculate the uplink duration. Therefor SW shall
  341. program the 'Extend_duration_value_bw...' field
  342. <enum 20 ranging_ndp_and_lmr_expected>SW sets this after
  343. sending ranging NDPA followed by NDP as an ISTA and NDP
  344. and LMR (Action No Ack) are expected as back-to-back reception
  345. in SIFS.
  346. As PDG has no idea on how long the reception is going to
  347. be, the reception time of the response will have to be
  348. programmed by SW in the 'Extend_duration_value_bw...' field
  349. RXPCU is just expecting any response. It is TXPCU who checks
  350. that the right response was received.
  351. <enum 21 ba_512_expected>BA with 512 bitmap is expected.
  352. PDG DOES NOT use the size info to calculated response duration.
  353. The length of the response will have to be programmed by
  354. SW in the per-BW 'Expected_ppdu_resp_length' field.
  355. For TXPCU only the fact that it is a BA is important. Actual
  356. received BA size is not important
  357. RXPCU is just expecting any response. It is TXPCU who checks
  358. that the right response was received.
  359. <enum 22 ba_1024_expected>BA with 1024 bitmap is expected.
  360. PDG DOES NOT use the size info to calculated response duration.
  361. The length of the response will have to be programmed by
  362. SW in the per-BW 'Expected_ppdu_resp_length' field.
  363. For TXPCU only the fact that it is a BA is important. Actual
  364. received BA size is not important
  365. RXPCU is just expecting any response. It is TXPCU who checks
  366. that the right response was received.
  367. <enum 23 ul_mu_ranging_cts2s_expected>When selected, CTS2S
  368. frames are expected to be received in MU reception (uplink
  369. OFDMA)
  370. RXPCU shall check each response for CTS2S and report to
  371. TXPCU.
  372. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  373. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed CTS2S
  374. frames were received.
  375. <enum 24 ul_mu_ranging_ndp_expected>When selected, UL NDP
  376. frames are expected to be received in MU reception (uplink
  377. spatial multiplexing)
  378. RXPCU shall check each response for NDP and report to TXPCU.
  379. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  380. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed NDP
  381. frames were received.
  382. <enum 25 ul_mu_ranging_lmr_expected>When selected, LMR frames
  383. are expected to be received in MU reception (uplink OFDMA
  384. or uplink MIMO)
  385. RXPCU shall check each response for LMR and report to TXPCU.
  386. TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields
  387. 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed LMR
  388. frames were received.
  389. */
  390. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_OFFSET 0x0000000000000000
  391. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_LSB 3
  392. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MSB 7
  393. #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MASK 0x00000000000000f8
  394. /* Description RESPONSE_INFO_PART2_REQUIRED
  395. Field only valid when Response_type is NOT set to No_response_expected
  396. When set to 1, RXPCU shall generate the RECEIVED_RESPONSE_INFO_PART2
  397. TLV after having received the response frame. TXPCU shall
  398. wait for this TLV before sending the TX_FES_STATUS_END
  399. TLV.
  400. When NOT set, RXPCU shall NOT generate the above mentioned
  401. TLV. TXPCU shall not wait for this TLV and after having
  402. received RECEIVED_RESPONSE_INFO TLV, it can immediately
  403. generate the TX_FES_STATUS_END TLV.
  404. <legal all>
  405. */
  406. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_OFFSET 0x0000000000000000
  407. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_LSB 8
  408. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MSB 8
  409. #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MASK 0x0000000000000100
  410. /* Description RESPONSE_TO_RESPONSE
  411. Field indicates if after receiving an expected PPDU response
  412. (as indicated by the Response_type), TXPCU is expected
  413. to generate a reponse to that response
  414. Example: OFDMA trigger frame is sent, with expected response
  415. being UL OFDMA data, which result in a response to the
  416. response of MBA
  417. <enum 0 None> No response after response allowed.
  418. <enum 1 SU_BA> The response after response that TXPCU is
  419. allowed to generate is a single BA. Even if RXPCU is indicating
  420. that multiple users are received, TXPCU shall only send
  421. a BA for 1 STA. Response_to_response rates can be found
  422. in fields 'response_to_response_rate_info_bw...'
  423. <enum 2 MU_BA> The response after response that TXPCU is
  424. allowed to generate is only Multi Destination Multi User
  425. BA. Response_to_response rates can be found in fields 'response_to_response_rate_info_bw...'
  426. <enum 3 RESPONSE_TO_RESPONSE_CMD> A response to response
  427. is expected to be generated. In other words, RXPCU will
  428. likely indicate to TXPCU at the end of upcoming reception
  429. that a response is needed. TXPCU is however to ignore this
  430. indication from RXPCU, and assume for a moment that no
  431. response to response is needed, as all the details on how
  432. to handle this is provided in the next scheduling command,
  433. which is marked as a 'response_to_response' type.
  434. <legal 0-3>
  435. */
  436. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_OFFSET 0x0000000000000000
  437. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_LSB 9
  438. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MSB 11
  439. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MASK 0x0000000000000e00
  440. /* Description MBA_USER_ORDER
  441. Field only valid in case of 'response_to_response' set to
  442. MU_BA.
  443. <enum 0 mu_ba_fixed_user_order> TXPCU shall ask RXPCU for
  444. BA info for all TX users, in order from user 0 to user
  445. N
  446. <enum 1 mu_ba_optimized_user_order> TXPCU shall ask RXPCU
  447. for BA info for all TX users, but let RXPCU determine in
  448. which order the BA bitmaps for each user shall be returned.
  449. Note that RXPCU might return some 'invalid' bitmaps in case
  450. there was no data received from all the users.
  451. <enum 2 mu_ba_fully_optimized> TXPCU shall ask RXPCU for
  452. BA info for the number RX users that RXPCU indicated in
  453. the 'Max_rx_user_count' in the RX_PPDU_START TLV. TXPCU
  454. shall let RXPCU determine in which order the BA bitmaps
  455. for each user shall be returned. Note that RXPCU might
  456. still return some 'invalid' bitmaps in case there were only
  457. frames with FCS errors for some of the users
  458. <enum 3 mu_ba_fully_optimized_multi_tid> TXPCU shall ask
  459. RXPCU for BA info for the number bitmaps that RXPCU indicated
  460. in the (SUM of) response_ack_count, response_ba64_count,
  461. response_ba256_count fields in RX_RESPONSE_REQUIRED. TXPCU
  462. shall let RXPCU determine in which order the BA bitmaps
  463. for each user (and sometimes multiple bitmaps for a the
  464. same user in case of multi TID) shall be returned. It is
  465. not expected that RXPCU will return invalid bitmaps for
  466. this scenario as RXPCU earlier indicates that this number
  467. of bitmaps was actually available in RXPCU...
  468. <legal 0-3>
  469. */
  470. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_OFFSET 0x0000000000000000
  471. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_LSB 12
  472. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MSB 13
  473. #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MASK 0x0000000000003000
  474. /* Description EXPECTED_MBA_SIZE
  475. Field only valid for:
  476. Mba_user_order == mu_ba_fixed_user_order, mu_ba_optimized_user_order
  477. The expected number of bytes in response (Multi destination)
  478. BA that TXPCU shall request to PDG.
  479. NOTE that SW should have pre-calculated and thus looked-up
  480. the window sizes for each of the STAs.
  481. <legal all>
  482. */
  483. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_OFFSET 0x0000000000000000
  484. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_LSB 14
  485. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MSB 24
  486. #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MASK 0x0000000001ffc000
  487. /* Description REQUIRED_UL_MU_RESP_USER_COUNT
  488. Field only valid for: Response_to_response
  489. == MU_BA
  490. or
  491. RESPONSE_TO_RESPONSE_CMD
  492. Field MU_RX_successful_user_count as reported in the RECEIVED_RESPONSE_INFO
  493. TLV shall be >= to this field, in order to consider the
  494. reception successful.
  495. Note that the value in this field shall always be equal
  496. or smaller to the number of bits set in field MU_Response_expected_bitmap_....
  497. <legal all>
  498. */
  499. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_OFFSET 0x0000000000000000
  500. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_LSB 25
  501. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MSB 30
  502. #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MASK 0x000000007e000000
  503. /* Description TRANSMITTED_BSSID_CHECK_EN
  504. When set to 1, RXPCU shall assume group addressed frame
  505. with Tx_AD2 equal to TBSSID was sent. RxPCU should properly
  506. handle receive frame(s) from STA(s) which A1 is TBSSID
  507. or any VAPs.When NOT set, RXPCU shall compare received frame's
  508. A1 with Tx_AD2 only.
  509. <legal all>
  510. */
  511. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_OFFSET 0x0000000000000000
  512. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_LSB 31
  513. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MSB 31
  514. #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MASK 0x0000000080000000
  515. /* Description MPROT_REQUIRED_BW1
  516. Field only valid when ppdu_allowed_bw1 is set.
  517. When set, Medium protection transmission is required for
  518. a 1 MHz bandwidth PPDU transmission. In case of MU transmissions,
  519. all the medium protection settings are coming from user0. <legal
  520. all>
  521. */
  522. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_OFFSET 0x0000000000000000
  523. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_LSB 32
  524. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MSB 32
  525. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MASK 0x0000000100000000
  526. /* Description MPROT_REQUIRED_BW20
  527. Field only valid when ppdu_allowed_bw20_bw2 is set.
  528. NOTE: This field is also known as Mprot_required_pattern_0
  529. in case punctured transmission is enabled.
  530. When set, Medium protection transmission is required for
  531. a 20 MHz or 2Mhz 11ah bandwidth PPDU transmission
  532. <legal all>
  533. */
  534. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_OFFSET 0x0000000000000000
  535. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_LSB 33
  536. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MSB 33
  537. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MASK 0x0000000200000000
  538. /* Description MPROT_REQUIRED_BW40
  539. Field only valid when ppdu_allowed_bw40_bw4 is set.
  540. NOTE: This field is also known as Mprot_required_pattern_1
  541. in case punctured transmission is enabled.
  542. When set, Medium protection transmission is required for
  543. a 40 MHz or 4Mhz 11ah bandwidth PPDU transmission
  544. <legal all>
  545. */
  546. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_OFFSET 0x0000000000000000
  547. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_LSB 34
  548. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MSB 34
  549. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MASK 0x0000000400000000
  550. /* Description MPROT_REQUIRED_BW80
  551. Field only valid when ppdu_allowed_bw80_bw8 is set.
  552. NOTE: This field is also known as Mprot_required_pattern_2
  553. in case punctured transmission is enabled.
  554. When set, Medium protection transmission is required for
  555. a 80 MHz or 8MHz 11ah bandwidth PPDU transmission
  556. <legal all>
  557. */
  558. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_OFFSET 0x0000000000000000
  559. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_LSB 35
  560. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MSB 35
  561. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MASK 0x0000000800000000
  562. /* Description MPROT_REQUIRED_BW160
  563. Field only valid when ppdu_allowed_bw160_bw16 is set.
  564. NOTE: This field is also known as Mprot_required_pattern_3
  565. in case punctured transmission is enabled.
  566. When set, Medium protection transmission is required for
  567. a 160 MHz or 16MHz 11ah bandwidth PPDU transmission.
  568. <legal all>
  569. */
  570. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_OFFSET 0x0000000000000000
  571. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_LSB 36
  572. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MSB 36
  573. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MASK 0x0000001000000000
  574. /* Description MPROT_REQUIRED_BW240
  575. Field only valid when ppdu_allowed_bw240 is set.
  576. NOTE: This field is also known as Mprot_required_pattern_4
  577. in case punctured transmission is enabled.
  578. When set, Medium protection transmission is required for
  579. a 240 MHz bandwidth PPDU transmission.
  580. <legal all>
  581. */
  582. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_OFFSET 0x0000000000000000
  583. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_LSB 37
  584. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MSB 37
  585. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MASK 0x0000002000000000
  586. /* Description MPROT_REQUIRED_BW320
  587. Field only valid when ppdu_allowed_bw320 is set.
  588. NOTE: This field is also known as Mprot_required_pattern_5
  589. in case punctured transmission is enabled.
  590. When set, Medium protection transmission is required for
  591. a 320 MHz bandwidth PPDU transmission.
  592. <legal all>
  593. */
  594. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_OFFSET 0x0000000000000000
  595. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_LSB 38
  596. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MSB 38
  597. #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MASK 0x0000004000000000
  598. /* Description PPDU_ALLOWED_BW1
  599. When set, allow PPDU transmission with 1 MHz 11ah bandwidth.
  600. <legal all>
  601. */
  602. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_OFFSET 0x0000000000000000
  603. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_LSB 39
  604. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MSB 39
  605. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MASK 0x0000008000000000
  606. /* Description PPDU_ALLOWED_BW20
  607. Field Not valid in case punctured transmission is enabled.
  608. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  609. puncture_pattern_count
  610. When set, allow PPDU transmission with 20 MHz or 2MHz 11ah
  611. bandwidth
  612. <legal all>
  613. */
  614. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_OFFSET 0x0000000000000000
  615. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_LSB 40
  616. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MSB 40
  617. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MASK 0x0000010000000000
  618. /* Description PPDU_ALLOWED_BW40
  619. Field Not valid in case punctured transmission is enabled.
  620. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  621. puncture_pattern_count
  622. When set, allow PPDU transmission with 40 MHz or 4MHz 11ah
  623. bandwidth
  624. <legal all>
  625. */
  626. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_OFFSET 0x0000000000000000
  627. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_LSB 41
  628. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MSB 41
  629. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MASK 0x0000020000000000
  630. /* Description PPDU_ALLOWED_BW80
  631. Field Not valid in case punctured transmission is enabled.
  632. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  633. puncture_pattern_count
  634. When set, allow PPDU transmission with 80 MHz or 8MHz 11ah
  635. bandwidth
  636. <legal all>
  637. */
  638. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_OFFSET 0x0000000000000000
  639. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_LSB 42
  640. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MSB 42
  641. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MASK 0x0000040000000000
  642. /* Description PPDU_ALLOWED_BW160
  643. Field Not valid in case punctured transmission is enabled.
  644. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  645. puncture_pattern_count
  646. When set, allow PPDU transmission with 160 MHz or 16MHz
  647. 11ah bandwidth
  648. <legal all>
  649. */
  650. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_OFFSET 0x0000000000000000
  651. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_LSB 43
  652. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MSB 43
  653. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MASK 0x0000080000000000
  654. /* Description PPDU_ALLOWED_BW240
  655. Field Not valid in case punctured transmission is enabled.
  656. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  657. puncture_pattern_count
  658. When set, allow PPDU transmission with 240 MHz bandwidth
  659. <legal all>
  660. */
  661. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_OFFSET 0x0000000000000000
  662. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_LSB 44
  663. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MSB 44
  664. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MASK 0x0000100000000000
  665. /* Description PPDU_ALLOWED_BW320
  666. Field Not valid in case punctured transmission is enabled.
  667. This fields meaning is than taken over by field TX_PUNCTURE_SETUP.
  668. puncture_pattern_count
  669. When set, allow PPDU transmission with 320 MHz bandwidth
  670. <legal all>
  671. */
  672. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_OFFSET 0x0000000000000000
  673. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_LSB 45
  674. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MSB 45
  675. #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MASK 0x0000200000000000
  676. /* Description SET_FC_PWR_MGT
  677. Field valid for SU transmissions only
  678. When set, the TXPCU will set the power management bit in
  679. the Frame Control field for the transmitted frames.
  680. Note: this is there for backup purposes only. TXOLE is the
  681. module now that should be setting the pm bit to the proper
  682. value.
  683. <legal all>
  684. */
  685. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_OFFSET 0x0000000000000000
  686. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_LSB 46
  687. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MSB 46
  688. #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MASK 0x0000400000000000
  689. /* Description USE_CTS_DURATION_FOR_DATA_TX
  690. When set, take the value of the duration field from the
  691. CTS frame, and use this as the reference point for how long
  692. the 'data' ppdu transmission can be.
  693. This is an E2E feature.
  694. <legal all>
  695. */
  696. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_OFFSET 0x0000000000000000
  697. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_LSB 47
  698. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MSB 47
  699. #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MASK 0x0000800000000000
  700. /* Description UPDATE_TIMESTAMP_64
  701. When set, TXPCU shall update the timestamp value at the
  702. indicated location.
  703. <legal all>
  704. */
  705. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_OFFSET 0x0000000000000000
  706. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_LSB 48
  707. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MSB 48
  708. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MASK 0x0001000000000000
  709. /* Description UPDATE_TIMESTAMP_32_LOWER
  710. Update the 32 bit timestamp at the offset specified by the
  711. insert_timestamp_offset_32. This will be used for AWDL
  712. action frames. The value of the TSF will be added to the
  713. timestamp field in the packet buffer in memory. The tx_delay
  714. should also be included in the timestamp field<legal all>
  715. */
  716. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_OFFSET 0x0000000000000000
  717. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_LSB 49
  718. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MSB 49
  719. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MASK 0x0002000000000000
  720. /* Description UPDATE_TIMESTAMP_32_UPPER
  721. Update the 64 bit TSF at the offset specified by the insert_timestamp_offset_64.
  722. This will be used for beacons and probe response frames.
  723. The value of the TSF will be added to the TSF field in
  724. the packet buffer in memory. The tx_delay should also be
  725. included in the TSF field
  726. <legal all>
  727. */
  728. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_OFFSET 0x0000000000000000
  729. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_LSB 50
  730. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MSB 50
  731. #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MASK 0x0004000000000000
  732. /* Description RESERVED_1A
  733. <legal 0>
  734. */
  735. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_OFFSET 0x0000000000000000
  736. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_LSB 51
  737. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MSB 63
  738. #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MASK 0xfff8000000000000
  739. /* Description INSERT_TIMESTAMP_OFFSET_0
  740. Byte offset to the first byte of the lower 32 bit timestamp
  741. to be inserted. This is applicable to both beacon and
  742. probe response TSF and the AWDL timestamp<legal all>
  743. */
  744. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_OFFSET 0x0000000000000008
  745. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_LSB 0
  746. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MSB 15
  747. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MASK 0x000000000000ffff
  748. /* Description INSERT_TIMESTAMP_OFFSET_1
  749. Byte offset to the first byte of the upper 32 bit timestamp
  750. to be inserted. This is applicable to both beacon and
  751. probe response TSF and the AWDL timestamp<legal all>
  752. */
  753. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_OFFSET 0x0000000000000008
  754. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_LSB 16
  755. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MSB 31
  756. #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MASK 0x00000000ffff0000
  757. /* Description MAX_BW40_TRY_COUNT
  758. Field only valid when ppdu_allowed_bw40_bw4 or Mprot_required_bw40_bw4
  759. is set.
  760. NOTE: This field is also known as Max_try_count_pattern_1
  761. in case punctured transmission is enabled.
  762. The maximum number of times that TXPCU will try to do a
  763. transmission at this or a higher BW, before deciding to
  764. go to a lower BW.
  765. If this count (as indicated by field Optimal_bw_retry_count
  766. in TX_FES_SETUP) has not been reached yet, and this BW
  767. is not available, TXPCU will generate a flush with flush
  768. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  769. When value is 0, it means that if this BW is not available,
  770. TXPCU should immediately try a lower BW.
  771. Note that this value shall always be equal or greater then:
  772. Max_bw80_try_count
  773. <legal all>
  774. */
  775. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_OFFSET 0x0000000000000008
  776. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_LSB 32
  777. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MSB 35
  778. #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MASK 0x0000000f00000000
  779. /* Description MAX_BW80_TRY_COUNT
  780. Field only valid when ppdu_allowed_bw80_bw4 or Mprot_required_bw80_bw4
  781. is set.
  782. NOTE: This field is also known as Max_try_count_pattern_2
  783. in case punctured transmission is enabled.
  784. The maximum number of times that TXPCU will try to do a
  785. transmission at this or a higher BW, before deciding to
  786. go to a lower BW.
  787. If this count (as indicated by field Optimal_bw_retry_count
  788. in TX_FES_SETUP) has not been reached yet, and this BW
  789. is not available, TXPCU will generate a flush with flush
  790. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  791. When value is 0, it means that if this BW is not available,
  792. TXPCU should immediately try a lower BW.
  793. Note that this value shall always be equal or greater then:
  794. Max_bw160_try_count
  795. <legal all>
  796. */
  797. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_OFFSET 0x0000000000000008
  798. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_LSB 36
  799. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MSB 39
  800. #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MASK 0x000000f000000000
  801. /* Description MAX_BW160_TRY_COUNT
  802. Field only valid when ppdu_allowed_bw160_bw16 or Mprot_required_bw160_bw16
  803. is set.
  804. NOTE: This field is also known as Max_try_count_pattern_3
  805. in case punctured transmission is enabled.
  806. The maximum number of times that TXPCU will try to do a
  807. transmission at this, before deciding to go to a lower BW.
  808. If this count (as indicated by field Optimal_bw_retry_count
  809. in TX_FES_SETUP) has not been reached yet, and this BW
  810. is not available, TXPCU will generate a flush with flush
  811. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  812. When value is 0, it means that if this BW is not available,
  813. TXPCU should immediately try a lower BW.
  814. <legal all>
  815. */
  816. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_OFFSET 0x0000000000000008
  817. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_LSB 40
  818. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MSB 43
  819. #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MASK 0x00000f0000000000
  820. /* Description MAX_BW240_TRY_COUNT
  821. Field only valid when ppdu_allowed_bw240 or Mprot_required_bw240
  822. is set.
  823. NOTE: This field is also known as Max_try_count_pattern_4
  824. in case punctured transmission is enabled.
  825. The maximum number of times that TXPCU will try to do a
  826. transmission at this, before deciding to go to a lower BW.
  827. If this count (as indicated by field Optimal_bw_retry_count
  828. in TX_FES_SETUP) has not been reached yet, and this BW
  829. is not available, TXPCU will generate a flush with flush
  830. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  831. When value is 0, it means that if this BW is not available,
  832. TXPCU should immediately try a lower BW.
  833. <legal all>
  834. */
  835. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_OFFSET 0x0000000000000008
  836. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_LSB 44
  837. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MSB 47
  838. #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MASK 0x0000f00000000000
  839. /* Description MAX_BW320_TRY_COUNT
  840. Field only valid when ppdu_allowed_bw320 or Mprot_required_bw320
  841. is set.
  842. NOTE: This field is also known as Max_try_count_pattern_5
  843. in case punctured transmission is enabled.
  844. The maximum number of times that TXPCU will try to do a
  845. transmission at this, before deciding to go to a lower BW.
  846. If this count (as indicated by field Optimal_bw_retry_count
  847. in TX_FES_SETUP) has not been reached yet, and this BW
  848. is not available, TXPCU will generate a flush with flush
  849. reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.'
  850. When value is 0, it means that if this BW is not available,
  851. TXPCU should immediately try a lower BW.
  852. <legal all>
  853. */
  854. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_OFFSET 0x0000000000000008
  855. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_LSB 48
  856. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MSB 51
  857. #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MASK 0x000f000000000000
  858. /* Description INSERT_WUR_TIMESTAMP_OFFSET
  859. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  860. indicates a .11ba packet
  861. Used by TXPCU to determine the offset within a WUR packet,
  862. e.g. a WUR beacon into which to insert the timestamp.
  863. <legal all>
  864. */
  865. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_OFFSET 0x0000000000000008
  866. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_LSB 52
  867. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MSB 57
  868. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MASK 0x03f0000000000000
  869. /* Description UPDATE_WUR_TIMESTAMP
  870. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  871. indicates a .11ba packet
  872. TXPCU will insert the timestamp into a WUR packet if this
  873. bit is set.
  874. <legal all>
  875. */
  876. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_OFFSET 0x0000000000000008
  877. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_LSB 58
  878. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MSB 58
  879. #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MASK 0x0400000000000000
  880. /* Description WUR_EMBEDDED_BSSID_PRESENT
  881. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  882. indicates a .11ba packet
  883. If this bit is set, TXPCU will assume the packet includes
  884. an extra 16 bits which contain the embedded BSSID to be
  885. used in the WUR FCS calculation. TXPCU will replace the
  886. 16 bits with the 16-bit FCS field.
  887. If this bit is clear, TXPCU will append the 16-bit FCS calculated
  888. without any embedded BSSID.
  889. <legal all>
  890. */
  891. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_OFFSET 0x0000000000000008
  892. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_LSB 59
  893. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MSB 59
  894. #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MASK 0x0800000000000000
  895. /* Description INSERT_WUR_FCS
  896. Field only to be used in case PCU_PPDU_SETUP_START.pkt_type
  897. indicates a .11ba packet
  898. TXPCU will replace/append the FCS bytes for a WUR packet
  899. if this bit is set. The replace/append choice is based
  900. on WUR_embedded_BSSID_present.
  901. <legal all>
  902. */
  903. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_OFFSET 0x0000000000000008
  904. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_LSB 60
  905. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MSB 60
  906. #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MASK 0x1000000000000000
  907. /* Description RESERVED_3B
  908. <legal 0>
  909. */
  910. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_OFFSET 0x0000000000000008
  911. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_LSB 61
  912. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MSB 63
  913. #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MASK 0xe000000000000000
  914. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW20
  915. Field only valid in case of Response_to_response set to
  916. SU_BA or MU_BA
  917. NOTE: This field is also known as response_to_response_rate_info_pattern_0
  918. in case punctured transmission is enabled.
  919. Used by TXPCU to determine what the transmit rates are for
  920. the response to response transmission in case original
  921. transmission was 20 MHz.
  922. Note:
  923. see field R2R_bw20_active_channel for the BW of this transmission
  924. */
  925. /* Description RESERVED_0A
  926. <legal 0>
  927. */
  928. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_OFFSET 0x0000000000000010
  929. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_LSB 0
  930. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MSB 0
  931. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MASK 0x0000000000000001
  932. /* Description TX_ANTENNA_SECTOR_CTRL
  933. Sectored transmit antenna
  934. <legal all>
  935. */
  936. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000010
  937. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_LSB 1
  938. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MSB 24
  939. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  940. /* Description PKT_TYPE
  941. Packet type:
  942. <enum 0 dot11a>802.11a PPDU type
  943. <enum 1 dot11b>802.11b PPDU type
  944. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  945. <enum 3 dot11ac>802.11ac PPDU type
  946. <enum 4 dot11ax>802.11ax PPDU type
  947. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  948. <enum 6 dot11be>802.11be PPDU type
  949. <enum 7 dot11az>802.11az (ranging) PPDU type
  950. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  951. & aborted)
  952. */
  953. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_OFFSET 0x0000000000000010
  954. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_LSB 25
  955. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MSB 28
  956. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MASK 0x000000001e000000
  957. /* Description SMOOTHING
  958. This field is used by PDG to populate the SMOOTHING filed
  959. in the SIG Preamble of the PPDU
  960. <legal 0-1>
  961. */
  962. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_OFFSET 0x0000000000000010
  963. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_LSB 29
  964. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MSB 29
  965. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MASK 0x0000000020000000
  966. /* Description LDPC
  967. When set, use LDPC transmission rates
  968. */
  969. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_OFFSET 0x0000000000000010
  970. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_LSB 30
  971. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MSB 30
  972. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MASK 0x0000000040000000
  973. /* Description STBC
  974. When set, use STBC transmission rates
  975. */
  976. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_OFFSET 0x0000000000000010
  977. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_LSB 31
  978. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MSB 31
  979. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MASK 0x0000000080000000
  980. /* Description ALT_TX_PWR
  981. Coex related AlternativeTransmit parameter
  982. Transmit Power in s6.2 format.
  983. In units of 0.25 dBm
  984. <legal all>
  985. */
  986. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_OFFSET 0x0000000000000010
  987. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_LSB 32
  988. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MSB 39
  989. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MASK 0x000000ff00000000
  990. /* Description ALT_MIN_TX_PWR
  991. Coex related Alternative Transmit parameter
  992. Minimum allowed Transmit Power in s6.2 format.
  993. In units of 0.25 dBm
  994. <legal all>
  995. */
  996. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_OFFSET 0x0000000000000010
  997. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_LSB 40
  998. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MSB 47
  999. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  1000. /* Description ALT_NSS
  1001. Coex related Alternative Transmit parameter
  1002. Number of spatial streams.
  1003. <enum 0 1_spatial_stream>Single spatial stream
  1004. <enum 1 2_spatial_streams>2 spatial streams
  1005. <enum 2 3_spatial_streams>3 spatial streams
  1006. <enum 3 4_spatial_streams>4 spatial streams
  1007. <enum 4 5_spatial_streams>5 spatial streams
  1008. <enum 5 6_spatial_streams>6 spatial streams
  1009. <enum 6 7_spatial_streams>7 spatial streams
  1010. <enum 7 8_spatial_streams>8 spatial streams
  1011. */
  1012. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_OFFSET 0x0000000000000010
  1013. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_LSB 48
  1014. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MSB 50
  1015. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MASK 0x0007000000000000
  1016. /* Description ALT_TX_CHAIN_MASK
  1017. Coex related Alternative Transmit parameter
  1018. Chain mask to support up to 8 antennas.
  1019. <legal 1-255>
  1020. */
  1021. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000010
  1022. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_LSB 51
  1023. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MSB 58
  1024. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  1025. /* Description ALT_BW
  1026. Coex related Alternative Transmit parameter
  1027. The BW of the upcoming transmission.
  1028. <enum 0 20_mhz>20 Mhz BW
  1029. <enum 1 40_mhz>40 Mhz BW
  1030. <enum 2 80_mhz>80 Mhz BW
  1031. <enum 3 160_mhz>160 Mhz BW
  1032. <enum 4 320_mhz>320 Mhz BW
  1033. <enum 5 240_mhz>240 Mhz BW
  1034. */
  1035. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_OFFSET 0x0000000000000010
  1036. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_LSB 59
  1037. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MSB 61
  1038. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MASK 0x3800000000000000
  1039. /* Description STF_LTF_3DB_BOOST
  1040. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  1041. This includes both the legacy preambles and the HT/VHT preambles.0:
  1042. disable power boost1: enable power boost
  1043. <legal all>
  1044. */
  1045. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000010
  1046. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_LSB 62
  1047. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MSB 62
  1048. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  1049. /* Description FORCE_EXTRA_SYMBOL
  1050. Set to 1 to force an extra OFDM symbol (or symbols) even
  1051. if the PPDU encoding process does not result in an extra
  1052. OFDM symbol (or symbols)
  1053. */
  1054. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000010
  1055. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_LSB 63
  1056. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MSB 63
  1057. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  1058. /* Description ALT_RATE_MCS
  1059. Coex related Alternative Transmit parameter
  1060. For details, refer to MCS_TYPE
  1061. Note: This is "rate" in case of 11a/11b
  1062. description
  1063. <legal all>
  1064. */
  1065. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_OFFSET 0x0000000000000018
  1066. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_LSB 0
  1067. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MSB 3
  1068. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MASK 0x000000000000000f
  1069. /* Description NSS
  1070. Number of spatial streams.
  1071. <enum 0 1_spatial_stream>Single spatial stream
  1072. <enum 1 2_spatial_streams>2 spatial streams
  1073. <enum 2 3_spatial_streams>3 spatial streams
  1074. <enum 3 4_spatial_streams>4 spatial streams
  1075. <enum 4 5_spatial_streams>5 spatial streams
  1076. <enum 5 6_spatial_streams>6 spatial streams
  1077. <enum 6 7_spatial_streams>7 spatial streams
  1078. <enum 7 8_spatial_streams>8 spatial streams
  1079. */
  1080. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_OFFSET 0x0000000000000018
  1081. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_LSB 4
  1082. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MSB 6
  1083. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MASK 0x0000000000000070
  1084. /* Description DPD_ENABLE
  1085. DPD enable control
  1086. This is needed on a per packet basis
  1087. <enum 0 dpd_off> DPD profile not applied to current
  1088. packet
  1089. <enum 1 dpd_on> DPD profile applied to current packet
  1090. if available
  1091. <legal 0-1>
  1092. This field is not applicable in11ah mode of operation and
  1093. is ignored by the HW
  1094. */
  1095. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_OFFSET 0x0000000000000018
  1096. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_LSB 7
  1097. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MSB 7
  1098. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MASK 0x0000000000000080
  1099. /* Description TX_PWR
  1100. Transmit Power in s6.2 format.
  1101. In units of 0.25 dBm
  1102. <legal all>
  1103. */
  1104. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_OFFSET 0x0000000000000018
  1105. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_LSB 8
  1106. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MSB 15
  1107. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MASK 0x000000000000ff00
  1108. /* Description MIN_TX_PWR
  1109. Coex related field:
  1110. Minimum allowed Transmit Power in s6.2 format.
  1111. In units of 0.25 dBm
  1112. <legal all>
  1113. */
  1114. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_OFFSET 0x0000000000000018
  1115. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_LSB 16
  1116. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MSB 23
  1117. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MASK 0x0000000000ff0000
  1118. /* Description TX_CHAIN_MASK
  1119. Chain mask to support up to 8 antennas.
  1120. <legal 1-255>
  1121. */
  1122. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_OFFSET 0x0000000000000018
  1123. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_LSB 24
  1124. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MSB 31
  1125. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MASK 0x00000000ff000000
  1126. /* Description RESERVED_3A
  1127. <legal 0>
  1128. */
  1129. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_OFFSET 0x0000000000000018
  1130. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_LSB 32
  1131. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MSB 39
  1132. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MASK 0x000000ff00000000
  1133. /* Description SGI
  1134. Field only valid when pkt type is HT or VHT.For 11ax see
  1135. field Dot11ax_CP_LTF_size
  1136. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  1137. for HE
  1138. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  1139. for HE
  1140. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  1141. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  1142. <legal 0 - 3>
  1143. */
  1144. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_OFFSET 0x0000000000000018
  1145. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_LSB 40
  1146. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MSB 41
  1147. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MASK 0x0000030000000000
  1148. /* Description RATE_MCS
  1149. For details, refer to MCS_TYPE description
  1150. Note: This is "rate" in case of 11a/11b
  1151. <legal all>
  1152. */
  1153. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_OFFSET 0x0000000000000018
  1154. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_LSB 42
  1155. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MSB 45
  1156. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MASK 0x00003c0000000000
  1157. /* Description RESERVED_3B
  1158. <legal 0>
  1159. */
  1160. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_OFFSET 0x0000000000000018
  1161. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_LSB 46
  1162. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MSB 47
  1163. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MASK 0x0000c00000000000
  1164. /* Description TX_PWR_1
  1165. Default (desired) transmit parameter for the second chain
  1166. Transmit Power in s6.2 format.
  1167. In units of 0.25 dBm
  1168. Note that there is no Min value for this
  1169. <legal all>
  1170. */
  1171. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_OFFSET 0x0000000000000018
  1172. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_LSB 48
  1173. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MSB 55
  1174. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MASK 0x00ff000000000000
  1175. /* Description ALT_TX_PWR_1
  1176. Alternate (desired) transmit parameter for the second chain
  1177. Transmit Power in s6.2 format.
  1178. In units of 0.25 dBm
  1179. Note that there is no Min value for this
  1180. <legal all>
  1181. */
  1182. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_OFFSET 0x0000000000000018
  1183. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_LSB 56
  1184. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MSB 63
  1185. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MASK 0xff00000000000000
  1186. /* Description AGGREGATION
  1187. Field only valid in case of pkt_type == 11n
  1188. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  1189. this setting if the CBF response only contains a single
  1190. segment
  1191. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  1192. select this setting if the CBF response will contain two
  1193. or more segments
  1194. <legal 0-1>
  1195. */
  1196. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_OFFSET 0x0000000000000020
  1197. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_LSB 0
  1198. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MSB 0
  1199. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MASK 0x0000000000000001
  1200. /* Description DOT11AX_BSS_COLOR_ID
  1201. BSS color of the nextwork to which this STA belongs.
  1202. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  1203. <legal all>
  1204. */
  1205. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000020
  1206. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_LSB 1
  1207. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MSB 6
  1208. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  1209. /* Description DOT11AX_SPATIAL_REUSE
  1210. This field is only valid for pkt_type == 11ax
  1211. Spatial re-use
  1212. <legal all>
  1213. */
  1214. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000020
  1215. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_LSB 7
  1216. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MSB 10
  1217. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  1218. /* Description DOT11AX_CP_LTF_SIZE
  1219. field is only valid for pkt_type == 11ax
  1220. Indicates the CP and HE-LTF type
  1221. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  1222. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  1223. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  1224. <enum 3 FourX_LTF_0_8CP_3_2CP>
  1225. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  1226. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  1227. In this scenario, Neither DCM nor STBC is applied to HE
  1228. data field.
  1229. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  1230. 0 = 1xLTF + 0.4 usec
  1231. 1 = 2xLTF + 0.4 usec
  1232. 2~3 = Reserved
  1233. <legal all>
  1234. */
  1235. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000020
  1236. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_LSB 11
  1237. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MSB 12
  1238. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  1239. /* Description DOT11AX_DCM
  1240. field is only valid for pkt_type == 11ax
  1241. Indicates whether dual sub-carrier modulation is applied
  1242. 0: No DCM
  1243. 1:DCM
  1244. <legal all>
  1245. */
  1246. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_OFFSET 0x0000000000000020
  1247. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_LSB 13
  1248. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MSB 13
  1249. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MASK 0x0000000000002000
  1250. /* Description DOT11AX_DOPPLER_INDICATION
  1251. field is only valid for pkt_type == 11ax
  1252. 0: No Doppler support
  1253. 1: Doppler support
  1254. <legal all>
  1255. */
  1256. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000020
  1257. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_LSB 14
  1258. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MSB 14
  1259. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  1260. /* Description DOT11AX_SU_EXTENDED
  1261. field is only valid for pkt_type == 11ax OR pkt_type ==
  1262. 11be
  1263. When set, the 11ax or 11be frame is of the extended range
  1264. format
  1265. <legal all>
  1266. */
  1267. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000020
  1268. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_LSB 15
  1269. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MSB 15
  1270. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  1271. /* Description DOT11AX_MIN_PACKET_EXTENSION
  1272. field is only valid for pkt_type == 11ax OR pkt_type ==
  1273. 11be
  1274. The min packet extension duration for this user.
  1275. 0: no extension
  1276. 1: 8us
  1277. 2: 16 us
  1278. 3: 20 us (only for .11be)
  1279. <legal 0-3>
  1280. */
  1281. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000020
  1282. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  1283. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  1284. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  1285. /* Description DOT11AX_PE_NSS
  1286. Number of active spatial streams during packet extension.
  1287. <enum 0 1_spatial_stream>Single spatial stream
  1288. <enum 1 2_spatial_streams>2 spatial streams
  1289. <enum 2 3_spatial_streams>3 spatial streams
  1290. <enum 3 4_spatial_streams>4 spatial streams
  1291. <enum 4 5_spatial_streams>5 spatial streams
  1292. <enum 5 6_spatial_streams>6 spatial streams
  1293. <enum 6 7_spatial_streams>7 spatial streams
  1294. <enum 7 8_spatial_streams>8 spatial streams
  1295. */
  1296. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_OFFSET 0x0000000000000020
  1297. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_LSB 18
  1298. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MSB 20
  1299. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  1300. /* Description DOT11AX_PE_CONTENT
  1301. Content of packet extension. Valid for all 11ax packets
  1302. having packet extension
  1303. 0-he_ltf, 1-last_data_symbol
  1304. <legal all>
  1305. */
  1306. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000020
  1307. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_LSB 21
  1308. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MSB 21
  1309. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  1310. /* Description DOT11AX_PE_LTF_SIZE
  1311. LTF size to be used during packet extention. . This field
  1312. is valid for both FTM and non-FTM packets.
  1313. 0-1x
  1314. 1-2x (unsupported un HWK-1)
  1315. 2-4x (unsupported un HWK-1)
  1316. <legal all>
  1317. */
  1318. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000020
  1319. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_LSB 22
  1320. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MSB 23
  1321. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  1322. /* Description DOT11AX_CHAIN_CSD_EN
  1323. This field denotes whether to apply CSD on the preamble
  1324. and data portion of the packet. This field is valid for
  1325. all transmit packets
  1326. 0: disable per-chain csd
  1327. 1: enable per-chain csd
  1328. <legal all>
  1329. */
  1330. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000020
  1331. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_LSB 24
  1332. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MSB 24
  1333. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  1334. /* Description DOT11AX_PE_CHAIN_CSD_EN
  1335. This field denotes whether to apply CSD on the packet extension
  1336. portion of the packet. This field is valid for all 11ax
  1337. packets.
  1338. 0: disable per-chain csd
  1339. 1: enable per-chain csd
  1340. <legal all>
  1341. */
  1342. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000020
  1343. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  1344. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  1345. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  1346. /* Description DOT11AX_DL_UL_FLAG
  1347. field is only valid for pkt_type == 11ax
  1348. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  1349. <enum 1 DL_UL_FLAG_IS_UL>
  1350. <legal all>
  1351. */
  1352. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000020
  1353. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_LSB 26
  1354. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MSB 26
  1355. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  1356. /* Description RESERVED_4A
  1357. <legal 0>
  1358. */
  1359. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_OFFSET 0x0000000000000020
  1360. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_LSB 27
  1361. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MSB 31
  1362. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MASK 0x00000000f8000000
  1363. /* Description DOT11AX_EXT_RU_START_INDEX
  1364. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1365. == 1
  1366. RU Number to which User is assigned
  1367. The RU numbering bitwidth is only enough to cover the 20MHz
  1368. BW that extended range allows
  1369. <legal 0-8>
  1370. */
  1371. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000020
  1372. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_LSB 32
  1373. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MSB 35
  1374. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  1375. /* Description DOT11AX_EXT_RU_SIZE
  1376. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1377. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  1378. The size of the RU for this user.
  1379. In case of EHT duplicate transmissions, this field indicates
  1380. the width of the actual content before duplication, e.g.
  1381. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  1382. fields indicating 160 MHz and this field set to e-num 4
  1383. (RU_484).
  1384. <enum 0 RU_26>
  1385. <enum 1 RU_52>
  1386. <enum 2 RU_106>
  1387. <enum 3 RU_242>
  1388. <enum 4 RU_484>
  1389. <enum 5 RU_996>
  1390. <enum 6 RU_1992>
  1391. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  1392. bandwidth
  1393. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  1394. packet bandwidth
  1395. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  1396. packet bandwidth
  1397. <enum 10 RU_MULTI_LARGE> DO NOT USE
  1398. <enum 11 RU_78> DO NOT USE
  1399. <enum 12 RU_132> DO NOT USE
  1400. <legal 0-12>
  1401. */
  1402. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000020
  1403. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_LSB 36
  1404. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MSB 39
  1405. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  1406. /* Description EHT_DUPLICATE_MODE
  1407. Field only valid for pkt_type == 11be
  1408. Indicates EHT duplicate modulation
  1409. <enum 0 eht_no_duplicate>
  1410. <enum 1 eht_2x_duplicate>
  1411. <enum 2 eht_4x_duplicate>
  1412. <legal 0-2>
  1413. */
  1414. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000020
  1415. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_LSB 40
  1416. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MSB 41
  1417. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  1418. /* Description HE_SIGB_DCM
  1419. Indicates whether dual sub-carrier modulation is applied
  1420. to EHT-SIG
  1421. <legal all>
  1422. */
  1423. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_OFFSET 0x0000000000000020
  1424. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_LSB 42
  1425. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MSB 42
  1426. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MASK 0x0000040000000000
  1427. /* Description HE_SIGB_0_MCS
  1428. Indicates the MCS of EHT-SIG
  1429. For details, refer to MCS_TYPE description
  1430. <legal all>
  1431. */
  1432. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_OFFSET 0x0000000000000020
  1433. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_LSB 43
  1434. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MSB 45
  1435. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MASK 0x0000380000000000
  1436. /* Description NUM_HE_SIGB_SYM
  1437. Indicates the number of EHT-SIG symbols
  1438. This field is 0-based with 0 indicating that 1 eht_sig symbol
  1439. needs to be transmitted.
  1440. <legal all>
  1441. */
  1442. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000020
  1443. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_LSB 46
  1444. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MSB 50
  1445. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  1446. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  1447. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  1448. HT Control for sync MLO response
  1449. <enum 1 reqd_resp_time_src_is_FW>
  1450. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  1451. to response
  1452. <legal all>
  1453. */
  1454. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000020
  1455. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  1456. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  1457. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  1458. /* Description RESERVED_5A
  1459. <legal 0>
  1460. */
  1461. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_OFFSET 0x0000000000000020
  1462. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_LSB 52
  1463. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MSB 57
  1464. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MASK 0x03f0000000000000
  1465. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  1466. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  1467. to pass on to PDG
  1468. <legal 0-29>
  1469. */
  1470. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000020
  1471. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  1472. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  1473. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  1474. /* Description MLO_STA_ID_DETAILS_RX
  1475. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  1476. on to PDG
  1477. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  1478. from address search.
  1479. See definition of mlo_sta_id_details.
  1480. */
  1481. /* Description NSTR_MLO_STA_ID
  1482. ID of peer participating in non-STR MLO
  1483. */
  1484. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000028
  1485. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  1486. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  1487. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  1488. /* Description BLOCK_SELF_ML_SYNC
  1489. Only valid for TX
  1490. When set, this provides an indication to block the peer
  1491. for self-link.
  1492. */
  1493. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000028
  1494. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  1495. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  1496. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  1497. /* Description BLOCK_PARTNER_ML_SYNC
  1498. Only valid for TX
  1499. When set, this provides an indication to block the peer
  1500. for partner links.
  1501. */
  1502. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000028
  1503. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  1504. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  1505. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  1506. /* Description NSTR_MLO_STA_ID_VALID
  1507. All the fields in this TLV are valid only if this bit is
  1508. set.
  1509. */
  1510. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000028
  1511. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  1512. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  1513. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  1514. /* Description RESERVED_0A
  1515. <legal 0>
  1516. */
  1517. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000028
  1518. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  1519. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  1520. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  1521. /* Description REQUIRED_RESPONSE_TIME
  1522. When non-zero, indicates that PDG shall pad the response
  1523. transmission to the indicated duration (in us)
  1524. */
  1525. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000028
  1526. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_LSB 16
  1527. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MSB 27
  1528. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  1529. /* Description DOT11BE_PARAMS_PLACEHOLDER
  1530. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  1531. */
  1532. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000028
  1533. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  1534. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  1535. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  1536. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW40
  1537. Field only valid in case of Response_to_response set to
  1538. SU_BA or MU_BA
  1539. NOTE: This field is also known as response_to_response_rate_info_pattern_1
  1540. in case punctured transmission is enabled.
  1541. Used by TXPCU to determine what the transmit rates are for
  1542. the response to response transmission in case original
  1543. transmission was 40 MHz.
  1544. Note:
  1545. see field R2R_bw40_active_channel for the BW of this transmission
  1546. */
  1547. /* Description RESERVED_0A
  1548. <legal 0>
  1549. */
  1550. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_OFFSET 0x0000000000000028
  1551. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_LSB 32
  1552. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MSB 32
  1553. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MASK 0x0000000100000000
  1554. /* Description TX_ANTENNA_SECTOR_CTRL
  1555. Sectored transmit antenna
  1556. <legal all>
  1557. */
  1558. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000028
  1559. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_LSB 33
  1560. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MSB 56
  1561. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  1562. /* Description PKT_TYPE
  1563. Packet type:
  1564. <enum 0 dot11a>802.11a PPDU type
  1565. <enum 1 dot11b>802.11b PPDU type
  1566. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  1567. <enum 3 dot11ac>802.11ac PPDU type
  1568. <enum 4 dot11ax>802.11ax PPDU type
  1569. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  1570. <enum 6 dot11be>802.11be PPDU type
  1571. <enum 7 dot11az>802.11az (ranging) PPDU type
  1572. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  1573. & aborted)
  1574. */
  1575. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_OFFSET 0x0000000000000028
  1576. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_LSB 57
  1577. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MSB 60
  1578. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MASK 0x1e00000000000000
  1579. /* Description SMOOTHING
  1580. This field is used by PDG to populate the SMOOTHING filed
  1581. in the SIG Preamble of the PPDU
  1582. <legal 0-1>
  1583. */
  1584. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_OFFSET 0x0000000000000028
  1585. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_LSB 61
  1586. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MSB 61
  1587. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MASK 0x2000000000000000
  1588. /* Description LDPC
  1589. When set, use LDPC transmission rates
  1590. */
  1591. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_OFFSET 0x0000000000000028
  1592. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_LSB 62
  1593. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MSB 62
  1594. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MASK 0x4000000000000000
  1595. /* Description STBC
  1596. When set, use STBC transmission rates
  1597. */
  1598. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_OFFSET 0x0000000000000028
  1599. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_LSB 63
  1600. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MSB 63
  1601. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MASK 0x8000000000000000
  1602. /* Description ALT_TX_PWR
  1603. Coex related AlternativeTransmit parameter
  1604. Transmit Power in s6.2 format.
  1605. In units of 0.25 dBm
  1606. <legal all>
  1607. */
  1608. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_OFFSET 0x0000000000000030
  1609. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_LSB 0
  1610. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MSB 7
  1611. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MASK 0x00000000000000ff
  1612. /* Description ALT_MIN_TX_PWR
  1613. Coex related Alternative Transmit parameter
  1614. Minimum allowed Transmit Power in s6.2 format.
  1615. In units of 0.25 dBm
  1616. <legal all>
  1617. */
  1618. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_OFFSET 0x0000000000000030
  1619. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_LSB 8
  1620. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MSB 15
  1621. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  1622. /* Description ALT_NSS
  1623. Coex related Alternative Transmit parameter
  1624. Number of spatial streams.
  1625. <enum 0 1_spatial_stream>Single spatial stream
  1626. <enum 1 2_spatial_streams>2 spatial streams
  1627. <enum 2 3_spatial_streams>3 spatial streams
  1628. <enum 3 4_spatial_streams>4 spatial streams
  1629. <enum 4 5_spatial_streams>5 spatial streams
  1630. <enum 5 6_spatial_streams>6 spatial streams
  1631. <enum 6 7_spatial_streams>7 spatial streams
  1632. <enum 7 8_spatial_streams>8 spatial streams
  1633. */
  1634. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_OFFSET 0x0000000000000030
  1635. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_LSB 16
  1636. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MSB 18
  1637. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MASK 0x0000000000070000
  1638. /* Description ALT_TX_CHAIN_MASK
  1639. Coex related Alternative Transmit parameter
  1640. Chain mask to support up to 8 antennas.
  1641. <legal 1-255>
  1642. */
  1643. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000030
  1644. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_LSB 19
  1645. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MSB 26
  1646. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  1647. /* Description ALT_BW
  1648. Coex related Alternative Transmit parameter
  1649. The BW of the upcoming transmission.
  1650. <enum 0 20_mhz>20 Mhz BW
  1651. <enum 1 40_mhz>40 Mhz BW
  1652. <enum 2 80_mhz>80 Mhz BW
  1653. <enum 3 160_mhz>160 Mhz BW
  1654. <enum 4 320_mhz>320 Mhz BW
  1655. <enum 5 240_mhz>240 Mhz BW
  1656. */
  1657. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_OFFSET 0x0000000000000030
  1658. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_LSB 27
  1659. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MSB 29
  1660. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MASK 0x0000000038000000
  1661. /* Description STF_LTF_3DB_BOOST
  1662. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  1663. This includes both the legacy preambles and the HT/VHT preambles.0:
  1664. disable power boost1: enable power boost
  1665. <legal all>
  1666. */
  1667. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000030
  1668. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_LSB 30
  1669. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MSB 30
  1670. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  1671. /* Description FORCE_EXTRA_SYMBOL
  1672. Set to 1 to force an extra OFDM symbol (or symbols) even
  1673. if the PPDU encoding process does not result in an extra
  1674. OFDM symbol (or symbols)
  1675. */
  1676. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000030
  1677. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_LSB 31
  1678. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MSB 31
  1679. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  1680. /* Description ALT_RATE_MCS
  1681. Coex related Alternative Transmit parameter
  1682. For details, refer to MCS_TYPE
  1683. Note: This is "rate" in case of 11a/11b
  1684. description
  1685. <legal all>
  1686. */
  1687. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_OFFSET 0x0000000000000030
  1688. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_LSB 32
  1689. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MSB 35
  1690. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MASK 0x0000000f00000000
  1691. /* Description NSS
  1692. Number of spatial streams.
  1693. <enum 0 1_spatial_stream>Single spatial stream
  1694. <enum 1 2_spatial_streams>2 spatial streams
  1695. <enum 2 3_spatial_streams>3 spatial streams
  1696. <enum 3 4_spatial_streams>4 spatial streams
  1697. <enum 4 5_spatial_streams>5 spatial streams
  1698. <enum 5 6_spatial_streams>6 spatial streams
  1699. <enum 6 7_spatial_streams>7 spatial streams
  1700. <enum 7 8_spatial_streams>8 spatial streams
  1701. */
  1702. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_OFFSET 0x0000000000000030
  1703. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_LSB 36
  1704. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MSB 38
  1705. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MASK 0x0000007000000000
  1706. /* Description DPD_ENABLE
  1707. DPD enable control
  1708. This is needed on a per packet basis
  1709. <enum 0 dpd_off> DPD profile not applied to current
  1710. packet
  1711. <enum 1 dpd_on> DPD profile applied to current packet
  1712. if available
  1713. <legal 0-1>
  1714. This field is not applicable in11ah mode of operation and
  1715. is ignored by the HW
  1716. */
  1717. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_OFFSET 0x0000000000000030
  1718. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_LSB 39
  1719. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MSB 39
  1720. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MASK 0x0000008000000000
  1721. /* Description TX_PWR
  1722. Transmit Power in s6.2 format.
  1723. In units of 0.25 dBm
  1724. <legal all>
  1725. */
  1726. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_OFFSET 0x0000000000000030
  1727. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_LSB 40
  1728. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MSB 47
  1729. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MASK 0x0000ff0000000000
  1730. /* Description MIN_TX_PWR
  1731. Coex related field:
  1732. Minimum allowed Transmit Power in s6.2 format.
  1733. In units of 0.25 dBm
  1734. <legal all>
  1735. */
  1736. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_OFFSET 0x0000000000000030
  1737. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_LSB 48
  1738. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MSB 55
  1739. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MASK 0x00ff000000000000
  1740. /* Description TX_CHAIN_MASK
  1741. Chain mask to support up to 8 antennas.
  1742. <legal 1-255>
  1743. */
  1744. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_OFFSET 0x0000000000000030
  1745. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_LSB 56
  1746. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MSB 63
  1747. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MASK 0xff00000000000000
  1748. /* Description RESERVED_3A
  1749. <legal 0>
  1750. */
  1751. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_OFFSET 0x0000000000000038
  1752. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_LSB 0
  1753. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MSB 7
  1754. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MASK 0x00000000000000ff
  1755. /* Description SGI
  1756. Field only valid when pkt type is HT or VHT.For 11ax see
  1757. field Dot11ax_CP_LTF_size
  1758. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  1759. for HE
  1760. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  1761. for HE
  1762. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  1763. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  1764. <legal 0 - 3>
  1765. */
  1766. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_OFFSET 0x0000000000000038
  1767. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_LSB 8
  1768. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MSB 9
  1769. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MASK 0x0000000000000300
  1770. /* Description RATE_MCS
  1771. For details, refer to MCS_TYPE description
  1772. Note: This is "rate" in case of 11a/11b
  1773. <legal all>
  1774. */
  1775. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_OFFSET 0x0000000000000038
  1776. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_LSB 10
  1777. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MSB 13
  1778. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MASK 0x0000000000003c00
  1779. /* Description RESERVED_3B
  1780. <legal 0>
  1781. */
  1782. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_OFFSET 0x0000000000000038
  1783. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_LSB 14
  1784. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MSB 15
  1785. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MASK 0x000000000000c000
  1786. /* Description TX_PWR_1
  1787. Default (desired) transmit parameter for the second chain
  1788. Transmit Power in s6.2 format.
  1789. In units of 0.25 dBm
  1790. Note that there is no Min value for this
  1791. <legal all>
  1792. */
  1793. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_OFFSET 0x0000000000000038
  1794. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_LSB 16
  1795. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MSB 23
  1796. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MASK 0x0000000000ff0000
  1797. /* Description ALT_TX_PWR_1
  1798. Alternate (desired) transmit parameter for the second chain
  1799. Transmit Power in s6.2 format.
  1800. In units of 0.25 dBm
  1801. Note that there is no Min value for this
  1802. <legal all>
  1803. */
  1804. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_OFFSET 0x0000000000000038
  1805. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_LSB 24
  1806. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MSB 31
  1807. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MASK 0x00000000ff000000
  1808. /* Description AGGREGATION
  1809. Field only valid in case of pkt_type == 11n
  1810. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  1811. this setting if the CBF response only contains a single
  1812. segment
  1813. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  1814. select this setting if the CBF response will contain two
  1815. or more segments
  1816. <legal 0-1>
  1817. */
  1818. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_OFFSET 0x0000000000000038
  1819. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_LSB 32
  1820. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MSB 32
  1821. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MASK 0x0000000100000000
  1822. /* Description DOT11AX_BSS_COLOR_ID
  1823. BSS color of the nextwork to which this STA belongs.
  1824. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  1825. <legal all>
  1826. */
  1827. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000038
  1828. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_LSB 33
  1829. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MSB 38
  1830. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  1831. /* Description DOT11AX_SPATIAL_REUSE
  1832. This field is only valid for pkt_type == 11ax
  1833. Spatial re-use
  1834. <legal all>
  1835. */
  1836. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000038
  1837. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_LSB 39
  1838. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MSB 42
  1839. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  1840. /* Description DOT11AX_CP_LTF_SIZE
  1841. field is only valid for pkt_type == 11ax
  1842. Indicates the CP and HE-LTF type
  1843. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  1844. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  1845. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  1846. <enum 3 FourX_LTF_0_8CP_3_2CP>
  1847. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  1848. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  1849. In this scenario, Neither DCM nor STBC is applied to HE
  1850. data field.
  1851. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  1852. 0 = 1xLTF + 0.4 usec
  1853. 1 = 2xLTF + 0.4 usec
  1854. 2~3 = Reserved
  1855. <legal all>
  1856. */
  1857. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000038
  1858. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_LSB 43
  1859. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MSB 44
  1860. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  1861. /* Description DOT11AX_DCM
  1862. field is only valid for pkt_type == 11ax
  1863. Indicates whether dual sub-carrier modulation is applied
  1864. 0: No DCM
  1865. 1:DCM
  1866. <legal all>
  1867. */
  1868. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_OFFSET 0x0000000000000038
  1869. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_LSB 45
  1870. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MSB 45
  1871. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MASK 0x0000200000000000
  1872. /* Description DOT11AX_DOPPLER_INDICATION
  1873. field is only valid for pkt_type == 11ax
  1874. 0: No Doppler support
  1875. 1: Doppler support
  1876. <legal all>
  1877. */
  1878. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000038
  1879. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_LSB 46
  1880. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MSB 46
  1881. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  1882. /* Description DOT11AX_SU_EXTENDED
  1883. field is only valid for pkt_type == 11ax OR pkt_type ==
  1884. 11be
  1885. When set, the 11ax or 11be frame is of the extended range
  1886. format
  1887. <legal all>
  1888. */
  1889. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000038
  1890. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_LSB 47
  1891. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MSB 47
  1892. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  1893. /* Description DOT11AX_MIN_PACKET_EXTENSION
  1894. field is only valid for pkt_type == 11ax OR pkt_type ==
  1895. 11be
  1896. The min packet extension duration for this user.
  1897. 0: no extension
  1898. 1: 8us
  1899. 2: 16 us
  1900. 3: 20 us (only for .11be)
  1901. <legal 0-3>
  1902. */
  1903. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000038
  1904. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  1905. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  1906. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  1907. /* Description DOT11AX_PE_NSS
  1908. Number of active spatial streams during packet extension.
  1909. <enum 0 1_spatial_stream>Single spatial stream
  1910. <enum 1 2_spatial_streams>2 spatial streams
  1911. <enum 2 3_spatial_streams>3 spatial streams
  1912. <enum 3 4_spatial_streams>4 spatial streams
  1913. <enum 4 5_spatial_streams>5 spatial streams
  1914. <enum 5 6_spatial_streams>6 spatial streams
  1915. <enum 6 7_spatial_streams>7 spatial streams
  1916. <enum 7 8_spatial_streams>8 spatial streams
  1917. */
  1918. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_OFFSET 0x0000000000000038
  1919. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_LSB 50
  1920. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MSB 52
  1921. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MASK 0x001c000000000000
  1922. /* Description DOT11AX_PE_CONTENT
  1923. Content of packet extension. Valid for all 11ax packets
  1924. having packet extension
  1925. 0-he_ltf, 1-last_data_symbol
  1926. <legal all>
  1927. */
  1928. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000038
  1929. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_LSB 53
  1930. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MSB 53
  1931. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  1932. /* Description DOT11AX_PE_LTF_SIZE
  1933. LTF size to be used during packet extention. . This field
  1934. is valid for both FTM and non-FTM packets.
  1935. 0-1x
  1936. 1-2x (unsupported un HWK-1)
  1937. 2-4x (unsupported un HWK-1)
  1938. <legal all>
  1939. */
  1940. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000038
  1941. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_LSB 54
  1942. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MSB 55
  1943. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  1944. /* Description DOT11AX_CHAIN_CSD_EN
  1945. This field denotes whether to apply CSD on the preamble
  1946. and data portion of the packet. This field is valid for
  1947. all transmit packets
  1948. 0: disable per-chain csd
  1949. 1: enable per-chain csd
  1950. <legal all>
  1951. */
  1952. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000038
  1953. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_LSB 56
  1954. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MSB 56
  1955. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  1956. /* Description DOT11AX_PE_CHAIN_CSD_EN
  1957. This field denotes whether to apply CSD on the packet extension
  1958. portion of the packet. This field is valid for all 11ax
  1959. packets.
  1960. 0: disable per-chain csd
  1961. 1: enable per-chain csd
  1962. <legal all>
  1963. */
  1964. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000038
  1965. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  1966. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  1967. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  1968. /* Description DOT11AX_DL_UL_FLAG
  1969. field is only valid for pkt_type == 11ax
  1970. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  1971. <enum 1 DL_UL_FLAG_IS_UL>
  1972. <legal all>
  1973. */
  1974. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000038
  1975. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_LSB 58
  1976. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MSB 58
  1977. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  1978. /* Description RESERVED_4A
  1979. <legal 0>
  1980. */
  1981. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_OFFSET 0x0000000000000038
  1982. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_LSB 59
  1983. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MSB 63
  1984. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MASK 0xf800000000000000
  1985. /* Description DOT11AX_EXT_RU_START_INDEX
  1986. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1987. == 1
  1988. RU Number to which User is assigned
  1989. The RU numbering bitwidth is only enough to cover the 20MHz
  1990. BW that extended range allows
  1991. <legal 0-8>
  1992. */
  1993. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000040
  1994. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_LSB 0
  1995. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MSB 3
  1996. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  1997. /* Description DOT11AX_EXT_RU_SIZE
  1998. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  1999. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  2000. The size of the RU for this user.
  2001. In case of EHT duplicate transmissions, this field indicates
  2002. the width of the actual content before duplication, e.g.
  2003. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  2004. fields indicating 160 MHz and this field set to e-num 4
  2005. (RU_484).
  2006. <enum 0 RU_26>
  2007. <enum 1 RU_52>
  2008. <enum 2 RU_106>
  2009. <enum 3 RU_242>
  2010. <enum 4 RU_484>
  2011. <enum 5 RU_996>
  2012. <enum 6 RU_1992>
  2013. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  2014. bandwidth
  2015. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  2016. packet bandwidth
  2017. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  2018. packet bandwidth
  2019. <enum 10 RU_MULTI_LARGE> DO NOT USE
  2020. <enum 11 RU_78> DO NOT USE
  2021. <enum 12 RU_132> DO NOT USE
  2022. <legal 0-12>
  2023. */
  2024. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000040
  2025. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_LSB 4
  2026. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MSB 7
  2027. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  2028. /* Description EHT_DUPLICATE_MODE
  2029. Field only valid for pkt_type == 11be
  2030. Indicates EHT duplicate modulation
  2031. <enum 0 eht_no_duplicate>
  2032. <enum 1 eht_2x_duplicate>
  2033. <enum 2 eht_4x_duplicate>
  2034. <legal 0-2>
  2035. */
  2036. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000040
  2037. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_LSB 8
  2038. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MSB 9
  2039. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  2040. /* Description HE_SIGB_DCM
  2041. Indicates whether dual sub-carrier modulation is applied
  2042. to EHT-SIG
  2043. <legal all>
  2044. */
  2045. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_OFFSET 0x0000000000000040
  2046. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_LSB 10
  2047. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MSB 10
  2048. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MASK 0x0000000000000400
  2049. /* Description HE_SIGB_0_MCS
  2050. Indicates the MCS of EHT-SIG
  2051. For details, refer to MCS_TYPE description
  2052. <legal all>
  2053. */
  2054. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_OFFSET 0x0000000000000040
  2055. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_LSB 11
  2056. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MSB 13
  2057. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MASK 0x0000000000003800
  2058. /* Description NUM_HE_SIGB_SYM
  2059. Indicates the number of EHT-SIG symbols
  2060. This field is 0-based with 0 indicating that 1 eht_sig symbol
  2061. needs to be transmitted.
  2062. <legal all>
  2063. */
  2064. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000040
  2065. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_LSB 14
  2066. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MSB 18
  2067. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  2068. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  2069. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  2070. HT Control for sync MLO response
  2071. <enum 1 reqd_resp_time_src_is_FW>
  2072. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  2073. to response
  2074. <legal all>
  2075. */
  2076. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000040
  2077. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  2078. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  2079. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  2080. /* Description RESERVED_5A
  2081. <legal 0>
  2082. */
  2083. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_OFFSET 0x0000000000000040
  2084. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_LSB 20
  2085. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MSB 25
  2086. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MASK 0x0000000003f00000
  2087. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  2088. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  2089. to pass on to PDG
  2090. <legal 0-29>
  2091. */
  2092. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000040
  2093. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  2094. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  2095. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  2096. /* Description MLO_STA_ID_DETAILS_RX
  2097. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  2098. on to PDG
  2099. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  2100. from address search.
  2101. See definition of mlo_sta_id_details.
  2102. */
  2103. /* Description NSTR_MLO_STA_ID
  2104. ID of peer participating in non-STR MLO
  2105. */
  2106. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000040
  2107. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  2108. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  2109. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  2110. /* Description BLOCK_SELF_ML_SYNC
  2111. Only valid for TX
  2112. When set, this provides an indication to block the peer
  2113. for self-link.
  2114. */
  2115. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000040
  2116. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  2117. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  2118. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  2119. /* Description BLOCK_PARTNER_ML_SYNC
  2120. Only valid for TX
  2121. When set, this provides an indication to block the peer
  2122. for partner links.
  2123. */
  2124. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000040
  2125. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  2126. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  2127. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  2128. /* Description NSTR_MLO_STA_ID_VALID
  2129. All the fields in this TLV are valid only if this bit is
  2130. set.
  2131. */
  2132. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000040
  2133. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  2134. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  2135. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  2136. /* Description RESERVED_0A
  2137. <legal 0>
  2138. */
  2139. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000040
  2140. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  2141. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  2142. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  2143. /* Description REQUIRED_RESPONSE_TIME
  2144. When non-zero, indicates that PDG shall pad the response
  2145. transmission to the indicated duration (in us)
  2146. */
  2147. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000040
  2148. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_LSB 48
  2149. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MSB 59
  2150. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  2151. /* Description DOT11BE_PARAMS_PLACEHOLDER
  2152. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  2153. */
  2154. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000040
  2155. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  2156. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  2157. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  2158. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW80
  2159. Field only valid in case of Response_to_response set to
  2160. SU_BA or MU_BA
  2161. NOTE: This field is also known as response_to_response_rate_info_pattern_2
  2162. in case punctured transmission is enabled.
  2163. Used by TXPCU to determine what the transmit rates are for
  2164. the response to response transmission in case original
  2165. transmission was 80 MHz.
  2166. Note:
  2167. see field R2R_bw80_active_channel for the BW of this transmission
  2168. */
  2169. /* Description RESERVED_0A
  2170. <legal 0>
  2171. */
  2172. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_OFFSET 0x0000000000000048
  2173. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_LSB 0
  2174. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MSB 0
  2175. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MASK 0x0000000000000001
  2176. /* Description TX_ANTENNA_SECTOR_CTRL
  2177. Sectored transmit antenna
  2178. <legal all>
  2179. */
  2180. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000048
  2181. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_LSB 1
  2182. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MSB 24
  2183. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  2184. /* Description PKT_TYPE
  2185. Packet type:
  2186. <enum 0 dot11a>802.11a PPDU type
  2187. <enum 1 dot11b>802.11b PPDU type
  2188. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  2189. <enum 3 dot11ac>802.11ac PPDU type
  2190. <enum 4 dot11ax>802.11ax PPDU type
  2191. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  2192. <enum 6 dot11be>802.11be PPDU type
  2193. <enum 7 dot11az>802.11az (ranging) PPDU type
  2194. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  2195. & aborted)
  2196. */
  2197. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_OFFSET 0x0000000000000048
  2198. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_LSB 25
  2199. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MSB 28
  2200. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MASK 0x000000001e000000
  2201. /* Description SMOOTHING
  2202. This field is used by PDG to populate the SMOOTHING filed
  2203. in the SIG Preamble of the PPDU
  2204. <legal 0-1>
  2205. */
  2206. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_OFFSET 0x0000000000000048
  2207. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_LSB 29
  2208. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MSB 29
  2209. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MASK 0x0000000020000000
  2210. /* Description LDPC
  2211. When set, use LDPC transmission rates
  2212. */
  2213. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_OFFSET 0x0000000000000048
  2214. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_LSB 30
  2215. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MSB 30
  2216. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MASK 0x0000000040000000
  2217. /* Description STBC
  2218. When set, use STBC transmission rates
  2219. */
  2220. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_OFFSET 0x0000000000000048
  2221. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_LSB 31
  2222. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MSB 31
  2223. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MASK 0x0000000080000000
  2224. /* Description ALT_TX_PWR
  2225. Coex related AlternativeTransmit parameter
  2226. Transmit Power in s6.2 format.
  2227. In units of 0.25 dBm
  2228. <legal all>
  2229. */
  2230. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_OFFSET 0x0000000000000048
  2231. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_LSB 32
  2232. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MSB 39
  2233. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MASK 0x000000ff00000000
  2234. /* Description ALT_MIN_TX_PWR
  2235. Coex related Alternative Transmit parameter
  2236. Minimum allowed Transmit Power in s6.2 format.
  2237. In units of 0.25 dBm
  2238. <legal all>
  2239. */
  2240. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_OFFSET 0x0000000000000048
  2241. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_LSB 40
  2242. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MSB 47
  2243. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  2244. /* Description ALT_NSS
  2245. Coex related Alternative Transmit parameter
  2246. Number of spatial streams.
  2247. <enum 0 1_spatial_stream>Single spatial stream
  2248. <enum 1 2_spatial_streams>2 spatial streams
  2249. <enum 2 3_spatial_streams>3 spatial streams
  2250. <enum 3 4_spatial_streams>4 spatial streams
  2251. <enum 4 5_spatial_streams>5 spatial streams
  2252. <enum 5 6_spatial_streams>6 spatial streams
  2253. <enum 6 7_spatial_streams>7 spatial streams
  2254. <enum 7 8_spatial_streams>8 spatial streams
  2255. */
  2256. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_OFFSET 0x0000000000000048
  2257. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_LSB 48
  2258. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MSB 50
  2259. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MASK 0x0007000000000000
  2260. /* Description ALT_TX_CHAIN_MASK
  2261. Coex related Alternative Transmit parameter
  2262. Chain mask to support up to 8 antennas.
  2263. <legal 1-255>
  2264. */
  2265. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000048
  2266. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_LSB 51
  2267. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MSB 58
  2268. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  2269. /* Description ALT_BW
  2270. Coex related Alternative Transmit parameter
  2271. The BW of the upcoming transmission.
  2272. <enum 0 20_mhz>20 Mhz BW
  2273. <enum 1 40_mhz>40 Mhz BW
  2274. <enum 2 80_mhz>80 Mhz BW
  2275. <enum 3 160_mhz>160 Mhz BW
  2276. <enum 4 320_mhz>320 Mhz BW
  2277. <enum 5 240_mhz>240 Mhz BW
  2278. */
  2279. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_OFFSET 0x0000000000000048
  2280. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_LSB 59
  2281. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MSB 61
  2282. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MASK 0x3800000000000000
  2283. /* Description STF_LTF_3DB_BOOST
  2284. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  2285. This includes both the legacy preambles and the HT/VHT preambles.0:
  2286. disable power boost1: enable power boost
  2287. <legal all>
  2288. */
  2289. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000048
  2290. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_LSB 62
  2291. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MSB 62
  2292. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  2293. /* Description FORCE_EXTRA_SYMBOL
  2294. Set to 1 to force an extra OFDM symbol (or symbols) even
  2295. if the PPDU encoding process does not result in an extra
  2296. OFDM symbol (or symbols)
  2297. */
  2298. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000048
  2299. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_LSB 63
  2300. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MSB 63
  2301. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  2302. /* Description ALT_RATE_MCS
  2303. Coex related Alternative Transmit parameter
  2304. For details, refer to MCS_TYPE
  2305. Note: This is "rate" in case of 11a/11b
  2306. description
  2307. <legal all>
  2308. */
  2309. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_OFFSET 0x0000000000000050
  2310. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_LSB 0
  2311. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MSB 3
  2312. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MASK 0x000000000000000f
  2313. /* Description NSS
  2314. Number of spatial streams.
  2315. <enum 0 1_spatial_stream>Single spatial stream
  2316. <enum 1 2_spatial_streams>2 spatial streams
  2317. <enum 2 3_spatial_streams>3 spatial streams
  2318. <enum 3 4_spatial_streams>4 spatial streams
  2319. <enum 4 5_spatial_streams>5 spatial streams
  2320. <enum 5 6_spatial_streams>6 spatial streams
  2321. <enum 6 7_spatial_streams>7 spatial streams
  2322. <enum 7 8_spatial_streams>8 spatial streams
  2323. */
  2324. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_OFFSET 0x0000000000000050
  2325. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_LSB 4
  2326. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MSB 6
  2327. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MASK 0x0000000000000070
  2328. /* Description DPD_ENABLE
  2329. DPD enable control
  2330. This is needed on a per packet basis
  2331. <enum 0 dpd_off> DPD profile not applied to current
  2332. packet
  2333. <enum 1 dpd_on> DPD profile applied to current packet
  2334. if available
  2335. <legal 0-1>
  2336. This field is not applicable in11ah mode of operation and
  2337. is ignored by the HW
  2338. */
  2339. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_OFFSET 0x0000000000000050
  2340. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_LSB 7
  2341. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MSB 7
  2342. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MASK 0x0000000000000080
  2343. /* Description TX_PWR
  2344. Transmit Power in s6.2 format.
  2345. In units of 0.25 dBm
  2346. <legal all>
  2347. */
  2348. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_OFFSET 0x0000000000000050
  2349. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_LSB 8
  2350. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MSB 15
  2351. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MASK 0x000000000000ff00
  2352. /* Description MIN_TX_PWR
  2353. Coex related field:
  2354. Minimum allowed Transmit Power in s6.2 format.
  2355. In units of 0.25 dBm
  2356. <legal all>
  2357. */
  2358. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_OFFSET 0x0000000000000050
  2359. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_LSB 16
  2360. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MSB 23
  2361. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MASK 0x0000000000ff0000
  2362. /* Description TX_CHAIN_MASK
  2363. Chain mask to support up to 8 antennas.
  2364. <legal 1-255>
  2365. */
  2366. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_OFFSET 0x0000000000000050
  2367. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_LSB 24
  2368. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MSB 31
  2369. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MASK 0x00000000ff000000
  2370. /* Description RESERVED_3A
  2371. <legal 0>
  2372. */
  2373. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_OFFSET 0x0000000000000050
  2374. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_LSB 32
  2375. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MSB 39
  2376. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MASK 0x000000ff00000000
  2377. /* Description SGI
  2378. Field only valid when pkt type is HT or VHT.For 11ax see
  2379. field Dot11ax_CP_LTF_size
  2380. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  2381. for HE
  2382. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  2383. for HE
  2384. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  2385. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  2386. <legal 0 - 3>
  2387. */
  2388. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_OFFSET 0x0000000000000050
  2389. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_LSB 40
  2390. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MSB 41
  2391. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MASK 0x0000030000000000
  2392. /* Description RATE_MCS
  2393. For details, refer to MCS_TYPE description
  2394. Note: This is "rate" in case of 11a/11b
  2395. <legal all>
  2396. */
  2397. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_OFFSET 0x0000000000000050
  2398. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_LSB 42
  2399. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MSB 45
  2400. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MASK 0x00003c0000000000
  2401. /* Description RESERVED_3B
  2402. <legal 0>
  2403. */
  2404. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_OFFSET 0x0000000000000050
  2405. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_LSB 46
  2406. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MSB 47
  2407. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MASK 0x0000c00000000000
  2408. /* Description TX_PWR_1
  2409. Default (desired) transmit parameter for the second chain
  2410. Transmit Power in s6.2 format.
  2411. In units of 0.25 dBm
  2412. Note that there is no Min value for this
  2413. <legal all>
  2414. */
  2415. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_OFFSET 0x0000000000000050
  2416. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_LSB 48
  2417. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MSB 55
  2418. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MASK 0x00ff000000000000
  2419. /* Description ALT_TX_PWR_1
  2420. Alternate (desired) transmit parameter for the second chain
  2421. Transmit Power in s6.2 format.
  2422. In units of 0.25 dBm
  2423. Note that there is no Min value for this
  2424. <legal all>
  2425. */
  2426. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_OFFSET 0x0000000000000050
  2427. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_LSB 56
  2428. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MSB 63
  2429. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MASK 0xff00000000000000
  2430. /* Description AGGREGATION
  2431. Field only valid in case of pkt_type == 11n
  2432. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  2433. this setting if the CBF response only contains a single
  2434. segment
  2435. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  2436. select this setting if the CBF response will contain two
  2437. or more segments
  2438. <legal 0-1>
  2439. */
  2440. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_OFFSET 0x0000000000000058
  2441. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_LSB 0
  2442. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MSB 0
  2443. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MASK 0x0000000000000001
  2444. /* Description DOT11AX_BSS_COLOR_ID
  2445. BSS color of the nextwork to which this STA belongs.
  2446. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  2447. <legal all>
  2448. */
  2449. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000058
  2450. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_LSB 1
  2451. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MSB 6
  2452. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  2453. /* Description DOT11AX_SPATIAL_REUSE
  2454. This field is only valid for pkt_type == 11ax
  2455. Spatial re-use
  2456. <legal all>
  2457. */
  2458. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000058
  2459. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_LSB 7
  2460. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MSB 10
  2461. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  2462. /* Description DOT11AX_CP_LTF_SIZE
  2463. field is only valid for pkt_type == 11ax
  2464. Indicates the CP and HE-LTF type
  2465. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  2466. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  2467. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  2468. <enum 3 FourX_LTF_0_8CP_3_2CP>
  2469. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  2470. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  2471. In this scenario, Neither DCM nor STBC is applied to HE
  2472. data field.
  2473. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  2474. 0 = 1xLTF + 0.4 usec
  2475. 1 = 2xLTF + 0.4 usec
  2476. 2~3 = Reserved
  2477. <legal all>
  2478. */
  2479. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000058
  2480. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_LSB 11
  2481. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MSB 12
  2482. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  2483. /* Description DOT11AX_DCM
  2484. field is only valid for pkt_type == 11ax
  2485. Indicates whether dual sub-carrier modulation is applied
  2486. 0: No DCM
  2487. 1:DCM
  2488. <legal all>
  2489. */
  2490. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_OFFSET 0x0000000000000058
  2491. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_LSB 13
  2492. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MSB 13
  2493. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MASK 0x0000000000002000
  2494. /* Description DOT11AX_DOPPLER_INDICATION
  2495. field is only valid for pkt_type == 11ax
  2496. 0: No Doppler support
  2497. 1: Doppler support
  2498. <legal all>
  2499. */
  2500. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000058
  2501. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_LSB 14
  2502. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MSB 14
  2503. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  2504. /* Description DOT11AX_SU_EXTENDED
  2505. field is only valid for pkt_type == 11ax OR pkt_type ==
  2506. 11be
  2507. When set, the 11ax or 11be frame is of the extended range
  2508. format
  2509. <legal all>
  2510. */
  2511. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000058
  2512. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_LSB 15
  2513. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MSB 15
  2514. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  2515. /* Description DOT11AX_MIN_PACKET_EXTENSION
  2516. field is only valid for pkt_type == 11ax OR pkt_type ==
  2517. 11be
  2518. The min packet extension duration for this user.
  2519. 0: no extension
  2520. 1: 8us
  2521. 2: 16 us
  2522. 3: 20 us (only for .11be)
  2523. <legal 0-3>
  2524. */
  2525. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000058
  2526. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  2527. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  2528. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  2529. /* Description DOT11AX_PE_NSS
  2530. Number of active spatial streams during packet extension.
  2531. <enum 0 1_spatial_stream>Single spatial stream
  2532. <enum 1 2_spatial_streams>2 spatial streams
  2533. <enum 2 3_spatial_streams>3 spatial streams
  2534. <enum 3 4_spatial_streams>4 spatial streams
  2535. <enum 4 5_spatial_streams>5 spatial streams
  2536. <enum 5 6_spatial_streams>6 spatial streams
  2537. <enum 6 7_spatial_streams>7 spatial streams
  2538. <enum 7 8_spatial_streams>8 spatial streams
  2539. */
  2540. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_OFFSET 0x0000000000000058
  2541. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_LSB 18
  2542. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MSB 20
  2543. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  2544. /* Description DOT11AX_PE_CONTENT
  2545. Content of packet extension. Valid for all 11ax packets
  2546. having packet extension
  2547. 0-he_ltf, 1-last_data_symbol
  2548. <legal all>
  2549. */
  2550. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000058
  2551. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_LSB 21
  2552. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MSB 21
  2553. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  2554. /* Description DOT11AX_PE_LTF_SIZE
  2555. LTF size to be used during packet extention. . This field
  2556. is valid for both FTM and non-FTM packets.
  2557. 0-1x
  2558. 1-2x (unsupported un HWK-1)
  2559. 2-4x (unsupported un HWK-1)
  2560. <legal all>
  2561. */
  2562. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000058
  2563. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_LSB 22
  2564. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MSB 23
  2565. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  2566. /* Description DOT11AX_CHAIN_CSD_EN
  2567. This field denotes whether to apply CSD on the preamble
  2568. and data portion of the packet. This field is valid for
  2569. all transmit packets
  2570. 0: disable per-chain csd
  2571. 1: enable per-chain csd
  2572. <legal all>
  2573. */
  2574. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000058
  2575. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_LSB 24
  2576. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MSB 24
  2577. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  2578. /* Description DOT11AX_PE_CHAIN_CSD_EN
  2579. This field denotes whether to apply CSD on the packet extension
  2580. portion of the packet. This field is valid for all 11ax
  2581. packets.
  2582. 0: disable per-chain csd
  2583. 1: enable per-chain csd
  2584. <legal all>
  2585. */
  2586. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000058
  2587. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  2588. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  2589. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  2590. /* Description DOT11AX_DL_UL_FLAG
  2591. field is only valid for pkt_type == 11ax
  2592. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  2593. <enum 1 DL_UL_FLAG_IS_UL>
  2594. <legal all>
  2595. */
  2596. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000058
  2597. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_LSB 26
  2598. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MSB 26
  2599. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  2600. /* Description RESERVED_4A
  2601. <legal 0>
  2602. */
  2603. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_OFFSET 0x0000000000000058
  2604. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_LSB 27
  2605. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MSB 31
  2606. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MASK 0x00000000f8000000
  2607. /* Description DOT11AX_EXT_RU_START_INDEX
  2608. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  2609. == 1
  2610. RU Number to which User is assigned
  2611. The RU numbering bitwidth is only enough to cover the 20MHz
  2612. BW that extended range allows
  2613. <legal 0-8>
  2614. */
  2615. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000058
  2616. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_LSB 32
  2617. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MSB 35
  2618. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  2619. /* Description DOT11AX_EXT_RU_SIZE
  2620. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  2621. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  2622. The size of the RU for this user.
  2623. In case of EHT duplicate transmissions, this field indicates
  2624. the width of the actual content before duplication, e.g.
  2625. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  2626. fields indicating 160 MHz and this field set to e-num 4
  2627. (RU_484).
  2628. <enum 0 RU_26>
  2629. <enum 1 RU_52>
  2630. <enum 2 RU_106>
  2631. <enum 3 RU_242>
  2632. <enum 4 RU_484>
  2633. <enum 5 RU_996>
  2634. <enum 6 RU_1992>
  2635. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  2636. bandwidth
  2637. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  2638. packet bandwidth
  2639. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  2640. packet bandwidth
  2641. <enum 10 RU_MULTI_LARGE> DO NOT USE
  2642. <enum 11 RU_78> DO NOT USE
  2643. <enum 12 RU_132> DO NOT USE
  2644. <legal 0-12>
  2645. */
  2646. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000058
  2647. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_LSB 36
  2648. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MSB 39
  2649. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  2650. /* Description EHT_DUPLICATE_MODE
  2651. Field only valid for pkt_type == 11be
  2652. Indicates EHT duplicate modulation
  2653. <enum 0 eht_no_duplicate>
  2654. <enum 1 eht_2x_duplicate>
  2655. <enum 2 eht_4x_duplicate>
  2656. <legal 0-2>
  2657. */
  2658. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000058
  2659. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_LSB 40
  2660. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MSB 41
  2661. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  2662. /* Description HE_SIGB_DCM
  2663. Indicates whether dual sub-carrier modulation is applied
  2664. to EHT-SIG
  2665. <legal all>
  2666. */
  2667. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_OFFSET 0x0000000000000058
  2668. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_LSB 42
  2669. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MSB 42
  2670. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MASK 0x0000040000000000
  2671. /* Description HE_SIGB_0_MCS
  2672. Indicates the MCS of EHT-SIG
  2673. For details, refer to MCS_TYPE description
  2674. <legal all>
  2675. */
  2676. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_OFFSET 0x0000000000000058
  2677. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_LSB 43
  2678. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MSB 45
  2679. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MASK 0x0000380000000000
  2680. /* Description NUM_HE_SIGB_SYM
  2681. Indicates the number of EHT-SIG symbols
  2682. This field is 0-based with 0 indicating that 1 eht_sig symbol
  2683. needs to be transmitted.
  2684. <legal all>
  2685. */
  2686. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000058
  2687. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_LSB 46
  2688. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MSB 50
  2689. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  2690. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  2691. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  2692. HT Control for sync MLO response
  2693. <enum 1 reqd_resp_time_src_is_FW>
  2694. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  2695. to response
  2696. <legal all>
  2697. */
  2698. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000058
  2699. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  2700. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  2701. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  2702. /* Description RESERVED_5A
  2703. <legal 0>
  2704. */
  2705. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_OFFSET 0x0000000000000058
  2706. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_LSB 52
  2707. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MSB 57
  2708. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MASK 0x03f0000000000000
  2709. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  2710. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  2711. to pass on to PDG
  2712. <legal 0-29>
  2713. */
  2714. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000058
  2715. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  2716. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  2717. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  2718. /* Description MLO_STA_ID_DETAILS_RX
  2719. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  2720. on to PDG
  2721. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  2722. from address search.
  2723. See definition of mlo_sta_id_details.
  2724. */
  2725. /* Description NSTR_MLO_STA_ID
  2726. ID of peer participating in non-STR MLO
  2727. */
  2728. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000060
  2729. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  2730. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  2731. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  2732. /* Description BLOCK_SELF_ML_SYNC
  2733. Only valid for TX
  2734. When set, this provides an indication to block the peer
  2735. for self-link.
  2736. */
  2737. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000060
  2738. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  2739. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  2740. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  2741. /* Description BLOCK_PARTNER_ML_SYNC
  2742. Only valid for TX
  2743. When set, this provides an indication to block the peer
  2744. for partner links.
  2745. */
  2746. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000060
  2747. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  2748. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  2749. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  2750. /* Description NSTR_MLO_STA_ID_VALID
  2751. All the fields in this TLV are valid only if this bit is
  2752. set.
  2753. */
  2754. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000060
  2755. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  2756. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  2757. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  2758. /* Description RESERVED_0A
  2759. <legal 0>
  2760. */
  2761. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000060
  2762. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  2763. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  2764. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  2765. /* Description REQUIRED_RESPONSE_TIME
  2766. When non-zero, indicates that PDG shall pad the response
  2767. transmission to the indicated duration (in us)
  2768. */
  2769. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000060
  2770. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_LSB 16
  2771. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MSB 27
  2772. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  2773. /* Description DOT11BE_PARAMS_PLACEHOLDER
  2774. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  2775. */
  2776. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000060
  2777. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  2778. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  2779. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  2780. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW160
  2781. Field only valid in case of Response_to_response set to
  2782. SU_BA or MU_BA
  2783. NOTE: This field is also known as response_to_response_rate_info_pattern_3
  2784. in case punctured transmission is enabled.
  2785. Used by TXPCU to determine what the transmit rates are for
  2786. the response to response transmission in case original
  2787. transmission was 160 MHz.
  2788. Note:
  2789. see field R2R_bw160_active_channel for the BW of this transmission
  2790. */
  2791. /* Description RESERVED_0A
  2792. <legal 0>
  2793. */
  2794. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_OFFSET 0x0000000000000060
  2795. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_LSB 32
  2796. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MSB 32
  2797. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MASK 0x0000000100000000
  2798. /* Description TX_ANTENNA_SECTOR_CTRL
  2799. Sectored transmit antenna
  2800. <legal all>
  2801. */
  2802. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000060
  2803. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_LSB 33
  2804. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MSB 56
  2805. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  2806. /* Description PKT_TYPE
  2807. Packet type:
  2808. <enum 0 dot11a>802.11a PPDU type
  2809. <enum 1 dot11b>802.11b PPDU type
  2810. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  2811. <enum 3 dot11ac>802.11ac PPDU type
  2812. <enum 4 dot11ax>802.11ax PPDU type
  2813. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  2814. <enum 6 dot11be>802.11be PPDU type
  2815. <enum 7 dot11az>802.11az (ranging) PPDU type
  2816. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  2817. & aborted)
  2818. */
  2819. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_OFFSET 0x0000000000000060
  2820. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_LSB 57
  2821. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MSB 60
  2822. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MASK 0x1e00000000000000
  2823. /* Description SMOOTHING
  2824. This field is used by PDG to populate the SMOOTHING filed
  2825. in the SIG Preamble of the PPDU
  2826. <legal 0-1>
  2827. */
  2828. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_OFFSET 0x0000000000000060
  2829. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_LSB 61
  2830. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MSB 61
  2831. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MASK 0x2000000000000000
  2832. /* Description LDPC
  2833. When set, use LDPC transmission rates
  2834. */
  2835. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_OFFSET 0x0000000000000060
  2836. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_LSB 62
  2837. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MSB 62
  2838. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MASK 0x4000000000000000
  2839. /* Description STBC
  2840. When set, use STBC transmission rates
  2841. */
  2842. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_OFFSET 0x0000000000000060
  2843. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_LSB 63
  2844. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MSB 63
  2845. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MASK 0x8000000000000000
  2846. /* Description ALT_TX_PWR
  2847. Coex related AlternativeTransmit parameter
  2848. Transmit Power in s6.2 format.
  2849. In units of 0.25 dBm
  2850. <legal all>
  2851. */
  2852. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_OFFSET 0x0000000000000068
  2853. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_LSB 0
  2854. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MSB 7
  2855. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MASK 0x00000000000000ff
  2856. /* Description ALT_MIN_TX_PWR
  2857. Coex related Alternative Transmit parameter
  2858. Minimum allowed Transmit Power in s6.2 format.
  2859. In units of 0.25 dBm
  2860. <legal all>
  2861. */
  2862. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_OFFSET 0x0000000000000068
  2863. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_LSB 8
  2864. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MSB 15
  2865. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  2866. /* Description ALT_NSS
  2867. Coex related Alternative Transmit parameter
  2868. Number of spatial streams.
  2869. <enum 0 1_spatial_stream>Single spatial stream
  2870. <enum 1 2_spatial_streams>2 spatial streams
  2871. <enum 2 3_spatial_streams>3 spatial streams
  2872. <enum 3 4_spatial_streams>4 spatial streams
  2873. <enum 4 5_spatial_streams>5 spatial streams
  2874. <enum 5 6_spatial_streams>6 spatial streams
  2875. <enum 6 7_spatial_streams>7 spatial streams
  2876. <enum 7 8_spatial_streams>8 spatial streams
  2877. */
  2878. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_OFFSET 0x0000000000000068
  2879. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_LSB 16
  2880. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MSB 18
  2881. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MASK 0x0000000000070000
  2882. /* Description ALT_TX_CHAIN_MASK
  2883. Coex related Alternative Transmit parameter
  2884. Chain mask to support up to 8 antennas.
  2885. <legal 1-255>
  2886. */
  2887. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000068
  2888. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_LSB 19
  2889. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MSB 26
  2890. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  2891. /* Description ALT_BW
  2892. Coex related Alternative Transmit parameter
  2893. The BW of the upcoming transmission.
  2894. <enum 0 20_mhz>20 Mhz BW
  2895. <enum 1 40_mhz>40 Mhz BW
  2896. <enum 2 80_mhz>80 Mhz BW
  2897. <enum 3 160_mhz>160 Mhz BW
  2898. <enum 4 320_mhz>320 Mhz BW
  2899. <enum 5 240_mhz>240 Mhz BW
  2900. */
  2901. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_OFFSET 0x0000000000000068
  2902. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_LSB 27
  2903. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MSB 29
  2904. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MASK 0x0000000038000000
  2905. /* Description STF_LTF_3DB_BOOST
  2906. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  2907. This includes both the legacy preambles and the HT/VHT preambles.0:
  2908. disable power boost1: enable power boost
  2909. <legal all>
  2910. */
  2911. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000068
  2912. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_LSB 30
  2913. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MSB 30
  2914. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  2915. /* Description FORCE_EXTRA_SYMBOL
  2916. Set to 1 to force an extra OFDM symbol (or symbols) even
  2917. if the PPDU encoding process does not result in an extra
  2918. OFDM symbol (or symbols)
  2919. */
  2920. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000068
  2921. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_LSB 31
  2922. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MSB 31
  2923. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  2924. /* Description ALT_RATE_MCS
  2925. Coex related Alternative Transmit parameter
  2926. For details, refer to MCS_TYPE
  2927. Note: This is "rate" in case of 11a/11b
  2928. description
  2929. <legal all>
  2930. */
  2931. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_OFFSET 0x0000000000000068
  2932. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_LSB 32
  2933. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MSB 35
  2934. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MASK 0x0000000f00000000
  2935. /* Description NSS
  2936. Number of spatial streams.
  2937. <enum 0 1_spatial_stream>Single spatial stream
  2938. <enum 1 2_spatial_streams>2 spatial streams
  2939. <enum 2 3_spatial_streams>3 spatial streams
  2940. <enum 3 4_spatial_streams>4 spatial streams
  2941. <enum 4 5_spatial_streams>5 spatial streams
  2942. <enum 5 6_spatial_streams>6 spatial streams
  2943. <enum 6 7_spatial_streams>7 spatial streams
  2944. <enum 7 8_spatial_streams>8 spatial streams
  2945. */
  2946. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_OFFSET 0x0000000000000068
  2947. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_LSB 36
  2948. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MSB 38
  2949. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MASK 0x0000007000000000
  2950. /* Description DPD_ENABLE
  2951. DPD enable control
  2952. This is needed on a per packet basis
  2953. <enum 0 dpd_off> DPD profile not applied to current
  2954. packet
  2955. <enum 1 dpd_on> DPD profile applied to current packet
  2956. if available
  2957. <legal 0-1>
  2958. This field is not applicable in11ah mode of operation and
  2959. is ignored by the HW
  2960. */
  2961. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_OFFSET 0x0000000000000068
  2962. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_LSB 39
  2963. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MSB 39
  2964. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MASK 0x0000008000000000
  2965. /* Description TX_PWR
  2966. Transmit Power in s6.2 format.
  2967. In units of 0.25 dBm
  2968. <legal all>
  2969. */
  2970. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_OFFSET 0x0000000000000068
  2971. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_LSB 40
  2972. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MSB 47
  2973. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MASK 0x0000ff0000000000
  2974. /* Description MIN_TX_PWR
  2975. Coex related field:
  2976. Minimum allowed Transmit Power in s6.2 format.
  2977. In units of 0.25 dBm
  2978. <legal all>
  2979. */
  2980. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_OFFSET 0x0000000000000068
  2981. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_LSB 48
  2982. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MSB 55
  2983. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MASK 0x00ff000000000000
  2984. /* Description TX_CHAIN_MASK
  2985. Chain mask to support up to 8 antennas.
  2986. <legal 1-255>
  2987. */
  2988. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_OFFSET 0x0000000000000068
  2989. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_LSB 56
  2990. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MSB 63
  2991. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MASK 0xff00000000000000
  2992. /* Description RESERVED_3A
  2993. <legal 0>
  2994. */
  2995. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_OFFSET 0x0000000000000070
  2996. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_LSB 0
  2997. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MSB 7
  2998. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MASK 0x00000000000000ff
  2999. /* Description SGI
  3000. Field only valid when pkt type is HT or VHT.For 11ax see
  3001. field Dot11ax_CP_LTF_size
  3002. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  3003. for HE
  3004. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  3005. for HE
  3006. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  3007. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  3008. <legal 0 - 3>
  3009. */
  3010. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_OFFSET 0x0000000000000070
  3011. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_LSB 8
  3012. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MSB 9
  3013. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MASK 0x0000000000000300
  3014. /* Description RATE_MCS
  3015. For details, refer to MCS_TYPE description
  3016. Note: This is "rate" in case of 11a/11b
  3017. <legal all>
  3018. */
  3019. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_OFFSET 0x0000000000000070
  3020. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_LSB 10
  3021. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MSB 13
  3022. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MASK 0x0000000000003c00
  3023. /* Description RESERVED_3B
  3024. <legal 0>
  3025. */
  3026. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_OFFSET 0x0000000000000070
  3027. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_LSB 14
  3028. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MSB 15
  3029. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MASK 0x000000000000c000
  3030. /* Description TX_PWR_1
  3031. Default (desired) transmit parameter for the second chain
  3032. Transmit Power in s6.2 format.
  3033. In units of 0.25 dBm
  3034. Note that there is no Min value for this
  3035. <legal all>
  3036. */
  3037. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_OFFSET 0x0000000000000070
  3038. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_LSB 16
  3039. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MSB 23
  3040. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MASK 0x0000000000ff0000
  3041. /* Description ALT_TX_PWR_1
  3042. Alternate (desired) transmit parameter for the second chain
  3043. Transmit Power in s6.2 format.
  3044. In units of 0.25 dBm
  3045. Note that there is no Min value for this
  3046. <legal all>
  3047. */
  3048. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_OFFSET 0x0000000000000070
  3049. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_LSB 24
  3050. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MSB 31
  3051. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MASK 0x00000000ff000000
  3052. /* Description AGGREGATION
  3053. Field only valid in case of pkt_type == 11n
  3054. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  3055. this setting if the CBF response only contains a single
  3056. segment
  3057. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  3058. select this setting if the CBF response will contain two
  3059. or more segments
  3060. <legal 0-1>
  3061. */
  3062. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_OFFSET 0x0000000000000070
  3063. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_LSB 32
  3064. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MSB 32
  3065. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MASK 0x0000000100000000
  3066. /* Description DOT11AX_BSS_COLOR_ID
  3067. BSS color of the nextwork to which this STA belongs.
  3068. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  3069. <legal all>
  3070. */
  3071. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000070
  3072. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_LSB 33
  3073. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MSB 38
  3074. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  3075. /* Description DOT11AX_SPATIAL_REUSE
  3076. This field is only valid for pkt_type == 11ax
  3077. Spatial re-use
  3078. <legal all>
  3079. */
  3080. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000070
  3081. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_LSB 39
  3082. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MSB 42
  3083. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  3084. /* Description DOT11AX_CP_LTF_SIZE
  3085. field is only valid for pkt_type == 11ax
  3086. Indicates the CP and HE-LTF type
  3087. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  3088. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  3089. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  3090. <enum 3 FourX_LTF_0_8CP_3_2CP>
  3091. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  3092. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  3093. In this scenario, Neither DCM nor STBC is applied to HE
  3094. data field.
  3095. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  3096. 0 = 1xLTF + 0.4 usec
  3097. 1 = 2xLTF + 0.4 usec
  3098. 2~3 = Reserved
  3099. <legal all>
  3100. */
  3101. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000070
  3102. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_LSB 43
  3103. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MSB 44
  3104. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  3105. /* Description DOT11AX_DCM
  3106. field is only valid for pkt_type == 11ax
  3107. Indicates whether dual sub-carrier modulation is applied
  3108. 0: No DCM
  3109. 1:DCM
  3110. <legal all>
  3111. */
  3112. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_OFFSET 0x0000000000000070
  3113. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_LSB 45
  3114. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MSB 45
  3115. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MASK 0x0000200000000000
  3116. /* Description DOT11AX_DOPPLER_INDICATION
  3117. field is only valid for pkt_type == 11ax
  3118. 0: No Doppler support
  3119. 1: Doppler support
  3120. <legal all>
  3121. */
  3122. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000070
  3123. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_LSB 46
  3124. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MSB 46
  3125. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  3126. /* Description DOT11AX_SU_EXTENDED
  3127. field is only valid for pkt_type == 11ax OR pkt_type ==
  3128. 11be
  3129. When set, the 11ax or 11be frame is of the extended range
  3130. format
  3131. <legal all>
  3132. */
  3133. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000070
  3134. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_LSB 47
  3135. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MSB 47
  3136. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  3137. /* Description DOT11AX_MIN_PACKET_EXTENSION
  3138. field is only valid for pkt_type == 11ax OR pkt_type ==
  3139. 11be
  3140. The min packet extension duration for this user.
  3141. 0: no extension
  3142. 1: 8us
  3143. 2: 16 us
  3144. 3: 20 us (only for .11be)
  3145. <legal 0-3>
  3146. */
  3147. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000070
  3148. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  3149. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  3150. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  3151. /* Description DOT11AX_PE_NSS
  3152. Number of active spatial streams during packet extension.
  3153. <enum 0 1_spatial_stream>Single spatial stream
  3154. <enum 1 2_spatial_streams>2 spatial streams
  3155. <enum 2 3_spatial_streams>3 spatial streams
  3156. <enum 3 4_spatial_streams>4 spatial streams
  3157. <enum 4 5_spatial_streams>5 spatial streams
  3158. <enum 5 6_spatial_streams>6 spatial streams
  3159. <enum 6 7_spatial_streams>7 spatial streams
  3160. <enum 7 8_spatial_streams>8 spatial streams
  3161. */
  3162. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_OFFSET 0x0000000000000070
  3163. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_LSB 50
  3164. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MSB 52
  3165. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MASK 0x001c000000000000
  3166. /* Description DOT11AX_PE_CONTENT
  3167. Content of packet extension. Valid for all 11ax packets
  3168. having packet extension
  3169. 0-he_ltf, 1-last_data_symbol
  3170. <legal all>
  3171. */
  3172. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000070
  3173. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_LSB 53
  3174. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MSB 53
  3175. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  3176. /* Description DOT11AX_PE_LTF_SIZE
  3177. LTF size to be used during packet extention. . This field
  3178. is valid for both FTM and non-FTM packets.
  3179. 0-1x
  3180. 1-2x (unsupported un HWK-1)
  3181. 2-4x (unsupported un HWK-1)
  3182. <legal all>
  3183. */
  3184. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000070
  3185. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_LSB 54
  3186. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MSB 55
  3187. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  3188. /* Description DOT11AX_CHAIN_CSD_EN
  3189. This field denotes whether to apply CSD on the preamble
  3190. and data portion of the packet. This field is valid for
  3191. all transmit packets
  3192. 0: disable per-chain csd
  3193. 1: enable per-chain csd
  3194. <legal all>
  3195. */
  3196. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000070
  3197. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_LSB 56
  3198. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MSB 56
  3199. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  3200. /* Description DOT11AX_PE_CHAIN_CSD_EN
  3201. This field denotes whether to apply CSD on the packet extension
  3202. portion of the packet. This field is valid for all 11ax
  3203. packets.
  3204. 0: disable per-chain csd
  3205. 1: enable per-chain csd
  3206. <legal all>
  3207. */
  3208. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000070
  3209. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  3210. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  3211. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  3212. /* Description DOT11AX_DL_UL_FLAG
  3213. field is only valid for pkt_type == 11ax
  3214. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  3215. <enum 1 DL_UL_FLAG_IS_UL>
  3216. <legal all>
  3217. */
  3218. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000070
  3219. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_LSB 58
  3220. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MSB 58
  3221. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  3222. /* Description RESERVED_4A
  3223. <legal 0>
  3224. */
  3225. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_OFFSET 0x0000000000000070
  3226. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_LSB 59
  3227. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MSB 63
  3228. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MASK 0xf800000000000000
  3229. /* Description DOT11AX_EXT_RU_START_INDEX
  3230. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3231. == 1
  3232. RU Number to which User is assigned
  3233. The RU numbering bitwidth is only enough to cover the 20MHz
  3234. BW that extended range allows
  3235. <legal 0-8>
  3236. */
  3237. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000078
  3238. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_LSB 0
  3239. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MSB 3
  3240. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  3241. /* Description DOT11AX_EXT_RU_SIZE
  3242. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3243. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  3244. The size of the RU for this user.
  3245. In case of EHT duplicate transmissions, this field indicates
  3246. the width of the actual content before duplication, e.g.
  3247. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  3248. fields indicating 160 MHz and this field set to e-num 4
  3249. (RU_484).
  3250. <enum 0 RU_26>
  3251. <enum 1 RU_52>
  3252. <enum 2 RU_106>
  3253. <enum 3 RU_242>
  3254. <enum 4 RU_484>
  3255. <enum 5 RU_996>
  3256. <enum 6 RU_1992>
  3257. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  3258. bandwidth
  3259. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  3260. packet bandwidth
  3261. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  3262. packet bandwidth
  3263. <enum 10 RU_MULTI_LARGE> DO NOT USE
  3264. <enum 11 RU_78> DO NOT USE
  3265. <enum 12 RU_132> DO NOT USE
  3266. <legal 0-12>
  3267. */
  3268. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000078
  3269. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_LSB 4
  3270. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MSB 7
  3271. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  3272. /* Description EHT_DUPLICATE_MODE
  3273. Field only valid for pkt_type == 11be
  3274. Indicates EHT duplicate modulation
  3275. <enum 0 eht_no_duplicate>
  3276. <enum 1 eht_2x_duplicate>
  3277. <enum 2 eht_4x_duplicate>
  3278. <legal 0-2>
  3279. */
  3280. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000078
  3281. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_LSB 8
  3282. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MSB 9
  3283. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  3284. /* Description HE_SIGB_DCM
  3285. Indicates whether dual sub-carrier modulation is applied
  3286. to EHT-SIG
  3287. <legal all>
  3288. */
  3289. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_OFFSET 0x0000000000000078
  3290. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_LSB 10
  3291. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MSB 10
  3292. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MASK 0x0000000000000400
  3293. /* Description HE_SIGB_0_MCS
  3294. Indicates the MCS of EHT-SIG
  3295. For details, refer to MCS_TYPE description
  3296. <legal all>
  3297. */
  3298. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_OFFSET 0x0000000000000078
  3299. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_LSB 11
  3300. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MSB 13
  3301. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MASK 0x0000000000003800
  3302. /* Description NUM_HE_SIGB_SYM
  3303. Indicates the number of EHT-SIG symbols
  3304. This field is 0-based with 0 indicating that 1 eht_sig symbol
  3305. needs to be transmitted.
  3306. <legal all>
  3307. */
  3308. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000078
  3309. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_LSB 14
  3310. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MSB 18
  3311. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  3312. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  3313. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  3314. HT Control for sync MLO response
  3315. <enum 1 reqd_resp_time_src_is_FW>
  3316. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  3317. to response
  3318. <legal all>
  3319. */
  3320. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000078
  3321. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  3322. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  3323. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  3324. /* Description RESERVED_5A
  3325. <legal 0>
  3326. */
  3327. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_OFFSET 0x0000000000000078
  3328. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_LSB 20
  3329. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MSB 25
  3330. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MASK 0x0000000003f00000
  3331. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  3332. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  3333. to pass on to PDG
  3334. <legal 0-29>
  3335. */
  3336. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000078
  3337. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  3338. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  3339. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  3340. /* Description MLO_STA_ID_DETAILS_RX
  3341. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  3342. on to PDG
  3343. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  3344. from address search.
  3345. See definition of mlo_sta_id_details.
  3346. */
  3347. /* Description NSTR_MLO_STA_ID
  3348. ID of peer participating in non-STR MLO
  3349. */
  3350. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000078
  3351. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  3352. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  3353. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  3354. /* Description BLOCK_SELF_ML_SYNC
  3355. Only valid for TX
  3356. When set, this provides an indication to block the peer
  3357. for self-link.
  3358. */
  3359. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000078
  3360. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  3361. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  3362. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  3363. /* Description BLOCK_PARTNER_ML_SYNC
  3364. Only valid for TX
  3365. When set, this provides an indication to block the peer
  3366. for partner links.
  3367. */
  3368. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000078
  3369. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  3370. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  3371. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  3372. /* Description NSTR_MLO_STA_ID_VALID
  3373. All the fields in this TLV are valid only if this bit is
  3374. set.
  3375. */
  3376. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000078
  3377. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  3378. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  3379. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  3380. /* Description RESERVED_0A
  3381. <legal 0>
  3382. */
  3383. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000078
  3384. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  3385. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  3386. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  3387. /* Description REQUIRED_RESPONSE_TIME
  3388. When non-zero, indicates that PDG shall pad the response
  3389. transmission to the indicated duration (in us)
  3390. */
  3391. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000078
  3392. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_LSB 48
  3393. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MSB 59
  3394. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  3395. /* Description DOT11BE_PARAMS_PLACEHOLDER
  3396. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  3397. */
  3398. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000078
  3399. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  3400. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  3401. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  3402. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW240
  3403. Field only valid in case of Response_to_response set to
  3404. SU_BA or MU_BA
  3405. NOTE: This field is also known as response_to_response_rate_info_pattern_4
  3406. in case punctured transmission is enabled.
  3407. Used by TXPCU to determine what the transmit rates are for
  3408. the response to response transmission in case original
  3409. transmission was 240 MHz.
  3410. Note:
  3411. see field R2R_bw240_active_channel for the BW of this transmission
  3412. */
  3413. /* Description RESERVED_0A
  3414. <legal 0>
  3415. */
  3416. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_OFFSET 0x0000000000000080
  3417. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_LSB 0
  3418. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MSB 0
  3419. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MASK 0x0000000000000001
  3420. /* Description TX_ANTENNA_SECTOR_CTRL
  3421. Sectored transmit antenna
  3422. <legal all>
  3423. */
  3424. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000080
  3425. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_LSB 1
  3426. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MSB 24
  3427. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe
  3428. /* Description PKT_TYPE
  3429. Packet type:
  3430. <enum 0 dot11a>802.11a PPDU type
  3431. <enum 1 dot11b>802.11b PPDU type
  3432. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  3433. <enum 3 dot11ac>802.11ac PPDU type
  3434. <enum 4 dot11ax>802.11ax PPDU type
  3435. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  3436. <enum 6 dot11be>802.11be PPDU type
  3437. <enum 7 dot11az>802.11az (ranging) PPDU type
  3438. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  3439. & aborted)
  3440. */
  3441. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_OFFSET 0x0000000000000080
  3442. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_LSB 25
  3443. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MSB 28
  3444. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MASK 0x000000001e000000
  3445. /* Description SMOOTHING
  3446. This field is used by PDG to populate the SMOOTHING filed
  3447. in the SIG Preamble of the PPDU
  3448. <legal 0-1>
  3449. */
  3450. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_OFFSET 0x0000000000000080
  3451. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_LSB 29
  3452. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MSB 29
  3453. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MASK 0x0000000020000000
  3454. /* Description LDPC
  3455. When set, use LDPC transmission rates
  3456. */
  3457. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_OFFSET 0x0000000000000080
  3458. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_LSB 30
  3459. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MSB 30
  3460. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MASK 0x0000000040000000
  3461. /* Description STBC
  3462. When set, use STBC transmission rates
  3463. */
  3464. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_OFFSET 0x0000000000000080
  3465. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_LSB 31
  3466. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MSB 31
  3467. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MASK 0x0000000080000000
  3468. /* Description ALT_TX_PWR
  3469. Coex related AlternativeTransmit parameter
  3470. Transmit Power in s6.2 format.
  3471. In units of 0.25 dBm
  3472. <legal all>
  3473. */
  3474. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_OFFSET 0x0000000000000080
  3475. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_LSB 32
  3476. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MSB 39
  3477. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MASK 0x000000ff00000000
  3478. /* Description ALT_MIN_TX_PWR
  3479. Coex related Alternative Transmit parameter
  3480. Minimum allowed Transmit Power in s6.2 format.
  3481. In units of 0.25 dBm
  3482. <legal all>
  3483. */
  3484. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_OFFSET 0x0000000000000080
  3485. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_LSB 40
  3486. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MSB 47
  3487. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000
  3488. /* Description ALT_NSS
  3489. Coex related Alternative Transmit parameter
  3490. Number of spatial streams.
  3491. <enum 0 1_spatial_stream>Single spatial stream
  3492. <enum 1 2_spatial_streams>2 spatial streams
  3493. <enum 2 3_spatial_streams>3 spatial streams
  3494. <enum 3 4_spatial_streams>4 spatial streams
  3495. <enum 4 5_spatial_streams>5 spatial streams
  3496. <enum 5 6_spatial_streams>6 spatial streams
  3497. <enum 6 7_spatial_streams>7 spatial streams
  3498. <enum 7 8_spatial_streams>8 spatial streams
  3499. */
  3500. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_OFFSET 0x0000000000000080
  3501. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_LSB 48
  3502. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MSB 50
  3503. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MASK 0x0007000000000000
  3504. /* Description ALT_TX_CHAIN_MASK
  3505. Coex related Alternative Transmit parameter
  3506. Chain mask to support up to 8 antennas.
  3507. <legal 1-255>
  3508. */
  3509. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000080
  3510. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_LSB 51
  3511. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MSB 58
  3512. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000
  3513. /* Description ALT_BW
  3514. Coex related Alternative Transmit parameter
  3515. The BW of the upcoming transmission.
  3516. <enum 0 20_mhz>20 Mhz BW
  3517. <enum 1 40_mhz>40 Mhz BW
  3518. <enum 2 80_mhz>80 Mhz BW
  3519. <enum 3 160_mhz>160 Mhz BW
  3520. <enum 4 320_mhz>320 Mhz BW
  3521. <enum 5 240_mhz>240 Mhz BW
  3522. */
  3523. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_OFFSET 0x0000000000000080
  3524. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_LSB 59
  3525. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MSB 61
  3526. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MASK 0x3800000000000000
  3527. /* Description STF_LTF_3DB_BOOST
  3528. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  3529. This includes both the legacy preambles and the HT/VHT preambles.0:
  3530. disable power boost1: enable power boost
  3531. <legal all>
  3532. */
  3533. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000080
  3534. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_LSB 62
  3535. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MSB 62
  3536. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MASK 0x4000000000000000
  3537. /* Description FORCE_EXTRA_SYMBOL
  3538. Set to 1 to force an extra OFDM symbol (or symbols) even
  3539. if the PPDU encoding process does not result in an extra
  3540. OFDM symbol (or symbols)
  3541. */
  3542. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000080
  3543. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_LSB 63
  3544. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MSB 63
  3545. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000
  3546. /* Description ALT_RATE_MCS
  3547. Coex related Alternative Transmit parameter
  3548. For details, refer to MCS_TYPE
  3549. Note: This is "rate" in case of 11a/11b
  3550. description
  3551. <legal all>
  3552. */
  3553. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_OFFSET 0x0000000000000088
  3554. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_LSB 0
  3555. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MSB 3
  3556. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MASK 0x000000000000000f
  3557. /* Description NSS
  3558. Number of spatial streams.
  3559. <enum 0 1_spatial_stream>Single spatial stream
  3560. <enum 1 2_spatial_streams>2 spatial streams
  3561. <enum 2 3_spatial_streams>3 spatial streams
  3562. <enum 3 4_spatial_streams>4 spatial streams
  3563. <enum 4 5_spatial_streams>5 spatial streams
  3564. <enum 5 6_spatial_streams>6 spatial streams
  3565. <enum 6 7_spatial_streams>7 spatial streams
  3566. <enum 7 8_spatial_streams>8 spatial streams
  3567. */
  3568. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_OFFSET 0x0000000000000088
  3569. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_LSB 4
  3570. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MSB 6
  3571. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MASK 0x0000000000000070
  3572. /* Description DPD_ENABLE
  3573. DPD enable control
  3574. This is needed on a per packet basis
  3575. <enum 0 dpd_off> DPD profile not applied to current
  3576. packet
  3577. <enum 1 dpd_on> DPD profile applied to current packet
  3578. if available
  3579. <legal 0-1>
  3580. This field is not applicable in11ah mode of operation and
  3581. is ignored by the HW
  3582. */
  3583. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_OFFSET 0x0000000000000088
  3584. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_LSB 7
  3585. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MSB 7
  3586. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MASK 0x0000000000000080
  3587. /* Description TX_PWR
  3588. Transmit Power in s6.2 format.
  3589. In units of 0.25 dBm
  3590. <legal all>
  3591. */
  3592. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_OFFSET 0x0000000000000088
  3593. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_LSB 8
  3594. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MSB 15
  3595. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MASK 0x000000000000ff00
  3596. /* Description MIN_TX_PWR
  3597. Coex related field:
  3598. Minimum allowed Transmit Power in s6.2 format.
  3599. In units of 0.25 dBm
  3600. <legal all>
  3601. */
  3602. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_OFFSET 0x0000000000000088
  3603. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_LSB 16
  3604. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MSB 23
  3605. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MASK 0x0000000000ff0000
  3606. /* Description TX_CHAIN_MASK
  3607. Chain mask to support up to 8 antennas.
  3608. <legal 1-255>
  3609. */
  3610. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_OFFSET 0x0000000000000088
  3611. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_LSB 24
  3612. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MSB 31
  3613. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MASK 0x00000000ff000000
  3614. /* Description RESERVED_3A
  3615. <legal 0>
  3616. */
  3617. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_OFFSET 0x0000000000000088
  3618. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_LSB 32
  3619. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MSB 39
  3620. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MASK 0x000000ff00000000
  3621. /* Description SGI
  3622. Field only valid when pkt type is HT or VHT.For 11ax see
  3623. field Dot11ax_CP_LTF_size
  3624. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  3625. for HE
  3626. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  3627. for HE
  3628. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  3629. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  3630. <legal 0 - 3>
  3631. */
  3632. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_OFFSET 0x0000000000000088
  3633. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_LSB 40
  3634. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MSB 41
  3635. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MASK 0x0000030000000000
  3636. /* Description RATE_MCS
  3637. For details, refer to MCS_TYPE description
  3638. Note: This is "rate" in case of 11a/11b
  3639. <legal all>
  3640. */
  3641. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_OFFSET 0x0000000000000088
  3642. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_LSB 42
  3643. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MSB 45
  3644. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MASK 0x00003c0000000000
  3645. /* Description RESERVED_3B
  3646. <legal 0>
  3647. */
  3648. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_OFFSET 0x0000000000000088
  3649. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_LSB 46
  3650. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MSB 47
  3651. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MASK 0x0000c00000000000
  3652. /* Description TX_PWR_1
  3653. Default (desired) transmit parameter for the second chain
  3654. Transmit Power in s6.2 format.
  3655. In units of 0.25 dBm
  3656. Note that there is no Min value for this
  3657. <legal all>
  3658. */
  3659. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_OFFSET 0x0000000000000088
  3660. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_LSB 48
  3661. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MSB 55
  3662. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MASK 0x00ff000000000000
  3663. /* Description ALT_TX_PWR_1
  3664. Alternate (desired) transmit parameter for the second chain
  3665. Transmit Power in s6.2 format.
  3666. In units of 0.25 dBm
  3667. Note that there is no Min value for this
  3668. <legal all>
  3669. */
  3670. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_OFFSET 0x0000000000000088
  3671. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_LSB 56
  3672. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MSB 63
  3673. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MASK 0xff00000000000000
  3674. /* Description AGGREGATION
  3675. Field only valid in case of pkt_type == 11n
  3676. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  3677. this setting if the CBF response only contains a single
  3678. segment
  3679. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  3680. select this setting if the CBF response will contain two
  3681. or more segments
  3682. <legal 0-1>
  3683. */
  3684. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_OFFSET 0x0000000000000090
  3685. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_LSB 0
  3686. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MSB 0
  3687. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MASK 0x0000000000000001
  3688. /* Description DOT11AX_BSS_COLOR_ID
  3689. BSS color of the nextwork to which this STA belongs.
  3690. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  3691. <legal all>
  3692. */
  3693. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000090
  3694. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_LSB 1
  3695. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MSB 6
  3696. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e
  3697. /* Description DOT11AX_SPATIAL_REUSE
  3698. This field is only valid for pkt_type == 11ax
  3699. Spatial re-use
  3700. <legal all>
  3701. */
  3702. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000090
  3703. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_LSB 7
  3704. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MSB 10
  3705. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780
  3706. /* Description DOT11AX_CP_LTF_SIZE
  3707. field is only valid for pkt_type == 11ax
  3708. Indicates the CP and HE-LTF type
  3709. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  3710. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  3711. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  3712. <enum 3 FourX_LTF_0_8CP_3_2CP>
  3713. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  3714. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  3715. In this scenario, Neither DCM nor STBC is applied to HE
  3716. data field.
  3717. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  3718. 0 = 1xLTF + 0.4 usec
  3719. 1 = 2xLTF + 0.4 usec
  3720. 2~3 = Reserved
  3721. <legal all>
  3722. */
  3723. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000090
  3724. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_LSB 11
  3725. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MSB 12
  3726. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800
  3727. /* Description DOT11AX_DCM
  3728. field is only valid for pkt_type == 11ax
  3729. Indicates whether dual sub-carrier modulation is applied
  3730. 0: No DCM
  3731. 1:DCM
  3732. <legal all>
  3733. */
  3734. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_OFFSET 0x0000000000000090
  3735. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_LSB 13
  3736. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MSB 13
  3737. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MASK 0x0000000000002000
  3738. /* Description DOT11AX_DOPPLER_INDICATION
  3739. field is only valid for pkt_type == 11ax
  3740. 0: No Doppler support
  3741. 1: Doppler support
  3742. <legal all>
  3743. */
  3744. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000090
  3745. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_LSB 14
  3746. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MSB 14
  3747. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000
  3748. /* Description DOT11AX_SU_EXTENDED
  3749. field is only valid for pkt_type == 11ax OR pkt_type ==
  3750. 11be
  3751. When set, the 11ax or 11be frame is of the extended range
  3752. format
  3753. <legal all>
  3754. */
  3755. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000090
  3756. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_LSB 15
  3757. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MSB 15
  3758. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000
  3759. /* Description DOT11AX_MIN_PACKET_EXTENSION
  3760. field is only valid for pkt_type == 11ax OR pkt_type ==
  3761. 11be
  3762. The min packet extension duration for this user.
  3763. 0: no extension
  3764. 1: 8us
  3765. 2: 16 us
  3766. 3: 20 us (only for .11be)
  3767. <legal 0-3>
  3768. */
  3769. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000090
  3770. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
  3771. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
  3772. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000
  3773. /* Description DOT11AX_PE_NSS
  3774. Number of active spatial streams during packet extension.
  3775. <enum 0 1_spatial_stream>Single spatial stream
  3776. <enum 1 2_spatial_streams>2 spatial streams
  3777. <enum 2 3_spatial_streams>3 spatial streams
  3778. <enum 3 4_spatial_streams>4 spatial streams
  3779. <enum 4 5_spatial_streams>5 spatial streams
  3780. <enum 5 6_spatial_streams>6 spatial streams
  3781. <enum 6 7_spatial_streams>7 spatial streams
  3782. <enum 7 8_spatial_streams>8 spatial streams
  3783. */
  3784. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_OFFSET 0x0000000000000090
  3785. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_LSB 18
  3786. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MSB 20
  3787. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MASK 0x00000000001c0000
  3788. /* Description DOT11AX_PE_CONTENT
  3789. Content of packet extension. Valid for all 11ax packets
  3790. having packet extension
  3791. 0-he_ltf, 1-last_data_symbol
  3792. <legal all>
  3793. */
  3794. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000090
  3795. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_LSB 21
  3796. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MSB 21
  3797. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MASK 0x0000000000200000
  3798. /* Description DOT11AX_PE_LTF_SIZE
  3799. LTF size to be used during packet extention. . This field
  3800. is valid for both FTM and non-FTM packets.
  3801. 0-1x
  3802. 1-2x (unsupported un HWK-1)
  3803. 2-4x (unsupported un HWK-1)
  3804. <legal all>
  3805. */
  3806. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000090
  3807. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_LSB 22
  3808. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MSB 23
  3809. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000
  3810. /* Description DOT11AX_CHAIN_CSD_EN
  3811. This field denotes whether to apply CSD on the preamble
  3812. and data portion of the packet. This field is valid for
  3813. all transmit packets
  3814. 0: disable per-chain csd
  3815. 1: enable per-chain csd
  3816. <legal all>
  3817. */
  3818. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000090
  3819. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_LSB 24
  3820. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MSB 24
  3821. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000
  3822. /* Description DOT11AX_PE_CHAIN_CSD_EN
  3823. This field denotes whether to apply CSD on the packet extension
  3824. portion of the packet. This field is valid for all 11ax
  3825. packets.
  3826. 0: disable per-chain csd
  3827. 1: enable per-chain csd
  3828. <legal all>
  3829. */
  3830. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000090
  3831. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
  3832. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
  3833. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000
  3834. /* Description DOT11AX_DL_UL_FLAG
  3835. field is only valid for pkt_type == 11ax
  3836. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  3837. <enum 1 DL_UL_FLAG_IS_UL>
  3838. <legal all>
  3839. */
  3840. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000090
  3841. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_LSB 26
  3842. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MSB 26
  3843. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000
  3844. /* Description RESERVED_4A
  3845. <legal 0>
  3846. */
  3847. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_OFFSET 0x0000000000000090
  3848. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_LSB 27
  3849. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MSB 31
  3850. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MASK 0x00000000f8000000
  3851. /* Description DOT11AX_EXT_RU_START_INDEX
  3852. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3853. == 1
  3854. RU Number to which User is assigned
  3855. The RU numbering bitwidth is only enough to cover the 20MHz
  3856. BW that extended range allows
  3857. <legal 0-8>
  3858. */
  3859. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000090
  3860. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_LSB 32
  3861. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MSB 35
  3862. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000
  3863. /* Description DOT11AX_EXT_RU_SIZE
  3864. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  3865. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  3866. The size of the RU for this user.
  3867. In case of EHT duplicate transmissions, this field indicates
  3868. the width of the actual content before duplication, e.g.
  3869. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  3870. fields indicating 160 MHz and this field set to e-num 4
  3871. (RU_484).
  3872. <enum 0 RU_26>
  3873. <enum 1 RU_52>
  3874. <enum 2 RU_106>
  3875. <enum 3 RU_242>
  3876. <enum 4 RU_484>
  3877. <enum 5 RU_996>
  3878. <enum 6 RU_1992>
  3879. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  3880. bandwidth
  3881. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  3882. packet bandwidth
  3883. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  3884. packet bandwidth
  3885. <enum 10 RU_MULTI_LARGE> DO NOT USE
  3886. <enum 11 RU_78> DO NOT USE
  3887. <enum 12 RU_132> DO NOT USE
  3888. <legal 0-12>
  3889. */
  3890. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000090
  3891. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_LSB 36
  3892. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MSB 39
  3893. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000
  3894. /* Description EHT_DUPLICATE_MODE
  3895. Field only valid for pkt_type == 11be
  3896. Indicates EHT duplicate modulation
  3897. <enum 0 eht_no_duplicate>
  3898. <enum 1 eht_2x_duplicate>
  3899. <enum 2 eht_4x_duplicate>
  3900. <legal 0-2>
  3901. */
  3902. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000090
  3903. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_LSB 40
  3904. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MSB 41
  3905. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MASK 0x0000030000000000
  3906. /* Description HE_SIGB_DCM
  3907. Indicates whether dual sub-carrier modulation is applied
  3908. to EHT-SIG
  3909. <legal all>
  3910. */
  3911. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_OFFSET 0x0000000000000090
  3912. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_LSB 42
  3913. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MSB 42
  3914. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MASK 0x0000040000000000
  3915. /* Description HE_SIGB_0_MCS
  3916. Indicates the MCS of EHT-SIG
  3917. For details, refer to MCS_TYPE description
  3918. <legal all>
  3919. */
  3920. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_OFFSET 0x0000000000000090
  3921. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_LSB 43
  3922. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MSB 45
  3923. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MASK 0x0000380000000000
  3924. /* Description NUM_HE_SIGB_SYM
  3925. Indicates the number of EHT-SIG symbols
  3926. This field is 0-based with 0 indicating that 1 eht_sig symbol
  3927. needs to be transmitted.
  3928. <legal all>
  3929. */
  3930. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000090
  3931. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_LSB 46
  3932. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MSB 50
  3933. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000
  3934. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  3935. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  3936. HT Control for sync MLO response
  3937. <enum 1 reqd_resp_time_src_is_FW>
  3938. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  3939. to response
  3940. <legal all>
  3941. */
  3942. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000090
  3943. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51
  3944. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51
  3945. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000
  3946. /* Description RESERVED_5A
  3947. <legal 0>
  3948. */
  3949. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_OFFSET 0x0000000000000090
  3950. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_LSB 52
  3951. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MSB 57
  3952. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MASK 0x03f0000000000000
  3953. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  3954. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  3955. to pass on to PDG
  3956. <legal 0-29>
  3957. */
  3958. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000090
  3959. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58
  3960. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63
  3961. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000
  3962. /* Description MLO_STA_ID_DETAILS_RX
  3963. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  3964. on to PDG
  3965. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  3966. from address search.
  3967. See definition of mlo_sta_id_details.
  3968. */
  3969. /* Description NSTR_MLO_STA_ID
  3970. ID of peer participating in non-STR MLO
  3971. */
  3972. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000098
  3973. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
  3974. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
  3975. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff
  3976. /* Description BLOCK_SELF_ML_SYNC
  3977. Only valid for TX
  3978. When set, this provides an indication to block the peer
  3979. for self-link.
  3980. */
  3981. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000098
  3982. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
  3983. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
  3984. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400
  3985. /* Description BLOCK_PARTNER_ML_SYNC
  3986. Only valid for TX
  3987. When set, this provides an indication to block the peer
  3988. for partner links.
  3989. */
  3990. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000098
  3991. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
  3992. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
  3993. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800
  3994. /* Description NSTR_MLO_STA_ID_VALID
  3995. All the fields in this TLV are valid only if this bit is
  3996. set.
  3997. */
  3998. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000098
  3999. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
  4000. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
  4001. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000
  4002. /* Description RESERVED_0A
  4003. <legal 0>
  4004. */
  4005. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000098
  4006. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
  4007. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
  4008. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000
  4009. /* Description REQUIRED_RESPONSE_TIME
  4010. When non-zero, indicates that PDG shall pad the response
  4011. transmission to the indicated duration (in us)
  4012. */
  4013. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000098
  4014. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_LSB 16
  4015. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MSB 27
  4016. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000
  4017. /* Description DOT11BE_PARAMS_PLACEHOLDER
  4018. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  4019. */
  4020. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000098
  4021. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
  4022. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
  4023. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000
  4024. /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW320
  4025. Field only valid in case of Response_to_response set to
  4026. SU_BA or MU_BA
  4027. NOTE: This field is also known as response_to_response_rate_info_pattern_5
  4028. in case punctured transmission is enabled.
  4029. Used by TXPCU to determine what the transmit rates are for
  4030. the response to response transmission in case original
  4031. transmission was 320 MHz.
  4032. Note:
  4033. see field R2R_bw320_active_channel for the BW of this transmission
  4034. */
  4035. /* Description RESERVED_0A
  4036. <legal 0>
  4037. */
  4038. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_OFFSET 0x0000000000000098
  4039. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_LSB 32
  4040. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MSB 32
  4041. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MASK 0x0000000100000000
  4042. /* Description TX_ANTENNA_SECTOR_CTRL
  4043. Sectored transmit antenna
  4044. <legal all>
  4045. */
  4046. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000098
  4047. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_LSB 33
  4048. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MSB 56
  4049. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000
  4050. /* Description PKT_TYPE
  4051. Packet type:
  4052. <enum 0 dot11a>802.11a PPDU type
  4053. <enum 1 dot11b>802.11b PPDU type
  4054. <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
  4055. <enum 3 dot11ac>802.11ac PPDU type
  4056. <enum 4 dot11ax>802.11ax PPDU type
  4057. <enum 5 dot11ba>802.11ba (WUR) PPDU type
  4058. <enum 6 dot11be>802.11be PPDU type
  4059. <enum 7 dot11az>802.11az (ranging) PPDU type
  4060. <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
  4061. & aborted)
  4062. */
  4063. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_OFFSET 0x0000000000000098
  4064. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_LSB 57
  4065. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MSB 60
  4066. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MASK 0x1e00000000000000
  4067. /* Description SMOOTHING
  4068. This field is used by PDG to populate the SMOOTHING filed
  4069. in the SIG Preamble of the PPDU
  4070. <legal 0-1>
  4071. */
  4072. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_OFFSET 0x0000000000000098
  4073. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_LSB 61
  4074. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MSB 61
  4075. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MASK 0x2000000000000000
  4076. /* Description LDPC
  4077. When set, use LDPC transmission rates
  4078. */
  4079. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_OFFSET 0x0000000000000098
  4080. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_LSB 62
  4081. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MSB 62
  4082. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MASK 0x4000000000000000
  4083. /* Description STBC
  4084. When set, use STBC transmission rates
  4085. */
  4086. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_OFFSET 0x0000000000000098
  4087. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_LSB 63
  4088. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MSB 63
  4089. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MASK 0x8000000000000000
  4090. /* Description ALT_TX_PWR
  4091. Coex related AlternativeTransmit parameter
  4092. Transmit Power in s6.2 format.
  4093. In units of 0.25 dBm
  4094. <legal all>
  4095. */
  4096. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_OFFSET 0x00000000000000a0
  4097. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_LSB 0
  4098. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MSB 7
  4099. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MASK 0x00000000000000ff
  4100. /* Description ALT_MIN_TX_PWR
  4101. Coex related Alternative Transmit parameter
  4102. Minimum allowed Transmit Power in s6.2 format.
  4103. In units of 0.25 dBm
  4104. <legal all>
  4105. */
  4106. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_OFFSET 0x00000000000000a0
  4107. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_LSB 8
  4108. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MSB 15
  4109. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MASK 0x000000000000ff00
  4110. /* Description ALT_NSS
  4111. Coex related Alternative Transmit parameter
  4112. Number of spatial streams.
  4113. <enum 0 1_spatial_stream>Single spatial stream
  4114. <enum 1 2_spatial_streams>2 spatial streams
  4115. <enum 2 3_spatial_streams>3 spatial streams
  4116. <enum 3 4_spatial_streams>4 spatial streams
  4117. <enum 4 5_spatial_streams>5 spatial streams
  4118. <enum 5 6_spatial_streams>6 spatial streams
  4119. <enum 6 7_spatial_streams>7 spatial streams
  4120. <enum 7 8_spatial_streams>8 spatial streams
  4121. */
  4122. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_OFFSET 0x00000000000000a0
  4123. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_LSB 16
  4124. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MSB 18
  4125. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MASK 0x0000000000070000
  4126. /* Description ALT_TX_CHAIN_MASK
  4127. Coex related Alternative Transmit parameter
  4128. Chain mask to support up to 8 antennas.
  4129. <legal 1-255>
  4130. */
  4131. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_OFFSET 0x00000000000000a0
  4132. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_LSB 19
  4133. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MSB 26
  4134. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000
  4135. /* Description ALT_BW
  4136. Coex related Alternative Transmit parameter
  4137. The BW of the upcoming transmission.
  4138. <enum 0 20_mhz>20 Mhz BW
  4139. <enum 1 40_mhz>40 Mhz BW
  4140. <enum 2 80_mhz>80 Mhz BW
  4141. <enum 3 160_mhz>160 Mhz BW
  4142. <enum 4 320_mhz>320 Mhz BW
  4143. <enum 5 240_mhz>240 Mhz BW
  4144. */
  4145. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_OFFSET 0x00000000000000a0
  4146. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_LSB 27
  4147. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MSB 29
  4148. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MASK 0x0000000038000000
  4149. /* Description STF_LTF_3DB_BOOST
  4150. Boost the STF and LTF power by 3dB in 11a/n/ac packets.
  4151. This includes both the legacy preambles and the HT/VHT preambles.0:
  4152. disable power boost1: enable power boost
  4153. <legal all>
  4154. */
  4155. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_OFFSET 0x00000000000000a0
  4156. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_LSB 30
  4157. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MSB 30
  4158. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MASK 0x0000000040000000
  4159. /* Description FORCE_EXTRA_SYMBOL
  4160. Set to 1 to force an extra OFDM symbol (or symbols) even
  4161. if the PPDU encoding process does not result in an extra
  4162. OFDM symbol (or symbols)
  4163. */
  4164. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_OFFSET 0x00000000000000a0
  4165. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_LSB 31
  4166. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MSB 31
  4167. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000
  4168. /* Description ALT_RATE_MCS
  4169. Coex related Alternative Transmit parameter
  4170. For details, refer to MCS_TYPE
  4171. Note: This is "rate" in case of 11a/11b
  4172. description
  4173. <legal all>
  4174. */
  4175. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_OFFSET 0x00000000000000a0
  4176. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_LSB 32
  4177. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MSB 35
  4178. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MASK 0x0000000f00000000
  4179. /* Description NSS
  4180. Number of spatial streams.
  4181. <enum 0 1_spatial_stream>Single spatial stream
  4182. <enum 1 2_spatial_streams>2 spatial streams
  4183. <enum 2 3_spatial_streams>3 spatial streams
  4184. <enum 3 4_spatial_streams>4 spatial streams
  4185. <enum 4 5_spatial_streams>5 spatial streams
  4186. <enum 5 6_spatial_streams>6 spatial streams
  4187. <enum 6 7_spatial_streams>7 spatial streams
  4188. <enum 7 8_spatial_streams>8 spatial streams
  4189. */
  4190. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_OFFSET 0x00000000000000a0
  4191. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_LSB 36
  4192. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MSB 38
  4193. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MASK 0x0000007000000000
  4194. /* Description DPD_ENABLE
  4195. DPD enable control
  4196. This is needed on a per packet basis
  4197. <enum 0 dpd_off> DPD profile not applied to current
  4198. packet
  4199. <enum 1 dpd_on> DPD profile applied to current packet
  4200. if available
  4201. <legal 0-1>
  4202. This field is not applicable in11ah mode of operation and
  4203. is ignored by the HW
  4204. */
  4205. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_OFFSET 0x00000000000000a0
  4206. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_LSB 39
  4207. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MSB 39
  4208. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MASK 0x0000008000000000
  4209. /* Description TX_PWR
  4210. Transmit Power in s6.2 format.
  4211. In units of 0.25 dBm
  4212. <legal all>
  4213. */
  4214. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_OFFSET 0x00000000000000a0
  4215. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_LSB 40
  4216. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MSB 47
  4217. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MASK 0x0000ff0000000000
  4218. /* Description MIN_TX_PWR
  4219. Coex related field:
  4220. Minimum allowed Transmit Power in s6.2 format.
  4221. In units of 0.25 dBm
  4222. <legal all>
  4223. */
  4224. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_OFFSET 0x00000000000000a0
  4225. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_LSB 48
  4226. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MSB 55
  4227. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MASK 0x00ff000000000000
  4228. /* Description TX_CHAIN_MASK
  4229. Chain mask to support up to 8 antennas.
  4230. <legal 1-255>
  4231. */
  4232. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_OFFSET 0x00000000000000a0
  4233. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_LSB 56
  4234. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MSB 63
  4235. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MASK 0xff00000000000000
  4236. /* Description RESERVED_3A
  4237. <legal 0>
  4238. */
  4239. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_OFFSET 0x00000000000000a8
  4240. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_LSB 0
  4241. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MSB 7
  4242. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MASK 0x00000000000000ff
  4243. /* Description SGI
  4244. Field only valid when pkt type is HT or VHT.For 11ax see
  4245. field Dot11ax_CP_LTF_size
  4246. <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
  4247. for HE
  4248. <enum 1 0_4_us_sgi > Legacy short GI. Can also be used
  4249. for HE
  4250. <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types.
  4251. <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types
  4252. <legal 0 - 3>
  4253. */
  4254. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_OFFSET 0x00000000000000a8
  4255. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_LSB 8
  4256. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MSB 9
  4257. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MASK 0x0000000000000300
  4258. /* Description RATE_MCS
  4259. For details, refer to MCS_TYPE description
  4260. Note: This is "rate" in case of 11a/11b
  4261. <legal all>
  4262. */
  4263. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_OFFSET 0x00000000000000a8
  4264. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_LSB 10
  4265. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MSB 13
  4266. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MASK 0x0000000000003c00
  4267. /* Description RESERVED_3B
  4268. <legal 0>
  4269. */
  4270. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_OFFSET 0x00000000000000a8
  4271. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_LSB 14
  4272. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MSB 15
  4273. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MASK 0x000000000000c000
  4274. /* Description TX_PWR_1
  4275. Default (desired) transmit parameter for the second chain
  4276. Transmit Power in s6.2 format.
  4277. In units of 0.25 dBm
  4278. Note that there is no Min value for this
  4279. <legal all>
  4280. */
  4281. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_OFFSET 0x00000000000000a8
  4282. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_LSB 16
  4283. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MSB 23
  4284. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MASK 0x0000000000ff0000
  4285. /* Description ALT_TX_PWR_1
  4286. Alternate (desired) transmit parameter for the second chain
  4287. Transmit Power in s6.2 format.
  4288. In units of 0.25 dBm
  4289. Note that there is no Min value for this
  4290. <legal all>
  4291. */
  4292. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_OFFSET 0x00000000000000a8
  4293. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_LSB 24
  4294. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MSB 31
  4295. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MASK 0x00000000ff000000
  4296. /* Description AGGREGATION
  4297. Field only valid in case of pkt_type == 11n
  4298. <enum 0 mpdu> Indicates MPDU format. TXPCU will select
  4299. this setting if the CBF response only contains a single
  4300. segment
  4301. <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will
  4302. select this setting if the CBF response will contain two
  4303. or more segments
  4304. <legal 0-1>
  4305. */
  4306. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_OFFSET 0x00000000000000a8
  4307. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_LSB 32
  4308. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MSB 32
  4309. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MASK 0x0000000100000000
  4310. /* Description DOT11AX_BSS_COLOR_ID
  4311. BSS color of the nextwork to which this STA belongs.
  4312. When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id
  4313. <legal all>
  4314. */
  4315. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000000000000a8
  4316. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_LSB 33
  4317. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MSB 38
  4318. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000
  4319. /* Description DOT11AX_SPATIAL_REUSE
  4320. This field is only valid for pkt_type == 11ax
  4321. Spatial re-use
  4322. <legal all>
  4323. */
  4324. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000000000000a8
  4325. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_LSB 39
  4326. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MSB 42
  4327. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000
  4328. /* Description DOT11AX_CP_LTF_SIZE
  4329. field is only valid for pkt_type == 11ax
  4330. Indicates the CP and HE-LTF type
  4331. <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
  4332. <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
  4333. <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
  4334. <enum 3 FourX_LTF_0_8CP_3_2CP>
  4335. When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
  4336. When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
  4337. In this scenario, Neither DCM nor STBC is applied to HE
  4338. data field.
  4339. If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
  4340. 0 = 1xLTF + 0.4 usec
  4341. 1 = 2xLTF + 0.4 usec
  4342. 2~3 = Reserved
  4343. <legal all>
  4344. */
  4345. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000000000000a8
  4346. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_LSB 43
  4347. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MSB 44
  4348. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000
  4349. /* Description DOT11AX_DCM
  4350. field is only valid for pkt_type == 11ax
  4351. Indicates whether dual sub-carrier modulation is applied
  4352. 0: No DCM
  4353. 1:DCM
  4354. <legal all>
  4355. */
  4356. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_OFFSET 0x00000000000000a8
  4357. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_LSB 45
  4358. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MSB 45
  4359. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MASK 0x0000200000000000
  4360. /* Description DOT11AX_DOPPLER_INDICATION
  4361. field is only valid for pkt_type == 11ax
  4362. 0: No Doppler support
  4363. 1: Doppler support
  4364. <legal all>
  4365. */
  4366. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000000000000a8
  4367. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_LSB 46
  4368. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MSB 46
  4369. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000
  4370. /* Description DOT11AX_SU_EXTENDED
  4371. field is only valid for pkt_type == 11ax OR pkt_type ==
  4372. 11be
  4373. When set, the 11ax or 11be frame is of the extended range
  4374. format
  4375. <legal all>
  4376. */
  4377. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_OFFSET 0x00000000000000a8
  4378. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_LSB 47
  4379. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MSB 47
  4380. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000
  4381. /* Description DOT11AX_MIN_PACKET_EXTENSION
  4382. field is only valid for pkt_type == 11ax OR pkt_type ==
  4383. 11be
  4384. The min packet extension duration for this user.
  4385. 0: no extension
  4386. 1: 8us
  4387. 2: 16 us
  4388. 3: 20 us (only for .11be)
  4389. <legal 0-3>
  4390. */
  4391. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000000000000a8
  4392. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_LSB 48
  4393. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MSB 49
  4394. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000
  4395. /* Description DOT11AX_PE_NSS
  4396. Number of active spatial streams during packet extension.
  4397. <enum 0 1_spatial_stream>Single spatial stream
  4398. <enum 1 2_spatial_streams>2 spatial streams
  4399. <enum 2 3_spatial_streams>3 spatial streams
  4400. <enum 3 4_spatial_streams>4 spatial streams
  4401. <enum 4 5_spatial_streams>5 spatial streams
  4402. <enum 5 6_spatial_streams>6 spatial streams
  4403. <enum 6 7_spatial_streams>7 spatial streams
  4404. <enum 7 8_spatial_streams>8 spatial streams
  4405. */
  4406. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_OFFSET 0x00000000000000a8
  4407. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_LSB 50
  4408. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MSB 52
  4409. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MASK 0x001c000000000000
  4410. /* Description DOT11AX_PE_CONTENT
  4411. Content of packet extension. Valid for all 11ax packets
  4412. having packet extension
  4413. 0-he_ltf, 1-last_data_symbol
  4414. <legal all>
  4415. */
  4416. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_OFFSET 0x00000000000000a8
  4417. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_LSB 53
  4418. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MSB 53
  4419. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MASK 0x0020000000000000
  4420. /* Description DOT11AX_PE_LTF_SIZE
  4421. LTF size to be used during packet extention. . This field
  4422. is valid for both FTM and non-FTM packets.
  4423. 0-1x
  4424. 1-2x (unsupported un HWK-1)
  4425. 2-4x (unsupported un HWK-1)
  4426. <legal all>
  4427. */
  4428. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000000000000a8
  4429. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_LSB 54
  4430. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MSB 55
  4431. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000
  4432. /* Description DOT11AX_CHAIN_CSD_EN
  4433. This field denotes whether to apply CSD on the preamble
  4434. and data portion of the packet. This field is valid for
  4435. all transmit packets
  4436. 0: disable per-chain csd
  4437. 1: enable per-chain csd
  4438. <legal all>
  4439. */
  4440. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000000000000a8
  4441. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_LSB 56
  4442. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MSB 56
  4443. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000
  4444. /* Description DOT11AX_PE_CHAIN_CSD_EN
  4445. This field denotes whether to apply CSD on the packet extension
  4446. portion of the packet. This field is valid for all 11ax
  4447. packets.
  4448. 0: disable per-chain csd
  4449. 1: enable per-chain csd
  4450. <legal all>
  4451. */
  4452. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000000000000a8
  4453. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_LSB 57
  4454. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MSB 57
  4455. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000
  4456. /* Description DOT11AX_DL_UL_FLAG
  4457. field is only valid for pkt_type == 11ax
  4458. <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
  4459. <enum 1 DL_UL_FLAG_IS_UL>
  4460. <legal all>
  4461. */
  4462. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_OFFSET 0x00000000000000a8
  4463. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_LSB 58
  4464. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MSB 58
  4465. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000
  4466. /* Description RESERVED_4A
  4467. <legal 0>
  4468. */
  4469. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_OFFSET 0x00000000000000a8
  4470. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_LSB 59
  4471. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MSB 63
  4472. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MASK 0xf800000000000000
  4473. /* Description DOT11AX_EXT_RU_START_INDEX
  4474. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  4475. == 1
  4476. RU Number to which User is assigned
  4477. The RU numbering bitwidth is only enough to cover the 20MHz
  4478. BW that extended range allows
  4479. <legal 0-8>
  4480. */
  4481. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000000000000b0
  4482. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_LSB 0
  4483. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MSB 3
  4484. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f
  4485. /* Description DOT11AX_EXT_RU_SIZE
  4486. field is only valid for pkt_type == 11ax and Dot11ax_su_extended
  4487. == 1 or pkt_type == 11be and EHT_duplicate_mode == 1
  4488. The size of the RU for this user.
  4489. In case of EHT duplicate transmissions, this field indicates
  4490. the width of the actual content before duplication, e.g.
  4491. a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth
  4492. fields indicating 160 MHz and this field set to e-num 4
  4493. (RU_484).
  4494. <enum 0 RU_26>
  4495. <enum 1 RU_52>
  4496. <enum 2 RU_106>
  4497. <enum 3 RU_242>
  4498. <enum 4 RU_484>
  4499. <enum 5 RU_996>
  4500. <enum 6 RU_1992>
  4501. <enum 7 RU_FULLBW> Set when the RU occupies the full packet
  4502. bandwidth
  4503. <enum 8 RU_FULLBW_240> Set when the RU occupies the full
  4504. packet bandwidth
  4505. <enum 9 RU_FULLBW_320> Set when the RU occupies the full
  4506. packet bandwidth
  4507. <enum 10 RU_MULTI_LARGE> DO NOT USE
  4508. <enum 11 RU_78> DO NOT USE
  4509. <enum 12 RU_132> DO NOT USE
  4510. <legal 0-12>
  4511. */
  4512. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000000000000b0
  4513. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_LSB 4
  4514. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MSB 7
  4515. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0
  4516. /* Description EHT_DUPLICATE_MODE
  4517. Field only valid for pkt_type == 11be
  4518. Indicates EHT duplicate modulation
  4519. <enum 0 eht_no_duplicate>
  4520. <enum 1 eht_2x_duplicate>
  4521. <enum 2 eht_4x_duplicate>
  4522. <legal 0-2>
  4523. */
  4524. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_OFFSET 0x00000000000000b0
  4525. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_LSB 8
  4526. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MSB 9
  4527. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MASK 0x0000000000000300
  4528. /* Description HE_SIGB_DCM
  4529. Indicates whether dual sub-carrier modulation is applied
  4530. to EHT-SIG
  4531. <legal all>
  4532. */
  4533. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_OFFSET 0x00000000000000b0
  4534. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_LSB 10
  4535. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MSB 10
  4536. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MASK 0x0000000000000400
  4537. /* Description HE_SIGB_0_MCS
  4538. Indicates the MCS of EHT-SIG
  4539. For details, refer to MCS_TYPE description
  4540. <legal all>
  4541. */
  4542. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_OFFSET 0x00000000000000b0
  4543. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_LSB 11
  4544. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MSB 13
  4545. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MASK 0x0000000000003800
  4546. /* Description NUM_HE_SIGB_SYM
  4547. Indicates the number of EHT-SIG symbols
  4548. This field is 0-based with 0 indicating that 1 eht_sig symbol
  4549. needs to be transmitted.
  4550. <legal all>
  4551. */
  4552. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_OFFSET 0x00000000000000b0
  4553. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_LSB 14
  4554. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MSB 18
  4555. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MASK 0x000000000007c000
  4556. /* Description REQUIRED_RESPONSE_TIME_SOURCE
  4557. <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received
  4558. HT Control for sync MLO response
  4559. <enum 1 reqd_resp_time_src_is_FW>
  4560. Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response
  4561. to response
  4562. <legal all>
  4563. */
  4564. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000000000000b0
  4565. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
  4566. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
  4567. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000
  4568. /* Description RESERVED_5A
  4569. <legal 0>
  4570. */
  4571. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_OFFSET 0x00000000000000b0
  4572. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_LSB 20
  4573. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MSB 25
  4574. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MASK 0x0000000003f00000
  4575. /* Description U_SIG_PUNCTURE_PATTERN_ENCODING
  4576. 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO'
  4577. to pass on to PDG
  4578. <legal 0-29>
  4579. */
  4580. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000000000000b0
  4581. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
  4582. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
  4583. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000
  4584. /* Description MLO_STA_ID_DETAILS_RX
  4585. 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass
  4586. on to PDG
  4587. Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID'
  4588. from address search.
  4589. See definition of mlo_sta_id_details.
  4590. */
  4591. /* Description NSTR_MLO_STA_ID
  4592. ID of peer participating in non-STR MLO
  4593. */
  4594. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000000000000b0
  4595. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32
  4596. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41
  4597. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000
  4598. /* Description BLOCK_SELF_ML_SYNC
  4599. Only valid for TX
  4600. When set, this provides an indication to block the peer
  4601. for self-link.
  4602. */
  4603. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000000000b0
  4604. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42
  4605. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42
  4606. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000
  4607. /* Description BLOCK_PARTNER_ML_SYNC
  4608. Only valid for TX
  4609. When set, this provides an indication to block the peer
  4610. for partner links.
  4611. */
  4612. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000000000b0
  4613. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43
  4614. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43
  4615. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000
  4616. /* Description NSTR_MLO_STA_ID_VALID
  4617. All the fields in this TLV are valid only if this bit is
  4618. set.
  4619. */
  4620. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000000000b0
  4621. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44
  4622. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44
  4623. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000
  4624. /* Description RESERVED_0A
  4625. <legal 0>
  4626. */
  4627. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000000000000b0
  4628. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45
  4629. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47
  4630. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000
  4631. /* Description REQUIRED_RESPONSE_TIME
  4632. When non-zero, indicates that PDG shall pad the response
  4633. transmission to the indicated duration (in us)
  4634. */
  4635. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b0
  4636. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_LSB 48
  4637. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MSB 59
  4638. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000
  4639. /* Description DOT11BE_PARAMS_PLACEHOLDER
  4640. 4 bytes for use as placeholders for 'Dot11be_*' parameters
  4641. */
  4642. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000000000000b0
  4643. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_LSB 60
  4644. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MSB 63
  4645. #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000
  4646. /* Description R2R_HW_RESPONSE_TX_DURATION
  4647. Field only valid in case of Response_to_response set to
  4648. SU_BA or MU_BA
  4649. The amount of time the transmission of the HW response to
  4650. response will take (in us)
  4651. Used for coex as well as e.g. for sync MLO to align R2R
  4652. times on the medium across multiple channels
  4653. This field also represents the 'alt_hw_response_tx_duration'.
  4654. Note that this implies that no different duration can be
  4655. programmed for the default and alt setting. SW should program
  4656. the worst case value in the RXPCU table in case they are
  4657. different.
  4658. <legal all>
  4659. */
  4660. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_OFFSET 0x00000000000000b8
  4661. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_LSB 0
  4662. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MSB 15
  4663. #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MASK 0x000000000000ffff
  4664. /* Description R2R_RX_DURATION_FIELD
  4665. Field only valid in case of Response_to_response set to
  4666. SU_BA or MU_BA
  4667. The duration field assumed to have been received in the
  4668. response frame and what will be used in the duration field
  4669. calculation for the response_to_response_Frame
  4670. PDG uses this field to calculate what the duration field
  4671. value should be in the response frame.
  4672. This is returned to the TXPCU
  4673. Note that if PDG has protection in place to wrap around...
  4674. I the actual transmit time is larger then the value programmed
  4675. here, PDG HW will set the duration field in the response
  4676. to response frame to zero.
  4677. This field is used in 11ah mode as well
  4678. <legal all>
  4679. */
  4680. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_OFFSET 0x00000000000000b8
  4681. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_LSB 16
  4682. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MSB 31
  4683. #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MASK 0x00000000ffff0000
  4684. /* Description R2R_GROUP_ID
  4685. Field only valid in case of Response_to_response set to
  4686. SU_BA or MU_BA
  4687. Specifies the Group ID to be used in the response to response
  4688. frame.
  4689. <legal all>
  4690. */
  4691. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_OFFSET 0x00000000000000b8
  4692. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_LSB 32
  4693. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MSB 37
  4694. #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MASK 0x0000003f00000000
  4695. /* Description R2R_RESPONSE_FRAME_TYPE
  4696. Field only valid in case of Response_to_response set to
  4697. SU_BA or MU_BA
  4698. Response_frame_type to be indicated in the PDG_RESPONSE
  4699. TLV for the response to response frame.
  4700. Coex related field
  4701. <enum 0 Non_11ah_ACK >
  4702. <enum 1 Non_11ah_BA > also used for M-BA
  4703. <enum 2 Non_11ah_CTS >
  4704. <enum 3 AH_NDP_CTS>
  4705. <enum 4 AH_NDP_ACK>
  4706. <enum 5 AH_NDP_BA>
  4707. <enum 6 AH_NDP_MOD_ACK>
  4708. <enum 7 AH_Normal_ACK>
  4709. <enum 8 AH_Normal_BA>
  4710. <enum 9 RTT_ACK>
  4711. <enum 10 CBF_RESPONSE>
  4712. <enum 11 MBA> This can be a multi STA BA or multi TID BA
  4713. <enum 12 Ranging_NDP>
  4714. <enum 13 LMR_RESPONSE> NDP followed by LMR response for
  4715. Rx ranging NDPA followed by NDP
  4716. <legal 0-12>
  4717. */
  4718. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_OFFSET 0x00000000000000b8
  4719. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_LSB 38
  4720. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MSB 41
  4721. #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MASK 0x000003c000000000
  4722. /* Description R2R_STA_PARTIAL_AID
  4723. Field only valid in case of Response_to_response set to
  4724. SU_BA or MU_BA
  4725. Specifies the partial AID of the response to response frame
  4726. in case it is transmitted at VHT rates.
  4727. <legal all>
  4728. */
  4729. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_OFFSET 0x00000000000000b8
  4730. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_LSB 42
  4731. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MSB 52
  4732. #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MASK 0x001ffc0000000000
  4733. /* Description USE_ADDRESS_FIELDS_FOR_PROTECTION
  4734. When set, the protection_frame_ad1/ad2 fields are to be
  4735. used for RTS/CTS2S frames
  4736. When set and not disabled through a TXPCU register bit,
  4737. the protection_frame_ad2* fields are also copied to the
  4738. tx_ad2* fields of the 'EXPECTED_RESPONSE' TLV (i.e. the
  4739. expected response Rx AD1) to RXPCU for all frames.
  4740. <legal all>
  4741. */
  4742. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_OFFSET 0x00000000000000b8
  4743. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_LSB 53
  4744. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MSB 53
  4745. #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MASK 0x0020000000000000
  4746. /* Description R2R_SET_REQUIRED_RESPONSE_TIME
  4747. Field only valid in case of response to response
  4748. When set, TXPCU shall copy the R2R_Hw_response_tx_duration
  4749. field and pass it on to PDG in field required_response_time
  4750. in 'PDG_RESPONSE.'
  4751. This allows SW to force an R2R time e.g. in case of sync
  4752. MLO, making sure that the R2R times on the medium for multiple
  4753. links are aligned.
  4754. <legal all>
  4755. */
  4756. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b8
  4757. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_LSB 54
  4758. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MSB 54
  4759. #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MASK 0x0040000000000000
  4760. /* Description RESERVED_29A
  4761. <legal 0>
  4762. */
  4763. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_OFFSET 0x00000000000000b8
  4764. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_LSB 55
  4765. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MSB 57
  4766. #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MASK 0x0380000000000000
  4767. /* Description R2R_BW20_ACTIVE_CHANNEL
  4768. Field only valid for 20 BW
  4769. NOTE: This field is also known as R2R_active_channel_pattern_0
  4770. in case punctured transmission is enabled.
  4771. This field indicates the active frequency band when the
  4772. initial trigger frame transmission was in 20 MHz
  4773. <legal all>
  4774. */
  4775. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8
  4776. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_LSB 58
  4777. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MSB 60
  4778. #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MASK 0x1c00000000000000
  4779. /* Description R2R_BW40_ACTIVE_CHANNEL
  4780. Field only valid for 40 BW
  4781. NOTE: This field is also known as R2R_active_channel_pattern_1
  4782. in case punctured transmission is enabled.
  4783. This field indicates the active frequency band when the
  4784. initial trigger frame transmission was in 40 MHz
  4785. <legal all>
  4786. */
  4787. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8
  4788. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_LSB 61
  4789. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MSB 63
  4790. #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MASK 0xe000000000000000
  4791. /* Description R2R_BW80_ACTIVE_CHANNEL
  4792. Field only valid for 80 BW
  4793. NOTE: This field is also known as R2R_active_channel_pattern_2
  4794. in case punctured transmission is enabled.
  4795. This field indicates the active frequency band when the
  4796. initial trigger frame transmission was in 80 MHz
  4797. <legal all>
  4798. */
  4799. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4800. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_LSB 0
  4801. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MSB 2
  4802. #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MASK 0x0000000000000007
  4803. /* Description R2R_BW160_ACTIVE_CHANNEL
  4804. Field only valid for 160 BW
  4805. NOTE: This field is also known as R2R_active_channel_pattern_3
  4806. in case punctured transmission is enabled.
  4807. This field indicates the active frequency band when the
  4808. initial trigger frame transmission was in 160 MHz
  4809. <legal all>
  4810. */
  4811. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4812. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_LSB 3
  4813. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MSB 5
  4814. #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MASK 0x0000000000000038
  4815. /* Description R2R_BW240_ACTIVE_CHANNEL
  4816. Field only valid for 240 BW
  4817. NOTE: This field is also known as R2R_active_channel_pattern_4
  4818. in case punctured transmission is enabled.
  4819. This field indicates the active frequency band when the
  4820. initial trigger frame transmission was in 240 MHz
  4821. <legal all>
  4822. */
  4823. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4824. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_LSB 6
  4825. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MSB 8
  4826. #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MASK 0x00000000000001c0
  4827. /* Description R2R_BW320_ACTIVE_CHANNEL
  4828. Field only valid for 320 BW
  4829. NOTE: This field is also known as R2R_active_channel_pattern_5
  4830. in case punctured transmission is enabled.
  4831. This field indicates the active frequency band when the
  4832. initial trigger frame transmission was in 320 MHz
  4833. <legal all>
  4834. */
  4835. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0
  4836. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_LSB 9
  4837. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MSB 11
  4838. #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MASK 0x0000000000000e00
  4839. /* Description R2R_BW20
  4840. The BW for the response to response frame when the initial
  4841. trigger frame transmission was in 20 MHz
  4842. NOTE: This field is also known as R2R_pattern_0 in case
  4843. punctured transmission is enabled.
  4844. <enum 0 20_mhz>20 Mhz BW
  4845. <enum 1 40_mhz>40 Mhz BW
  4846. <enum 2 80_mhz>80 Mhz BW
  4847. <enum 3 160_mhz>160 Mhz BW
  4848. <enum 4 320_mhz>320 Mhz BW
  4849. <enum 5 240_mhz>240 Mhz BW
  4850. */
  4851. #define PCU_PPDU_SETUP_INIT_R2R_BW20_OFFSET 0x00000000000000c0
  4852. #define PCU_PPDU_SETUP_INIT_R2R_BW20_LSB 12
  4853. #define PCU_PPDU_SETUP_INIT_R2R_BW20_MSB 14
  4854. #define PCU_PPDU_SETUP_INIT_R2R_BW20_MASK 0x0000000000007000
  4855. /* Description R2R_BW40
  4856. The BW for the response to response frame when the initial
  4857. trigger frame transmission was in 40 MHz
  4858. NOTE: This field is also known as R2R_pattern_1 in case
  4859. punctured transmission is enabled.
  4860. <enum 0 20_mhz>20 Mhz BW
  4861. <enum 1 40_mhz>40 Mhz BW
  4862. <enum 2 80_mhz>80 Mhz BW
  4863. <enum 3 160_mhz>160 Mhz BW
  4864. <enum 4 320_mhz>320 Mhz BW
  4865. <enum 5 240_mhz>240 Mhz BW
  4866. */
  4867. #define PCU_PPDU_SETUP_INIT_R2R_BW40_OFFSET 0x00000000000000c0
  4868. #define PCU_PPDU_SETUP_INIT_R2R_BW40_LSB 15
  4869. #define PCU_PPDU_SETUP_INIT_R2R_BW40_MSB 17
  4870. #define PCU_PPDU_SETUP_INIT_R2R_BW40_MASK 0x0000000000038000
  4871. /* Description R2R_BW80
  4872. The BW for the response to response frame when the initial
  4873. trigger frame transmission was in 80 MHz
  4874. NOTE: This field is also known as R2R_pattern_2 in case
  4875. punctured transmission is enabled.
  4876. <enum 0 20_mhz>20 Mhz BW
  4877. <enum 1 40_mhz>40 Mhz BW
  4878. <enum 2 80_mhz>80 Mhz BW
  4879. <enum 3 160_mhz>160 Mhz BW
  4880. <enum 4 320_mhz>320 Mhz BW
  4881. <enum 5 240_mhz>240 Mhz BW
  4882. */
  4883. #define PCU_PPDU_SETUP_INIT_R2R_BW80_OFFSET 0x00000000000000c0
  4884. #define PCU_PPDU_SETUP_INIT_R2R_BW80_LSB 18
  4885. #define PCU_PPDU_SETUP_INIT_R2R_BW80_MSB 20
  4886. #define PCU_PPDU_SETUP_INIT_R2R_BW80_MASK 0x00000000001c0000
  4887. /* Description R2R_BW160
  4888. The BW for the response to response frame when the initial
  4889. trigger frame transmission was in 160 MHz
  4890. NOTE: This field is also known as R2R_pattern_3 in case
  4891. punctured transmission is enabled.
  4892. <enum 0 20_mhz>20 Mhz BW
  4893. <enum 1 40_mhz>40 Mhz BW
  4894. <enum 2 80_mhz>80 Mhz BW
  4895. <enum 3 160_mhz>160 Mhz BW
  4896. <enum 4 320_mhz>320 Mhz BW
  4897. <enum 5 240_mhz>240 Mhz BW
  4898. */
  4899. #define PCU_PPDU_SETUP_INIT_R2R_BW160_OFFSET 0x00000000000000c0
  4900. #define PCU_PPDU_SETUP_INIT_R2R_BW160_LSB 21
  4901. #define PCU_PPDU_SETUP_INIT_R2R_BW160_MSB 23
  4902. #define PCU_PPDU_SETUP_INIT_R2R_BW160_MASK 0x0000000000e00000
  4903. /* Description R2R_BW240
  4904. The BW for the response to response frame when the initial
  4905. trigger frame transmission was in 240 MHz
  4906. NOTE: This field is also known as R2R_pattern_4 in case
  4907. punctured transmission is enabled.
  4908. <enum 0 20_mhz>20 Mhz BW
  4909. <enum 1 40_mhz>40 Mhz BW
  4910. <enum 2 80_mhz>80 Mhz BW
  4911. <enum 3 160_mhz>160 Mhz BW
  4912. <enum 4 320_mhz>320 Mhz BW
  4913. <enum 5 240_mhz>240 Mhz BW
  4914. */
  4915. #define PCU_PPDU_SETUP_INIT_R2R_BW240_OFFSET 0x00000000000000c0
  4916. #define PCU_PPDU_SETUP_INIT_R2R_BW240_LSB 24
  4917. #define PCU_PPDU_SETUP_INIT_R2R_BW240_MSB 26
  4918. #define PCU_PPDU_SETUP_INIT_R2R_BW240_MASK 0x0000000007000000
  4919. /* Description R2R_BW320
  4920. The BW for the response to response frame when the initial
  4921. trigger frame transmission was in 320 MHz
  4922. NOTE: This field is also known as R2R_pattern_5 in case
  4923. punctured transmission is enabled.
  4924. <enum 0 20_mhz>20 Mhz BW
  4925. <enum 1 40_mhz>40 Mhz BW
  4926. <enum 2 80_mhz>80 Mhz BW
  4927. <enum 3 160_mhz>160 Mhz BW
  4928. <enum 4 320_mhz>320 Mhz BW
  4929. <enum 5 240_mhz>240 Mhz BW
  4930. */
  4931. #define PCU_PPDU_SETUP_INIT_R2R_BW320_OFFSET 0x00000000000000c0
  4932. #define PCU_PPDU_SETUP_INIT_R2R_BW320_LSB 27
  4933. #define PCU_PPDU_SETUP_INIT_R2R_BW320_MSB 29
  4934. #define PCU_PPDU_SETUP_INIT_R2R_BW320_MASK 0x0000000038000000
  4935. /* Description RESERVED_30A
  4936. <legal 0>
  4937. */
  4938. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_OFFSET 0x00000000000000c0
  4939. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_LSB 30
  4940. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MSB 31
  4941. #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MASK 0x00000000c0000000
  4942. /* Description MU_RESPONSE_EXPECTED_BITMAP_31_0
  4943. Field only valid in case of MU transmission and a response
  4944. from other or more then just user0 is expected.
  4945. Note that this implies that for all legacy SU exchanges,
  4946. or legacy MU-MIMO where only user 0 can get a response,
  4947. this field does not need to be programmed by SW. All existing
  4948. programming remains backwards compatible.
  4949. Bit 0 represents user 0
  4950. Bit 1 represents user 1
  4951. ...
  4952. When set, a response from this user is expected, and TXPCU
  4953. shall generate the 'tx_fes_status_user_response' TLV for
  4954. this user
  4955. Note that the number of bits set in bitmap fields 0 - 36
  4956. (including next field), shall always be equal or greater
  4957. then the number indicated in field: Required_UL_MU_resp_user_count
  4958. <legal all>
  4959. */
  4960. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_OFFSET 0x00000000000000c0
  4961. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_LSB 32
  4962. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MSB 63
  4963. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MASK 0xffffffff00000000
  4964. /* Description MU_RESPONSE_EXPECTED_BITMAP_36_32
  4965. Field only valid in case of MU transmission and a response
  4966. from other or more then just user0 is expected.
  4967. Note that this implies that for all legacy SU exchanges,
  4968. or legacy MU-MIMO where only user 0 can get a response,
  4969. this field does not need to be programmed by SW. All existing
  4970. programming remains backwards compatible.
  4971. Bit 0 represents user 32
  4972. Bit 1 represents user 33
  4973. ...
  4974. When set, a response from this user is expected, and TXPCU
  4975. shall generate the 'tx_fes_status_user_response' TLV for
  4976. this user
  4977. Note that the number of bits set in bitmap fields 0 - 36
  4978. (including previous field), shall always be equal or greater
  4979. then the number indicated in field: Required_UL_MU_resp_user_count
  4980. <legal all>
  4981. */
  4982. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_OFFSET 0x00000000000000c8
  4983. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_LSB 0
  4984. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MSB 4
  4985. #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MASK 0x000000000000001f
  4986. /* Description MU_EXPECTED_RESPONSE_CBF_COUNT
  4987. Field only valid when Response_type == MU_CBF_expected
  4988. The number of STAs that are expected to send a CBF back
  4989. Note that the actual amount could be smaller....
  4990. <legal all>
  4991. */
  4992. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_OFFSET 0x00000000000000c8
  4993. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_LSB 5
  4994. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MSB 10
  4995. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MASK 0x00000000000007e0
  4996. /* Description MU_EXPECTED_RESPONSE_STA_COUNT
  4997. SW shall program this field if the number of STAs that are
  4998. expected to send something (ACK, DATA, BA, CBF, etc...)
  4999. back is 2 or larger..
  5000. The number of STAs that are expected to send a response
  5001. back.
  5002. Note that the actual amount could be smaller....
  5003. <legal all>
  5004. */
  5005. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_OFFSET 0x00000000000000c8
  5006. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_LSB 11
  5007. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MSB 16
  5008. #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MASK 0x000000000001f800
  5009. /* Description TRANSMIT_INCLUDES_MULTIDESTINATION
  5010. Used by TXPCU
  5011. When set, the MD (Multi Destination) feature is used for
  5012. this transmission. Either for real multi destination STA
  5013. transmissions or Multi TID transmissions.
  5014. Used by TXPCU to know when it can start pre-fetching data
  5015. in order to do BW constrained frame drops.
  5016. <legal all>
  5017. */
  5018. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_OFFSET 0x00000000000000c8
  5019. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_LSB 17
  5020. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MSB 17
  5021. #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MASK 0x0000000000020000
  5022. /* Description INSERT_PREV_TX_START_TIMING_INFO
  5023. When set, TXPCU will insert the value in TXPCU register "prev_phy_tx_start_transmit_time"
  5024. in the transmit frame at the byte location indicated by
  5025. field tx_start_transmit_time_byte_offset
  5026. <legal all>
  5027. */
  5028. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8
  5029. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_LSB 18
  5030. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MSB 18
  5031. #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MASK 0x0000000000040000
  5032. /* Description INSERT_CURRENT_TX_START_TIMING_INFO
  5033. When set, TXPCU will insert the value in TXPCU register "current_phy_tx_start_transmit_time"
  5034. in the transmit frame at the byte location indicated by
  5035. field tx_start_transmit_time_byte_offset
  5036. <legal all>
  5037. */
  5038. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8
  5039. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_LSB 19
  5040. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MSB 19
  5041. #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MASK 0x0000000000080000
  5042. /* Description TX_START_TRANSMIT_TIME_BYTE_OFFSET
  5043. Field only valid when insert_prev_tx_start_timing_info or
  5044. insert_current_tx_start_timing_info is set.
  5045. Start byte offset where the 'start_time' needs to be overwritten
  5046. in the frame
  5047. <legal all>
  5048. */
  5049. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_OFFSET 0x00000000000000c8
  5050. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_LSB 20
  5051. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MSB 31
  5052. #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MASK 0x00000000fff00000
  5053. /* Description PROTECTION_FRAME_AD1_31_0
  5054. Field only valid when use_address_fields_for_protection
  5055. is set
  5056. The Least Significant 4 bytes of the Protection Frame MAC
  5057. Address AD1
  5058. <legal all>
  5059. */
  5060. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_OFFSET 0x00000000000000c8
  5061. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_LSB 32
  5062. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MSB 63
  5063. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MASK 0xffffffff00000000
  5064. /* Description PROTECTION_FRAME_AD1_47_32
  5065. Field only valid when use_address_fields_for_protection
  5066. is set
  5067. The 2 most significant bytes of the Protection Frame MAC
  5068. Address AD1
  5069. <legal all>
  5070. */
  5071. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_OFFSET 0x00000000000000d0
  5072. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_LSB 0
  5073. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MSB 15
  5074. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MASK 0x000000000000ffff
  5075. /* Description PROTECTION_FRAME_AD2_15_0
  5076. Field only valid when use_address_fields_for_protection
  5077. is set
  5078. The Least Significant 2 bytes of the MAC Address AD2
  5079. <legal all>
  5080. */
  5081. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_OFFSET 0x00000000000000d0
  5082. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_LSB 16
  5083. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MSB 31
  5084. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MASK 0x00000000ffff0000
  5085. /* Description PROTECTION_FRAME_AD2_47_16
  5086. Field only valid when use_address_fields_for_protection
  5087. is set
  5088. The 4 most significant bytes of the MAC Address AD2
  5089. <legal all>
  5090. */
  5091. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_OFFSET 0x00000000000000d0
  5092. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_LSB 32
  5093. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MSB 63
  5094. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MASK 0xffffffff00000000
  5095. /* Description DYNAMIC_MEDIUM_PROT_THRESHOLD
  5096. Threshold to enable the dynamic medium protection feature
  5097. in terms of PPDU duration in us or PSDU length in bytes
  5098. This is set to zero to disable the dynamic medium protection
  5099. feature.
  5100. <legal all>
  5101. */
  5102. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_OFFSET 0x00000000000000d8
  5103. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_LSB 0
  5104. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MSB 23
  5105. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MASK 0x0000000000ffffff
  5106. /* Description DYNAMIC_MEDIUM_PROT_TYPE
  5107. <enum 0 dyn_medium_prot_byte> dynamic_medium_prot_threshold
  5108. indicates PSDU length in bytes.
  5109. <enum 1 dyn_medium_prot_us>
  5110. dynamic_medium_prot_threshold indicates PPDU duration in
  5111. us.
  5112. <legal all>
  5113. */
  5114. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_OFFSET 0x00000000000000d8
  5115. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_LSB 24
  5116. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MSB 24
  5117. #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MASK 0x0000000001000000
  5118. /* Description RESERVED_54A
  5119. <legal 0>
  5120. */
  5121. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_OFFSET 0x00000000000000d8
  5122. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_LSB 25
  5123. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MSB 31
  5124. #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MASK 0x00000000fe000000
  5125. /* Description PROTECTION_FRAME_AD3_31_0
  5126. Field only valid when use_address_fields_for_protection
  5127. is set
  5128. The least significant 4 bytes of the Protection Frame MAC
  5129. Address AD3
  5130. Hamilton v1 did not include this (and any subsequent) word.
  5131. <legal all>
  5132. */
  5133. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_OFFSET 0x00000000000000d8
  5134. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_LSB 32
  5135. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MSB 63
  5136. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MASK 0xffffffff00000000
  5137. /* Description PROTECTION_FRAME_AD3_47_32
  5138. Field only valid when use_address_fields_for_protection
  5139. is set
  5140. The 2 most significant bytes of the Protection Frame MAC
  5141. Address AD3
  5142. <legal all>
  5143. */
  5144. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_OFFSET 0x00000000000000e0
  5145. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_LSB 0
  5146. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MSB 15
  5147. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MASK 0x000000000000ffff
  5148. /* Description PROTECTION_FRAME_AD4_15_0
  5149. Field only valid when use_address_fields_for_protection
  5150. is set
  5151. The least significant 2 bytes of the Protection Frame MAC
  5152. Address AD4
  5153. <legal all>
  5154. */
  5155. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_OFFSET 0x00000000000000e0
  5156. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_LSB 16
  5157. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MSB 31
  5158. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MASK 0x00000000ffff0000
  5159. /* Description PROTECTION_FRAME_AD4_47_16
  5160. Field only valid when use_address_fields_for_protection
  5161. is set
  5162. The 4 most significant bytes of the Protection Frame MAC
  5163. Address AD4
  5164. <legal all>
  5165. */
  5166. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_OFFSET 0x00000000000000e0
  5167. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_LSB 32
  5168. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MSB 63
  5169. #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MASK 0xffffffff00000000
  5170. #endif // PCU_PPDU_SETUP_INIT