mon_destination_ring.h 9.5 KB

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  1. /* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  2. *
  3. * Permission to use, copy, modify, and/or distribute this software for any
  4. * purpose with or without fee is hereby granted, provided that the above
  5. * copyright notice and this permission notice appear in all copies.
  6. *
  7. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  8. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  12. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  14. */
  15. #ifndef _MON_DESTINATION_RING_H_
  16. #define _MON_DESTINATION_RING_H_
  17. #if !defined(__ASSEMBLER__)
  18. #endif
  19. #define NUM_OF_DWORDS_MON_DESTINATION_RING 4
  20. struct mon_destination_ring {
  21. #ifndef BIG_ENDIAN_HOST
  22. uint32_t stat_buf_virt_addr_31_0 : 32; // [31:0]
  23. uint32_t stat_buf_virt_addr_63_32 : 32; // [31:0]
  24. uint32_t ppdu_id : 32; // [31:0]
  25. uint32_t end_offset : 12, // [11:0]
  26. reserved_3a : 4, // [15:12]
  27. end_reason : 2, // [17:16]
  28. initiator : 1, // [18:18]
  29. empty_descriptor : 1, // [19:19]
  30. ring_id : 8, // [27:20]
  31. looping_count : 4; // [31:28]
  32. #else
  33. uint32_t stat_buf_virt_addr_31_0 : 32; // [31:0]
  34. uint32_t stat_buf_virt_addr_63_32 : 32; // [31:0]
  35. uint32_t ppdu_id : 32; // [31:0]
  36. uint32_t looping_count : 4, // [31:28]
  37. ring_id : 8, // [27:20]
  38. empty_descriptor : 1, // [19:19]
  39. initiator : 1, // [18:18]
  40. end_reason : 2, // [17:16]
  41. reserved_3a : 4, // [15:12]
  42. end_offset : 12; // [11:0]
  43. #endif
  44. };
  45. /* Description STAT_BUF_VIRT_ADDR_31_0
  46. Lower 32 bits of the 64-bit virtual address of the status
  47. buffer
  48. <legal all>
  49. */
  50. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_OFFSET 0x00000000
  51. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_LSB 0
  52. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_MSB 31
  53. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_MASK 0xffffffff
  54. /* Description STAT_BUF_VIRT_ADDR_63_32
  55. Upper 32 bits of the 64-bit virtual address of the status
  56. buffer
  57. <legal all>
  58. */
  59. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_OFFSET 0x00000004
  60. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_LSB 0
  61. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_MSB 31
  62. #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_MASK 0xffffffff
  63. /* Description PPDU_ID
  64. TXMON fills this with the schedule_id from 'TX_FES_SETUP'
  65. when Initiator = 1.
  66. TXMON fills this with the Phy_ppdu_id from 'RX_RESPONSE_REQUIRED_INFO'
  67. when Initiator = 0.
  68. RXMON fills this with the Phy_ppdu_id from 'RX_PPDU_START.'
  69. <legal all>
  70. */
  71. #define MON_DESTINATION_RING_PPDU_ID_OFFSET 0x00000008
  72. #define MON_DESTINATION_RING_PPDU_ID_LSB 0
  73. #define MON_DESTINATION_RING_PPDU_ID_MSB 31
  74. #define MON_DESTINATION_RING_PPDU_ID_MASK 0xffffffff
  75. /* Description END_OFFSET
  76. The offset (in units of 4 bytes) into the status buffer
  77. where DMA ended, i.e. offset to the last TLV + last TLV
  78. size MINUS 1.
  79. In case of a 'TX_FLUSH' or 'RX_FLUSH,' this reflects the
  80. offset at which flush occurred.
  81. <legal all>
  82. */
  83. #define MON_DESTINATION_RING_END_OFFSET_OFFSET 0x0000000c
  84. #define MON_DESTINATION_RING_END_OFFSET_LSB 0
  85. #define MON_DESTINATION_RING_END_OFFSET_MSB 11
  86. #define MON_DESTINATION_RING_END_OFFSET_MASK 0x00000fff
  87. /* Description RESERVED_3A
  88. <legal 0>
  89. */
  90. #define MON_DESTINATION_RING_RESERVED_3A_OFFSET 0x0000000c
  91. #define MON_DESTINATION_RING_RESERVED_3A_LSB 12
  92. #define MON_DESTINATION_RING_RESERVED_3A_MSB 15
  93. #define MON_DESTINATION_RING_RESERVED_3A_MASK 0x0000f000
  94. /* Description END_REASON
  95. <enum 0 MON_status_buffer_full> The status buffer was fully
  96. written.
  97. <enum 1 MON_flush_detected> A 'TX_FLUSH' or 'RX_FLUSH' was
  98. received. This is implicitly the end of the Tx FES or Rx
  99. PPDU. The status buffer data can be discarded by SW.
  100. <enum 2 MON_end_of_PPDU> A 'TX_FES_STATUS_END' or 'RX_PPDU_END'
  101. was received indicating the end of the Tx FES or Rx PPDU.
  102. <enum 3 MON_PPDU_truncated> The PPDU got truncated due to
  103. a system-level error.
  104. <legal all>
  105. */
  106. #define MON_DESTINATION_RING_END_REASON_OFFSET 0x0000000c
  107. #define MON_DESTINATION_RING_END_REASON_LSB 16
  108. #define MON_DESTINATION_RING_END_REASON_MSB 17
  109. #define MON_DESTINATION_RING_END_REASON_MASK 0x00030000
  110. /* Description INITIATOR
  111. 1: This descriptor belongs to a TX FES (TXOP initiator)
  112. 0: This descriptor belongs to a response TX (TXOP responder)
  113. <legal all>
  114. */
  115. #define MON_DESTINATION_RING_INITIATOR_OFFSET 0x0000000c
  116. #define MON_DESTINATION_RING_INITIATOR_LSB 18
  117. #define MON_DESTINATION_RING_INITIATOR_MSB 18
  118. #define MON_DESTINATION_RING_INITIATOR_MASK 0x00040000
  119. /* Description EMPTY_DESCRIPTOR
  120. 0: This descriptor is written on a flush or the end of a
  121. PPDU or the end of status buffer
  122. 1: This descriptor is written to indicate drop information
  123. (see 'MON_DESTINATION_RING_WITH_DROP' structure)
  124. <legal 0>
  125. */
  126. #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_OFFSET 0x0000000c
  127. #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_LSB 19
  128. #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_MSB 19
  129. #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_MASK 0x00080000
  130. /* Description RING_ID
  131. Consumer: SW/REO/DEBUG
  132. Producer: SRNG (of TXMON/RXMON)
  133. For debugging.
  134. This field is filled in by the SRNG module.
  135. It help to identify the ring that is being looked
  136. <legal 0>
  137. */
  138. #define MON_DESTINATION_RING_RING_ID_OFFSET 0x0000000c
  139. #define MON_DESTINATION_RING_RING_ID_LSB 20
  140. #define MON_DESTINATION_RING_RING_ID_MSB 27
  141. #define MON_DESTINATION_RING_RING_ID_MASK 0x0ff00000
  142. /* Description LOOPING_COUNT
  143. Consumer: SW/DEBUG
  144. Producer: SRNG (of TXMON/RXMON)
  145. For debugging.
  146. This field is filled in by the SRNG module.
  147. A count value that indicates the number of times the producer
  148. of entries into this Ring has looped around the ring.
  149. At initialization time, this value is set to 0. On the first
  150. loop, this value is set to 1. After the max value is reached
  151. allowed by the number of bits for this field, the count
  152. value continues with 0 again.
  153. In case SW is the consumer of the ring entries, it can use
  154. this field to figure out up to where the producer of entries
  155. has created new entries. This eliminates the need to check
  156. where the "head pointer' of the ring is located once the
  157. SW starts processing an interrupt indicating that new entries
  158. have been put into this ring...
  159. Also note that SW if it wants only needs to look at the
  160. LSB bit of this count value.
  161. <legal all>
  162. */
  163. #define MON_DESTINATION_RING_LOOPING_COUNT_OFFSET 0x0000000c
  164. #define MON_DESTINATION_RING_LOOPING_COUNT_LSB 28
  165. #define MON_DESTINATION_RING_LOOPING_COUNT_MSB 31
  166. #define MON_DESTINATION_RING_LOOPING_COUNT_MASK 0xf0000000
  167. #endif // MON_DESTINATION_RING